* src/powerpc/linux64.S: Emit .note.GNU-stack even when
[official-gcc.git] / gcc / caller-save.c
blob11df2ecc17179fdba2e84f989c9ef644a420f49b
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "rtl.h"
25 #include "regs.h"
26 #include "insn-config.h"
27 #include "flags.h"
28 #include "hard-reg-set.h"
29 #include "recog.h"
30 #include "basic-block.h"
31 #include "df.h"
32 #include "reload.h"
33 #include "function.h"
34 #include "expr.h"
35 #include "diagnostic-core.h"
36 #include "tm_p.h"
37 #include "addresses.h"
38 #include "ggc.h"
39 #include "dumpfile.h"
40 #include "rtl-iter.h"
42 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
44 #define regno_save_mode \
45 (this_target_reload->x_regno_save_mode)
46 #define cached_reg_save_code \
47 (this_target_reload->x_cached_reg_save_code)
48 #define cached_reg_restore_code \
49 (this_target_reload->x_cached_reg_restore_code)
51 /* For each hard register, a place on the stack where it can be saved,
52 if needed. */
54 static rtx
55 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
57 /* The number of elements in the subsequent array. */
58 static int save_slots_num;
60 /* Allocated slots so far. */
61 static rtx save_slots[FIRST_PSEUDO_REGISTER];
63 /* Set of hard regs currently residing in save area (during insn scan). */
65 static HARD_REG_SET hard_regs_saved;
67 /* Number of registers currently in hard_regs_saved. */
69 static int n_regs_saved;
71 /* Computed by mark_referenced_regs, all regs referenced in a given
72 insn. */
73 static HARD_REG_SET referenced_regs;
76 typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno,
77 void *mark_arg);
79 static int reg_save_code (int, enum machine_mode);
80 static int reg_restore_code (int, enum machine_mode);
82 struct saved_hard_reg;
83 static void initiate_saved_hard_regs (void);
84 static void new_saved_hard_reg (int, int);
85 static void finish_saved_hard_regs (void);
86 static int saved_hard_reg_compare_func (const void *, const void *);
88 static void mark_set_regs (rtx, const_rtx, void *);
89 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
90 static refmarker_fn mark_reg_as_referenced;
91 static refmarker_fn replace_reg_with_saved_mem;
92 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
93 enum machine_mode *);
94 static int insert_restore (struct insn_chain *, int, int, int,
95 enum machine_mode *);
96 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
97 rtx);
98 static void add_stored_regs (rtx, const_rtx, void *);
102 static GTY(()) rtx savepat;
103 static GTY(()) rtx restpat;
104 static GTY(()) rtx test_reg;
105 static GTY(()) rtx test_mem;
106 static GTY(()) rtx_insn *saveinsn;
107 static GTY(()) rtx_insn *restinsn;
109 /* Return the INSN_CODE used to save register REG in mode MODE. */
110 static int
111 reg_save_code (int reg, enum machine_mode mode)
113 bool ok;
114 if (cached_reg_save_code[reg][mode])
115 return cached_reg_save_code[reg][mode];
116 if (!HARD_REGNO_MODE_OK (reg, mode))
118 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
119 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
120 below silences a warning. */
121 gcc_assert (reg < FIRST_PSEUDO_REGISTER);
122 cached_reg_save_code[reg][mode] = -1;
123 cached_reg_restore_code[reg][mode] = -1;
124 return -1;
127 /* Update the register number and modes of the register
128 and memory operand. */
129 SET_REGNO_RAW (test_reg, reg);
130 PUT_MODE (test_reg, mode);
131 PUT_MODE (test_mem, mode);
133 /* Force re-recognition of the modified insns. */
134 INSN_CODE (saveinsn) = -1;
135 INSN_CODE (restinsn) = -1;
137 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
138 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
140 /* Now extract both insns and see if we can meet their
141 constraints. */
142 ok = (cached_reg_save_code[reg][mode] != -1
143 && cached_reg_restore_code[reg][mode] != -1);
144 if (ok)
146 extract_insn (saveinsn);
147 ok = constrain_operands (1);
148 extract_insn (restinsn);
149 ok &= constrain_operands (1);
152 if (! ok)
154 cached_reg_save_code[reg][mode] = -1;
155 cached_reg_restore_code[reg][mode] = -1;
157 gcc_assert (cached_reg_save_code[reg][mode]);
158 return cached_reg_save_code[reg][mode];
161 /* Return the INSN_CODE used to restore register REG in mode MODE. */
162 static int
163 reg_restore_code (int reg, enum machine_mode mode)
165 if (cached_reg_restore_code[reg][mode])
166 return cached_reg_restore_code[reg][mode];
167 /* Populate our cache. */
168 reg_save_code (reg, mode);
169 return cached_reg_restore_code[reg][mode];
172 /* Initialize for caller-save.
174 Look at all the hard registers that are used by a call and for which
175 reginfo.c has not already excluded from being used across a call.
177 Ensure that we can find a mode to save the register and that there is a
178 simple insn to save and restore the register. This latter check avoids
179 problems that would occur if we tried to save the MQ register of some
180 machines directly into memory. */
182 void
183 init_caller_save (void)
185 rtx addr_reg;
186 int offset;
187 rtx address;
188 int i, j;
190 if (caller_save_initialized_p)
191 return;
193 caller_save_initialized_p = true;
195 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
196 /* First find all the registers that we need to deal with and all
197 the modes that they can have. If we can't find a mode to use,
198 we can't have the register live over calls. */
200 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
202 if (call_used_regs[i]
203 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))
205 for (j = 1; j <= MOVE_MAX_WORDS; j++)
207 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
208 VOIDmode);
209 if (regno_save_mode[i][j] == VOIDmode && j == 1)
211 SET_HARD_REG_BIT (call_fixed_reg_set, i);
215 else
216 regno_save_mode[i][1] = VOIDmode;
219 /* The following code tries to approximate the conditions under which
220 we can easily save and restore a register without scratch registers or
221 other complexities. It will usually work, except under conditions where
222 the validity of an insn operand is dependent on the address offset.
223 No such cases are currently known.
225 We first find a typical offset from some BASE_REG_CLASS register.
226 This address is chosen by finding the first register in the class
227 and by finding the smallest power of two that is a valid offset from
228 that register in every mode we will use to save registers. */
230 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
231 if (TEST_HARD_REG_BIT
232 (reg_class_contents
233 [(int) base_reg_class (regno_save_mode[i][1], ADDR_SPACE_GENERIC,
234 PLUS, CONST_INT)], i))
235 break;
237 gcc_assert (i < FIRST_PSEUDO_REGISTER);
239 addr_reg = gen_rtx_REG (Pmode, i);
241 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
243 address = gen_rtx_PLUS (Pmode, addr_reg, gen_int_mode (offset, Pmode));
245 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
246 if (regno_save_mode[i][1] != VOIDmode
247 && ! strict_memory_address_p (regno_save_mode[i][1], address))
248 break;
250 if (i == FIRST_PSEUDO_REGISTER)
251 break;
254 /* If we didn't find a valid address, we must use register indirect. */
255 if (offset == 0)
256 address = addr_reg;
258 /* Next we try to form an insn to save and restore the register. We
259 see if such an insn is recognized and meets its constraints.
261 To avoid lots of unnecessary RTL allocation, we construct all the RTL
262 once, then modify the memory and register operands in-place. */
264 test_reg = gen_rtx_REG (VOIDmode, 0);
265 test_mem = gen_rtx_MEM (VOIDmode, address);
266 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
267 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
269 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, savepat, 0, -1, 0);
270 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, restpat, 0, -1, 0);
272 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
273 for (j = 1; j <= MOVE_MAX_WORDS; j++)
274 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
276 regno_save_mode[i][j] = VOIDmode;
277 if (j == 1)
279 SET_HARD_REG_BIT (call_fixed_reg_set, i);
280 if (call_used_regs[i])
281 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
288 /* Initialize save areas by showing that we haven't allocated any yet. */
290 void
291 init_save_areas (void)
293 int i, j;
295 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
296 for (j = 1; j <= MOVE_MAX_WORDS; j++)
297 regno_save_mem[i][j] = 0;
298 save_slots_num = 0;
302 /* The structure represents a hard register which should be saved
303 through the call. It is used when the integrated register
304 allocator (IRA) is used and sharing save slots is on. */
305 struct saved_hard_reg
307 /* Order number starting with 0. */
308 int num;
309 /* The hard regno. */
310 int hard_regno;
311 /* Execution frequency of all calls through which given hard
312 register should be saved. */
313 int call_freq;
314 /* Stack slot reserved to save the hard register through calls. */
315 rtx slot;
316 /* True if it is first hard register in the chain of hard registers
317 sharing the same stack slot. */
318 int first_p;
319 /* Order number of the next hard register structure with the same
320 slot in the chain. -1 represents end of the chain. */
321 int next;
324 /* Map: hard register number to the corresponding structure. */
325 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
327 /* The number of all structures representing hard registers should be
328 saved, in order words, the number of used elements in the following
329 array. */
330 static int saved_regs_num;
332 /* Pointers to all the structures. Index is the order number of the
333 corresponding structure. */
334 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
336 /* First called function for work with saved hard registers. */
337 static void
338 initiate_saved_hard_regs (void)
340 int i;
342 saved_regs_num = 0;
343 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
344 hard_reg_map[i] = NULL;
347 /* Allocate and return new saved hard register with given REGNO and
348 CALL_FREQ. */
349 static void
350 new_saved_hard_reg (int regno, int call_freq)
352 struct saved_hard_reg *saved_reg;
354 saved_reg
355 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
356 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
357 saved_reg->num = saved_regs_num++;
358 saved_reg->hard_regno = regno;
359 saved_reg->call_freq = call_freq;
360 saved_reg->first_p = FALSE;
361 saved_reg->next = -1;
364 /* Free memory allocated for the saved hard registers. */
365 static void
366 finish_saved_hard_regs (void)
368 int i;
370 for (i = 0; i < saved_regs_num; i++)
371 free (all_saved_regs[i]);
374 /* The function is used to sort the saved hard register structures
375 according their frequency. */
376 static int
377 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
379 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
380 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
382 if (flag_omit_frame_pointer)
384 if (p1->call_freq - p2->call_freq != 0)
385 return p1->call_freq - p2->call_freq;
387 else if (p2->call_freq - p1->call_freq != 0)
388 return p2->call_freq - p1->call_freq;
390 return p1->num - p2->num;
393 /* Allocate save areas for any hard registers that might need saving.
394 We take a conservative approach here and look for call-clobbered hard
395 registers that are assigned to pseudos that cross calls. This may
396 overestimate slightly (especially if some of these registers are later
397 used as spill registers), but it should not be significant.
399 For IRA we use priority coloring to decrease stack slots needed for
400 saving hard registers through calls. We build conflicts for them
401 to do coloring.
403 Future work:
405 In the fallback case we should iterate backwards across all possible
406 modes for the save, choosing the largest available one instead of
407 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
409 We do not try to use "move multiple" instructions that exist
410 on some machines (such as the 68k moveml). It could be a win to try
411 and use them when possible. The hard part is doing it in a way that is
412 machine independent since they might be saving non-consecutive
413 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
415 void
416 setup_save_areas (void)
418 int i, j, k, freq;
419 HARD_REG_SET hard_regs_used;
420 struct saved_hard_reg *saved_reg;
421 rtx_insn *insn;
422 struct insn_chain *chain, *next;
423 unsigned int regno;
424 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
425 reg_set_iterator rsi;
427 CLEAR_HARD_REG_SET (hard_regs_used);
429 /* Find every CALL_INSN and record which hard regs are live across the
430 call into HARD_REG_MAP and HARD_REGS_USED. */
431 initiate_saved_hard_regs ();
432 /* Create hard reg saved regs. */
433 for (chain = reload_insn_chain; chain != 0; chain = next)
435 rtx cheap;
437 insn = chain->insn;
438 next = chain->next;
439 if (!CALL_P (insn)
440 || find_reg_note (insn, REG_NORETURN, NULL))
441 continue;
442 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
443 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
444 &chain->live_throughout);
445 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
447 /* Record all registers set in this call insn. These don't
448 need to be saved. N.B. the call insn might set a subreg
449 of a multi-hard-reg pseudo; then the pseudo is considered
450 live during the call, but the subreg that is set
451 isn't. */
452 CLEAR_HARD_REG_SET (this_insn_sets);
453 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
454 /* Sibcalls are considered to set the return value. */
455 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
456 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
458 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
459 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
460 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
461 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
462 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
464 if (hard_reg_map[regno] != NULL)
465 hard_reg_map[regno]->call_freq += freq;
466 else
467 new_saved_hard_reg (regno, freq);
468 SET_HARD_REG_BIT (hard_regs_used, regno);
470 cheap = find_reg_note (insn, REG_RETURNED, NULL);
471 if (cheap)
472 cheap = XEXP (cheap, 0);
473 /* Look through all live pseudos, mark their hard registers. */
474 EXECUTE_IF_SET_IN_REG_SET
475 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
477 int r = reg_renumber[regno];
478 int bound;
480 if (r < 0 || regno_reg_rtx[regno] == cheap)
481 continue;
483 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
484 for (; r < bound; r++)
485 if (TEST_HARD_REG_BIT (used_regs, r))
487 if (hard_reg_map[r] != NULL)
488 hard_reg_map[r]->call_freq += freq;
489 else
490 new_saved_hard_reg (r, freq);
491 SET_HARD_REG_BIT (hard_regs_to_save, r);
492 SET_HARD_REG_BIT (hard_regs_used, r);
497 /* If requested, figure out which hard regs can share save slots. */
498 if (optimize && flag_ira_share_save_slots)
500 rtx slot;
501 char *saved_reg_conflicts;
502 int next_k;
503 struct saved_hard_reg *saved_reg2, *saved_reg3;
504 int call_saved_regs_num;
505 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
506 int best_slot_num;
507 int prev_save_slots_num;
508 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
510 /* Find saved hard register conflicts. */
511 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
512 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
513 for (chain = reload_insn_chain; chain != 0; chain = next)
515 rtx cheap;
516 call_saved_regs_num = 0;
517 insn = chain->insn;
518 next = chain->next;
519 if (!CALL_P (insn)
520 || find_reg_note (insn, REG_NORETURN, NULL))
521 continue;
523 cheap = find_reg_note (insn, REG_RETURNED, NULL);
524 if (cheap)
525 cheap = XEXP (cheap, 0);
527 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
528 &chain->live_throughout);
529 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
531 /* Record all registers set in this call insn. These don't
532 need to be saved. N.B. the call insn might set a subreg
533 of a multi-hard-reg pseudo; then the pseudo is considered
534 live during the call, but the subreg that is set
535 isn't. */
536 CLEAR_HARD_REG_SET (this_insn_sets);
537 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
538 /* Sibcalls are considered to set the return value,
539 compare df-scan.c:df_get_call_refs. */
540 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
541 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
543 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
544 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
545 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
546 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
547 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
549 gcc_assert (hard_reg_map[regno] != NULL);
550 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
552 /* Look through all live pseudos, mark their hard registers. */
553 EXECUTE_IF_SET_IN_REG_SET
554 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
556 int r = reg_renumber[regno];
557 int bound;
559 if (r < 0 || regno_reg_rtx[regno] == cheap)
560 continue;
562 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
563 for (; r < bound; r++)
564 if (TEST_HARD_REG_BIT (used_regs, r))
565 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
567 for (i = 0; i < call_saved_regs_num; i++)
569 saved_reg = call_saved_regs[i];
570 for (j = 0; j < call_saved_regs_num; j++)
571 if (i != j)
573 saved_reg2 = call_saved_regs[j];
574 saved_reg_conflicts[saved_reg->num * saved_regs_num
575 + saved_reg2->num]
576 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
577 + saved_reg->num]
578 = TRUE;
582 /* Sort saved hard regs. */
583 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
584 saved_hard_reg_compare_func);
585 /* Initiate slots available from the previous reload
586 iteration. */
587 prev_save_slots_num = save_slots_num;
588 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
589 save_slots_num = 0;
590 /* Allocate stack slots for the saved hard registers. */
591 for (i = 0; i < saved_regs_num; i++)
593 saved_reg = all_saved_regs[i];
594 regno = saved_reg->hard_regno;
595 for (j = 0; j < i; j++)
597 saved_reg2 = all_saved_regs[j];
598 if (! saved_reg2->first_p)
599 continue;
600 slot = saved_reg2->slot;
601 for (k = j; k >= 0; k = next_k)
603 saved_reg3 = all_saved_regs[k];
604 next_k = saved_reg3->next;
605 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
606 + saved_reg3->num])
607 break;
609 if (k < 0
610 && (GET_MODE_SIZE (regno_save_mode[regno][1])
611 <= GET_MODE_SIZE (regno_save_mode
612 [saved_reg2->hard_regno][1])))
614 saved_reg->slot
615 = adjust_address_nv
616 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
617 regno_save_mem[regno][1] = saved_reg->slot;
618 saved_reg->next = saved_reg2->next;
619 saved_reg2->next = i;
620 if (dump_file != NULL)
621 fprintf (dump_file, "%d uses slot of %d\n",
622 regno, saved_reg2->hard_regno);
623 break;
626 if (j == i)
628 saved_reg->first_p = TRUE;
629 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
631 slot = prev_save_slots[j];
632 if (slot == NULL_RTX)
633 continue;
634 if (GET_MODE_SIZE (regno_save_mode[regno][1])
635 <= GET_MODE_SIZE (GET_MODE (slot))
636 && best_slot_num < 0)
637 best_slot_num = j;
638 if (GET_MODE (slot) == regno_save_mode[regno][1])
639 break;
641 if (best_slot_num >= 0)
643 saved_reg->slot = prev_save_slots[best_slot_num];
644 saved_reg->slot
645 = adjust_address_nv
646 (saved_reg->slot,
647 regno_save_mode[saved_reg->hard_regno][1], 0);
648 if (dump_file != NULL)
649 fprintf (dump_file,
650 "%d uses a slot from prev iteration\n", regno);
651 prev_save_slots[best_slot_num] = NULL_RTX;
652 if (best_slot_num + 1 == prev_save_slots_num)
653 prev_save_slots_num--;
655 else
657 saved_reg->slot
658 = assign_stack_local_1
659 (regno_save_mode[regno][1],
660 GET_MODE_SIZE (regno_save_mode[regno][1]), 0,
661 ASLK_REDUCE_ALIGN);
662 if (dump_file != NULL)
663 fprintf (dump_file, "%d uses a new slot\n", regno);
665 regno_save_mem[regno][1] = saved_reg->slot;
666 save_slots[save_slots_num++] = saved_reg->slot;
669 free (saved_reg_conflicts);
670 finish_saved_hard_regs ();
672 else
674 /* We are not sharing slots.
676 Run through all the call-used hard-registers and allocate
677 space for each in the caller-save area. Try to allocate space
678 in a manner which allows multi-register saves/restores to be done. */
680 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
681 for (j = MOVE_MAX_WORDS; j > 0; j--)
683 int do_save = 1;
685 /* If no mode exists for this size, try another. Also break out
686 if we have already saved this hard register. */
687 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
688 continue;
690 /* See if any register in this group has been saved. */
691 for (k = 0; k < j; k++)
692 if (regno_save_mem[i + k][1])
694 do_save = 0;
695 break;
697 if (! do_save)
698 continue;
700 for (k = 0; k < j; k++)
701 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
703 do_save = 0;
704 break;
706 if (! do_save)
707 continue;
709 /* We have found an acceptable mode to store in. Since
710 hard register is always saved in the widest mode
711 available, the mode may be wider than necessary, it is
712 OK to reduce the alignment of spill space. We will
713 verify that it is equal to or greater than required
714 when we restore and save the hard register in
715 insert_restore and insert_save. */
716 regno_save_mem[i][j]
717 = assign_stack_local_1 (regno_save_mode[i][j],
718 GET_MODE_SIZE (regno_save_mode[i][j]),
719 0, ASLK_REDUCE_ALIGN);
721 /* Setup single word save area just in case... */
722 for (k = 0; k < j; k++)
723 /* This should not depend on WORDS_BIG_ENDIAN.
724 The order of words in regs is the same as in memory. */
725 regno_save_mem[i + k][1]
726 = adjust_address_nv (regno_save_mem[i][j],
727 regno_save_mode[i + k][1],
728 k * UNITS_PER_WORD);
732 /* Now loop again and set the alias set of any save areas we made to
733 the alias set used to represent frame objects. */
734 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
735 for (j = MOVE_MAX_WORDS; j > 0; j--)
736 if (regno_save_mem[i][j] != 0)
737 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
742 /* Find the places where hard regs are live across calls and save them. */
744 void
745 save_call_clobbered_regs (void)
747 struct insn_chain *chain, *next, *last = NULL;
748 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
750 /* Computed in mark_set_regs, holds all registers set by the current
751 instruction. */
752 HARD_REG_SET this_insn_sets;
754 CLEAR_HARD_REG_SET (hard_regs_saved);
755 n_regs_saved = 0;
757 for (chain = reload_insn_chain; chain != 0; chain = next)
759 rtx_insn *insn = chain->insn;
760 enum rtx_code code = GET_CODE (insn);
762 next = chain->next;
764 gcc_assert (!chain->is_caller_save_insn);
766 if (NONDEBUG_INSN_P (insn))
768 /* If some registers have been saved, see if INSN references
769 any of them. We must restore them before the insn if so. */
771 if (n_regs_saved)
773 int regno;
774 HARD_REG_SET this_insn_sets;
776 if (code == JUMP_INSN)
777 /* Restore all registers if this is a JUMP_INSN. */
778 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
779 else
781 CLEAR_HARD_REG_SET (referenced_regs);
782 mark_referenced_regs (&PATTERN (insn),
783 mark_reg_as_referenced, NULL);
784 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
787 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
788 if (TEST_HARD_REG_BIT (referenced_regs, regno))
789 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS,
790 save_mode);
791 /* If a saved register is set after the call, this means we no
792 longer should restore it. This can happen when parts of a
793 multi-word pseudo do not conflict with other pseudos, so
794 IRA may allocate the same hard register for both. One may
795 be live across the call, while the other is set
796 afterwards. */
797 CLEAR_HARD_REG_SET (this_insn_sets);
798 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
799 AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
802 if (code == CALL_INSN
803 && ! SIBLING_CALL_P (insn)
804 && ! find_reg_note (insn, REG_NORETURN, NULL))
806 unsigned regno;
807 HARD_REG_SET hard_regs_to_save;
808 HARD_REG_SET call_def_reg_set;
809 reg_set_iterator rsi;
810 rtx cheap;
812 cheap = find_reg_note (insn, REG_RETURNED, NULL);
813 if (cheap)
814 cheap = XEXP (cheap, 0);
816 /* Use the register life information in CHAIN to compute which
817 regs are live during the call. */
818 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
819 &chain->live_throughout);
820 /* Save hard registers always in the widest mode available. */
821 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
822 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
823 save_mode [regno] = regno_save_mode [regno][1];
824 else
825 save_mode [regno] = VOIDmode;
827 /* Look through all live pseudos, mark their hard registers
828 and choose proper mode for saving. */
829 EXECUTE_IF_SET_IN_REG_SET
830 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
832 int r = reg_renumber[regno];
833 int nregs;
834 enum machine_mode mode;
836 if (r < 0 || regno_reg_rtx[regno] == cheap)
837 continue;
838 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
839 mode = HARD_REGNO_CALLER_SAVE_MODE
840 (r, nregs, PSEUDO_REGNO_MODE (regno));
841 if (GET_MODE_BITSIZE (mode)
842 > GET_MODE_BITSIZE (save_mode[r]))
843 save_mode[r] = mode;
844 while (nregs-- > 0)
845 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
848 /* Record all registers set in this call insn. These don't need
849 to be saved. N.B. the call insn might set a subreg of a
850 multi-hard-reg pseudo; then the pseudo is considered live
851 during the call, but the subreg that is set isn't. */
852 CLEAR_HARD_REG_SET (this_insn_sets);
853 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
855 /* Compute which hard regs must be saved before this call. */
856 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
857 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
858 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
859 get_call_reg_set_usage (insn, &call_def_reg_set,
860 call_used_reg_set);
861 AND_HARD_REG_SET (hard_regs_to_save, call_def_reg_set);
863 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
864 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
865 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
867 /* Must recompute n_regs_saved. */
868 n_regs_saved = 0;
869 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
870 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
871 n_regs_saved++;
873 if (cheap
874 && HARD_REGISTER_P (cheap)
875 && TEST_HARD_REG_BIT (call_used_reg_set, REGNO (cheap)))
877 rtx dest, newpat;
878 rtx pat = PATTERN (insn);
879 if (GET_CODE (pat) == PARALLEL)
880 pat = XVECEXP (pat, 0, 0);
881 dest = SET_DEST (pat);
882 newpat = gen_rtx_SET (VOIDmode, cheap, copy_rtx (dest));
883 chain = insert_one_insn (chain, 0, -1, newpat);
886 last = chain;
888 else if (DEBUG_INSN_P (insn) && n_regs_saved)
889 mark_referenced_regs (&PATTERN (insn),
890 replace_reg_with_saved_mem,
891 save_mode);
893 if (chain->next == 0 || chain->next->block != chain->block)
895 int regno;
896 /* At the end of the basic block, we must restore any registers that
897 remain saved. If the last insn in the block is a JUMP_INSN, put
898 the restore before the insn, otherwise, put it after the insn. */
900 if (n_regs_saved
901 && DEBUG_INSN_P (insn)
902 && last
903 && last->block == chain->block)
905 rtx_insn *ins, *prev;
906 basic_block bb = BLOCK_FOR_INSN (insn);
908 /* When adding hard reg restores after a DEBUG_INSN, move
909 all notes between last real insn and this DEBUG_INSN after
910 the DEBUG_INSN, otherwise we could get code
911 -g/-g0 differences. */
912 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev)
914 prev = PREV_INSN (ins);
915 if (NOTE_P (ins))
917 SET_NEXT_INSN (prev) = NEXT_INSN (ins);
918 SET_PREV_INSN (NEXT_INSN (ins)) = prev;
919 SET_PREV_INSN (ins) = insn;
920 SET_NEXT_INSN (ins) = NEXT_INSN (insn);
921 SET_NEXT_INSN (insn) = ins;
922 if (NEXT_INSN (ins))
923 SET_PREV_INSN (NEXT_INSN (ins)) = ins;
924 if (BB_END (bb) == insn)
925 BB_END (bb) = ins;
927 else
928 gcc_assert (DEBUG_INSN_P (ins));
931 last = NULL;
933 if (n_regs_saved)
934 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
935 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
936 regno += insert_restore (chain, JUMP_P (insn),
937 regno, MOVE_MAX_WORDS, save_mode);
942 /* Here from note_stores, or directly from save_call_clobbered_regs, when
943 an insn stores a value in a register.
944 Set the proper bit or bits in this_insn_sets. All pseudos that have
945 been assigned hard regs have had their register number changed already,
946 so we can ignore pseudos. */
947 static void
948 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
950 int regno, endregno, i;
951 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
953 if (GET_CODE (reg) == SUBREG)
955 rtx inner = SUBREG_REG (reg);
956 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
957 return;
958 regno = subreg_regno (reg);
959 endregno = regno + subreg_nregs (reg);
961 else if (REG_P (reg)
962 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
964 regno = REGNO (reg);
965 endregno = END_HARD_REGNO (reg);
967 else
968 return;
970 for (i = regno; i < endregno; i++)
971 SET_HARD_REG_BIT (*this_insn_sets, i);
974 /* Here from note_stores when an insn stores a value in a register.
975 Set the proper bit or bits in the passed regset. All pseudos that have
976 been assigned hard regs have had their register number changed already,
977 so we can ignore pseudos. */
978 static void
979 add_stored_regs (rtx reg, const_rtx setter, void *data)
981 int regno, endregno, i;
982 enum machine_mode mode = GET_MODE (reg);
983 int offset = 0;
985 if (GET_CODE (setter) == CLOBBER)
986 return;
988 if (GET_CODE (reg) == SUBREG
989 && REG_P (SUBREG_REG (reg))
990 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
992 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
993 GET_MODE (SUBREG_REG (reg)),
994 SUBREG_BYTE (reg),
995 GET_MODE (reg));
996 regno = REGNO (SUBREG_REG (reg)) + offset;
997 endregno = regno + subreg_nregs (reg);
999 else
1001 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
1002 return;
1004 regno = REGNO (reg) + offset;
1005 endregno = end_hard_regno (mode, regno);
1008 for (i = regno; i < endregno; i++)
1009 SET_REGNO_REG_SET ((regset) data, i);
1012 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1013 static void
1014 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg)
1016 enum rtx_code code = GET_CODE (*loc);
1017 const char *fmt;
1018 int i, j;
1020 if (code == SET)
1021 mark_referenced_regs (&SET_SRC (*loc), mark, arg);
1022 if (code == SET || code == CLOBBER)
1024 loc = &SET_DEST (*loc);
1025 code = GET_CODE (*loc);
1026 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER)
1027 || code == PC || code == CC0
1028 || (code == SUBREG && REG_P (SUBREG_REG (*loc))
1029 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER
1030 /* If we're setting only part of a multi-word register,
1031 we shall mark it as referenced, because the words
1032 that are not being set should be restored. */
1033 && ((GET_MODE_SIZE (GET_MODE (*loc))
1034 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))))
1035 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))
1036 <= UNITS_PER_WORD))))
1037 return;
1039 if (code == MEM || code == SUBREG)
1041 loc = &XEXP (*loc, 0);
1042 code = GET_CODE (*loc);
1045 if (code == REG)
1047 int regno = REGNO (*loc);
1048 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
1049 : reg_renumber[regno]);
1051 if (hardregno >= 0)
1052 mark (loc, GET_MODE (*loc), hardregno, arg);
1053 else if (arg)
1054 /* ??? Will we ever end up with an equiv expression in a debug
1055 insn, that would have required restoring a reg, or will
1056 reload take care of it for us? */
1057 return;
1058 /* If this is a pseudo that did not get a hard register, scan its
1059 memory location, since it might involve the use of another
1060 register, which might be saved. */
1061 else if (reg_equiv_mem (regno) != 0)
1062 mark_referenced_regs (&XEXP (reg_equiv_mem (regno), 0), mark, arg);
1063 else if (reg_equiv_address (regno) != 0)
1064 mark_referenced_regs (&reg_equiv_address (regno), mark, arg);
1065 return;
1068 fmt = GET_RTX_FORMAT (code);
1069 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1071 if (fmt[i] == 'e')
1072 mark_referenced_regs (&XEXP (*loc, i), mark, arg);
1073 else if (fmt[i] == 'E')
1074 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
1075 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg);
1079 /* Parameter function for mark_referenced_regs() that adds registers
1080 present in the insn and in equivalent mems and addresses to
1081 referenced_regs. */
1083 static void
1084 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED,
1085 enum machine_mode mode,
1086 int hardregno,
1087 void *arg ATTRIBUTE_UNUSED)
1089 add_to_hard_reg_set (&referenced_regs, mode, hardregno);
1092 /* Parameter function for mark_referenced_regs() that replaces
1093 registers referenced in a debug_insn that would have been restored,
1094 should it be a non-debug_insn, with their save locations. */
1096 static void
1097 replace_reg_with_saved_mem (rtx *loc,
1098 enum machine_mode mode,
1099 int regno,
1100 void *arg)
1102 unsigned int i, nregs = hard_regno_nregs [regno][mode];
1103 rtx mem;
1104 enum machine_mode *save_mode = (enum machine_mode *)arg;
1106 for (i = 0; i < nregs; i++)
1107 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1108 break;
1110 /* If none of the registers in the range would need restoring, we're
1111 all set. */
1112 if (i == nregs)
1113 return;
1115 while (++i < nregs)
1116 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1117 break;
1119 if (i == nregs
1120 && regno_save_mem[regno][nregs])
1122 mem = copy_rtx (regno_save_mem[regno][nregs]);
1124 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]])
1125 mem = adjust_address_nv (mem, save_mode[regno], 0);
1127 if (GET_MODE (mem) != mode)
1129 /* This is gen_lowpart_if_possible(), but without validating
1130 the newly-formed address. */
1131 int offset = 0;
1133 if (WORDS_BIG_ENDIAN)
1134 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD)
1135 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1136 if (BYTES_BIG_ENDIAN)
1137 /* Adjust the address so that the address-after-the-data is
1138 unchanged. */
1139 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1140 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem))));
1142 mem = adjust_address_nv (mem, mode, offset);
1145 else
1147 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs));
1148 for (i = 0; i < nregs; i++)
1149 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1151 gcc_assert (regno_save_mem[regno + i][1]);
1152 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]);
1154 else
1156 gcc_assert (save_mode[regno] != VOIDmode);
1157 XVECEXP (mem, 0, i) = gen_rtx_REG (save_mode [regno],
1158 regno + i);
1162 gcc_assert (GET_MODE (mem) == mode);
1163 *loc = mem;
1167 /* Insert a sequence of insns to restore. Place these insns in front of
1168 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1169 the maximum number of registers which should be restored during this call.
1170 It should never be less than 1 since we only work with entire registers.
1172 Note that we have verified in init_caller_save that we can do this
1173 with a simple SET, so use it. Set INSN_CODE to what we save there
1174 since the address might not be valid so the insn might not be recognized.
1175 These insns will be reloaded and have register elimination done by
1176 find_reload, so we need not worry about that here.
1178 Return the extra number of registers saved. */
1180 static int
1181 insert_restore (struct insn_chain *chain, int before_p, int regno,
1182 int maxrestore, enum machine_mode *save_mode)
1184 int i, k;
1185 rtx pat = NULL_RTX;
1186 int code;
1187 unsigned int numregs = 0;
1188 struct insn_chain *new_chain;
1189 rtx mem;
1191 /* A common failure mode if register status is not correct in the
1192 RTL is for this routine to be called with a REGNO we didn't
1193 expect to save. That will cause us to write an insn with a (nil)
1194 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1195 later, check for this common case here instead. This will remove
1196 one step in debugging such problems. */
1197 gcc_assert (regno_save_mem[regno][1]);
1199 /* Get the pattern to emit and update our status.
1201 See if we can restore `maxrestore' registers at once. Work
1202 backwards to the single register case. */
1203 for (i = maxrestore; i > 0; i--)
1205 int j;
1206 int ok = 1;
1208 if (regno_save_mem[regno][i] == 0)
1209 continue;
1211 for (j = 0; j < i; j++)
1212 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1214 ok = 0;
1215 break;
1217 /* Must do this one restore at a time. */
1218 if (! ok)
1219 continue;
1221 numregs = i;
1222 break;
1225 mem = regno_save_mem [regno][numregs];
1226 if (save_mode [regno] != VOIDmode
1227 && save_mode [regno] != GET_MODE (mem)
1228 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1229 /* Check that insn to restore REGNO in save_mode[regno] is
1230 correct. */
1231 && reg_save_code (regno, save_mode[regno]) >= 0)
1232 mem = adjust_address_nv (mem, save_mode[regno], 0);
1233 else
1234 mem = copy_rtx (mem);
1236 /* Verify that the alignment of spill space is equal to or greater
1237 than required. */
1238 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1239 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1241 pat = gen_rtx_SET (VOIDmode,
1242 gen_rtx_REG (GET_MODE (mem),
1243 regno), mem);
1244 code = reg_restore_code (regno, GET_MODE (mem));
1245 new_chain = insert_one_insn (chain, before_p, code, pat);
1247 /* Clear status for all registers we restored. */
1248 for (k = 0; k < i; k++)
1250 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1251 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1252 n_regs_saved--;
1255 /* Tell our callers how many extra registers we saved/restored. */
1256 return numregs - 1;
1259 /* Like insert_restore above, but save registers instead. */
1261 static int
1262 insert_save (struct insn_chain *chain, int before_p, int regno,
1263 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
1265 int i;
1266 unsigned int k;
1267 rtx pat = NULL_RTX;
1268 int code;
1269 unsigned int numregs = 0;
1270 struct insn_chain *new_chain;
1271 rtx mem;
1273 /* A common failure mode if register status is not correct in the
1274 RTL is for this routine to be called with a REGNO we didn't
1275 expect to save. That will cause us to write an insn with a (nil)
1276 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1277 later, check for this common case here. This will remove one
1278 step in debugging such problems. */
1279 gcc_assert (regno_save_mem[regno][1]);
1281 /* Get the pattern to emit and update our status.
1283 See if we can save several registers with a single instruction.
1284 Work backwards to the single register case. */
1285 for (i = MOVE_MAX_WORDS; i > 0; i--)
1287 int j;
1288 int ok = 1;
1289 if (regno_save_mem[regno][i] == 0)
1290 continue;
1292 for (j = 0; j < i; j++)
1293 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1295 ok = 0;
1296 break;
1298 /* Must do this one save at a time. */
1299 if (! ok)
1300 continue;
1302 numregs = i;
1303 break;
1306 mem = regno_save_mem [regno][numregs];
1307 if (save_mode [regno] != VOIDmode
1308 && save_mode [regno] != GET_MODE (mem)
1309 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1310 /* Check that insn to save REGNO in save_mode[regno] is
1311 correct. */
1312 && reg_save_code (regno, save_mode[regno]) >= 0)
1313 mem = adjust_address_nv (mem, save_mode[regno], 0);
1314 else
1315 mem = copy_rtx (mem);
1317 /* Verify that the alignment of spill space is equal to or greater
1318 than required. */
1319 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1320 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1322 pat = gen_rtx_SET (VOIDmode, mem,
1323 gen_rtx_REG (GET_MODE (mem),
1324 regno));
1325 code = reg_save_code (regno, GET_MODE (mem));
1326 new_chain = insert_one_insn (chain, before_p, code, pat);
1328 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1329 for (k = 0; k < numregs; k++)
1331 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1332 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1333 n_regs_saved++;
1336 /* Tell our callers how many extra registers we saved/restored. */
1337 return numregs - 1;
1340 /* A note_uses callback used by insert_one_insn. Add the hard-register
1341 equivalent of each REG to regset DATA. */
1343 static void
1344 add_used_regs (rtx *loc, void *data)
1346 subrtx_iterator::array_type array;
1347 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
1349 const_rtx x = *iter;
1350 if (REG_P (x))
1352 unsigned int regno = REGNO (x);
1353 if (HARD_REGISTER_NUM_P (regno))
1354 bitmap_set_range ((regset) data, regno,
1355 hard_regno_nregs[regno][GET_MODE (x)]);
1356 else
1357 gcc_checking_assert (reg_renumber[regno] < 0);
1362 /* Emit a new caller-save insn and set the code. */
1363 static struct insn_chain *
1364 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1366 rtx_insn *insn = chain->insn;
1367 struct insn_chain *new_chain;
1369 #ifdef HAVE_cc0
1370 /* If INSN references CC0, put our insns in front of the insn that sets
1371 CC0. This is always safe, since the only way we could be passed an
1372 insn that references CC0 is for a restore, and doing a restore earlier
1373 isn't a problem. We do, however, assume here that CALL_INSNs don't
1374 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1376 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
1377 && before_p
1378 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1379 chain = chain->prev, insn = chain->insn;
1380 #endif
1382 new_chain = new_insn_chain ();
1383 if (before_p)
1385 rtx link;
1387 new_chain->prev = chain->prev;
1388 if (new_chain->prev != 0)
1389 new_chain->prev->next = new_chain;
1390 else
1391 reload_insn_chain = new_chain;
1393 chain->prev = new_chain;
1394 new_chain->next = chain;
1395 new_chain->insn = emit_insn_before (pat, insn);
1396 /* ??? It would be nice if we could exclude the already / still saved
1397 registers from the live sets. */
1398 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1399 note_uses (&PATTERN (chain->insn), add_used_regs,
1400 &new_chain->live_throughout);
1401 /* If CHAIN->INSN is a call, then the registers which contain
1402 the arguments to the function are live in the new insn. */
1403 if (CALL_P (chain->insn))
1404 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1405 link != NULL_RTX;
1406 link = XEXP (link, 1))
1407 note_uses (&XEXP (link, 0), add_used_regs,
1408 &new_chain->live_throughout);
1410 CLEAR_REG_SET (&new_chain->dead_or_set);
1411 if (chain->insn == BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1412 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1414 else
1416 new_chain->next = chain->next;
1417 if (new_chain->next != 0)
1418 new_chain->next->prev = new_chain;
1419 chain->next = new_chain;
1420 new_chain->prev = chain;
1421 new_chain->insn = emit_insn_after (pat, insn);
1422 /* ??? It would be nice if we could exclude the already / still saved
1423 registers from the live sets, and observe REG_UNUSED notes. */
1424 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1425 /* Registers that are set in CHAIN->INSN live in the new insn.
1426 (Unless there is a REG_UNUSED note for them, but we don't
1427 look for them here.) */
1428 note_stores (PATTERN (chain->insn), add_stored_regs,
1429 &new_chain->live_throughout);
1430 CLEAR_REG_SET (&new_chain->dead_or_set);
1431 if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1432 BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1434 new_chain->block = chain->block;
1435 new_chain->is_caller_save_insn = 1;
1437 INSN_CODE (new_chain->insn) = code;
1438 return new_chain;
1440 #include "gt-caller-save.h"