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1 /* Definitions of target machine for GNU compiler. AT&T DSP1600.
2 Copyright (C) 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Michael Collison (collison@world.std.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 1, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
82 /* RUN-TIME TARGET SPECIFICATION */
83 #define DSP16XX 1
85 /* Name of the AT&T assembler */
89 /* Name of the AT&T linker */
93 /* Define which switches take word arguments */
94 #define WORD_SWITCH_TAKES_ARG(STR) \
96 0)
98 #ifdef CC1_SPEC
99 #undef CC1_SPEC
100 #endif
103 /* Define this as a spec to call the AT&T assembler */
107 /* Define this as a spec to call the AT&T linker */
110 %{r} %{s} %{t} %{u*} %{x}\
111 %{!A:%{!nostdlib:%S}} %{static:}\
114 /* Nothing complicated here, just link with libc.a under normal
115 circumstances */
118 /* Specify the startup file to link with. */
120 %{mmap2:m2_crt0.o%s} \
121 %{mmap3:m3_crt0.o%s} \
122 %{mmap4:m4_crt0.o%s} \
123 %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \
124 %eA -ifile option requires a -map option}}"
126 /* Specify the end file to link with */
129 %{mmap2:m2_crtn.o%s} \
130 %{mmap3:m3_crtn.o%s} \
131 %{mmap4:m4_crtn.o%s} \
132 %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \
133 %eA -ifile option requires a -map option}}"
136 /* Tell gcc where to look for the startfile */
139 /* Tell gcc where to look for it's executables */
142 /* Command line options to the AT&T assembler */
145 /* Command line options for the AT&T linker */
147 %{!ifile*:%{mmap1:-ifile m1_deflt.if%s} \
148 %{mmap2:-ifile m2_deflt.if%s} \
149 %{mmap3:-ifile m3_deflt.if%s} \
150 %{mmap4:-ifile m4_deflt.if%s} \
151 %{!mmap*:-ifile m4_deflt.if%s}} \
152 %{ifile*} %{!r:-a}"
154 /* Names to predefine in the preprocessor for this target machine. */
155 #ifdef __MSDOS__
157 #else
159 #endif
161 /* Run-time compilation parameters selecting different hardware subsets. */
165 /* Macros used in the machine description to test the flags. */
179 initialize data at startup */
183 /* Compile passing first two args in regs 0 and 1.
184 This exists only to test compiler features that will
185 be needed for RISC chips. It is not usable
186 and is not intended to be usable on this cpu. */
187 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
189 /* The call is on the same 4k page, so instead of loading
190 the 'pt' register and branching, we can branch directly */
192 #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
194 /* The jump is on the same 4k page, so instead of loading
195 the 'pt' register and branching, we can branch directly */
197 #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
199 /* Generate shift instructions to use the 1610 Bit Manipulation
200 Unit. */
201 #define TARGET_BMU (target_flags & MASK_BMU)
203 /* Optimize to conseverve memory */
204 #define TARGET_OPTIMIZE_MEMORY (target_flags & MASK_OPTIMIZE_MEMORY)
206 /* Optimize for maximum speed */
207 #define TARGET_OPTIMIZE_SPEED (target_flags & MASK_OPTIMIZE_SPEED)
209 #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
211 /* Direct the linker to output extra info for initialized data */
212 #define TARGET_MASK_INIT (target_flags & MASK_INIT)
214 #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
216 /* Reserve the ybase registers *(0) - *(31) */
217 #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
219 /* Macro to define tables used to set the flags.
220 This is a list in braces of pairs in braces,
221 each pair being { "NAME", VALUE }
222 where VALUE is the bits to set or minus the bits to clear.
223 An empty string NAME is used to identify the default VALUE. */
226 #define TARGET_SWITCHES \
227 { \
246 }
248 /* Default target_flags if no switches are specified */
249 #ifndef TARGET_DEFAULT
250 #define TARGET_DEFAULT MASK_OPTIMIZE_MEMORY|MASK_REGPARM|MASK_YBASE_HIGH
251 #endif
253 /* This macro is similar to `TARGET_SWITCHES' but defines names of
254 command options that have values. Its definition is an
255 initializer with a subgrouping for each command option.
257 Each subgrouping contains a string constant, that defines the
258 fixed part of the option name, and the address of a variable.
259 The variable, type `char *', is set to the variable part of the
260 given option if the fixed part matches. The actual option name
261 is made by appending `-m' to the specified name.
263 Here is an example which defines `-mshort-data-NUMBER'. If the
264 given option is `-mshort-data-512', the variable `m88k_short_data'
265 will be set to the string `"512"'.
267 extern char *m88k_short_data;
268 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
270 #define TARGET_OPTIONS \
271 { \
277 }
279 /* Sometimes certain combinations of command options do not make sense
280 on a particular target machine. You can define a macro
281 `OVERRIDE_OPTIONS' to take account of this. This macro, if
282 defined, is executed once just after all the command options have
283 been parsed. */
285 #define OVERRIDE_OPTIONS override_options ()
287 #define OPTIMIZATION_OPTIONS(LEVEL) \
288 { \
289 flag_gnu_linker = FALSE; \
290 \
291 if (LEVEL) \
292 { \
293 flag_omit_frame_pointer = TRUE; \
294 flag_thread_jumps = TRUE; \
295 } \
296 \
297 if (LEVEL >= 2) \
298 { \
299 flag_strength_reduce = TRUE; \
300 flag_cse_follow_jumps = TRUE; \
301 flag_cse_skip_blocks = TRUE; \
302 flag_expensive_optimizations = TRUE; \
303 flag_rerun_cse_after_loop = TRUE; \
304 } \
305 \
306 if (LEVEL >= 3) \
307 { \
308 flag_inline_functions = 1; \
309 } \
310 }
311 \f
312 /* STORAGE LAYOUT */
314 /* Define if you don't want extended real, but do want to use the
315 software floating point emulator for REAL_ARITHMETIC and
316 decimal <-> binary conversion. */
317 #define REAL_ARITHMETIC
319 /* Define this if most significant bit is lowest numbered
320 in instructions that operate on numbered bit-fields.
321 */
322 #define BITS_BIG_ENDIAN 1
324 /* Define this if most significant byte of a word is the lowest numbered.
325 We define big-endian, but since the 1600 series cannot address bytes
326 it does not matter. */
327 #define BYTES_BIG_ENDIAN 1
329 /* Define this if most significant word of a multiword number is numbered.
330 For the 1600 we can decide arbitrarily since there are no machine instructions for them. */
331 #define WORDS_BIG_ENDIAN 1
333 /* number of bits in an addressible storage unit */
334 #define BITS_PER_UNIT 16
336 /* Width in bits of a "word", which is the contents of a machine register.
337 Note that this is not necessarily the width of data type `int';
338 if using 16-bit ints on a 68000, this would still be 32.
339 But on a machine with 16-bit registers, this would be 16. */
340 #define BITS_PER_WORD 16
342 /* Maximum number of bits in a word. */
343 #define MAX_BITS_PER_WORD 16
345 /* Width of a word, in units (bytes). */
346 #define UNITS_PER_WORD 1
348 /* Width in bits of a pointer.
349 See also the macro `Pmode' defined below. */
350 #define POINTER_SIZE 16
352 /* Allocation boundary (in *bits*) for storing pointers in memory. */
353 #define POINTER_BOUNDARY 16
355 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
356 #define PARM_BOUNDARY 16
358 /* Boundary (in *bits*) on which stack pointer should be aligned. */
359 #define STACK_BOUNDARY 16
361 /* Allocation boundary (in *bits*) for the code of a function. */
362 #define FUNCTION_BOUNDARY 16
364 /* Biggest alignment that any data type can require on this machine, in bits. */
365 #define BIGGEST_ALIGNMENT 16
367 /* Biggest alignment that any structure field can require on this machine, in bits */
368 #define BIGGEST_FIELD_ALIGNMENT 16
370 /* Alignment of field after `int : 0' in a structure. */
371 #define EMPTY_FIELD_BOUNDARY 16
373 /* Number of bits which any structure or union's size must be a multiple of. Each structure
374 or union's size is rounded up to a multiple of this */
375 #define STRUCTURE_SIZE_BOUNDARY 16
377 /* Define this if move instructions will actually fail to work
378 when given unaligned data. */
379 #define STRICT_ALIGNMENT 1
381 /* An integer expression for the size in bits of the largest integer machine mode that
382 should actually be used. All integer machine modes of this size or smaller can be
383 used for structures and unions with the appropriate sizes. */
384 #define MAX_FIXED_MODE_SIZE 32
385 \f
386 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
388 #define CHAR_TYPE_SIZE 16
389 #define SHORT_TYPE_SIZE 16
390 #define INT_TYPE_SIZE 16
391 #define LONG_TYPE_SIZE 32
392 #define LONG_LONG_TYPE_SIZE 32
393 #define FLOAT_TYPE_SIZE 32
394 #define DOUBLE_TYPE_SIZE 32
395 #define LONG_DOUBLE_TYPE_SIZE 32
397 /* An expression whose value is 1 or 0, according to whether the type char should be
398 signed or unsigned by default. */
400 #define DEFAULT_SIGNED_CHAR 1
402 /* A C expression to determine whether to give an enum type only as many bytes
403 as it takes to represent the range of possible values of that type. A nonzero
404 value means to do that; a zero value means all enum types should be allocated
405 like int. */
407 #define DEFAULT_SHORT_ENUMS 0
409 /* A C expression for a string describing the name of the data type to use for
410 size values. */
414 /* A C expression for a string describing the name of the datat type to use for the
415 result of subtracting two pointers */
427 \f
428 /* REGISTER USAGE. */
430 #define ALL_16_BIT_REGISTERS 1
432 /* Number of actual hardware registers.
433 The hardware registers are assigned numbers for the compiler
434 from 0 to FIRST_PSEUDO_REGISTER-1 */
436 #define FIRST_PSEUDO_REGISTER REG_YBASE31 + 1
438 /* 1 for registers that have pervasive standard uses
439 and are not available for the register allocator.
441 The registers are layed out as follows:
443 {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
444 {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
445 {pt} - X Space Address Arithmetic Unit
446 {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
447 {pr} - Return Address Register
449 We reserve r2 for the Stack Pointer.
450 We specify r3 for the Frame Pointer but allow the compiler
451 to omit it when possible since we have so few pointer registers. */
453 #define REG_A0 0
454 #define REG_A0L 1
455 #define REG_A1 2
456 #define REG_A1L 3
457 #define REG_X 4
458 #define REG_Y 5
459 #define REG_YL 6
460 #define REG_PROD 7
461 #define REG_PRODL 8
462 #define REG_R0 9
463 #define REG_R1 10
464 #define REG_R2 11
465 #define REG_R3 12
466 #define REG_J 13
467 #define REG_K 14
468 #define REG_YBASE 15
469 #define REG_PT 16
470 #define REG_AR0 17
471 #define REG_AR1 18
472 #define REG_AR2 19
473 #define REG_AR3 20
474 #define REG_C0 21
475 #define REG_C1 22
476 #define REG_C2 23
477 #define REG_PR 24
478 #define REG_RB 25
479 #define REG_YBASE0 26
480 #define REG_YBASE1 27
481 #define REG_YBASE2 28
482 #define REG_YBASE3 29
483 #define REG_YBASE4 30
484 #define REG_YBASE5 31
485 #define REG_YBASE6 32
486 #define REG_YBASE7 33
487 #define REG_YBASE8 34
488 #define REG_YBASE9 35
489 #define REG_YBASE10 36
490 #define REG_YBASE11 37
491 #define REG_YBASE12 38
492 #define REG_YBASE13 39
493 #define REG_YBASE14 40
494 #define REG_YBASE15 41
495 #define REG_YBASE16 42
496 #define REG_YBASE17 43
497 #define REG_YBASE18 44
498 #define REG_YBASE19 45
499 #define REG_YBASE20 46
500 #define REG_YBASE21 47
501 #define REG_YBASE22 48
502 #define REG_YBASE23 49
503 #define REG_YBASE24 50
504 #define REG_YBASE25 51
505 #define REG_YBASE26 52
506 #define REG_YBASE27 53
507 #define REG_YBASE28 54
508 #define REG_YBASE29 55
509 #define REG_YBASE30 56
510 #define REG_YBASE31 57
512 /* Do we have a accumulator register? */
513 #define IS_ACCUM_REG(REGNO) ((REGNO) >= REG_A0 && (REGNO) <= REG_A1L)
514 #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
516 /* Do we have a virtual ybase register */
517 #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
519 #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
521 #define FIXED_REGISTERS \
522 {0, 0, 0, 0, 0, 0, 0, 0, 0, \
523 0, 0, 0, 1, 0, 0, 1, \
524 1, \
525 0, 0, 0, 0, \
526 1, 1, 1, \
527 0, 0, \
528 0, 0, 0, 0, 0, 0, 0, 0, \
529 0, 0, 0, 0, 0, 0, 0, 0, \
530 0, 0, 0, 0, 0, 0, 0, 0, \
531 0, 0, 0, 0, 0, 0, 0, 0}
533 /* 1 for registers not available across function calls.
534 These must include the FIXED_REGISTERS and also any
535 registers that can be used without being saved.
536 The latter must include the registers where values are returned
537 and the register where structure-value addresses are passed.
538 On the 1610 'a0' holds return values from functions. 'r0' holds
539 structure-value addresses.
541 In addition we don't save either j, k, ybase or any of the
542 bit manipulation registers. */
545 #define CALL_USED_REGISTERS \
546 {1, 1, 1, 1, 0, 1, 1, 1, 1, \
547 1, 0, 0, 1, 1, 1, 1, \
548 1, \
549 0, 0, 1, 1, \
550 1, 1, 1, \
551 0, 1, \
552 0, 0, 0, 0, 0, 0, 0, 0, \
553 0, 0, 0, 0, 0, 0, 0, 0, \
554 0, 0, 0, 0, 0, 0, 0, 0, \
555 0, 0, 0, 0, 0, 0, 0, 0}
557 /* List the order in which to allocate registers. Each register must be
558 listed once, even those in FIXED_REGISTERS.
560 We allocate in the following order:
561 */
563 #define REG_ALLOC_ORDER \
564 { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \
565 REG_PRODL, REG_YL, REG_AR0, REG_AR1, \
566 REG_RB, REG_A0, REG_A1, REG_A0L, \
567 REG_A1L, REG_AR2, REG_AR3, \
568 REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \
569 REG_C1, REG_C2, REG_R3, \
570 REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
571 REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
572 REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
573 REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
574 REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
575 REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
576 REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
577 REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
579 /* Zero or more C statements that may conditionally modify two
580 variables `fixed_regs' and `call_used_regs' (both of type `char
581 []') after they have been initialized from the two preceding
582 macros.
584 This is necessary in case the fixed or call-clobbered registers
585 depend on target flags.
587 You need not define this macro if it has no work to do.
589 If the usage of an entire class of registers depends on the target
590 flags, you may indicate this to GCC by using this macro to modify
591 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
592 the classes which should not be used by GCC. Also define the macro
593 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
594 letter for a class that shouldn't be used.
596 (However, if this class is not included in `GENERAL_REGS' and all
597 of the insn patterns whose constraints permit this class are
598 controlled by target switches, then GCC will automatically avoid
599 using these registers when the target switches are opposed to
600 them.) If the user tells us there is no BMU, we can't use
601 ar0-ar3 for regsiter allocation */
603 #define CONDITIONAL_REGISTER_USAGE \
604 do \
605 { \
606 if (!TARGET_BMU) \
607 { \
608 int regno; \
609 \
610 for (regno = REG_AR0; regno <= REG_AR3; regno++) \
611 fixed_regs[regno] = call_used_regs[regno] = 1; \
612 } \
613 if (TARGET_RESERVE_YBASE) \
614 { \
615 int regno; \
616 \
617 for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \
618 fixed_regs[regno] = call_used_regs[regno] = 1; \
619 } \
620 } \
621 while (0)
623 /* Determine which register classes are very likely used by spill registers.
624 local-alloc.c won't allocate pseudos that have these classes as their
625 preferred class unless they are "preferred or nothing". */
627 #define CLASS_LIKELY_SPILLED_P(CLASS) \
628 ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
630 /* Return number of consecutive hard regs needed starting at reg REGNO
631 to hold something of mode MODE.
632 This is ordinarily the length in words of a value of mode MODE
633 but can be less for certain modes in special long registers. */
635 #define HARD_REGNO_NREGS(REGNO, MODE) \
636 (GET_MODE_SIZE(MODE))
638 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
640 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
642 /* Value is 1 if it is a good idea to tie two pseudo registers
643 when one has mode MODE1 and one has mode MODE2.
644 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
645 for any hard reg, then this must be 0 for correct output. */
646 #define MODES_TIEABLE_P(MODE1, MODE2) \
647 (((MODE1) == (MODE2)) || \
648 (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \
649 == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
651 /* Specify the registers used for certain standard purposes.
652 The values of these macros are register numbers. */
654 /* DSP1600 pc isn't overloaded on a register. */
655 /* #define PC_REGNUM */
657 /* Register to use for pushing function arguments.
658 This is r3 in our case */
659 #define STACK_POINTER_REGNUM REG_R3
661 /* Base register for access to local variables of the function.
662 This is r2 in our case */
663 #define FRAME_POINTER_REGNUM REG_R2
665 /* We can debug without the frame pointer */
666 #define CAN_DEBUG_WITHOUT_FP 1
668 /* The 1610 saves the return address in this register */
669 #define RETURN_ADDRESS_REGNUM REG_PR
671 /* Base register for access to arguments of the function. */
672 #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
674 /* Register in which static-chain is passed to a function. */
676 #define STATIC_CHAIN_REGNUM 4
678 /* Register in which address to store a structure value
679 is passed to a function. This is 'r0' in our case */
680 #define STRUCT_VALUE_REGNUM REG_R0
681 \f
682 /* Define the classes of registers for register constraints in the
683 machine description. Also define ranges of constants.
685 One of the classes must always be named ALL_REGS and include all hard regs.
686 If there is more than one class, another class must be named NO_REGS
687 and contain no registers.
689 The name GENERAL_REGS must be the name of a class (or an alias for
690 another name such as ALL_REGS). This is the class of registers
691 that is allowed by "g" or "r" in a register constraint.
692 Also, registers outside this class are allocated only when
693 instructions express preferences for them.
695 The classes must be numbered in nondecreasing order; that is,
696 a larger-numbered class must never be contained completely
697 in a smaller-numbered class.
699 For any two classes, it is very desirable that there be another
700 class that represents their union. */
703 enum reg_class
704 {
705 NO_REGS,
706 A0H_REG,
707 A0L_REG,
708 A0_REG,
709 A1H_REG,
710 ACCUM_HIGH_REGS,
711 A1L_REG,
712 ACCUM_LOW_REGS,
713 A1_REG,
714 ACCUM_REGS,
715 X_REG,
716 X_OR_ACCUM_LOW_REGS,
717 X_OR_ACCUM_REGS,
718 YH_REG,
719 YH_OR_ACCUM_HIGH_REGS,
720 X_OR_YH_REGS,
721 YL_REG,
722 YL_OR_ACCUM_LOW_REGS,
723 X_OR_YL_REGS,
724 X_OR_Y_REGS,
725 Y_REG,
726 ACCUM_OR_Y_REGS,
727 PH_REG,
728 X_OR_PH_REGS,
729 PL_REG,
730 PL_OR_ACCUM_LOW_REGS,
731 X_OR_PL_REGS,
732 YL_OR_PL_OR_ACCUM_LOW_REGS,
733 P_REG,
734 ACCUM_OR_P_REGS,
735 YL_OR_P_REGS,
736 ACCUM_LOW_OR_YL_OR_P_REGS,
737 Y_OR_P_REGS,
738 ACCUM_Y_OR_P_REGS,
739 NO_FRAME_Y_ADDR_REGS,
740 Y_ADDR_REGS,
741 ACCUM_LOW_OR_Y_ADDR_REGS,
742 ACCUM_OR_Y_ADDR_REGS,
743 X_OR_Y_ADDR_REGS,
744 Y_OR_Y_ADDR_REGS,
745 P_OR_Y_ADDR_REGS,
746 NON_HIGH_YBASE_ELIGIBLE_REGS,
747 YBASE_ELIGIBLE_REGS,
748 J_REG,
749 J_OR_DAU_16_BIT_REGS,
750 BMU_REGS,
751 NOHIGH_NON_ADDR_REGS,
752 NON_ADDR_REGS,
753 SLOW_MEM_LOAD_REGS,
754 NOHIGH_NON_YBASE_REGS,
755 NO_ACCUM_NON_YBASE_REGS,
756 NON_YBASE_REGS,
757 YBASE_VIRT_REGS,
758 ACCUM_LOW_OR_YBASE_REGS,
759 ACCUM_OR_YBASE_REGS,
760 X_OR_YBASE_REGS,
761 Y_OR_YBASE_REGS,
762 ACCUM_LOW_YL_PL_OR_YBASE_REGS,
763 P_OR_YBASE_REGS,
764 ACCUM_Y_P_OR_YBASE_REGS,
765 Y_ADDR_OR_YBASE_REGS,
766 YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
767 YBASE_OR_YBASE_ELIGIBLE_REGS,
768 NO_HIGH_ALL_REGS,
769 ALL_REGS,
770 LIM_REG_CLASSES
771 };
773 /* GENERAL_REGS must be the name of a register class */
774 #define GENERAL_REGS ALL_REGS
776 #define N_REG_CLASSES (int) LIM_REG_CLASSES
778 /* Give names of register classes as strings for dump file. */
780 #define REG_CLASS_NAMES \
781 { \
847 }
849 /* Define which registers fit in which classes.
850 This is an initializer for a vector of HARD_REG_SET
851 of length N_REG_CLASSES. */
853 #define REG_CLASS_CONTENTS \
854 { \
920 }
923 /* The same information, inverted:
924 Return the class number of the smallest class containing
925 reg number REGNO. This could be a conditional expression
926 or could index an array. */
928 #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
930 /* The class value for index registers, and the one for base regs. */
932 #define INDEX_REG_CLASS NO_REGS
933 #define BASE_REG_CLASS Y_ADDR_REGS
935 /* Get reg_class from a letter such as appears in the machine description. */
937 #define REG_CLASS_FROM_LETTER(C) \
938 dsp16xx_reg_class_from_letter(C)
940 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
941 secondary_reload_class(CLASS, MODE, X)
943 /* When defined, the compiler allows registers explicitly used in the
944 rtl to be used as spill registers but prevents the compiler from
945 extending the lifetime of these registers. */
947 #define SMALL_REGISTER_CLASSES
949 /* Macros to check register numbers against specific register classes. */
951 /* These assume that REGNO is a hard or pseudo reg number.
952 They give nonzero only if REGNO is a hard reg of the suitable class
953 or a pseudo reg currently allocated to a suitable hard reg.
954 Since they use reg_renumber, they are safe only once reg_renumber
955 has been allocated, which happens in local-alloc.c. */
957 /* A C expression which is nonzero if register REGNO is suitable for use
958 as a base register in operand addresses. It may be either a suitable
959 hard register or a pseudo register that has been allocated such a
960 hard register.
962 On the 1610 the Y address pointers can be used as a base registers */
963 #define REGNO_OK_FOR_BASE_P(REGNO) \
964 (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \
965 && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
967 #define REGNO_OK_FOR_YBASE_P(REGNO) \
968 (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
970 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
972 #ifdef ALL_16_BIT_REGISTERS
973 #define IS_32_BIT_REG(REGNO) 0
974 #else
975 #define IS_32_BIT_REG(REGNO) \
976 ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
977 #endif
979 /* Given an rtx X being reloaded into a reg required to be
980 in class CLASS, return the class of reg to actually use.
981 In general this is just CLASS; but on some machines
982 in some cases it is preferable to use a more restrictive class.
983 Also, we must ensure that a PLUS is reloaded either
984 into an accumulator or an address register. */
986 #define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS)
988 /* A C expression that places additional restrictions on the register
989 class to use when it is necessary to be able to hold a value of
990 mode MODE in a reload register for which class CLASS would
991 ordinarily be used.
993 Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
994 there are certain modes that simply can't go in certain reload
995 classes.
997 The value is a register class; perhaps CLASS, or perhaps another,
998 smaller class.
1000 Don't define this macro unless the target machine has limitations
1001 which require the macro to do something nontrivial. */
1003 #if 0
1004 #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
1005 #endif
1007 /* A C expression for the maximum number of consecutive registers of class CLASS
1008 needed to hold a vlaue of mode MODE */
1009 #define CLASS_MAX_NREGS(CLASS, MODE) \
1010 class_max_nregs(CLASS, MODE)
1012 /* The letters 'I' through 'P' in a register constraint string
1013 can be used to stand for particular ranges of immediate operands.
1014 This macro defines what the ranges are.
1015 C is the letter, and VALUE is a constant value.
1016 Return 1 if VALUE is in the range specified by C.
1018 For the 16xx, the following constraints are used:
1019 'I' requires a non-negative 16-bit value.
1020 'J' requires a non-negative 9-bit value
1021 'K' requires a constant 0 operand.
1022 'L' requires 16-bit value
1023 'M' 32-bit value -- low 16-bits zero
1024 */
1026 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
1027 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
1028 #define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X)))
1029 #define SHORT_INTVAL(I) ((unsigned) (I) < 0x100)
1031 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1038 (VALUE) == -2 || (VALUE) == 2) \
1039 : 0)
1041 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
1043 /* Optional extra constraints for this machine */
1044 #define EXTRA_CONSTRAINT(OP,C) \
1046 : 0)
1047 \f
1048 /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
1050 /* Define this if pushing a word on the stack
1051 makes the stack pointer a smaller address. */
1052 /* #define STACK_GROWS_DOWNWARD */
1054 /* Define this if the nominal address of the stack frame
1055 is at the high-address end of the local variables;
1056 that is, each additional local variable allocated
1057 goes at a more negative offset in the frame. */
1058 /* #define FRAME_GROWS_DOWNWARD */
1060 #define ARGS_GROW_DOWNWARD
1062 /* We use post decrement on the 1600 because there isn't
1063 a pre-decrement addressing mode. This means that we
1064 assume the stack pointer always points at the next
1065 FREE location on the stack. */
1066 #define STACK_PUSH_CODE POST_INC
1068 /* Offset within stack frame to start allocating local variables at.
1069 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1070 first local allocated. Otherwise, it is the offset to the BEGINNING
1071 of the first local allocated. */
1072 #define STARTING_FRAME_OFFSET 0
1074 /* Offset from the stack pointer register to the first
1075 location at which outgoing arguments are placed. */
1076 #define STACK_POINTER_OFFSET (0)
1078 struct dsp16xx_frame_info
1079 {
1090 };
1094 /* If we generate an insn to push BYTES bytes,
1095 this says how many the stack pointer really advances by. */
1096 /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
1098 /* If defined, the maximum amount of space required for outgoing
1099 arguments will be computed and placed into the variable
1100 'current_function_outgoing_args_size'. No space will be pushed
1101 onto the stack for each call; instead, the function prologue should
1102 increase the stack frame size by this amount.
1104 It is not proper to define both 'PUSH_ROUNDING' and
1105 'ACCUMULATE_OUTGOING_ARGS'. */
1106 #define ACCUMULATE_OUTGOING_ARGS
1108 /* Offset of first parameter from the argument pointer
1109 register value. */
1111 #define FIRST_PARM_OFFSET(FNDECL) (0)
1113 /* Value is 1 if returning from a function call automatically
1114 pops the arguments described by the number-of-args field in the call.
1115 FUNDECL is the declaration node of the function (as a tree),
1116 FUNTYPE is the data type of the function (as a tree),
1117 or for a library call it is an identifier node for the subroutine name. */
1119 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1121 /* Define how to find the value returned by a function.
1122 VALTYPE is the data type of the value (as a tree).
1123 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1124 otherwise, FUNC is 0. On the 1610 all function return their values
1125 in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
1126 entire register is significant. */
1128 #define VALUE_REGNO(MODE) (REG_Y)
1130 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1131 gen_rtx (REG, TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
1133 /* Define how to find the value returned by a library function
1134 assuming the value has mode MODE. */
1135 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, VALUE_REGNO(MODE))
1137 /* 1 if N is a possible register number for a function value. */
1138 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
1139 \f
1141 /* Define where to put the arguments to a function.
1142 Value is zero to push the argument on the stack,
1143 or a hard register in which to store the argument.
1145 MODE is the argument's machine mode.
1146 TYPE is the data type of the argument (as a tree).
1147 This is null for libcalls where that information may
1148 not be available.
1149 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1150 the preceding args and about the function being called.
1151 NAMED is nonzero if this argument is a named parameter
1152 (otherwise it is an extra parameter matching an ellipsis). */
1154 /* On the 1610 all args are pushed, except if -mregparm is specified
1155 then the first two words of arguments are passed in a0, a1. */
1156 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1157 dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
1159 /* Define the first register to be used for argument passing */
1160 #define FIRST_REG_FOR_FUNCTION_ARG REG_Y
1162 /* Define the profitablity of saving registers around calls.
1163 NOTE: For now we turin this off because of a bug in the
1164 caller-saves code and also because i'm not sure it is helpful
1165 on the 1610. */
1167 #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
1169 /* This indicates that an argument is to be passed with an invisible reference
1170 (i.e., a pointer to the object is passed).
1172 On the dsp16xx, we do this if it must be passed on the stack. */
1174 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1175 (MUST_PASS_IN_STACK (MODE, TYPE))
1177 /* For an arg passed partly in registers and partly in memory,
1178 this is the number of registers used.
1179 For args passed entirely in registers or entirely in memory, zero. */
1181 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1183 /* Define a data type for recording info about an argument list
1184 during the scan of that argument list. This data type should
1185 hold all necessary information about the function itself
1186 and about the args processed so far, enough to enable macros
1187 such as FUNCTION_ARG to determine where the next arg should go. */
1188 #define CUMULATIVE_ARGS int
1190 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1191 for a call to a function whose data type is FNTYPE.
1192 For a library call, FNTYPE is 0. */
1193 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
1195 /* Update the data in CUM to advance over an argument
1196 of mode MODE and data type TYPE.
1197 (TYPE is null for libcalls where that information may not be available.) */
1199 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1200 dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
1202 /* 1 if N is a possible register number for function argument passing. */
1203 #define FUNCTION_ARG_REGNO_P(N) \
1204 ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
1206 /* This macro generates the assembly code for function entry.
1207 FILE is a stdio stream to output the code to.
1208 SIZE is an int: how many units of temporary storage to allocate.
1209 Refer to the array `regs_ever_live' to determine which registers
1210 to save; `regs_ever_live[I]' is nonzero if register number I
1211 is ever used in the function. This macro is responsible for
1212 knowing which registers should not be saved even if used. */
1214 #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1216 /* Output assembler code to FILE to increment profiler label # LABELNO
1217 for profiling a function entry. */
1221 /* Output assembler code to FILE to initialize this source file's
1222 basic block profiling info, if that has not already been done. */
1225 /* Output assembler code to FILE to increment the entry-count for
1226 the BLOCKNO'th basic block in this source file. */
1230 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1231 the stack pointer does not matter. The value is tested only in
1232 functions that have frame pointers.
1233 No definition is equivalent to always zero. */
1235 #define EXIT_IGNORE_STACK (0)
1239 /* Length in units of the trampoline for entering a nested function.
1240 This is a dummy value */
1242 #define TRAMPOLINE_SIZE 20
1244 /* Emit RTL insns to initialize the variable parts of a trampoline.
1245 FNADDR is an RTX for the address of the function's pure code.
1246 CXT is an RTX for the static chain value for the function. */
1248 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1251 /* This macro generates the assembly code for function exit,
1252 on machines that need it. If FUNCTION_EPILOGUE is not defined
1253 then individual return instructions are generated for each
1254 return statement. Args are same as for FUNCTION_PROLOGUE.
1256 The function epilogue should not depend on the current stack pointer!
1257 It should use the frame pointer only. This is mandatory because
1258 of alloca; we also take advantage of it to omit stack adjustments
1259 before returning. */
1261 #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1263 /* A C expression which is nonzero if a function must have and use a
1264 frame pointer. If its value is nonzero the functions will have a
1265 frame pointer. */
1266 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1268 /* A C statement to store in the variable 'DEPTH' the difference
1269 between the frame pointer and the stack pointer values immediately
1270 after the function prologue. */
1271 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1272 { (DEPTH) = initial_frame_pointer_offset(); \
1273 }
1274 \f
1275 /* IMPLICIT CALLS TO LIBRARY ROUTINES */
1301 /* Define this macro if calls to the ANSI C library functions memcpy and
1302 memset should be generated instead of the BSD function bcopy & bzero. */
1303 #define TARGET_MEM_FUNCTIONS
1305 \f
1306 /* ADDRESSING MODES */
1308 /* The 1610 has post-increment and decrement, but no pre-modify */
1309 #define HAVE_POST_INCREMENT
1310 #define HAVE_POST_DECREMENT
1312 /* #define HAVE_PRE_DECREMENT */
1313 /* #define HAVE_PRE_INCREMENT */
1315 /* Recognize any constant value that is a valid address. */
1316 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1318 /* Maximum number of registers that can appear in a valid memory address. */
1319 #define MAX_REGS_PER_ADDRESS 1
1321 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1322 and check its validity for a certain class.
1323 We have two alternate definitions for each of them.
1324 The usual definition accepts all pseudo regs; the other rejects
1325 them unless they have been allocated suitable hard regs.
1326 The symbol REG_OK_STRICT causes the latter definition to be used.
1328 Most source files want to accept pseudo regs in the hope that
1329 they will get allocated to the class that the insn wants them to be in.
1330 Source files for reload pass need to be strict.
1331 After reload, it makes no difference, since pseudo regs have
1332 been eliminated by then. */
1334 #ifndef REG_OK_STRICT
1336 /* Nonzero if X is a hard reg that can be used as an index
1337 or if it is a pseudo reg. */
1338 #define REG_OK_FOR_INDEX_P(X) 0
1340 /* Nonzero if X is a hard reg that can be used as a base reg
1341 or if it is a pseudo reg. */
1342 #define REG_OK_FOR_BASE_P(X) \
1343 ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \
1344 || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1346 /* Nonzero if X is the 'ybase' register */
1347 #define REG_OK_FOR_YBASE_P(X) \
1348 (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1349 #else
1351 /* Nonzero if X is a hard reg that can be used as an index. */
1352 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1354 /* Nonzero if X is a hard reg that can be used as a base reg. */
1355 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1357 /* Nonzero if X is the 'ybase' register */
1358 #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
1360 #endif
1361 \f
1362 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1363 that is a valid memory address for an instruction.
1364 The MODE argument is the machine mode for the MEM expression
1365 that wants to use this address.
1367 On the 1610, the actual legitimate addresses must be N (N must fit in
1368 5 bits), *rn (register indirect), *rn++, or *rn-- */
1370 #define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20)
1371 #define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000)
1372 #define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0)
1373 #define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
1375 #define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
1376 #define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
1377 #define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31)
1379 #define INDIRECTABLE_ADDRESS_P(X) \
1380 ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \
1381 || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \
1382 && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \
1383 || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
1386 #define INDEXABLE_ADDRESS_P(X,MODE) \
1387 ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \
1388 XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \
1389 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \
1390 (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
1391 XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \
1392 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
1394 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1395 { \
1396 if (INDIRECTABLE_ADDRESS_P(X)) \
1397 goto ADDR; \
1398 }
1400 \f
1401 /* Try machine-dependent ways of modifying an illegitimate address
1402 to be legitimate. If we find one, return the new, valid address.
1403 This macro is used in only one place: `memory_address' in explow.c.
1405 OLDX is the address as it was before break_out_memory_refs was called.
1406 In some cases it is useful to look at this to decide what needs to be done.
1408 MODE and WIN are passed so that this macro can use
1409 GO_IF_LEGITIMATE_ADDRESS.
1411 It is always safe for this macro to do nothing. It exists to recognize
1412 opportunities to optimize the output.
1414 For the 1610, we need not do anything. However, if we don't,
1415 `memory_address' will try lots of things to get a valid address, most of
1416 which will result in dead code and extra pseudos. So we make the address
1417 valid here.
1419 This is easy: The only valid addresses are an offset from a register
1420 and we know the address isn't valid. So just call either `force_operand'
1421 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1423 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1424 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1425 X = XEXP (x, 0); \
1426 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1427 X = force_operand (X, 0); \
1428 else \
1429 X = force_reg (Pmode, X); \
1430 goto WIN; \
1431 }
1433 /* Go to LABEL if ADDR (a legitimate address expression)
1434 has an effect that depends on the machine mode it is used for.
1435 On the 1610, only postdecrement and postincrement address depend thus
1436 (the amount of decrement or increment being the length of the operand). */
1438 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1439 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1441 /* Nonzero if the constant value X is a legitimate general operand.
1442 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1443 #define LEGITIMATE_CONSTANT_P(X) (1)
1445 \f
1446 /* CONDITION CODE INFORMATION */
1448 /* Store in cc_status the expressions
1449 that the condition codes will describe
1450 after execution of an instruction whose pattern is EXP.
1451 Do not alter them if the instruction would not alter the cc's. */
1453 #define NOTICE_UPDATE_CC(EXP, INSN) \
1454 notice_update_cc( (EXP) )
1455 \f
1456 /* DESCRIBING RELATIVE COSTS OF OPERATIONS */
1458 /* Compute the cost of computing a constant rtl expression RTX
1459 whose rtx-code is CODE. The body of this macro is a portion
1460 of a switch statement. If the code is computed here,
1461 return it with a return statement. */
1462 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1463 case CONST_INT: \
1464 return 0; \
1465 case LABEL_REF: \
1466 case SYMBOL_REF: \
1467 case CONST: \
1468 return COSTS_N_INSNS (1); \
1469 \
1470 case CONST_DOUBLE: \
1471 return COSTS_N_INSNS (2);
1473 /* Like CONST_COSTS but applies to nonsonstant RTL expressions.
1474 This can be used, for example to indicate how costly a multiply
1475 instruction is. */
1476 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1477 case MEM: \
1478 return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) : \
1479 COSTS_N_INSNS (4); \
1480 case DIV: \
1481 case MOD: \
1482 return COSTS_N_INSNS (38); \
1483 case MULT: \
1484 if (GET_MODE (X) == QImode) \
1485 return COSTS_N_INSNS (2); \
1486 else \
1487 return COSTS_N_INSNS (38); \
1488 case PLUS: \
1489 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1490 { \
1491 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1492 { \
1493 int number = INTVAL(XEXP (X,1)); \
1494 if (number == 1) \
1495 return COSTS_N_INSNS (1); \
1496 if (INT_FITS_16_BITS(number)) \
1497 return COSTS_N_INSNS (2); \
1498 else \
1499 return COSTS_N_INSNS (4); \
1500 } \
1501 return COSTS_N_INSNS (1); \
1502 } \
1503 else \
1504 return COSTS_N_INSNS (38); \
1505 case MINUS: \
1506 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1507 { \
1508 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1509 { \
1510 if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1511 return COSTS_N_INSNS (2); \
1512 else \
1513 return COSTS_N_INSNS (4); \
1514 } \
1515 return COSTS_N_INSNS (1); \
1516 } \
1517 else \
1518 return COSTS_N_INSNS (38); \
1519 case AND: case IOR: case XOR: \
1520 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1521 { \
1522 if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1523 return COSTS_N_INSNS (2); \
1524 else \
1525 return COSTS_N_INSNS (4); \
1526 } \
1527 return COSTS_N_INSNS (1); \
1528 case NEG: case NOT: \
1529 return COSTS_N_INSNS (1); \
1530 case ASHIFT: \
1531 case ASHIFTRT: \
1532 case LSHIFTRT: \
1533 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1534 { \
1535 int number = INTVAL(XEXP (X,1)); \
1536 if (number == 1 || number == 4 || number == 8 || \
1537 number == 16) \
1538 return COSTS_N_INSNS (1); \
1539 else \
1540 return COSTS_N_INSNS (2); \
1541 } \
1542 return COSTS_N_INSNS (1);
1544 /* An expression giving the cost of an addressing mode that contains
1545 address. */
1546 #define ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR)
1548 /* A c expression for the cost of moving data from a register in
1549 class FROM to one in class TO. The classes are expressed using
1550 the enumeration values such as GENERAL_REGS. A value of 2 is
1551 the default. */
1552 #define REGISTER_MOVE_COST(FROM,TO) dsp16xx_register_move_cost (FROM, TO)
1554 /* A C expression for the cost of moving data of mode MODE between
1555 a register and memory. A value of 2 is the default. */
1556 #define MEMORY_MOVE_COST(MODE) \
1557 (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \
1558 : 16)
1560 /* A C expression for the cost of a branch instruction. A value of
1561 1 is the default; */
1562 #define BRANCH_COST 2
1563 \f
1565 /* Define this because otherwise gcc will try to put the function address
1566 in any old pseudo register. We can only use pt. */
1567 #define NO_FUNCTION_CSE
1569 /* Define this macro as a C expression which is nonzero if accessing less
1570 than a word of memory (i.e a char or short) is no faster than accessing
1571 a word of memory, i.e if such access require more than one instruction
1572 or if ther is no difference in cost between byte and (aligned) word
1573 loads. */
1574 #define SLOW_BYTE_ACCESS 1
1576 /* Define this macro if zero-extension (of a char or short to an int) can
1577 be done faster if the destination is a register that is know to be zero. */
1578 /* #define SLOW_ZERO_EXTEND */
1580 /* Define this macro if unaligned accesses have a cost many times greater than
1581 aligned accesses, for example if they are emulated in a trap handler */
1582 /* define SLOW_UNALIGNED_ACCESS */
1584 /* Define this macro to inhibit strength reduction of memory addresses */
1585 /* #define DONT_REDUCE_ADDR */
1587 \f
1588 /* DIVIDING THE OUTPUT IN SECTIONS */
1589 /* Output before read-only data. */
1592 #define TEXT_SECTION_ASM_OP rsect_text
1594 /* Output before constants and strings */
1596 #define READONLY_SECTION_ASM_OP rsect_const
1597 #define READONLY_DATA_SECTION const_section
1599 /* Output before writable data. */
1601 #define DATA_SECTION_ASM_OP rsect_data
1604 #define BSS_SECTION_ASM_OP rsect_bss
1606 /* We will default to using 1610 if the user doesn't
1607 specify it. */
1610 /* A list of names for sections other than the standard two, which are
1611 'in_text' and 'in_data'. */
1612 #define EXTRA_SECTIONS in_bss, in_const
1614 #define EXTRA_SECTION_FUNCTIONS \
1615 void \
1616 const_section () \
1617 { \
1618 if (in_section != in_const) \
1619 { \
1621 in_section = in_const; \
1622 } \
1623 } \
1624 void \
1625 bss_section () \
1626 { \
1627 if (in_section != in_bss) { \
1629 in_section = in_bss; \
1630 } \
1631 }
1633 \f
1634 /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
1636 /* Output at beginning of assembler file. */
1637 #define ASM_FILE_START(FILE) dsp16xx_file_start ()
1639 /* Prevent output of .gcc_compiled */
1640 #define ASM_IDENTIFY_GCC(FILE)
1642 /* A C string constant describing how to begin a comment in the target
1643 assembler language. */
1644 /* define ASM_COMMENT_START */
1646 /* Output to assembler file text saying following lines
1647 may contain character constants, extra white space, comments, etc. */
1650 /* Output to assembler file text saying following lines
1651 no longer contain unusual constructs. */
1653 \f
1654 /* OUTPUT OF DATA */
1656 /* This is how to output an assembler line defining a `double' constant. */
1657 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) asm_output_float (FILE,VALUE)
1659 /* This is how to output an assembler line defining a `float' constant. */
1660 #define ASM_OUTPUT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1662 /* This is how to output and assembler line defininf a 'float' constant of
1663 size HFmode. */
1664 #define ASM_OUTPUT_SHORT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1666 /* This is how to output an assembler line defining an `char' constant. */
1667 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1669 output_addr_const (FILE, (VALUE)), \
1672 /* This is how to output an assembler line defining an `short' constant. */
1673 #define ASM_OUTPUT_SHORT(FILE,EXP) asm_output_long(FILE,INTVAL(EXP))
1675 /* This is how to output an assembler line defining a 'int' constant. */
1676 #define ASM_OUTPUT_INT(FILE, EXP) asm_output_long(FILE,INTVAL(EXP))
1678 /* This is how to output an assembler line for a numeric constant byte. */
1679 #define ASM_OUTPUT_BYTE(FILE,VALUE) ASM_OUTPUT_CHAR(FILE,VALUE)
1681 /* This is how we output a 'c' character string. For the 16xx
1682 assembler we have to do it one letter at a time */
1684 #define ASCII_LENGTH 10
1686 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1687 do { \
1688 FILE *_hide_asm_out_file = (MYFILE); \
1689 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1690 int _hide_thissize = (MYLENGTH); \
1691 { \
1692 FILE *asm_out_file = _hide_asm_out_file; \
1693 unsigned char *p = _hide_p; \
1694 int thissize = _hide_thissize; \
1695 int i; \
1696 \
1697 for (i = 0; i < thissize; i++) \
1698 { \
1699 register int c = p[i]; \
1700 \
1701 if (i % ASCII_LENGTH == 0) \
1703 \
1705 { \
1707 putc (c, asm_out_file); \
1709 } \
1710 else \
1711 { \
1713 /* After an octal-escape, if a digit follows, \
1714 terminate one string constant and start another. \
1715 The Vax assembler fails to stop reading the escape \
1716 after three digits, so this is the only way we \
1717 can get it to parse the data properly. \
1718 if (i < thissize - 1 \
1719 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1720 fprintf (asm_out_file, "\'\n\tint \'"); \
1722 } \
1723 /* if: \
1724 we are not at the last char (i != thissize -1) \
1725 and (we are not at a line break multiple \
1726 but i == 0) (it will be the very first time) \
1727 then put out a comma to extend. \
1729 if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \
1731 if (!((i + 1) % ASCII_LENGTH)) \
1733 } \
1735 } \
1736 } \
1737 while (0)
1739 /* Store in OUTPUT a string (made with alloca) containing
1740 an assembler-name for a local static variable or function
1741 named NAME. LABELNO is an integer which is different for
1742 each call. */
1744 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1745 do { \
1746 int len = strlen (NAME); \
1747 char *temp = (char *) alloca (len + 3); \
1749 strcpy (&temp[1], (NAME)); \
1751 temp[len + 2] = 0; \
1752 (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \
1753 ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \
1754 } while (0)
1759 \f
1760 /* OUTPUT OF UNINITIALIZED VARIABLES */
1762 /* This says how to output an assembler line
1763 to define a global common symbol. */
1765 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1766 asm_output_common (FILE, NAME, SIZE, ROUNDED);
1768 /* This says how to output an assembler line
1769 to define a local common symbol. */
1771 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1772 asm_output_local (FILE, NAME, SIZE, ROUNDED);
1773 \f
1774 /* OUTPUT AND GENERATION OF LABELS */
1776 /* This is how to output the definition of a user-level label named NAME,
1777 such as the label on a static function or variable NAME. */
1778 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1781 /* This is how to output a command to make the user-level label named NAME
1782 defined for reference from other files. */
1784 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1787 /* A C statement to output to the stdio stream any text necessary
1788 for declaring the name of an external symbol named name which
1789 is referenced in this compilation but not defined. */
1791 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1792 { \
1794 assemble_name (FILE, NAME); \
1796 }
1797 /* A C statement to output on stream an assembler pseudo-op to
1798 declare a library function named external. */
1800 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1801 { \
1803 assemble_name (FILE, XSTR (FUN, 0)); \
1805 }
1806 /* This is how to output a reference to a user-level label named NAME.
1807 `assemble_name' uses this. */
1808 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1811 /* This is how to output an internal numbered label where
1812 PREFIX is the class of label and NUM is the number within the class. */
1813 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1816 /* This is how to store into the string LABEL
1817 the symbol_ref name of an internal numbered label where
1818 PREFIX is the class of label and NUM is the number within the class.
1819 This is suitable for output with `assemble_name'. */
1820 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1823 \f
1824 /* OUTPUT OF ASSEMBLER INSTRUCTIONS */
1826 /* How to refer to registers in assembler output.
1827 This sequence is indexed by compiler's hard-register-number (see above). */
1829 #define REGISTER_NAMES \
1841 #define HIMODE_REGISTER_NAMES \
1853 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1855 /* Print operand X (an rtx) in assembler syntax to file FILE.
1856 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1857 For `%' followed by punctuation, CODE is the punctuation and X is null.
1859 DSP1610 extensions for operand codes:
1861 %H - print lower 16 bits of constant
1862 %U - print upper 16 bits of constant
1863 %w - print low half of register (e.g 'a0l')
1864 %u - print upper half of register (e.g 'a0')
1865 %b - print high half of accumulator for F3 ALU instructions
1866 %h - print constant in decimal */
1868 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1871 /* Print a memory address as an operand to reference that memory location. */
1873 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1875 /* This is how to output an insn to push a register on the stack.
1876 It need not be very fast code since it is used only for profiling */
1879 /* This is how to output an insn to pop a register from the stack.
1880 It need not be very fast code since it is used only for profiling */
1882 \f
1883 /* OUTPUT OF DISPATCH TABLES */
1885 /* This macro should be provided on machines where the addresses in a dispatch
1886 table are relative to the table's own address. */
1887 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1890 /* This macro should be provided on machines where the addresses in a dispatch
1891 table are absolute. */
1892 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1895 /* ASSEMBLER COMMANDS FOR ALIGNMENT */
1897 /* This is how to output an assembler line that says to advance
1898 the location counter to a multiple of 2**LOG bytes. We should
1899 not have to do any alignemnt since the 1610 is a word machine. */
1900 #define ASM_OUTPUT_ALIGN(FILE,LOG)
1902 /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
1903 because it fails to put zero1 in the bytes that are skipped. */
1904 #define ASM_NO_SKIP_IN_TEXT 1
1906 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1909 /* CONTROLLING DEBUGGING INFORMATION FORMAT */
1911 /* Define this macro if GCC should produce COFF-style debugging output
1912 for SDB in response to the '-g' option */
1913 #define SDB_DEBUGGING_INFO
1915 /* Support generating stabs for the listing file generator */
1916 #define DBX_DEBUGGING_INFO
1918 /* The default format when -g is given is still COFF debug info */
1919 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1921 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1922 \f
1923 /* MISCELLANEOUS PARAMETERS */
1925 /* Specify the machine mode that this machine uses
1926 for the index in the tablejump instruction. */
1927 #define CASE_VECTOR_MODE QImode
1929 /* Define this if the tablejump instruction expects the table
1930 to contain offsets from the address of the table.
1931 Do not define this if the table should contain absolute addresses. */
1932 /* #define CASE_VECTOR_PC_RELATIVE */
1934 /* Specify the tree operation to be used to convert reals to integers. */
1935 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1937 /* This is the kind of divide that is easiest to do in the general case. */
1938 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1940 /* Max number of bytes we can move from memory to memory
1941 in one reasonably fast instruction. */
1942 #define MOVE_MAX 1
1944 /* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
1945 or bitwise 'and' instruction that truncates the count of a shift operation
1946 to a width equal to the number of bits needed to represent the size of the
1947 object being shifted. Do not define this macro unless the trucation applies
1948 to both shoft operations and bit-field operations (if any). */
1949 /* #define SHIFT_COUNT_TRUNCATED */
1951 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1952 is done just by pretending it is already truncated. */
1953 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1955 /* When a prototype says `char' or `short', really pass an `int'. */
1956 #define PROMOTE_PROTOTYPES
1958 /* An alias for the machine mode used for pointers */
1959 #define Pmode QImode
1961 /* A function address in a call instruction
1962 is a byte address (for indexing purposes)
1963 so give the MEM rtx a byte's mode. */
1964 #define FUNCTION_MODE QImode
1966 #if !defined(__DATE__)
1968 #else
1970 #endif
1975 /* Define this as 1 if `char' should by default be signed; else as 0. */
1976 #define DEFAULT_SIGNED_CHAR 1
1978 /* If this macro is defined, GNU CC gathers statistics about the number and
1979 kind of tree node it allocates during each run. The option '-fstats' will
1980 tell the compiler to print these statistics about the sizes of it obstacks. */
1981 #define GATHER_STATISTICS
1983 /* Define this so gcc does not output a call to __main, since we
1984 are not currently supporting c++. */
1985 #define INIT_SECTION_ASM_OP 1