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[official-gcc.git] / gcc / reginfo.c
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1 /* Compute different info about registers.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* This file contains regscan pass of the compiler and passes for
22 dealing with info about modes of pseudo-registers inside
23 subregisters. It also defines some tables of information about the
24 hardware registers, function init_reg_sets to initialize the
25 tables, and other auxiliary functions to deal with info about
26 registers and their classes. */
28 #include "config.h"
29 #include "system.h"
30 #include "coretypes.h"
31 #include "tm.h"
32 #include "hard-reg-set.h"
33 #include "rtl.h"
34 #include "expr.h"
35 #include "tm_p.h"
36 #include "flags.h"
37 #include "basic-block.h"
38 #include "regs.h"
39 #include "addresses.h"
40 #include "function.h"
41 #include "insn-config.h"
42 #include "recog.h"
43 #include "reload.h"
44 #include "diagnostic-core.h"
45 #include "output.h"
46 #include "hashtab.h"
47 #include "target.h"
48 #include "tree-pass.h"
49 #include "df.h"
50 #include "ira.h"
52 /* Maximum register number used in this function, plus one. */
54 int max_regno;
57 struct target_hard_regs default_target_hard_regs;
58 struct target_regs default_target_regs;
59 #if SWITCHABLE_TARGET
60 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
61 struct target_regs *this_target_regs = &default_target_regs;
62 #endif
64 /* Data for initializing fixed_regs. */
65 static const char initial_fixed_regs[] = FIXED_REGISTERS;
67 /* Data for initializing call_used_regs. */
68 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
70 #ifdef CALL_REALLY_USED_REGISTERS
71 /* Data for initializing call_really_used_regs. */
72 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
73 #endif
75 #ifdef CALL_REALLY_USED_REGISTERS
76 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
77 #else
78 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
79 #endif
81 /* Indexed by hard register number, contains 1 for registers
82 that are being used for global register decls.
83 These must be exempt from ordinary flow analysis
84 and are also considered fixed. */
85 char global_regs[FIRST_PSEUDO_REGISTER];
87 /* Declaration for the global register. */
88 tree global_regs_decl[FIRST_PSEUDO_REGISTER];
90 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
91 in dataflow more conveniently. */
92 regset regs_invalidated_by_call_regset;
94 /* Same information as FIXED_REG_SET but in regset form. */
95 regset fixed_reg_set_regset;
97 /* The bitmap_obstack is used to hold some static variables that
98 should not be reset after each function is compiled. */
99 static bitmap_obstack persistent_obstack;
101 /* Used to initialize reg_alloc_order. */
102 #ifdef REG_ALLOC_ORDER
103 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
104 #endif
106 /* The same information, but as an array of unsigned ints. We copy from
107 these unsigned ints to the table above. We do this so the tm.h files
108 do not have to be aware of the wordsize for machines with <= 64 regs.
109 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
110 #define N_REG_INTS \
111 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
113 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
114 = REG_CLASS_CONTENTS;
116 /* Array containing all of the register names. */
117 static const char *const initial_reg_names[] = REGISTER_NAMES;
119 /* Array containing all of the register class names. */
120 const char * reg_class_names[] = REG_CLASS_NAMES;
122 /* No more global register variables may be declared; true once
123 reginfo has been initialized. */
124 static int no_global_reg_vars = 0;
126 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
127 correspond to the hard registers, if any, set in that map. This
128 could be done far more efficiently by having all sorts of special-cases
129 with moving single words, but probably isn't worth the trouble. */
130 void
131 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
133 unsigned i;
134 bitmap_iterator bi;
136 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
138 if (i >= FIRST_PSEUDO_REGISTER)
139 return;
140 SET_HARD_REG_BIT (*to, i);
144 /* Function called only once per target_globals to initialize the
145 target_hard_regs structure. Once this is done, various switches
146 may override. */
147 void
148 init_reg_sets (void)
150 int i, j;
152 /* First copy the register information from the initial int form into
153 the regsets. */
155 for (i = 0; i < N_REG_CLASSES; i++)
157 CLEAR_HARD_REG_SET (reg_class_contents[i]);
159 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
160 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
161 if (int_reg_class_contents[i][j / 32]
162 & ((unsigned) 1 << (j % 32)))
163 SET_HARD_REG_BIT (reg_class_contents[i], j);
166 /* Sanity check: make sure the target macros FIXED_REGISTERS and
167 CALL_USED_REGISTERS had the right number of initializers. */
168 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
169 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
170 #ifdef CALL_REALLY_USED_REGISTERS
171 gcc_assert (sizeof call_really_used_regs
172 == sizeof initial_call_really_used_regs);
173 #endif
174 #ifdef REG_ALLOC_ORDER
175 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
176 #endif
177 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
179 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
180 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
181 #ifdef CALL_REALLY_USED_REGISTERS
182 memcpy (call_really_used_regs, initial_call_really_used_regs,
183 sizeof call_really_used_regs);
184 #endif
185 #ifdef REG_ALLOC_ORDER
186 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
187 #endif
188 memcpy (reg_names, initial_reg_names, sizeof reg_names);
190 SET_HARD_REG_SET (accessible_reg_set);
191 SET_HARD_REG_SET (operand_reg_set);
194 /* We need to save copies of some of the register information which
195 can be munged by command-line switches so we can restore it during
196 subsequent back-end reinitialization. */
197 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
198 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
199 #ifdef CALL_REALLY_USED_REGISTERS
200 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
201 #endif
202 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
203 static HARD_REG_SET saved_accessible_reg_set;
204 static HARD_REG_SET saved_operand_reg_set;
206 /* Save the register information. */
207 void
208 save_register_info (void)
210 /* Sanity check: make sure the target macros FIXED_REGISTERS and
211 CALL_USED_REGISTERS had the right number of initializers. */
212 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
213 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
214 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
215 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
217 /* Likewise for call_really_used_regs. */
218 #ifdef CALL_REALLY_USED_REGISTERS
219 gcc_assert (sizeof call_really_used_regs
220 == sizeof saved_call_really_used_regs);
221 memcpy (saved_call_really_used_regs, call_really_used_regs,
222 sizeof call_really_used_regs);
223 #endif
225 /* And similarly for reg_names. */
226 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
227 memcpy (saved_reg_names, reg_names, sizeof reg_names);
228 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
229 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
232 /* Restore the register information. */
233 static void
234 restore_register_info (void)
236 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
237 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
239 #ifdef CALL_REALLY_USED_REGISTERS
240 memcpy (call_really_used_regs, saved_call_really_used_regs,
241 sizeof call_really_used_regs);
242 #endif
244 memcpy (reg_names, saved_reg_names, sizeof reg_names);
245 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
246 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
249 /* After switches have been processed, which perhaps alter
250 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
251 static void
252 init_reg_sets_1 (void)
254 unsigned int i, j;
255 unsigned int /* enum machine_mode */ m;
257 restore_register_info ();
259 #ifdef REG_ALLOC_ORDER
260 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
261 inv_reg_alloc_order[reg_alloc_order[i]] = i;
262 #endif
264 /* Let the target tweak things if necessary. */
266 targetm.conditional_register_usage ();
268 /* Compute number of hard regs in each class. */
270 memset (reg_class_size, 0, sizeof reg_class_size);
271 for (i = 0; i < N_REG_CLASSES; i++)
273 bool any_nonfixed = false;
274 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
275 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
277 reg_class_size[i]++;
278 if (!fixed_regs[j])
279 any_nonfixed = true;
281 class_only_fixed_regs[i] = !any_nonfixed;
284 /* Initialize the table of subunions.
285 reg_class_subunion[I][J] gets the largest-numbered reg-class
286 that is contained in the union of classes I and J. */
288 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
289 for (i = 0; i < N_REG_CLASSES; i++)
291 for (j = 0; j < N_REG_CLASSES; j++)
293 HARD_REG_SET c;
294 int k;
296 COPY_HARD_REG_SET (c, reg_class_contents[i]);
297 IOR_HARD_REG_SET (c, reg_class_contents[j]);
298 for (k = 0; k < N_REG_CLASSES; k++)
299 if (hard_reg_set_subset_p (reg_class_contents[k], c)
300 && !hard_reg_set_subset_p (reg_class_contents[k],
301 reg_class_contents
302 [(int) reg_class_subunion[i][j]]))
303 reg_class_subunion[i][j] = (enum reg_class) k;
307 /* Initialize the table of superunions.
308 reg_class_superunion[I][J] gets the smallest-numbered reg-class
309 containing the union of classes I and J. */
311 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
312 for (i = 0; i < N_REG_CLASSES; i++)
314 for (j = 0; j < N_REG_CLASSES; j++)
316 HARD_REG_SET c;
317 int k;
319 COPY_HARD_REG_SET (c, reg_class_contents[i]);
320 IOR_HARD_REG_SET (c, reg_class_contents[j]);
321 for (k = 0; k < N_REG_CLASSES; k++)
322 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
323 break;
325 reg_class_superunion[i][j] = (enum reg_class) k;
329 /* Initialize the tables of subclasses and superclasses of each reg class.
330 First clear the whole table, then add the elements as they are found. */
332 for (i = 0; i < N_REG_CLASSES; i++)
334 for (j = 0; j < N_REG_CLASSES; j++)
335 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
338 for (i = 0; i < N_REG_CLASSES; i++)
340 if (i == (int) NO_REGS)
341 continue;
343 for (j = i + 1; j < N_REG_CLASSES; j++)
344 if (hard_reg_set_subset_p (reg_class_contents[i],
345 reg_class_contents[j]))
347 /* Reg class I is a subclass of J.
348 Add J to the table of superclasses of I. */
349 enum reg_class *p;
351 /* Add I to the table of superclasses of J. */
352 p = &reg_class_subclasses[j][0];
353 while (*p != LIM_REG_CLASSES) p++;
354 *p = (enum reg_class) i;
358 /* Initialize "constant" tables. */
360 CLEAR_HARD_REG_SET (fixed_reg_set);
361 CLEAR_HARD_REG_SET (call_used_reg_set);
362 CLEAR_HARD_REG_SET (call_fixed_reg_set);
363 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
364 if (!regs_invalidated_by_call_regset)
366 bitmap_obstack_initialize (&persistent_obstack);
367 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
369 else
370 CLEAR_REG_SET (regs_invalidated_by_call_regset);
371 if (!fixed_reg_set_regset)
372 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
373 else
374 CLEAR_REG_SET (fixed_reg_set_regset);
376 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
377 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
379 /* As a special exception, registers whose class is NO_REGS are
380 not accepted by `register_operand'. The reason for this change
381 is to allow the representation of special architecture artifacts
382 (such as a condition code register) without extending the rtl
383 definitions. Since registers of class NO_REGS cannot be used
384 as registers in any case where register classes are examined,
385 it is better to apply this exception in a target-independent way. */
386 if (REGNO_REG_CLASS (i) == NO_REGS)
387 CLEAR_HARD_REG_BIT (operand_reg_set, i);
389 /* If a register is too limited to be treated as a register operand,
390 then it should never be allocated to a pseudo. */
391 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
393 fixed_regs[i] = 1;
394 call_used_regs[i] = 1;
397 /* call_used_regs must include fixed_regs. */
398 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
399 #ifdef CALL_REALLY_USED_REGISTERS
400 /* call_used_regs must include call_really_used_regs. */
401 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
402 #endif
404 if (fixed_regs[i])
406 SET_HARD_REG_BIT (fixed_reg_set, i);
407 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
410 if (call_used_regs[i])
411 SET_HARD_REG_BIT (call_used_reg_set, i);
413 /* There are a couple of fixed registers that we know are safe to
414 exclude from being clobbered by calls:
416 The frame pointer is always preserved across calls. The arg
417 pointer is if it is fixed. The stack pointer usually is,
418 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
419 CLOBBER will be present. If we are generating PIC code, the
420 PIC offset table register is preserved across calls, though the
421 target can override that. */
423 if (i == STACK_POINTER_REGNUM)
425 else if (global_regs[i])
427 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
428 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
430 else if (i == FRAME_POINTER_REGNUM)
432 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
433 else if (i == HARD_FRAME_POINTER_REGNUM)
435 #endif
436 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
437 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
439 #endif
440 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
441 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
443 else if (CALL_REALLY_USED_REGNO_P (i))
445 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
446 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
450 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
452 /* Preserve global registers if called more than once. */
453 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
455 if (global_regs[i])
457 fixed_regs[i] = call_used_regs[i] = 1;
458 SET_HARD_REG_BIT (fixed_reg_set, i);
459 SET_HARD_REG_BIT (call_used_reg_set, i);
460 SET_HARD_REG_BIT (call_fixed_reg_set, i);
464 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
465 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
466 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
468 HARD_REG_SET ok_regs;
469 CLEAR_HARD_REG_SET (ok_regs);
470 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
471 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
472 SET_HARD_REG_BIT (ok_regs, j);
474 for (i = 0; i < N_REG_CLASSES; i++)
475 if ((targetm.class_max_nregs ((reg_class_t) i, (enum machine_mode) m)
476 <= reg_class_size[i])
477 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
479 contains_reg_of_mode [i][m] = 1;
480 have_regs_of_mode [m] = 1;
485 /* Compute the table of register modes.
486 These values are used to record death information for individual registers
487 (as opposed to a multi-register mode).
488 This function might be invoked more than once, if the target has support
489 for changing register usage conventions on a per-function basis.
491 void
492 init_reg_modes_target (void)
494 int i, j;
496 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
497 for (j = 0; j < MAX_MACHINE_MODE; j++)
498 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
500 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
502 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
504 /* If we couldn't find a valid mode, just use the previous mode
505 if it is suitable, otherwise fall back on word_mode. */
506 if (reg_raw_mode[i] == VOIDmode)
508 if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1)
509 reg_raw_mode[i] = reg_raw_mode[i - 1];
510 else
511 reg_raw_mode[i] = word_mode;
516 /* Finish initializing the register sets and initialize the register modes.
517 This function might be invoked more than once, if the target has support
518 for changing register usage conventions on a per-function basis.
520 void
521 init_regs (void)
523 /* This finishes what was started by init_reg_sets, but couldn't be done
524 until after register usage was specified. */
525 init_reg_sets_1 ();
528 /* The same as previous function plus initializing IRA. */
529 void
530 reinit_regs (void)
532 init_regs ();
533 /* caller_save needs to be re-initialized. */
534 caller_save_initialized_p = false;
535 ira_init ();
538 /* Initialize some fake stack-frame MEM references for use in
539 memory_move_secondary_cost. */
540 void
541 init_fake_stack_mems (void)
543 int i;
545 for (i = 0; i < MAX_MACHINE_MODE; i++)
546 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
550 /* Compute cost of moving data from a register of class FROM to one of
551 TO, using MODE. */
554 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
556 return targetm.register_move_cost (mode, from, to);
559 /* Compute cost of moving registers to/from memory. */
562 memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
564 return targetm.memory_move_cost (mode, rclass, in);
567 /* Compute extra cost of moving registers to/from memory due to reloads.
568 Only needed if secondary reloads are required for memory moves. */
570 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
571 bool in)
573 reg_class_t altclass;
574 int partial_cost = 0;
575 /* We need a memory reference to feed to SECONDARY... macros. */
576 /* mem may be unused even if the SECONDARY_ macros are defined. */
577 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
579 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
581 if (altclass == NO_REGS)
582 return 0;
584 if (in)
585 partial_cost = register_move_cost (mode, altclass, rclass);
586 else
587 partial_cost = register_move_cost (mode, rclass, altclass);
589 if (rclass == altclass)
590 /* This isn't simply a copy-to-temporary situation. Can't guess
591 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
592 calling here in that case.
594 I'm tempted to put in an assert here, but returning this will
595 probably only give poor estimates, which is what we would've
596 had before this code anyways. */
597 return partial_cost;
599 /* Check if the secondary reload register will also need a
600 secondary reload. */
601 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
604 /* Return a machine mode that is legitimate for hard reg REGNO and large
605 enough to save nregs. If we can't find one, return VOIDmode.
606 If CALL_SAVED is true, only consider modes that are call saved. */
607 enum machine_mode
608 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
609 unsigned int nregs, bool call_saved)
611 unsigned int /* enum machine_mode */ m;
612 enum machine_mode found_mode = VOIDmode, mode;
614 /* We first look for the largest integer mode that can be validly
615 held in REGNO. If none, we look for the largest floating-point mode.
616 If we still didn't find a valid mode, try CCmode. */
618 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
619 mode != VOIDmode;
620 mode = GET_MODE_WIDER_MODE (mode))
621 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
622 && HARD_REGNO_MODE_OK (regno, mode)
623 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
624 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
625 found_mode = mode;
627 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
628 mode != VOIDmode;
629 mode = GET_MODE_WIDER_MODE (mode))
630 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
631 && HARD_REGNO_MODE_OK (regno, mode)
632 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
633 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
634 found_mode = mode;
636 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
637 mode != VOIDmode;
638 mode = GET_MODE_WIDER_MODE (mode))
639 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
640 && HARD_REGNO_MODE_OK (regno, mode)
641 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
642 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
643 found_mode = mode;
645 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
646 mode != VOIDmode;
647 mode = GET_MODE_WIDER_MODE (mode))
648 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
649 && HARD_REGNO_MODE_OK (regno, mode)
650 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
651 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
652 found_mode = mode;
654 if (found_mode != VOIDmode)
655 return found_mode;
657 /* Iterate over all of the CCmodes. */
658 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
660 mode = (enum machine_mode) m;
661 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
662 && HARD_REGNO_MODE_OK (regno, mode)
663 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
664 return mode;
667 /* We can't find a mode valid for this register. */
668 return VOIDmode;
671 /* Specify the usage characteristics of the register named NAME.
672 It should be a fixed register if FIXED and a
673 call-used register if CALL_USED. */
674 void
675 fix_register (const char *name, int fixed, int call_used)
677 int i;
678 int reg, nregs;
680 /* Decode the name and update the primary form of
681 the register info. */
683 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
685 gcc_assert (nregs >= 1);
686 for (i = reg; i < reg + nregs; i++)
688 if ((i == STACK_POINTER_REGNUM
689 #ifdef HARD_FRAME_POINTER_REGNUM
690 || i == HARD_FRAME_POINTER_REGNUM
691 #else
692 || i == FRAME_POINTER_REGNUM
693 #endif
695 && (fixed == 0 || call_used == 0))
697 switch (fixed)
699 case 0:
700 switch (call_used)
702 case 0:
703 error ("can%'t use %qs as a call-saved register", name);
704 break;
706 case 1:
707 error ("can%'t use %qs as a call-used register", name);
708 break;
710 default:
711 gcc_unreachable ();
713 break;
715 case 1:
716 switch (call_used)
718 case 1:
719 error ("can%'t use %qs as a fixed register", name);
720 break;
722 case 0:
723 default:
724 gcc_unreachable ();
726 break;
728 default:
729 gcc_unreachable ();
732 else
734 fixed_regs[i] = fixed;
735 call_used_regs[i] = call_used;
736 #ifdef CALL_REALLY_USED_REGISTERS
737 if (fixed == 0)
738 call_really_used_regs[i] = call_used;
739 #endif
743 else
745 warning (0, "unknown register name: %s", name);
749 /* Mark register number I as global. */
750 void
751 globalize_reg (tree decl, int i)
753 location_t loc = DECL_SOURCE_LOCATION (decl);
755 #ifdef STACK_REGS
756 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
758 error ("stack register used for global register variable");
759 return;
761 #endif
763 if (fixed_regs[i] == 0 && no_global_reg_vars)
764 error_at (loc, "global register variable follows a function definition");
766 if (global_regs[i])
768 warning_at (loc, 0,
769 "register of %qD used for multiple global register variables",
770 decl);
771 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
772 "conflicts with %qD", global_regs_decl[i]);
773 return;
776 if (call_used_regs[i] && ! fixed_regs[i])
777 warning_at (loc, 0, "call-clobbered register used for global register variable");
779 global_regs[i] = 1;
780 global_regs_decl[i] = decl;
782 /* If we're globalizing the frame pointer, we need to set the
783 appropriate regs_invalidated_by_call bit, even if it's already
784 set in fixed_regs. */
785 if (i != STACK_POINTER_REGNUM)
787 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
788 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
791 /* If already fixed, nothing else to do. */
792 if (fixed_regs[i])
793 return;
795 fixed_regs[i] = call_used_regs[i] = 1;
796 #ifdef CALL_REALLY_USED_REGISTERS
797 call_really_used_regs[i] = 1;
798 #endif
800 SET_HARD_REG_BIT (fixed_reg_set, i);
801 SET_HARD_REG_BIT (call_used_reg_set, i);
802 SET_HARD_REG_BIT (call_fixed_reg_set, i);
804 reinit_regs ();
808 /* Structure used to record preferences of given pseudo. */
809 struct reg_pref
811 /* (enum reg_class) prefclass is the preferred class. May be
812 NO_REGS if no class is better than memory. */
813 char prefclass;
815 /* altclass is a register class that we should use for allocating
816 pseudo if no register in the preferred class is available.
817 If no register in this class is available, memory is preferred.
819 It might appear to be more general to have a bitmask of classes here,
820 but since it is recommended that there be a class corresponding to the
821 union of most major pair of classes, that generality is not required. */
822 char altclass;
824 /* allocnoclass is a register class that IRA uses for allocating
825 the pseudo. */
826 char allocnoclass;
829 /* Record preferences of each pseudo. This is available after RA is
830 run. */
831 static struct reg_pref *reg_pref;
833 /* Current size of reg_info. */
834 static int reg_info_size;
835 /* Max_reg_num still last resize_reg_info call. */
836 static int max_regno_since_last_resize;
838 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
839 This function is sometimes called before the info has been computed.
840 When that happens, just return GENERAL_REGS, which is innocuous. */
841 enum reg_class
842 reg_preferred_class (int regno)
844 if (reg_pref == 0)
845 return GENERAL_REGS;
847 gcc_assert (regno < reg_info_size);
848 return (enum reg_class) reg_pref[regno].prefclass;
851 enum reg_class
852 reg_alternate_class (int regno)
854 if (reg_pref == 0)
855 return ALL_REGS;
857 gcc_assert (regno < reg_info_size);
858 return (enum reg_class) reg_pref[regno].altclass;
861 /* Return the reg_class which is used by IRA for its allocation. */
862 enum reg_class
863 reg_allocno_class (int regno)
865 if (reg_pref == 0)
866 return NO_REGS;
868 gcc_assert (regno < reg_info_size);
869 return (enum reg_class) reg_pref[regno].allocnoclass;
874 /* Allocate space for reg info and initilize it. */
875 static void
876 allocate_reg_info (void)
878 int i;
880 max_regno_since_last_resize = max_reg_num ();
881 reg_info_size = max_regno_since_last_resize * 3 / 2 + 1;
882 gcc_assert (! reg_pref && ! reg_renumber);
883 reg_renumber = XNEWVEC (short, reg_info_size);
884 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
885 memset (reg_renumber, -1, reg_info_size * sizeof (short));
886 for (i = 0; i < reg_info_size; i++)
888 reg_pref[i].prefclass = GENERAL_REGS;
889 reg_pref[i].altclass = ALL_REGS;
890 reg_pref[i].allocnoclass = GENERAL_REGS;
895 /* Resize reg info. The new elements will be initialized. Return TRUE
896 if new pseudos were added since the last call. */
897 bool
898 resize_reg_info (void)
900 int old, i;
901 bool change_p;
903 if (reg_pref == NULL)
905 allocate_reg_info ();
906 return true;
908 change_p = max_regno_since_last_resize != max_reg_num ();
909 max_regno_since_last_resize = max_reg_num ();
910 if (reg_info_size >= max_reg_num ())
911 return change_p;
912 old = reg_info_size;
913 reg_info_size = max_reg_num () * 3 / 2 + 1;
914 gcc_assert (reg_pref && reg_renumber);
915 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
916 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
917 memset (reg_pref + old, -1,
918 (reg_info_size - old) * sizeof (struct reg_pref));
919 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
920 for (i = old; i < reg_info_size; i++)
922 reg_pref[i].prefclass = GENERAL_REGS;
923 reg_pref[i].altclass = ALL_REGS;
924 reg_pref[i].allocnoclass = GENERAL_REGS;
926 return true;
930 /* Free up the space allocated by allocate_reg_info. */
931 void
932 free_reg_info (void)
934 if (reg_pref)
936 free (reg_pref);
937 reg_pref = NULL;
940 if (reg_renumber)
942 free (reg_renumber);
943 reg_renumber = NULL;
947 /* Initialize some global data for this pass. */
948 static unsigned int
949 reginfo_init (void)
951 if (df)
952 df_compute_regs_ever_live (true);
954 /* This prevents dump_reg_info from losing if called
955 before reginfo is run. */
956 reg_pref = NULL;
957 reg_info_size = max_regno_since_last_resize = 0;
958 /* No more global register variables may be declared. */
959 no_global_reg_vars = 1;
960 return 1;
963 struct rtl_opt_pass pass_reginfo_init =
966 RTL_PASS,
967 "reginfo", /* name */
968 OPTGROUP_NONE, /* optinfo_flags */
969 NULL, /* gate */
970 reginfo_init, /* execute */
971 NULL, /* sub */
972 NULL, /* next */
973 0, /* static_pass_number */
974 TV_NONE, /* tv_id */
975 0, /* properties_required */
976 0, /* properties_provided */
977 0, /* properties_destroyed */
978 0, /* todo_flags_start */
979 0 /* todo_flags_finish */
985 /* Set up preferred, alternate, and allocno classes for REGNO as
986 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
987 void
988 setup_reg_classes (int regno,
989 enum reg_class prefclass, enum reg_class altclass,
990 enum reg_class allocnoclass)
992 if (reg_pref == NULL)
993 return;
994 gcc_assert (reg_info_size >= max_reg_num ());
995 reg_pref[regno].prefclass = prefclass;
996 reg_pref[regno].altclass = altclass;
997 reg_pref[regno].allocnoclass = allocnoclass;
1001 /* This is the `regscan' pass of the compiler, run just before cse and
1002 again just before loop. It finds the first and last use of each
1003 pseudo-register. */
1005 static void reg_scan_mark_refs (rtx, rtx);
1007 void
1008 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1010 rtx insn;
1012 timevar_push (TV_REG_SCAN);
1014 for (insn = f; insn; insn = NEXT_INSN (insn))
1015 if (INSN_P (insn))
1017 reg_scan_mark_refs (PATTERN (insn), insn);
1018 if (REG_NOTES (insn))
1019 reg_scan_mark_refs (REG_NOTES (insn), insn);
1022 timevar_pop (TV_REG_SCAN);
1026 /* X is the expression to scan. INSN is the insn it appears in.
1027 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1028 We should only record information for REGs with numbers
1029 greater than or equal to MIN_REGNO. */
1030 static void
1031 reg_scan_mark_refs (rtx x, rtx insn)
1033 enum rtx_code code;
1034 rtx dest;
1035 rtx note;
1037 if (!x)
1038 return;
1039 code = GET_CODE (x);
1040 switch (code)
1042 case CONST:
1043 CASE_CONST_ANY:
1044 case CC0:
1045 case PC:
1046 case SYMBOL_REF:
1047 case LABEL_REF:
1048 case ADDR_VEC:
1049 case ADDR_DIFF_VEC:
1050 case REG:
1051 return;
1053 case EXPR_LIST:
1054 if (XEXP (x, 0))
1055 reg_scan_mark_refs (XEXP (x, 0), insn);
1056 if (XEXP (x, 1))
1057 reg_scan_mark_refs (XEXP (x, 1), insn);
1058 break;
1060 case INSN_LIST:
1061 if (XEXP (x, 1))
1062 reg_scan_mark_refs (XEXP (x, 1), insn);
1063 break;
1065 case CLOBBER:
1066 if (MEM_P (XEXP (x, 0)))
1067 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1068 break;
1070 case SET:
1071 /* Count a set of the destination if it is a register. */
1072 for (dest = SET_DEST (x);
1073 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1074 || GET_CODE (dest) == ZERO_EXTEND;
1075 dest = XEXP (dest, 0))
1078 /* If this is setting a pseudo from another pseudo or the sum of a
1079 pseudo and a constant integer and the other pseudo is known to be
1080 a pointer, set the destination to be a pointer as well.
1082 Likewise if it is setting the destination from an address or from a
1083 value equivalent to an address or to the sum of an address and
1084 something else.
1086 But don't do any of this if the pseudo corresponds to a user
1087 variable since it should have already been set as a pointer based
1088 on the type. */
1090 if (REG_P (SET_DEST (x))
1091 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1092 /* If the destination pseudo is set more than once, then other
1093 sets might not be to a pointer value (consider access to a
1094 union in two threads of control in the presence of global
1095 optimizations). So only set REG_POINTER on the destination
1096 pseudo if this is the only set of that pseudo. */
1097 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1098 && ! REG_USERVAR_P (SET_DEST (x))
1099 && ! REG_POINTER (SET_DEST (x))
1100 && ((REG_P (SET_SRC (x))
1101 && REG_POINTER (SET_SRC (x)))
1102 || ((GET_CODE (SET_SRC (x)) == PLUS
1103 || GET_CODE (SET_SRC (x)) == LO_SUM)
1104 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1105 && REG_P (XEXP (SET_SRC (x), 0))
1106 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1107 || GET_CODE (SET_SRC (x)) == CONST
1108 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1109 || GET_CODE (SET_SRC (x)) == LABEL_REF
1110 || (GET_CODE (SET_SRC (x)) == HIGH
1111 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1112 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1113 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1114 || ((GET_CODE (SET_SRC (x)) == PLUS
1115 || GET_CODE (SET_SRC (x)) == LO_SUM)
1116 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1117 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1118 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1119 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1120 && (GET_CODE (XEXP (note, 0)) == CONST
1121 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1122 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1123 REG_POINTER (SET_DEST (x)) = 1;
1125 /* If this is setting a register from a register or from a simple
1126 conversion of a register, propagate REG_EXPR. */
1127 if (REG_P (dest) && !REG_ATTRS (dest))
1128 set_reg_attrs_from_value (dest, SET_SRC (x));
1130 /* ... fall through ... */
1132 default:
1134 const char *fmt = GET_RTX_FORMAT (code);
1135 int i;
1136 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1138 if (fmt[i] == 'e')
1139 reg_scan_mark_refs (XEXP (x, i), insn);
1140 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1142 int j;
1143 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1144 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1152 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1153 is also in C2. */
1155 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1157 return (c1 == c2
1158 || c2 == ALL_REGS
1159 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1160 reg_class_contents[(int) c2]));
1163 /* Return nonzero if there is a register that is in both C1 and C2. */
1165 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1167 return (c1 == c2
1168 || c1 == ALL_REGS
1169 || c2 == ALL_REGS
1170 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1171 reg_class_contents[(int) c2]));
1176 /* Passes for keeping and updating info about modes of registers
1177 inside subregisters. */
1179 #ifdef CANNOT_CHANGE_MODE_CLASS
1181 static bitmap invalid_mode_changes;
1183 static void
1184 record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode)
1186 enum machine_mode mode;
1187 unsigned int regno;
1189 if (!REG_P (SUBREG_REG (subreg)))
1190 return;
1192 regno = REGNO (SUBREG_REG (subreg));
1193 mode = GET_MODE (subreg);
1195 if (regno < FIRST_PSEUDO_REGISTER)
1196 return;
1198 if (bitmap_set_bit (subregs_of_mode,
1199 regno * NUM_MACHINE_MODES + (unsigned int) mode))
1201 unsigned int rclass;
1202 for (rclass = 0; rclass < N_REG_CLASSES; rclass++)
1203 if (!bitmap_bit_p (invalid_mode_changes,
1204 regno * N_REG_CLASSES + rclass)
1205 && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno),
1206 mode, (enum reg_class) rclass))
1207 bitmap_set_bit (invalid_mode_changes,
1208 regno * N_REG_CLASSES + rclass);
1212 /* Call record_subregs_of_mode for all the subregs in X. */
1213 static void
1214 find_subregs_of_mode (rtx x, bitmap subregs_of_mode)
1216 enum rtx_code code = GET_CODE (x);
1217 const char * const fmt = GET_RTX_FORMAT (code);
1218 int i;
1220 if (code == SUBREG)
1221 record_subregs_of_mode (x, subregs_of_mode);
1223 /* Time for some deep diving. */
1224 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1226 if (fmt[i] == 'e')
1227 find_subregs_of_mode (XEXP (x, i), subregs_of_mode);
1228 else if (fmt[i] == 'E')
1230 int j;
1231 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1232 find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode);
1237 void
1238 init_subregs_of_mode (void)
1240 basic_block bb;
1241 rtx insn;
1242 bitmap_obstack srom_obstack;
1243 bitmap subregs_of_mode;
1245 gcc_assert (invalid_mode_changes == NULL);
1246 invalid_mode_changes = BITMAP_ALLOC (NULL);
1247 bitmap_obstack_initialize (&srom_obstack);
1248 subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1250 FOR_EACH_BB (bb)
1251 FOR_BB_INSNS (bb, insn)
1252 if (NONDEBUG_INSN_P (insn))
1253 find_subregs_of_mode (PATTERN (insn), subregs_of_mode);
1255 BITMAP_FREE (subregs_of_mode);
1256 bitmap_obstack_release (&srom_obstack);
1259 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1260 mode. */
1261 bool
1262 invalid_mode_change_p (unsigned int regno,
1263 enum reg_class rclass)
1265 return bitmap_bit_p (invalid_mode_changes,
1266 regno * N_REG_CLASSES + (unsigned) rclass);
1269 void
1270 finish_subregs_of_mode (void)
1272 BITMAP_FREE (invalid_mode_changes);
1274 #else
1275 void
1276 init_subregs_of_mode (void)
1279 void
1280 finish_subregs_of_mode (void)
1284 #endif /* CANNOT_CHANGE_MODE_CLASS */