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* config/alpha/alpha.md, config/arm/arm.c, config/arm/arm.h,
[official-gcc.git] / gcc / config / s390 / s390.h
blobc4fd6fb7f2bbf0616d5f72f3e5ebe311e9fb1306
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #ifndef _S390_H
23 #define _S390_H
24
25 #define TARGET_VERSION fprintf (stderr, " (S/390)");
26
27 extern int flag_pic;
28
29 /* Run-time compilation parameters selecting different hardware subsets. */
30
31 extern int target_flags;
32
33 /* Target macros checked at runtime of compiler. */
34
35 #define TARGET_HARD_FLOAT (target_flags & 1)
36 #define TARGET_BACKCHAIN (target_flags & 2)
37 #define TARGET_SMALL_EXEC (target_flags & 4)
38 #define TARGET_DEBUG_ARG (target_flags & 8)
39 #define TARGET_64BIT (target_flags & 16)
40 #define TARGET_MVCLE (target_flags & 32)
41
42 #define TARGET_DEFAULT 0x3
43 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
44
45 /* Macro to define tables used to set the flags. This is a list in braces
46 of pairs in braces, each pair being { "NAME", VALUE }
47 where VALUE is the bits to set or minus the bits to clear.
48 An empty string NAME is used to identify the default VALUE. */
49
50 #define TARGET_SWITCHES \
51 { { "hard-float", 1, N_("Use hardware fp")}, \
52 { "soft-float", -1, N_("Don't use hardware fp")}, \
53 { "backchain", 2, N_("Set backchain")}, \
54 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
55 { "small-exec", 4, N_("Use bras for execucable < 64k")}, \
56 { "no-small-exec",-4, N_("Don't use bras")}, \
57 { "debug", 8, N_("Additional debug prints")}, \
58 { "no-debug", -8, N_("Don't print additional debug prints")}, \
59 { "64", 16, N_("64 bit mode")}, \
60 { "31", -16, N_("31 bit mode")}, \
61 { "mvcle", 32, N_("mvcle use")}, \
62 { "no-mvcle", -32, N_("mvc&ex")}, \
63 { "", TARGET_DEFAULT, 0 } }
64
65 /* Define this to change the optimizations performed by default. */
66 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
67
68 /* Defines for REAL_ARITHMETIC. */
69 #define IEEE_FLOAT 1
70 #define TARGET_IBM_FLOAT 0
71 #define TARGET_IEEE_FLOAT 1
72
73 /* The current function count for create unique internal labels. */
74
75 extern int s390_function_count;
76
77 /* The amount of space used for outgoing arguments. */
78
79 extern int current_function_outgoing_args_size;
80
81 /* Target machine storage layout. */
82
83 /* Define this if most significant bit is lowest numbered in instructions
84 that operate on numbered bit-fields. */
85
86 #define BITS_BIG_ENDIAN 1
87
88 /* Define this if most significant byte of a word is the lowest numbered. */
89
90 #define BYTES_BIG_ENDIAN 1
91
92 /* Define this if MS word of a multiword is the lowest numbered. */
93
94 #define WORDS_BIG_ENDIAN 1
95
96 /* Number of bits in an addressable storage unit. */
97
98 #define BITS_PER_UNIT 8
99
100 /* Width in bits of a "word", which is the contents of a machine register. */
101
102 #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32)
103 #define MAX_BITS_PER_WORD 64
104
105 /* Width of a word, in units (bytes). */
106
107 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
108 #define MIN_UNITS_PER_WORD 4
109
110 /* Width in bits of a pointer. See also the macro `Pmode' defined below. */
111
112 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
113
114 /* A C expression for the size in bits of the type `short' on the
115 target machine. If you don't define this, the default is half a
116 word. (If this would be less than one storage unit, it is
117 rounded up to one unit.) */
118 #define SHORT_TYPE_SIZE 16
119
120 /* A C expression for the size in bits of the type `int' on the
121 target machine. If you don't define this, the default is one
122 word. */
123 #define INT_TYPE_SIZE 32
124
125 /* A C expression for the size in bits of the type `long' on the
126 target machine. If you don't define this, the default is one
127 word. */
128 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
129 #define MAX_LONG_TYPE_SIZE 64
130
131 /* A C expression for the size in bits of the type `long long' on the
132 target machine. If you don't define this, the default is two
133 words. */
134 #define LONG_LONG_TYPE_SIZE 64
135
136 /* Right now we only support two floating point formats, the
137 32 and 64 bit ieee formats. */
138
139 #define FLOAT_TYPE_SIZE 32
140 #define DOUBLE_TYPE_SIZE 64
141 #define LONG_DOUBLE_TYPE_SIZE 64
142
143 /* Define this macro if it is advisable to hold scalars in registers
144 in a wider mode than that declared by the program. In such cases,
145 the value is constrained to be within the bounds of the declared
146 type, but kept valid in the wider mode. The signedness of the
147 extension may differ from that of the type. */
148
149 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
150 if (INTEGRAL_MODE_P (MODE) && \
151 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
152 (MODE) = Pmode; \
153 }
154
155 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
156 extensions applied to char/short functions arguments. Defining
157 PROMOTE_FUNCTION_RETURN does the same for function returns. */
158
159 #define PROMOTE_FUNCTION_ARGS
160 #define PROMOTE_FUNCTION_RETURN
161 #define PROMOTE_FOR_CALL_ONLY
162
163 /* Allocation boundary (in *bits*) for storing pointers in memory. */
164
165 #define POINTER_BOUNDARY 32
166
167 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
168
169 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
170
171 /* Boundary (in *bits*) on which stack pointer should be aligned. */
172
173 #define STACK_BOUNDARY 64
174
175 /* Allocation boundary (in *bits*) for the code of a function. */
176
177 #define FUNCTION_BOUNDARY 32
178
179 /* There is no point aligning anything to a rounder boundary than this. */
180
181 #define BIGGEST_ALIGNMENT 64
182
183 /* Alignment of field after `int : 0' in a structure. */
184
185 #define EMPTY_FIELD_BOUNDARY 32
186
187 /* Alignment on even addresses for LARL instruction. */
188
189 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
190
191 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
192
193 /* Define this if move instructions will actually fail to work when given
194 unaligned data. */
195
196 #define STRICT_ALIGNMENT 0
197
198 /* real arithmetic */
199
200 #define REAL_ARITHMETIC
201
202 /* Define target floating point format. */
203
204 #undef TARGET_FLOAT_FORMAT
205 #ifdef IEEE_FLOAT
206 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
207 #else
208 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
209 #endif
210
211 /* Define if special allocation order desired. */
212
213 #define REG_ALLOC_ORDER \
214 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
215 16, 17, 18, 19, 20, 21, 22, 23, \
216 24, 25, 26, 27, 28, 29, 30, 31, \
217 15, 32, 33 }
218
219 /* Standard register usage. */
220
221 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
222 #ifdef IEEE_FLOAT
223 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
224 #else
225 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
226 #endif
227 #define CC_REGNO_P(N) ( (N) == 33 )
228
229 /* Number of actual hardware registers. The hardware registers are
230 assigned numbers for the compiler from 0 to just below
231 FIRST_PSEUDO_REGISTER.
232 All registers that the compiler knows about must be given numbers,
233 even those that are not normally considered general registers.
234 For the 390, we give the data registers numbers 0-15,
235 and the floating point registers numbers 16-19.
236 G5 and following have 16 IEEE floating point register,
237 which get numbers 16-31. */
238
239 #define FIRST_PSEUDO_REGISTER 34
240
241 /* The following register have a fix usage
242 GPR 12: GOT register points to the GOT, setup in prologue,
243 GOT contains pointer to variables in shared libraries
244 GPR 13: Base register setup in prologue to point to the
245 literal table of each function
246 GPR 14: Return registers holds the return address
247 GPR 15: Stack pointer */
248
249 #define PIC_OFFSET_TABLE_REGNUM 12
250 #define BASE_REGISTER 13
251 #define RETURN_REGNUM 14
252 #define STACK_POINTER_REGNUM 15
253
254 #define FIXED_REGISTERS \
255 { 0, 0, 0, 0, \
256 0, 0, 0, 0, \
257 0, 0, 0, 0, \
258 0, 1, 1, 1, \
259 0, 0, 0, 0, \
260 0, 0, 0, 0, \
261 0, 0, 0, 0, \
262 0, 0, 0, 0, \
263 1, 1 }
264
265 /* 1 for registers not available across function calls. These must include
266 the FIXED_REGISTERS and also any registers that can be used without being
267 saved.
268 The latter must include the registers where values are returned
269 and the register where structure-value addresses are passed. */
270
271 #define CALL_USED_REGISTERS \
272 { 1, 1, 1, 1, \
273 1, 1, 0, 0, \
274 0, 0, 0, 0, \
275 0, 1, 1, 1, \
276 1, 1, 0, 0, \
277 1, 1, 1, 1, \
278 1, 1, 1, 1, \
279 1, 1, 1, 1, \
280 1, 1 }
281
282 /* If not pic code, gpr 12 can be used. */
283
284 #define CONDITIONAL_REGISTER_USAGE \
285 do \
286 { \
287 if (flag_pic) \
288 { \
289 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
290 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
291 } \
292 } while (0)
293
294 /* The following register have a special usage
295 GPR 11: Frame pointer if needed to point to automatic variables.
296 GPR 32: In functions with more the 5 args this register
297 points to that arguments, it is always eliminated
298 with stack- or frame-pointer.
299 GPR 33: Condition code 'register' */
300
301 #define FRAME_POINTER_REGNUM 11
302
303 #define ARG_POINTER_REGNUM 32
304
305 #define CC_REGNUM 33
306
307 /* We use the register %r0 to pass the static chain to a nested function.
308
309 Note: It is assumed that this register is call-clobbered!
310 We can't use any of the function-argument registers either,
311 and register 1 is needed by the trampoline code, so we have
312 no other choice but using this one ... */
313
314 #define STATIC_CHAIN_REGNUM 0
315
316 /* Return number of consecutive hard regs needed starting at reg REGNO
317 to hold something of mode MODE.
318 This is ordinarily the length in words of a value of mode MODE
319 but can be less for certain modes in special long registers. */
320
321 #define HARD_REGNO_NREGS(REGNO, MODE) \
322 (FLOAT_REGNO_P(REGNO)? \
323 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
324 INT_REGNO_P(REGNO)? \
325 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
326 1)
327
328 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
329 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
330 Even gprs can hold DI.
331 The floating point registers can hold DF, SF, DC and SC. */
332
333 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
334 (FLOAT_REGNO_P(REGNO)? \
335 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
336 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \
337 INT_REGNO_P(REGNO)? \
338 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
339 CC_REGNO_P(REGNO)? \
340 GET_MODE_CLASS (MODE) == MODE_CC : \
341 0)
342
343 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
344 mode MODE1 and one has mode MODE2.
345 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
346 for any hard reg, then this must be 0 for correct output. */
347
348 #define MODES_TIEABLE_P(MODE1, MODE2) \
349 (((MODE1) == SFmode || (MODE1) == DFmode) \
350 == ((MODE2) == SFmode || (MODE2) == DFmode))
351
352
353 /* Define this macro if references to a symbol must be treated
354 differently depending on something about the variable or
355 function named by the symbol (such as what section it is in).
356
357 On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol
358 so that we may access it directly in the GOT. */
359
360 #define ENCODE_SECTION_INFO(DECL) \
361 do \
362 { \
363 if (flag_pic) \
364 { \
365 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
366 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
367 \
368 if (GET_CODE (rtl) == MEM) \
369 { \
370 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
371 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
372 || ! TREE_PUBLIC (DECL)); \
373 } \
374 } \
375 } \
376 while (0)
377
378
379 /* This is an array of structures. Each structure initializes one pair
380 of eliminable registers. The "from" register number is given first,
381 followed by "to". Eliminations of the same "from" register are listed
382 in order of preference. */
383
384 #define ELIMINABLE_REGS \
385 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
386 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
387 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}}
388
389 #define CAN_ELIMINATE(FROM, TO) (1)
390
391 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
392 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
393 { (OFFSET) = 0; } \
394 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
395 { (OFFSET) = s390_arg_frame_offset (); } \
396 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
397 { (OFFSET) = s390_arg_frame_offset (); } \
398 }
399
400 #define CAN_DEBUG_WITHOUT_FP
401
402 /* Value should be nonzero if functions must have frame pointers.
403 Zero means the frame pointer need not be set up (and parms may be
404 accessed via the stack pointer) in functions that seem suitable.
405 This is computed in `reload', in reload1.c. */
406
407 #define FRAME_POINTER_REQUIRED 0
408
409 /* Define the classes of registers for register constraints in the
410 machine description. Also define ranges of constants.
411
412 One of the classes must always be named ALL_REGS and include all hard regs.
413 If there is more than one class, another class must be named NO_REGS
414 and contain no registers.
415
416 The name GENERAL_REGS must be the name of a class (or an alias for
417 another name such as ALL_REGS). This is the class of registers
418 that is allowed by "g" or "r" in a register constraint.
419 Also, registers outside this class are allocated only when
420 instructions express preferences for them.
421
422 The classes must be numbered in nondecreasing order; that is,
423 a larger-numbered class must never be contained completely
424 in a smaller-numbered class.
425
426 For any two classes, it is very desirable that there be another
427 class that represents their union. */
428
429 /*#define SMALL_REGISTER_CLASSES 1*/
430
431 enum reg_class
432 {
433 NO_REGS, ADDR_REGS, GENERAL_REGS,
434 FP_REGS, ALL_REGS, LIM_REG_CLASSES
435 };
436
437 #define N_REG_CLASSES (int) LIM_REG_CLASSES
438
439 /* Give names of register classes as strings for dump file. */
440
441 #define REG_CLASS_NAMES \
442 { "NO_REGS","ADDR_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
443
444 /* Define which registers fit in which classes. This is an initializer for
445 a vector of HARD_REG_SET of length N_REG_CLASSES.
446 G5 and latter have 16 register and support IEEE floating point operations. */
447
448 #define REG_CLASS_CONTENTS \
449 { \
450 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
451 { 0x0000fffe, 0x00000001 }, /* ADDR_REGS */ \
452 { 0x0000ffff, 0x00000001 }, /* GENERAL_REGS */ \
453 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
454 { 0xffffffff, 0x00000003 }, /* ALL_REGS */ \
455 }
456
457
458 /* The same information, inverted:
459 Return the class number of the smallest class containing
460 reg number REGNO. This could be a conditional expression
461 or could index an array. */
462
463 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
464
465 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
466
467 /* The class value for index registers, and the one for base regs. */
468
469 #define INDEX_REG_CLASS ADDR_REGS
470 #define BASE_REG_CLASS ADDR_REGS
471
472 /* Get reg_class from a letter such as appears in the machine description. */
473
474 #define REG_CLASS_FROM_LETTER(C) \
475 ((C) == 'a' ? ADDR_REGS : \
476 (C) == 'd' ? GENERAL_REGS : \
477 (C) == 'f' ? FP_REGS : NO_REGS)
478
479 /* The letters I, J, K, L and M in a register constraint string can be used
480 to stand for particular ranges of immediate operands.
481 This macro defines what the ranges are.
482 C is the letter, and VALUE is a constant value.
483 Return 1 if VALUE is in the range specified by C. */
484
485 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
486 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
487 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
488 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
489 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
490
491 /* Similar, but for floating constants, and defining letters G and H.
492 Here VALUE is the CONST_DOUBLE rtx itself. */
493
494 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
495
496 /* 'Q' means a memory-reference for a S-type operand. */
497
498 #define EXTRA_CONSTRAINT(OP, C) \
499 ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \
500 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
501
502 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
503 return the class of reg to actually use. In general this is just CLASS;
504 but on some machines in some cases it is preferable to use a more
505 restrictive class. */
506
507 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
508 (GET_CODE (X) == CONST_DOUBLE ? \
509 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\
510 (GET_CODE (X) == CONST_INT ? \
511 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\
512 GET_CODE (X) == PLUS || \
513 GET_CODE (X) == LABEL_REF || \
514 GET_CODE (X) == SYMBOL_REF || \
515 GET_CODE (X) == CONST ? ADDR_REGS : (CLASS)))
516
517 /* Return the maximum number of consecutive registers needed to represent
518 mode MODE in a register of class CLASS. */
519
520 #define CLASS_MAX_NREGS(CLASS, MODE) \
521 ((CLASS) == FP_REGS ? \
522 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
523 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
524
525 /* If we are copying between FP registers and anything else, we need a memory
526 location. */
527
528 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
529 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
530
531 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
532 because the movsi and movsf patterns don't handle r/f moves. */
533
534 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
535 (GET_MODE_BITSIZE (MODE) < 32 \
536 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
537 : MODE)
538
539
540 /* A C expression whose value is nonzero if pseudos that have been
541 assigned to registers of class CLASS would likely be spilled
542 because registers of CLASS are needed for spill registers.
543
544 The default value of this macro returns 1 if CLASS has exactly one
545 register and zero otherwise. On most machines, this default
546 should be used. Only define this macro to some other expression
547 if pseudo allocated by `local-alloc.c' end up in memory because
548 their hard registers were needed for spill registers. If this
549 macro returns nonzero for those classes, those pseudos will only
550 be allocated by `global.c', which knows how to reallocate the
551 pseudo to another register. If there would not be another
552 register available for reallocation, you should not change the
553 definition of this macro since the only effect of such a
554 definition would be to slow down register allocation. */
555
556 /* Stack layout; function entry, exit and calling. */
557
558 /* The current return address is on Offset 56 of the current frame
559 if we are in an leaf_function. Otherwise we have to go one stack
560 back.
561 The return address of anything farther back is accessed normally
562 at an offset of 56 from the frame pointer.
563
564 FIXME: builtin_return_addr does not work correctly in a leaf
565 function, we need to find way to find out, if we
566 are in a leaf function
567 */
568
569 #define _RETURN_ADDR_OFFSET (TARGET_64BIT ? 112 : 56)
570
571 #define RETURN_ADDR_RTX(count, frame) \
572 gen_rtx (MEM, Pmode, \
573 memory_address (Pmode, \
574 plus_constant ( \
575 copy_to_reg (gen_rtx (MEM, Pmode, \
576 memory_address (Pmode, frame))), \
577 _RETURN_ADDR_OFFSET)));
578
579 /* The following macros will turn on dwarf2 exception hndling
580 Other code location for this exception handling are
581 in s390.md (eh_return insn) and in linux.c in the prologue. */
582
583 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
584
585 /* We have 31 bit mode. */
586
587 #define MASK_RETURN_ADDR (GEN_INT (0x7fffffff))
588
589 /* Location, from where return address to load. */
590
591 #define DWARF_FRAME_RETURN_COLUMN 14
592
593 /* Describe how we implement __builtin_eh_return. */
594 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
595 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
596 #define EH_RETURN_HANDLER_RTX \
597 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
598 TARGET_64BIT? -48 : -40))
599
600 /* Define this if pushing a word on the stack makes the stack pointer a
601 smaller address. */
602
603 #define STACK_GROWS_DOWNWARD
604
605 /* Define this if the nominal address of the stack frame is at the
606 high-address end of the local variables; that is, each additional local
607 variable allocated goes at a more negative offset in the frame. */
608
609 /* #define FRAME_GROWS_DOWNWARD */
610
611 /* Offset from stack-pointer to first location of outgoing args. */
612
613 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
614
615 /* Offset within stack frame to start allocating local variables at.
616 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
617 first local allocated. Otherwise, it is the offset to the BEGINNING
618 of the first local allocated. */
619
620 #define STARTING_FRAME_OFFSET \
621 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
622
623 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
624
625 /* If we generate an insn to push BYTES bytes, this says how many the stack
626 pointer really advances by. On S/390, we have no push instruction. */
627
628 /* #define PUSH_ROUNDING(BYTES) */
629
630 /* Accumulate the outgoing argument count so we can request the right
631 DSA size and determine stack offset. */
632
633 #define ACCUMULATE_OUTGOING_ARGS 1
634
635 /* Offset from the stack pointer register to an item dynamically
636 allocated on the stack, e.g., by `alloca'.
637
638 The default value for this macro is `STACK_POINTER_OFFSET' plus the
639 length of the outgoing arguments. The default is correct for most
640 machines. See `function.c' for details. */
641 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
642
643 /* Offset of first parameter from the argument pointer register value.
644 On the S/390, we define the argument pointer to the start of the fixed
645 area. */
646 #define FIRST_PARM_OFFSET(FNDECL) 0
647
648 /* Define this if stack space is still allocated for a parameter passed
649 in a register. The value is the number of bytes allocated to this
650 area. */
651 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
652
653 /* Define this if the above stack space is to be considered part of the
654 space allocated by the caller. */
655 /* #define OUTGOING_REG_PARM_STACK_SPACE */
656
657 /* 1 if N is a possible register number for function argument passing.
658 On S390, general registers 2 - 6 and floating point register 0 and 2
659 are used in this way. */
660
661 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
662 (N) == 16 || (N) == 17)
663
664 /* Define a data type for recording info about an argument list during
665 the scan of that argument list. This data type should hold all
666 necessary information about the function itself and about the args
667 processed so far, enough to enable macros such as FUNCTION_ARG to
668 determine where the next arg should go. */
669
670 typedef struct s390_arg_structure
671 {
672 int gprs; /* gpr so far */
673 int fprs; /* fpr so far */
674 }
675 CUMULATIVE_ARGS;
676
677
678 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
679 a function whose data type is FNTYPE.
680 For a library call, FNTYPE is 0. */
681
682 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
683 ((CUM).gprs=0, (CUM).fprs=0)
684
685 /* Update the data in CUM to advance over an argument of mode MODE and
686 data type TYPE. (TYPE is null for libcalls where that information
687 may not be available.) */
688
689 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
690 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
691
692 /* Define where to put the arguments to a function. Value is zero to push
693 the argument on the stack, or a hard register in which to store the
694 argument. */
695
696 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
697 s390_function_arg (&CUM, MODE, TYPE, NAMED)
698
699 /* Define where to expect the arguments of a function. Value is zero, if
700 the argument is on the stack, or a hard register in which the argument
701 is stored. It is the same like FUNCTION_ARG, except for unnamed args
702 That means, that all in case of varargs used, the arguments are expected
703 from the stack.
704 S/390 has already space on the stack for args coming in registers,
705 they are pushed in prologue, if needed. */
706
707
708 /* Define the `__builtin_va_list' type. */
709
710 #define BUILD_VA_LIST_TYPE(VALIST) \
711 (VALIST) = s390_build_va_list ()
712
713 /* Implement `va_start' for varargs and stdarg. */
714
715 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
716 s390_va_start (stdarg, valist, nextarg)
717
718 /* Implement `va_arg'. */
719
720 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
721 s390_va_arg (valist, type)
722
723 /* For an arg passed partly in registers and partly in memory, this is the
724 number of registers used. For args passed entirely in registers or
725 entirely in memory, zero. */
726
727 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
728
729
730 /* Define if returning from a function call automatically pops the
731 arguments described by the number-of-args field in the call. */
732
733 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
734
735
736 /* Define how to find the value returned by a function. VALTYPE is the
737 data type of the value (as a tree).
738 If the precise function being called is known, FUNC is its FUNCTION_DECL;
739 otherwise, FUNC is 15. */
740
741 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
742 || TARGET_SOFT_FLOAT ) ? 2 : 16)
743
744
745 /* for structs the address is passed, and the Callee makes a
746 copy, only if needed */
747
748 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
749 s390_function_arg_pass_by_reference (MODE, TYPE)
750
751
752 /* Register 2 (and 3) for integral values
753 or floating point register 0 (and 2) for fp values are used. */
754
755 #define FUNCTION_VALUE(VALTYPE, FUNC) \
756 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
757 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
758 || POINTER_TYPE_P (VALTYPE) \
759 ? word_mode : TYPE_MODE (VALTYPE), \
760 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
761
762 /* Define how to find the value returned by a library function assuming
763 the value has mode MODE. */
764
765 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
766
767 /* 1 if N is a possible register number for a function value. */
768
769 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
770
771 /* The definition of this macro implies that there are cases where
772 a scalar value cannot be returned in registers. */
773
774 #define RETURN_IN_MEMORY(type) \
775 (TYPE_MODE (type) == BLKmode || \
776 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
777 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
778
779 /* Mode of stack savearea.
780 FUNCTION is VOIDmode because calling convention maintains SP.
781 BLOCK needs Pmode for SP.
782 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
783
784 #define STACK_SAVEAREA_MODE(LEVEL) \
785 (LEVEL == SAVE_FUNCTION ? VOIDmode \
786 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
787
788 /* Structure value address is passed as invisible first argument (gpr 2). */
789
790 #define STRUCT_VALUE 0
791
792 /* This macro definition sets up a default value for `main' to return. */
793
794 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
795
796 /* Length in units of the trampoline for entering a nested function. */
797
798 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
799
800 /* Initialize the dynamic part of trampoline. */
801
802 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
803 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
804
805 /* Template for constant part of trampoline. */
806
807 #define TRAMPOLINE_TEMPLATE(FILE) \
808 s390_trampoline_template (FILE)
809
810 /* Output assembler code to FILE to increment profiler label # LABELNO
811 for profiling a function entry. */
812
813 #define FUNCTION_PROFILER(FILE, LABELNO) \
814 do { \
815 extern rtx s390_profile[]; \
816 extern int s390_pool_count; \
817 static char label[128]; \
818 fprintf (FILE, "# function profiler \n"); \
819 if (TARGET_64BIT) \
820 { \
821 rtx tmp[1]; \
822 output_asm_insn ("stg\t14,8(15)", tmp); \
823 sprintf (label, "%sP%d", LPREFIX, LABELNO); \
824 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, label); \
825 SYMBOL_REF_FLAG (tmp[0]) = 1; \
826 output_asm_insn ("larl\t1,%0", tmp); \
827 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "_mcount"); \
828 if (flag_pic) \
829 { \
830 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
831 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
832 } \
833 output_asm_insn ("brasl\t14,%0", tmp); \
834 output_asm_insn ("lg\t14,8(15)", tmp); \
835 } \
836 else \
837 { \
838 output_asm_insn ("l 14,4(15)", s390_profile); \
839 s390_pool_count = 0; \
840 output_asm_insn ("st 14,4(15)", s390_profile); \
841 output_asm_insn ("l 14,%4", s390_profile); \
842 output_asm_insn ("l 1,%9", s390_profile); \
843 if (flag_pic) \
844 { \
845 output_asm_insn ("ar 1,13", s390_profile); \
846 output_asm_insn ("bas 14,0(14,13)", s390_profile); \
847 } \
848 else \
849 { \
850 output_asm_insn ("basr 14,14", s390_profile); \
851 } \
852 output_asm_insn ("l 14,4(15)", s390_profile); \
853 } \
854 } while (0)
855
856 /* #define PROFILE_BEFORE_PROLOGUE */
857
858 /* There are three profiling modes for basic blocks available.
859 The modes are selected at compile time by using the options
860 -a or -ax of the gnu compiler.
861 The variable `profile_block_flag' will be set according to the
862 selected option.
863
864 profile_block_flag == 0, no option used:
865
866 No profiling done.
867
868 profile_block_flag == 1, -a option used.
869
870 Count frequency of execution of every basic block.
871
872 profile_block_flag == 2, -ax option used.
873
874 Generate code to allow several different profiling modes at run time.
875 Available modes are:
876 Produce a trace of all basic blocks.
877 Count frequency of jump instructions executed.
878 In every mode it is possible to start profiling upon entering
879 certain functions and to disable profiling of some other functions.
880
881 The result of basic-block profiling will be written to a file `bb.out'.
882 If the -ax option is used parameters for the profiling will be read
883 from file `bb.in'.
884
885 */
886
887 /* The following macro shall output assembler code to FILE
888 to initialize basic-block profiling.
889
890 If profile_block_flag == 2
891
892 Output code to call the subroutine `__bb_init_trace_func'
893 and pass two parameters to it. The first parameter is
894 the address of a block allocated in the object module.
895 The second parameter is the number of the first basic block
896 of the function.
897
898 The name of the block is a local symbol made with this statement:
899
900 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
901
902 Of course, since you are writing the definition of
903 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
904 can take a short cut in the definition of this macro and use the
905 name that you know will result.
906
907 The number of the first basic block of the function is
908 passed to the macro in BLOCK_OR_LABEL.
909
910 If described in a virtual assembler language the code to be
911 output looks like:
912
913 parameter1 <- LPBX0
914 parameter2 <- BLOCK_OR_LABEL
915 call __bb_init_trace_func
916
917 else if profile_block_flag != 0
918
919 Output code to call the subroutine `__bb_init_func'
920 and pass one single parameter to it, which is the same
921 as the first parameter to `__bb_init_trace_func'.
922
923 The first word of this parameter is a flag which will be nonzero if
924 the object module has already been initialized. So test this word
925 first, and do not call `__bb_init_func' if the flag is nonzero.
926 Note: When profile_block_flag == 2 the test need not be done
927 but `__bb_init_trace_func' *must* be called.
928
929 BLOCK_OR_LABEL may be used to generate a label number as a
930 branch destination in case `__bb_init_func' will not be called.
931
932 If described in a virtual assembler language the code to be
933 output looks like:
934
935 cmp (LPBX0),0
936 jne local_label
937 parameter1 <- LPBX0
938 call __bb_init_func
939 local_label:
940
941 */
942
943 #undef FUNCTION_BLOCK_PROFILER
944 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
945 do \
946 { \
947 if (TARGET_64BIT) \
948 { \
949 rtx tmp[1]; \
950 fprintf (FILE, "# function block profiler %d \n", profile_block_flag); \
951 output_asm_insn ("ipm 0", tmp); \
952 output_asm_insn ("aghi 15,-224", tmp); \
953 output_asm_insn ("stmg 14,5,160(15)", tmp); \
954 output_asm_insn ("larl 2,.LPBX0", tmp); \
955 switch (profile_block_flag) \
956 { \
957 case 2: \
958 if (BLOCK_OR_LABEL < 0x10000) { \
959 tmp[0] = gen_rtx_CONST_INT (Pmode, (BLOCK_OR_LABEL)); \
960 output_asm_insn ("llill 3,%x0", tmp); \
961 } else { \
962 int bo = BLOCK_OR_LABEL; \
963 tmp[0] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
964 output_asm_insn ("llill 3,%x0", tmp); \
965 tmp[0] = gen_rtx_CONST_INT (Pmode, (bo&0xffff0000)>>16); \
966 output_asm_insn ("iilh 3,%x0", tmp); \
967 } \
968 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_init_trace_func"); \
969 if (flag_pic) \
970 { \
971 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
972 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
973 } \
974 output_asm_insn ("brasl\t14,%0", tmp); \
975 break; \
976 default: \
977 output_asm_insn ("cli 7(2),0", tmp); \
978 output_asm_insn ("jne 2f", tmp); \
979 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_init_func"); \
980 if (flag_pic) \
981 { \
982 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
983 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
984 } \
985 output_asm_insn ("brasl\t14,%0", tmp); \
986 break; \
987 } \
988 output_asm_insn ("2:", tmp); \
989 output_asm_insn ("lmg 14,5,160(15)", tmp); \
990 output_asm_insn ("aghi 15,224", tmp); \
991 output_asm_insn ("spm 0", tmp); \
992 } \
993 else \
994 { \
995 extern rtx s390_profile[]; \
996 fprintf (FILE, "# function block profiler %d \n", profile_block_flag); \
997 output_asm_insn ("ipm 0", s390_profile); \
998 output_asm_insn ("ahi 15,-128", s390_profile); \
999 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
1000 output_asm_insn ("l 2,%6", s390_profile); \
1001 if (flag_pic) \
1002 output_asm_insn ("ar 2,13", s390_profile); \
1003 switch (profile_block_flag) \
1004 { \
1005 case 2: \
1006 output_asm_insn ("l 4,%1", s390_profile); \
1007 if (BLOCK_OR_LABEL < 0x8000) { \
1008 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (BLOCK_OR_LABEL)); \
1009 output_asm_insn ("lhi 3,%8", s390_profile); \
1010 } else { \
1011 int bo = BLOCK_OR_LABEL; \
1012 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1013 output_asm_insn ("lhi 3,%8", s390_profile); \
1014 output_asm_insn ("sll 3,15", s390_profile); \
1015 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1016 output_asm_insn ("ahi 3,%8", s390_profile); \
1017 } \
1018 break; \
1019 default: \
1020 output_asm_insn ("l 4,%0", s390_profile); \
1021 output_asm_insn ("cli 3(2),0", s390_profile); \
1022 output_asm_insn ("jne 2f", s390_profile); \
1023 break; \
1024 } \
1025 if (flag_pic) \
1026 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1027 else \
1028 output_asm_insn ("basr 14,4", s390_profile); \
1029 output_asm_insn ("2:", s390_profile); \
1030 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1031 output_asm_insn ("ahi 15,128", s390_profile); \
1032 output_asm_insn ("spm 0", s390_profile); \
1033 } \
1034 } while (0)
1035
1036 /* The following macro shall output assembler code to FILE
1037 to increment a counter associated with basic block number BLOCKNO.
1038
1039 If profile_block_flag == 2
1040
1041 Output code to initialize the global structure `__bb' and
1042 call the function `__bb_trace_func' which will increment the
1043 counter.
1044
1045 `__bb' consists of two words. In the first word the number
1046 of the basic block has to be stored. In the second word
1047 the address of a block allocated in the object module
1048 has to be stored.
1049
1050 The basic block number is given by BLOCKNO.
1051
1052 The address of the block is given by the label created with
1053
1054 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1055
1056 by FUNCTION_BLOCK_PROFILER.
1057
1058 Of course, since you are writing the definition of
1059 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1060 can take a short cut in the definition of this macro and use the
1061 name that you know will result.
1062
1063 If described in a virtual assembler language the code to be
1064 output looks like:
1065
1066 move BLOCKNO -> (__bb)
1067 move LPBX0 -> (__bb+4)
1068 call __bb_trace_func
1069
1070 Note that function `__bb_trace_func' must not change the
1071 machine state, especially the flag register. To grant
1072 this, you must output code to save and restore registers
1073 either in this macro or in the macros MACHINE_STATE_SAVE
1074 and MACHINE_STATE_RESTORE. The last two macros will be
1075 used in the function `__bb_trace_func', so you must make
1076 sure that the function prologue does not change any
1077 register prior to saving it with MACHINE_STATE_SAVE.
1078
1079 else if profile_block_flag != 0
1080
1081 Output code to increment the counter directly.
1082 Basic blocks are numbered separately from zero within each
1083 compiled object module. The count associated with block number
1084 BLOCKNO is at index BLOCKNO in an array of words; the name of
1085 this array is a local symbol made with this statement:
1086
1087 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1088
1089 Of course, since you are writing the definition of
1090 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1091 can take a short cut in the definition of this macro and use the
1092 name that you know will result.
1093
1094 If described in a virtual assembler language the code to be
1095 output looks like:
1096
1097 inc (LPBX2+4*BLOCKNO)
1098
1099 */
1100
1101 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1102 do \
1103 { \
1104 if (TARGET_64BIT) \
1105 { \
1106 rtx tmp[1]; \
1107 fprintf (FILE, "# block profiler %d block %d \n", \
1108 profile_block_flag, BLOCKNO); \
1109 output_asm_insn ("ipm 14", tmp); \
1110 output_asm_insn ("aghi 15,-224", tmp); \
1111 output_asm_insn ("stmg 14,5,160(15)", tmp); \
1112 output_asm_insn ("larl 2,_bb", tmp); \
1113 if ((BLOCKNO*8) < 0x10000) { \
1114 tmp[0] = gen_rtx_CONST_INT (Pmode, (BLOCKNO*8)); \
1115 output_asm_insn ("llill 3,%x0", tmp); \
1116 } else { \
1117 int bo = BLOCKNO*8; \
1118 tmp[0] = gen_rtx_CONST_INT (Pmode, bo&0xffff); \
1119 output_asm_insn ("llill 3,%x0", tmp); \
1120 tmp[0] = gen_rtx_CONST_INT (Pmode, (bo&0xffff0000)>>16); \
1121 output_asm_insn ("iilh 3,%x0", tmp); \
1122 } \
1123 switch (profile_block_flag) \
1124 { \
1125 case 2: \
1126 output_asm_insn ("stg 3,0(2)", tmp); \
1127 output_asm_insn ("larl 3,.LPBX0", tmp); \
1128 output_asm_insn ("stg 3,0(2)", tmp); \
1129 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_trace_func"); \
1130 if (flag_pic) \
1131 { \
1132 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
1133 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
1134 } \
1135 output_asm_insn ("brasl\t14,%0", tmp); \
1136 break; \
1137 default: \
1138 output_asm_insn ("larl 2,.LPBX2", tmp); \
1139 output_asm_insn ("la 2,0(2,3)", tmp); \
1140 output_asm_insn ("lg 3,0(2)", tmp); \
1141 output_asm_insn ("aghi 3,1", tmp); \
1142 output_asm_insn ("stg 3,0(2)", tmp); \
1143 break; \
1144 } \
1145 output_asm_insn ("lmg 14,5,160(15)", tmp); \
1146 output_asm_insn ("ahi 15,224", tmp); \
1147 output_asm_insn ("spm 14", tmp); \
1148 } \
1149 else \
1150 { \
1151 extern rtx s390_profile[]; \
1152 fprintf (FILE, "# block profiler %d block %d \n", \
1153 profile_block_flag,BLOCKNO); \
1154 output_asm_insn ("ipm 14", s390_profile); \
1155 output_asm_insn ("ahi 15,-128", s390_profile); \
1156 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
1157 switch (profile_block_flag) \
1158 { \
1159 case 2: \
1160 output_asm_insn ("l 4,%2", s390_profile); \
1161 output_asm_insn ("l 2,%5", s390_profile); \
1162 if (flag_pic) \
1163 output_asm_insn ("ar 2,13", s390_profile); \
1164 if (BLOCKNO < 0x8000) { \
1165 s390_profile[7] = gen_rtx_CONST_INT (Pmode, (BLOCKNO)*4); \
1166 output_asm_insn ("lhi 3,%8", s390_profile); \
1167 } else { \
1168 int bo = BLOCKNO; \
1169 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1170 output_asm_insn ("lhi 3,%8", s390_profile); \
1171 output_asm_insn ("sll 3,15", s390_profile); \
1172 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1173 output_asm_insn ("ahi 3,%7", s390_profile); \
1174 } \
1175 output_asm_insn ("st 3,0(2)", s390_profile); \
1176 output_asm_insn ("mvc 0(4,2),%5", s390_profile); \
1177 if (flag_pic) \
1178 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1179 else \
1180 output_asm_insn ("basr 14,4", s390_profile); \
1181 break; \
1182 default: \
1183 if (BLOCKNO < 0x2000) { \
1184 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (BLOCKNO)*4); \
1185 output_asm_insn ("lhi 2,%8", s390_profile); \
1186 } else { \
1187 int bo = BLOCKNO*4; \
1188 s390_profile[8] = gen_rtx_CONST_INT (Pmode, (bo&0xffff8000)>>15); \
1189 output_asm_insn ("lhi 2,%8", s390_profile); \
1190 output_asm_insn ("sll 2,15", s390_profile); \
1191 s390_profile[8] = gen_rtx_CONST_INT (Pmode, bo&0x7fff); \
1192 output_asm_insn ("ahi 2,%8", s390_profile); \
1193 } \
1194 output_asm_insn ("a 2,%7", s390_profile); \
1195 if (flag_pic) \
1196 output_asm_insn ("l 3,0(2,13)", s390_profile); \
1197 else \
1198 output_asm_insn ("l 3,0(2)", s390_profile); \
1199 output_asm_insn ("ahi 3,1", s390_profile); \
1200 if (flag_pic) \
1201 output_asm_insn ("st 3,0(2,13)", s390_profile); \
1202 else \
1203 output_asm_insn ("st 3,0(2)", s390_profile); \
1204 break; \
1205 } \
1206 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1207 output_asm_insn ("ahi 15,128", s390_profile); \
1208 output_asm_insn ("spm 14", s390_profile); \
1209 } \
1210 } while (0)
1211
1212
1213 /* The following macro shall output assembler code to FILE
1214 to indicate a return from function during basic-block profiling.
1215
1216 If profiling_block_flag == 2:
1217
1218 Output assembler code to call function `__bb_trace_ret'.
1219
1220 Note that function `__bb_trace_ret' must not change the
1221 machine state, especially the flag register. To grant
1222 this, you must output code to save and restore registers
1223 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1224 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1225 used in the function `__bb_trace_ret', so you must make
1226 sure that the function prologue does not change any
1227 register prior to saving it with MACHINE_STATE_SAVE_RET.
1228
1229 else if profiling_block_flag != 0:
1230
1231 The macro will not be used, so it need not distinguish
1232 these cases.
1233 */
1234
1235 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1236 do { \
1237 if (TARGET_64BIT) \
1238 { \
1239 rtx tmp[1]; \
1240 fprintf (FILE, "# block profiler exit \n"); \
1241 output_asm_insn ("ipm 14", tmp); \
1242 output_asm_insn ("aghi 15,-224", tmp); \
1243 output_asm_insn ("stmg 14,5,160(15)", tmp); \
1244 tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "__bb_trace_ret"); \
1245 if (flag_pic) \
1246 { \
1247 tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \
1248 tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \
1249 } \
1250 output_asm_insn ("brasl 14,%0", tmp); \
1251 output_asm_insn ("lmg 14,5,160(15)", tmp); \
1252 output_asm_insn ("aghi 15,224", tmp); \
1253 output_asm_insn ("spm 14", tmp); \
1254 } \
1255 else \
1256 { \
1257 extern rtx s390_profile[]; \
1258 fprintf (FILE, "# block profiler exit \n"); \
1259 output_asm_insn ("ipm 14", s390_profile); \
1260 output_asm_insn ("ahi 15,-128", s390_profile); \
1261 output_asm_insn ("stm 14,5,96(15)", s390_profile); \
1262 output_asm_insn ("l 4,%3", s390_profile); \
1263 if (flag_pic) \
1264 output_asm_insn ("bas 14,0(4,13)", s390_profile); \
1265 else \
1266 output_asm_insn ("basr 14,4", s390_profile); \
1267 output_asm_insn ("lm 14,5,96(15)", s390_profile); \
1268 output_asm_insn ("ahi 15,128", s390_profile); \
1269 output_asm_insn ("spm 14", s390_profile); \
1270 } \
1271 } while (0)
1272
1273 /* The function `__bb_trace_func' is called in every basic block
1274 and is not allowed to change the machine state. Saving (restoring)
1275 the state can either be done in the BLOCK_PROFILER macro,
1276 before calling function (rsp. after returning from function)
1277 `__bb_trace_func', or it can be done inside the function by
1278 defining the macros:
1279
1280 MACHINE_STATE_SAVE(ID)
1281 MACHINE_STATE_RESTORE(ID)
1282
1283 In the latter case care must be taken, that the prologue code
1284 of function `__bb_trace_func' does not already change the
1285 state prior to saving it with MACHINE_STATE_SAVE.
1286
1287 The parameter `ID' is a string identifying a unique macro use.
1288
1289 On the s390 all save/restore is done in macros above
1290 */
1291
1292 /*
1293 #define MACHINE_STATE_SAVE(ID) \
1294 fprintf (FILE, "\tahi 15,-128 # save state\n"); \
1295 fprintf (FILE, "\tstm 14,5,96(15)\n"); \
1296
1297 #define MACHINE_STATE_RESTORE(ID) \
1298 fprintf (FILE, "\tlm 14,5,96(15) # restore state\n"); \
1299 fprintf (FILE, "\tahi 15,128\n"); \
1300 */
1301
1302
1303 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
1304 pointer does not matter (provided there is a frame pointer). */
1305
1306 #define EXIT_IGNORE_STACK 1
1307
1308 /* Addressing modes, and classification of registers for them. */
1309
1310 /* #define HAVE_POST_INCREMENT */
1311 /* #define HAVE_POST_DECREMENT */
1312
1313 /* #define HAVE_PRE_DECREMENT */
1314 /* #define HAVE_PRE_INCREMENT */
1315
1316 /* These assume that REGNO is a hard or pseudo reg number. They give
1317 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
1318 reg currently allocated to a suitable hard reg.
1319 These definitions are NOT overridden anywhere. */
1320
1321 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1322 (((REGNO) > 0 && (REGNO) < 16) || (REGNO) == ARG_POINTER_REGNUM \
1323 /* || (REGNO) == FRAME_POINTER_REGNUM */ \
1324 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
1325
1326 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
1327
1328 #define REGNO_OK_FOR_DATA_P(REGNO) \
1329 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1330
1331 #define REGNO_OK_FOR_FP_P(REGNO) \
1332 FLOAT_REGNO_P (REGNO)
1333
1334 /* Now macros that check whether X is a register and also,
1335 strictly, whether it is in a specified class. */
1336
1337 /* 1 if X is a data register. */
1338
1339 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1340
1341 /* 1 if X is an fp register. */
1342
1343 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1344
1345 /* 1 if X is an address register. */
1346
1347 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1348
1349 /* Maximum number of registers that can appear in a valid memory address. */
1350
1351 #define MAX_REGS_PER_ADDRESS 2
1352
1353 /* Recognize any constant value that is a valid address. */
1354
1355 #define CONSTANT_ADDRESS_P(X) 0
1356
1357 #define SYMBOLIC_CONST(X) \
1358 (GET_CODE (X) == SYMBOL_REF \
1359 || GET_CODE (X) == LABEL_REF \
1360 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1361
1362 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
1363 they have to be forced to constant pool
1364 CONST_INT have to be forced into constant pool, if greater than
1365 64k. Depending on the insn they have to be force into constant pool
1366 for smaller value; in this case we have to work with nonimmediate operand. */
1367
1368 #define LEGITIMATE_PIC_OPERAND_P(X) \
1369 legitimate_pic_operand_p (X)
1370
1371 /* Nonzero if the constant value X is a legitimate general operand.
1372 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1373
1374 #define LEGITIMATE_CONSTANT_P(X) \
1375 legitimate_constant_p (X)
1376
1377 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
1378 its validity for a certain class. We have two alternate definitions
1379 for each of them. The usual definition accepts all pseudo regs; the
1380 other rejects them all. The symbol REG_OK_STRICT causes the latter
1381 definition to be used.
1382
1383 Most source files want to accept pseudo regs in the hope that they will
1384 get allocated to the class that the insn wants them to be in.
1385 Some source files that are used after register allocation
1386 need to be strict. */
1387
1388 /*
1389 * Nonzero if X is a hard reg that can be used as an index or if it is
1390 * a pseudo reg.
1391 */
1392
1393 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1394 ((GET_MODE (X) == Pmode) && \
1395 ((REGNO (X) > 0 && REGNO (X) < 16) || \
1396 (REGNO (X) == ARG_POINTER_REGNUM) || \
1397 (REGNO (X) >= FIRST_PSEUDO_REGISTER)))
1398
1399 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
1400 a pseudo reg. */
1401
1402 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
1403
1404 /* Nonzero if X is a hard reg that can be used as an index. */
1405
1406 #define REG_OK_FOR_INDEX_STRICT_P(X) \
1407 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
1408
1409 /* Nonzero if X is a hard reg that can be used as a base reg. */
1410
1411 #define REG_OK_FOR_BASE_STRICT_P(X) \
1412 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
1413
1414
1415 #ifndef REG_OK_STRICT
1416 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1417 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1418 #else
1419 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1420 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1421 #endif
1422
1423
1424 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1425 valid memory address for an instruction.
1426 The MODE argument is the machine mode for the MEM expression
1427 that wants to use this address.
1428
1429 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1430 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
1431
1432 #ifdef REG_OK_STRICT
1433 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1434 { \
1435 if (legitimate_address_p (MODE, X, 1)) \
1436 goto ADDR; \
1437 }
1438 #else
1439 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1440 { \
1441 if (legitimate_address_p (MODE, X, 0)) \
1442 goto ADDR; \
1443 }
1444 #endif
1445
1446
1447 /* S/390 has no mode dependent addresses. */
1448
1449 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1450
1451 /* Try machine-dependent ways of modifying an illegitimate address
1452 to be legitimate. If we find one, return the new, valid address.
1453 This macro is used in only one place: `memory_address' in explow.c. */
1454
1455 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1456 { \
1457 (X) = legitimize_address (X, OLDX, MODE); \
1458 if (memory_address_p (MODE, X)) \
1459 goto WIN; \
1460 }
1461
1462 /* Specify the machine mode that this machine uses for the index in the
1463 tablejump instruction. */
1464
1465 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1466
1467 /* Define this if the tablejump instruction expects the table to contain
1468 offsets from the address of the table.
1469 Do not define this if the table should contain absolute addresses. */
1470
1471 /* #define CASE_VECTOR_PC_RELATIVE */
1472
1473 /* Load from integral MODE < SI from memory into register makes sign_extend
1474 or zero_extend
1475 In our case sign_extension happens for Halfwords, other no extension. */
1476
1477 #define LOAD_EXTEND_OP(MODE) \
1478 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1479 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1480 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1481
1482 /* Specify the tree operation to be used to convert reals to integers. */
1483
1484 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1485
1486 /* Define this if fixuns_trunc is the same as fix_trunc. */
1487
1488 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1489
1490 /* We use "unsigned char" as default. */
1491
1492 #define DEFAULT_SIGNED_CHAR 0
1493
1494 /* This is the kind of divide that is easiest to do in the general case. */
1495
1496 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1497
1498 /* Max number of bytes we can move from memory to memory in one reasonably
1499 fast instruction. */
1500
1501 #define MOVE_MAX 256
1502
1503 /* Define this if zero-extension is slow (more than one real instruction). */
1504
1505 #define SLOW_ZERO_EXTEND
1506
1507 /* Nonzero if access to memory by bytes is slow and undesirable. */
1508
1509 #define SLOW_BYTE_ACCESS 1
1510
1511 /* Define if shifts truncate the shift count which implies one can omit
1512 a sign-extension or zero-extension of a shift count. */
1513
1514 /* #define SHIFT_COUNT_TRUNCATED */
1515
1516 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1517 is done just by pretending it is already truncated. */
1518
1519 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1520
1521 /* We assume that the store-condition-codes instructions store 0 for false
1522 and some other value for true. This is the value stored for true. */
1523
1524 /* #define STORE_FLAG_VALUE -1 */
1525
1526 /* When a prototype says `char' or `short', really pass an `int'. */
1527
1528 #define PROMOTE_PROTOTYPES 1
1529
1530 /* Don't perform CSE on function addresses. */
1531
1532 #define NO_FUNCTION_CSE
1533
1534 /* Specify the machine mode that pointers have.
1535 After generation of rtl, the compiler makes no further distinction
1536 between pointers and any other objects of this machine mode. */
1537
1538 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1539
1540 /* A function address in a call instruction is a byte address (for
1541 indexing purposes) so give the MEM rtx a byte's mode. */
1542
1543 #define FUNCTION_MODE QImode
1544
1545
1546 /* A part of a C `switch' statement that describes the relative costs
1547 of constant RTL expressions. It must contain `case' labels for
1548 expression codes `const_int', `const', `symbol_ref', `label_ref'
1549 and `const_double'. Each case must ultimately reach a `return'
1550 statement to return the relative cost of the use of that kind of
1551 constant value in an expression. The cost may depend on the
1552 precise value of the constant, which is available for examination
1553 in X, and the rtx code of the expression in which it is contained,
1554 found in OUTER_CODE.
1555
1556 CODE is the expression code--redundant, since it can be obtained
1557 with `GET_CODE (X)'. */
1558 /* Force_const_mem does not work out of reload, because the saveable_obstack
1559 is set to reload_obstack, which does not live long enough.
1560 Because of this we cannot use force_const_mem in addsi3.
1561 This leads to problems with gen_add2_insn with a constant greater
1562 than a short. Because of that we give an addition of greater
1563 constants a cost of 3 (reload1.c 10096). */
1564
1565
1566 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1567 case CONST: \
1568 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1569 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1570 return 1000; \
1571 case CONST_INT: \
1572 if ((OUTER_CODE == PLUS) && \
1573 ((INTVAL (RTX) > 32767) || \
1574 (INTVAL (RTX) < -32768))) \
1575 return COSTS_N_INSNS (3); \
1576 case LABEL_REF: \
1577 case SYMBOL_REF: \
1578 case CONST_DOUBLE: \
1579 return 0; \
1580
1581
1582 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1583 This can be used, for example, to indicate how costly a multiply
1584 instruction is. In writing this macro, you can use the construct
1585 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1586 instructions. OUTER_CODE is the code of the expression in which X
1587 is contained.
1588
1589 This macro is optional; do not define it if the default cost
1590 assumptions are adequate for the target machine. */
1591
1592 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1593 case ASHIFT: \
1594 case ASHIFTRT: \
1595 case LSHIFTRT: \
1596 case PLUS: \
1597 case AND: \
1598 case IOR: \
1599 case XOR: \
1600 case MINUS: \
1601 case NEG: \
1602 case NOT: \
1603 return 1; \
1604 case MULT: \
1605 if (GET_MODE (XEXP (X, 0)) == DImode) \
1606 return 40; \
1607 else \
1608 return 7; \
1609 case DIV: \
1610 case UDIV: \
1611 case MOD: \
1612 case UMOD: \
1613 return 33;
1614
1615
1616 /* An expression giving the cost of an addressing mode that contains
1617 ADDRESS. If not defined, the cost is computed from the ADDRESS
1618 expression and the `CONST_COSTS' values.
1619
1620 For most CISC machines, the default cost is a good approximation
1621 of the true cost of the addressing mode. However, on RISC
1622 machines, all instructions normally have the same length and
1623 execution time. Hence all addresses will have equal costs.
1624
1625 In cases where more than one form of an address is known, the form
1626 with the lowest cost will be used. If multiple forms have the
1627 same, lowest, cost, the one that is the most complex will be used.
1628
1629 For example, suppose an address that is equal to the sum of a
1630 register and a constant is used twice in the same basic block.
1631 When this macro is not defined, the address will be computed in a
1632 register and memory references will be indirect through that
1633 register. On machines where the cost of the addressing mode
1634 containing the sum is no higher than that of a simple indirect
1635 reference, this will produce an additional instruction and
1636 possibly require an additional register. Proper specification of
1637 this macro eliminates this overhead for such machines.
1638
1639 Similar use of this macro is made in strength reduction of loops.
1640
1641 ADDRESS need not be valid as an address. In such a case, the cost
1642 is not relevant and can be any value; invalid addresses need not be
1643 assigned a different cost.
1644
1645 On machines where an address involving more than one register is as
1646 cheap as an address computation involving only one register,
1647 defining `ADDRESS_COST' to reflect this can cause two registers to
1648 be live over a region of code where only one would have been if
1649 `ADDRESS_COST' were not defined in that manner. This effect should
1650 be considered in the definition of this macro. Equivalent costs
1651 should probably only be given to addresses with different numbers
1652 of registers on machines with lots of registers.
1653
1654 This macro will normally either not be defined or be defined as a
1655 constant.
1656
1657 On s390 symbols are expensive if compiled with fpic
1658 lifetimes. */
1659
1660 #define ADDRESS_COST(RTX) \
1661 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1662
1663 /* On s390, copy between fprs and gprs is expensive. */
1664
1665 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1666 (((CLASS1 != CLASS2) && \
1667 (CLASS1 == FP_REGS || CLASS2 == FP_REGS)) ? 10 : 1)
1668
1669
1670 /* A C expression for the cost of moving data of mode M between a
1671 register and memory. A value of 2 is the default; this cost is
1672 relative to those in `REGISTER_MOVE_COST'.
1673
1674 If moving between registers and memory is more expensive than
1675 between two registers, you should define this macro to express the
1676 relative cost. */
1677
1678 #define MEMORY_MOVE_COST(M, C, I) 1
1679
1680 /* A C expression for the cost of a branch instruction. A value of 1
1681 is the default; other values are interpreted relative to that. */
1682
1683 #define BRANCH_COST 1
1684
1685 /* Add any extra modes needed to represent the condition code. */
1686 #define EXTRA_CC_MODES \
1687 CC (CCZmode, "CCZ") \
1688 CC (CCAmode, "CCA") \
1689 CC (CCLmode, "CCL") \
1690 CC (CCUmode, "CCU") \
1691 CC (CCSmode, "CCS") \
1692 CC (CCTmode, "CCT")
1693
1694 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1695 return the mode to be used for the comparison. */
1696
1697 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1698
1699
1700 /* Define the information needed to generate branch and scc insns. This is
1701 stored from the compare operation. Note that we can't use "rtx" here
1702 since it hasn't been defined! */
1703
1704 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1705
1706
1707 /* How to refer to registers in assembler output. This sequence is
1708 indexed by compiler's hard-register-number (see above). */
1709
1710 #define REGISTER_NAMES \
1711 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1712 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1713 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1714 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1715 "%ap", "%cc" \
1716 }
1717
1718 /* implicit call of memcpy, not bcopy */
1719
1720 #define TARGET_MEM_FUNCTIONS
1721
1722 /* Print operand X (an rtx) in assembler syntax to file FILE.
1723 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1724 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1725
1726 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1727
1728 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1729
1730
1731 /* Define the codes that are matched by predicates in aux-output.c. */
1732
1733 #define PREDICATE_CODES \
1734 {"s_operand", { MEM }}, \
1735 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1736 {"r_or_s_operand", { MEM, SUBREG, REG }}, \
1737 {"r_or_im8_operand", { CONST_INT, SUBREG, REG }}, \
1738 {"r_or_s_or_im8_operand", { MEM, SUBREG, REG, CONST_INT }}, \
1739 {"r_or_x_or_im16_operand", { MEM, SUBREG, REG, CONST_INT }}, \
1740 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1741 {"const1_operand", { CONST_INT, CONST_DOUBLE }}, \
1742 {"tmxx_operand", { CONST_INT, MEM }},
1743
1744
1745 /* Constant Pool for all symbols operands which are changed with
1746 force_const_mem during insn generation (expand_insn). */
1747
1748 extern struct rtx_def *s390_pool_start_insn;
1749 extern int s390_pool_count;
1750 extern int s390_nr_constants;
1751
1752 /* Function is splitted in chunk, if literal pool could overflow
1753 Value need to be lowered, if problems with displacement overflow. */
1754
1755 #define S390_REL_MAX 55000
1756 #define S390_CHUNK_MAX 0x2000
1757 #define S390_CHUNK_OV 0x8000
1758 #define S390_POOL_MAX 0xe00
1759
1760 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1761 { \
1762 register rtx insn; \
1763 struct pool_constant *pool; \
1764 \
1765 if (s390_pool_count == -1) \
1766 { \
1767 s390_nr_constants = 0; \
1768 for (pool = first_pool; pool; pool = pool->next) \
1769 if (pool->mark) s390_nr_constants++; \
1770 return; \
1771 } \
1772 if (first_pool == 0) { \
1773 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1774 return; \
1775 } \
1776 for (pool = first_pool; pool; pool = pool->next) \
1777 pool->mark = 0; \
1778 \
1779 insn = s390_pool_start_insn; \
1780 \
1781 if (insn==NULL_RTX) \
1782 insn = get_insns (); \
1783 else \
1784 insn = NEXT_INSN (insn); \
1785 for (; insn; insn = NEXT_INSN (insn)) { \
1786 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { \
1787 if (s390_stop_dump_lit_p (insn)) { \
1788 mark_constants (PATTERN (insn)); \
1789 break; \
1790 } else \
1791 mark_constants (PATTERN (insn)); \
1792 } \
1793 } \
1794 \
1795 /* Mark entries referenced by other entries */ \
1796 for (pool = first_pool; pool; pool = pool->next) \
1797 if (pool->mark) \
1798 mark_constants (pool->constant); \
1799 \
1800 s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \
1801 }
1802
1803 /* We need to return, because otherwise the pool is deleted of the
1804 constant pool after the first output. */
1805
1806 #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return;
1807
1808 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1809 { \
1810 if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \
1811 { \
1812 fprintf (FILE, ".LC%d:\n", LABELNO); \
1813 LABELNO = ~LABELNO; \
1814 } \
1815 if (s390_pool_count > 0) \
1816 { \
1817 fprintf (FILE, ".LC%d_%X:\n", ~LABELNO, s390_pool_count); \
1818 } \
1819 \
1820 /* Output the value of the constant itself. */ \
1821 switch (GET_MODE_CLASS (MODE)) \
1822 { \
1823 case MODE_FLOAT: \
1824 if (GET_CODE (EXP) != CONST_DOUBLE) \
1825 abort (); \
1826 \
1827 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \
1828 assemble_real (u.d, MODE, ALIGN); \
1829 break; \
1830 \
1831 case MODE_INT: \
1832 case MODE_PARTIAL_INT: \
1833 if (flag_pic \
1834 && (GET_CODE (EXP) == CONST \
1835 || GET_CODE (EXP) == SYMBOL_REF \
1836 || GET_CODE (EXP) == LABEL_REF )) \
1837 { \
1838 fprintf (FILE, "%s\t",TARGET_64BIT ? ASM_QUAD : ASM_LONG); \
1839 s390_output_symbolic_const (FILE, EXP); \
1840 fputc ('\n', (FILE)); \
1841 } \
1842 else \
1843 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1844 break; \
1845 \
1846 default: \
1847 abort (); \
1848 } \
1849 goto WIN; \
1850 }
1851
1852 #endif
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