Add support for reductions in fully-masked loops
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / slp_13.c
blob5b875bfcc32c3d9e44329542f171529a053e5dfe
1 /* { dg-do compile } */
2 /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=scalable" } */
4 #include <stdint.h>
6 #define VEC_PERM(TYPE) \
7 TYPE __attribute__ ((noinline, noclone)) \
8 vec_slp_##TYPE (TYPE *restrict a, int n) \
9 { \
10 TYPE res = 0; \
11 for (int i = 0; i < n; ++i) \
12 { \
13 res += a[i * 2] * 3; \
14 res += a[i * 2 + 1] * 5; \
15 } \
16 return res; \
19 #define TEST_ALL(T) \
20 T (int8_t) \
21 T (uint8_t) \
22 T (int16_t) \
23 T (uint16_t) \
24 T (int32_t) \
25 T (uint32_t) \
26 T (int64_t) \
27 T (uint64_t)
29 TEST_ALL (VEC_PERM)
31 /* ??? We don't treat the int8_t and int16_t loops as reductions. */
32 /* ??? We don't treat the uint loops as SLP. */
33 /* The loop should be fully-masked. */
34 /* { dg-final { scan-assembler-times {\tld1b\t} 2 { xfail *-*-* } } } */
35 /* { dg-final { scan-assembler-times {\tld1h\t} 2 { xfail *-*-* } } } */
36 /* { dg-final { scan-assembler-times {\tld1w\t} 2 { xfail *-*-* } } } */
37 /* { dg-final { scan-assembler-times {\tld1w\t} 1 } } */
38 /* { dg-final { scan-assembler-times {\tld1d\t} 2 { xfail *-*-* } } } */
39 /* { dg-final { scan-assembler-times {\tld1d\t} 1 } } */
40 /* { dg-final { scan-assembler-not {\tldr} { xfail *-*-* } } } */
42 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 { xfail *-*-* } } } */
43 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 4 { xfail *-*-* } } } */
44 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 4 } } */
45 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 4 } } */
47 /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.b\n} 2 { xfail *-*-* } } } */
48 /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.h\n} 2 { xfail *-*-* } } } */
49 /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.s\n} 2 } } */
50 /* { dg-final { scan-assembler-times {\tuaddv\td[0-9]+, p[0-7], z[0-9]+\.d\n} 2 } } */
52 /* { dg-final { scan-assembler-not {\tuqdec} } } */