| blob | c08d2b35e5e7a7a90c92d91feccf5382d5a5deeb |
1 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2 Alan Hayward <alan.hayward@arm.com>
3 David Sherwood <david.sherwood@arm.com>
5 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
6 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
7 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
8 (cond_umax@var{mode}): Document.
9 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
10 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
11 (cond_umin_optab, cond_umax_optab): New optabs.
12 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
13 (COND_IOR, COND_XOR): New internal functions.
14 * internal-fn.h (get_conditional_internal_fn): Declare.
15 * internal-fn.c (cond_binary_direct): New macro.
16 (expand_cond_binary_optab_fn): Likewise.
17 (direct_cond_binary_optab_supported_p): Likewise.
18 (get_conditional_internal_fn): New function.
19 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
20 Cope with reduction statements that are vectorized as calls rather
21 than assignments.
22 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
23 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
24 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
25 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
26 (UNSPEC_COND_EOR): New unspecs.
27 (optab): Add mappings for them.
28 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
29 (sve_int_op, sve_fp_op): New int attributes.
31 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
32 Alan Hayward <alan.hayward@arm.com>
33 David Sherwood <david.sherwood@arm.com>
35 * optabs.def (while_ult_optab): New optab.
36 * doc/md.texi (while_ult@var{m}@var{n}): Document.
37 * internal-fn.def (WHILE_ULT): New internal function.
38 * internal-fn.h (direct_internal_fn_supported_p): New override
39 that takes two types as argument.
40 * internal-fn.c (while_direct): New macro.
41 (expand_while_optab_fn): New function.
42 (convert_optab_supported_p): Likewise.
43 (direct_while_optab_supported_p): New macro.
44 * wide-int.h (wi::udiv_ceil): New function.
45 * tree-vectorizer.h (rgroup_masks): New structure.
46 (vec_loop_masks): New typedef.
47 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
48 and fully_masked_p.
49 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
50 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
51 (vect_max_vf): New function.
52 (slpeel_make_loop_iterate_ntimes): Delete.
53 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
54 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
55 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
56 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
57 internal-fn.h, stor-layout.h and optabs-query.h.
58 (vect_set_loop_mask): New function.
59 (add_preheader_seq): Likewise.
60 (add_header_seq): Likewise.
61 (interleave_supported_p): Likewise.
62 (vect_maybe_permute_loop_masks): Likewise.
63 (vect_set_loop_masks_directly): Likewise.
64 (vect_set_loop_condition_masked): Likewise.
65 (vect_set_loop_condition_unmasked): New function, split out from
66 slpeel_make_loop_iterate_ntimes.
67 (slpeel_make_loop_iterate_ntimes): Rename to..
68 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
69 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
70 (vect_do_peeling): Update call accordingly.
71 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
72 loops.
73 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
74 mask_compare_type, can_fully_mask_p and fully_masked_p.
75 (release_vec_loop_masks): New function.
76 (_loop_vec_info): Use it to free the loop masks.
77 (can_produce_all_loop_masks_p): New function.
78 (vect_get_max_nscalars_per_iter): Likewise.
79 (vect_verify_full_masking): Likewise.
80 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
81 retries, and free the mask rgroups before retrying. Check loop-wide
82 reasons for disallowing fully-masked loops. Make the final decision
83 about whether use a fully-masked loop or not.
84 (vect_estimate_min_profitable_iters): Do not assume that peeling
85 for the number of iterations will be needed for fully-masked loops.
86 (vectorizable_reduction): Disable fully-masked loops.
87 (vectorizable_live_operation): Likewise.
88 (vect_halve_mask_nunits): New function.
89 (vect_double_mask_nunits): Likewise.
90 (vect_record_loop_mask): Likewise.
91 (vect_get_loop_mask): Likewise.
92 (vect_transform_loop): Handle the case in which the final loop
93 iteration might handle a partial vector. Call vect_set_loop_condition
94 instead of slpeel_make_loop_iterate_ntimes.
95 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
96 (check_load_store_masking): New function.
97 (prepare_load_store_mask): Likewise.
98 (vectorizable_store): Handle fully-masked loops.
99 (vectorizable_load): Likewise.
100 (supportable_widening_operation): Use vect_halve_mask_nunits for
101 booleans.
102 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
103 (vect_gen_while): New function.
104 * config/aarch64/aarch64.md (umax<mode>3): New expander.
105 (aarch64_uqdec<mode>): New insn.
107 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
108 Alan Hayward <alan.hayward@arm.com>
109 David Sherwood <david.sherwood@arm.com>
111 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
112 (reduc_xor_scal_optab): New optabs.
113 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
114 (reduc_xor_scal_@var{m}): Document.
115 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
116 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
117 internal functions.
118 * fold-const-call.c (fold_const_call): Handle them.
119 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
120 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
121 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
122 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
123 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
124 (UNSPEC_XORV): New unspecs.
125 (optab): Add entries for them.
126 (BITWISEV): New int iterator.
127 (bit_reduc_op): New int attributes.
129 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
130 Alan Hayward <alan.hayward@arm.com>
131 David Sherwood <david.sherwood@arm.com>
133 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
134 * internal-fn.def (VEC_SHL_INSERT): New internal function.
135 * optabs.def (vec_shl_insert_optab): New optab.
136 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
137 (duplicate_and_interleave): Likewise.
138 * tree-vect-loop.c: Include internal-fn.h.
139 (neutral_op_for_slp_reduction): New function, split out from
140 get_initial_defs_for_reduction.
141 (get_initial_def_for_reduction): Handle option 2 for variable-length
142 vectors by loading the neutral value into a vector and then shifting
143 the initial value into element 0.
144 (get_initial_defs_for_reduction): Replace the code argument with
145 the neutral value calculated by neutral_op_for_slp_reduction.
146 Use gimple_build_vector for constant-length vectors.
147 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
148 but the first group_size elements have a neutral value.
149 Use duplicate_and_interleave otherwise.
150 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
151 Update call to get_initial_defs_for_reduction. Handle SLP
152 reductions for variable-length vectors by creating one vector
153 result for each scalar result, with the elements associated
154 with other scalar results stubbed out with the neutral value.
155 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
156 Require IFN_VEC_SHL_INSERT for double reductions on
157 variable-length vectors, or SLP reductions that have
158 a neutral value. Require can_duplicate_and_interleave_p
159 support for variable-length unchained SLP reductions if there
160 is no neutral value, such as for MIN/MAX reductions. Also require
161 the number of vector elements to be a multiple of the number of
162 SLP statements when doing variable-length unchained SLP reductions.
163 Update call to vect_create_epilog_for_reduction.
164 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
165 and remove initial values.
166 (duplicate_and_interleave): Make public.
167 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
168 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
170 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
171 Alan Hayward <alan.hayward@arm.com>
172 David Sherwood <david.sherwood@arm.com>
174 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
175 (can_duplicate_and_interleave_p): New function.
176 (vect_get_and_check_slp_defs): Take the vector of statements
177 rather than just the current one. Remove excess parentheses.
178 Restriction rejectinon of vect_constant_def and vect_external_def
179 for variable-length vectors to boolean types, or types for which
180 can_duplicate_and_interleave_p is false.
181 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
182 (duplicate_and_interleave): New function.
183 (vect_get_constant_vectors): Use gimple_build_vector for
184 constant-length vectors and suitable variable-length constant
185 vectors. Use duplicate_and_interleave for other variable-length
186 vectors. Don't defer the update when inserting new statements.
188 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
189 Alan Hayward <alan.hayward@arm.com>
190 David Sherwood <david.sherwood@arm.com>
192 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
193 min_profitable_iters doesn't go negative.
195 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
196 Alan Hayward <alan.hayward@arm.com>
197 David Sherwood <david.sherwood@arm.com>
199 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
200 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
201 * optabs.def (vec_mask_load_lanes_optab): New optab.
202 (vec_mask_store_lanes_optab): Likewise.
203 * internal-fn.def (MASK_LOAD_LANES): New internal function.
204 (MASK_STORE_LANES): Likewise.
205 * internal-fn.c (mask_load_lanes_direct): New macro.
206 (mask_store_lanes_direct): Likewise.
207 (expand_mask_load_optab_fn): Handle masked operations.
208 (expand_mask_load_lanes_optab_fn): New macro.
209 (expand_mask_store_optab_fn): Handle masked operations.
210 (expand_mask_store_lanes_optab_fn): New macro.
211 (direct_mask_load_lanes_optab_supported_p): Likewise.
212 (direct_mask_store_lanes_optab_supported_p): Likewise.
213 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
214 parameter.
215 (vect_load_lanes_supported): Likewise.
216 * tree-vect-data-refs.c (strip_conversion): New function.
217 (can_group_stmts_p): Likewise.
218 (vect_analyze_data_ref_accesses): Use it instead of checking
219 for a pair of assignments.
220 (vect_store_lanes_supported): Take a masked_p parameter.
221 (vect_load_lanes_supported): Likewise.
222 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
223 vect_store_lanes_supported and vect_load_lanes_supported.
224 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
225 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
226 parameter. Don't allow gaps for masked accesses.
227 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
228 and vect_load_lanes_supported.
229 (get_load_store_type): Take a masked_p parameter and update
230 call to get_group_load_store_type.
231 (vectorizable_store): Update call to get_load_store_type.
232 Handle IFN_MASK_STORE_LANES.
233 (vectorizable_load): Update call to get_load_store_type.
234 Handle IFN_MASK_LOAD_LANES.
236 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
237 Alan Hayward <alan.hayward@arm.com>
238 David Sherwood <david.sherwood@arm.com>
240 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
241 modes for SVE.
242 * config/aarch64/aarch64-protos.h
243 (aarch64_sve_struct_memory_operand_p): Declare.
244 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
245 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
246 (VPRED, vpred): Handle SVE structure modes.
247 * config/aarch64/constraints.md (Utx): New constraint.
248 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
249 (aarch64_sve_struct_nonimmediate_operand): New predicates.
250 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
251 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
252 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
253 structure modes. Split into pieces after RA.
254 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
255 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
256 New patterns.
257 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
258 SVE structure modes.
259 (aarch64_classify_address): Likewise.
260 (sizetochar): Move earlier in file.
261 (aarch64_print_operand): Handle SVE register lists.
262 (aarch64_array_mode): New function.
263 (aarch64_sve_struct_memory_operand_p): Likewise.
264 (TARGET_ARRAY_MODE): Redefine.
266 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
267 Alan Hayward <alan.hayward@arm.com>
268 David Sherwood <david.sherwood@arm.com>
270 * target.def (array_mode): New target hook.
271 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
272 * doc/tm.texi: Regenerate.
273 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
274 * hooks.c (hook_optmode_mode_uhwi_none): New function.
275 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
276 targetm.array_mode.
277 * stor-layout.c (mode_for_array): Likewise. Support polynomial
278 type sizes.
280 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
281 Alan Hayward <alan.hayward@arm.com>
282 David Sherwood <david.sherwood@arm.com>
284 * fold-const.c (fold_binary_loc): Check the argument types
285 rather than the result type when testing for a vector operation.
287 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
289 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
290 * doc/tm.texi: Regenerate.
292 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
293 Alan Hayward <alan.hayward@arm.com>
294 David Sherwood <david.sherwood@arm.com>
296 * doc/invoke.texi (-msve-vector-bits=): Document new option.
297 (sve): Document new AArch64 extension.
298 * doc/md.texi (w): Extend the description of the AArch64
299 constraint to include SVE vectors.
300 (Upl, Upa): Document new AArch64 predicate constraints.
301 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
302 enum.
303 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
304 (msve-vector-bits=): New option.
305 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
306 SVE when these are disabled.
307 (sve): New extension.
308 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
309 modes. Adjust their number of units based on aarch64_sve_vg.
310 (MAX_BITSIZE_MODE_ANY_MODE): Define.
311 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
312 aarch64_addr_query_type.
313 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
314 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
315 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
316 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
317 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
318 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
319 (aarch64_simd_imm_zero_p): Delete.
320 (aarch64_check_zero_based_sve_index_immediate): Declare.
321 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
322 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
323 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
324 (aarch64_sve_float_mul_immediate_p): Likewise.
325 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
326 rather than an rtx.
327 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
328 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
329 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
330 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
331 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
332 (aarch64_regmode_natural_size): Likewise.
333 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
334 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
335 left one place.
336 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
337 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
338 for VG and the SVE predicate registers.
339 (V_ALIASES): Add a "z"-prefixed alias.
340 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
341 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
342 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
343 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
344 (REG_CLASS_NAMES): Add entries for them.
345 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
346 and the predicate registers.
347 (aarch64_sve_vg): Declare.
348 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
349 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
350 (REGMODE_NATURAL_SIZE): Define.
351 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
352 SVE macros.
353 * config/aarch64/aarch64.c: Include cfgrtl.h.
354 (simd_immediate_info): Add a constructor for series vectors,
355 and an associated step field.
356 (aarch64_sve_vg): New variable.
357 (aarch64_dbx_register_number): Handle VG and the predicate registers.
358 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
359 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
360 (VEC_ANY_DATA, VEC_STRUCT): New constants.
361 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
362 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
363 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
364 (aarch64_get_mask_mode): New functions.
365 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
366 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
367 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
368 predicate modes and predicate registers. Explicitly restrict
369 GPRs to modes of 16 bytes or smaller. Only allow FP registers
370 to store a vector mode if it is recognized by
371 aarch64_classify_vector_mode.
372 (aarch64_regmode_natural_size): New function.
373 (aarch64_hard_regno_caller_save_mode): Return the original mode
374 for predicates.
375 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
376 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
377 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
378 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
379 functions.
380 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
381 does not overlap dest if the function is frame-related. Handle
382 SVE constants.
383 (aarch64_split_add_offset): New function.
384 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
385 them aarch64_add_offset.
386 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
387 and update call to aarch64_sub_sp.
388 (aarch64_add_cfa_expression): New function.
389 (aarch64_expand_prologue): Pass extra temporary registers to the
390 functions above. Handle the case in which we need to emit new
391 DW_CFA_expressions for registers that were originally saved
392 relative to the stack pointer, but now have to be expressed
393 relative to the frame pointer.
394 (aarch64_output_mi_thunk): Pass extra temporary registers to the
395 functions above.
396 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
397 IP0 and IP1 values for SVE frames.
398 (aarch64_expand_vec_series): New function.
399 (aarch64_expand_sve_widened_duplicate): Likewise.
400 (aarch64_expand_sve_const_vector): Likewise.
401 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
402 Handle SVE constants. Use emit_move_insn to move a force_const_mem
403 into the register, rather than emitting a SET directly.
404 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
405 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
406 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
407 (offset_9bit_signed_scaled_p): New functions.
408 (aarch64_replicate_bitmask_imm): New function.
409 (aarch64_bitmask_imm): Use it.
410 (aarch64_cannot_force_const_mem): Reject expressions involving
411 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
412 (aarch64_classify_index): Handle SVE indices, by requiring
413 a plain register index with a scale that matches the element size.
414 (aarch64_classify_address): Handle SVE addresses. Assert that
415 the mode of the address is VOIDmode or an integer mode.
416 Update call to aarch64_classify_symbol.
417 (aarch64_classify_symbolic_expression): Update call to
418 aarch64_classify_symbol.
419 (aarch64_const_vec_all_in_range_p): New function.
420 (aarch64_print_vector_float_operand): Likewise.
421 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
422 "vN" for FP registers with SVE modes. Handle (const ...) vectors
423 and the FP immediates 1.0 and 0.5.
424 (aarch64_print_address_internal): Handle SVE addresses.
425 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
426 (aarch64_regno_regclass): Handle predicate registers.
427 (aarch64_secondary_reload): Handle big-endian reloads of SVE
428 data modes.
429 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
430 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
431 (aarch64_convert_sve_vector_bits): New function.
432 (aarch64_override_options): Use it to handle -msve-vector-bits=.
433 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
434 rather than an rtx.
435 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
436 Handle SVE vector and predicate modes. Accept VL-based constants
437 that need only one temporary register, and VL offsets that require
438 no temporary registers.
439 (aarch64_conditional_register_usage): Mark the predicate registers
440 as fixed if SVE isn't available.
441 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
442 Return true for SVE vector and predicate modes.
443 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
444 rather than an unsigned int. Handle SVE modes.
445 (aarch64_preferred_simd_mode): Update call accordingly. Handle
446 SVE modes.
447 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
448 if SVE is enabled.
449 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
450 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
451 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
452 (aarch64_sve_float_mul_immediate_p): New functions.
453 (aarch64_sve_valid_immediate): New function.
454 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
455 Explicitly reject structure modes. Check for INDEX constants.
456 Handle PTRUE and PFALSE constants.
457 (aarch64_check_zero_based_sve_index_immediate): New function.
458 (aarch64_simd_imm_zero_p): Delete.
459 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
460 vector modes. Accept constants in the range of CNT[BHWD].
461 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
462 ask for an Advanced SIMD mode.
463 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
464 (aarch64_simd_vector_alignment): Handle SVE predicates.
465 (aarch64_vectorize_preferred_vector_alignment): New function.
466 (aarch64_simd_vector_alignment_reachable): Use it instead of
467 the vector size.
468 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
469 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
470 functions.
471 (MAX_VECT_LEN): Delete.
472 (expand_vec_perm_d): Add a vec_flags field.
473 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
474 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
475 (aarch64_evpc_ext): Don't apply a big-endian lane correction
476 for SVE modes.
477 (aarch64_evpc_rev): Rename to...
478 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
479 (aarch64_evpc_rev_global): New function.
480 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
481 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
482 MAX_VECT_LEN.
483 (aarch64_evpc_sve_tbl): New function.
484 (aarch64_expand_vec_perm_const_1): Update after rename of
485 aarch64_evpc_rev. Handle SVE permutes too, trying
486 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
487 than aarch64_evpc_tbl.
488 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
489 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
490 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
491 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
492 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
493 (aarch64_expand_sve_vcond): New functions.
494 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
495 of aarch64_vector_mode_p.
496 (aarch64_dwarf_poly_indeterminate_value): New function.
497 (aarch64_compute_pressure_classes): Likewise.
498 (aarch64_can_change_mode_class): Likewise.
499 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
500 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
501 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
502 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
503 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
504 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
505 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
506 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
507 constraints.
508 (Dn, Dl, Dr): Accept const as well as const_vector.
509 (Dz): Likewise. Compare against CONST0_RTX.
510 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
511 of "vector" where appropriate.
512 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
513 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
514 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
515 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
516 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
517 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
518 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
519 (v_int_equiv): Extend to SVE modes.
520 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
521 mode attributes.
522 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
523 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
524 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
525 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
526 (SVE_COND_FP_CMP): New int iterators.
527 (perm_hilo): Handle the new unpack unspecs.
528 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
529 attributes.
530 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
531 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
532 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
533 (aarch64_equality_operator, aarch64_constant_vector_operand)
534 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
535 (aarch64_sve_nonimmediate_operand): Likewise.
536 (aarch64_sve_general_operand): Likewise.
537 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
538 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
539 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
540 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
541 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
542 (aarch64_sve_float_arith_immediate): Likewise.
543 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
544 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
545 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
546 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
547 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
548 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
549 (aarch64_sve_float_arith_operand): Likewise.
550 (aarch64_sve_float_arith_with_sub_operand): Likewise.
551 (aarch64_sve_float_mul_operand): Likewise.
552 (aarch64_sve_vec_perm_operand): Likewise.
553 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
554 (aarch64_mov_operand): Accept const_poly_int and const_vector.
555 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
556 as well as const_vector.
557 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
558 in file. Use CONST0_RTX and CONSTM1_RTX.
559 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
560 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
561 Use aarch64_simd_imm_zero.
562 * config/aarch64/aarch64-sve.md: New file.
563 * config/aarch64/aarch64.md: Include it.
564 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
565 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
566 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
567 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
568 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
569 (sve): New attribute.
570 (enabled): Disable instructions with the sve attribute unless
571 TARGET_SVE.
572 (movqi, movhi): Pass CONST_POLY_INT operaneds through
573 aarch64_expand_mov_immediate.
574 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
575 CNT[BHSD] immediates.
576 (movti): Split CONST_POLY_INT moves into two halves.
577 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
578 Split additions that need a temporary here if the destination
579 is the stack pointer.
580 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
581 (*add<mode>3_poly_1): New instruction.
582 (set_clobber_cc): New expander.
584 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
586 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
587 parameter and use it instead of GET_MODE_SIZE (innermode). Use
588 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
589 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
590 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
591 Change innermode from fixed_mode_size to machine_mode.
592 (simplify_subreg): Update call accordingly. Handle a constant-sized
593 subreg of a variable-length CONST_VECTOR.
595 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
596 Alan Hayward <alan.hayward@arm.com>
597 David Sherwood <david.sherwood@arm.com>
599 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
600 (add_offset_to_base): New function, split out from...
601 (create_mem_ref): ...here. When handling a scale other than 1,
602 check first whether the address is valid without the offset.
603 Add it into the base if so, leaving the index and scale as-is.
605 2018-01-12 Jakub Jelinek <jakub@redhat.com>
607 PR c++/83778
608 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
609 fold_for_warn before checking if arg2 is INTEGER_CST.
611 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
613 * config/rs6000/predicates.md (load_multiple_operation): Delete.
614 (store_multiple_operation): Delete.
615 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
616 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
617 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
618 guarded by TARGET_STRING.
619 (rs6000_output_load_multiple): Delete.
620 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
621 OPTION_MASK_STRING / TARGET_STRING handling.
622 (print_operand) <'N', 'O'>: Add comment that these are unused now.
623 (const rs6000_opt_masks) <"string">: Change mask to 0.
624 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
625 (MASK_STRING): Delete.
626 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
627 parts. Simplify.
628 (load_multiple): Delete.
629 (*ldmsi8): Delete.
630 (*ldmsi7): Delete.
631 (*ldmsi6): Delete.
632 (*ldmsi5): Delete.
633 (*ldmsi4): Delete.
634 (*ldmsi3): Delete.
635 (store_multiple): Delete.
636 (*stmsi8): Delete.
637 (*stmsi7): Delete.
638 (*stmsi6): Delete.
639 (*stmsi5): Delete.
640 (*stmsi4): Delete.
641 (*stmsi3): Delete.
642 (movmemsi_8reg): Delete.
643 (corresponding unnamed define_insn): Delete.
644 (movmemsi_6reg): Delete.
645 (corresponding unnamed define_insn): Delete.
646 (movmemsi_4reg): Delete.
647 (corresponding unnamed define_insn): Delete.
648 (movmemsi_2reg): Delete.
649 (corresponding unnamed define_insn): Delete.
650 (movmemsi_1reg): Delete.
651 (corresponding unnamed define_insn): Delete.
652 * config/rs6000/rs6000.opt (mno-string): New.
653 (mstring): Replace by deprecation warning stub.
654 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
656 2018-01-12 Jakub Jelinek <jakub@redhat.com>
658 * regrename.c (regrename_do_replace): If replacing the same
659 reg multiple times, try to reuse last created gen_raw_REG.
661 PR debug/81155
662 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
663 main to workaround a bug in GDB.
665 2018-01-12 Tom de Vries <tom@codesourcery.com>
667 PR target/83737
668 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
670 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
672 PR rtl-optimization/80481
673 * ira-color.c (get_cap_member): New function.
674 (allocnos_conflict_by_live_ranges_p): Use it.
675 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
676 (setup_slot_coalesced_allocno_live_ranges): Ditto.
678 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
680 PR target/83628
681 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
682 (*saddl_se_1): Ditto.
683 (*ssubsi_1): Ditto.
684 (*saddl_se_1): Ditto.
686 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
688 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
689 rather than wi::to_widest for DR_INITs.
690 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
691 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
692 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
693 INTEGER_CSTs.
694 (vect_analyze_group_access_1): Note that here.
696 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
698 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
699 polynomial type sizes.
701 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
703 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
704 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
705 (gimple_add_tmp_var): Likewise.
707 2018-01-12 Martin Liska <mliska@suse.cz>
709 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
710 (gimple_alloc_sizes): Likewise.
711 (dump_gimple_statistics): Use PRIu64 in printf format.
712 * gimple.h: Change uint64_t to int.
714 2018-01-12 Martin Liska <mliska@suse.cz>
716 * tree-core.h: Use uint64_t instead of int.
717 * tree.c (tree_node_counts): Likewise.
718 (tree_node_sizes): Likewise.
719 (dump_tree_statistics): Use PRIu64 in printf format.
721 2018-01-12 Martin Liska <mliska@suse.cz>
723 * Makefile.in: As qsort_chk is implemented in vec.c, add
724 vec.o to linkage of gencfn-macros.
725 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
726 passing the info to record_node_allocation_statistics.
727 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
728 and pass the info.
729 * ggc-common.c (struct ggc_usage): Add operator== and use
730 it in operator< and compare function.
731 * mem-stats.h (struct mem_usage): Likewise.
732 * vec.c (struct vec_usage): Remove operator< and compare
733 function. Can be simply inherited.
735 2018-01-12 Martin Jambor <mjambor@suse.cz>
737 PR target/81616
738 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
739 * tree-ssa-math-opts.c: Include domwalk.h.
740 (convert_mult_to_fma_1): New function.
741 (fma_transformation_info): New type.
742 (fma_deferring_state): Likewise.
743 (cancel_fma_deferring): New function.
744 (result_of_phi): Likewise.
745 (last_fma_candidate_feeds_initial_phi): Likewise.
746 (convert_mult_to_fma): Added deferring logic, split actual
747 transformation to convert_mult_to_fma_1.
748 (math_opts_dom_walker): New type.
749 (math_opts_dom_walker::after_dom_children): New method, body moved
750 here from pass_optimize_widening_mul::execute, added deferring logic
751 bits.
752 (pass_optimize_widening_mul::execute): Moved most of code to
753 math_opts_dom_walker::after_dom_children.
754 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
755 * config/i386/i386.c (ix86_option_override_internal): Added
756 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
758 2018-01-12 Richard Biener <rguenther@suse.de>
760 PR debug/83157
761 * dwarf2out.c (gen_variable_die): Do not reset old_die for
762 inline instance vars.
764 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
766 PR target/81819
767 * config/rx/rx.c (rx_is_restricted_memory_address):
768 Handle SUBREG case.
770 2018-01-12 Richard Biener <rguenther@suse.de>
772 PR tree-optimization/80846
773 * target.def (split_reduction): New target hook.
774 * targhooks.c (default_split_reduction): New function.
775 * targhooks.h (default_split_reduction): Declare.
776 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
777 target requests first reduce vectors by combining low and high
778 parts.
779 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
780 (get_vectype_for_scalar_type_and_size): Export.
781 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
782 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
783 * doc/tm.texi: Regenerate.
784 * config/i386/i386.c (ix86_split_reduction): Implement
785 TARGET_VECTORIZE_SPLIT_REDUCTION.
787 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
789 PR target/83368
790 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
791 in PIC mode except for TARGET_VXWORKS_RTP.
792 * config/sparc/sparc.c: Include cfgrtl.h.
793 (TARGET_INIT_PIC_REG): Define.
794 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
795 (sparc_pic_register_p): New predicate.
796 (sparc_legitimate_address_p): Use it.
797 (sparc_legitimize_pic_address): Likewise.
798 (sparc_delegitimize_address): Likewise.
799 (sparc_mode_dependent_address_p): Likewise.
800 (gen_load_pcrel_sym): Remove 4th parameter.
801 (load_got_register): Adjust call to above. Remove obsolete stuff.
802 (sparc_expand_prologue): Do not call load_got_register here.
803 (sparc_flat_expand_prologue): Likewise.
804 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
805 (sparc_use_pseudo_pic_reg): New function.
806 (sparc_init_pic_reg): Likewise.
807 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
808 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
810 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
812 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
813 Add item for branch_cost.
815 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
817 PR rtl-optimization/83565
818 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
819 not extend the result to a larger mode for rotate operations.
820 (num_sign_bit_copies1): Likewise.
822 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
824 PR target/40411
825 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
826 -symbolic.
827 Use values-Xc.o for -pedantic.
828 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
830 2018-01-12 Martin Liska <mliska@suse.cz>
832 PR ipa/83054
833 * ipa-devirt.c (final_warning_record::grow_type_warnings):
834 New function.
835 (possible_polymorphic_call_targets): Use it.
836 (ipa_devirt): Likewise.
838 2018-01-12 Martin Liska <mliska@suse.cz>
840 * profile-count.h (enum profile_quality): Use 0 as invalid
841 enum value of profile_quality.
843 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
845 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
846 -mext-string options.
848 2018-01-12 Richard Biener <rguenther@suse.de>
850 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
851 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
852 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
853 Likewise.
854 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
856 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
858 * configure.ac (--with-long-double-format): Add support for the
859 configuration option to change the default long double format on
860 PowerPC systems.
861 * config.gcc (powerpc*-linux*-*): Likewise.
862 * configure: Regenerate.
863 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
864 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
865 used without modification.
867 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
869 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
870 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
871 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
872 MISC_BUILTIN_SPEC_BARRIER.
873 (rs6000_init_builtins): Likewise.
874 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
875 enum value.
876 (speculation_barrier): New define_insn.
877 * doc/extend.texi: Document __builtin_speculation_barrier.
879 2018-01-11 Jakub Jelinek <jakub@redhat.com>
881 PR target/83203
882 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
883 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
884 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
885 iterators.
886 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
887 integral modes instead of "ss" and "sd".
888 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
889 vectors with 32-bit and 64-bit elements.
890 (vecdupssescalarmodesuffix): New mode attribute.
891 (vec_dup<mode>): Use it.
893 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
895 PR target/83330
896 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
897 frame if argument is passed on stack.
899 2018-01-11 Jakub Jelinek <jakub@redhat.com>
901 PR target/82682
902 * ree.c (combine_reaching_defs): Optimize also
903 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
904 reg2=any_extend(exp); reg1=reg2;, formatting fix.
906 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
908 PR middle-end/83189
909 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
911 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
913 PR middle-end/83718
914 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
915 after they are computed.
917 2018-01-11 Bin Cheng <bin.cheng@arm.com>
919 PR tree-optimization/83695
920 * gimple-loop-linterchange.cc
921 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
922 reset cached scev information after interchange.
923 (pass_linterchange::execute): Remove call to scev_reset_htab.
925 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
927 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
928 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
929 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
930 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
931 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
932 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
933 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
934 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
935 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
936 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
937 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
938 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
939 (V_lane_reg): Likewise.
940 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
941 New define_expand.
942 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
943 (vfmal_lane_low<mode>_intrinsic,
944 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
945 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
946 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
947 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
948 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
949 vfmsl_lane_high<mode>_intrinsic): New define_insns.
951 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
953 * config/arm/arm-cpus.in (fp16fml): New feature.
954 (ALL_SIMD): Add fp16fml.
955 (armv8.2-a): Add fp16fml as an option.
956 (armv8.3-a): Likewise.
957 (armv8.4-a): Add fp16fml as part of fp16.
958 * config/arm/arm.h (TARGET_FP16FML): Define.
959 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
960 when appropriate.
961 * config/arm/arm-modes.def (V2HF): Define.
962 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
963 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
964 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
965 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
966 vfmsl_low, vfmsl_high): New set of builtins.
967 * config/arm/iterators.md (PLUSMINUS): New code iterator.
968 (vfml_op): New code attribute.
969 (VFMLHALVES): New int iterator.
970 (VFML, VFMLSEL): New mode attributes.
971 (V_reg): Define mapping for V2HF.
972 (V_hi, V_lo): New mode attributes.
973 (VF_constraint): Likewise.
974 (vfml_half, vfml_half_selector): New int attributes.
975 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
976 define_expand.
977 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
978 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
979 New define_insn.
980 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
981 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
982 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
983 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
984 documentation.
985 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
986 Document new effective target and option set.
988 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
990 * config/arm/arm-cpus.in (armv8_4): New feature.
991 (ARMv8_4a): New fgroup.
992 (armv8.4-a): New arch.
993 * config/arm/arm-tables.opt: Regenerate.
994 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
995 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
996 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
997 Add matching rules for -march=armv8.4-a and extensions.
998 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1000 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1002 PR target/81821
1003 * config/rx/rx.md (BW): New mode attribute.
1004 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1006 2018-01-11 Richard Biener <rguenther@suse.de>
1008 PR tree-optimization/83435
1009 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1010 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1011 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1013 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1014 Alan Hayward <alan.hayward@arm.com>
1015 David Sherwood <david.sherwood@arm.com>
1017 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1018 field.
1019 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1020 (aarch64_print_address_internal): Use it to check for a zero offset.
1022 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1023 Alan Hayward <alan.hayward@arm.com>
1024 David Sherwood <david.sherwood@arm.com>
1026 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1027 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1028 Return a poly_int64 rather than a HOST_WIDE_INT.
1029 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1030 rather than a HOST_WIDE_INT.
1031 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1032 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1033 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1034 final_offset from HOST_WIDE_INT to poly_int64.
1035 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1036 to_constant when getting the number of units in an Advanced SIMD
1037 mode.
1038 (aarch64_builtin_vectorized_function): Check for a constant number
1039 of units.
1040 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1041 GET_MODE_SIZE.
1042 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1043 attribute instead of GET_MODE_NUNITS.
1044 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1045 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1046 GET_MODE_SIZE for fixed-size registers.
1047 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1048 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1049 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1050 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1051 (aarch64_print_operand, aarch64_print_address_internal)
1052 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1053 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1054 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1055 Handle polynomial GET_MODE_SIZE.
1056 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1057 wider than SImode without modification.
1058 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1059 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1060 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1061 passing and returning SVE modes.
1062 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1063 rather than GEN_INT.
1064 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1065 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1066 (aarch64_allocate_and_probe_stack_space): Likewise.
1067 (aarch64_layout_frame): Cope with polynomial offsets.
1068 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1069 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1070 polynomial offsets.
1071 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1072 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1073 poly_int64 rather than a HOST_WIDE_INT.
1074 (aarch64_get_separate_components, aarch64_process_components)
1075 (aarch64_expand_prologue, aarch64_expand_epilogue)
1076 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1077 (aarch64_anchor_offset): New function, split out from...
1078 (aarch64_legitimize_address): ...here.
1079 (aarch64_builtin_vectorization_cost): Handle polynomial
1080 TYPE_VECTOR_SUBPARTS.
1081 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1082 GET_MODE_NUNITS.
1083 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1084 number of elements from the PARALLEL rather than the mode.
1085 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1086 rather than GET_MODE_BITSIZE.
1087 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1088 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1089 (aarch64_expand_vec_perm_const_1): Handle polynomial
1090 d->perm.length () and d->perm elements.
1091 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1092 Apply to_constant to d->perm elements.
1093 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1094 polynomial CONST_VECTOR_NUNITS.
1095 (aarch64_move_pointer): Take amount as a poly_int64 rather
1096 than an int.
1097 (aarch64_progress_pointer): Avoid temporary variable.
1098 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1099 the mode attribute instead of GET_MODE.
1101 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1102 Alan Hayward <alan.hayward@arm.com>
1103 David Sherwood <david.sherwood@arm.com>
1105 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1106 x exists before using it.
1107 (aarch64_add_constant_internal): Rename to...
1108 (aarch64_add_offset_1): ...this. Replace regnum with separate
1109 src and dest rtxes. Handle the case in which they're different,
1110 including when the offset is zero. Replace scratchreg with an rtx.
1111 Use 2 additions if there is no spare register into which we can
1112 move a 16-bit constant.
1113 (aarch64_add_constant): Delete.
1114 (aarch64_add_offset): Replace reg with separate src and dest
1115 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1116 Use aarch64_add_offset_1.
1117 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1118 an rtx rather than an int. Take the delta as a poly_int64
1119 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1120 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1121 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1122 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1123 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1124 and aarch64_add_sp.
1125 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1126 aarch64_add_constant.
1128 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1130 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1131 Use scalar_float_mode.
1133 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1135 * config/aarch64/aarch64-simd.md
1136 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1137 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1138 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1139 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1140 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1141 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1142 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1143 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1144 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1145 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1147 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1149 PR target/83514
1150 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1151 targ_options->x_arm_arch_string is non NULL.
1153 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1155 * config/aarch64/aarch64.h
1156 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1158 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1160 PR target/82096
1161 * expmed.c (emit_store_flag_force): Swap if const op0
1162 and change VOIDmode to mode of op0.
1164 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1166 PR rtl-optimization/83761
1167 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1168 than bytes to mode_for_size.
1170 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1172 PR middle-end/83189
1173 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1174 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1175 profile.
1177 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1179 PR middle-end/83575
1180 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1181 when in layout mode.
1182 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1183 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1184 partition fixup.
1186 2018-01-10 Michael Collison <michael.collison@arm.com>
1188 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1189 * config/aarch64/aarch64-option-extension.def: Add
1190 AARCH64_OPT_EXTENSION of 'fp16fml'.
1191 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1192 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1193 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1194 * config/aarch64/constraints.md (Ui7): New constraint.
1195 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1196 (VFMLA_SEL_W): Ditto.
1197 (f16quad): Ditto.
1198 (f16mac1): Ditto.
1199 (VFMLA16_LOW): New int iterator.
1200 (VFMLA16_HIGH): Ditto.
1201 (UNSPEC_FMLAL): New unspec.
1202 (UNSPEC_FMLSL): Ditto.
1203 (UNSPEC_FMLAL2): Ditto.
1204 (UNSPEC_FMLSL2): Ditto.
1205 (f16mac): New code attribute.
1206 * config/aarch64/aarch64-simd-builtins.def
1207 (aarch64_fmlal_lowv2sf): Ditto.
1208 (aarch64_fmlsl_lowv2sf): Ditto.
1209 (aarch64_fmlalq_lowv4sf): Ditto.
1210 (aarch64_fmlslq_lowv4sf): Ditto.
1211 (aarch64_fmlal_highv2sf): Ditto.
1212 (aarch64_fmlsl_highv2sf): Ditto.
1213 (aarch64_fmlalq_highv4sf): Ditto.
1214 (aarch64_fmlslq_highv4sf): Ditto.
1215 (aarch64_fmlal_lane_lowv2sf): Ditto.
1216 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1217 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1218 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1219 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1220 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1221 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1222 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1223 (aarch64_fmlal_lane_highv2sf): Ditto.
1224 (aarch64_fmlsl_lane_highv2sf): Ditto.
1225 (aarch64_fmlal_laneq_highv2sf): Ditto.
1226 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1227 (aarch64_fmlalq_lane_highv4sf): Ditto.
1228 (aarch64_fmlsl_lane_highv4sf): Ditto.
1229 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1230 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1231 * config/aarch64/aarch64-simd.md:
1232 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1233 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1234 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1235 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1236 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1237 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1238 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1239 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1240 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1241 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1242 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1243 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1244 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1245 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1246 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1247 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1248 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1249 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1250 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1251 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1252 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1253 (vfmlsl_low_u32): Ditto.
1254 (vfmlalq_low_u32): Ditto.
1255 (vfmlslq_low_u32): Ditto.
1256 (vfmlal_high_u32): Ditto.
1257 (vfmlsl_high_u32): Ditto.
1258 (vfmlalq_high_u32): Ditto.
1259 (vfmlslq_high_u32): Ditto.
1260 (vfmlal_lane_low_u32): Ditto.
1261 (vfmlsl_lane_low_u32): Ditto.
1262 (vfmlal_laneq_low_u32): Ditto.
1263 (vfmlsl_laneq_low_u32): Ditto.
1264 (vfmlalq_lane_low_u32): Ditto.
1265 (vfmlslq_lane_low_u32): Ditto.
1266 (vfmlalq_laneq_low_u32): Ditto.
1267 (vfmlslq_laneq_low_u32): Ditto.
1268 (vfmlal_lane_high_u32): Ditto.
1269 (vfmlsl_lane_high_u32): Ditto.
1270 (vfmlal_laneq_high_u32): Ditto.
1271 (vfmlsl_laneq_high_u32): Ditto.
1272 (vfmlalq_lane_high_u32): Ditto.
1273 (vfmlslq_lane_high_u32): Ditto.
1274 (vfmlalq_laneq_high_u32): Ditto.
1275 (vfmlslq_laneq_high_u32): Ditto.
1276 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1277 (AARCH64_FL_FOR_ARCH8_4): New.
1278 (AARCH64_ISA_F16FML): New ISA flag.
1279 (TARGET_F16FML): New feature flag for fp16fml.
1280 (doc/invoke.texi): Document new fp16fml option.
1282 2018-01-10 Michael Collison <michael.collison@arm.com>
1284 * config/aarch64/aarch64-builtins.c:
1285 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1286 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1287 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1288 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1289 (AARCH64_ISA_SHA3): New ISA flag.
1290 (TARGET_SHA3): New feature flag for sha3.
1291 * config/aarch64/iterators.md (sha512_op): New int attribute.
1292 (CRYPTO_SHA512): New int iterator.
1293 (UNSPEC_SHA512H): New unspec.
1294 (UNSPEC_SHA512H2): Ditto.
1295 (UNSPEC_SHA512SU0): Ditto.
1296 (UNSPEC_SHA512SU1): Ditto.
1297 * config/aarch64/aarch64-simd-builtins.def
1298 (aarch64_crypto_sha512hqv2di): New builtin.
1299 (aarch64_crypto_sha512h2qv2di): Ditto.
1300 (aarch64_crypto_sha512su0qv2di): Ditto.
1301 (aarch64_crypto_sha512su1qv2di): Ditto.
1302 (aarch64_eor3qv8hi): Ditto.
1303 (aarch64_rax1qv2di): Ditto.
1304 (aarch64_xarqv2di): Ditto.
1305 (aarch64_bcaxqv8hi): Ditto.
1306 * config/aarch64/aarch64-simd.md:
1307 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1308 (aarch64_crypto_sha512su0qv2di): Ditto.
1309 (aarch64_crypto_sha512su1qv2di): Ditto.
1310 (aarch64_eor3qv8hi): Ditto.
1311 (aarch64_rax1qv2di): Ditto.
1312 (aarch64_xarqv2di): Ditto.
1313 (aarch64_bcaxqv8hi): Ditto.
1314 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1315 (vsha512h2q_u64): Ditto.
1316 (vsha512su0q_u64): Ditto.
1317 (vsha512su1q_u64): Ditto.
1318 (veor3q_u16): Ditto.
1319 (vrax1q_u64): Ditto.
1320 (vxarq_u64): Ditto.
1321 (vbcaxq_u16): Ditto.
1322 * config/arm/types.md (crypto_sha512): New type attribute.
1323 (crypto_sha3): Ditto.
1324 (doc/invoke.texi): Document new sha3 option.
1326 2018-01-10 Michael Collison <michael.collison@arm.com>
1328 * config/aarch64/aarch64-builtins.c:
1329 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1330 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1331 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1332 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1333 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1334 (AARCH64_ISA_SM4): New ISA flag.
1335 (TARGET_SM4): New feature flag for sm4.
1336 * config/aarch64/aarch64-simd-builtins.def
1337 (aarch64_sm3ss1qv4si): Ditto.
1338 (aarch64_sm3tt1aq4si): Ditto.
1339 (aarch64_sm3tt1bq4si): Ditto.
1340 (aarch64_sm3tt2aq4si): Ditto.
1341 (aarch64_sm3tt2bq4si): Ditto.
1342 (aarch64_sm3partw1qv4si): Ditto.
1343 (aarch64_sm3partw2qv4si): Ditto.
1344 (aarch64_sm4eqv4si): Ditto.
1345 (aarch64_sm4ekeyqv4si): Ditto.
1346 * config/aarch64/aarch64-simd.md:
1347 (aarch64_sm3ss1qv4si): Ditto.
1348 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1349 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1350 (aarch64_sm4eqv4si): Ditto.
1351 (aarch64_sm4ekeyqv4si): Ditto.
1352 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1353 (sm3part_op): Ditto.
1354 (CRYPTO_SM3TT): Ditto.
1355 (CRYPTO_SM3PART): Ditto.
1356 (UNSPEC_SM3SS1): New unspec.
1357 (UNSPEC_SM3TT1A): Ditto.
1358 (UNSPEC_SM3TT1B): Ditto.
1359 (UNSPEC_SM3TT2A): Ditto.
1360 (UNSPEC_SM3TT2B): Ditto.
1361 (UNSPEC_SM3PARTW1): Ditto.
1362 (UNSPEC_SM3PARTW2): Ditto.
1363 (UNSPEC_SM4E): Ditto.
1364 (UNSPEC_SM4EKEY): Ditto.
1365 * config/aarch64/constraints.md (Ui2): New constraint.
1366 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1367 * config/arm/types.md (crypto_sm3): New type attribute.
1368 (crypto_sm4): Ditto.
1369 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1370 (vsm3tt1aq_u32): Ditto.
1371 (vsm3tt1bq_u32): Ditto.
1372 (vsm3tt2aq_u32): Ditto.
1373 (vsm3tt2bq_u32): Ditto.
1374 (vsm3partw1q_u32): Ditto.
1375 (vsm3partw2q_u32): Ditto.
1376 (vsm4eq_u32): Ditto.
1377 (vsm4ekeyq_u32): Ditto.
1378 (doc/invoke.texi): Document new sm4 option.
1380 2018-01-10 Michael Collison <michael.collison@arm.com>
1382 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1383 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1384 (AARCH64_FL_FOR_ARCH8_4): New.
1385 (AARCH64_FL_V8_4): New flag.
1386 (doc/invoke.texi): Document new armv8.4-a option.
1388 2018-01-10 Michael Collison <michael.collison@arm.com>
1390 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1391 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1392 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1393 * config/aarch64/aarch64-option-extension.def: Add
1394 AARCH64_OPT_EXTENSION of 'sha2'.
1395 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1396 (crypto): Disable sha2 and aes if crypto disabled.
1397 (crypto): Enable aes and sha2 if enabled.
1398 (simd): Disable sha2 and aes if simd disabled.
1399 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1400 New flags.
1401 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1402 (TARGET_SHA2): New feature flag for sha2.
1403 (TARGET_AES): New feature flag for aes.
1404 * config/aarch64/aarch64-simd.md:
1405 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1406 conditional on TARGET_AES.
1407 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1408 (aarch64_crypto_sha1hsi): Make pattern conditional
1409 on TARGET_SHA2.
1410 (aarch64_crypto_sha1hv4si): Ditto.
1411 (aarch64_be_crypto_sha1hv4si): Ditto.
1412 (aarch64_crypto_sha1su1v4si): Ditto.
1413 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1414 (aarch64_crypto_sha1su0v4si): Ditto.
1415 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1416 (aarch64_crypto_sha256su0v4si): Ditto.
1417 (aarch64_crypto_sha256su1v4si): Ditto.
1418 (doc/invoke.texi): Document new aes and sha2 options.
1420 2018-01-10 Martin Sebor <msebor@redhat.com>
1422 PR tree-optimization/83781
1423 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1424 as string arrays.
1426 2018-01-11 Martin Sebor <msebor@gmail.com>
1427 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1429 PR tree-optimization/83501
1430 PR tree-optimization/81703
1432 * tree-ssa-strlen.c (get_string_cst): Rename...
1433 (get_string_len): ...to this. Handle global constants.
1434 (handle_char_store): Adjust.
1436 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
1437 Jim Wilson <jimw@sifive.com>
1439 * config/riscv/riscv-protos.h (riscv_output_return): New.
1440 * config/riscv/riscv.c (struct machine_function): New naked_p field.
1441 (riscv_attribute_table, riscv_output_return),
1442 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1443 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1444 (riscv_compute_frame_info): Only compute frame->mask if not a naked
1445 function.
1446 (riscv_expand_prologue): Add early return for naked function.
1447 (riscv_expand_epilogue): Likewise.
1448 (riscv_function_ok_for_sibcall): Return false for naked function.
1449 (riscv_set_current_function): New.
1450 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1451 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1452 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1453 * doc/extend.texi (RISC-V Function Attributes): New.
1455 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
1457 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1458 check for 128-bit long double before checking TCmode.
1459 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1460 128-bit long doubles before checking TFmode or TCmode.
1461 (FLOAT128_IBM_P): Likewise.
1463 2018-01-10 Martin Sebor <msebor@redhat.com>
1465 PR tree-optimization/83671
1466 * builtins.c (c_strlen): Unconditionally return zero for the empty
1467 string.
1468 Use -Warray-bounds for warnings.
1469 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1470 for non-constant array indices with COMPONENT_REF, arrays of
1471 arrays, and pointers to arrays.
1472 (gimple_fold_builtin_strlen): Determine and set length range for
1473 non-constant character arrays.
1475 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
1477 PR middle-end/81897
1478 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1479 empty blocks.
1481 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
1483 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1485 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1487 PR target/83399
1488 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1489 VECTOR_MEM_ALTIVEC_OR_VSX_P.
1490 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1491 indexed_or_indirect_operand predicate.
1492 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1493 (*vsx_le_perm_load_v8hi): Likewise.
1494 (*vsx_le_perm_load_v16qi): Likewise.
1495 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1496 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1497 (*vsx_le_perm_store_v8hi): Likewise.
1498 (*vsx_le_perm_store_v16qi): Likewise.
1499 (eight unnamed splitters): Likewise.
1501 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1503 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1504 * config/rs6000/emmintrin.h: Likewise.
1505 * config/rs6000/mmintrin.h: Likewise.
1506 * config/rs6000/xmmintrin.h: Likewise.
1508 2018-01-10 David Malcolm <dmalcolm@redhat.com>
1510 PR c++/43486
1511 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1512 "public_flag".
1513 * tree.c (tree_nop_conversion): Return true for location wrapper
1514 nodes.
1515 (maybe_wrap_with_location): New function.
1516 (selftest::check_strip_nops): New function.
1517 (selftest::test_location_wrappers): New function.
1518 (selftest::tree_c_tests): Call it.
1519 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1520 (maybe_wrap_with_location): New decl.
1521 (EXPR_LOCATION_WRAPPER_P): New macro.
1522 (location_wrapper_p): New inline function.
1523 (tree_strip_any_location_wrapper): New inline function.
1525 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
1527 PR target/83735
1528 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1529 stack_realign_offset for the largest alignment of stack slot
1530 actually used.
1531 (ix86_find_max_used_stack_alignment): New function.
1532 (ix86_finalize_stack_frame_flags): Use it. Set
1533 max_used_stack_alignment if we don't realign stack.
1534 * config/i386/i386.h (machine_function): Add
1535 max_used_stack_alignment.
1537 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
1539 * config/arm/arm.opt (-mbranch-cost): New option.
1540 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
1541 account.
1543 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
1545 PR target/83629
1546 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
1547 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
1549 2018-01-10 Richard Biener <rguenther@suse.de>
1551 PR debug/83765
1552 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
1553 early out so it also covers the case where we have a non-NULL
1554 origin.
1556 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1558 PR tree-optimization/83753
1559 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
1560 for non-strided grouped accesses if the number of elements is 1.
1562 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1564 PR target/81616
1565 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
1566 * i386.h (TARGET_USE_GATHER): Define.
1567 * x86-tune.def (X86_TUNE_USE_GATHER): New.
1569 2018-01-10 Martin Liska <mliska@suse.cz>
1571 PR bootstrap/82831
1572 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
1573 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
1574 partitioning.
1575 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
1576 CLEANUP_NO_PARTITIONING is not set.
1578 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1580 * doc/rtl.texi: Remove documentation of (const ...) wrappers
1581 for vectors, as a partial revert of r254296.
1582 * rtl.h (const_vec_p): Delete.
1583 (const_vec_duplicate_p): Don't test for vector CONSTs.
1584 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
1585 * expmed.c (make_tree): Likewise.
1587 Revert:
1588 * common.md (E, F): Use CONSTANT_P instead of checking for
1589 CONST_VECTOR.
1590 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
1591 checking for CONST_VECTOR.
1593 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1595 PR middle-end/83575
1596 * predict.c (force_edge_cold): Handle in more sane way edges
1597 with no prediction.
1599 2018-01-09 Carl Love <cel@us.ibm.com>
1601 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
1602 V4SI, V4SF types.
1603 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
1604 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
1605 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
1606 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
1607 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
1608 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
1609 * config/rs6000/rs6000-protos.h: Add extern defition for
1610 rs6000_generate_float2_double_code.
1611 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
1612 function.
1613 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
1614 (float2_v2df): Add define_expand.
1616 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
1618 PR target/83628
1619 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
1620 op_mode in the force_to_mode call.
1622 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1624 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
1625 instead of checking each element individually.
1626 (aarch64_evpc_uzp): Likewise.
1627 (aarch64_evpc_zip): Likewise.
1628 (aarch64_evpc_ext): Likewise.
1629 (aarch64_evpc_rev): Likewise.
1630 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
1631 instead of checking each element individually. Return true without
1632 generating rtl if
1633 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
1634 whether all selected elements come from the same input, instead of
1635 checking each element individually. Remove calls to gen_rtx_REG,
1636 start_sequence and end_sequence and instead assert that no rtl is
1637 generated.
1639 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1641 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
1642 order of HIGH and CONST checks.
1644 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1646 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
1647 if the destination isn't an SSA_NAME.
1649 2018-01-09 Richard Biener <rguenther@suse.de>
1651 PR tree-optimization/83668
1652 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
1653 move prologue...
1654 (canonicalize_loop_form): ... here, renamed from ...
1655 (canonicalize_loop_closed_ssa_form): ... this and amended to
1656 swap successor edges for loop exit blocks to make us use
1657 the RPO order we need for initial schedule generation.
1659 2018-01-09 Joseph Myers <joseph@codesourcery.com>
1661 PR tree-optimization/64811
1662 * match.pd: When optimizing comparisons with Inf, avoid
1663 introducing or losing exceptions from comparisons with NaN.
1665 2018-01-09 Martin Liska <mliska@suse.cz>
1667 PR sanitizer/82517
1668 * asan.c (shadow_mem_size): Add gcc_assert.
1670 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
1672 Don't save registers in main().
1674 PR target/83738
1675 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
1676 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
1677 * config/avr/avr.c (avr_set_current_function): Don't error if
1678 naked, OS_task or OS_main are specified at the same time.
1679 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
1680 OS_main.
1681 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
1682 attribute.
1683 * common/config/avr/avr-common.c (avr_option_optimization_table):
1684 Switch on -mmain-is-OS_task for optimizing compilations.
1686 2018-01-09 Richard Biener <rguenther@suse.de>
1688 PR tree-optimization/83572
1689 * graphite.c: Include cfganal.h.
1690 (graphite_transform_loops): Connect infinite loops to exit
1691 and remove fake edges at the end.
1693 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1695 * ipa-inline.c (edge_badness): Revert accidental checkin.
1697 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1699 PR ipa/80763
1700 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
1701 symbols; not inline clones.
1703 2018-01-09 Jakub Jelinek <jakub@redhat.com>
1705 PR target/83507
1706 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
1707 hard registers. Formatting fixes.
1709 PR preprocessor/83722
1710 * gcc.c (try_generate_repro): Pass
1711 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
1712 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
1713 do_report_bug.
1715 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
1716 Kito Cheng <kito.cheng@gmail.com>
1718 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
1719 (riscv_leaf_function_p): Delete.
1720 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
1722 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1724 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
1725 function.
1726 (do_ifelse): New function.
1727 (do_isel): New function.
1728 (do_sub3): New function.
1729 (do_add3): New function.
1730 (do_load_mask_compare): New function.
1731 (do_overlap_load_compare): New function.
1732 (expand_compare_loop): New function.
1733 (expand_block_compare): Call expand_compare_loop() when appropriate.
1734 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
1735 option description.
1736 (-mblock-compare-inline-loop-limit): New option.
1738 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1740 PR target/83677
1741 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
1742 Reverse order of second and third operands in first alternative.
1743 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
1744 of first and second elements in UNSPEC_VPERMR vector.
1745 (altivec_expand_vec_perm_le): Likewise.
1747 2017-01-08 Jeff Law <law@redhat.com>
1749 PR rtl-optimizatin/81308
1750 * tree-switch-conversion.c (cfg_altered): New file scoped static.
1751 (process_switch): If group_case_labels makes a change, then set
1752 cfg_altered.
1753 (pass_convert_switch::execute): If a switch is converted, then
1754 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
1756 PR rtl-optimization/81308
1757 * recog.c (split_all_insns): Conditionally cleanup the CFG after
1758 splitting insns.
1760 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
1762 PR target/83663 - Revert r255946
1763 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
1764 generation for cases where splatting a value is not useful.
1765 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
1766 across a vec_duplicate and a paradoxical subreg forming a vector
1767 mode to a vec_concat.
1769 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1771 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
1772 -march=armv8.3-a variants.
1773 * config/arm/t-multilib: Likewise.
1774 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
1776 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1778 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
1779 to generate rtl.
1780 (cceq_ior_compare_complement): Give it a name so I can use it, and
1781 change boolean_or_operator predicate to boolean_operator so it can
1782 be used to generate a crand.
1783 (eqne): New code iterator.
1784 (bd/bd_neg): New code_attrs.
1785 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
1786 a single define_insn.
1787 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
1788 decrement (bdnzt/bdnzf/bdzt/bdzf).
1789 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
1790 with the new names of the branch decrement patterns, and added the
1791 names of the branch decrement conditional patterns.
1793 2018-01-08 Richard Biener <rguenther@suse.de>
1795 PR tree-optimization/83563
1796 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
1797 cache.
1799 2018-01-08 Richard Biener <rguenther@suse.de>
1801 PR middle-end/83713
1802 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
1804 2018-01-08 Richard Biener <rguenther@suse.de>
1806 PR tree-optimization/83685
1807 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
1808 references to abnormals.
1810 2018-01-08 Richard Biener <rguenther@suse.de>
1812 PR lto/83719
1813 * dwarf2out.c (output_indirect_strings): Handle empty
1814 skeleton_debug_str_hash.
1815 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
1817 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1819 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
1820 (emit_store_direct): Likewise.
1821 (arc_trampoline_adjust_address): Likewise.
1822 (arc_asm_trampoline_template): New function.
1823 (arc_initialize_trampoline): Use asm_trampoline_template.
1824 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
1825 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
1826 * config/arc/arc.md (flush_icache): Delete pattern.
1828 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1830 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
1831 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
1832 munaligned-access.
1834 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1836 PR target/83681
1837 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
1838 by not USED_FOR_TARGET.
1839 (make_pass_resolve_sw_modes): Likewise.
1841 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1843 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
1844 USED_FOR_TARGET.
1846 2018-01-08 Richard Biener <rguenther@suse.de>
1848 PR middle-end/83580
1849 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
1851 2018-01-08 Richard Biener <rguenther@suse.de>
1853 PR middle-end/83517
1854 * match.pd ((t * 2) / 2) -> t): Add missing :c.
1856 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
1858 PR middle-end/81897
1859 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
1860 basic blocks with a small number of successors.
1861 (convert_control_dep_chain_into_preds): Improve handling of
1862 forwarder blocks.
1863 (dump_predicates): Split apart into...
1864 (dump_pred_chain): ...here...
1865 (dump_pred_info): ...and here.
1866 (can_one_predicate_be_invalidated_p): Add debugging printfs.
1867 (can_chain_union_be_invalidated_p): Improve check for invalidation
1868 of paths.
1869 (uninit_uses_cannot_happen): Avoid unnecessary if
1870 convert_control_dep_chain_into_preds yielded nothing.
1872 2018-01-06 Martin Sebor <msebor@redhat.com>
1874 PR tree-optimization/83640
1875 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
1876 subtracting negative offset from size.
1877 (builtin_access::overlap): Adjust offset bounds of the access to fall
1878 within the size of the object if possible.
1880 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
1882 PR rtl-optimization/83699
1883 * expmed.c (extract_bit_field_1): Restrict the vector usage of
1884 extract_bit_field_as_subreg to cases in which the extracted
1885 value is also a vector.
1887 * lra-constraints.c (process_alt_operands): Test for the equivalence
1888 substitutions when detecting a possible reload cycle.
1890 2018-01-06 Jakub Jelinek <jakub@redhat.com>
1892 PR debug/83480
1893 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
1894 by default if flag_selective_schedling{,2}. Formatting fixes.
1896 PR rtl-optimization/83682
1897 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
1898 if it has non-VECTOR_MODE element mode.
1899 (vec_duplicate_p): Likewise.
1901 PR middle-end/83694
1902 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
1903 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
1905 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1907 PR target/83604
1908 * config/i386/i386-builtin.def
1909 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
1910 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
1911 Require also OPTION_MASK_ISA_AVX512F in addition to
1912 OPTION_MASK_ISA_GFNI.
1913 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
1914 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
1915 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
1916 to OPTION_MASK_ISA_GFNI.
1917 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
1918 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
1919 OPTION_MASK_ISA_AVX512BW.
1920 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
1921 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
1922 addition to OPTION_MASK_ISA_GFNI.
1923 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
1924 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
1925 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
1926 to OPTION_MASK_ISA_GFNI.
1927 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
1928 a requirement for all ISAs rather than any of them with a few
1929 exceptions.
1930 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
1931 processing.
1932 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
1933 bitmasks to be enabled with 3 exceptions, instead of requiring any
1934 enabled ISA with lots of exceptions.
1935 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
1936 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
1937 Change avx512bw in isa attribute to avx512f.
1938 * config/i386/sgxintrin.h: Add license boilerplate.
1939 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
1940 to __AVX512F__ and __AVX512VL to __AVX512VL__.
1941 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
1942 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
1943 defined.
1944 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
1945 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
1946 temporarily sse2 rather than sse if not enabled already.
1948 PR target/83604
1949 * config/i386/sse.md (VI248_VLBW): Rename to ...
1950 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
1951 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
1952 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
1953 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
1954 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
1955 mode iterator instead of VI248_VLBW.
1957 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
1959 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
1960 (record_modified): Skip clobbers; add debug output.
1961 (param_change_prob): Use sreal frequencies.
1963 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1965 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
1966 punt for user-aligned variables.
1968 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1970 * tree-chrec.c (chrec_contains_symbols): Return true for
1971 POLY_INT_CST.
1973 2018-01-05 Sudakshina Das <sudi.das@arm.com>
1975 PR target/82439
1976 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
1977 of (x|y) == x for BICS pattern.
1979 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1981 PR tree-optimization/83605
1982 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
1983 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
1984 can throw.
1986 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
1988 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
1989 * config/epiphany/rtems.h: New file.
1991 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1992 Uros Bizjak <ubizjak@gmail.com>
1994 PR target/83554
1995 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
1996 QIreg_operand instead of register_operand predicate.
1997 * config/i386/i386.c (ix86_rop_should_change_byte_p,
1998 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
1999 comments instead of -fmitigate[-_]rop.
2001 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2003 PR bootstrap/81926
2004 * cgraphunit.c (symbol_table::compile): Switch to text_section
2005 before calling assembly_start debug hook.
2006 * run-rtl-passes.c (run_rtl_passes): Likewise.
2007 Include output.h.
2009 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2011 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2012 range_int_cst_p rather than !symbolic_range_p before calling
2013 extract_range_from_multiplicative_op_1.
2015 2017-01-04 Jeff Law <law@redhat.com>
2017 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2018 redundant test in assertion.
2020 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2022 * doc/rtl.texi: Document machine_mode wrapper classes.
2024 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2026 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2027 using tree_to_uhwi.
2029 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2031 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2032 the VEC_PERM_EXPR fold to fail.
2034 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2036 PR debug/83585
2037 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2038 to switched_sections.
2040 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2042 PR target/83680
2043 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2044 test for d.testing.
2046 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2048 PR target/83387
2049 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2050 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2052 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2054 PR debug/83666
2055 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2056 is BLKmode and bitpos not zero or mode change is needed.
2058 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2060 PR target/83675
2061 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2062 TARGET_VIS2.
2064 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2066 PR target/83628
2067 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2068 instead of MULT rtx. Update all corresponding splitters.
2069 (*saddl_se): Ditto.
2070 (*ssub<modesuffix>): Ditto.
2071 (*ssubl_se): Ditto.
2072 (*cmp_sadd_di): Update split patterns.
2073 (*cmp_sadd_si): Ditto.
2074 (*cmp_sadd_sidi): Ditto.
2075 (*cmp_ssub_di): Ditto.
2076 (*cmp_ssub_si): Ditto.
2077 (*cmp_ssub_sidi): Ditto.
2078 * config/alpha/predicates.md (const23_operand): New predicate.
2079 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2080 Look for ASHIFT, not MULT inner operand.
2081 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2083 2018-01-04 Martin Liska <mliska@suse.cz>
2085 PR gcov-profile/83669
2086 * gcov.c (output_intermediate_file): Add version to intermediate
2087 gcov file.
2088 * doc/gcov.texi: Document new field 'version' in intermediate
2089 file format. Fix location of '-k' option of gcov command.
2091 2018-01-04 Martin Liska <mliska@suse.cz>
2093 PR ipa/82352
2094 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2096 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2098 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2100 2018-01-03 Martin Sebor <msebor@redhat.com>
2102 PR tree-optimization/83655
2103 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2104 checking calls with invalid arguments.
2106 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2108 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2109 (vectorizable_mask_load_store): Delete.
2110 (vectorizable_call): Return false for masked loads and stores.
2111 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2112 instead of gimple_assign_rhs1.
2113 (vectorizable_load): Handle IFN_MASK_LOAD.
2114 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2116 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2118 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2119 split out from..,
2120 (vectorizable_mask_load_store): ...here.
2121 (vectorizable_load): ...and here.
2123 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2125 * tree-vect-stmts.c (vect_build_all_ones_mask)
2126 (vect_build_zero_merge_argument): New functions, split out from...
2127 (vectorizable_load): ...here.
2129 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2131 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2132 split out from...
2133 (vectorizable_mask_load_store): ...here.
2134 (vectorizable_store): ...and here.
2136 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2138 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2139 split out from...
2140 (vectorizable_mask_load_store): ...here.
2142 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2144 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2145 (vect_model_store_cost): Take a vec_load_store_type instead of a
2146 vect_def_type.
2147 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2148 (vect_model_store_cost): Take a vec_load_store_type instead of a
2149 vect_def_type.
2150 (vectorizable_mask_load_store): Update accordingly.
2151 (vectorizable_store): Likewise.
2152 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2154 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2156 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2157 IFN_MASK_LOAD calls here rather than...
2158 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2160 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2161 Alan Hayward <alan.hayward@arm.com>
2162 David Sherwood <david.sherwood@arm.com>
2164 * expmed.c (extract_bit_field_1): For vector extracts,
2165 fall back to extract_bit_field_as_subreg if vec_extract
2166 isn't available.
2168 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2169 Alan Hayward <alan.hayward@arm.com>
2170 David Sherwood <david.sherwood@arm.com>
2172 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2173 they are variable or constant sized.
2174 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2175 slots for constant-sized data.
2177 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2178 Alan Hayward <alan.hayward@arm.com>
2179 David Sherwood <david.sherwood@arm.com>
2181 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2182 handling COND_EXPRs with boolean comparisons, try to find a better
2183 basis for the mask type than the boolean itself.
2185 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2187 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2188 is calculated and how it can be overridden.
2189 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2190 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2191 if defined.
2192 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2193 if nonzero.
2195 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2196 Alan Hayward <alan.hayward@arm.com>
2197 David Sherwood <david.sherwood@arm.com>
2199 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2200 Remove the mode argument.
2201 (aarch64_simd_valid_immediate): Remove the mode and inverse
2202 arguments.
2203 * config/aarch64/iterators.md (bitsize): New iterator.
2204 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2205 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2206 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2207 aarch64_simd_valid_immediate.
2208 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2209 (aarch64_reg_or_bic_imm): Likewise.
2210 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2211 with an insn_type enum and msl with a modifier_type enum.
2212 Replace element_width with a scalar_mode. Change the shift
2213 to unsigned int. Add constructors for scalar_float_mode and
2214 scalar_int_mode elements.
2215 (aarch64_vect_float_const_representable_p): Delete.
2216 (aarch64_can_const_movi_rtx_p)
2217 (aarch64_simd_scalar_immediate_valid_for_move)
2218 (aarch64_simd_make_constant): Update call to
2219 aarch64_simd_valid_immediate.
2220 (aarch64_advsimd_valid_immediate_hs): New function.
2221 (aarch64_advsimd_valid_immediate): Likewise.
2222 (aarch64_simd_valid_immediate): Remove mode and inverse
2223 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2224 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2225 and aarch64_float_const_representable_p on the result.
2226 (aarch64_output_simd_mov_immediate): Remove mode argument.
2227 Update call to aarch64_simd_valid_immediate and use of
2228 simd_immediate_info.
2229 (aarch64_output_scalar_simd_mov_immediate): Update call
2230 accordingly.
2232 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2233 Alan Hayward <alan.hayward@arm.com>
2234 David Sherwood <david.sherwood@arm.com>
2236 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2237 (mode_nunits): Likewise CONST_MODE_NUNITS.
2238 * machmode.def (ADJUST_NUNITS): Document.
2239 * genmodes.c (mode_data::need_nunits_adj): New field.
2240 (blank_mode): Update accordingly.
2241 (adj_nunits): New variable.
2242 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2243 parameter.
2244 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2245 listed in adj_nunits.
2246 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2247 listed in adj_nunits. Don't emit case statements for such modes.
2248 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2249 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2250 nothing if adj_nunits is nonnull.
2251 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2252 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2253 (emit_mode_fbit): Update use of print_maybe_const_decl.
2254 (emit_move_size): Likewise. Treat the array as non-const
2255 if adj_nunits.
2256 (emit_mode_adjustments): Handle adj_nunits.
2258 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2260 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2261 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2262 (VECTOR_MODES): Use it.
2263 (make_vector_modes): Take the prefix as an argument.
2265 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2266 Alan Hayward <alan.hayward@arm.com>
2267 David Sherwood <david.sherwood@arm.com>
2269 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2270 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2271 for MODE_VECTOR_BOOL.
2272 * machmode.def (VECTOR_BOOL_MODE): Document.
2273 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2274 (make_vector_bool_mode): New function.
2275 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2276 MODE_VECTOR_BOOL.
2277 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2278 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2279 Likewise.
2280 * stor-layout.c (int_mode_for_mode): Likewise.
2281 * tree.c (build_vector_type_for_mode): Likewise.
2282 * varasm.c (output_constant_pool_2): Likewise.
2283 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2284 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2285 for MODE_VECTOR_BOOL.
2286 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2287 of mode class checks.
2288 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2289 instead of a list of mode class checks.
2290 (expand_vector_scalar_condition): Likewise.
2291 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2293 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2294 Alan Hayward <alan.hayward@arm.com>
2295 David Sherwood <david.sherwood@arm.com>
2297 * machmode.h (mode_size): Change from unsigned short to
2298 poly_uint16_pod.
2299 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2300 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2301 or if measurement_type is not polynomial.
2302 (fixed_size_mode::includes_p): Check for constant-sized modes.
2303 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2304 return a poly_uint16 rather than an unsigned short.
2305 (emit_mode_size): Change the type of mode_size from unsigned short
2306 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2307 (emit_mode_adjustments): Cope with polynomial vector sizes.
2308 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2309 for GET_MODE_SIZE.
2310 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2311 for GET_MODE_SIZE.
2312 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2313 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2314 * caller-save.c (setup_save_areas): Likewise.
2315 (replace_reg_with_saved_mem): Likewise.
2316 * calls.c (emit_library_call_value_1): Likewise.
2317 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2318 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2319 (gen_lowpart_for_combine): Likewise.
2320 * convert.c (convert_to_integer_1): Likewise.
2321 * cse.c (equiv_constant, cse_insn): Likewise.
2322 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2323 (cselib_subst_to_values): Likewise.
2324 * dce.c (word_dce_process_block): Likewise.
2325 * df-problems.c (df_word_lr_mark_ref): Likewise.
2326 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2327 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2328 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2329 (rtl_for_decl_location): Likewise.
2330 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2331 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2332 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2333 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2334 (expand_expr_real_1): Likewise.
2335 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2336 (pad_below): Likewise.
2337 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2338 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2339 * ira.c (get_subreg_tracking_sizes): Likewise.
2340 * ira-build.c (ira_create_allocno_objects): Likewise.
2341 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2342 (ira_sort_regnos_for_alter_reg): Likewise.
2343 * ira-costs.c (record_operand_costs): Likewise.
2344 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2345 (resolve_simple_move): Likewise.
2346 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2347 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2348 (lra_constraints): Likewise.
2349 (CONST_POOL_OK_P): Reject variable-sized modes.
2350 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2351 (add_pseudo_to_slot, lra_spill): Likewise.
2352 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2353 * optabs-query.c (get_best_extraction_insn): Likewise.
2354 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2355 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2356 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2357 * recog.c (offsettable_address_addr_space_p): Likewise.
2358 * regcprop.c (maybe_mode_change): Likewise.
2359 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2360 * regrename.c (build_def_use): Likewise.
2361 * regstat.c (dump_reg_info): Likewise.
2362 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2363 (find_reloads, find_reloads_subreg_address): Likewise.
2364 * reload1.c (eliminate_regs_1): Likewise.
2365 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2366 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2367 (simplify_binary_operation_1, simplify_subreg): Likewise.
2368 * targhooks.c (default_function_arg_padding): Likewise.
2369 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2370 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2371 (verify_gimple_assign_ternary): Likewise.
2372 * tree-inline.c (estimate_move_cost): Likewise.
2373 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2374 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2375 (get_address_cost_ainc): Likewise.
2376 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2377 (vect_supportable_dr_alignment): Likewise.
2378 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2379 (vectorizable_reduction): Likewise.
2380 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2381 (vectorizable_operation, vectorizable_load): Likewise.
2382 * tree.c (build_same_sized_truth_vector_type): Likewise.
2383 * valtrack.c (cleanup_auto_inc_dec): Likewise.
2384 * var-tracking.c (emit_note_insn_var_location): Likewise.
2385 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2386 (ADDR_VEC_ALIGN): Likewise.
2388 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2389 Alan Hayward <alan.hayward@arm.com>
2390 David Sherwood <david.sherwood@arm.com>
2392 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2393 unsigned short.
2394 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2395 or if measurement_type is polynomial.
2396 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2397 * combine.c (make_extraction): Likewise.
2398 * dse.c (find_shift_sequence): Likewise.
2399 * dwarf2out.c (mem_loc_descriptor): Likewise.
2400 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2401 (extract_bit_field, extract_low_bits): Likewise.
2402 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2403 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2404 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2405 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2406 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2407 * reload.c (find_reloads): Likewise.
2408 * reload1.c (alter_reg): Likewise.
2409 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2410 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2411 * tree-if-conv.c (predicate_mem_writes): Likewise.
2412 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2413 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2414 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2415 * valtrack.c (dead_debug_insert_temp): Likewise.
2416 * varasm.c (mergeable_constant_section): Likewise.
2417 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2419 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2420 Alan Hayward <alan.hayward@arm.com>
2421 David Sherwood <david.sherwood@arm.com>
2423 * expr.c (expand_assignment): Cope with polynomial mode sizes
2424 when assigning to a CONCAT.
2426 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2427 Alan Hayward <alan.hayward@arm.com>
2428 David Sherwood <david.sherwood@arm.com>
2430 * machmode.h (mode_precision): Change from unsigned short to
2431 poly_uint16_pod.
2432 (mode_to_precision): Return a poly_uint16 rather than an unsigned
2433 short.
2434 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2435 or if measurement_type is not polynomial.
2436 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
2437 in which the mode is already known to be a scalar_int_mode.
2438 * genmodes.c (emit_mode_precision): Change the type of mode_precision
2439 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
2440 initializer.
2441 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2442 for GET_MODE_PRECISION.
2443 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2444 for GET_MODE_PRECISION.
2445 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2446 as polynomial.
2447 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2448 (expand_field_assignment, make_extraction): Likewise.
2449 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2450 (get_last_value): Likewise.
2451 * convert.c (convert_to_integer_1): Likewise.
2452 * cse.c (cse_insn): Likewise.
2453 * expr.c (expand_expr_real_1): Likewise.
2454 * lra-constraints.c (simplify_operand_subreg): Likewise.
2455 * optabs-query.c (can_atomic_load_p): Likewise.
2456 * optabs.c (expand_atomic_load): Likewise.
2457 (expand_atomic_store): Likewise.
2458 * ree.c (combine_reaching_defs): Likewise.
2459 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2460 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2461 * tree.h (type_has_mode_precision_p): Likewise.
2462 * ubsan.c (instrument_si_overflow): Likewise.
2464 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2465 Alan Hayward <alan.hayward@arm.com>
2466 David Sherwood <david.sherwood@arm.com>
2468 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2469 polynomial numbers of units.
2470 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2471 (valid_vector_subparts_p): New function.
2472 (build_vector_type): Remove temporary shim and take the number
2473 of units as a poly_uint64 rather than an int.
2474 (build_opaque_vector_type): Take the number of units as a
2475 poly_uint64 rather than an int.
2476 * tree.c (build_vector_from_ctor): Handle polynomial
2477 TYPE_VECTOR_SUBPARTS.
2478 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2479 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2480 (build_vector_from_val): If the number of units is variable,
2481 use build_vec_duplicate_cst for constant operands and
2482 VEC_DUPLICATE_EXPR otherwise.
2483 (make_vector_type): Remove temporary is_constant ().
2484 (build_vector_type, build_opaque_vector_type): Take the number of
2485 units as a poly_uint64 rather than an int.
2486 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2487 VECTOR_CST_NELTS.
2488 * cfgexpand.c (expand_debug_expr): Likewise.
2489 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2490 (store_constructor, expand_expr_real_1): Likewise.
2491 (const_scalar_mask_from_tree): Likewise.
2492 * fold-const-call.c (fold_const_reduction): Likewise.
2493 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2494 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2495 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2496 (fold_relational_const): Likewise.
2497 (native_interpret_vector): Likewise. Change the size from an
2498 int to an unsigned int.
2499 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2500 TYPE_VECTOR_SUBPARTS.
2501 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2502 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2503 duplicating a non-constant operand into a variable-length vector.
2504 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2505 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2506 * ipa-icf.c (sem_variable::equals): Likewise.
2507 * match.pd: Likewise.
2508 * omp-simd-clone.c (simd_clone_subparts): Likewise.
2509 * print-tree.c (print_node): Likewise.
2510 * stor-layout.c (layout_type): Likewise.
2511 * targhooks.c (default_builtin_vectorization_cost): Likewise.
2512 * tree-cfg.c (verify_gimple_comparison): Likewise.
2513 (verify_gimple_assign_binary): Likewise.
2514 (verify_gimple_assign_ternary): Likewise.
2515 (verify_gimple_assign_single): Likewise.
2516 * tree-pretty-print.c (dump_generic_node): Likewise.
2517 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2518 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2519 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2520 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2521 (vect_shift_permute_load_chain): Likewise.
2522 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2523 (expand_vector_condition, optimize_vector_constructor): Likewise.
2524 (lower_vec_perm, get_compute_type): Likewise.
2525 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2526 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2527 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2528 (vect_recog_mask_conversion_pattern): Likewise.
2529 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2530 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2531 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2532 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2533 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2534 (vectorizable_shift, vectorizable_operation, vectorizable_store)
2535 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2536 (supportable_widening_operation): Likewise.
2537 (supportable_narrowing_operation): Likewise.
2538 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2539 Likewise.
2540 * varasm.c (output_constant): Likewise.
2542 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2543 Alan Hayward <alan.hayward@arm.com>
2544 David Sherwood <david.sherwood@arm.com>
2546 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
2547 so that both the length == 3 and length != 3 cases set up their
2548 own permute vectors. Add comments explaining why we know the
2549 number of elements is constant.
2550 (vect_permute_load_chain): Likewise.
2552 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2553 Alan Hayward <alan.hayward@arm.com>
2554 David Sherwood <david.sherwood@arm.com>
2556 * machmode.h (mode_nunits): Change from unsigned char to
2557 poly_uint16_pod.
2558 (ONLY_FIXED_SIZE_MODES): New macro.
2559 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
2560 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
2561 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
2562 New typedefs.
2563 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
2564 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
2565 or if measurement_type is not polynomial.
2566 * genmodes.c (ZERO_COEFFS): New macro.
2567 (emit_mode_nunits_inline): Make mode_nunits_inline return a
2568 poly_uint16.
2569 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
2570 Use ZERO_COEFFS when emitting initializers.
2571 * data-streamer.h (bp_pack_poly_value): New function.
2572 (bp_unpack_poly_value): Likewise.
2573 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2574 for GET_MODE_NUNITS.
2575 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2576 for GET_MODE_NUNITS.
2577 * tree.c (make_vector_type): Remove temporary shim and make
2578 the real function take the number of units as a poly_uint64
2579 rather than an int.
2580 (build_vector_type_for_mode): Handle polynomial nunits.
2581 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
2582 * emit-rtl.c (const_vec_series_p_1): Likewise.
2583 (gen_rtx_CONST_VECTOR): Likewise.
2584 * fold-const.c (test_vec_duplicate_folding): Likewise.
2585 * genrecog.c (validate_pattern): Likewise.
2586 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
2587 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2588 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
2589 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
2590 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
2591 * rtlanal.c (subreg_get_info): Likewise.
2592 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2593 (vect_grouped_load_supported): Likewise.
2594 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
2595 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
2596 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
2597 (simplify_const_unary_operation, simplify_binary_operation_1)
2598 (simplify_const_binary_operation, simplify_ternary_operation)
2599 (test_vector_ops_duplicate, test_vector_ops): Likewise.
2600 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
2601 instead of CONST_VECTOR_NUNITS.
2602 * varasm.c (output_constant_pool_2): Likewise.
2603 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
2604 explicit-encoded elements in the XVEC for variable-length vectors.
2606 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2608 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
2610 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2611 Alan Hayward <alan.hayward@arm.com>
2612 David Sherwood <david.sherwood@arm.com>
2614 * coretypes.h (fixed_size_mode): Declare.
2615 (fixed_size_mode_pod): New typedef.
2616 * builtins.h (target_builtins::x_apply_args_mode)
2617 (target_builtins::x_apply_result_mode): Change type to
2618 fixed_size_mode_pod.
2619 * builtins.c (apply_args_size, apply_result_size, result_vector)
2620 (expand_builtin_apply_args_1, expand_builtin_apply)
2621 (expand_builtin_return): Update accordingly.
2623 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2625 * cse.c (hash_rtx_cb): Hash only the encoded elements.
2626 * cselib.c (cselib_hash_rtx): Likewise.
2627 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
2628 CONST_VECTOR encoding.
2630 2017-01-03 Jakub Jelinek <jakub@redhat.com>
2631 Jeff Law <law@redhat.com>
2633 PR target/83641
2634 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
2635 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
2636 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
2637 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
2639 PR target/83641
2640 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
2641 explicitly probe *sp in a noreturn function if there were any callee
2642 register saves or frame pointer is needed.
2644 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2646 PR debug/83621
2647 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
2648 BLKmode for ternary, binary or unary expressions.
2650 PR debug/83645
2651 * var-tracking.c (delete_vta_debug_insn): New inline function.
2652 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
2653 insns from get_insns () to NULL instead of each bb separately.
2654 Use delete_vta_debug_insn. No longer static.
2655 (vt_debug_insns_local, variable_tracking_main_1): Adjust
2656 delete_vta_debug_insns callers.
2657 * rtl.h (delete_vta_debug_insns): Declare.
2658 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
2659 instead of variable_tracking_main.
2661 2018-01-03 Martin Sebor <msebor@redhat.com>
2663 PR tree-optimization/83603
2664 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
2665 arguments past the endof the argument list in functions declared
2666 without a prototype.
2667 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
2668 Avoid checking when arguments are null.
2670 2018-01-03 Martin Sebor <msebor@redhat.com>
2672 PR c/83559
2673 * doc/extend.texi (attribute const): Fix a typo.
2674 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
2675 issuing -Wsuggest-attribute for void functions.
2677 2018-01-03 Martin Sebor <msebor@redhat.com>
2679 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
2680 offset_int::from instead of wide_int::to_shwi.
2681 (maybe_diag_overlap): Remove assertion.
2682 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
2683 * gimple-ssa-sprintf.c (format_directive): Same.
2684 (parse_directive): Same.
2685 (sprintf_dom_walker::compute_format_length): Same.
2686 (try_substitute_return_value): Same.
2688 2017-01-03 Jeff Law <law@redhat.com>
2690 PR middle-end/83654
2691 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
2692 non-constant residual for zero at runtime and avoid probing in
2693 that case. Reorganize code for trailing problem to mirror handling
2694 of the residual.
2696 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2698 PR tree-optimization/83501
2699 * tree-ssa-strlen.c (get_string_cst): New.
2700 (handle_char_store): Call get_string_cst.
2702 2018-01-03 Martin Liska <mliska@suse.cz>
2704 PR tree-optimization/83593
2705 * tree-ssa-strlen.c: Include tree-cfg.h.
2706 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
2707 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
2708 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
2709 to false.
2710 (strlen_dom_walker::before_dom_children): Call
2711 gimple_purge_dead_eh_edges. Dump tranformation with details
2712 dump flags.
2713 (strlen_dom_walker::before_dom_children): Update call by adding
2714 new argument cleanup_eh.
2715 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
2717 2018-01-03 Martin Liska <mliska@suse.cz>
2719 PR ipa/83549
2720 * cif-code.def (VARIADIC_THUNK): New enum value.
2721 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
2722 thunks.
2724 2018-01-03 Jan Beulich <jbeulich@suse.com>
2726 * sse.md (mov<mode>_internal): Tighten condition for when to use
2727 vmovdqu<ssescalarsize> for TI and OI modes.
2729 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2731 Update copyright years.
2733 2018-01-03 Martin Liska <mliska@suse.cz>
2735 PR ipa/83594
2736 * ipa-visibility.c (function_and_variable_visibility): Skip
2737 functions with noipa attribure.
2739 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2741 * gcc.c (process_command): Update copyright notice dates.
2742 * gcov-dump.c (print_version): Ditto.
2743 * gcov.c (print_version): Ditto.
2744 * gcov-tool.c (print_version): Ditto.
2745 * gengtype.c (create_file): Ditto.
2746 * doc/cpp.texi: Bump @copying's copyright year.
2747 * doc/cppinternals.texi: Ditto.
2748 * doc/gcc.texi: Ditto.
2749 * doc/gccint.texi: Ditto.
2750 * doc/gcov.texi: Ditto.
2751 * doc/install.texi: Ditto.
2752 * doc/invoke.texi: Ditto.
2754 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2756 * vector-builder.h (vector_builder::m_full_nelts): Change from
2757 unsigned int to poly_uint64.
2758 (vector_builder::full_nelts): Update prototype accordingly.
2759 (vector_builder::new_vector): Likewise.
2760 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
2761 (vector_builder::operator ==): Likewise.
2762 (vector_builder::finalize): Likewise.
2763 * int-vector-builder.h (int_vector_builder::int_vector_builder):
2764 Take the number of elements as a poly_uint64 rather than an
2765 unsigned int.
2766 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
2767 from unsigned int to poly_uint64.
2768 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
2769 (vec_perm_indices::new_vector): Likewise.
2770 (vec_perm_indices::length): Likewise.
2771 (vec_perm_indices::nelts_per_input): Likewise.
2772 (vec_perm_indices::input_nelts): Likewise.
2773 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
2774 number of elements per input as a poly_uint64 rather than an
2775 unsigned int. Use the original encoding for variable-length
2776 vectors, rather than clamping each individual element.
2777 For the second and subsequent elements in each pattern,
2778 clamp the step and base before clamping their sum.
2779 (vec_perm_indices::series_p): Handle polynomial element counts.
2780 (vec_perm_indices::all_in_range_p): Likewise.
2781 (vec_perm_indices_to_tree): Likewise.
2782 (vec_perm_indices_to_rtx): Likewise.
2783 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
2784 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
2785 (tree_vector_builder::new_binary_operation): Handle polynomial
2786 element counts. Return false if we need to know the number
2787 of elements at compile time.
2788 * fold-const.c (fold_vec_perm): Punt if the number of elements
2789 isn't known at compile time.
2791 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2793 * vec-perm-indices.h (vec_perm_builder): Change element type
2794 from HOST_WIDE_INT to poly_int64.
2795 (vec_perm_indices::element_type): Update accordingly.
2796 (vec_perm_indices::clamp): Handle polynomial element_types.
2797 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
2798 (vec_perm_indices::all_in_range_p): Likewise.
2799 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
2800 than shwi trees.
2801 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
2802 polynomial vec_perm_indices element types.
2803 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
2804 * fold-const.c (fold_vec_perm): Likewise.
2805 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
2806 * tree-vect-generic.c (lower_vec_perm): Likewise.
2807 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
2808 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
2809 element type to HOST_WIDE_INT.
2811 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2812 Alan Hayward <alan.hayward@arm.com>
2813 David Sherwood <david.sherwood@arm.com>
2815 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
2816 rather than an int. Use plus_constant.
2817 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
2818 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
2820 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2821 Alan Hayward <alan.hayward@arm.com>
2822 David Sherwood <david.sherwood@arm.com>
2824 * calls.c (emit_call_1, expand_call): Change struct_value_size from
2825 a HOST_WIDE_INT to a poly_int64.
2827 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2828 Alan Hayward <alan.hayward@arm.com>
2829 David Sherwood <david.sherwood@arm.com>
2831 * calls.c (load_register_parameters): Cope with polynomial
2832 mode sizes. Require a constant size for BLKmode parameters
2833 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
2834 forces a parameter to be padded at the lsb end in order to
2835 fill a complete number of words, require the parameter size
2836 to be ordered wrt UNITS_PER_WORD.
2838 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2839 Alan Hayward <alan.hayward@arm.com>
2840 David Sherwood <david.sherwood@arm.com>
2842 * reload1.c (spill_stack_slot_width): Change element type
2843 from unsigned int to poly_uint64_pod.
2844 (alter_reg): Treat mode sizes as polynomial.
2846 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2847 Alan Hayward <alan.hayward@arm.com>
2848 David Sherwood <david.sherwood@arm.com>
2850 * reload.c (complex_word_subreg_p): New function.
2851 (reload_inner_reg_of_subreg, push_reload): Use it.
2853 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2854 Alan Hayward <alan.hayward@arm.com>
2855 David Sherwood <david.sherwood@arm.com>
2857 * lra-constraints.c (process_alt_operands): Reject matched
2858 operands whose sizes aren't ordered.
2859 (match_reload): Refer to this check here.
2861 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2862 Alan Hayward <alan.hayward@arm.com>
2863 David Sherwood <david.sherwood@arm.com>
2865 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
2866 that the mode size is in the set {1, 2, 4, 8, 16}.
2868 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2869 Alan Hayward <alan.hayward@arm.com>
2870 David Sherwood <david.sherwood@arm.com>
2872 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
2873 Use plus_constant instead of gen_rtx_PLUS.
2875 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2876 Alan Hayward <alan.hayward@arm.com>
2877 David Sherwood <david.sherwood@arm.com>
2879 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
2880 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
2881 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
2882 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
2883 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
2884 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
2885 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
2886 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
2887 * config/i386/i386.c (ix86_push_rounding): ...this new function.
2888 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
2889 a poly_int64.
2890 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
2891 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
2892 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
2893 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
2894 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
2895 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
2896 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
2897 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
2898 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
2899 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
2900 function.
2901 * expr.c (emit_move_resolve_push): Treat the input and result
2902 of PUSH_ROUNDING as a poly_int64.
2903 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
2904 (emit_push_insn): Likewise.
2905 * lra-eliminations.c (mark_not_eliminable): Likewise.
2906 * recog.c (push_operand): Likewise.
2907 * reload1.c (elimination_effects): Likewise.
2908 * rtlanal.c (nonzero_bits1): Likewise.
2909 * calls.c (store_one_arg): Likewise. Require the padding to be
2910 known at compile time.
2912 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2913 Alan Hayward <alan.hayward@arm.com>
2914 David Sherwood <david.sherwood@arm.com>
2916 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
2917 Use plus_constant instead of gen_rtx_PLUS.
2919 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2920 Alan Hayward <alan.hayward@arm.com>
2921 David Sherwood <david.sherwood@arm.com>
2923 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
2924 rather than an int.
2926 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2927 Alan Hayward <alan.hayward@arm.com>
2928 David Sherwood <david.sherwood@arm.com>
2930 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
2931 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
2932 via stack temporaries. Treat the mode size as polynomial too.
2934 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2935 Alan Hayward <alan.hayward@arm.com>
2936 David Sherwood <david.sherwood@arm.com>
2938 * expr.c (expand_expr_real_2): When handling conversions involving
2939 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
2940 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
2941 as a poly_uint64 too.
2943 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2944 Alan Hayward <alan.hayward@arm.com>
2945 David Sherwood <david.sherwood@arm.com>
2947 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
2949 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2950 Alan Hayward <alan.hayward@arm.com>
2951 David Sherwood <david.sherwood@arm.com>
2953 * combine.c (can_change_dest_mode): Handle polynomial
2954 REGMODE_NATURAL_SIZE.
2955 * expmed.c (store_bit_field_1): Likewise.
2956 * expr.c (store_constructor): Likewise.
2957 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
2958 and polynomial REGMODE_NATURAL_SIZE.
2959 (gen_lowpart_common): Likewise.
2960 * reginfo.c (record_subregs_of_mode): Likewise.
2961 * rtlanal.c (read_modify_subreg_p): Likewise.
2963 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2964 Alan Hayward <alan.hayward@arm.com>
2965 David Sherwood <david.sherwood@arm.com>
2967 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
2968 numbers of elements.
2970 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2971 Alan Hayward <alan.hayward@arm.com>
2972 David Sherwood <david.sherwood@arm.com>
2974 * match.pd: Cope with polynomial numbers of vector elements.
2976 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2977 Alan Hayward <alan.hayward@arm.com>
2978 David Sherwood <david.sherwood@arm.com>
2980 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
2981 in a POINTER_PLUS_EXPR.
2983 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2984 Alan Hayward <alan.hayward@arm.com>
2985 David Sherwood <david.sherwood@arm.com>
2987 * omp-simd-clone.c (simd_clone_subparts): New function.
2988 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
2989 (ipa_simd_modify_function_body): Likewise.
2991 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2992 Alan Hayward <alan.hayward@arm.com>
2993 David Sherwood <david.sherwood@arm.com>
2995 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
2996 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
2997 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
2998 (expand_vector_condition, vector_element): Likewise.
2999 (subparts_gt): New function.
3000 (get_compute_type): Use subparts_gt.
3001 (count_type_subparts): Delete.
3002 (expand_vector_operations_1): Use subparts_gt instead of
3003 count_type_subparts.
3005 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3006 Alan Hayward <alan.hayward@arm.com>
3007 David Sherwood <david.sherwood@arm.com>
3009 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3010 (vect_compile_time_alias): ...this new function. Do the calculation
3011 on poly_ints rather than trees.
3012 (vect_prune_runtime_alias_test_list): Update call accordingly.
3014 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3015 Alan Hayward <alan.hayward@arm.com>
3016 David Sherwood <david.sherwood@arm.com>
3018 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3019 numbers of units.
3020 (vect_schedule_slp_instance): Likewise.
3022 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3023 Alan Hayward <alan.hayward@arm.com>
3024 David Sherwood <david.sherwood@arm.com>
3026 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3027 constant and extern definitions for variable-length vectors.
3028 (vect_get_constant_vectors): Note that the number of units
3029 is known to be constant.
3031 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3032 Alan Hayward <alan.hayward@arm.com>
3033 David Sherwood <david.sherwood@arm.com>
3035 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3036 of units as polynomial. Choose between WIDE and NARROW based
3037 on multiple_p.
3039 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3040 Alan Hayward <alan.hayward@arm.com>
3041 David Sherwood <david.sherwood@arm.com>
3043 * tree-vect-stmts.c (simd_clone_subparts): New function.
3044 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3046 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3047 Alan Hayward <alan.hayward@arm.com>
3048 David Sherwood <david.sherwood@arm.com>
3050 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3051 vectors as polynomial. Use build_index_vector for
3052 IFN_GOMP_SIMD_LANE.
3054 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3055 Alan Hayward <alan.hayward@arm.com>
3056 David Sherwood <david.sherwood@arm.com>
3058 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3059 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3060 for variable-length vectors.
3061 (vectorizable_mask_load_store): Treat the number of units as
3062 polynomial, asserting that it is constant if the condition has
3063 already been enforced.
3064 (vectorizable_store, vectorizable_load): Likewise.
3066 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3067 Alan Hayward <alan.hayward@arm.com>
3068 David Sherwood <david.sherwood@arm.com>
3070 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3071 of units as polynomial. Punt if we can't tell at compile time
3072 which vector contains the final result.
3074 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3075 Alan Hayward <alan.hayward@arm.com>
3076 David Sherwood <david.sherwood@arm.com>
3078 * tree-vect-loop.c (vectorizable_induction): Treat the number
3079 of units as polynomial. Punt on SLP inductions. Use an integer
3080 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3081 cast of such a series for variable-length floating-point
3082 reductions.
3084 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3085 Alan Hayward <alan.hayward@arm.com>
3086 David Sherwood <david.sherwood@arm.com>
3088 * tree.h (build_index_vector): Declare.
3089 * tree.c (build_index_vector): New function.
3090 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3091 of units as polynomial, forcibly converting it to a constant if
3092 vectorizable_reduction has already enforced the condition.
3093 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3094 to create a {1,2,3,...} vector.
3095 (vectorizable_reduction): Treat the number of units as polynomial.
3096 Choose vectype_in based on the largest scalar element size rather
3097 than the smallest number of units. Enforce the restrictions
3098 relied on above.
3100 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3101 Alan Hayward <alan.hayward@arm.com>
3102 David Sherwood <david.sherwood@arm.com>
3104 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3105 number of units as polynomial.
3107 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3108 Alan Hayward <alan.hayward@arm.com>
3109 David Sherwood <david.sherwood@arm.com>
3111 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3112 * target.def (autovectorize_vector_sizes): Return the vector sizes
3113 by pointer, using vector_sizes rather than a bitmask.
3114 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3115 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3116 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3117 Likewise.
3118 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3119 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3120 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3121 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3122 * omp-general.c (omp_max_vf): Likewise.
3123 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3124 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3125 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3126 * tree-vect-slp.c (vect_slp_bb): Likewise.
3127 * doc/tm.texi: Regenerate.
3128 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3129 to a poly_uint64.
3130 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3131 the vector size as a poly_uint64 rather than an unsigned int.
3132 (current_vector_size): Change from an unsigned int to a poly_uint64.
3133 (get_vectype_for_scalar_type): Update accordingly.
3134 * tree.h (build_truth_vector_type): Take the size and number of
3135 units as a poly_uint64 rather than an unsigned int.
3136 (build_vector_type): Add a temporary overload that takes
3137 the number of units as a poly_uint64 rather than an unsigned int.
3138 * tree.c (make_vector_type): Likewise.
3139 (build_truth_vector_type): Take the number of units as a poly_uint64
3140 rather than an unsigned int.
3142 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3143 Alan Hayward <alan.hayward@arm.com>
3144 David Sherwood <david.sherwood@arm.com>
3146 * target.def (get_mask_mode): Take the number of units and length
3147 as poly_uint64s rather than unsigned ints.
3148 * targhooks.h (default_get_mask_mode): Update accordingly.
3149 * targhooks.c (default_get_mask_mode): Likewise.
3150 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3151 * doc/tm.texi: Regenerate.
3153 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3154 Alan Hayward <alan.hayward@arm.com>
3155 David Sherwood <david.sherwood@arm.com>
3157 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3158 * omp-general.c (omp_max_vf): Likewise.
3159 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3160 (expand_omp_simd): Handle polynomial safelen.
3161 * omp-low.c (omplow_simd_context): Add a default constructor.
3162 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3163 (lower_rec_simd_input_clauses): Update accordingly.
3164 (lower_rec_input_clauses): Likewise.
3166 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3167 Alan Hayward <alan.hayward@arm.com>
3168 David Sherwood <david.sherwood@arm.com>
3170 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3171 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3172 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3173 (vect_analyze_slp_cost): Likewise.
3174 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3175 (vect_model_load_cost): Likewise.
3177 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3178 Alan Hayward <alan.hayward@arm.com>
3179 David Sherwood <david.sherwood@arm.com>
3181 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3182 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3183 from an unsigned int * to a poly_uint64_pod *.
3184 (calculate_unrolling_factor): New function.
3185 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3187 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3188 Alan Hayward <alan.hayward@arm.com>
3189 David Sherwood <david.sherwood@arm.com>
3191 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3192 from an unsigned int to a poly_uint64.
3193 (_loop_vec_info::slp_unrolling_factor): Likewise.
3194 (_loop_vec_info::vectorization_factor): Change from an int
3195 to a poly_uint64.
3196 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3197 (vect_get_num_vectors): New function.
3198 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3199 (vect_get_num_copies): Use vect_get_num_vectors.
3200 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3201 to an unsigned int *.
3202 (vect_analyze_data_refs): Change min_vf from an int * to a
3203 poly_uint64 *.
3204 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3205 than an unsigned HOST_WIDE_INT.
3206 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3207 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3208 to an unsigned int *.
3209 (vect_analyze_data_ref_dependences): Likewise.
3210 (vect_compute_data_ref_alignment): Handle polynomial vf.
3211 (vect_enhance_data_refs_alignment): Likewise.
3212 (vect_prune_runtime_alias_test_list): Likewise.
3213 (vect_shift_permute_load_chain): Likewise.
3214 (vect_supportable_dr_alignment): Likewise.
3215 (dependence_distance_ge_vf): Take the vectorization factor as a
3216 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3217 (vect_analyze_data_refs): Change min_vf from an int * to a
3218 poly_uint64 *.
3219 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3220 vfm1 as a poly_uint64 rather than an int. Make the same change
3221 for the returned bound_scalar.
3222 (vect_gen_vector_loop_niters): Handle polynomial vf.
3223 (vect_do_peeling): Likewise. Update call to
3224 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3225 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3226 be constant.
3227 * tree-vect-loop.c (vect_determine_vectorization_factor)
3228 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3229 (vect_get_known_peeling_cost): Likewise.
3230 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3231 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3232 (vect_transform_loop): Likewise. Use the lowest possible VF when
3233 updating the upper bounds of the loop.
3234 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3235 rather than an int.
3236 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3237 polynomial unroll factors.
3238 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3239 (vect_make_slp_decision): Likewise.
3240 (vect_supported_load_permutation_p): Likewise, and polynomial
3241 vf too.
3242 (vect_analyze_slp_cost): Handle polynomial vf.
3243 (vect_slp_analyze_node_operations): Likewise.
3244 (vect_slp_analyze_bb_1): Likewise.
3245 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3246 than an unsigned HOST_WIDE_INT.
3247 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3248 (vectorizable_load): Handle polynomial vf.
3249 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3250 a poly_uint64.
3251 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3253 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3254 Alan Hayward <alan.hayward@arm.com>
3255 David Sherwood <david.sherwood@arm.com>
3257 * match.pd: Handle bit operations involving three constants
3258 and try to fold one pair.
3260 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3262 * tree-vect-loop-manip.c: Include gimple-fold.h.
3263 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3264 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3265 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3266 Add a path that uses a step of VF instead of 1, but disable it
3267 for now.
3268 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3269 and niters_no_overflow parameters. Update calls to
3270 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3271 Create a new SSA name if the latter choses to use a ste other
3272 than zero, and return it via niters_vector_mult_vf_var.
3273 * tree-vect-loop.c (vect_transform_loop): Update calls to
3274 vect_do_peeling, vect_gen_vector_loop_niters and
3275 slpeel_make_loop_iterate_ntimes.
3276 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3277 (vect_gen_vector_loop_niters): Update declarations after above changes.
3279 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3281 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3282 128-bit round to integer instructions.
3283 (ceil<mode>2): Likewise.
3284 (btrunc<mode>2): Likewise.
3285 (round<mode>2): Likewise.
3287 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3289 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3290 unaligned VSX load/store on P8/P9.
3291 (expand_block_clear): Allow the use of unaligned VSX
3292 load/store on P8/P9.
3294 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3296 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3297 New function.
3298 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3299 swap associated with both a load and a store.
3301 2018-01-02 Andrew Waterman <andrew@sifive.com>
3303 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3304 * config/riscv/riscv.md (clear_cache): Use it.
3306 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3308 * web.c: Remove out-of-date comment.
3310 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3312 * expr.c (fixup_args_size_notes): Check that any existing
3313 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3314 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3315 (emit_single_push_insn): ...here.
3317 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3319 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3320 (const_vector_encoded_nelts): New function.
3321 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3322 (const_vector_int_elt, const_vector_elt): Declare.
3323 * emit-rtl.c (const_vector_int_elt_1): New function.
3324 (const_vector_elt): Likewise.
3325 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3326 of CONST_VECTOR_ELT.
3328 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3330 * expr.c: Include rtx-vector-builder.h.
3331 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3332 directly on the tree encoding.
3333 (const_vector_from_tree): Likewise.
3334 * optabs.c: Include rtx-vector-builder.h.
3335 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3336 sequence of "u" values.
3337 * vec-perm-indices.c: Include rtx-vector-builder.h.
3338 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3339 directly on the vec_perm_indices encoding.
3341 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3343 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3344 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3345 * rtx-vector-builder.h: New file.
3346 * rtx-vector-builder.c: Likewise.
3347 * rtl.h (rtx_def::u2): Add a const_vector field.
3348 (CONST_VECTOR_NPATTERNS): New macro.
3349 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3350 (CONST_VECTOR_DUPLICATE_P): Likewise.
3351 (CONST_VECTOR_STEPPED_P): Likewise.
3352 (CONST_VECTOR_ENCODED_ELT): Likewise.
3353 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3354 (unwrap_const_vec_duplicate): Likewise.
3355 (const_vec_series_p): Check for a non-duplicated vector encoding.
3356 Say that the function only returns true for integer vectors.
3357 * emit-rtl.c: Include rtx-vector-builder.h.
3358 (gen_const_vec_duplicate_1): Delete.
3359 (gen_const_vector): Call gen_const_vec_duplicate instead of
3360 gen_const_vec_duplicate_1.
3361 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3362 (gen_const_vec_duplicate): Use rtx_vector_builder.
3363 (gen_const_vec_series): Likewise.
3364 (gen_rtx_CONST_VECTOR): Likewise.
3365 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3366 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3367 Build a new vector rather than modifying a CONST_VECTOR in-place.
3368 (handle_special_swappables): Update call accordingly.
3369 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3370 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3371 Build a new vector rather than modifying a CONST_VECTOR in-place.
3372 (handle_special_swappables): Update call accordingly.
3374 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3376 * simplify-rtx.c (simplify_const_binary_operation): Use
3377 CONST_VECTOR_ELT instead of XVECEXP.
3379 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3381 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3382 the selector elements to be different from the data elements
3383 if the selector is a VECTOR_CST.
3384 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3385 ssizetype for the selector.
3387 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3389 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3390 before testing each element individually.
3391 * tree-vect-generic.c (lower_vec_perm): Likewise.
3393 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3395 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3396 * selftest-run-tests.c (selftest::run_tests): Call it.
3397 * vector-builder.h (vector_builder::operator ==): New function.
3398 (vector_builder::operator !=): Likewise.
3399 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3400 (vec_perm_indices::all_from_input_p): New function.
3401 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3402 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3403 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3404 instead of reading the VECTOR_CST directly. Detect whether both
3405 vector inputs are the same before constructing the vec_perm_indices,
3406 and update the number of inputs argument accordingly. Use the
3407 utility functions added above. Only construct sel2 if we need to.
3409 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3411 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3412 the broadcast of the low byte.
3413 (expand_mult_highpart): Use an explicit encoding for the permutes.
3414 * optabs-query.c (can_mult_highpart_p): Likewise.
3415 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3416 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3417 (vectorizable_bswap): Likewise.
3418 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3419 explicit encoding for the power-of-2 permutes.
3420 (vect_permute_store_chain): Likewise.
3421 (vect_grouped_load_supported): Likewise.
3422 (vect_permute_load_chain): Likewise.
3424 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3426 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3427 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3428 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3429 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3430 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3431 (vect_gen_perm_mask_any): Likewise.
3433 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3435 * int-vector-builder.h: New file.
3436 * vec-perm-indices.h: Include int-vector-builder.h.
3437 (vec_perm_indices): Redefine as an int_vector_builder.
3438 (auto_vec_perm_indices): Delete.
3439 (vec_perm_builder): Redefine as a stand-alone class.
3440 (vec_perm_indices::vec_perm_indices): New function.
3441 (vec_perm_indices::clamp): Likewise.
3442 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3443 (vec_perm_indices::new_vector): New function.
3444 (vec_perm_indices::new_expanded_vector): Update for new
3445 vec_perm_indices class.
3446 (vec_perm_indices::rotate_inputs): New function.
3447 (vec_perm_indices::all_in_range_p): Operate directly on the
3448 encoded form, without computing elided elements.
3449 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3450 encoding. Update for new vec_perm_indices class.
3451 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3452 the given vec_perm_builder.
3453 (expand_vec_perm_var): Update vec_perm_builder constructor.
3454 (expand_mult_highpart): Use vec_perm_builder instead of
3455 auto_vec_perm_indices.
3456 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3457 vec_perm_indices instead of auto_vec_perm_indices. Use a single
3458 or double series encoding as appropriate.
3459 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3460 vec_perm_indices instead of auto_vec_perm_indices.
3461 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3462 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3463 (vect_permute_store_chain): Likewise.
3464 (vect_grouped_load_supported): Likewise.
3465 (vect_permute_load_chain): Likewise.
3466 (vect_shift_permute_load_chain): Likewise.
3467 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3468 (vect_transform_slp_perm_load): Likewise.
3469 (vect_schedule_slp_instance): Likewise.
3470 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3471 (vectorizable_mask_load_store): Likewise.
3472 (vectorizable_bswap): Likewise.
3473 (vectorizable_store): Likewise.
3474 (vectorizable_load): Likewise.
3475 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3476 vec_perm_indices instead of auto_vec_perm_indices. Use
3477 tree_to_vec_perm_builder to read the vector from a tree.
3478 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3479 vec_perm_builder instead of a vec_perm_indices.
3480 (have_whole_vector_shift): Use vec_perm_builder and
3481 vec_perm_indices instead of auto_vec_perm_indices. Leave the
3482 truncation to calc_vec_perm_mask_for_shift.
3483 (vect_create_epilog_for_reduction): Likewise.
3484 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3485 from auto_vec_perm_indices to vec_perm_indices.
3486 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3487 instead of changing individual elements.
3488 (aarch64_vectorize_vec_perm_const): Use new_vector to install
3489 the vector in d.perm.
3490 * config/arm/arm.c (expand_vec_perm_d::perm): Change
3491 from auto_vec_perm_indices to vec_perm_indices.
3492 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3493 instead of changing individual elements.
3494 (arm_vectorize_vec_perm_const): Use new_vector to install
3495 the vector in d.perm.
3496 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3497 Update vec_perm_builder constructor.
3498 (rs6000_expand_interleave): Likewise.
3499 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3500 (rs6000_expand_interleave): Likewise.
3502 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3504 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3505 to qimode could truncate the indices.
3506 * optabs.c (expand_vec_perm_var): Likewise.
3508 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3510 * Makefile.in (OBJS): Add vec-perm-indices.o.
3511 * vec-perm-indices.h: New file.
3512 * vec-perm-indices.c: Likewise.
3513 * target.h (vec_perm_indices): Replace with a forward class
3514 declaration.
3515 (auto_vec_perm_indices): Move to vec-perm-indices.h.
3516 * optabs.h: Include vec-perm-indices.h.
3517 (expand_vec_perm): Delete.
3518 (selector_fits_mode_p, expand_vec_perm_var): Declare.
3519 (expand_vec_perm_const): Declare.
3520 * target.def (vec_perm_const_ok): Replace with...
3521 (vec_perm_const): ...this new hook.
3522 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3523 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3524 * doc/tm.texi: Regenerate.
3525 * optabs.def (vec_perm_const): Delete.
3526 * doc/md.texi (vec_perm_const): Likewise.
3527 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3528 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3529 expand_vec_perm for constant permutation vectors. Assert that
3530 the mode of variable permutation vectors is the integer equivalent
3531 of the mode that is being permuted.
3532 * optabs-query.h (selector_fits_mode_p): Declare.
3533 * optabs-query.c: Include vec-perm-indices.h.
3534 (selector_fits_mode_p): New function.
3535 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3536 is defined, instead of checking whether the vec_perm_const_optab
3537 exists. Use targetm.vectorize.vec_perm_const instead of
3538 targetm.vectorize.vec_perm_const_ok. Check whether the indices
3539 fit in the vector mode before using a variable permute.
3540 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3541 vec_perm_indices instead of an rtx.
3542 (expand_vec_perm): Replace with...
3543 (expand_vec_perm_const): ...this new function. Take the selector
3544 as a vec_perm_indices rather than an rtx. Also take the mode of
3545 the selector. Update call to shift_amt_for_vec_perm_mask.
3546 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
3547 Use vec_perm_indices::new_expanded_vector to expand the original
3548 selector into bytes. Check whether the indices fit in the vector
3549 mode before using a variable permute.
3550 (expand_vec_perm_var): Make global.
3551 (expand_mult_highpart): Use expand_vec_perm_const.
3552 * fold-const.c: Includes vec-perm-indices.h.
3553 * tree-ssa-forwprop.c: Likewise.
3554 * tree-vect-data-refs.c: Likewise.
3555 * tree-vect-generic.c: Likewise.
3556 * tree-vect-loop.c: Likewise.
3557 * tree-vect-slp.c: Likewise.
3558 * tree-vect-stmts.c: Likewise.
3559 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
3560 Delete.
3561 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
3562 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
3563 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
3564 (aarch64_vectorize_vec_perm_const): ...this new function.
3565 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3566 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3567 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
3568 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
3569 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3570 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3571 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
3572 into...
3573 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
3574 check for NEON modes.
3575 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
3576 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
3577 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
3578 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
3579 into...
3580 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
3581 the old VEC_PERM_CONST conditions.
3582 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
3583 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
3584 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
3585 (ia64_vectorize_vec_perm_const_ok): Merge into...
3586 (ia64_vectorize_vec_perm_const): ...this new function.
3587 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
3588 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
3589 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
3590 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
3591 * config/mips/mips.c (mips_expand_vec_perm_const)
3592 (mips_vectorize_vec_perm_const_ok): Merge into...
3593 (mips_vectorize_vec_perm_const): ...this new function.
3594 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
3595 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
3596 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
3597 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
3598 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
3599 (rs6000_expand_vec_perm_const): Delete.
3600 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
3601 Delete.
3602 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3603 (altivec_expand_vec_perm_const_le): Take each operand individually.
3604 Operate on constant selectors rather than rtxes.
3605 (altivec_expand_vec_perm_const): Likewise. Update call to
3606 altivec_expand_vec_perm_const_le.
3607 (rs6000_expand_vec_perm_const): Delete.
3608 (rs6000_vectorize_vec_perm_const_ok): Delete.
3609 (rs6000_vectorize_vec_perm_const): New function.
3610 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3611 an element count and rtx array.
3612 (rs6000_expand_extract_even): Update call accordingly.
3613 (rs6000_expand_interleave): Likewise.
3614 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
3615 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
3616 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
3617 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
3618 (rs6000_expand_vec_perm_const): Delete.
3619 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3620 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3621 (altivec_expand_vec_perm_const_le): Take each operand individually.
3622 Operate on constant selectors rather than rtxes.
3623 (altivec_expand_vec_perm_const): Likewise. Update call to
3624 altivec_expand_vec_perm_const_le.
3625 (rs6000_expand_vec_perm_const): Delete.
3626 (rs6000_vectorize_vec_perm_const_ok): Delete.
3627 (rs6000_vectorize_vec_perm_const): New function. Remove stray
3628 reference to the SPE evmerge intructions.
3629 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3630 an element count and rtx array.
3631 (rs6000_expand_extract_even): Update call accordingly.
3632 (rs6000_expand_interleave): Likewise.
3633 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
3634 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
3635 new function.
3636 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3638 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3640 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
3641 vector mode and that that mode matches the mode of the data
3642 being permuted.
3643 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
3644 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
3645 directly using expand_vec_perm_1 when forcing selectors into
3646 registers.
3647 (expand_vec_perm_var): New function, split out from expand_vec_perm.
3649 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3651 * optabs-query.h (can_vec_perm_p): Delete.
3652 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
3653 * optabs-query.c (can_vec_perm_p): Split into...
3654 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
3655 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
3656 particular selector is valid.
3657 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3658 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3659 (vect_grouped_load_supported): Likewise.
3660 (vect_shift_permute_load_chain): Likewise.
3661 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3662 (vect_transform_slp_perm_load): Likewise.
3663 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3664 (vectorizable_bswap): Likewise.
3665 (vect_gen_perm_mask_checked): Likewise.
3666 * fold-const.c (fold_ternary_loc): Likewise. Don't take
3667 implementations of variable permutation vectors into account
3668 when deciding which selector to use.
3669 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
3670 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
3671 with a false third argument.
3672 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
3673 to test whether the constant selector is valid and can_vec_perm_var_p
3674 to test whether a variable selector is valid.
3676 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3678 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
3679 * optabs-query.c (can_vec_perm_p): Likewise.
3680 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
3681 instead of vec_perm_indices.
3682 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
3683 (vect_gen_perm_mask_checked): Likewise,
3684 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
3685 (vect_gen_perm_mask_checked): Likewise,
3687 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3689 * optabs-query.h (qimode_for_vec_perm): Declare.
3690 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
3691 (qimode_for_vec_perm): ...this new function.
3692 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
3694 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3696 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
3697 does not have a conditional at the top.
3699 2018-01-02 Richard Biener <rguenther@suse.de>
3701 * ipa-inline.c (big_speedup_p): Fix expression.
3703 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3705 PR target/81616
3706 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
3707 for generic 4->6.
3709 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3711 PR target/81616
3712 Generic tuning.
3713 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
3714 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
3715 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
3716 cond_taken_branch_cost 3->4.
3718 2018-01-01 Jakub Jelinek <jakub@redhat.com>
3720 PR tree-optimization/83581
3721 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
3722 TODO_cleanup_cfg if any changes have been made.
3724 PR middle-end/83608
3725 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
3726 convert_modes if target mode has the right side, but different mode
3727 class.
3729 PR middle-end/83609
3730 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
3731 last argument when extracting from CONCAT. If either from_real or
3732 from_imag is NULL, use expansion through memory. If result is not
3733 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
3734 the parts directly to inner mode, if even that fails, use expansion
3735 through memory.
3737 PR middle-end/83623
3738 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
3739 check for bswap in mode rather than HImode and use that in expand_unop
3740 too.
3741 \f
3742 Copyright (C) 2018 Free Software Foundation, Inc.
3744 Copying and distribution of this file, with or without modification,
3745 are permitted in any medium without royalty provided the copyright
3746 notice and this notice are preserved.