1 /* Compute cover class of the pseudos and their hard register costs.
2 Copyright (C) 2006, 2007
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
25 #include "coretypes.h"
27 #include "hard-reg-set.h"
32 #include "basic-block.h"
34 #include "addresses.h"
35 #include "insn-config.h"
42 /* The file contains code is analogous to one in regclass but the code
43 works on the pseudo basis. */
47 static void record_reg_classes (int, int, rtx
*, enum machine_mode
*,
48 const char **, rtx
, struct costs
*,
50 static inline int ok_for_index_p_nonstrict (rtx
);
51 static inline int ok_for_base_p_nonstrict (rtx
, enum machine_mode
,
52 enum rtx_code
, enum rtx_code
);
53 static void record_address_regs (enum machine_mode
, rtx x
, int,
54 enum rtx_code
, enum rtx_code
, int scale
);
55 static void record_operand_costs (rtx
, struct costs
*, enum reg_class
*);
56 static rtx
scan_one_insn (rtx
);
57 static void print_costs (FILE *);
58 static void process_bb_node_for_costs (struct ira_loop_tree_node
*);
59 static void find_pseudo_class_costs (void);
60 static void process_bb_node_for_hard_reg_moves (struct ira_loop_tree_node
*);
61 static void setup_pseudo_cover_class_and_costs (void);
63 #ifdef FORBIDDEN_INC_DEC_CLASSES
64 /* Indexed by n, is nonzero if (REG n) is used in an auto-inc or
66 static char *in_inc_dec
;
69 /* The `costs' struct records the cost of using a hard register of
70 each class and of using memory for each pseudo. We use this data
71 to set up register and costs. */
74 int cost
[N_REG_CLASSES
];
78 /* Record the cost of each class for each pseudo. */
79 static struct costs
*costs
;
81 /* Initialized once, and used to initialize cost values for each
83 static struct costs init_cost
;
85 /* Record register class preferences of each pseudo. */
86 static enum reg_class
*pseudo_pref
;
88 /* Allocated buffers for pseudo_pref. */
89 static enum reg_class
*pseudo_pref_buffer
;
91 /* Frequency of executions of the current insn. */
94 /* Map regno->pseudo for the current loop. */
95 static pseudo_t
*curr_regno_pseudo_map
;
97 /* Compute the cost of loading X into (if TO_P is nonzero) or from (if
98 TO_P is zero) a register of class CLASS in mode MODE. X must not
99 be a pseudo register. */
101 copy_cost (rtx x
, enum machine_mode mode
, enum reg_class
class, int to_p
,
102 secondary_reload_info
*prev_sri
)
104 secondary_reload_info sri
;
105 enum reg_class secondary_class
= NO_REGS
;
107 /* If X is a SCRATCH, there is actually nothing to move since we are
108 assuming optimal allocation. */
109 if (GET_CODE (x
) == SCRATCH
)
112 /* Get the class we will actually use for a reload. */
113 class = PREFERRED_RELOAD_CLASS (x
, class);
115 /* If we need a secondary reload for an intermediate, the cost is
116 that to load the input into the intermediate register, then to
118 sri
.prev_sri
= prev_sri
;
120 secondary_class
= targetm
.secondary_reload (to_p
, x
, class, mode
, &sri
);
122 if (secondary_class
!= NO_REGS
)
123 return (move_cost
[mode
] [secondary_class
] [class]
125 + copy_cost (x
, mode
, secondary_class
, to_p
, &sri
));
127 /* For memory, use the memory move cost, for (hard) registers, use
128 the cost to move between the register classes, and use 2 for
129 everything else (constants). */
130 if (MEM_P (x
) || class == NO_REGS
)
131 return sri
.extra_cost
+ memory_move_cost
[mode
] [class] [to_p
!= 0];
135 + move_cost
[mode
] [REGNO_REG_CLASS (REGNO (x
))] [class]);
137 /* If this is a constant, we may eventually want to call rtx_cost
139 return sri
.extra_cost
+ COSTS_N_INSNS (1);
144 /* Record the cost of using memory or registers of various classes for
145 the operands in INSN.
147 N_ALTS is the number of alternatives.
148 N_OPS is the number of operands.
149 OPS is an array of the operands.
150 MODES are the modes of the operands, in case any are VOIDmode.
151 CONSTRAINTS are the constraints to use for the operands. This array
152 is modified by this procedure.
154 This procedure works alternative by alternative. For each
155 alternative we assume that we will be able to allocate all pseudos
156 to their ideal register class and calculate the cost of using that
157 alternative. Then we compute for each operand that is a
158 pseudo-register, the cost of having the pseudo allocated to each
159 register class and using it in that alternative. To this cost is
160 added the cost of the alternative.
162 The cost of each class for this insn is its lowest cost among all
165 record_reg_classes (int n_alts
, int n_ops
, rtx
*ops
,
166 enum machine_mode
*modes
, const char **constraints
,
167 rtx insn
, struct costs
*op_costs
,
168 enum reg_class
*pseudo_pref
)
174 /* Process each alternative, each time minimizing an operand's cost
175 with the cost for each operand in that alternative. */
176 for (alt
= 0; alt
< n_alts
; alt
++)
178 struct costs this_op_costs
[MAX_RECOG_OPERANDS
];
179 enum reg_class classes
[MAX_RECOG_OPERANDS
];
180 int allows_mem
[MAX_RECOG_OPERANDS
];
185 for (i
= 0; i
< n_ops
; i
++)
188 const char *p
= constraints
[i
];
190 enum machine_mode mode
= modes
[i
];
194 /* Initially show we know nothing about the register class. */
195 classes
[i
] = NO_REGS
;
198 /* If this operand has no constraints at all, we can
199 conclude nothing about it since anything is valid. */
202 if (REG_P (op
) && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
203 memset (&this_op_costs
[i
], 0, sizeof this_op_costs
[i
]);
207 /* If this alternative is only relevant when this operand
208 matches a previous operand, we do different things
209 depending on whether this operand is a pseudo-reg or not.
210 We must process any modifiers for the operand before we
211 can make this test. */
212 while (*p
== '%' || *p
== '=' || *p
== '+' || *p
== '&')
215 if (p
[0] >= '0' && p
[0] <= '0' + i
&& (p
[1] == ',' || p
[1] == 0))
217 /* Copy class and whether memory is allowed from the
218 matching alternative. Then perform any needed cost
219 computations and/or adjustments. */
221 classes
[i
] = classes
[j
];
222 allows_mem
[i
] = allows_mem
[j
];
224 if (! REG_P (op
) || REGNO (op
) < FIRST_PSEUDO_REGISTER
)
226 /* If this matches the other operand, we have no
227 added cost and we win. */
228 if (rtx_equal_p (ops
[j
], op
))
230 /* If we can put the other operand into a register,
231 add to the cost of this alternative the cost to
232 copy this operand to the register used for the
234 else if (classes
[j
] != NO_REGS
)
236 alt_cost
+= copy_cost (op
, mode
, classes
[j
], 1, NULL
);
240 else if (! REG_P (ops
[j
])
241 || REGNO (ops
[j
]) < FIRST_PSEUDO_REGISTER
)
243 /* This op is a pseudo but the one it matches is
246 /* If we can't put the other operand into a
247 register, this alternative can't be used. */
249 if (classes
[j
] == NO_REGS
)
251 /* Otherwise, add to the cost of this alternative
252 the cost to copy the other operand to the
253 register used for this operand. */
256 += copy_cost (ops
[j
], mode
, classes
[j
], 1, NULL
);
260 /* The costs of this operand are not the same as the
261 other operand since move costs are not symmetric.
262 Moreover, if we cannot tie them, this alternative
263 needs to do a copy, which is one instruction. */
264 struct costs
*pp
= &this_op_costs
[i
];
266 for (class = 0; class < N_REG_CLASSES
; class++)
268 = ((recog_data
.operand_type
[i
] != OP_OUT
269 ? may_move_in_cost
[mode
] [class] [classes
[i
]]
271 + (recog_data
.operand_type
[i
] != OP_IN
272 ? may_move_out_cost
[mode
] [classes
[i
]] [class]
275 /* If the alternative actually allows memory, make
276 things a bit cheaper since we won't need an extra
279 = ((recog_data
.operand_type
[i
] != OP_IN
280 ? memory_move_cost
[mode
] [classes
[i
]] [0]
282 + (recog_data
.operand_type
[i
] != OP_OUT
283 ? memory_move_cost
[mode
] [classes
[i
]] [1]
284 : 0) - allows_mem
[i
]);
286 /* If we have assigned a class to this pseudo in our
287 first pass, add a cost to this alternative
288 corresponding to what we would add if this pseudo
289 were not in the appropriate class. We could use
290 cover class here but it is less accurate
294 += (may_move_in_cost
[mode
]
295 [pseudo_pref
[PSEUDO_NUM
296 (curr_regno_pseudo_map
[REGNO (op
)])]]
298 if (REGNO (ops
[i
]) != REGNO (ops
[j
])
299 && ! find_reg_note (insn
, REG_DEAD
, op
))
302 /* This is in place of ordinary cost computation for
303 this operand, so skip to the end of the
304 alternative (should be just one character). */
305 while (*p
&& *p
++ != ',')
313 /* Scan all the constraint letters. See if the operand
314 matches any of the constraints. Collect the valid
315 register classes and see if this operand accepts
324 /* Ignore the next letter for this pass. */
330 case '!': case '#': case '&':
331 case '0': case '1': case '2': case '3': case '4':
332 case '5': case '6': case '7': case '8': case '9':
337 win
= address_operand (op
, GET_MODE (op
));
338 /* We know this operand is an address, so we want it
339 to be allocated to a register that can be the
340 base of an address, i.e. BASE_REG_CLASS. */
342 = reg_class_subunion
[classes
[i
]]
343 [base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
)];
346 case 'm': case 'o': case 'V':
347 /* It doesn't seem worth distinguishing between
348 offsettable and non-offsettable addresses
357 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
358 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
364 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
365 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
371 if (GET_CODE (op
) == CONST_DOUBLE
372 || (GET_CODE (op
) == CONST_VECTOR
373 && (GET_MODE_CLASS (GET_MODE (op
))
374 == MODE_VECTOR_FLOAT
)))
380 if (GET_CODE (op
) == CONST_DOUBLE
381 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op
, c
, p
))
386 if (GET_CODE (op
) == CONST_INT
387 || (GET_CODE (op
) == CONST_DOUBLE
388 && GET_MODE (op
) == VOIDmode
))
393 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
)))
398 if (GET_CODE (op
) == CONST_INT
399 || (GET_CODE (op
) == CONST_DOUBLE
400 && GET_MODE (op
) == VOIDmode
))
412 if (GET_CODE (op
) == CONST_INT
413 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op
), c
, p
))
424 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (op
))))
429 = reg_class_subunion
[classes
[i
]] [GENERAL_REGS
];
433 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) != NO_REGS
)
435 = reg_class_subunion
[classes
[i
]]
436 [REG_CLASS_FROM_CONSTRAINT (c
, p
)];
437 #ifdef EXTRA_CONSTRAINT_STR
438 else if (EXTRA_CONSTRAINT_STR (op
, c
, p
))
441 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
443 /* Every MEM can be reloaded to fit. */
448 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
450 /* Every address can be reloaded to fit. */
452 if (address_operand (op
, GET_MODE (op
)))
454 /* We know this operand is an address, so we
455 want it to be allocated to a register that
456 can be the base of an address,
457 i.e. BASE_REG_CLASS. */
459 = reg_class_subunion
[classes
[i
]]
460 [base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
)];
465 p
+= CONSTRAINT_LEN (c
, p
);
472 /* How we account for this operand now depends on whether it
473 is a pseudo register or not. If it is, we first check if
474 any register classes are valid. If not, we ignore this
475 alternative, since we want to assume that all pseudos get
476 allocated for register preferencing. If some register
477 class is valid, compute the costs of moving the pseudo
479 if (REG_P (op
) && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
481 if (classes
[i
] == NO_REGS
)
483 /* We must always fail if the operand is a REG, but
484 we did not find a suitable class.
486 Otherwise we may perform an uninitialized read
487 from this_op_costs after the `continue' statement
493 struct costs
*pp
= &this_op_costs
[i
];
495 for (class = 0; class < N_REG_CLASSES
; class++)
497 = ((recog_data
.operand_type
[i
] != OP_OUT
498 ? may_move_in_cost
[mode
] [class] [classes
[i
]]
500 + (recog_data
.operand_type
[i
] != OP_IN
501 ? may_move_out_cost
[mode
] [classes
[i
]] [class]
504 /* If the alternative actually allows memory, make
505 things a bit cheaper since we won't need an extra
508 = ((recog_data
.operand_type
[i
] != OP_IN
509 ? memory_move_cost
[mode
] [classes
[i
]] [0]
511 + (recog_data
.operand_type
[i
] != OP_OUT
512 ? memory_move_cost
[mode
] [classes
[i
]] [1]
513 : 0) - allows_mem
[i
]);
515 /* If we have assigned a class to this pseudo in our
516 first pass, add a cost to this alternative
517 corresponding to what we would add if this pseudo
518 were not in the appropriate class. We could use
519 cover class here but it is less accurate
523 += (may_move_in_cost
[mode
]
524 [pseudo_pref
[PSEUDO_NUM
525 (curr_regno_pseudo_map
[REGNO (op
)])]]
530 /* Otherwise, if this alternative wins, either because we
531 have already determined that or if we have a hard
532 register of the proper class, there is no cost for this
534 else if (win
|| (REG_P (op
)
535 && reg_fits_class_p (op
, classes
[i
],
539 /* If registers are valid, the cost of this alternative
540 includes copying the object to and/or from a
542 else if (classes
[i
] != NO_REGS
)
544 if (recog_data
.operand_type
[i
] != OP_OUT
)
545 alt_cost
+= copy_cost (op
, mode
, classes
[i
], 1, NULL
);
547 if (recog_data
.operand_type
[i
] != OP_IN
)
548 alt_cost
+= copy_cost (op
, mode
, classes
[i
], 0, NULL
);
550 /* The only other way this alternative can be used is if
551 this is a constant that could be placed into memory. */
552 else if (CONSTANT_P (op
) && (allows_addr
|| allows_mem
[i
]))
553 alt_cost
+= memory_move_cost
[mode
] [classes
[i
]] [1];
561 /* Finally, update the costs with the information we've
562 calculated about this alternative. */
563 for (i
= 0; i
< n_ops
; i
++)
565 && REGNO (ops
[i
]) >= FIRST_PSEUDO_REGISTER
)
567 struct costs
*pp
= &op_costs
[i
], *qq
= &this_op_costs
[i
];
568 int scale
= 1 + (recog_data
.operand_type
[i
] == OP_INOUT
);
570 pp
->mem_cost
= MIN (pp
->mem_cost
,
571 (qq
->mem_cost
+ alt_cost
) * scale
);
573 for (class = 0; class < N_REG_CLASSES
; class++)
574 pp
->cost
[class] = MIN (pp
->cost
[class],
575 (qq
->cost
[class] + alt_cost
) * scale
);
579 /* If this insn is a single set copying operand 1 to operand 0 and
580 one operand is a pseudo with the other a hard reg or a pseudo
581 that prefers a register that is in its own register class then we
582 may want to adjust the cost of that register class to -1.
584 Avoid the adjustment if the source does not die to avoid
585 stressing of register allocator by preferrencing two colliding
586 registers into single class.
588 Also avoid the adjustment if a copy between registers of the
589 class is expensive (ten times the cost of a default copy is
590 considered arbitrarily expensive). This avoids losing when the
591 preferred class is very expensive as the source of a copy
593 if ((set
= single_set (insn
)) != 0
594 && ops
[0] == SET_DEST (set
) && ops
[1] == SET_SRC (set
)
595 && REG_P (ops
[0]) && REG_P (ops
[1])
596 && find_regno_note (insn
, REG_DEAD
, REGNO (ops
[1])))
597 for (i
= 0; i
<= 1; i
++)
598 if (REGNO (ops
[i
]) >= FIRST_PSEUDO_REGISTER
)
600 unsigned int regno
= REGNO (ops
[!i
]);
601 enum machine_mode mode
= GET_MODE (ops
[!i
]);
605 if (regno
>= FIRST_PSEUDO_REGISTER
&& pseudo_pref
!= 0)
609 /* We could use cover class here but it is less accurate
611 pref
= pseudo_pref
[PSEUDO_NUM (curr_regno_pseudo_map
[regno
])];
613 if ((reg_class_size
[pref
]
614 == (unsigned) CLASS_MAX_NREGS (pref
, mode
))
615 && register_move_cost
[mode
] [pref
] [pref
] < 10 * 2)
616 op_costs
[i
].cost
[pref
] = -1;
618 else if (regno
< FIRST_PSEUDO_REGISTER
)
619 for (class = 0; class < N_REG_CLASSES
; class++)
620 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
621 && (reg_class_size
[class]
622 == (unsigned) CLASS_MAX_NREGS (class, mode
)))
624 if (reg_class_size
[class] == 1)
625 op_costs
[i
].cost
[class] = -1;
629 nr
< (unsigned) hard_regno_nregs
[regno
] [mode
];
631 if (! TEST_HARD_REG_BIT (reg_class_contents
[class],
635 if (nr
== (unsigned) hard_regno_nregs
[regno
] [mode
])
636 op_costs
[i
].cost
[class] = -1;
644 /* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers. */
646 ok_for_index_p_nonstrict (rtx reg
)
648 unsigned regno
= REGNO (reg
);
650 return regno
>= FIRST_PSEUDO_REGISTER
|| REGNO_OK_FOR_INDEX_P (regno
);
653 /* A version of regno_ok_for_base_p for use during regclass, when all
654 pseudos should count as OK. Arguments as for
655 regno_ok_for_base_p. */
657 ok_for_base_p_nonstrict (rtx reg
, enum machine_mode mode
,
658 enum rtx_code outer_code
, enum rtx_code index_code
)
660 unsigned regno
= REGNO (reg
);
662 if (regno
>= FIRST_PSEUDO_REGISTER
)
664 return ok_for_base_p_1 (regno
, mode
, outer_code
, index_code
);
667 /* Record the pseudo registers we must reload into hard registers in a
668 subexpression of a memory address, X.
670 If CONTEXT is 0, we are looking at the base part of an address,
671 otherwise we are looking at the index part.
673 MODE is the mode of the memory reference; OUTER_CODE and INDEX_CODE
674 give the context that the rtx appears in. These three arguments
675 are passed down to base_reg_class.
677 SCALE is twice the amount to multiply the cost by (it is twice so
678 we can represent half-cost adjustments). */
680 record_address_regs (enum machine_mode mode
, rtx x
, int context
,
681 enum rtx_code outer_code
, enum rtx_code index_code
,
684 enum rtx_code code
= GET_CODE (x
);
685 enum reg_class
class;
688 class = INDEX_REG_CLASS
;
690 class = base_reg_class (mode
, outer_code
, index_code
);
703 /* When we have an address that is a sum, we must determine
704 whether registers are "base" or "index" regs. If there is a
705 sum of two registers, we must choose one to be the "base".
706 Luckily, we can use the REG_POINTER to make a good choice
707 most of the time. We only need to do this on machines that
708 can have two registers in an address and where the base and
709 index register classes are different.
711 ??? This code used to set REGNO_POINTER_FLAG in some cases,
712 but that seems bogus since it should only be set when we are
713 sure the register is being used as a pointer. */
715 rtx arg0
= XEXP (x
, 0);
716 rtx arg1
= XEXP (x
, 1);
717 enum rtx_code code0
= GET_CODE (arg0
);
718 enum rtx_code code1
= GET_CODE (arg1
);
720 /* Look inside subregs. */
722 arg0
= SUBREG_REG (arg0
), code0
= GET_CODE (arg0
);
724 arg1
= SUBREG_REG (arg1
), code1
= GET_CODE (arg1
);
726 /* If this machine only allows one register per address, it
727 must be in the first operand. */
728 if (MAX_REGS_PER_ADDRESS
== 1)
729 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
);
731 /* If index and base registers are the same on this machine,
732 just record registers in any non-constant operands. We
733 assume here, as well as in the tests below, that all
734 addresses are in canonical form. */
735 else if (INDEX_REG_CLASS
== base_reg_class (VOIDmode
, PLUS
, SCRATCH
))
737 record_address_regs (mode
, arg0
, context
, PLUS
, code1
, scale
);
738 if (! CONSTANT_P (arg1
))
739 record_address_regs (mode
, arg1
, context
, PLUS
, code0
, scale
);
742 /* If the second operand is a constant integer, it doesn't
743 change what class the first operand must be. */
744 else if (code1
== CONST_INT
|| code1
== CONST_DOUBLE
)
745 record_address_regs (mode
, arg0
, context
, PLUS
, code1
, scale
);
746 /* If the second operand is a symbolic constant, the first
747 operand must be an index register. */
748 else if (code1
== SYMBOL_REF
|| code1
== CONST
|| code1
== LABEL_REF
)
749 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
);
750 /* If both operands are registers but one is already a hard
751 register of index or reg-base class, give the other the
752 class that the hard register is not. */
753 else if (code0
== REG
&& code1
== REG
754 && REGNO (arg0
) < FIRST_PSEUDO_REGISTER
755 && (ok_for_base_p_nonstrict (arg0
, mode
, PLUS
, REG
)
756 || ok_for_index_p_nonstrict (arg0
)))
757 record_address_regs (mode
, arg1
,
758 ok_for_base_p_nonstrict (arg0
, mode
, PLUS
, REG
)
761 else if (code0
== REG
&& code1
== REG
762 && REGNO (arg1
) < FIRST_PSEUDO_REGISTER
763 && (ok_for_base_p_nonstrict (arg1
, mode
, PLUS
, REG
)
764 || ok_for_index_p_nonstrict (arg1
)))
765 record_address_regs (mode
, arg0
,
766 ok_for_base_p_nonstrict (arg1
, mode
, PLUS
, REG
)
769 /* If one operand is known to be a pointer, it must be the
770 base with the other operand the index. Likewise if the
771 other operand is a MULT. */
772 else if ((code0
== REG
&& REG_POINTER (arg0
)) || code1
== MULT
)
774 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
);
775 record_address_regs (mode
, arg1
, 1, PLUS
, code0
, scale
);
777 else if ((code1
== REG
&& REG_POINTER (arg1
)) || code0
== MULT
)
779 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
);
780 record_address_regs (mode
, arg1
, 0, PLUS
, code0
, scale
);
782 /* Otherwise, count equal chances that each might be a base or
783 index register. This case should be rare. */
786 record_address_regs (mode
, arg0
, 0, PLUS
, code1
, scale
/ 2);
787 record_address_regs (mode
, arg0
, 1, PLUS
, code1
, scale
/ 2);
788 record_address_regs (mode
, arg1
, 0, PLUS
, code0
, scale
/ 2);
789 record_address_regs (mode
, arg1
, 1, PLUS
, code0
, scale
/ 2);
794 /* Double the importance of a pseudo that is incremented or
795 decremented, since it would take two extra insns if it ends
796 up in the wrong place. */
799 record_address_regs (mode
, XEXP (x
, 0), 0, code
,
800 GET_CODE (XEXP (XEXP (x
, 1), 1)), 2 * scale
);
801 if (REG_P (XEXP (XEXP (x
, 1), 1)))
802 record_address_regs (mode
, XEXP (XEXP (x
, 1), 1), 1, code
, REG
,
810 /* Double the importance of a pseudo that is incremented or
811 decremented, since it would take two extra insns if it ends
812 up in the wrong place. If the operand is a pseudo-register,
813 show it is being used in an INC_DEC context. */
814 #ifdef FORBIDDEN_INC_DEC_CLASSES
815 if (REG_P (XEXP (x
, 0))
816 && REGNO (XEXP (x
, 0)) >= FIRST_PSEUDO_REGISTER
)
817 in_inc_dec
[PSEUDO_NUM (curr_regno_pseudo_map
[REGNO (XEXP (x
, 0))])]
820 record_address_regs (mode
, XEXP (x
, 0), 0, code
, SCRATCH
, 2 * scale
);
828 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
831 pp
= &costs
[PSEUDO_NUM (curr_regno_pseudo_map
[REGNO (x
)])];
832 pp
->mem_cost
+= (memory_move_cost
[Pmode
] [class] [1] * scale
) / 2;
833 for (i
= 0; i
< N_REG_CLASSES
; i
++)
834 pp
->cost
[i
] += (may_move_in_cost
[Pmode
] [i
] [class] * scale
) / 2;
840 const char *fmt
= GET_RTX_FORMAT (code
);
842 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
844 record_address_regs (mode
, XEXP (x
, i
), context
, code
, SCRATCH
,
852 /* Calculate the costs of insn operands. */
854 record_operand_costs (rtx insn
, struct costs
*op_costs
,
855 enum reg_class
*pseudo_pref
)
857 const char *constraints
[MAX_RECOG_OPERANDS
];
858 enum machine_mode modes
[MAX_RECOG_OPERANDS
];
861 for (i
= 0; i
< recog_data
.n_operands
; i
++)
863 constraints
[i
] = recog_data
.constraints
[i
];
864 modes
[i
] = recog_data
.operand_mode
[i
];
867 /* If we get here, we are set up to record the costs of all the
868 operands for this insn. Start by initializing the costs. Then
869 handle any address registers. Finally record the desired classes
870 for any pseudos, doing it twice if some pair of operands are
872 for (i
= 0; i
< recog_data
.n_operands
; i
++)
874 op_costs
[i
] = init_cost
;
876 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
)
877 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
879 if (MEM_P (recog_data
.operand
[i
]))
880 record_address_regs (GET_MODE (recog_data
.operand
[i
]),
881 XEXP (recog_data
.operand
[i
], 0),
882 0, MEM
, SCRATCH
, frequency
* 2);
883 else if (constraints
[i
] [0] == 'p'
884 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
] [0],
886 record_address_regs (VOIDmode
, recog_data
.operand
[i
], 0, ADDRESS
,
887 SCRATCH
, frequency
* 2);
890 /* Check for commutative in a separate loop so everything will have
891 been initialized. We must do this even if one operand is a
892 constant--see addsi3 in m68k.md. */
893 for (i
= 0; i
< (int) recog_data
.n_operands
- 1; i
++)
894 if (constraints
[i
] [0] == '%')
896 const char *xconstraints
[MAX_RECOG_OPERANDS
];
899 /* Handle commutative operands by swapping the constraints.
900 We assume the modes are the same. */
901 for (j
= 0; j
< recog_data
.n_operands
; j
++)
902 xconstraints
[j
] = constraints
[j
];
904 xconstraints
[i
] = constraints
[i
+1];
905 xconstraints
[i
+1] = constraints
[i
];
906 record_reg_classes (recog_data
.n_alternatives
, recog_data
.n_operands
,
907 recog_data
.operand
, modes
,
908 xconstraints
, insn
, op_costs
, pseudo_pref
);
910 record_reg_classes (recog_data
.n_alternatives
, recog_data
.n_operands
,
911 recog_data
.operand
, modes
,
912 constraints
, insn
, op_costs
, pseudo_pref
);
917 /* Process one insn INSN. Scan it and record each time it would save
918 code to put a certain pseudos in a certain class. Return the last
919 insn processed, so that the scan can be continued from there. */
921 scan_one_insn (rtx insn
)
923 enum rtx_code pat_code
;
926 struct costs op_costs
[MAX_RECOG_OPERANDS
];
931 pat_code
= GET_CODE (PATTERN (insn
));
932 if (pat_code
== USE
|| pat_code
== CLOBBER
|| pat_code
== ASM_INPUT
933 || pat_code
== ADDR_VEC
|| pat_code
== ADDR_DIFF_VEC
)
936 set
= single_set (insn
);
939 /* If this insn loads a parameter from its stack slot, then it
940 represents a savings, rather than a cost, if the parameter is
941 stored in memory. Record this fact. */
942 if (set
!= 0 && REG_P (SET_DEST (set
)) && MEM_P (SET_SRC (set
))
943 && (note
= find_reg_note (insn
, REG_EQUIV
, NULL_RTX
)) != NULL_RTX
944 && MEM_P (XEXP (note
, 0)))
946 costs
[PSEUDO_NUM (curr_regno_pseudo_map
947 [REGNO (SET_DEST (set
))])].mem_cost
948 -= (memory_move_cost
[GET_MODE (SET_DEST (set
))] [GENERAL_REGS
] [1]
950 record_address_regs (GET_MODE (SET_SRC (set
)), XEXP (SET_SRC (set
), 0),
951 0, MEM
, SCRATCH
, frequency
* 2);
955 record_operand_costs (insn
, op_costs
, pseudo_pref
);
957 /* Now add the cost for each operand to the total costs for its
959 for (i
= 0; i
< recog_data
.n_operands
; i
++)
960 if (REG_P (recog_data
.operand
[i
])
961 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
963 int regno
= REGNO (recog_data
.operand
[i
]);
964 struct costs
*p
= &costs
[PSEUDO_NUM (curr_regno_pseudo_map
[regno
])];
965 struct costs
*q
= &op_costs
[i
];
967 p
->mem_cost
+= q
->mem_cost
* frequency
;
968 for (j
= 0; j
< N_REG_CLASSES
; j
++)
969 p
->cost
[j
] += q
->cost
[j
] * frequency
;
977 /* Dump pseudos costs. */
979 print_costs (FILE *f
)
984 for (i
= 0; i
< pseudos_num
; i
++)
988 pseudo_t p
= pseudos
[i
];
989 int regno
= PSEUDO_REGNO (p
);
991 fprintf (f
, " p%d(r%d,", i
, regno
);
992 if ((bb
= PSEUDO_LOOP_TREE_NODE (p
)->bb
) != NULL
)
993 fprintf (f
, "b%d", bb
->index
);
995 fprintf (f
, "l%d", PSEUDO_LOOP_TREE_NODE (p
)->loop
->num
);
996 fprintf (f
, ") costs:");
997 for (class = 0; class < (int) N_REG_CLASSES
; class++)
998 if (contains_reg_of_mode
[class] [PSEUDO_REGNO_MODE (regno
)]
999 #ifdef FORBIDDEN_INC_DEC_CLASSES
1000 && (! in_inc_dec
[i
] || ! forbidden_inc_dec_class
[class])
1002 #ifdef CANNOT_CHANGE_MODE_CLASS
1003 && ! invalid_mode_change_p (i
, (enum reg_class
) class,
1004 PSEUDO_REGNO_MODE (regno
))
1007 fprintf (f
, " %s:%d", reg_class_names
[class],
1008 costs
[i
].cost
[class]);
1009 fprintf (f
, " MEM:%i\n", costs
[i
].mem_cost
);
1013 /* The function traverses basic blocks represented by LOOP_TREE_NODE
1014 to find the costs of the pseudos. */
1016 process_bb_node_for_costs (struct ira_loop_tree_node
*loop_tree_node
)
1021 bb
= loop_tree_node
->bb
;
1024 frequency
= REG_FREQ_FROM_BB (bb
);
1027 curr_regno_pseudo_map
= ira_curr_loop_tree_node
->regno_pseudo_map
;
1028 FOR_BB_INSNS (bb
, insn
)
1029 insn
= scan_one_insn (insn
);
1032 /* Entry function to find costs of each class cost for pesudos and
1033 their best classes. */
1035 find_pseudo_class_costs (void)
1042 #ifdef FORBIDDEN_INC_DEC_CLASSES
1043 in_inc_dec
= ira_allocate (sizeof (char) * pseudos_num
);
1044 #endif /* FORBIDDEN_INC_DEC_CLASSES */
1047 /* Normally we scan the insns once and determine the best class to
1048 use for each pseudo. However, if -fexpensive_optimizations are
1049 on, we do so twice, the second time using the tentative best
1050 classes to guide the selection. */
1051 for (pass
= 0; pass
<= flag_expensive_optimizations
; pass
++)
1054 fprintf (ira_dump_file
, "\nPass %i\n\n",pass
);
1055 /* Zero out our accumulation of the cost of each class for each
1057 memset (costs
, 0, pseudos_num
* sizeof (struct costs
));
1058 #ifdef FORBIDDEN_INC_DEC_CLASSES
1059 memset (in_inc_dec
, 0, pseudos_num
* sizeof (char));
1062 /* Scan the instructions and record each time it would save code
1063 to put a certain pseudo in a certain class. */
1064 traverse_loop_tree (ira_loop_tree_root
, process_bb_node_for_costs
, NULL
);
1066 /* Now for each pseudo look at how desirable each class is and
1067 find which class is preferred. Store that in
1070 pseudo_pref
= pseudo_pref_buffer
;
1072 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
1074 pseudo_t p
, father_p
;
1075 int class, p_num
, father_p_num
;
1076 struct ira_loop_tree_node
*father
;
1078 enum reg_class best
, common_class
;
1079 #ifdef FORBIDDEN_INC_DEC_CLASSES
1080 int inc_dec_p
= FALSE
;
1082 struct costs reg_costs
;
1084 if (regno_pseudo_map
[i
] == NULL
)
1086 memset (®_costs
, 0, sizeof (struct costs
));
1087 for (p
= regno_pseudo_map
[i
];
1089 p
= PSEUDO_NEXT_REGNO_PSEUDO (p
))
1091 p_num
= PSEUDO_NUM (p
);
1092 if ((flag_ira_algorithm
== IRA_ALGORITHM_REGIONAL
1093 || flag_ira_algorithm
== IRA_ALGORITHM_MIXED
)
1094 && (father
= PSEUDO_LOOP_TREE_NODE (p
)->father
) != NULL
1095 && (father_p
= father
->regno_pseudo_map
[i
]) != NULL
)
1097 father_p_num
= PSEUDO_NUM (father_p
);
1098 for (class = (int) ALL_REGS
- 1; class > 0; class--)
1099 costs
[father_p_num
].cost
[class]
1100 += costs
[p_num
].cost
[class];
1101 costs
[father_p_num
].mem_cost
+= costs
[p_num
].mem_cost
;
1103 for (class = (int) ALL_REGS
- 1; class > 0; class--)
1104 reg_costs
.cost
[class] += costs
[p_num
].cost
[class];
1105 reg_costs
.mem_cost
+= costs
[p_num
].mem_cost
;
1106 #ifdef FORBIDDEN_INC_DEC_CLASSES
1107 if (in_inc_dec
[p_num
])
1111 best_cost
= (1 << (HOST_BITS_PER_INT
- 2)) - 1;
1113 for (class = (int) ALL_REGS
- 1; class > 0; class--)
1115 /* Ignore classes that are too small for this operand or
1116 invalid for an operand that was auto-incremented. */
1117 if (! contains_reg_of_mode
[class] [PSEUDO_REGNO_MODE (i
)]
1118 #ifdef FORBIDDEN_INC_DEC_CLASSES
1119 || (inc_dec_p
&& forbidden_inc_dec_class
[class])
1121 #ifdef CANNOT_CHANGE_MODE_CLASS
1122 || invalid_mode_change_p (i
, (enum reg_class
) class,
1123 PSEUDO_REGNO_MODE (i
))
1127 else if (reg_costs
.cost
[class] < best_cost
)
1129 best_cost
= reg_costs
.cost
[class];
1130 best
= (enum reg_class
) class;
1132 else if (reg_costs
.cost
[class] == best_cost
)
1133 best
= reg_class_subunion
[best
] [class];
1135 common_class
= best
;
1136 if (class_subset_p
[best
] [class_translate
[best
]])
1137 common_class
= class_translate
[best
];
1138 for (p
= regno_pseudo_map
[i
];
1140 p
= PSEUDO_NEXT_REGNO_PSEUDO (p
))
1142 p_num
= PSEUDO_NUM (p
);
1143 /* Finding best class which is cover class for the
1145 best_cost
= (1 << (HOST_BITS_PER_INT
- 2)) - 1;
1147 for (class = (int) ALL_REGS
- 1; class > 0; class--)
1149 if (! class_subset_p
[class] [common_class
])
1151 /* Ignore classes that are too small for this operand or
1152 invalid for an operand that was auto-incremented. */
1153 if (! contains_reg_of_mode
[class] [PSEUDO_REGNO_MODE (i
)]
1154 #ifdef FORBIDDEN_INC_DEC_CLASSES
1155 || (inc_dec_p
&& forbidden_inc_dec_class
[class])
1157 #ifdef CANNOT_CHANGE_MODE_CLASS
1158 || invalid_mode_change_p (i
, (enum reg_class
) class,
1159 PSEUDO_REGNO_MODE (i
)))
1161 else if (costs
[p_num
].cost
[class] < best_cost
)
1163 best_cost
= costs
[p_num
].cost
[class];
1164 best
= (enum reg_class
) class;
1166 else if (costs
[p_num
].cost
[class] == best_cost
)
1167 best
= reg_class_subunion
[best
] [class];
1170 if (ira_dump_file
&& (pass
== 0 || pseudo_pref
[p_num
] != best
))
1172 fprintf (ira_dump_file
, " p%d (r%d,", p_num
, i
);
1173 if ((bb
= PSEUDO_LOOP_TREE_NODE (p
)->bb
) != NULL
)
1174 fprintf (ira_dump_file
, "b%d", bb
->index
);
1176 fprintf (ira_dump_file
, "l%d",
1177 PSEUDO_LOOP_TREE_NODE (p
)->loop
->num
);
1178 fprintf (ira_dump_file
, ") best %s, cover %s\n",
1179 reg_class_names
[best
],
1180 reg_class_names
[class_translate
[best
]]);
1182 pseudo_pref
[p_num
] = best
;
1188 print_costs (ira_dump_file
);
1189 fprintf (ira_dump_file
,"\n");
1193 #ifdef FORBIDDEN_INC_DEC_CLASSES
1194 ira_free (in_inc_dec
);
1200 /* Process moves involving hard regs to modify pseudo hard register
1201 costs. We can do this only after determining pseudo cover class.
1202 If a hard register forms a register class, than moves with the hard
1203 register are already taken into account slightly in class costs for
1206 process_bb_node_for_hard_reg_moves (struct ira_loop_tree_node
*loop_tree_node
)
1208 int i
, freq
, cost
, src_regno
, dst_regno
, hard_regno
, to_p
;
1210 enum reg_class
class, hard_reg_class
;
1211 enum machine_mode mode
;
1213 rtx insn
, set
, src
, dst
;
1215 bb
= loop_tree_node
->bb
;
1218 freq
= REG_FREQ_FROM_BB (bb
);
1221 curr_regno_pseudo_map
= ira_curr_loop_tree_node
->regno_pseudo_map
;
1222 FOR_BB_INSNS (bb
, insn
)
1224 if (! INSN_P (insn
))
1226 set
= single_set (insn
);
1227 if (set
== NULL_RTX
)
1229 dst
= SET_DEST (set
);
1230 src
= SET_SRC (set
);
1231 if (! REG_P (dst
) || ! REG_P (src
))
1233 dst_regno
= REGNO (dst
);
1234 src_regno
= REGNO (src
);
1235 if (dst_regno
>= FIRST_PSEUDO_REGISTER
1236 && src_regno
< FIRST_PSEUDO_REGISTER
)
1238 hard_regno
= src_regno
;
1240 p
= curr_regno_pseudo_map
[dst_regno
];
1242 else if (src_regno
>= FIRST_PSEUDO_REGISTER
1243 && dst_regno
< FIRST_PSEUDO_REGISTER
)
1245 hard_regno
= dst_regno
;
1247 p
= curr_regno_pseudo_map
[src_regno
];
1251 class = PSEUDO_COVER_CLASS (p
);
1252 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], hard_regno
))
1254 i
= class_hard_reg_index
[class] [hard_regno
];
1257 mode
= PSEUDO_MODE (p
);
1258 hard_reg_class
= REGNO_REG_CLASS (hard_regno
);
1259 cost
= (to_p
? register_move_cost
[mode
] [hard_reg_class
] [class]
1260 : register_move_cost
[mode
] [class] [hard_reg_class
]) * freq
;
1261 PSEUDO_HARD_REG_COSTS (p
) [i
] -= cost
;
1262 PSEUDO_CONFLICT_HARD_REG_COSTS (p
) [i
] -= cost
;
1263 PSEUDO_COVER_CLASS_COST (p
) = MIN (PSEUDO_COVER_CLASS_COST (p
),
1264 PSEUDO_HARD_REG_COSTS (p
) [i
]);
1265 if (flag_ira_algorithm
== IRA_ALGORITHM_REGIONAL
1266 || flag_ira_algorithm
== IRA_ALGORITHM_MIXED
)
1268 struct ira_loop_tree_node
*father
;
1269 int regno
= PSEUDO_REGNO (p
);
1273 if ((father
= PSEUDO_LOOP_TREE_NODE (p
)->father
) == NULL
)
1275 if ((p
= father
->regno_pseudo_map
[regno
]) == NULL
)
1277 PSEUDO_HARD_REG_COSTS (p
) [i
] -= cost
;
1278 PSEUDO_CONFLICT_HARD_REG_COSTS (p
) [i
] -= cost
;
1279 PSEUDO_COVER_CLASS_COST (p
)
1280 = MIN (PSEUDO_COVER_CLASS_COST (p
),
1281 PSEUDO_HARD_REG_COSTS (p
) [i
]);
1287 /* After we find hard register and memory costs for pseudos, define
1288 its cover class and modify hard register cost because insns moving
1289 pseudo to/from hard registers. */
1291 setup_pseudo_cover_class_and_costs (void)
1293 int i
, j
, n
, regno
, cost
, *reg_costs
, *reg_conflict_costs
;
1294 enum reg_class cover_class
, class;
1295 enum machine_mode mode
;
1298 for (i
= 0; i
< pseudos_num
; i
++)
1301 mode
= PSEUDO_MODE (p
);
1302 cover_class
= class_translate
[pseudo_pref
[i
]];
1303 ira_assert (pseudo_pref
[i
] == NO_REGS
|| cover_class
!= NO_REGS
);
1304 PSEUDO_ORIGINAL_MEMORY_COST (p
)
1305 = PSEUDO_MEMORY_COST (p
) = costs
[i
].mem_cost
;
1306 PSEUDO_COVER_CLASS (p
) = cover_class
;
1307 if (cover_class
== NO_REGS
)
1309 PSEUDO_AVAILABLE_REGS_NUM (p
) = available_class_regs
[cover_class
];
1310 PSEUDO_COVER_CLASS_COST (p
) = costs
[i
].cost
[pseudo_pref
[i
]];
1311 n
= class_hard_regs_num
[cover_class
];
1312 PSEUDO_HARD_REG_COSTS (p
) = reg_costs
= ira_allocate (n
* sizeof (int));
1313 PSEUDO_CONFLICT_HARD_REG_COSTS (p
)
1314 = reg_conflict_costs
= ira_allocate (n
* sizeof (int));
1315 PSEUDO_CURR_HARD_REG_COSTS (p
) = ira_allocate (n
* sizeof (int));
1316 PSEUDO_CURR_CONFLICT_HARD_REG_COSTS (p
)
1317 = ira_allocate (n
* sizeof (int));
1318 memset (reg_conflict_costs
, 0, n
* sizeof (int));
1319 for (j
= n
- 1; j
>= 0; j
--)
1321 regno
= class_hard_regs
[cover_class
] [j
];
1322 class = REGNO_REG_CLASS (regno
);
1323 /* ??? what is cost AREG when DImode. Should be ok. */
1324 cost
= costs
[i
].cost
[class];
1325 reg_costs
[j
] = cost
;
1328 traverse_loop_tree (ira_loop_tree_root
,
1329 process_bb_node_for_hard_reg_moves
, NULL
);
1334 /* Function called once during compiler work. It sets up init_cost
1335 whose values don't depend on the compiled function. */
1337 init_ira_costs_once (void)
1341 init_cost
.mem_cost
= 10000;
1342 for (i
= 0; i
< N_REG_CLASSES
; i
++)
1343 init_cost
.cost
[i
] = 10000;
1348 /* Entry function which defines cover class, memory and hard register
1349 costs for each pseudo. */
1353 costs
= ira_allocate (sizeof (struct costs
) * pseudos_num
);
1354 pseudo_pref_buffer
= ira_allocate (sizeof (enum reg_class
) * pseudos_num
);
1355 find_pseudo_class_costs ();
1356 setup_pseudo_cover_class_and_costs ();
1357 ira_free (pseudo_pref_buffer
);
1363 /* This function changes hard register costs for pseudos which lives
1364 trough function calls. The function is called only when we found
1365 all intersected calls during building pseudo conflicts. */
1367 tune_pseudo_costs_and_cover_classes (void)
1369 int i
, j
, k
, n
, regno
, cost
, min_cost
, *reg_costs
, freq
;
1370 enum reg_class cover_class
, class;
1371 enum machine_mode mode
;
1373 rtx call
, *pseudo_calls
;
1374 HARD_REG_SET clobbered_regs
;
1376 for (i
= 0; i
< pseudos_num
; i
++)
1379 cover_class
= PSEUDO_COVER_CLASS (p
);
1380 if (cover_class
== NO_REGS
)
1382 mode
= PSEUDO_MODE (p
);
1383 n
= class_hard_regs_num
[cover_class
];
1384 reg_costs
= PSEUDO_HARD_REG_COSTS (p
);
1386 if (PSEUDO_CALLS_CROSSED_NUM (p
) != 0)
1387 for (j
= n
- 1; j
>= 0; j
--)
1389 regno
= class_hard_regs
[cover_class
] [j
];
1390 class = REGNO_REG_CLASS (regno
);
1392 if (! flag_ira_ipra
)
1394 /* ??? If only part is call clobbered. */
1395 if (! hard_reg_not_in_set_p (regno
, mode
, call_used_reg_set
))
1396 cost
+= (PSEUDO_CALL_FREQ (p
)
1397 * (memory_move_cost
[mode
] [class] [0]
1398 + memory_move_cost
[mode
] [class] [1]));
1402 pseudo_calls
= PSEUDO_CALLS_CROSSED (p
);
1403 ira_assert (pseudo_calls
!= NULL
);
1404 for (k
= PSEUDO_CALLS_CROSSED_NUM (p
) - 1; k
>= 0; k
--)
1406 call
= pseudo_calls
[k
];
1407 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (call
));
1410 get_call_invalidated_used_regs (call
, &clobbered_regs
,
1412 /* ??? If only part is call clobbered. */
1413 if (! hard_reg_not_in_set_p (regno
, mode
, clobbered_regs
))
1414 cost
+= freq
* (memory_move_cost
[mode
] [class] [0]
1415 + memory_move_cost
[mode
] [class] [1]);
1418 #ifdef IRA_HARD_REGNO_ADD_COST_MULTIPLIER
1419 cost
+= ((memory_move_cost
[mode
] [class] [0]
1420 + memory_move_cost
[mode
] [class] [1]) * PSEUDO_FREQ (p
)
1421 * IRA_HARD_REGNO_ADD_COST_MULTIPLIER (regno
) / 2);
1423 reg_costs
[j
] += cost
;
1424 if (min_cost
> reg_costs
[j
])
1425 min_cost
= reg_costs
[j
];
1427 if (min_cost
== INT_MAX
)
1429 PSEUDO_COVER_CLASS_COST (p
) = min_cost
;