1 ;; DFA-based pipeline description for P5600.
3 ;; Copyright (C) 2007-2014 Free Software Foundation, Inc.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
21 (define_automaton "p5600_agen_pipe, p5600_alu_pipe, p5600_fpu_pipe")
23 ;; The address generation queue (AGQ) has AL2, CTISTD and LDSTA pipes
24 (define_cpu_unit "p5600_agq, p5600_al2, p5600_ctistd, p5600_ldsta,
25 p5600_gpdiv" "p5600_agen_pipe")
27 ;; The arithmetic-logic-unit queue (ALQ) has ALU pipe
28 (define_cpu_unit "p5600_alq, p5600_alu" "p5600_alu_pipe")
30 ;; The floating-point-unit queue (FPQ) has short and long pipes
31 (define_cpu_unit "p5600_fpu_short, p5600_fpu_long" "p5600_fpu_pipe")
34 (define_cpu_unit "p5600_fpu_store" "p5600_fpu_pipe")
37 (define_cpu_unit "p5600_fpu_apu" "p5600_fpu_pipe")
39 (define_reservation "p5600_agq_al2" "p5600_agq, p5600_al2")
40 (define_reservation "p5600_agq_ctistd" "p5600_agq, p5600_ctistd")
41 (define_reservation "p5600_agq_ldsta" "p5600_agq, p5600_ldsta")
42 (define_reservation "p5600_alq_alu" "p5600_alq, p5600_alu")
49 (define_insn_reservation "p5600_fpu_fadd" 4
50 (and (eq_attr "cpu" "p5600")
51 (eq_attr "type" "fadd,fabs,fneg"))
52 "p5600_fpu_long, p5600_fpu_apu")
55 (define_insn_reservation "p5600_fpu_fabs" 2
56 (and (eq_attr "cpu" "p5600")
57 (eq_attr "type" "fabs,fneg,fcmp,fmove"))
58 "p5600_fpu_short, p5600_fpu_apu")
61 (define_insn_reservation "p5600_fpu_fload" 8
62 (and (eq_attr "cpu" "p5600")
63 (eq_attr "type" "fpload,fpidxload"))
64 "p5600_fpu_long, p5600_fpu_apu")
67 (define_insn_reservation "p5600_fpu_fstore" 1
68 (and (eq_attr "cpu" "p5600")
69 (eq_attr "type" "fpstore,fpidxstore"))
70 "p5600_fpu_short, p5600_fpu_apu")
73 (define_insn_reservation "p5600_fpu_fmadd" 9
74 (and (eq_attr "cpu" "p5600")
75 (eq_attr "type" "fmadd"))
76 "p5600_fpu_long, p5600_fpu_apu")
79 (define_insn_reservation "p5600_fpu_fmul" 5
80 (and (eq_attr "cpu" "p5600")
81 (eq_attr "type" "fmul"))
82 "p5600_fpu_long, p5600_fpu_apu")
85 (define_insn_reservation "p5600_fpu_div" 17
86 (and (eq_attr "cpu" "p5600")
87 (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt"))
88 "p5600_fpu_long, p5600_fpu_apu*17")
91 (define_insn_reservation "p5600_fpu_fcvt" 4
92 (and (eq_attr "cpu" "p5600")
93 (eq_attr "type" "fcvt"))
94 "p5600_fpu_long, p5600_fpu_apu")
97 (define_insn_reservation "p5600_fpu_fmtc" 7
98 (and (eq_attr "cpu" "p5600")
99 (eq_attr "type" "mtc"))
100 "p5600_fpu_short, p5600_fpu_store")
103 (define_insn_reservation "p5600_fpu_fmfc" 4
104 (and (eq_attr "cpu" "p5600")
105 (eq_attr "type" "mfc"))
106 "p5600_fpu_short, p5600_fpu_store")
108 ;; madd/msub feeding into the add source
109 ;; madd.fmt dst, x, y, z -> madd.fmt a, dst, b, c 5 cycles
110 (define_bypass 5 "p5600_fpu_fmadd" "p5600_fpu_fmadd" "mips_fmadd_bypass")
117 (define_insn_reservation "p5600_int_and" 1
118 (and (eq_attr "cpu" "p5600")
119 (eq_attr "move_type" "logical"))
123 (define_insn_reservation "p5600_int_lui" 1
124 (and (eq_attr "cpu" "p5600")
125 (eq_attr "move_type" "const"))
128 ;; Load lb, lbu, lh, lhu, lq, lw, lw_i2f, lwxs
129 (define_insn_reservation "p5600_int_load" 4
130 (and (eq_attr "cpu" "p5600")
131 (eq_attr "move_type" "load"))
135 (define_insn_reservation "p5600_int_store" 3
136 (and (eq_attr "cpu" "p5600")
137 (eq_attr "move_type" "store"))
140 ;; andi, sll, srl, seb, seh
141 (define_insn_reservation "p5600_int_arith_1" 1
142 (and (eq_attr "cpu" "p5600")
143 (eq_attr "move_type" "andi,sll0,signext"))
144 "p5600_agq_al2 | p5600_alq_alu")
146 ;; addi, addiu, ori, xori, add, addu
147 (define_insn_reservation "p5600_int_arith_2" 1
148 (and (eq_attr "cpu" "p5600")
149 (eq_attr "alu_type" "add,or,xor"))
150 "p5600_agq_al2 | p5600_alq_alu")
153 (define_insn_reservation "p5600_int_arith_3" 1
154 (and (eq_attr "cpu" "p5600")
155 (eq_attr "alu_type" "nor,sub"))
158 ;; srl, sra, rotr, slt, sllv, srlv
159 (define_insn_reservation "p5600_int_arith_4" 1
160 (and (eq_attr "cpu" "p5600")
161 (eq_attr "type" "shift,slt,move"))
162 "p5600_agq_al2 | p5600_alq_alu")
165 (define_insn_reservation "p5600_int_nop" 0
166 (and (eq_attr "cpu" "p5600")
167 (eq_attr "type" "nop"))
171 (define_insn_reservation "p5600_int_countbits" 1
172 (and (eq_attr "cpu" "p5600")
173 (eq_attr "type" "clz"))
177 (define_insn_reservation "p5600_int_condmove" 1
178 (and (eq_attr "cpu" "p5600")
179 (eq_attr "type" "condmove"))
183 (define_insn_reservation "p5600_dsp_mac" 5
184 (and (eq_attr "cpu" "p5600")
185 (eq_attr "type" "imadd"))
189 (define_insn_reservation "p5600_dsp_mfhilo" 1
190 (and (eq_attr "cpu" "p5600")
191 (eq_attr "type" "mfhi,mflo"))
195 (define_insn_reservation "p5600_dsp_mthilo" 5
196 (and (eq_attr "cpu" "p5600")
197 (eq_attr "type" "mthi,mtlo"))
201 (define_insn_reservation "p5600_dsp_mult" 5
202 (and (eq_attr "cpu" "p5600")
203 (eq_attr "type" "imul3,imul"))
207 (define_insn_reservation "p5600_int_branch" 1
208 (and (eq_attr "cpu" "p5600")
209 (eq_attr "type" "branch,jump"))
213 (define_insn_reservation "p5600_int_prefetch" 3
214 (and (eq_attr "cpu" "p5600")
215 (eq_attr "type" "prefetch,prefetchx"))
219 (define_insn_reservation "p5600_int_div" 8
220 (and (eq_attr "cpu" "p5600")
221 (eq_attr "type" "idiv"))
222 "p5600_agq_al2+p5600_gpdiv*8")
225 (define_insn_reservation "p5600_int_arith_5" 2
226 (and (eq_attr "cpu" "p5600")
227 (eq_attr "type" "arith"))
231 (define_insn_reservation "p5600_int_call" 2
232 (and (eq_attr "cpu" "p5600")
233 (eq_attr "jal" "indirect,direct"))