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1 /* Definitions of target machine GNU compiler. IA-64 version.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by James E. Wilson <wilson@cygnus.com> and
5 David Mosberger <davidm@hpl.hp.com>.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* ??? Look at ABI group documents for list of preprocessor macros and
25 other features required for ABI compliance. */
27 /* ??? Functions containing a non-local goto target save many registers. Why?
28 See for instance execute/920428-2.c. */
30 /* ??? Add support for short data/bss sections. */
32 \f
33 /* Run-time target specifications */
35 /* Target CPU builtins. */
36 #define TARGET_CPU_CPP_BUILTINS() \
37 do { \
43 if (TARGET_BIG_ENDIAN) \
45 } while (0)
47 #ifndef SUBTARGET_EXTRA_SPECS
48 #define SUBTARGET_EXTRA_SPECS
49 #endif
51 #define EXTRA_SPECS \
53 SUBTARGET_EXTRA_SPECS
60 /* This declaration should be present. */
63 /* This series of macros is to allow compiler command arguments to enable or
64 disable the use of optional features of the target machine. */
104 #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
106 #define TARGET_GNU_AS (target_flags & MASK_GNU_AS)
108 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
110 #define TARGET_NO_PIC (target_flags & MASK_NO_PIC)
112 #define TARGET_VOL_ASM_STOP (target_flags & MASK_VOL_ASM_STOP)
114 #define TARGET_ILP32 (target_flags & MASK_ILP32)
116 #define TARGET_B_STEP (target_flags & MASK_B_STEP)
118 #define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES)
120 #define TARGET_NO_SDATA (target_flags & MASK_NO_SDATA)
122 #define TARGET_CONST_GP (target_flags & MASK_CONST_GP)
124 #define TARGET_AUTO_PIC (target_flags & MASK_AUTO_PIC)
126 #define TARGET_INLINE_FLOAT_DIV_LAT (target_flags & MASK_INLINE_FLOAT_DIV_LAT)
128 #define TARGET_INLINE_FLOAT_DIV_THR (target_flags & MASK_INLINE_FLOAT_DIV_THR)
130 #define TARGET_INLINE_INT_DIV_LAT (target_flags & MASK_INLINE_INT_DIV_LAT)
132 #define TARGET_INLINE_INT_DIV_THR (target_flags & MASK_INLINE_INT_DIV_THR)
134 #define TARGET_INLINE_FLOAT_DIV \
135 (target_flags & (MASK_INLINE_FLOAT_DIV_LAT | MASK_INLINE_FLOAT_DIV_THR))
137 #define TARGET_INLINE_INT_DIV \
138 (target_flags & (MASK_INLINE_INT_DIV_LAT | MASK_INLINE_INT_DIV_THR))
140 #define TARGET_INLINE_SQRT_LAT (target_flags & MASK_INLINE_SQRT_LAT)
142 #define TARGET_INLINE_SQRT_THR (target_flags & MASK_INLINE_SQRT_THR)
144 #define TARGET_INLINE_SQRT \
145 (target_flags & (MASK_INLINE_SQRT_LAT | MASK_INLINE_SQRT_THR))
147 #define TARGET_DWARF2_ASM (target_flags & MASK_DWARF2_ASM)
149 /* Variables which are this size or smaller are put in the sdata/sbss
150 sections. */
153 /* If the assembler supports thread-local storage, assume that the
154 system does as well. If a particular target system has an
155 assembler that supports TLS -- but the rest of the system does not
156 support TLS -- that system should explicit define TARGET_HAVE_TLS
157 to false in its own configuration file. */
158 #if !defined(TARGET_HAVE_TLS) && defined(HAVE_AS_TLS)
159 #define TARGET_HAVE_TLS true
160 #endif
163 #define TARGET_TLS14 (ia64_tls_size == 14)
164 #define TARGET_TLS22 (ia64_tls_size == 22)
165 #define TARGET_TLS64 (ia64_tls_size == 64)
166 #define TARGET_EARLY_STOP_BITS (target_flags & MASK_EARLY_STOP_BITS)
168 #define TARGET_HPUX 0
169 #define TARGET_HPUX_LD 0
171 #ifndef HAVE_AS_LTOFFX_LDXMOV_RELOCS
172 #define HAVE_AS_LTOFFX_LDXMOV_RELOCS 0
173 #endif
175 /* This macro defines names of command options to set and clear bits in
176 `target_flags'. Its definition is an initializer with a subgrouping for
177 each command option. */
179 #define TARGET_SWITCHES \
180 { \
216 -(MASK_INLINE_FLOAT_DIV_LAT|MASK_INLINE_FLOAT_DIV_THR), \
238 SUBTARGET_SWITCHES \
240 NULL } \
241 }
243 /* Default target_flags if no switches are specified */
245 #ifndef TARGET_DEFAULT
246 #define TARGET_DEFAULT (MASK_DWARF2_ASM | MASK_INLINE_FLOAT_DIV_THR)
247 #endif
249 #ifndef TARGET_CPU_DEFAULT
250 #define TARGET_CPU_DEFAULT 0
251 #endif
253 #ifndef SUBTARGET_SWITCHES
254 #define SUBTARGET_SWITCHES
255 #endif
257 /* This macro is similar to `TARGET_SWITCHES' but defines names of command
258 options that have values. Its definition is an initializer with a
259 subgrouping for each command option. */
264 /* Which processor to schedule for. The cpu attribute defines a list
265 that mirrors this list, so changes to i64.md must be made at the
266 same time. */
268 enum processor_type
269 {
271 PROCESSOR_ITANIUM2,
272 PROCESSOR_max
273 };
279 #define TARGET_OPTIONS \
280 { \
287 }
289 /* Sometimes certain combinations of command options do not make sense on a
290 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
291 take account of this. This macro, if defined, is executed once just after
292 all the command options have been parsed. */
294 #define OVERRIDE_OPTIONS ia64_override_options ()
296 /* Some machines may desire to change what optimizations are performed for
297 various optimization levels. This macro, if defined, is executed once just
298 after the optimization level is determined and before the remainder of the
299 command options have been parsed. Values set in this macro are used as the
300 default values for the other command line options. */
302 /* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
303 \f
304 /* Driver configuration */
306 /* A C string constant that tells the GCC driver program options to pass to
307 `cc1'. It can also specify how to translate options you give to GCC into
308 options for GCC to pass to the `cc1'. */
310 #undef CC1_SPEC
313 /* A C string constant that tells the GCC driver program options to pass to
314 `cc1plus'. It can also specify how to translate options you give to GCC
315 into options for GCC to pass to the `cc1plus'. */
317 /* #define CC1PLUS_SPEC "" */
318 \f
319 /* Storage Layout */
321 /* Define this macro to have the value 1 if the most significant bit in a byte
322 has the lowest number; otherwise define it to have the value zero. */
324 #define BITS_BIG_ENDIAN 0
326 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
328 /* Define this macro to have the value 1 if, in a multiword object, the most
329 significant word has the lowest number. */
331 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
333 #if defined(__BIG_ENDIAN__)
334 #define LIBGCC2_WORDS_BIG_ENDIAN 1
335 #else
336 #define LIBGCC2_WORDS_BIG_ENDIAN 0
337 #endif
339 #define UNITS_PER_WORD 8
341 #define UNITS_PER_SIMD_WORD UNITS_PER_WORD
343 #define POINTER_SIZE (TARGET_ILP32 ? 32 : 64)
345 /* A C expression whose value is zero if pointers that need to be extended
346 from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and one if
347 they are zero-extended and negative one if there is a ptr_extend operation.
349 You need not define this macro if the `POINTER_SIZE' is equal to the width
350 of `Pmode'. */
351 /* Need this for 32 bit pointers, see hpux.h for setting it. */
352 /* #define POINTERS_EXTEND_UNSIGNED */
354 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
355 which has the specified mode and signedness is to be stored in a register.
356 This macro is only called when TYPE is a scalar type. */
357 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
358 do \
359 { \
360 if (GET_MODE_CLASS (MODE) == MODE_INT \
361 && GET_MODE_SIZE (MODE) < 4) \
362 (MODE) = SImode; \
363 } \
364 while (0)
366 #define PARM_BOUNDARY 64
368 /* Define this macro if you wish to preserve a certain alignment for the stack
369 pointer. The definition is a C expression for the desired alignment
370 (measured in bits). */
372 #define STACK_BOUNDARY 128
374 /* Align frames on double word boundaries */
375 #ifndef IA64_STACK_ALIGN
376 #define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15)
377 #endif
379 #define FUNCTION_BOUNDARY 128
381 /* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word
382 128 bit integers all require 128 bit alignment. */
383 #define BIGGEST_ALIGNMENT 128
385 /* If defined, a C expression to compute the alignment for a static variable.
386 TYPE is the data type, and ALIGN is the alignment that the object
387 would ordinarily have. The value of this macro is used instead of that
388 alignment to align the object. */
390 #define DATA_ALIGNMENT(TYPE, ALIGN) \
391 (TREE_CODE (TYPE) == ARRAY_TYPE \
392 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
393 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
395 /* If defined, a C expression to compute the alignment given to a constant that
396 is being placed in memory. CONSTANT is the constant and ALIGN is the
397 alignment that the object would ordinarily have. The value of this macro is
398 used instead of that alignment to align the object. */
400 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
401 (TREE_CODE (EXP) == STRING_CST \
402 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
404 #define STRICT_ALIGNMENT 1
406 /* Define this if you wish to imitate the way many other C compilers handle
407 alignment of bitfields and the structures that contain them.
408 The behavior is that the type written for a bit-field (`int', `short', or
409 other integer type) imposes an alignment for the entire structure, as if the
410 structure really did contain an ordinary field of that type. In addition,
411 the bit-field is placed within the structure so that it would fit within such
412 a field, not crossing a boundary for it. */
413 #define PCC_BITFIELD_TYPE_MATTERS 1
415 /* An integer expression for the size in bits of the largest integer machine
416 mode that should actually be used. */
418 /* Allow pairs of registers to be used, which is the intent of the default. */
419 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
421 /* By default, the C++ compiler will use function addresses in the
422 vtable entries. Setting this nonzero tells the compiler to use
423 function descriptors instead. The value of this macro says how
424 many words wide the descriptor is (normally 2). It is assumed
425 that the address of a function descriptor may be treated as a
426 pointer to a function.
428 For reasons known only to HP, the vtable entries (as opposed to
429 normal function descriptors) are 16 bytes wide in 32-bit mode as
430 well, even though the 3rd and 4th words are unused. */
431 #define TARGET_VTABLE_USES_DESCRIPTORS (TARGET_ILP32 ? 4 : 2)
433 /* Due to silliness in the HPUX linker, vtable entries must be
434 8-byte aligned even in 32-bit mode. Rather than create multiple
435 ABIs, force this restriction on everyone else too. */
436 #define TARGET_VTABLE_ENTRY_ALIGN 64
438 /* Due to the above, we need extra padding for the data entries below 0
439 to retain the alignment of the descriptors. */
440 #define TARGET_VTABLE_DATA_ENTRY_DISTANCE (TARGET_ILP32 ? 2 : 1)
441 \f
442 /* Layout of Source Language Data Types */
444 #define INT_TYPE_SIZE 32
446 #define SHORT_TYPE_SIZE 16
448 #define LONG_TYPE_SIZE (TARGET_ILP32 ? 32 : 64)
450 #define LONG_LONG_TYPE_SIZE 64
452 #define FLOAT_TYPE_SIZE 32
454 #define DOUBLE_TYPE_SIZE 64
456 /* long double is XFmode normally, TFmode for HPUX. */
457 #define LONG_DOUBLE_TYPE_SIZE (TARGET_HPUX ? 128 : 80)
459 /* We always want the XFmode operations from libgcc2.c. */
460 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80
462 #define DEFAULT_SIGNED_CHAR 1
464 /* A C expression for a string describing the name of the data type to use for
465 size values. The typedef name `size_t' is defined using the contents of the
466 string. */
467 /* ??? Needs to be defined for P64 code. */
468 /* #define SIZE_TYPE */
470 /* A C expression for a string describing the name of the data type to use for
471 the result of subtracting two pointers. The typedef name `ptrdiff_t' is
472 defined using the contents of the string. See `SIZE_TYPE' above for more
473 information. */
474 /* ??? Needs to be defined for P64 code. */
475 /* #define PTRDIFF_TYPE */
477 /* A C expression for a string describing the name of the data type to use for
478 wide characters. The typedef name `wchar_t' is defined using the contents
479 of the string. See `SIZE_TYPE' above for more information. */
480 /* #define WCHAR_TYPE */
482 /* A C expression for the size in bits of the data type for wide characters.
483 This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
484 /* #define WCHAR_TYPE_SIZE */
486 \f
487 /* Register Basics */
489 /* Number of hardware registers known to the compiler.
490 We have 128 general registers, 128 floating point registers,
491 64 predicate registers, 8 branch registers, one frame pointer,
492 and several "application" registers. */
494 #define FIRST_PSEUDO_REGISTER 334
496 /* Ranges for the various kinds of registers. */
497 #define ADDL_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
498 #define GR_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
499 #define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255)
500 #define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319)
501 #define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327)
502 #define GENERAL_REGNO_P(REGNO) \
503 (GR_REGNO_P (REGNO) || (REGNO) == FRAME_POINTER_REGNUM)
505 #define GR_REG(REGNO) ((REGNO) + 0)
506 #define FR_REG(REGNO) ((REGNO) + 128)
507 #define PR_REG(REGNO) ((REGNO) + 256)
508 #define BR_REG(REGNO) ((REGNO) + 320)
509 #define OUT_REG(REGNO) ((REGNO) + 120)
510 #define IN_REG(REGNO) ((REGNO) + 112)
511 #define LOC_REG(REGNO) ((REGNO) + 32)
513 #define AR_CCV_REGNUM 329
514 #define AR_UNAT_REGNUM 330
515 #define AR_PFS_REGNUM 331
516 #define AR_LC_REGNUM 332
517 #define AR_EC_REGNUM 333
519 #define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
520 #define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
521 #define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
523 #define AR_M_REGNO_P(REGNO) ((REGNO) == AR_CCV_REGNUM \
524 || (REGNO) == AR_UNAT_REGNUM)
525 #define AR_I_REGNO_P(REGNO) ((REGNO) >= AR_PFS_REGNUM \
526 && (REGNO) < FIRST_PSEUDO_REGISTER)
527 #define AR_REGNO_P(REGNO) ((REGNO) >= AR_CCV_REGNUM \
528 && (REGNO) < FIRST_PSEUDO_REGISTER)
531 /* ??? Don't really need two sets of macros. I like this one better because
532 it is less typing. */
533 #define R_GR(REGNO) GR_REG (REGNO)
534 #define R_FR(REGNO) FR_REG (REGNO)
535 #define R_PR(REGNO) PR_REG (REGNO)
536 #define R_BR(REGNO) BR_REG (REGNO)
538 /* An initializer that says which registers are used for fixed purposes all
539 throughout the compiled code and are therefore not available for general
540 allocation.
542 r0: constant 0
543 r1: global pointer (gp)
544 r12: stack pointer (sp)
545 r13: thread pointer (tp)
546 f0: constant 0.0
547 f1: constant 1.0
548 p0: constant true
549 fp: eliminable frame pointer */
551 /* The last 16 stacked regs are reserved for the 8 input and 8 output
552 registers. */
554 #define FIXED_REGISTERS \
556 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
557 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
558 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
559 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
560 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
561 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
562 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
563 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
565 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
566 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
567 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
568 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
569 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
570 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
571 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
572 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
574 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
575 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
576 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
577 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
579 0, 0, 0, 0, 0, 0, 0, 0, \
581 1, 1, 1, 1, 0, 1 \
582 }
584 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered
585 (in general) by function calls as well as for fixed registers. This
586 macro therefore identifies the registers that are not available for
587 general allocation of values that must live across function calls. */
589 #define CALL_USED_REGISTERS \
591 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
592 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
593 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
594 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
595 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
596 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
597 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
598 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
600 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
601 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
602 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
603 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
604 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
605 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
606 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
607 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
609 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
610 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
611 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
612 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
614 1, 0, 0, 0, 0, 0, 1, 1, \
616 1, 1, 1, 1, 0, 1 \
617 }
619 /* Like `CALL_USED_REGISTERS' but used to overcome a historical
620 problem which makes CALL_USED_REGISTERS *always* include
621 all the FIXED_REGISTERS. Until this problem has been
622 resolved this macro can be used to overcome this situation.
623 In particular, block_propagate() requires this list
624 be accurate, or we can remove registers which should be live.
625 This macro is used in regs_invalidated_by_call. */
627 #define CALL_REALLY_USED_REGISTERS \
629 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 1, \
630 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
631 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
632 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
633 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
634 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
635 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
636 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
638 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
639 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
640 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
641 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
642 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
643 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
644 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
645 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
647 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
648 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
649 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
650 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
652 1, 0, 0, 0, 0, 0, 1, 1, \
654 0, 1, 0, 1, 0, 0 \
655 }
658 /* Define this macro if the target machine has register windows. This C
659 expression returns the register number as seen by the called function
660 corresponding to the register number OUT as seen by the calling function.
661 Return OUT if register number OUT is not an outbound register. */
663 #define INCOMING_REGNO(OUT) \
664 ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
666 /* Define this macro if the target machine has register windows. This C
667 expression returns the register number as seen by the calling function
668 corresponding to the register number IN as seen by the called function.
669 Return IN if register number IN is not an inbound register. */
671 #define OUTGOING_REGNO(IN) \
672 ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
674 /* Define this macro if the target machine has register windows. This
675 C expression returns true if the register is call-saved but is in the
676 register window. */
678 #define LOCAL_REGNO(REGNO) \
679 (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
681 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
682 return the mode to be used for the comparison. Must be defined if
683 EXTRA_CC_MODES is defined. */
685 #define SELECT_CC_MODE(OP,X,Y) CCmode
686 \f
687 /* Order of allocation of registers */
689 /* If defined, an initializer for a vector of integers, containing the numbers
690 of hard registers in the order in which GCC should prefer to use them
691 (from most preferred to least).
693 If this macro is not defined, registers are used lowest numbered first (all
694 else being equal).
696 One use of this macro is on machines where the highest numbered registers
697 must always be saved and the save-multiple-registers instruction supports
698 only sequences of consecutive registers. On such machines, define
699 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
700 allocatable register first. */
702 /* ??? Should the GR return value registers come before or after the rest
703 of the caller-save GRs? */
705 #define REG_ALLOC_ORDER \
706 { \
708 R_GR (14), R_GR (15), R_GR (16), R_GR (17), \
709 R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
710 R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
711 R_GR (30), R_GR (31), \
713 R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
714 R_GR (126), R_GR (127), \
716 R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
718 R_GR (2), R_GR (3), \
720 R_FR (6), R_FR (7), \
722 R_FR (8), R_FR (9), R_FR (10), R_FR (11), \
723 R_FR (12), R_FR (13), R_FR (14), R_FR (15), \
725 R_FR (32), R_FR (33), R_FR (34), R_FR (35), \
726 R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \
727 R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \
728 R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \
729 R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \
730 R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \
731 R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \
732 R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \
733 R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \
734 R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \
735 R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \
736 R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \
737 R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \
738 R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \
739 R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \
740 R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \
741 R_FR (126), R_FR (127), \
743 R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \
744 R_PR (12), R_PR (13), R_PR (14), R_PR (15), \
746 R_PR (16), R_PR (17), \
747 R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \
748 R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \
749 R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \
750 R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \
751 R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \
752 R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \
753 R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \
754 R_PR (60), R_PR (61), R_PR (62), R_PR (63), \
756 R_BR (6), R_BR (7), \
757 \
759 R_GR (32), R_GR (33), R_GR (34), R_GR (35), \
760 R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \
761 R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \
762 R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \
763 R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \
764 R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \
765 R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \
766 R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \
767 R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \
768 R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \
769 R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \
770 R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
771 R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
772 R_GR (108), \
774 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
775 R_GR (118), R_GR (119), \
777 R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
779 R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \
780 R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \
781 R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \
782 R_FR (30), R_FR (31), \
784 R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \
786 R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \
787 \
789 R_GR (109), R_GR (110), R_GR (111), \
790 \
792 R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
794 R_FR (0), R_FR (1), \
796 R_PR (0), \
798 R_BR (0), \
800 FRAME_POINTER_REGNUM, \
801 AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \
802 AR_EC_REGNUM \
803 }
804 \f
805 /* How Values Fit in Registers */
807 /* A C expression for the number of consecutive hard registers, starting at
808 register number REGNO, required to hold a value of mode MODE. */
810 /* ??? We say that BImode PR values require two registers. This allows us to
811 easily store the normal and inverted values. We use CCImode to indicate
812 a single predicate register. */
814 #define HARD_REGNO_NREGS(REGNO, MODE) \
815 ((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \
816 : PR_REGNO_P (REGNO) && (MODE) == BImode ? 2 \
817 : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \
818 : FR_REGNO_P (REGNO) && (MODE) == XFmode ? 1 \
819 : FR_REGNO_P (REGNO) && (MODE) == XCmode ? 2 \
820 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
822 /* A C expression that is nonzero if it is permissible to store a value of mode
823 MODE in hard register number REGNO (or in several registers starting with
824 that one). */
826 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
827 (FR_REGNO_P (REGNO) ? \
828 GET_MODE_CLASS (MODE) != MODE_CC && \
829 (MODE) != TImode && \
830 (MODE) != BImode && \
831 (MODE) != TFmode \
832 : PR_REGNO_P (REGNO) ? \
833 (MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
834 : GR_REGNO_P (REGNO) ? \
835 (MODE) != CCImode && (MODE) != XFmode && (MODE) != XCmode \
836 : AR_REGNO_P (REGNO) ? (MODE) == DImode \
837 : BR_REGNO_P (REGNO) ? (MODE) == DImode \
838 : 0)
840 /* A C expression that is nonzero if it is desirable to choose register
841 allocation so as to avoid move instructions between a value of mode MODE1
842 and a value of mode MODE2.
844 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
845 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
846 zero. */
847 /* Don't tie integer and FP modes, as that causes us to get integer registers
848 allocated for FP instructions. XFmode only supported in FP registers so
849 we can't tie it with any other modes. */
850 #define MODES_TIEABLE_P(MODE1, MODE2) \
851 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
852 && ((((MODE1) == XFmode) || ((MODE1) == XCmode)) \
853 == (((MODE2) == XFmode) || ((MODE2) == XCmode))) \
854 && (((MODE1) == BImode) == ((MODE2) == BImode)))
856 /* Specify the modes required to caller save a given hard regno.
857 We need to ensure floating pt regs are not saved as DImode. */
859 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
860 ((FR_REGNO_P (REGNO) && (NREGS) == 1) ? XFmode \
861 : choose_hard_reg_mode ((REGNO), (NREGS), false))
862 \f
863 /* Handling Leaf Functions */
865 /* A C initializer for a vector, indexed by hard register number, which
866 contains 1 for a register that is allowable in a candidate for leaf function
867 treatment. */
868 /* ??? This might be useful. */
869 /* #define LEAF_REGISTERS */
871 /* A C expression whose value is the register number to which REGNO should be
872 renumbered, when a function is treated as a leaf function. */
873 /* ??? This might be useful. */
874 /* #define LEAF_REG_REMAP(REGNO) */
876 \f
877 /* Register Classes */
879 /* An enumeral type that must be defined with all the register class names as
880 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
881 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
882 which is not a register class but rather tells how many classes there
883 are. */
884 /* ??? When compiling without optimization, it is possible for the only use of
885 a pseudo to be a parameter load from the stack with a REG_EQUIV note.
886 Regclass handles this case specially and does not assign any costs to the
887 pseudo. The pseudo then ends up using the last class before ALL_REGS.
888 Thus we must not let either PR_REGS or BR_REGS be the last class. The
889 testcase for this is gcc.c-torture/execute/va-arg-7.c. */
890 enum reg_class
891 {
892 NO_REGS,
893 PR_REGS,
894 BR_REGS,
895 AR_M_REGS,
896 AR_I_REGS,
897 ADDL_REGS,
898 GR_REGS,
899 FR_REGS,
900 GR_AND_BR_REGS,
901 GR_AND_FR_REGS,
902 ALL_REGS,
903 LIM_REG_CLASSES
904 };
906 #define GENERAL_REGS GR_REGS
908 /* The number of distinct register classes. */
909 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
911 /* An initializer containing the names of the register classes as C string
912 constants. These names are used in writing some of the debugging dumps. */
913 #define REG_CLASS_NAMES \
918 /* An initializer containing the contents of the register classes, as integers
919 which are bit masks. The Nth integer specifies the contents of class N.
920 The way the integer MASK is interpreted is that register R is in the class
921 if `MASK & (1 << R)' is 1. */
922 #define REG_CLASS_CONTENTS \
923 { \
925 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
926 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
927 0x00000000, 0x00000000, 0x0000 }, \
929 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
930 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
931 0xFFFFFFFF, 0xFFFFFFFF, 0x0000 }, \
933 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
934 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
935 0x00000000, 0x00000000, 0x00FF }, \
937 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
938 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
939 0x00000000, 0x00000000, 0x0600 }, \
941 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
942 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
943 0x00000000, 0x00000000, 0x3800 }, \
945 { 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \
946 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
947 0x00000000, 0x00000000, 0x0000 }, \
949 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
950 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
951 0x00000000, 0x00000000, 0x0100 }, \
953 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
954 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
955 0x00000000, 0x00000000, 0x0000 }, \
957 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
958 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
959 0x00000000, 0x00000000, 0x01FF }, \
961 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
962 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
963 0x00000000, 0x00000000, 0x0100 }, \
965 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
966 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
967 0xFFFFFFFF, 0xFFFFFFFF, 0x3FFF }, \
968 }
970 /* A C expression whose value is a register class containing hard register
971 REGNO. In general there is more than one such class; choose a class which
972 is "minimal", meaning that no smaller class also contains the register. */
973 /* The NO_REGS case is primarily for the benefit of rws_access_reg, which
974 may call here with private (invalid) register numbers, such as
975 REG_VOLATILE. */
976 #define REGNO_REG_CLASS(REGNO) \
977 (ADDL_REGNO_P (REGNO) ? ADDL_REGS \
978 : GENERAL_REGNO_P (REGNO) ? GR_REGS \
979 : FR_REGNO_P (REGNO) ? FR_REGS \
980 : PR_REGNO_P (REGNO) ? PR_REGS \
981 : BR_REGNO_P (REGNO) ? BR_REGS \
982 : AR_M_REGNO_P (REGNO) ? AR_M_REGS \
983 : AR_I_REGNO_P (REGNO) ? AR_I_REGS \
984 : NO_REGS)
986 /* A macro whose definition is the name of the class to which a valid base
987 register must belong. A base register is one used in an address which is
988 the register value plus a displacement. */
989 #define BASE_REG_CLASS GENERAL_REGS
991 /* A macro whose definition is the name of the class to which a valid index
992 register must belong. An index register is one used in an address where its
993 value is either multiplied by a scale factor or added to another register
994 (as well as added to a displacement). This is needed for POST_MODIFY. */
995 #define INDEX_REG_CLASS GENERAL_REGS
997 /* A C expression which defines the machine-dependent operand constraint
998 letters for register classes. If CHAR is such a letter, the value should be
999 the register class corresponding to it. Otherwise, the value should be
1000 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
1001 will not be passed to this macro; you do not need to handle it. */
1003 #define REG_CLASS_FROM_LETTER(CHAR) \
1010 : NO_REGS)
1012 /* A C expression which is nonzero if register number NUM is suitable for use
1013 as a base register in operand addresses. It may be either a suitable hard
1014 register or a pseudo register that has been allocated such a hard reg. */
1015 #define REGNO_OK_FOR_BASE_P(REGNO) \
1016 (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
1018 /* A C expression which is nonzero if register number NUM is suitable for use
1019 as an index register in operand addresses. It may be either a suitable hard
1020 register or a pseudo register that has been allocated such a hard reg.
1021 This is needed for POST_MODIFY. */
1022 #define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
1024 /* A C expression that places additional restrictions on the register class to
1025 use when it is necessary to copy value X into a register in class CLASS.
1026 The value is a register class; perhaps CLASS, or perhaps another, smaller
1027 class. */
1029 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
1030 ia64_preferred_reload_class (X, CLASS)
1032 /* You should define this macro to indicate to the reload phase that it may
1033 need to allocate at least one register for a reload in addition to the
1034 register to contain the data. Specifically, if copying X to a register
1035 CLASS in MODE requires an intermediate register, you should define this
1036 to return the largest register class all of whose registers can be used
1037 as intermediate registers or scratch registers. */
1039 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
1040 ia64_secondary_reload_class (CLASS, MODE, X)
1042 /* Certain machines have the property that some registers cannot be copied to
1043 some other registers without using memory. Define this macro on those
1044 machines to be a C expression that is nonzero if objects of mode M in
1045 registers of CLASS1 can only be copied to registers of class CLASS2 by
1046 storing a register of CLASS1 into memory and loading that memory location
1047 into a register of CLASS2. */
1049 #if 0
1050 /* ??? May need this, but since we've disallowed XFmode in GR_REGS,
1051 I'm not quite sure how it could be invoked. The normal problems
1052 with unions should be solved with the addressof fiddling done by
1053 movxf and friends. */
1054 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1055 (((MODE) == XFmode || (MODE) == XCmode) \
1056 && (((CLASS1) == GR_REGS && (CLASS2) == FR_REGS) \
1057 || ((CLASS1) == FR_REGS && (CLASS2) == GR_REGS)))
1058 #endif
1060 /* A C expression for the maximum number of consecutive registers of
1061 class CLASS needed to hold a value of mode MODE.
1062 This is closely related to the macro `HARD_REGNO_NREGS'. */
1064 #define CLASS_MAX_NREGS(CLASS, MODE) \
1065 ((MODE) == BImode && (CLASS) == PR_REGS ? 2 \
1066 : ((CLASS) == FR_REGS && (MODE) == XFmode) ? 1 \
1067 : ((CLASS) == FR_REGS && (MODE) == XCmode) ? 2 \
1068 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1070 /* In FP regs, we can't change FP values to integer values and vice
1071 versa, but we can change e.g. DImode to SImode. */
1073 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
1074 (GET_MODE_CLASS (FROM) != GET_MODE_CLASS (TO) \
1075 ? reg_classes_intersect_p (CLASS, FR_REGS) : 0)
1077 /* A C expression that defines the machine-dependent operand constraint
1078 letters (`I', `J', `K', .. 'P') that specify particular ranges of
1079 integer values. */
1081 /* 14 bit signed immediate for arithmetic instructions. */
1082 #define CONST_OK_FOR_I(VALUE) \
1083 ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
1084 /* 22 bit signed immediate for arith instructions with r0/r1/r2/r3 source. */
1085 #define CONST_OK_FOR_J(VALUE) \
1086 ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
1087 /* 8 bit signed immediate for logical instructions. */
1088 #define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
1089 /* 8 bit adjusted signed immediate for compare pseudo-ops. */
1090 #define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
1091 /* 6 bit unsigned immediate for shift counts. */
1092 #define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
1093 /* 9 bit signed immediate for load/store post-increments. */
1094 #define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
1095 /* 0 for r0. Used by Linux kernel, do not change. */
1096 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1097 /* 0 or -1 for dep instruction. */
1098 #define CONST_OK_FOR_P(VALUE) ((VALUE) == 0 || (VALUE) == -1)
1100 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1101 ia64_const_ok_for_letter_p (VALUE, C)
1103 /* A C expression that defines the machine-dependent operand constraint letters
1104 (`G', `H') that specify particular ranges of `const_double' values. */
1106 /* 0.0 and 1.0 for fr0 and fr1. */
1107 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1108 ((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \
1109 || (VALUE) == CONST1_RTX (GET_MODE (VALUE)))
1111 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1112 ia64_const_double_ok_for_letter_p (VALUE, C)
1114 /* A C expression that defines the optional machine-dependent constraint
1115 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1116 types of operands, usually memory references, for the target machine. */
1118 #define EXTRA_CONSTRAINT(VALUE, C) \
1119 ia64_extra_constraint (VALUE, C)
1120 \f
1121 /* Basic Stack Layout */
1123 /* Define this macro if pushing a word onto the stack moves the stack pointer
1124 to a smaller address. */
1125 #define STACK_GROWS_DOWNWARD 1
1127 /* Define this macro if the addresses of local variable slots are at negative
1128 offsets from the frame pointer. */
1129 /* #define FRAME_GROWS_DOWNWARD */
1131 /* Offset from the frame pointer to the first local variable slot to
1132 be allocated. */
1133 #define STARTING_FRAME_OFFSET 0
1135 /* Offset from the stack pointer register to the first location at which
1136 outgoing arguments are placed. If not specified, the default value of zero
1137 is used. This is the proper value for most machines. */
1138 /* IA64 has a 16 byte scratch area that is at the bottom of the stack. */
1139 #define STACK_POINTER_OFFSET 16
1141 /* Offset from the argument pointer register to the first argument's address.
1142 On some machines it may depend on the data type of the function. */
1143 #define FIRST_PARM_OFFSET(FUNDECL) 0
1145 /* A C expression whose value is RTL representing the value of the return
1146 address for the frame COUNT steps up from the current frame, after the
1147 prologue. */
1149 /* ??? Frames other than zero would likely require interpreting the frame
1150 unwind info, so we don't try to support them. We would also need to define
1151 DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */
1153 #define RETURN_ADDR_RTX(COUNT, FRAME) \
1154 ia64_return_addr_rtx (COUNT, FRAME)
1156 /* A C expression whose value is RTL representing the location of the incoming
1157 return address at the beginning of any function, before the prologue. This
1158 RTL is either a `REG', indicating that the return value is saved in `REG',
1159 or a `MEM' representing a location in the stack. This enables DWARF2
1160 unwind info for C++ EH. */
1161 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
1163 /* ??? This is not defined because of three problems.
1164 1) dwarf2out.c assumes that DWARF_FRAME_RETURN_COLUMN fits in one byte.
1165 The default value is FIRST_PSEUDO_REGISTER which doesn't. This can be
1166 worked around by setting PC_REGNUM to FR_REG (0) which is an otherwise
1167 unused register number.
1168 2) dwarf2out_frame_debug core dumps while processing prologue insns. We
1169 need to refine which insns have RTX_FRAME_RELATED_P set and which don't.
1170 3) It isn't possible to turn off EH frame info by defining DWARF2_UNIND_INFO
1171 to zero, despite what the documentation implies, because it is tested in
1172 a few places with #ifdef instead of #if. */
1173 #undef INCOMING_RETURN_ADDR_RTX
1175 /* A C expression whose value is an integer giving the offset, in bytes, from
1176 the value of the stack pointer register to the top of the stack frame at the
1177 beginning of any function, before the prologue. The top of the frame is
1178 defined to be the value of the stack pointer in the previous frame, just
1179 before the call instruction. */
1180 #define INCOMING_FRAME_SP_OFFSET 0
1182 \f
1183 /* Register That Address the Stack Frame. */
1185 /* The register number of the stack pointer register, which must also be a
1186 fixed register according to `FIXED_REGISTERS'. On most machines, the
1187 hardware determines which register this is. */
1189 #define STACK_POINTER_REGNUM 12
1191 /* The register number of the frame pointer register, which is used to access
1192 automatic variables in the stack frame. On some machines, the hardware
1193 determines which register this is. On other machines, you can choose any
1194 register you wish for this purpose. */
1196 #define FRAME_POINTER_REGNUM 328
1198 /* Base register for access to local variables of the function. */
1199 #define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
1201 /* The register number of the arg pointer register, which is used to access the
1202 function's argument list. */
1203 /* r0 won't otherwise be used, so put the always eliminated argument pointer
1204 in it. */
1205 #define ARG_POINTER_REGNUM R_GR(0)
1207 /* Due to the way varargs and argument spilling happens, the argument
1208 pointer is not 16-byte aligned like the stack pointer. */
1209 #define INIT_EXPANDERS \
1210 do { \
1211 if (cfun && cfun->emit->regno_pointer_align) \
1212 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = 64; \
1213 } while (0)
1215 /* Register numbers used for passing a function's static chain pointer. */
1216 /* ??? The ABI sez the static chain should be passed as a normal parameter. */
1217 #define STATIC_CHAIN_REGNUM 15
1218 \f
1219 /* Eliminating the Frame Pointer and the Arg Pointer */
1221 /* A C expression which is nonzero if a function must have and use a frame
1222 pointer. This expression is evaluated in the reload pass. If its value is
1223 nonzero the function will have a frame pointer. */
1224 #define FRAME_POINTER_REQUIRED 0
1226 /* Show we can debug even without a frame pointer. */
1227 #define CAN_DEBUG_WITHOUT_FP
1229 /* If defined, this macro specifies a table of register pairs used to eliminate
1230 unneeded registers that point into the stack frame. */
1232 #define ELIMINABLE_REGS \
1233 { \
1234 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1235 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1236 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1237 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1238 }
1240 /* A C expression that returns nonzero if the compiler is allowed to try to
1241 replace register number FROM with register number TO. The frame pointer
1242 is automatically handled. */
1244 #define CAN_ELIMINATE(FROM, TO) \
1245 (TO == BR_REG (0) ? current_function_is_leaf : 1)
1247 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1248 specifies the initial difference between the specified pair of
1249 registers. This macro must be defined if `ELIMINABLE_REGS' is
1250 defined. */
1251 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1252 ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
1253 \f
1254 /* Passing Function Arguments on the Stack */
1256 /* If defined, the maximum amount of space required for outgoing arguments will
1257 be computed and placed into the variable
1258 `current_function_outgoing_args_size'. */
1260 #define ACCUMULATE_OUTGOING_ARGS 1
1262 /* A C expression that should indicate the number of bytes of its own arguments
1263 that a function pops on returning, or 0 if the function pops no arguments
1264 and the caller must therefore pop them all after the function returns. */
1266 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
1268 \f
1269 /* Function Arguments in Registers */
1271 #define MAX_ARGUMENT_SLOTS 8
1272 #define MAX_INT_RETURN_SLOTS 4
1273 #define GR_ARG_FIRST IN_REG (0)
1274 #define GR_RET_FIRST GR_REG (8)
1275 #define GR_RET_LAST GR_REG (11)
1276 #define FR_ARG_FIRST FR_REG (8)
1277 #define FR_RET_FIRST FR_REG (8)
1278 #define FR_RET_LAST FR_REG (15)
1279 #define AR_ARG_FIRST OUT_REG (0)
1281 /* A C expression that controls whether a function argument is passed in a
1282 register, and which register. */
1284 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1285 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
1287 /* Define this macro if the target machine has "register windows", so that the
1288 register in which a function sees an arguments is not necessarily the same
1289 as the one in which the caller passed the argument. */
1291 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1292 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
1294 /* A C type for declaring a variable that is used as the first argument of
1295 `FUNCTION_ARG' and other related values. For some target machines, the type
1296 `int' suffices and can hold the number of bytes of argument so far. */
1299 {
1306 /* A C statement (sans semicolon) for initializing the variable CUM for the
1307 state at the beginning of the argument list. */
1309 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
1310 do { \
1311 (CUM).words = 0; \
1312 (CUM).int_regs = 0; \
1313 (CUM).fp_regs = 0; \
1314 (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
1315 } while (0)
1317 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1318 arguments for the function being compiled. If this macro is undefined,
1319 `INIT_CUMULATIVE_ARGS' is used instead. */
1321 /* We set prototype to true so that we never try to return a PARALLEL from
1322 function_arg. */
1323 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1324 do { \
1325 (CUM).words = 0; \
1326 (CUM).int_regs = 0; \
1327 (CUM).fp_regs = 0; \
1328 (CUM).prototype = 1; \
1329 } while (0)
1331 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1332 advance past an argument in the argument list. The values MODE, TYPE and
1333 NAMED describe that argument. Once this is done, the variable CUM is
1334 suitable for analyzing the *following* argument with `FUNCTION_ARG'. */
1336 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1337 ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1339 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1340 argument with the specified mode and type. */
1342 /* Return the alignment boundary in bits for an argument with a specified
1343 mode and type. */
1345 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1346 ia64_function_arg_boundary (MODE, TYPE)
1348 /* A C expression that is nonzero if REGNO is the number of a hard register in
1349 which function arguments are sometimes passed. This does *not* include
1350 implicit arguments such as the static chain and the structure-value address.
1351 On many machines, no registers can be used for this purpose since all
1352 function arguments are pushed on the stack. */
1353 #define FUNCTION_ARG_REGNO_P(REGNO) \
1354 (((REGNO) >= AR_ARG_FIRST && (REGNO) < (AR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
1355 || ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
1356 \f
1357 /* How Scalar Function Values are Returned */
1359 /* A C expression to create an RTX representing the place where a function
1360 returns a value of data type VALTYPE. */
1362 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1363 ia64_function_value (VALTYPE, FUNC)
1365 /* A C expression to create an RTX representing the place where a library
1366 function returns a value of mode MODE. */
1368 #define LIBCALL_VALUE(MODE) \
1369 gen_rtx_REG (MODE, \
1370 (((GET_MODE_CLASS (MODE) == MODE_FLOAT \
1371 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) && \
1372 (MODE) != TFmode) \
1373 ? FR_RET_FIRST : GR_RET_FIRST))
1375 /* A C expression that is nonzero if REGNO is the number of a hard register in
1376 which the values of called function may come back. */
1378 #define FUNCTION_VALUE_REGNO_P(REGNO) \
1379 (((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
1380 || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
1382 \f
1383 /* How Large Values are Returned */
1385 #define DEFAULT_PCC_STRUCT_RETURN 0
1387 \f
1388 /* Caller-Saves Register Allocation */
1390 /* A C expression to determine whether it is worthwhile to consider placing a
1391 pseudo-register in a call-clobbered hard register and saving and restoring
1392 it around each function call. The expression should be 1 when this is worth
1393 doing, and 0 otherwise.
1395 If you don't define this macro, a default is used which is good on most
1396 machines: `4 * CALLS < REFS'. */
1397 /* ??? Investigate. */
1398 /* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
1400 \f
1401 /* Function Entry and Exit */
1403 /* Define this macro as a C expression that is nonzero if the return
1404 instruction or the function epilogue ignores the value of the stack pointer;
1405 in other words, if it is safe to delete an instruction to adjust the stack
1406 pointer before a return from the function. */
1408 #define EXIT_IGNORE_STACK 1
1410 /* Define this macro as a C expression that is nonzero for registers
1411 used by the epilogue or the `return' pattern. */
1413 #define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO)
1415 /* Nonzero for registers used by the exception handling mechanism. */
1417 #define EH_USES(REGNO) ia64_eh_uses (REGNO)
1419 /* Output part N of a function descriptor for DECL. For ia64, both
1420 words are emitted with a single relocation, so ignore N > 0. */
1421 #define ASM_OUTPUT_FDESC(FILE, DECL, PART) \
1422 do { \
1423 if ((PART) == 0) \
1424 { \
1425 if (TARGET_ILP32) \
1427 else \
1429 mark_decl_referenced (DECL); \
1430 assemble_name (FILE, XSTR (XEXP (DECL_RTL (DECL), 0), 0)); \
1432 if (TARGET_ILP32) \
1434 } \
1435 } while (0)
1436 \f
1437 /* Generating Code for Profiling. */
1439 /* A C statement or compound statement to output to FILE some assembler code to
1440 call the profiling subroutine `mcount'. */
1442 #undef FUNCTION_PROFILER
1443 #define FUNCTION_PROFILER(FILE, LABELNO) \
1444 do { \
1445 char buf[20]; \
1448 if (TARGET_AUTO_PIC) \
1450 else \
1452 assemble_name (FILE, buf); \
1453 if (TARGET_AUTO_PIC) \
1455 else \
1460 } while (0)
1461 \f
1462 /* Trampolines for Nested Functions. */
1464 /* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
1465 the function containing a non-local goto target. */
1467 #define STACK_SAVEAREA_MODE(LEVEL) \
1468 ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
1470 /* Output assembler code for a block containing the constant parts of
1471 a trampoline, leaving space for the variable parts.
1473 The trampoline should set the static chain pointer to value placed
1474 into the trampoline and should branch to the specified routine.
1475 To make the normal indirect-subroutine calling convention work,
1476 the trampoline must look like a function descriptor; the first
1477 word being the target address and the second being the target's
1478 global pointer.
1480 We abuse the concept of a global pointer by arranging for it
1481 to point to the data we need to load. The complete trampoline
1482 has the following form:
1484 +-------------------+ \
1485 TRAMP: | __ia64_trampoline | |
1486 +-------------------+ > fake function descriptor
1487 | TRAMP+16 | |
1488 +-------------------+ /
1489 | target descriptor |
1490 +-------------------+
1491 | static link |
1492 +-------------------+
1493 */
1495 /* A C expression for the size in bytes of the trampoline, as an integer. */
1497 #define TRAMPOLINE_SIZE 32
1499 /* Alignment required for trampolines, in bits. */
1501 #define TRAMPOLINE_ALIGNMENT 64
1503 /* A C statement to initialize the variable parts of a trampoline. */
1505 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
1506 ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))
1507 \f
1508 /* Addressing Modes */
1510 /* Define this macro if the machine supports post-increment addressing. */
1512 #define HAVE_POST_INCREMENT 1
1513 #define HAVE_POST_DECREMENT 1
1514 #define HAVE_POST_MODIFY_DISP 1
1515 #define HAVE_POST_MODIFY_REG 1
1517 /* A C expression that is 1 if the RTX X is a constant which is a valid
1518 address. */
1520 #define CONSTANT_ADDRESS_P(X) 0
1522 /* The max number of registers that can appear in a valid memory address. */
1524 #define MAX_REGS_PER_ADDRESS 2
1526 /* A C compound statement with a conditional `goto LABEL;' executed if X (an
1527 RTX) is a legitimate memory address on the target machine for a memory
1528 operand of mode MODE. */
1530 #define LEGITIMATE_ADDRESS_REG(X) \
1531 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1532 || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
1533 && REG_OK_FOR_BASE_P (XEXP (X, 0))))
1535 #define LEGITIMATE_ADDRESS_DISP(R, X) \
1536 (GET_CODE (X) == PLUS \
1537 && rtx_equal_p (R, XEXP (X, 0)) \
1538 && (LEGITIMATE_ADDRESS_REG (XEXP (X, 1)) \
1539 || (GET_CODE (XEXP (X, 1)) == CONST_INT \
1540 && INTVAL (XEXP (X, 1)) >= -256 \
1541 && INTVAL (XEXP (X, 1)) < 256)))
1543 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
1544 do { \
1545 if (LEGITIMATE_ADDRESS_REG (X)) \
1546 goto LABEL; \
1547 else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
1548 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1549 && XEXP (X, 0) != arg_pointer_rtx) \
1550 goto LABEL; \
1551 else if (GET_CODE (X) == POST_MODIFY \
1552 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1553 && XEXP (X, 0) != arg_pointer_rtx \
1554 && LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
1555 goto LABEL; \
1556 } while (0)
1558 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1559 use as a base register. */
1561 #ifdef REG_OK_STRICT
1562 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1563 #else
1564 #define REG_OK_FOR_BASE_P(X) \
1565 (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1566 #endif
1568 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1569 use as an index register. This is needed for POST_MODIFY. */
1571 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1573 /* A C statement or compound statement with a conditional `goto LABEL;'
1574 executed if memory address X (an RTX) can have different meanings depending
1575 on the machine mode of the memory reference it is used for or if the address
1576 is valid for some modes but not others. */
1578 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1579 if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \
1580 goto LABEL;
1582 /* A C expression that is nonzero if X is a legitimate constant for an
1583 immediate operand on the target machine. */
1585 #define LEGITIMATE_CONSTANT_P(X) \
1586 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1587 || GET_MODE (X) == DImode || CONST_DOUBLE_OK_FOR_G (X)) \
1589 \f
1590 /* Condition Code Status */
1592 /* One some machines not all possible comparisons are defined, but you can
1593 convert an invalid comparison into a valid one. */
1594 /* ??? Investigate. See the alpha definition. */
1595 /* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
1597 \f
1598 /* Describing Relative Costs of Operations */
1600 /* A C expression for the cost of moving data from a register in class FROM to
1601 one in class TO, using MODE. */
1603 #define REGISTER_MOVE_COST ia64_register_move_cost
1605 /* A C expression for the cost of moving data of mode M between a
1606 register and memory. */
1607 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
1608 ((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS \
1609 || (CLASS) == GR_AND_FR_REGS ? 4 : 10)
1611 /* A C expression for the cost of a branch instruction. A value of 1 is the
1612 default; other values are interpreted relative to that. Used by the
1613 if-conversion code as max instruction count. */
1614 /* ??? This requires investigation. The primary effect might be how
1615 many additional insn groups we run into, vs how good the dynamic
1616 branch predictor is. */
1618 #define BRANCH_COST 6
1620 /* Define this macro as a C expression which is nonzero if accessing less than
1621 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1622 word of memory. */
1624 #define SLOW_BYTE_ACCESS 1
1626 /* Define this macro if it is as good or better to call a constant function
1627 address than to call an address kept in a register.
1629 Indirect function calls are more expensive that direct function calls, so
1630 don't cse function addresses. */
1632 #define NO_FUNCTION_CSE
1634 \f
1635 /* Dividing the output into sections. */
1637 /* A C expression whose value is a string containing the assembler operation
1638 that should precede instructions and read-only data. */
1642 /* A C expression whose value is a string containing the assembler operation to
1643 identify the following data as writable initialized data. */
1647 /* If defined, a C expression whose value is a string containing the assembler
1648 operation to identify the following data as uninitialized global data. */
1652 #define IA64_DEFAULT_GVALUE 8
1653 \f
1654 /* Position Independent Code. */
1656 /* The register number of the register used to address a table of static data
1657 addresses in memory. */
1659 /* ??? Should modify ia64.md to use pic_offset_table_rtx instead of
1660 gen_rtx_REG (DImode, 1). */
1662 /* ??? Should we set flag_pic? Probably need to define
1663 LEGITIMIZE_PIC_OPERAND_P to make that work. */
1665 #define PIC_OFFSET_TABLE_REGNUM GR_REG (1)
1667 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
1668 clobbered by calls. */
1670 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
1672 \f
1673 /* The Overall Framework of an Assembler File. */
1675 /* A C string constant describing how to begin a comment in the target
1676 assembler language. The compiler assumes that the comment will end at the
1677 end of the line. */
1681 /* A C string constant for text to be output before each `asm' statement or
1682 group of consecutive ones. */
1686 /* A C string constant for text to be output after each `asm' statement or
1687 group of consecutive ones. */
1690 \f
1691 /* Output of Uninitialized Variables. */
1693 /* This is all handled by svr4.h. */
1695 \f
1696 /* Output and Generation of Labels. */
1698 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
1699 assembler definition of a label named NAME. */
1701 /* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of
1702 why ia64_asm_output_label exists. */
1705 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
1706 do { \
1707 ia64_asm_output_label = 1; \
1708 assemble_name (STREAM, NAME); \
1710 ia64_asm_output_label = 0; \
1711 } while (0)
1713 /* Globalizing directive for a label. */
1716 /* A C statement (sans semicolon) to output to the stdio stream STREAM any text
1717 necessary for declaring the name of an external symbol named NAME which is
1718 referenced in this compilation but not defined. */
1720 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1721 ia64_asm_output_external (FILE, DECL, NAME)
1723 /* A C statement to store into the string STRING a label whose name is made
1724 from the string PREFIX and the number NUM. */
1726 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1727 do { \
1729 } while (0)
1731 /* ??? Not sure if using a ? in the name for Intel as is safe. */
1735 /* A C statement to output to the stdio stream STREAM assembler code which
1736 defines (equates) the symbol NAME to have the value VALUE. */
1738 #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
1739 do { \
1740 assemble_name (STREAM, NAME); \
1742 assemble_name (STREAM, VALUE); \
1744 } while (0)
1746 \f
1747 /* Macros Controlling Initialization Routines. */
1749 /* This is handled by svr4.h and sysv4.h. */
1751 \f
1752 /* Output of Assembler Instructions. */
1754 /* A C initializer containing the assembler's names for the machine registers,
1755 each one as a C string constant. */
1757 #define REGISTER_NAMES \
1758 { \
1805 }
1807 /* If defined, a C initializer for an array of structures containing a name and
1808 a register number. This macro defines additional names for hard registers,
1809 thus allowing the `asm' option in declarations to refer to registers using
1810 alternate names. */
1812 #define ADDITIONAL_REGISTER_NAMES \
1813 { \
1912 }
1914 /* Emit a dtp-relative reference to a TLS variable. */
1916 #ifdef HAVE_AS_TLS
1917 #define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \
1918 ia64_output_dwarf_dtprel (FILE, SIZE, X)
1919 #endif
1921 /* A C compound statement to output to stdio stream STREAM the assembler syntax
1922 for an instruction operand X. X is an RTL expression. */
1924 #define PRINT_OPERAND(STREAM, X, CODE) \
1925 ia64_print_operand (STREAM, X, CODE)
1927 /* A C expression which evaluates to true if CODE is a valid punctuation
1928 character for use in the `PRINT_OPERAND' macro. */
1930 /* ??? Keep this around for now, as we might need it later. */
1932 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1935 /* A C compound statement to output to stdio stream STREAM the assembler syntax
1936 for an instruction operand that is a memory reference whose address is X. X
1937 is an RTL expression. */
1939 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
1940 ia64_print_operand_address (STREAM, X)
1942 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
1943 `%I' options of `asm_fprintf' (see `final.c'). */
1950 \f
1951 /* Output of dispatch tables. */
1953 /* This macro should be provided on machines where the addresses in a dispatch
1954 table are relative to the table's own address. */
1956 /* ??? Depends on the pointer size. */
1958 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
1959 do { \
1960 if (TARGET_ILP32) \
1962 else \
1964 } while (0)
1966 /* This is how to output an element of a case-vector that is absolute.
1967 (Ia64 does not use such vectors, but we must define this macro anyway.) */
1969 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) abort ()
1971 /* Jump tables only need 8 byte alignment. */
1973 #define ADDR_VEC_ALIGN(ADDR_VEC) 3
1975 \f
1976 /* Assembler Commands for Exception Regions. */
1978 /* Select a format to encode pointers in exception handling data. CODE
1979 is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
1980 true if the symbol may be affected by dynamic relocations. */
1981 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
1982 (((CODE) == 1 ? DW_EH_PE_textrel : DW_EH_PE_datarel) \
1983 | ((GLOBAL) ? DW_EH_PE_indirect : 0) \
1984 | (TARGET_ILP32 ? DW_EH_PE_udata4 : DW_EH_PE_udata8))
1986 /* Handle special EH pointer encodings. Absolute, pc-relative, and
1987 indirect are handled automatically. */
1988 #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
1989 do { \
1990 const char *reltag = NULL; \
1991 if (((ENCODING) & 0xF0) == DW_EH_PE_textrel) \
1993 else if (((ENCODING) & 0xF0) == DW_EH_PE_datarel) \
1995 if (reltag) \
1996 { \
1997 fputs (integer_asm_op (SIZE, FALSE), FILE); \
1998 fputs (reltag, FILE); \
1999 assemble_name (FILE, XSTR (ADDR, 0)); \
2001 goto DONE; \
2002 } \
2003 } while (0)
2005 \f
2006 /* Assembler Commands for Alignment. */
2008 /* ??? Investigate. */
2010 /* The alignment (log base 2) to put in front of LABEL, which follows
2011 a BARRIER. */
2013 /* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */
2015 /* The desired alignment for the location counter at the beginning
2016 of a loop. */
2018 /* #define LOOP_ALIGN(LABEL) */
2020 /* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text
2021 section because it fails put zeros in the bytes that are skipped. */
2023 #define ASM_NO_SKIP_IN_TEXT 1
2025 /* A C statement to output to the stdio stream STREAM an assembler command to
2026 advance the location counter to a multiple of 2 to the POWER bytes. */
2028 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2031 \f
2032 /* Macros Affecting all Debug Formats. */
2034 /* This is handled in svr4.h and sysv4.h. */
2036 \f
2037 /* Specific Options for DBX Output. */
2039 /* This is handled by dbxelf.h which is included by svr4.h. */
2041 \f
2042 /* Open ended Hooks for DBX Output. */
2044 /* Likewise. */
2046 \f
2047 /* File names in DBX format. */
2049 /* Likewise. */
2051 \f
2052 /* Macros for SDB and Dwarf Output. */
2054 /* Define this macro if GCC should produce dwarf version 2 format debugging
2055 output in response to the `-g' option. */
2057 #define DWARF2_DEBUGGING_INFO 1
2059 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
2061 /* Use tags for debug info labels, so that they don't break instruction
2062 bundles. This also avoids getting spurious DV warnings from the
2063 assembler. This is similar to (*targetm.asm_out.internal_label), except that we
2064 add brackets around the label. */
2066 #define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \
2069 /* Use section-relative relocations for debugging offsets. Unlike other
2070 targets that fake this by putting the section VMA at 0, IA-64 has
2071 proper relocations for them. */
2072 #define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL) \
2073 do { \
2074 fputs (integer_asm_op (SIZE, FALSE), FILE); \
2076 assemble_name (FILE, LABEL); \
2078 } while (0)
2080 /* Emit a PC-relative relocation. */
2081 #define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \
2082 do { \
2083 fputs (integer_asm_op (SIZE, FALSE), FILE); \
2085 assemble_name (FILE, LABEL); \
2087 } while (0)
2088 \f
2089 /* Register Renaming Parameters. */
2091 /* A C expression that is nonzero if hard register number REGNO2 can be
2092 considered for use as a rename register for REGNO1 */
2094 #define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
2095 ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
2097 \f
2098 /* Miscellaneous Parameters. */
2100 /* Flag to mark data that is in the small address area (addressable
2101 via "addl", that is, within a 2MByte offset of 0. */
2102 #define SYMBOL_FLAG_SMALL_ADDR (SYMBOL_FLAG_MACH_DEP << 0)
2103 #define SYMBOL_REF_SMALL_ADDR_P(X) \
2104 ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SMALL_ADDR) != 0)
2106 /* An alias for a machine mode name. This is the machine mode that elements of
2107 a jump-table should have. */
2109 #define CASE_VECTOR_MODE ptr_mode
2111 /* Define as C expression which evaluates to nonzero if the tablejump
2112 instruction expects the table to contain offsets from the address of the
2113 table. */
2115 #define CASE_VECTOR_PC_RELATIVE 1
2117 /* Define this macro if operations between registers with integral mode smaller
2118 than a word are always performed on the entire register. */
2120 #define WORD_REGISTER_OPERATIONS
2122 /* Define this macro to be a C expression indicating when insns that read
2123 memory in MODE, an integral mode narrower than a word, set the bits outside
2124 of MODE to be either the sign-extension or the zero-extension of the data
2125 read. */
2127 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
2129 /* The maximum number of bytes that a single instruction can move quickly from
2130 memory to memory. */
2131 #define MOVE_MAX 8
2133 /* A C expression which is nonzero if on this machine it is safe to "convert"
2134 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2135 than INPREC) by merely operating on it as if it had only OUTPREC bits. */
2137 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2139 /* A C expression describing the value returned by a comparison operator with
2140 an integral mode and stored by a store-flag instruction (`sCOND') when the
2141 condition is true. */
2143 /* ??? Investigate using STORE_FLAG_VALUE of -1 instead of 1. */
2145 /* An alias for the machine mode for pointers. */
2147 /* ??? This would change if we had ILP32 support. */
2149 #define Pmode DImode
2151 /* An alias for the machine mode used for memory references to functions being
2152 called, in `call' RTL expressions. */
2154 #define FUNCTION_MODE Pmode
2156 /* Define this macro to handle System V style pragmas: #pragma pack and
2157 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2158 defined. */
2160 /* If this architecture supports prefetch, define this to be the number of
2161 prefetch commands that can be executed in parallel.
2163 ??? This number is bogus and needs to be replaced before the value is
2164 actually used in optimizations. */
2166 #define SIMULTANEOUS_PREFETCHES 6
2168 /* If this architecture supports prefetch, define this to be the size of
2169 the cache line that is prefetched. */
2171 #define PREFETCH_BLOCK 32
2173 #define HANDLE_SYSV_PRAGMA 1
2175 /* A C expression for the maximum number of instructions to execute via
2176 conditional execution instructions instead of a branch. A value of
2177 BRANCH_COST+1 is the default if the machine does not use
2178 cc0, and 1 if it does use cc0. */
2179 /* ??? Investigate. */
2180 #define MAX_CONDITIONAL_EXECUTE 12
2184 #define TARGET_UNWIND_INFO 1
2186 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 15 : INVALID_REGNUM)
2188 /* This function contains machine specific function data. */
2190 {
2191 /* The new stack pointer when unwinding from EH. */
2192 rtx ia64_eh_epilogue_sp;
2194 /* The new bsp value when unwinding from EH. */
2195 rtx ia64_eh_epilogue_bsp;
2197 /* The GP value save register. */
2198 rtx ia64_gp_save;
2200 /* The number of varargs registers to save. */
2202 };
2205 enum ia64_builtins
2206 {
2207 IA64_BUILTIN_SYNCHRONIZE,
2209 IA64_BUILTIN_FETCH_AND_ADD_SI,
2210 IA64_BUILTIN_FETCH_AND_SUB_SI,
2211 IA64_BUILTIN_FETCH_AND_OR_SI,
2212 IA64_BUILTIN_FETCH_AND_AND_SI,
2213 IA64_BUILTIN_FETCH_AND_XOR_SI,
2214 IA64_BUILTIN_FETCH_AND_NAND_SI,
2216 IA64_BUILTIN_ADD_AND_FETCH_SI,
2217 IA64_BUILTIN_SUB_AND_FETCH_SI,
2218 IA64_BUILTIN_OR_AND_FETCH_SI,
2219 IA64_BUILTIN_AND_AND_FETCH_SI,
2220 IA64_BUILTIN_XOR_AND_FETCH_SI,
2221 IA64_BUILTIN_NAND_AND_FETCH_SI,
2223 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI,
2224 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI,
2226 IA64_BUILTIN_SYNCHRONIZE_SI,
2228 IA64_BUILTIN_LOCK_TEST_AND_SET_SI,
2230 IA64_BUILTIN_LOCK_RELEASE_SI,
2232 IA64_BUILTIN_FETCH_AND_ADD_DI,
2233 IA64_BUILTIN_FETCH_AND_SUB_DI,
2234 IA64_BUILTIN_FETCH_AND_OR_DI,
2235 IA64_BUILTIN_FETCH_AND_AND_DI,
2236 IA64_BUILTIN_FETCH_AND_XOR_DI,
2237 IA64_BUILTIN_FETCH_AND_NAND_DI,
2239 IA64_BUILTIN_ADD_AND_FETCH_DI,
2240 IA64_BUILTIN_SUB_AND_FETCH_DI,
2241 IA64_BUILTIN_OR_AND_FETCH_DI,
2242 IA64_BUILTIN_AND_AND_FETCH_DI,
2243 IA64_BUILTIN_XOR_AND_FETCH_DI,
2244 IA64_BUILTIN_NAND_AND_FETCH_DI,
2246 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI,
2247 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI,
2249 IA64_BUILTIN_SYNCHRONIZE_DI,
2251 IA64_BUILTIN_LOCK_TEST_AND_SET_DI,
2253 IA64_BUILTIN_LOCK_RELEASE_DI,
2255 IA64_BUILTIN_BSP,
2256 IA64_BUILTIN_FLUSHRS
2257 };
2259 /* Codes for expand_compare_and_swap and expand_swap_and_compare. */
2262 };
2264 #define DONT_USE_BUILTIN_SETJMP
2266 /* Output any profiling code before the prologue. */
2268 #undef PROFILE_BEFORE_PROLOGUE
2269 #define PROFILE_BEFORE_PROLOGUE 1
2271 /* Initialize library function table. */
2272 #undef TARGET_INIT_LIBFUNCS
2273 #define TARGET_INIT_LIBFUNCS ia64_init_libfuncs
2275 \f
2277 /* Switch on code for querying unit reservations. */
2278 #define CPU_UNITS_QUERY 1
2280 /* End of ia64.h */