gcc/config/crx/crx.h

   1 /* Definitions of target machine for GNU compiler, for CRX.
   2    Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
   3    2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
   4    Free Software Foundation, Inc.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef GCC_CRX_H
  23 #define GCC_CRX_H
  24
  25 /*****************************************************************************/
  26 /* CONTROLLING THE DRIVER                                                    */
  27 /*****************************************************************************/
  28
  29 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
  30     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
  31     %{!fexceptions:-fno-exceptions} \
  32     %{!fthreadsafe-statics:-fno-threadsafe-statics}"
  33
  34 #undef  STARTFILE_SPEC
  35 #define STARTFILE_SPEC "crti.o%s crtbegin.o%s"
  36
  37 #undef  ENDFILE_SPEC
  38 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
  39
  40 #undef MATH_LIBRARY
  41 #define MATH_LIBRARY ""
  42
  43 /*****************************************************************************/
  44 /* RUN-TIME TARGET SPECIFICATION                                             */
  45 /*****************************************************************************/
  46
  47 #ifndef TARGET_CPU_CPP_BUILTINS
  48 #define TARGET_CPU_CPP_BUILTINS()                               \
  49 do {                                                            \
  50      builtin_define("__CRX__");                                 \
  51      builtin_define("__CR__");                                  \
  52 } while (0)
  53 #endif
  54
  55 #define TARGET_VERSION fputs (" (CRX/ELF)", stderr);
  56
  57 /* Put each function in its own section so that PAGE-instruction
  58  * relaxation can do its best.  */
  59 #define OPTIMIZATION_OPTIONS(LEVEL, SIZEFLAG)   \
  60     do {                                        \
  61         if ((LEVEL) || (SIZEFLAG))              \
  62             flag_function_sections = 1; \
  63     } while (0)
  64
  65 /* Show we can debug even without a frame pointer.  */
  66 #define CAN_DEBUG_WITHOUT_FP
  67
  68 /*****************************************************************************/
  69 /* STORAGE LAYOUT                                                            */
  70 /*****************************************************************************/
  71
  72 #define BITS_BIG_ENDIAN  0
  73
  74 #define BYTES_BIG_ENDIAN 0
  75
  76 #define WORDS_BIG_ENDIAN 0
  77
  78 #define UNITS_PER_WORD 4
  79
  80 #define POINTER_SIZE 32
  81
  82 #define PARM_BOUNDARY 32
  83
  84 #define STACK_BOUNDARY 32
  85
  86 #define FUNCTION_BOUNDARY 32
  87
  88 #define STRUCTURE_SIZE_BOUNDARY 32
  89
  90 #define BIGGEST_ALIGNMENT 32
  91
  92 /* In CRX arrays of chars are word-aligned, so strcpy() will be faster.  */
  93 #define DATA_ALIGNMENT(TYPE, ALIGN) \
  94   (TREE_CODE (TYPE) == ARRAY_TYPE && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
  95    && (ALIGN) < BITS_PER_WORD \
  96    ? (BITS_PER_WORD) : (ALIGN))
  97
  98 /* In CRX strings are word-aligned so strcpy from constants will be faster. */
  99 #define CONSTANT_ALIGNMENT(CONSTANT, ALIGN) \
 100   (TREE_CODE (CONSTANT) == STRING_CST && (ALIGN) < BITS_PER_WORD \
 101    ? (BITS_PER_WORD) : (ALIGN))
 102
 103 #define STRICT_ALIGNMENT 0
 104
 105 #define PCC_BITFIELD_TYPE_MATTERS 1
 106
 107 /*****************************************************************************/
 108 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES                                      */
 109 /*****************************************************************************/
 110
 111 #define INT_TYPE_SIZE           32
 112
 113 #define SHORT_TYPE_SIZE         16
 114
 115 #define LONG_TYPE_SIZE          32
 116
 117 #define LONG_LONG_TYPE_SIZE     64
 118
 119 #define FLOAT_TYPE_SIZE         32
 120
 121 #define DOUBLE_TYPE_SIZE        64
 122
 123 #define LONG_DOUBLE_TYPE_SIZE   64
 124
 125 #define DEFAULT_SIGNED_CHAR     1
 126
 127 #define SIZE_TYPE               "unsigned int"
 128
 129 #define PTRDIFF_TYPE            "int"
 130
 131 /*****************************************************************************/
 132 /* REGISTER USAGE.                                                           */
 133 /*****************************************************************************/
 134
 135 #define FIRST_PSEUDO_REGISTER   19
 136
 137 /* On the CRX, only the stack pointer (r15) is such. */
 138 #define FIXED_REGISTERS \
 139   { \
 140  /* r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10 */  \
 141     0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,      \
 142  /* r11 r12 r13 ra  sp  r16 r17 cc */               \
 143     0,  0,  0,  0,  1,  0,  0,  1                   \
 144   }
 145
 146 /* On the CRX, calls clobbers r0-r6 (scratch registers), ra (the return address)
 147  * and sp - (the stack pointer which is fixed). */
 148 #define CALL_USED_REGISTERS \
 149   { \
 150  /* r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10 */  \
 151     1,  1,  1,  1,  1,  1,  1,  0,  0,  0,  0,      \
 152  /* r11 r12 r13 ra  sp  r16 r17 cc */               \
 153     0,  0,  0,  1,  1,  1,  1,  1                   \
 154   }
 155
 156 #define HARD_REGNO_NREGS(REGNO, MODE) \
 157     ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 158
 159 /* On the CRX architecture, HILO regs can only hold SI mode. */
 160 #define HARD_REGNO_MODE_OK(REGNO, MODE) crx_hard_regno_mode_ok(REGNO, MODE)
 161
 162 /* So far no patterns for moving CCMODE data are available */
 163 #define AVOID_CCMODE_COPIES
 164
 165 /* Interrupt functions can only use registers that have already been saved by
 166  * the prologue, even if they would normally be call-clobbered. */
 167 #define HARD_REGNO_RENAME_OK(SRC, DEST) \
 168   (!crx_interrupt_function_p () || df_regs_ever_live_p (DEST))
 169
 170 #define MODES_TIEABLE_P(MODE1, MODE2)  1
 171
 172 enum reg_class
 173 {
 174   NO_REGS,
 175   LO_REGS,
 176   HI_REGS,
 177   HILO_REGS,
 178   NOSP_REGS,
 179   GENERAL_REGS,
 180   ALL_REGS,
 181   LIM_REG_CLASSES
 182 };
 183
 184 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 185
 186 /* The following macro defines cover classes for Integrated Register
 187    Allocator.  Cover classes is a set of non-intersected register
 188    classes covering all hard registers used for register allocation
 189    purpose.  Any move between two registers of a cover class should be
 190    cheaper than load or store of the registers.  The macro value is
 191    array of register classes with LIM_REG_CLASSES used as the end
 192    marker.  */
 193
 194 #define IRA_COVER_CLASSES         \
 195 {                                 \
 196    GENERAL_REGS, LIM_REG_CLASSES  \
 197 }
 198
 199 #define REG_CLASS_NAMES \
 200   {                     \
 201     "NO_REGS",          \
 202     "LO_REGS",          \
 203     "HI_REGS",          \
 204     "HILO_REGS",        \
 205     "NOSP_REGS",        \
 206     "GENERAL_REGS",     \
 207     "ALL_REGS"          \
 208   }
 209
 210 #define REG_CLASS_CONTENTS                              \
 211   {                                                     \
 212     {0x00000000}, /* NO_REGS                    */      \
 213     {0x00010000}, /* LO_REGS :          16      */      \
 214     {0x00020000}, /* HI_REGS :          17      */      \
 215     {0x00030000}, /* HILO_REGS :        16, 17  */      \
 216     {0x00007fff}, /* NOSP_REGS :        0 - 14  */      \
 217     {0x0000ffff}, /* GENERAL_REGS :     0 - 15  */      \
 218     {0x0007ffff}  /* ALL_REGS :         0 - 18  */      \
 219   }
 220
 221 #define REGNO_REG_CLASS(REGNO)  crx_regno_reg_class(REGNO)
 222
 223 #define BASE_REG_CLASS          GENERAL_REGS
 224
 225 #define INDEX_REG_CLASS         GENERAL_REGS
 226
 227 #define REG_CLASS_FROM_LETTER(C)        \
 228   ((C) == 'b' ? NOSP_REGS :             \
 229    (C) == 'l' ? LO_REGS :               \
 230    (C) == 'h' ? HI_REGS :               \
 231    (C) == 'k' ? HILO_REGS :             \
 232   NO_REGS)
 233
 234 #define REGNO_OK_FOR_BASE_P(REGNO) \
 235   ((REGNO) < 16 \
 236    || (reg_renumber && (unsigned)reg_renumber[REGNO] < 16))
 237
 238 #define REGNO_OK_FOR_INDEX_P(REGNO)        REGNO_OK_FOR_BASE_P(REGNO)
 239
 240 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
 241
 242 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
 243   crx_secondary_reload_class (CLASS, MODE, X)
 244
 245 #define CLASS_MAX_NREGS(CLASS, MODE) \
 246     (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD
 247
 248 #define SIGNED_INT_FITS_N_BITS(imm, N) \
 249   ((((imm) < ((long long)1<<((N)-1))) && ((imm) >= -((long long)1<<((N)-1)))) ? 1 : 0)
 250
 251 #define UNSIGNED_INT_FITS_N_BITS(imm, N) \
 252   (((imm) < ((long long)1<<(N)) && (imm) >= (long long)0) ? 1 : 0)
 253
 254 #define HILO_REGNO_P(regno) \
 255   (reg_classes_intersect_p(REGNO_REG_CLASS(regno), HILO_REGS))
 256
 257 #define INT_CST4(VALUE) \
 258   (((VALUE) >= -1 && (VALUE) <= 4) || (VALUE) == -4 \
 259   || (VALUE) == 7 || (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 32 \
 260   || (VALUE) == 20 || (VALUE) == 12 || (VALUE) == 48)
 261
 262 #define CONST_OK_FOR_LETTER_P(VALUE, C)                         \
 263   /* Legal const for store immediate instructions */            \
 264   ((C) == 'I' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 3) :            \
 265    (C) == 'J' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 4) :            \
 266    (C) == 'K' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 5) :            \
 267    (C) == 'L' ? INT_CST4(VALUE) :                               \
 268   0)
 269
 270 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)  \
 271   ((C) == 'G' ? crx_const_double_ok (VALUE) :   \
 272   0)
 273
 274 /*****************************************************************************/
 275 /* STACK LAYOUT AND CALLING CONVENTIONS.                                     */
 276 /*****************************************************************************/
 277
 278 #define STACK_GROWS_DOWNWARD
 279
 280 #define STARTING_FRAME_OFFSET  0
 281
 282 #define STACK_POINTER_REGNUM    15
 283
 284 #define FRAME_POINTER_REGNUM    13
 285
 286 #define ARG_POINTER_REGNUM      12
 287
 288 #define STATIC_CHAIN_REGNUM     1
 289
 290 #define RETURN_ADDRESS_REGNUM   14
 291
 292 #define FIRST_PARM_OFFSET(FNDECL)  0
 293
 294 #define ELIMINABLE_REGS \
 295   { \
 296     { ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM}, \
 297     { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM}, \
 298     { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}  \
 299   }
 300
 301 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 302   do {                                                                  \
 303     (OFFSET) = crx_initial_elimination_offset ((FROM), (TO));           \
 304   } while (0)
 305
 306 /*****************************************************************************/
 307 /* PASSING FUNCTION ARGUMENTS                                                */
 308 /*****************************************************************************/
 309
 310 #define ACCUMULATE_OUTGOING_ARGS (TARGET_NO_PUSH_ARGS)
 311
 312 #define PUSH_ARGS (!TARGET_NO_PUSH_ARGS)
 313
 314 #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
 315
 316 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 317   ((rtx) crx_function_arg(&(CUM), (MODE), (TYPE), (NAMED)))
 318
 319 #ifndef CUMULATIVE_ARGS
 320 struct cumulative_args
 321 {
 322   int ints;
 323 };
 324
 325 #define CUMULATIVE_ARGS struct cumulative_args
 326 #endif
 327
 328 /* On the CRX architecture, Varargs routines should receive their parameters on
 329  * the stack.  */
 330
 331 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 332   crx_init_cumulative_args(&(CUM), (FNTYPE), (LIBNAME))
 333
 334 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
 335   crx_function_arg_advance(&(CUM), (MODE), (TYPE), (NAMED))
 336
 337 #define FUNCTION_ARG_REGNO_P(REGNO)  crx_function_arg_regno_p(REGNO)
 338
 339 /*****************************************************************************/
 340 /* RETURNING FUNCTION VALUE                                                  */
 341 /*****************************************************************************/
 342
 343 /* On the CRX, the return value is in R0 */
 344
 345 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 346         gen_rtx_REG(TYPE_MODE (VALTYPE), 0)
 347
 348 #define LIBCALL_VALUE(MODE)     gen_rtx_REG (MODE, 0)
 349
 350 #define FUNCTION_VALUE_REGNO_P(N)       ((N) == 0)
 351
 352 #define CRX_STRUCT_VALUE_REGNUM  0
 353
 354 /*****************************************************************************/
 355 /* GENERATING CODE FOR PROFILING - NOT IMPLEMENTED                           */
 356 /*****************************************************************************/
 357
 358 #undef  FUNCTION_PROFILER
 359 #define FUNCTION_PROFILER(STREAM, LABELNO)      \
 360 {                                               \
 361     sorry ("Profiler support for CRX");         \
 362 }
 363
 364 /*****************************************************************************/
 365 /* TRAMPOLINES FOR NESTED FUNCTIONS - NOT SUPPORTED                          */
 366 /*****************************************************************************/
 367
 368 #define TRAMPOLINE_SIZE 32
 369
 370 /*****************************************************************************/
 371 /* ADDRESSING MODES                                                          */
 372 /*****************************************************************************/
 373
 374 #define CONSTANT_ADDRESS_P(X)                                           \
 375   (GET_CODE (X) == LABEL_REF                                            \
 376    || GET_CODE (X) == SYMBOL_REF                                        \
 377    || GET_CODE (X) == CONST                                             \
 378    || GET_CODE (X) == CONST_INT)
 379
 380 #define MAX_REGS_PER_ADDRESS 2
 381
 382 #define HAVE_POST_INCREMENT  1
 383 #define HAVE_POST_DECREMENT  1
 384 #define HAVE_POST_MODIFY_DISP 1
 385 #define HAVE_POST_MODIFY_REG 0
 386
 387 #ifdef REG_OK_STRICT
 388 #define REG_OK_FOR_BASE_P(X)    REGNO_OK_FOR_BASE_P (REGNO (X))
 389 #define REG_OK_FOR_INDEX_P(X)   REGNO_OK_FOR_INDEX_P (REGNO (X))
 390 #else
 391 #define REG_OK_FOR_BASE_P(X)    1
 392 #define REG_OK_FOR_INDEX_P(X)   1
 393 #endif /* REG_OK_STRICT */
 394
 395 #define LEGITIMATE_CONSTANT_P(X)  1
 396
 397 /*****************************************************************************/
 398 /* CONDITION CODE STATUS                                                     */
 399 /*****************************************************************************/
 400
 401 /*****************************************************************************/
 402 /* RELATIVE COSTS OF OPERATIONS                                              */
 403 /*****************************************************************************/
 404
 405 #define MEMORY_MOVE_COST(MODE, CLASS, IN) crx_memory_move_cost(MODE, CLASS, IN)
 406 /* Moving to processor register flushes pipeline - thus asymmetric */
 407 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((TO != GENERAL_REGS) ? 8 : 2)
 408 /* Assume best case (branch predicted) */
 409 #define BRANCH_COST(speed_p, predictable_p) 2
 410
 411 #define SLOW_BYTE_ACCESS  1
 412
 413 /*****************************************************************************/
 414 /* DIVIDING THE OUTPUT INTO SECTIONS                                         */
 415 /*****************************************************************************/
 416
 417 #define TEXT_SECTION_ASM_OP     "\t.section\t.text"
 418
 419 #define DATA_SECTION_ASM_OP     "\t.section\t.data"
 420
 421 #define BSS_SECTION_ASM_OP      "\t.section\t.bss"
 422
 423 /*****************************************************************************/
 424 /* POSITION INDEPENDENT CODE                                                 */
 425 /*****************************************************************************/
 426
 427 #define PIC_OFFSET_TABLE_REGNUM  12
 428
 429 #define LEGITIMATE_PIC_OPERAND_P(X)  1
 430
 431 /*****************************************************************************/
 432 /* ASSEMBLER FORMAT                                                          */
 433 /*****************************************************************************/
 434
 435 #define GLOBAL_ASM_OP "\t.globl\t"
 436
 437 #undef  USER_LABEL_PREFIX
 438 #define USER_LABEL_PREFIX "_"
 439
 440 #undef  ASM_OUTPUT_LABELREF
 441 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
 442   asm_fprintf (STREAM, "%U%s", (*targetm.strip_name_encoding) (NAME));
 443
 444 #undef  ASM_APP_ON
 445 #define ASM_APP_ON   "#APP\n"
 446
 447 #undef  ASM_APP_OFF
 448 #define ASM_APP_OFF  "#NO_APP\n"
 449
 450 /*****************************************************************************/
 451 /* INSTRUCTION OUTPUT                                                        */
 452 /*****************************************************************************/
 453
 454 #define REGISTER_NAMES \
 455   { \
 456     "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7", \
 457     "r8",  "r9",  "r10", "r11", "r12", "r13", "ra",  "sp", \
 458     "lo",  "hi",  "cc" \
 459   }
 460
 461 #define PRINT_OPERAND(STREAM, X, CODE) \
 462   crx_print_operand(STREAM, X, CODE)
 463
 464 #define PRINT_OPERAND_ADDRESS(STREAM, ADDR) \
 465   crx_print_operand_address(STREAM, ADDR)
 466
 467 /*****************************************************************************/
 468 /* OUTPUT OF DISPATCH TABLES                                                 */
 469 /*****************************************************************************/
 470
 471 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
 472   asm_fprintf ((STREAM), "\t.long\t.L%d\n", (VALUE))
 473
 474 /*****************************************************************************/
 475 /* ALIGNMENT IN ASSEMBLER FILE                                               */
 476 /*****************************************************************************/
 477
 478 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
 479   asm_fprintf ((STREAM), "\t.align\t%d\n", 1 << (POWER))
 480
 481 /*****************************************************************************/
 482 /* MISCELLANEOUS PARAMETERS                                                  */
 483 /*****************************************************************************/
 484
 485 #define CASE_VECTOR_MODE  Pmode
 486
 487 #define MOVE_MAX 4
 488
 489 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 490
 491 #define STORE_FLAG_VALUE  1
 492
 493 #define Pmode           SImode
 494
 495 #define FUNCTION_MODE   QImode
 496
 497 #endif /* ! GCC_CRX_H */