1 /* Verify that overloaded built-ins for vec_sl produce the right results. */
2 /* This test covers the shift left tests with the -fwrapv option. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_altivec_ok } */
6 /* { dg-options "-maltivec -O2 -fwrapv" } */
11 testsl_signed_char (vector
signed char x
, vector
unsigned char y
)
17 testsl_unsigned_char (vector
unsigned char x
, vector
unsigned char y
)
23 testsl_signed_short (vector
signed short x
, vector
unsigned short y
)
29 testsl_unsigned_short (vector
unsigned short x
, vector
unsigned short y
)
35 testsl_signed_int (vector
signed int x
, vector
unsigned int y
)
41 testsl_unsigned_int (vector
unsigned int x
, vector
unsigned int y
)
46 /* { dg-final { scan-assembler-times "vslb" 2 } } */
47 /* { dg-final { scan-assembler-times "vslh" 2 } } */
48 /* { dg-final { scan-assembler-times "vslw" 2 } } */