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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
45 #include "params.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
56 global CSE.
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `reg_qty' records what quantity a register is currently thought
84 of as containing.
86 All real quantity numbers are greater than or equal to `max_reg'.
87 If register N has not been assigned a quantity, reg_qty[N] will equal N.
89 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
90 entries should be referenced with an index below `max_reg'.
92 We also maintain a bidirectional chain of registers for each
93 quantity number. The `qty_table` members `first_reg' and `last_reg',
94 and `reg_eqv_table' members `next' and `prev' hold these chains.
96 The first register in a chain is the one whose lifespan is least local.
97 Among equals, it is the one that was seen first.
98 We replace any equivalent register with that one.
100 If two registers have the same quantity number, it must be true that
101 REG expressions with qty_table `mode' must be in the hash table for both
102 registers and must be in the same class.
104 The converse is not true. Since hard registers may be referenced in
105 any mode, two REG expressions might be equivalent in the hash table
106 but not have the same quantity number if the quantity number of one
107 of the registers is not the same mode as those expressions.
109 Constants and quantity numbers
111 When a quantity has a known constant value, that value is stored
112 in the appropriate qty_table `const_rtx'. This is in addition to
113 putting the constant in the hash table as is usual for non-regs.
115 Whether a reg or a constant is preferred is determined by the configuration
116 macro CONST_COSTS and will often depend on the constant value. In any
117 event, expressions containing constants can be simplified, by fold_rtx.
119 When a quantity has a known nearly constant value (such as an address
120 of a stack slot), that value is stored in the appropriate qty_table
121 `const_rtx'.
123 Integer constants don't have a machine mode. However, cse
124 determines the intended machine mode from the destination
125 of the instruction that moves the constant. The machine mode
126 is recorded in the hash table along with the actual RTL
127 constant expression so that different modes are kept separate.
129 Other expressions:
131 To record known equivalences among expressions in general
132 we use a hash table called `table'. It has a fixed number of buckets
133 that contain chains of `struct table_elt' elements for expressions.
134 These chains connect the elements whose expressions have the same
135 hash codes.
137 Other chains through the same elements connect the elements which
138 currently have equivalent values.
140 Register references in an expression are canonicalized before hashing
141 the expression. This is done using `reg_qty' and qty_table `first_reg'.
142 The hash code of a register reference is computed using the quantity
143 number, not the register number.
145 When the value of an expression changes, it is necessary to remove from the
146 hash table not just that expression but all expressions whose values
147 could be different as a result.
149 1. If the value changing is in memory, except in special cases
150 ANYTHING referring to memory could be changed. That is because
151 nobody knows where a pointer does not point.
152 The function `invalidate_memory' removes what is necessary.
154 The special cases are when the address is constant or is
155 a constant plus a fixed register such as the frame pointer
156 or a static chain pointer. When such addresses are stored in,
157 we can tell exactly which other such addresses must be invalidated
158 due to overlap. `invalidate' does this.
159 All expressions that refer to non-constant
160 memory addresses are also invalidated. `invalidate_memory' does this.
162 2. If the value changing is a register, all expressions
163 containing references to that register, and only those,
164 must be removed.
166 Because searching the entire hash table for expressions that contain
167 a register is very slow, we try to figure out when it isn't necessary.
168 Precisely, this is necessary only when expressions have been
169 entered in the hash table using this register, and then the value has
170 changed, and then another expression wants to be added to refer to
171 the register's new value. This sequence of circumstances is rare
172 within any one basic block.
174 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
175 reg_tick[i] is incremented whenever a value is stored in register i.
176 reg_in_table[i] holds -1 if no references to register i have been
177 entered in the table; otherwise, it contains the value reg_tick[i] had
178 when the references were entered. If we want to enter a reference
179 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
180 Until we want to enter a new entry, the mere fact that the two vectors
181 don't match makes the entries be ignored if anyone tries to match them.
183 Registers themselves are entered in the hash table as well as in
184 the equivalent-register chains. However, the vectors `reg_tick'
185 and `reg_in_table' do not apply to expressions which are simple
186 register references. These expressions are removed from the table
187 immediately when they become invalid, and this can be done even if
188 we do not immediately search for all the expressions that refer to
189 the register.
191 A CLOBBER rtx in an instruction invalidates its operand for further
192 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
193 invalidates everything that resides in memory.
195 Related expressions:
197 Constant expressions that differ only by an additive integer
198 are called related. When a constant expression is put in
199 the table, the related expression with no constant term
200 is also entered. These are made to point at each other
201 so that it is possible to find out if there exists any
202 register equivalent to an expression related to a given expression. */
204 /* One plus largest register number used in this function. */
206 static int max_reg;
208 /* One plus largest instruction UID used in this function at time of
209 cse_main call. */
211 static int max_insn_uid;
213 /* Length of qty_table vector. We know in advance we will not need
214 a quantity number this big. */
216 static int max_qty;
218 /* Next quantity number to be allocated.
219 This is 1 + the largest number needed so far. */
221 static int next_qty;
223 /* Per-qty information tracking.
225 `first_reg' and `last_reg' track the head and tail of the
226 chain of registers which currently contain this quantity.
228 `mode' contains the machine mode of this quantity.
230 `const_rtx' holds the rtx of the constant value of this
231 quantity, if known. A summations of the frame/arg pointer
232 and a constant can also be entered here. When this holds
233 a known value, `const_insn' is the insn which stored the
234 constant value.
236 `comparison_{code,const,qty}' are used to track when a
237 comparison between a quantity and some constant or register has
238 been passed. In such a case, we know the results of the comparison
239 in case we see it again. These members record a comparison that
240 is known to be true. `comparison_code' holds the rtx code of such
241 a comparison, else it is set to UNKNOWN and the other two
242 comparison members are undefined. `comparison_const' holds
243 the constant being compared against, or zero if the comparison
244 is not against a constant. `comparison_qty' holds the quantity
245 being compared against when the result is known. If the comparison
246 is not with a register, `comparison_qty' is -1. */
248 struct qty_table_elem
250 rtx const_rtx;
251 rtx const_insn;
252 rtx comparison_const;
253 int comparison_qty;
254 unsigned int first_reg, last_reg;
255 /* The sizes of these fields should match the sizes of the
256 code and mode fields of struct rtx_def (see rtl.h). */
257 ENUM_BITFIELD(rtx_code) comparison_code : 16;
258 ENUM_BITFIELD(machine_mode) mode : 8;
261 /* The table of all qtys, indexed by qty number. */
262 static struct qty_table_elem *qty_table;
264 #ifdef HAVE_cc0
265 /* For machines that have a CC0, we do not record its value in the hash
266 table since its use is guaranteed to be the insn immediately following
267 its definition and any other insn is presumed to invalidate it.
269 Instead, we store below the value last assigned to CC0. If it should
270 happen to be a constant, it is stored in preference to the actual
271 assigned value. In case it is a constant, we store the mode in which
272 the constant should be interpreted. */
274 static rtx prev_insn_cc0;
275 static enum machine_mode prev_insn_cc0_mode;
277 /* Previous actual insn. 0 if at first insn of basic block. */
279 static rtx prev_insn;
280 #endif
282 /* Insn being scanned. */
284 static rtx this_insn;
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
288 value.
290 Or -1 if this register is at the end of the chain.
292 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
294 /* Per-register equivalence chain. */
295 struct reg_eqv_elem
297 int next, prev;
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem *reg_eqv_table;
303 struct cse_reg_info
305 /* Next in hash chain. */
306 struct cse_reg_info *hash_next;
308 /* The next cse_reg_info structure in the free or used list. */
309 struct cse_reg_info *next;
311 /* Search key */
312 unsigned int regno;
314 /* The quantity number of the register's current contents. */
315 int reg_qty;
317 /* The number of times the register has been altered in the current
318 basic block. */
319 int reg_tick;
321 /* The REG_TICK value at which rtx's containing this register are
322 valid in the hash table. If this does not equal the current
323 reg_tick value, such expressions existing in the hash table are
324 invalid. */
325 int reg_in_table;
327 /* The SUBREG that was set when REG_TICK was last incremented. Set
328 to -1 if the last store was to the whole register, not a subreg. */
329 unsigned int subreg_ticked;
332 /* A free list of cse_reg_info entries. */
333 static struct cse_reg_info *cse_reg_info_free_list;
335 /* A used list of cse_reg_info entries. */
336 static struct cse_reg_info *cse_reg_info_used_list;
337 static struct cse_reg_info *cse_reg_info_used_list_end;
339 /* A mapping from registers to cse_reg_info data structures. */
340 #define REGHASH_SHIFT 7
341 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
342 #define REGHASH_MASK (REGHASH_SIZE - 1)
343 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
345 #define REGHASH_FN(REGNO) \
346 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
348 /* The last lookup we did into the cse_reg_info_tree. This allows us
349 to cache repeated lookups. */
350 static unsigned int cached_regno;
351 static struct cse_reg_info *cached_cse_reg_info;
353 /* A HARD_REG_SET containing all the hard registers for which there is
354 currently a REG expression in the hash table. Note the difference
355 from the above variables, which indicate if the REG is mentioned in some
356 expression in the table. */
358 static HARD_REG_SET hard_regs_in_table;
360 /* CUID of insn that starts the basic block currently being cse-processed. */
362 static int cse_basic_block_start;
364 /* CUID of insn that ends the basic block currently being cse-processed. */
366 static int cse_basic_block_end;
368 /* Vector mapping INSN_UIDs to cuids.
369 The cuids are like uids but increase monotonically always.
370 We use them to see whether a reg is used outside a given basic block. */
372 static int *uid_cuid;
374 /* Highest UID in UID_CUID. */
375 static int max_uid;
377 /* Get the cuid of an insn. */
379 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
381 /* Nonzero if this pass has made changes, and therefore it's
382 worthwhile to run the garbage collector. */
384 static int cse_altered;
386 /* Nonzero if cse has altered conditional jump insns
387 in such a way that jump optimization should be redone. */
389 static int cse_jumps_altered;
391 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
392 REG_LABEL, we have to rerun jump after CSE to put in the note. */
393 static int recorded_label_ref;
395 /* canon_hash stores 1 in do_not_record
396 if it notices a reference to CC0, PC, or some other volatile
397 subexpression. */
399 static int do_not_record;
401 #ifdef LOAD_EXTEND_OP
403 /* Scratch rtl used when looking for load-extended copy of a MEM. */
404 static rtx memory_extend_rtx;
405 #endif
407 /* canon_hash stores 1 in hash_arg_in_memory
408 if it notices a reference to memory within the expression being hashed. */
410 static int hash_arg_in_memory;
412 /* The hash table contains buckets which are chains of `struct table_elt's,
413 each recording one expression's information.
414 That expression is in the `exp' field.
416 The canon_exp field contains a canonical (from the point of view of
417 alias analysis) version of the `exp' field.
419 Those elements with the same hash code are chained in both directions
420 through the `next_same_hash' and `prev_same_hash' fields.
422 Each set of expressions with equivalent values
423 are on a two-way chain through the `next_same_value'
424 and `prev_same_value' fields, and all point with
425 the `first_same_value' field at the first element in
426 that chain. The chain is in order of increasing cost.
427 Each element's cost value is in its `cost' field.
429 The `in_memory' field is nonzero for elements that
430 involve any reference to memory. These elements are removed
431 whenever a write is done to an unidentified location in memory.
432 To be safe, we assume that a memory address is unidentified unless
433 the address is either a symbol constant or a constant plus
434 the frame pointer or argument pointer.
436 The `related_value' field is used to connect related expressions
437 (that differ by adding an integer).
438 The related expressions are chained in a circular fashion.
439 `related_value' is zero for expressions for which this
440 chain is not useful.
442 The `cost' field stores the cost of this element's expression.
443 The `regcost' field stores the value returned by approx_reg_cost for
444 this element's expression.
446 The `is_const' flag is set if the element is a constant (including
447 a fixed address).
449 The `flag' field is used as a temporary during some search routines.
451 The `mode' field is usually the same as GET_MODE (`exp'), but
452 if `exp' is a CONST_INT and has no machine mode then the `mode'
453 field is the mode it was being used as. Each constant is
454 recorded separately for each mode it is used with. */
456 struct table_elt
458 rtx exp;
459 rtx canon_exp;
460 struct table_elt *next_same_hash;
461 struct table_elt *prev_same_hash;
462 struct table_elt *next_same_value;
463 struct table_elt *prev_same_value;
464 struct table_elt *first_same_value;
465 struct table_elt *related_value;
466 int cost;
467 int regcost;
468 /* The size of this field should match the size
469 of the mode field of struct rtx_def (see rtl.h). */
470 ENUM_BITFIELD(machine_mode) mode : 8;
471 char in_memory;
472 char is_const;
473 char flag;
476 /* We don't want a lot of buckets, because we rarely have very many
477 things stored in the hash table, and a lot of buckets slows
478 down a lot of loops that happen frequently. */
479 #define HASH_SHIFT 5
480 #define HASH_SIZE (1 << HASH_SHIFT)
481 #define HASH_MASK (HASH_SIZE - 1)
483 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
484 register (hard registers may require `do_not_record' to be set). */
486 #define HASH(X, M) \
487 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
488 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
489 : canon_hash (X, M)) & HASH_MASK)
491 /* Determine whether register number N is considered a fixed register for the
492 purpose of approximating register costs.
493 It is desirable to replace other regs with fixed regs, to reduce need for
494 non-fixed hard regs.
495 A reg wins if it is either the frame pointer or designated as fixed. */
496 #define FIXED_REGNO_P(N) \
497 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
498 || fixed_regs[N] || global_regs[N])
500 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
501 hard registers and pointers into the frame are the cheapest with a cost
502 of 0. Next come pseudos with a cost of one and other hard registers with
503 a cost of 2. Aside from these special cases, call `rtx_cost'. */
505 #define CHEAP_REGNO(N) \
506 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
507 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
508 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
509 || ((N) < FIRST_PSEUDO_REGISTER \
510 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
512 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
513 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
515 /* Get the info associated with register N. */
517 #define GET_CSE_REG_INFO(N) \
518 (((N) == cached_regno && cached_cse_reg_info) \
519 ? cached_cse_reg_info : get_cse_reg_info ((N)))
521 /* Get the number of times this register has been updated in this
522 basic block. */
524 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
526 /* Get the point at which REG was recorded in the table. */
528 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
530 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
531 SUBREG). */
533 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
535 /* Get the quantity number for REG. */
537 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
539 /* Determine if the quantity number for register X represents a valid index
540 into the qty_table. */
542 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
544 static struct table_elt *table[HASH_SIZE];
546 /* Chain of `struct table_elt's made so far for this function
547 but currently removed from the table. */
549 static struct table_elt *free_element_chain;
551 /* Number of `struct table_elt' structures made so far for this function. */
553 static int n_elements_made;
555 /* Maximum value `n_elements_made' has had so far in this compilation
556 for functions previously processed. */
558 static int max_elements_made;
560 /* Surviving equivalence class when two equivalence classes are merged
561 by recording the effects of a jump in the last insn. Zero if the
562 last insn was not a conditional jump. */
564 static struct table_elt *last_jump_equiv_class;
566 /* Set to the cost of a constant pool reference if one was found for a
567 symbolic constant. If this was found, it means we should try to
568 convert constants into constant pool entries if they don't fit in
569 the insn. */
571 static int constant_pool_entries_cost;
572 static int constant_pool_entries_regcost;
574 /* This data describes a block that will be processed by cse_basic_block. */
576 struct cse_basic_block_data
578 /* Lowest CUID value of insns in block. */
579 int low_cuid;
580 /* Highest CUID value of insns in block. */
581 int high_cuid;
582 /* Total number of SETs in block. */
583 int nsets;
584 /* Last insn in the block. */
585 rtx last;
586 /* Size of current branch path, if any. */
587 int path_size;
588 /* Current branch path, indicating which branches will be taken. */
589 struct branch_path
591 /* The branch insn. */
592 rtx branch;
593 /* Whether it should be taken or not. AROUND is the same as taken
594 except that it is used when the destination label is not preceded
595 by a BARRIER. */
596 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
597 } *path;
600 static bool fixed_base_plus_p (rtx x);
601 static int notreg_cost (rtx, enum rtx_code);
602 static int approx_reg_cost_1 (rtx *, void *);
603 static int approx_reg_cost (rtx);
604 static int preferrable (int, int, int, int);
605 static void new_basic_block (void);
606 static void make_new_qty (unsigned int, enum machine_mode);
607 static void make_regs_eqv (unsigned int, unsigned int);
608 static void delete_reg_equiv (unsigned int);
609 static int mention_regs (rtx);
610 static int insert_regs (rtx, struct table_elt *, int);
611 static void remove_from_table (struct table_elt *, unsigned);
612 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
613 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
614 static rtx lookup_as_function (rtx, enum rtx_code);
615 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
616 enum machine_mode);
617 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
618 static void invalidate (rtx, enum machine_mode);
619 static int cse_rtx_varies_p (rtx, int);
620 static void remove_invalid_refs (unsigned int);
621 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
622 enum machine_mode);
623 static void rehash_using_reg (rtx);
624 static void invalidate_memory (void);
625 static void invalidate_for_call (void);
626 static rtx use_related_value (rtx, struct table_elt *);
627 static unsigned canon_hash (rtx, enum machine_mode);
628 static unsigned canon_hash_string (const char *);
629 static unsigned safe_hash (rtx, enum machine_mode);
630 static int exp_equiv_p (rtx, rtx, int, int);
631 static rtx canon_reg (rtx, rtx);
632 static void find_best_addr (rtx, rtx *, enum machine_mode);
633 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
634 enum machine_mode *,
635 enum machine_mode *);
636 static rtx fold_rtx (rtx, rtx);
637 static rtx equiv_constant (rtx);
638 static void record_jump_equiv (rtx, int);
639 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
640 int);
641 static void cse_insn (rtx, rtx);
642 static int addr_affects_sp_p (rtx);
643 static void invalidate_from_clobbers (rtx);
644 static rtx cse_process_notes (rtx, rtx);
645 static void cse_around_loop (rtx);
646 static void invalidate_skipped_set (rtx, rtx, void *);
647 static void invalidate_skipped_block (rtx);
648 static void cse_check_loop_start (rtx, rtx, void *);
649 static void cse_set_around_loop (rtx, rtx, rtx);
650 static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
651 static void count_reg_usage (rtx, int *, int);
652 static int check_for_label_ref (rtx *, void *);
653 extern void dump_class (struct table_elt*);
654 static struct cse_reg_info * get_cse_reg_info (unsigned int);
655 static int check_dependence (rtx *, void *);
657 static void flush_hash_table (void);
658 static bool insn_live_p (rtx, int *);
659 static bool set_live_p (rtx, rtx, int *);
660 static bool dead_libcall_p (rtx, int *);
661 static int cse_change_cc_mode (rtx *, void *);
662 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
663 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
665 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
666 virtual regs here because the simplify_*_operation routines are called
667 by integrate.c, which is called before virtual register instantiation. */
669 static bool
670 fixed_base_plus_p (rtx x)
672 switch (GET_CODE (x))
674 case REG:
675 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
676 return true;
677 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
678 return true;
679 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
680 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
681 return true;
682 return false;
684 case PLUS:
685 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
686 return false;
687 return fixed_base_plus_p (XEXP (x, 0));
689 case ADDRESSOF:
690 return true;
692 default:
693 return false;
697 /* Dump the expressions in the equivalence class indicated by CLASSP.
698 This function is used only for debugging. */
699 void
700 dump_class (struct table_elt *classp)
702 struct table_elt *elt;
704 fprintf (stderr, "Equivalence chain for ");
705 print_rtl (stderr, classp->exp);
706 fprintf (stderr, ": \n");
708 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
710 print_rtl (stderr, elt->exp);
711 fprintf (stderr, "\n");
715 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
717 static int
718 approx_reg_cost_1 (rtx *xp, void *data)
720 rtx x = *xp;
721 int *cost_p = data;
723 if (x && GET_CODE (x) == REG)
725 unsigned int regno = REGNO (x);
727 if (! CHEAP_REGNO (regno))
729 if (regno < FIRST_PSEUDO_REGISTER)
731 if (SMALL_REGISTER_CLASSES)
732 return 1;
733 *cost_p += 2;
735 else
736 *cost_p += 1;
740 return 0;
743 /* Return an estimate of the cost of the registers used in an rtx.
744 This is mostly the number of different REG expressions in the rtx;
745 however for some exceptions like fixed registers we use a cost of
746 0. If any other hard register reference occurs, return MAX_COST. */
748 static int
749 approx_reg_cost (rtx x)
751 int cost = 0;
753 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
754 return MAX_COST;
756 return cost;
759 /* Return a negative value if an rtx A, whose costs are given by COST_A
760 and REGCOST_A, is more desirable than an rtx B.
761 Return a positive value if A is less desirable, or 0 if the two are
762 equally good. */
763 static int
764 preferrable (int cost_a, int regcost_a, int cost_b, int regcost_b)
766 /* First, get rid of cases involving expressions that are entirely
767 unwanted. */
768 if (cost_a != cost_b)
770 if (cost_a == MAX_COST)
771 return 1;
772 if (cost_b == MAX_COST)
773 return -1;
776 /* Avoid extending lifetimes of hardregs. */
777 if (regcost_a != regcost_b)
779 if (regcost_a == MAX_COST)
780 return 1;
781 if (regcost_b == MAX_COST)
782 return -1;
785 /* Normal operation costs take precedence. */
786 if (cost_a != cost_b)
787 return cost_a - cost_b;
788 /* Only if these are identical consider effects on register pressure. */
789 if (regcost_a != regcost_b)
790 return regcost_a - regcost_b;
791 return 0;
794 /* Internal function, to compute cost when X is not a register; called
795 from COST macro to keep it simple. */
797 static int
798 notreg_cost (rtx x, enum rtx_code outer)
800 return ((GET_CODE (x) == SUBREG
801 && GET_CODE (SUBREG_REG (x)) == REG
802 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
803 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
804 && (GET_MODE_SIZE (GET_MODE (x))
805 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
806 && subreg_lowpart_p (x)
807 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
808 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
810 : rtx_cost (x, outer) * 2);
813 /* Return an estimate of the cost of computing rtx X.
814 One use is in cse, to decide which expression to keep in the hash table.
815 Another is in rtl generation, to pick the cheapest way to multiply.
816 Other uses like the latter are expected in the future. */
819 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED)
821 int i, j;
822 enum rtx_code code;
823 const char *fmt;
824 int total;
826 if (x == 0)
827 return 0;
829 /* Compute the default costs of certain things.
830 Note that targetm.rtx_costs can override the defaults. */
832 code = GET_CODE (x);
833 switch (code)
835 case MULT:
836 total = COSTS_N_INSNS (5);
837 break;
838 case DIV:
839 case UDIV:
840 case MOD:
841 case UMOD:
842 total = COSTS_N_INSNS (7);
843 break;
844 case USE:
845 /* Used in loop.c and combine.c as a marker. */
846 total = 0;
847 break;
848 default:
849 total = COSTS_N_INSNS (1);
852 switch (code)
854 case REG:
855 return 0;
857 case SUBREG:
858 /* If we can't tie these modes, make this expensive. The larger
859 the mode, the more expensive it is. */
860 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
861 return COSTS_N_INSNS (2
862 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
863 break;
865 default:
866 if ((*targetm.rtx_costs) (x, code, outer_code, &total))
867 return total;
868 break;
871 /* Sum the costs of the sub-rtx's, plus cost of this operation,
872 which is already in total. */
874 fmt = GET_RTX_FORMAT (code);
875 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
876 if (fmt[i] == 'e')
877 total += rtx_cost (XEXP (x, i), code);
878 else if (fmt[i] == 'E')
879 for (j = 0; j < XVECLEN (x, i); j++)
880 total += rtx_cost (XVECEXP (x, i, j), code);
882 return total;
885 /* Return cost of address expression X.
886 Expect that X is properly formed address reference. */
889 address_cost (rtx x, enum machine_mode mode)
891 /* The address_cost target hook does not deal with ADDRESSOF nodes. But,
892 during CSE, such nodes are present. Using an ADDRESSOF node which
893 refers to the address of a REG is a good thing because we can then
894 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
896 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
897 return -1;
899 /* We may be asked for cost of various unusual addresses, such as operands
900 of push instruction. It is not worthwhile to complicate writing
901 of the target hook by such cases. */
903 if (!memory_address_p (mode, x))
904 return 1000;
906 return (*targetm.address_cost) (x);
909 /* If the target doesn't override, compute the cost as with arithmetic. */
912 default_address_cost (rtx x)
914 return rtx_cost (x, MEM);
917 static struct cse_reg_info *
918 get_cse_reg_info (unsigned int regno)
920 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
921 struct cse_reg_info *p;
923 for (p = *hash_head; p != NULL; p = p->hash_next)
924 if (p->regno == regno)
925 break;
927 if (p == NULL)
929 /* Get a new cse_reg_info structure. */
930 if (cse_reg_info_free_list)
932 p = cse_reg_info_free_list;
933 cse_reg_info_free_list = p->next;
935 else
936 p = xmalloc (sizeof (struct cse_reg_info));
938 /* Insert into hash table. */
939 p->hash_next = *hash_head;
940 *hash_head = p;
942 /* Initialize it. */
943 p->reg_tick = 1;
944 p->reg_in_table = -1;
945 p->subreg_ticked = -1;
946 p->reg_qty = regno;
947 p->regno = regno;
948 p->next = cse_reg_info_used_list;
949 cse_reg_info_used_list = p;
950 if (!cse_reg_info_used_list_end)
951 cse_reg_info_used_list_end = p;
954 /* Cache this lookup; we tend to be looking up information about the
955 same register several times in a row. */
956 cached_regno = regno;
957 cached_cse_reg_info = p;
959 return p;
962 /* Clear the hash table and initialize each register with its own quantity,
963 for a new basic block. */
965 static void
966 new_basic_block (void)
968 int i;
970 next_qty = max_reg;
972 /* Clear out hash table state for this pass. */
974 memset (reg_hash, 0, sizeof reg_hash);
976 if (cse_reg_info_used_list)
978 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
979 cse_reg_info_free_list = cse_reg_info_used_list;
980 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
982 cached_cse_reg_info = 0;
984 CLEAR_HARD_REG_SET (hard_regs_in_table);
986 /* The per-quantity values used to be initialized here, but it is
987 much faster to initialize each as it is made in `make_new_qty'. */
989 for (i = 0; i < HASH_SIZE; i++)
991 struct table_elt *first;
993 first = table[i];
994 if (first != NULL)
996 struct table_elt *last = first;
998 table[i] = NULL;
1000 while (last->next_same_hash != NULL)
1001 last = last->next_same_hash;
1003 /* Now relink this hash entire chain into
1004 the free element list. */
1006 last->next_same_hash = free_element_chain;
1007 free_element_chain = first;
1011 #ifdef HAVE_cc0
1012 prev_insn = 0;
1013 prev_insn_cc0 = 0;
1014 #endif
1017 /* Say that register REG contains a quantity in mode MODE not in any
1018 register before and initialize that quantity. */
1020 static void
1021 make_new_qty (unsigned int reg, enum machine_mode mode)
1023 int q;
1024 struct qty_table_elem *ent;
1025 struct reg_eqv_elem *eqv;
1027 if (next_qty >= max_qty)
1028 abort ();
1030 q = REG_QTY (reg) = next_qty++;
1031 ent = &qty_table[q];
1032 ent->first_reg = reg;
1033 ent->last_reg = reg;
1034 ent->mode = mode;
1035 ent->const_rtx = ent->const_insn = NULL_RTX;
1036 ent->comparison_code = UNKNOWN;
1038 eqv = &reg_eqv_table[reg];
1039 eqv->next = eqv->prev = -1;
1042 /* Make reg NEW equivalent to reg OLD.
1043 OLD is not changing; NEW is. */
1045 static void
1046 make_regs_eqv (unsigned int new, unsigned int old)
1048 unsigned int lastr, firstr;
1049 int q = REG_QTY (old);
1050 struct qty_table_elem *ent;
1052 ent = &qty_table[q];
1054 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1055 if (! REGNO_QTY_VALID_P (old))
1056 abort ();
1058 REG_QTY (new) = q;
1059 firstr = ent->first_reg;
1060 lastr = ent->last_reg;
1062 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1063 hard regs. Among pseudos, if NEW will live longer than any other reg
1064 of the same qty, and that is beyond the current basic block,
1065 make it the new canonical replacement for this qty. */
1066 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1067 /* Certain fixed registers might be of the class NO_REGS. This means
1068 that not only can they not be allocated by the compiler, but
1069 they cannot be used in substitutions or canonicalizations
1070 either. */
1071 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1072 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1073 || (new >= FIRST_PSEUDO_REGISTER
1074 && (firstr < FIRST_PSEUDO_REGISTER
1075 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1076 || (uid_cuid[REGNO_FIRST_UID (new)]
1077 < cse_basic_block_start))
1078 && (uid_cuid[REGNO_LAST_UID (new)]
1079 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1081 reg_eqv_table[firstr].prev = new;
1082 reg_eqv_table[new].next = firstr;
1083 reg_eqv_table[new].prev = -1;
1084 ent->first_reg = new;
1086 else
1088 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1089 Otherwise, insert before any non-fixed hard regs that are at the
1090 end. Registers of class NO_REGS cannot be used as an
1091 equivalent for anything. */
1092 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1093 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1094 && new >= FIRST_PSEUDO_REGISTER)
1095 lastr = reg_eqv_table[lastr].prev;
1096 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1097 if (reg_eqv_table[lastr].next >= 0)
1098 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1099 else
1100 qty_table[q].last_reg = new;
1101 reg_eqv_table[lastr].next = new;
1102 reg_eqv_table[new].prev = lastr;
1106 /* Remove REG from its equivalence class. */
1108 static void
1109 delete_reg_equiv (unsigned int reg)
1111 struct qty_table_elem *ent;
1112 int q = REG_QTY (reg);
1113 int p, n;
1115 /* If invalid, do nothing. */
1116 if (q == (int) reg)
1117 return;
1119 ent = &qty_table[q];
1121 p = reg_eqv_table[reg].prev;
1122 n = reg_eqv_table[reg].next;
1124 if (n != -1)
1125 reg_eqv_table[n].prev = p;
1126 else
1127 ent->last_reg = p;
1128 if (p != -1)
1129 reg_eqv_table[p].next = n;
1130 else
1131 ent->first_reg = n;
1133 REG_QTY (reg) = reg;
1136 /* Remove any invalid expressions from the hash table
1137 that refer to any of the registers contained in expression X.
1139 Make sure that newly inserted references to those registers
1140 as subexpressions will be considered valid.
1142 mention_regs is not called when a register itself
1143 is being stored in the table.
1145 Return 1 if we have done something that may have changed the hash code
1146 of X. */
1148 static int
1149 mention_regs (rtx x)
1151 enum rtx_code code;
1152 int i, j;
1153 const char *fmt;
1154 int changed = 0;
1156 if (x == 0)
1157 return 0;
1159 code = GET_CODE (x);
1160 if (code == REG)
1162 unsigned int regno = REGNO (x);
1163 unsigned int endregno
1164 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1165 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1166 unsigned int i;
1168 for (i = regno; i < endregno; i++)
1170 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1171 remove_invalid_refs (i);
1173 REG_IN_TABLE (i) = REG_TICK (i);
1174 SUBREG_TICKED (i) = -1;
1177 return 0;
1180 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1181 pseudo if they don't use overlapping words. We handle only pseudos
1182 here for simplicity. */
1183 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1184 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1186 unsigned int i = REGNO (SUBREG_REG (x));
1188 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1190 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1191 the last store to this register really stored into this
1192 subreg, then remove the memory of this subreg.
1193 Otherwise, remove any memory of the entire register and
1194 all its subregs from the table. */
1195 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1196 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1197 remove_invalid_refs (i);
1198 else
1199 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1202 REG_IN_TABLE (i) = REG_TICK (i);
1203 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1204 return 0;
1207 /* If X is a comparison or a COMPARE and either operand is a register
1208 that does not have a quantity, give it one. This is so that a later
1209 call to record_jump_equiv won't cause X to be assigned a different
1210 hash code and not found in the table after that call.
1212 It is not necessary to do this here, since rehash_using_reg can
1213 fix up the table later, but doing this here eliminates the need to
1214 call that expensive function in the most common case where the only
1215 use of the register is in the comparison. */
1217 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1219 if (GET_CODE (XEXP (x, 0)) == REG
1220 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1221 if (insert_regs (XEXP (x, 0), NULL, 0))
1223 rehash_using_reg (XEXP (x, 0));
1224 changed = 1;
1227 if (GET_CODE (XEXP (x, 1)) == REG
1228 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1229 if (insert_regs (XEXP (x, 1), NULL, 0))
1231 rehash_using_reg (XEXP (x, 1));
1232 changed = 1;
1236 fmt = GET_RTX_FORMAT (code);
1237 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1238 if (fmt[i] == 'e')
1239 changed |= mention_regs (XEXP (x, i));
1240 else if (fmt[i] == 'E')
1241 for (j = 0; j < XVECLEN (x, i); j++)
1242 changed |= mention_regs (XVECEXP (x, i, j));
1244 return changed;
1247 /* Update the register quantities for inserting X into the hash table
1248 with a value equivalent to CLASSP.
1249 (If the class does not contain a REG, it is irrelevant.)
1250 If MODIFIED is nonzero, X is a destination; it is being modified.
1251 Note that delete_reg_equiv should be called on a register
1252 before insert_regs is done on that register with MODIFIED != 0.
1254 Nonzero value means that elements of reg_qty have changed
1255 so X's hash code may be different. */
1257 static int
1258 insert_regs (rtx x, struct table_elt *classp, int modified)
1260 if (GET_CODE (x) == REG)
1262 unsigned int regno = REGNO (x);
1263 int qty_valid;
1265 /* If REGNO is in the equivalence table already but is of the
1266 wrong mode for that equivalence, don't do anything here. */
1268 qty_valid = REGNO_QTY_VALID_P (regno);
1269 if (qty_valid)
1271 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1273 if (ent->mode != GET_MODE (x))
1274 return 0;
1277 if (modified || ! qty_valid)
1279 if (classp)
1280 for (classp = classp->first_same_value;
1281 classp != 0;
1282 classp = classp->next_same_value)
1283 if (GET_CODE (classp->exp) == REG
1284 && GET_MODE (classp->exp) == GET_MODE (x))
1286 make_regs_eqv (regno, REGNO (classp->exp));
1287 return 1;
1290 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1291 than REG_IN_TABLE to find out if there was only a single preceding
1292 invalidation - for the SUBREG - or another one, which would be
1293 for the full register. However, if we find here that REG_TICK
1294 indicates that the register is invalid, it means that it has
1295 been invalidated in a separate operation. The SUBREG might be used
1296 now (then this is a recursive call), or we might use the full REG
1297 now and a SUBREG of it later. So bump up REG_TICK so that
1298 mention_regs will do the right thing. */
1299 if (! modified
1300 && REG_IN_TABLE (regno) >= 0
1301 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1302 REG_TICK (regno)++;
1303 make_new_qty (regno, GET_MODE (x));
1304 return 1;
1307 return 0;
1310 /* If X is a SUBREG, we will likely be inserting the inner register in the
1311 table. If that register doesn't have an assigned quantity number at
1312 this point but does later, the insertion that we will be doing now will
1313 not be accessible because its hash code will have changed. So assign
1314 a quantity number now. */
1316 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1317 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1319 insert_regs (SUBREG_REG (x), NULL, 0);
1320 mention_regs (x);
1321 return 1;
1323 else
1324 return mention_regs (x);
1327 /* Look in or update the hash table. */
1329 /* Remove table element ELT from use in the table.
1330 HASH is its hash code, made using the HASH macro.
1331 It's an argument because often that is known in advance
1332 and we save much time not recomputing it. */
1334 static void
1335 remove_from_table (struct table_elt *elt, unsigned int hash)
1337 if (elt == 0)
1338 return;
1340 /* Mark this element as removed. See cse_insn. */
1341 elt->first_same_value = 0;
1343 /* Remove the table element from its equivalence class. */
1346 struct table_elt *prev = elt->prev_same_value;
1347 struct table_elt *next = elt->next_same_value;
1349 if (next)
1350 next->prev_same_value = prev;
1352 if (prev)
1353 prev->next_same_value = next;
1354 else
1356 struct table_elt *newfirst = next;
1357 while (next)
1359 next->first_same_value = newfirst;
1360 next = next->next_same_value;
1365 /* Remove the table element from its hash bucket. */
1368 struct table_elt *prev = elt->prev_same_hash;
1369 struct table_elt *next = elt->next_same_hash;
1371 if (next)
1372 next->prev_same_hash = prev;
1374 if (prev)
1375 prev->next_same_hash = next;
1376 else if (table[hash] == elt)
1377 table[hash] = next;
1378 else
1380 /* This entry is not in the proper hash bucket. This can happen
1381 when two classes were merged by `merge_equiv_classes'. Search
1382 for the hash bucket that it heads. This happens only very
1383 rarely, so the cost is acceptable. */
1384 for (hash = 0; hash < HASH_SIZE; hash++)
1385 if (table[hash] == elt)
1386 table[hash] = next;
1390 /* Remove the table element from its related-value circular chain. */
1392 if (elt->related_value != 0 && elt->related_value != elt)
1394 struct table_elt *p = elt->related_value;
1396 while (p->related_value != elt)
1397 p = p->related_value;
1398 p->related_value = elt->related_value;
1399 if (p->related_value == p)
1400 p->related_value = 0;
1403 /* Now add it to the free element chain. */
1404 elt->next_same_hash = free_element_chain;
1405 free_element_chain = elt;
1408 /* Look up X in the hash table and return its table element,
1409 or 0 if X is not in the table.
1411 MODE is the machine-mode of X, or if X is an integer constant
1412 with VOIDmode then MODE is the mode with which X will be used.
1414 Here we are satisfied to find an expression whose tree structure
1415 looks like X. */
1417 static struct table_elt *
1418 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1420 struct table_elt *p;
1422 for (p = table[hash]; p; p = p->next_same_hash)
1423 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1424 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1425 return p;
1427 return 0;
1430 /* Like `lookup' but don't care whether the table element uses invalid regs.
1431 Also ignore discrepancies in the machine mode of a register. */
1433 static struct table_elt *
1434 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1436 struct table_elt *p;
1438 if (GET_CODE (x) == REG)
1440 unsigned int regno = REGNO (x);
1442 /* Don't check the machine mode when comparing registers;
1443 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1444 for (p = table[hash]; p; p = p->next_same_hash)
1445 if (GET_CODE (p->exp) == REG
1446 && REGNO (p->exp) == regno)
1447 return p;
1449 else
1451 for (p = table[hash]; p; p = p->next_same_hash)
1452 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1453 return p;
1456 return 0;
1459 /* Look for an expression equivalent to X and with code CODE.
1460 If one is found, return that expression. */
1462 static rtx
1463 lookup_as_function (rtx x, enum rtx_code code)
1465 struct table_elt *p
1466 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1468 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1469 long as we are narrowing. So if we looked in vain for a mode narrower
1470 than word_mode before, look for word_mode now. */
1471 if (p == 0 && code == CONST_INT
1472 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1474 x = copy_rtx (x);
1475 PUT_MODE (x, word_mode);
1476 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1479 if (p == 0)
1480 return 0;
1482 for (p = p->first_same_value; p; p = p->next_same_value)
1483 if (GET_CODE (p->exp) == code
1484 /* Make sure this is a valid entry in the table. */
1485 && exp_equiv_p (p->exp, p->exp, 1, 0))
1486 return p->exp;
1488 return 0;
1491 /* Insert X in the hash table, assuming HASH is its hash code
1492 and CLASSP is an element of the class it should go in
1493 (or 0 if a new class should be made).
1494 It is inserted at the proper position to keep the class in
1495 the order cheapest first.
1497 MODE is the machine-mode of X, or if X is an integer constant
1498 with VOIDmode then MODE is the mode with which X will be used.
1500 For elements of equal cheapness, the most recent one
1501 goes in front, except that the first element in the list
1502 remains first unless a cheaper element is added. The order of
1503 pseudo-registers does not matter, as canon_reg will be called to
1504 find the cheapest when a register is retrieved from the table.
1506 The in_memory field in the hash table element is set to 0.
1507 The caller must set it nonzero if appropriate.
1509 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1510 and if insert_regs returns a nonzero value
1511 you must then recompute its hash code before calling here.
1513 If necessary, update table showing constant values of quantities. */
1515 #define CHEAPER(X, Y) \
1516 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1518 static struct table_elt *
1519 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1521 struct table_elt *elt;
1523 /* If X is a register and we haven't made a quantity for it,
1524 something is wrong. */
1525 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1526 abort ();
1528 /* If X is a hard register, show it is being put in the table. */
1529 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1531 unsigned int regno = REGNO (x);
1532 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1533 unsigned int i;
1535 for (i = regno; i < endregno; i++)
1536 SET_HARD_REG_BIT (hard_regs_in_table, i);
1539 /* Put an element for X into the right hash bucket. */
1541 elt = free_element_chain;
1542 if (elt)
1543 free_element_chain = elt->next_same_hash;
1544 else
1546 n_elements_made++;
1547 elt = xmalloc (sizeof (struct table_elt));
1550 elt->exp = x;
1551 elt->canon_exp = NULL_RTX;
1552 elt->cost = COST (x);
1553 elt->regcost = approx_reg_cost (x);
1554 elt->next_same_value = 0;
1555 elt->prev_same_value = 0;
1556 elt->next_same_hash = table[hash];
1557 elt->prev_same_hash = 0;
1558 elt->related_value = 0;
1559 elt->in_memory = 0;
1560 elt->mode = mode;
1561 elt->is_const = (CONSTANT_P (x)
1562 /* GNU C++ takes advantage of this for `this'
1563 (and other const values). */
1564 || (GET_CODE (x) == REG
1565 && RTX_UNCHANGING_P (x)
1566 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1567 || fixed_base_plus_p (x));
1569 if (table[hash])
1570 table[hash]->prev_same_hash = elt;
1571 table[hash] = elt;
1573 /* Put it into the proper value-class. */
1574 if (classp)
1576 classp = classp->first_same_value;
1577 if (CHEAPER (elt, classp))
1578 /* Insert at the head of the class. */
1580 struct table_elt *p;
1581 elt->next_same_value = classp;
1582 classp->prev_same_value = elt;
1583 elt->first_same_value = elt;
1585 for (p = classp; p; p = p->next_same_value)
1586 p->first_same_value = elt;
1588 else
1590 /* Insert not at head of the class. */
1591 /* Put it after the last element cheaper than X. */
1592 struct table_elt *p, *next;
1594 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1595 p = next);
1597 /* Put it after P and before NEXT. */
1598 elt->next_same_value = next;
1599 if (next)
1600 next->prev_same_value = elt;
1602 elt->prev_same_value = p;
1603 p->next_same_value = elt;
1604 elt->first_same_value = classp;
1607 else
1608 elt->first_same_value = elt;
1610 /* If this is a constant being set equivalent to a register or a register
1611 being set equivalent to a constant, note the constant equivalence.
1613 If this is a constant, it cannot be equivalent to a different constant,
1614 and a constant is the only thing that can be cheaper than a register. So
1615 we know the register is the head of the class (before the constant was
1616 inserted).
1618 If this is a register that is not already known equivalent to a
1619 constant, we must check the entire class.
1621 If this is a register that is already known equivalent to an insn,
1622 update the qtys `const_insn' to show that `this_insn' is the latest
1623 insn making that quantity equivalent to the constant. */
1625 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1626 && GET_CODE (x) != REG)
1628 int exp_q = REG_QTY (REGNO (classp->exp));
1629 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1631 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1632 exp_ent->const_insn = this_insn;
1635 else if (GET_CODE (x) == REG
1636 && classp
1637 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1638 && ! elt->is_const)
1640 struct table_elt *p;
1642 for (p = classp; p != 0; p = p->next_same_value)
1644 if (p->is_const && GET_CODE (p->exp) != REG)
1646 int x_q = REG_QTY (REGNO (x));
1647 struct qty_table_elem *x_ent = &qty_table[x_q];
1649 x_ent->const_rtx
1650 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1651 x_ent->const_insn = this_insn;
1652 break;
1657 else if (GET_CODE (x) == REG
1658 && qty_table[REG_QTY (REGNO (x))].const_rtx
1659 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1660 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1662 /* If this is a constant with symbolic value,
1663 and it has a term with an explicit integer value,
1664 link it up with related expressions. */
1665 if (GET_CODE (x) == CONST)
1667 rtx subexp = get_related_value (x);
1668 unsigned subhash;
1669 struct table_elt *subelt, *subelt_prev;
1671 if (subexp != 0)
1673 /* Get the integer-free subexpression in the hash table. */
1674 subhash = safe_hash (subexp, mode) & HASH_MASK;
1675 subelt = lookup (subexp, subhash, mode);
1676 if (subelt == 0)
1677 subelt = insert (subexp, NULL, subhash, mode);
1678 /* Initialize SUBELT's circular chain if it has none. */
1679 if (subelt->related_value == 0)
1680 subelt->related_value = subelt;
1681 /* Find the element in the circular chain that precedes SUBELT. */
1682 subelt_prev = subelt;
1683 while (subelt_prev->related_value != subelt)
1684 subelt_prev = subelt_prev->related_value;
1685 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1686 This way the element that follows SUBELT is the oldest one. */
1687 elt->related_value = subelt_prev->related_value;
1688 subelt_prev->related_value = elt;
1692 return elt;
1695 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1696 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1697 the two classes equivalent.
1699 CLASS1 will be the surviving class; CLASS2 should not be used after this
1700 call.
1702 Any invalid entries in CLASS2 will not be copied. */
1704 static void
1705 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1707 struct table_elt *elt, *next, *new;
1709 /* Ensure we start with the head of the classes. */
1710 class1 = class1->first_same_value;
1711 class2 = class2->first_same_value;
1713 /* If they were already equal, forget it. */
1714 if (class1 == class2)
1715 return;
1717 for (elt = class2; elt; elt = next)
1719 unsigned int hash;
1720 rtx exp = elt->exp;
1721 enum machine_mode mode = elt->mode;
1723 next = elt->next_same_value;
1725 /* Remove old entry, make a new one in CLASS1's class.
1726 Don't do this for invalid entries as we cannot find their
1727 hash code (it also isn't necessary). */
1728 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1730 hash_arg_in_memory = 0;
1731 hash = HASH (exp, mode);
1733 if (GET_CODE (exp) == REG)
1734 delete_reg_equiv (REGNO (exp));
1736 remove_from_table (elt, hash);
1738 if (insert_regs (exp, class1, 0))
1740 rehash_using_reg (exp);
1741 hash = HASH (exp, mode);
1743 new = insert (exp, class1, hash, mode);
1744 new->in_memory = hash_arg_in_memory;
1749 /* Flush the entire hash table. */
1751 static void
1752 flush_hash_table (void)
1754 int i;
1755 struct table_elt *p;
1757 for (i = 0; i < HASH_SIZE; i++)
1758 for (p = table[i]; p; p = table[i])
1760 /* Note that invalidate can remove elements
1761 after P in the current hash chain. */
1762 if (GET_CODE (p->exp) == REG)
1763 invalidate (p->exp, p->mode);
1764 else
1765 remove_from_table (p, i);
1769 /* Function called for each rtx to check whether true dependence exist. */
1770 struct check_dependence_data
1772 enum machine_mode mode;
1773 rtx exp;
1774 rtx addr;
1777 static int
1778 check_dependence (rtx *x, void *data)
1780 struct check_dependence_data *d = (struct check_dependence_data *) data;
1781 if (*x && GET_CODE (*x) == MEM)
1782 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1783 cse_rtx_varies_p);
1784 else
1785 return 0;
1788 /* Remove from the hash table, or mark as invalid, all expressions whose
1789 values could be altered by storing in X. X is a register, a subreg, or
1790 a memory reference with nonvarying address (because, when a memory
1791 reference with a varying address is stored in, all memory references are
1792 removed by invalidate_memory so specific invalidation is superfluous).
1793 FULL_MODE, if not VOIDmode, indicates that this much should be
1794 invalidated instead of just the amount indicated by the mode of X. This
1795 is only used for bitfield stores into memory.
1797 A nonvarying address may be just a register or just a symbol reference,
1798 or it may be either of those plus a numeric offset. */
1800 static void
1801 invalidate (rtx x, enum machine_mode full_mode)
1803 int i;
1804 struct table_elt *p;
1805 rtx addr;
1807 switch (GET_CODE (x))
1809 case REG:
1811 /* If X is a register, dependencies on its contents are recorded
1812 through the qty number mechanism. Just change the qty number of
1813 the register, mark it as invalid for expressions that refer to it,
1814 and remove it itself. */
1815 unsigned int regno = REGNO (x);
1816 unsigned int hash = HASH (x, GET_MODE (x));
1818 /* Remove REGNO from any quantity list it might be on and indicate
1819 that its value might have changed. If it is a pseudo, remove its
1820 entry from the hash table.
1822 For a hard register, we do the first two actions above for any
1823 additional hard registers corresponding to X. Then, if any of these
1824 registers are in the table, we must remove any REG entries that
1825 overlap these registers. */
1827 delete_reg_equiv (regno);
1828 REG_TICK (regno)++;
1829 SUBREG_TICKED (regno) = -1;
1831 if (regno >= FIRST_PSEUDO_REGISTER)
1833 /* Because a register can be referenced in more than one mode,
1834 we might have to remove more than one table entry. */
1835 struct table_elt *elt;
1837 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1838 remove_from_table (elt, hash);
1840 else
1842 HOST_WIDE_INT in_table
1843 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1844 unsigned int endregno
1845 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1846 unsigned int tregno, tendregno, rn;
1847 struct table_elt *p, *next;
1849 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1851 for (rn = regno + 1; rn < endregno; rn++)
1853 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1854 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1855 delete_reg_equiv (rn);
1856 REG_TICK (rn)++;
1857 SUBREG_TICKED (rn) = -1;
1860 if (in_table)
1861 for (hash = 0; hash < HASH_SIZE; hash++)
1862 for (p = table[hash]; p; p = next)
1864 next = p->next_same_hash;
1866 if (GET_CODE (p->exp) != REG
1867 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1868 continue;
1870 tregno = REGNO (p->exp);
1871 tendregno
1872 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1873 if (tendregno > regno && tregno < endregno)
1874 remove_from_table (p, hash);
1878 return;
1880 case SUBREG:
1881 invalidate (SUBREG_REG (x), VOIDmode);
1882 return;
1884 case PARALLEL:
1885 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1886 invalidate (XVECEXP (x, 0, i), VOIDmode);
1887 return;
1889 case EXPR_LIST:
1890 /* This is part of a disjoint return value; extract the location in
1891 question ignoring the offset. */
1892 invalidate (XEXP (x, 0), VOIDmode);
1893 return;
1895 case MEM:
1896 addr = canon_rtx (get_addr (XEXP (x, 0)));
1897 /* Calculate the canonical version of X here so that
1898 true_dependence doesn't generate new RTL for X on each call. */
1899 x = canon_rtx (x);
1901 /* Remove all hash table elements that refer to overlapping pieces of
1902 memory. */
1903 if (full_mode == VOIDmode)
1904 full_mode = GET_MODE (x);
1906 for (i = 0; i < HASH_SIZE; i++)
1908 struct table_elt *next;
1910 for (p = table[i]; p; p = next)
1912 next = p->next_same_hash;
1913 if (p->in_memory)
1915 struct check_dependence_data d;
1917 /* Just canonicalize the expression once;
1918 otherwise each time we call invalidate
1919 true_dependence will canonicalize the
1920 expression again. */
1921 if (!p->canon_exp)
1922 p->canon_exp = canon_rtx (p->exp);
1923 d.exp = x;
1924 d.addr = addr;
1925 d.mode = full_mode;
1926 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1927 remove_from_table (p, i);
1931 return;
1933 default:
1934 abort ();
1938 /* Remove all expressions that refer to register REGNO,
1939 since they are already invalid, and we are about to
1940 mark that register valid again and don't want the old
1941 expressions to reappear as valid. */
1943 static void
1944 remove_invalid_refs (unsigned int regno)
1946 unsigned int i;
1947 struct table_elt *p, *next;
1949 for (i = 0; i < HASH_SIZE; i++)
1950 for (p = table[i]; p; p = next)
1952 next = p->next_same_hash;
1953 if (GET_CODE (p->exp) != REG
1954 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1955 remove_from_table (p, i);
1959 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1960 and mode MODE. */
1961 static void
1962 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1963 enum machine_mode mode)
1965 unsigned int i;
1966 struct table_elt *p, *next;
1967 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1969 for (i = 0; i < HASH_SIZE; i++)
1970 for (p = table[i]; p; p = next)
1972 rtx exp = p->exp;
1973 next = p->next_same_hash;
1975 if (GET_CODE (exp) != REG
1976 && (GET_CODE (exp) != SUBREG
1977 || GET_CODE (SUBREG_REG (exp)) != REG
1978 || REGNO (SUBREG_REG (exp)) != regno
1979 || (((SUBREG_BYTE (exp)
1980 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1981 && SUBREG_BYTE (exp) <= end))
1982 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1983 remove_from_table (p, i);
1987 /* Recompute the hash codes of any valid entries in the hash table that
1988 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1990 This is called when we make a jump equivalence. */
1992 static void
1993 rehash_using_reg (rtx x)
1995 unsigned int i;
1996 struct table_elt *p, *next;
1997 unsigned hash;
1999 if (GET_CODE (x) == SUBREG)
2000 x = SUBREG_REG (x);
2002 /* If X is not a register or if the register is known not to be in any
2003 valid entries in the table, we have no work to do. */
2005 if (GET_CODE (x) != REG
2006 || REG_IN_TABLE (REGNO (x)) < 0
2007 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2008 return;
2010 /* Scan all hash chains looking for valid entries that mention X.
2011 If we find one and it is in the wrong hash chain, move it. We can skip
2012 objects that are registers, since they are handled specially. */
2014 for (i = 0; i < HASH_SIZE; i++)
2015 for (p = table[i]; p; p = next)
2017 next = p->next_same_hash;
2018 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2019 && exp_equiv_p (p->exp, p->exp, 1, 0)
2020 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2022 if (p->next_same_hash)
2023 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2025 if (p->prev_same_hash)
2026 p->prev_same_hash->next_same_hash = p->next_same_hash;
2027 else
2028 table[i] = p->next_same_hash;
2030 p->next_same_hash = table[hash];
2031 p->prev_same_hash = 0;
2032 if (table[hash])
2033 table[hash]->prev_same_hash = p;
2034 table[hash] = p;
2039 /* Remove from the hash table any expression that is a call-clobbered
2040 register. Also update their TICK values. */
2042 static void
2043 invalidate_for_call (void)
2045 unsigned int regno, endregno;
2046 unsigned int i;
2047 unsigned hash;
2048 struct table_elt *p, *next;
2049 int in_table = 0;
2051 /* Go through all the hard registers. For each that is clobbered in
2052 a CALL_INSN, remove the register from quantity chains and update
2053 reg_tick if defined. Also see if any of these registers is currently
2054 in the table. */
2056 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2057 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2059 delete_reg_equiv (regno);
2060 if (REG_TICK (regno) >= 0)
2062 REG_TICK (regno)++;
2063 SUBREG_TICKED (regno) = -1;
2066 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2069 /* In the case where we have no call-clobbered hard registers in the
2070 table, we are done. Otherwise, scan the table and remove any
2071 entry that overlaps a call-clobbered register. */
2073 if (in_table)
2074 for (hash = 0; hash < HASH_SIZE; hash++)
2075 for (p = table[hash]; p; p = next)
2077 next = p->next_same_hash;
2079 if (GET_CODE (p->exp) != REG
2080 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2081 continue;
2083 regno = REGNO (p->exp);
2084 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2086 for (i = regno; i < endregno; i++)
2087 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2089 remove_from_table (p, hash);
2090 break;
2095 /* Given an expression X of type CONST,
2096 and ELT which is its table entry (or 0 if it
2097 is not in the hash table),
2098 return an alternate expression for X as a register plus integer.
2099 If none can be found, return 0. */
2101 static rtx
2102 use_related_value (rtx x, struct table_elt *elt)
2104 struct table_elt *relt = 0;
2105 struct table_elt *p, *q;
2106 HOST_WIDE_INT offset;
2108 /* First, is there anything related known?
2109 If we have a table element, we can tell from that.
2110 Otherwise, must look it up. */
2112 if (elt != 0 && elt->related_value != 0)
2113 relt = elt;
2114 else if (elt == 0 && GET_CODE (x) == CONST)
2116 rtx subexp = get_related_value (x);
2117 if (subexp != 0)
2118 relt = lookup (subexp,
2119 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2120 GET_MODE (subexp));
2123 if (relt == 0)
2124 return 0;
2126 /* Search all related table entries for one that has an
2127 equivalent register. */
2129 p = relt;
2130 while (1)
2132 /* This loop is strange in that it is executed in two different cases.
2133 The first is when X is already in the table. Then it is searching
2134 the RELATED_VALUE list of X's class (RELT). The second case is when
2135 X is not in the table. Then RELT points to a class for the related
2136 value.
2138 Ensure that, whatever case we are in, that we ignore classes that have
2139 the same value as X. */
2141 if (rtx_equal_p (x, p->exp))
2142 q = 0;
2143 else
2144 for (q = p->first_same_value; q; q = q->next_same_value)
2145 if (GET_CODE (q->exp) == REG)
2146 break;
2148 if (q)
2149 break;
2151 p = p->related_value;
2153 /* We went all the way around, so there is nothing to be found.
2154 Alternatively, perhaps RELT was in the table for some other reason
2155 and it has no related values recorded. */
2156 if (p == relt || p == 0)
2157 break;
2160 if (q == 0)
2161 return 0;
2163 offset = (get_integer_term (x) - get_integer_term (p->exp));
2164 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2165 return plus_constant (q->exp, offset);
2168 /* Hash a string. Just add its bytes up. */
2169 static inline unsigned
2170 canon_hash_string (const char *ps)
2172 unsigned hash = 0;
2173 const unsigned char *p = (const unsigned char *) ps;
2175 if (p)
2176 while (*p)
2177 hash += *p++;
2179 return hash;
2182 /* Hash an rtx. We are careful to make sure the value is never negative.
2183 Equivalent registers hash identically.
2184 MODE is used in hashing for CONST_INTs only;
2185 otherwise the mode of X is used.
2187 Store 1 in do_not_record if any subexpression is volatile.
2189 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2190 which does not have the RTX_UNCHANGING_P bit set.
2192 Note that cse_insn knows that the hash code of a MEM expression
2193 is just (int) MEM plus the hash code of the address. */
2195 static unsigned
2196 canon_hash (rtx x, enum machine_mode mode)
2198 int i, j;
2199 unsigned hash = 0;
2200 enum rtx_code code;
2201 const char *fmt;
2203 /* repeat is used to turn tail-recursion into iteration. */
2204 repeat:
2205 if (x == 0)
2206 return hash;
2208 code = GET_CODE (x);
2209 switch (code)
2211 case REG:
2213 unsigned int regno = REGNO (x);
2214 bool record;
2216 /* On some machines, we can't record any non-fixed hard register,
2217 because extending its life will cause reload problems. We
2218 consider ap, fp, sp, gp to be fixed for this purpose.
2220 We also consider CCmode registers to be fixed for this purpose;
2221 failure to do so leads to failure to simplify 0<100 type of
2222 conditionals.
2224 On all machines, we can't record any global registers.
2225 Nor should we record any register that is in a small
2226 class, as defined by CLASS_LIKELY_SPILLED_P. */
2228 if (regno >= FIRST_PSEUDO_REGISTER)
2229 record = true;
2230 else if (x == frame_pointer_rtx
2231 || x == hard_frame_pointer_rtx
2232 || x == arg_pointer_rtx
2233 || x == stack_pointer_rtx
2234 || x == pic_offset_table_rtx)
2235 record = true;
2236 else if (global_regs[regno])
2237 record = false;
2238 else if (fixed_regs[regno])
2239 record = true;
2240 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2241 record = true;
2242 else if (SMALL_REGISTER_CLASSES)
2243 record = false;
2244 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2245 record = false;
2246 else
2247 record = true;
2249 if (!record)
2251 do_not_record = 1;
2252 return 0;
2255 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2256 return hash;
2259 /* We handle SUBREG of a REG specially because the underlying
2260 reg changes its hash value with every value change; we don't
2261 want to have to forget unrelated subregs when one subreg changes. */
2262 case SUBREG:
2264 if (GET_CODE (SUBREG_REG (x)) == REG)
2266 hash += (((unsigned) SUBREG << 7)
2267 + REGNO (SUBREG_REG (x))
2268 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2269 return hash;
2271 break;
2274 case CONST_INT:
2276 unsigned HOST_WIDE_INT tem = INTVAL (x);
2277 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2278 return hash;
2281 case CONST_DOUBLE:
2282 /* This is like the general case, except that it only counts
2283 the integers representing the constant. */
2284 hash += (unsigned) code + (unsigned) GET_MODE (x);
2285 if (GET_MODE (x) != VOIDmode)
2286 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2287 else
2288 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2289 + (unsigned) CONST_DOUBLE_HIGH (x));
2290 return hash;
2292 case CONST_VECTOR:
2294 int units;
2295 rtx elt;
2297 units = CONST_VECTOR_NUNITS (x);
2299 for (i = 0; i < units; ++i)
2301 elt = CONST_VECTOR_ELT (x, i);
2302 hash += canon_hash (elt, GET_MODE (elt));
2305 return hash;
2308 /* Assume there is only one rtx object for any given label. */
2309 case LABEL_REF:
2310 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2311 return hash;
2313 case SYMBOL_REF:
2314 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2315 return hash;
2317 case MEM:
2318 /* We don't record if marked volatile or if BLKmode since we don't
2319 know the size of the move. */
2320 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2322 do_not_record = 1;
2323 return 0;
2325 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2326 hash_arg_in_memory = 1;
2328 /* Now that we have already found this special case,
2329 might as well speed it up as much as possible. */
2330 hash += (unsigned) MEM;
2331 x = XEXP (x, 0);
2332 goto repeat;
2334 case USE:
2335 /* A USE that mentions non-volatile memory needs special
2336 handling since the MEM may be BLKmode which normally
2337 prevents an entry from being made. Pure calls are
2338 marked by a USE which mentions BLKmode memory. */
2339 if (GET_CODE (XEXP (x, 0)) == MEM
2340 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2342 hash += (unsigned) USE;
2343 x = XEXP (x, 0);
2345 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2346 hash_arg_in_memory = 1;
2348 /* Now that we have already found this special case,
2349 might as well speed it up as much as possible. */
2350 hash += (unsigned) MEM;
2351 x = XEXP (x, 0);
2352 goto repeat;
2354 break;
2356 case PRE_DEC:
2357 case PRE_INC:
2358 case POST_DEC:
2359 case POST_INC:
2360 case PRE_MODIFY:
2361 case POST_MODIFY:
2362 case PC:
2363 case CC0:
2364 case CALL:
2365 case UNSPEC_VOLATILE:
2366 do_not_record = 1;
2367 return 0;
2369 case ASM_OPERANDS:
2370 if (MEM_VOLATILE_P (x))
2372 do_not_record = 1;
2373 return 0;
2375 else
2377 /* We don't want to take the filename and line into account. */
2378 hash += (unsigned) code + (unsigned) GET_MODE (x)
2379 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2380 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2381 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2383 if (ASM_OPERANDS_INPUT_LENGTH (x))
2385 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2387 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2388 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2389 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2390 (x, i)));
2393 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2394 x = ASM_OPERANDS_INPUT (x, 0);
2395 mode = GET_MODE (x);
2396 goto repeat;
2399 return hash;
2401 break;
2403 default:
2404 break;
2407 i = GET_RTX_LENGTH (code) - 1;
2408 hash += (unsigned) code + (unsigned) GET_MODE (x);
2409 fmt = GET_RTX_FORMAT (code);
2410 for (; i >= 0; i--)
2412 if (fmt[i] == 'e')
2414 rtx tem = XEXP (x, i);
2416 /* If we are about to do the last recursive call
2417 needed at this level, change it into iteration.
2418 This function is called enough to be worth it. */
2419 if (i == 0)
2421 x = tem;
2422 goto repeat;
2424 hash += canon_hash (tem, 0);
2426 else if (fmt[i] == 'E')
2427 for (j = 0; j < XVECLEN (x, i); j++)
2428 hash += canon_hash (XVECEXP (x, i, j), 0);
2429 else if (fmt[i] == 's')
2430 hash += canon_hash_string (XSTR (x, i));
2431 else if (fmt[i] == 'i')
2433 unsigned tem = XINT (x, i);
2434 hash += tem;
2436 else if (fmt[i] == '0' || fmt[i] == 't')
2437 /* Unused. */
2439 else
2440 abort ();
2442 return hash;
2445 /* Like canon_hash but with no side effects. */
2447 static unsigned
2448 safe_hash (rtx x, enum machine_mode mode)
2450 int save_do_not_record = do_not_record;
2451 int save_hash_arg_in_memory = hash_arg_in_memory;
2452 unsigned hash = canon_hash (x, mode);
2453 hash_arg_in_memory = save_hash_arg_in_memory;
2454 do_not_record = save_do_not_record;
2455 return hash;
2458 /* Return 1 iff X and Y would canonicalize into the same thing,
2459 without actually constructing the canonicalization of either one.
2460 If VALIDATE is nonzero,
2461 we assume X is an expression being processed from the rtl
2462 and Y was found in the hash table. We check register refs
2463 in Y for being marked as valid.
2465 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2466 that is known to be in the register. Ordinarily, we don't allow them
2467 to match, because letting them match would cause unpredictable results
2468 in all the places that search a hash table chain for an equivalent
2469 for a given value. A possible equivalent that has different structure
2470 has its hash code computed from different data. Whether the hash code
2471 is the same as that of the given value is pure luck. */
2473 static int
2474 exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
2476 int i, j;
2477 enum rtx_code code;
2478 const char *fmt;
2480 /* Note: it is incorrect to assume an expression is equivalent to itself
2481 if VALIDATE is nonzero. */
2482 if (x == y && !validate)
2483 return 1;
2484 if (x == 0 || y == 0)
2485 return x == y;
2487 code = GET_CODE (x);
2488 if (code != GET_CODE (y))
2490 if (!equal_values)
2491 return 0;
2493 /* If X is a constant and Y is a register or vice versa, they may be
2494 equivalent. We only have to validate if Y is a register. */
2495 if (CONSTANT_P (x) && GET_CODE (y) == REG
2496 && REGNO_QTY_VALID_P (REGNO (y)))
2498 int y_q = REG_QTY (REGNO (y));
2499 struct qty_table_elem *y_ent = &qty_table[y_q];
2501 if (GET_MODE (y) == y_ent->mode
2502 && rtx_equal_p (x, y_ent->const_rtx)
2503 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2504 return 1;
2507 if (CONSTANT_P (y) && code == REG
2508 && REGNO_QTY_VALID_P (REGNO (x)))
2510 int x_q = REG_QTY (REGNO (x));
2511 struct qty_table_elem *x_ent = &qty_table[x_q];
2513 if (GET_MODE (x) == x_ent->mode
2514 && rtx_equal_p (y, x_ent->const_rtx))
2515 return 1;
2518 return 0;
2521 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2522 if (GET_MODE (x) != GET_MODE (y))
2523 return 0;
2525 switch (code)
2527 case PC:
2528 case CC0:
2529 case CONST_INT:
2530 return x == y;
2532 case LABEL_REF:
2533 return XEXP (x, 0) == XEXP (y, 0);
2535 case SYMBOL_REF:
2536 return XSTR (x, 0) == XSTR (y, 0);
2538 case REG:
2540 unsigned int regno = REGNO (y);
2541 unsigned int endregno
2542 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2543 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2544 unsigned int i;
2546 /* If the quantities are not the same, the expressions are not
2547 equivalent. If there are and we are not to validate, they
2548 are equivalent. Otherwise, ensure all regs are up-to-date. */
2550 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2551 return 0;
2553 if (! validate)
2554 return 1;
2556 for (i = regno; i < endregno; i++)
2557 if (REG_IN_TABLE (i) != REG_TICK (i))
2558 return 0;
2560 return 1;
2563 /* For commutative operations, check both orders. */
2564 case PLUS:
2565 case MULT:
2566 case AND:
2567 case IOR:
2568 case XOR:
2569 case NE:
2570 case EQ:
2571 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2572 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2573 validate, equal_values))
2574 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2575 validate, equal_values)
2576 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2577 validate, equal_values)));
2579 case ASM_OPERANDS:
2580 /* We don't use the generic code below because we want to
2581 disregard filename and line numbers. */
2583 /* A volatile asm isn't equivalent to any other. */
2584 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2585 return 0;
2587 if (GET_MODE (x) != GET_MODE (y)
2588 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2589 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2590 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2591 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2592 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2593 return 0;
2595 if (ASM_OPERANDS_INPUT_LENGTH (x))
2597 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2598 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2599 ASM_OPERANDS_INPUT (y, i),
2600 validate, equal_values)
2601 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2602 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2603 return 0;
2606 return 1;
2608 default:
2609 break;
2612 /* Compare the elements. If any pair of corresponding elements
2613 fail to match, return 0 for the whole things. */
2615 fmt = GET_RTX_FORMAT (code);
2616 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2618 switch (fmt[i])
2620 case 'e':
2621 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2622 return 0;
2623 break;
2625 case 'E':
2626 if (XVECLEN (x, i) != XVECLEN (y, i))
2627 return 0;
2628 for (j = 0; j < XVECLEN (x, i); j++)
2629 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2630 validate, equal_values))
2631 return 0;
2632 break;
2634 case 's':
2635 if (strcmp (XSTR (x, i), XSTR (y, i)))
2636 return 0;
2637 break;
2639 case 'i':
2640 if (XINT (x, i) != XINT (y, i))
2641 return 0;
2642 break;
2644 case 'w':
2645 if (XWINT (x, i) != XWINT (y, i))
2646 return 0;
2647 break;
2649 case '0':
2650 case 't':
2651 break;
2653 default:
2654 abort ();
2658 return 1;
2661 /* Return 1 if X has a value that can vary even between two
2662 executions of the program. 0 means X can be compared reliably
2663 against certain constants or near-constants. */
2665 static int
2666 cse_rtx_varies_p (rtx x, int from_alias)
2668 /* We need not check for X and the equivalence class being of the same
2669 mode because if X is equivalent to a constant in some mode, it
2670 doesn't vary in any mode. */
2672 if (GET_CODE (x) == REG
2673 && REGNO_QTY_VALID_P (REGNO (x)))
2675 int x_q = REG_QTY (REGNO (x));
2676 struct qty_table_elem *x_ent = &qty_table[x_q];
2678 if (GET_MODE (x) == x_ent->mode
2679 && x_ent->const_rtx != NULL_RTX)
2680 return 0;
2683 if (GET_CODE (x) == PLUS
2684 && GET_CODE (XEXP (x, 1)) == CONST_INT
2685 && GET_CODE (XEXP (x, 0)) == REG
2686 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2688 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2689 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2691 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2692 && x0_ent->const_rtx != NULL_RTX)
2693 return 0;
2696 /* This can happen as the result of virtual register instantiation, if
2697 the initial constant is too large to be a valid address. This gives
2698 us a three instruction sequence, load large offset into a register,
2699 load fp minus a constant into a register, then a MEM which is the
2700 sum of the two `constant' registers. */
2701 if (GET_CODE (x) == PLUS
2702 && GET_CODE (XEXP (x, 0)) == REG
2703 && GET_CODE (XEXP (x, 1)) == REG
2704 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2705 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2707 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2708 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2709 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2710 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2712 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2713 && x0_ent->const_rtx != NULL_RTX
2714 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2715 && x1_ent->const_rtx != NULL_RTX)
2716 return 0;
2719 return rtx_varies_p (x, from_alias);
2722 /* Canonicalize an expression:
2723 replace each register reference inside it
2724 with the "oldest" equivalent register.
2726 If INSN is nonzero and we are replacing a pseudo with a hard register
2727 or vice versa, validate_change is used to ensure that INSN remains valid
2728 after we make our substitution. The calls are made with IN_GROUP nonzero
2729 so apply_change_group must be called upon the outermost return from this
2730 function (unless INSN is zero). The result of apply_change_group can
2731 generally be discarded since the changes we are making are optional. */
2733 static rtx
2734 canon_reg (rtx x, rtx insn)
2736 int i;
2737 enum rtx_code code;
2738 const char *fmt;
2740 if (x == 0)
2741 return x;
2743 code = GET_CODE (x);
2744 switch (code)
2746 case PC:
2747 case CC0:
2748 case CONST:
2749 case CONST_INT:
2750 case CONST_DOUBLE:
2751 case CONST_VECTOR:
2752 case SYMBOL_REF:
2753 case LABEL_REF:
2754 case ADDR_VEC:
2755 case ADDR_DIFF_VEC:
2756 return x;
2758 case REG:
2760 int first;
2761 int q;
2762 struct qty_table_elem *ent;
2764 /* Never replace a hard reg, because hard regs can appear
2765 in more than one machine mode, and we must preserve the mode
2766 of each occurrence. Also, some hard regs appear in
2767 MEMs that are shared and mustn't be altered. Don't try to
2768 replace any reg that maps to a reg of class NO_REGS. */
2769 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2770 || ! REGNO_QTY_VALID_P (REGNO (x)))
2771 return x;
2773 q = REG_QTY (REGNO (x));
2774 ent = &qty_table[q];
2775 first = ent->first_reg;
2776 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2777 : REGNO_REG_CLASS (first) == NO_REGS ? x
2778 : gen_rtx_REG (ent->mode, first));
2781 default:
2782 break;
2785 fmt = GET_RTX_FORMAT (code);
2786 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2788 int j;
2790 if (fmt[i] == 'e')
2792 rtx new = canon_reg (XEXP (x, i), insn);
2793 int insn_code;
2795 /* If replacing pseudo with hard reg or vice versa, ensure the
2796 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2797 if (insn != 0 && new != 0
2798 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2799 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2800 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2801 || (insn_code = recog_memoized (insn)) < 0
2802 || insn_data[insn_code].n_dups > 0))
2803 validate_change (insn, &XEXP (x, i), new, 1);
2804 else
2805 XEXP (x, i) = new;
2807 else if (fmt[i] == 'E')
2808 for (j = 0; j < XVECLEN (x, i); j++)
2809 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2812 return x;
2815 /* LOC is a location within INSN that is an operand address (the contents of
2816 a MEM). Find the best equivalent address to use that is valid for this
2817 insn.
2819 On most CISC machines, complicated address modes are costly, and rtx_cost
2820 is a good approximation for that cost. However, most RISC machines have
2821 only a few (usually only one) memory reference formats. If an address is
2822 valid at all, it is often just as cheap as any other address. Hence, for
2823 RISC machines, we use `address_cost' to compare the costs of various
2824 addresses. For two addresses of equal cost, choose the one with the
2825 highest `rtx_cost' value as that has the potential of eliminating the
2826 most insns. For equal costs, we choose the first in the equivalence
2827 class. Note that we ignore the fact that pseudo registers are cheaper than
2828 hard registers here because we would also prefer the pseudo registers. */
2830 static void
2831 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2833 struct table_elt *elt;
2834 rtx addr = *loc;
2835 struct table_elt *p;
2836 int found_better = 1;
2837 int save_do_not_record = do_not_record;
2838 int save_hash_arg_in_memory = hash_arg_in_memory;
2839 int addr_volatile;
2840 int regno;
2841 unsigned hash;
2843 /* Do not try to replace constant addresses or addresses of local and
2844 argument slots. These MEM expressions are made only once and inserted
2845 in many instructions, as well as being used to control symbol table
2846 output. It is not safe to clobber them.
2848 There are some uncommon cases where the address is already in a register
2849 for some reason, but we cannot take advantage of that because we have
2850 no easy way to unshare the MEM. In addition, looking up all stack
2851 addresses is costly. */
2852 if ((GET_CODE (addr) == PLUS
2853 && GET_CODE (XEXP (addr, 0)) == REG
2854 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2855 && (regno = REGNO (XEXP (addr, 0)),
2856 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2857 || regno == ARG_POINTER_REGNUM))
2858 || (GET_CODE (addr) == REG
2859 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2860 || regno == HARD_FRAME_POINTER_REGNUM
2861 || regno == ARG_POINTER_REGNUM))
2862 || GET_CODE (addr) == ADDRESSOF
2863 || CONSTANT_ADDRESS_P (addr))
2864 return;
2866 /* If this address is not simply a register, try to fold it. This will
2867 sometimes simplify the expression. Many simplifications
2868 will not be valid, but some, usually applying the associative rule, will
2869 be valid and produce better code. */
2870 if (GET_CODE (addr) != REG)
2872 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2873 int addr_folded_cost = address_cost (folded, mode);
2874 int addr_cost = address_cost (addr, mode);
2876 if ((addr_folded_cost < addr_cost
2877 || (addr_folded_cost == addr_cost
2878 /* ??? The rtx_cost comparison is left over from an older
2879 version of this code. It is probably no longer helpful. */
2880 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2881 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2882 && validate_change (insn, loc, folded, 0))
2883 addr = folded;
2886 /* If this address is not in the hash table, we can't look for equivalences
2887 of the whole address. Also, ignore if volatile. */
2889 do_not_record = 0;
2890 hash = HASH (addr, Pmode);
2891 addr_volatile = do_not_record;
2892 do_not_record = save_do_not_record;
2893 hash_arg_in_memory = save_hash_arg_in_memory;
2895 if (addr_volatile)
2896 return;
2898 elt = lookup (addr, hash, Pmode);
2900 if (elt)
2902 /* We need to find the best (under the criteria documented above) entry
2903 in the class that is valid. We use the `flag' field to indicate
2904 choices that were invalid and iterate until we can't find a better
2905 one that hasn't already been tried. */
2907 for (p = elt->first_same_value; p; p = p->next_same_value)
2908 p->flag = 0;
2910 while (found_better)
2912 int best_addr_cost = address_cost (*loc, mode);
2913 int best_rtx_cost = (elt->cost + 1) >> 1;
2914 int exp_cost;
2915 struct table_elt *best_elt = elt;
2917 found_better = 0;
2918 for (p = elt->first_same_value; p; p = p->next_same_value)
2919 if (! p->flag)
2921 if ((GET_CODE (p->exp) == REG
2922 || exp_equiv_p (p->exp, p->exp, 1, 0))
2923 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2924 || (exp_cost == best_addr_cost
2925 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2927 found_better = 1;
2928 best_addr_cost = exp_cost;
2929 best_rtx_cost = (p->cost + 1) >> 1;
2930 best_elt = p;
2934 if (found_better)
2936 if (validate_change (insn, loc,
2937 canon_reg (copy_rtx (best_elt->exp),
2938 NULL_RTX), 0))
2939 return;
2940 else
2941 best_elt->flag = 1;
2946 /* If the address is a binary operation with the first operand a register
2947 and the second a constant, do the same as above, but looking for
2948 equivalences of the register. Then try to simplify before checking for
2949 the best address to use. This catches a few cases: First is when we
2950 have REG+const and the register is another REG+const. We can often merge
2951 the constants and eliminate one insn and one register. It may also be
2952 that a machine has a cheap REG+REG+const. Finally, this improves the
2953 code on the Alpha for unaligned byte stores. */
2955 if (flag_expensive_optimizations
2956 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2957 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2958 && GET_CODE (XEXP (*loc, 0)) == REG)
2960 rtx op1 = XEXP (*loc, 1);
2962 do_not_record = 0;
2963 hash = HASH (XEXP (*loc, 0), Pmode);
2964 do_not_record = save_do_not_record;
2965 hash_arg_in_memory = save_hash_arg_in_memory;
2967 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2968 if (elt == 0)
2969 return;
2971 /* We need to find the best (under the criteria documented above) entry
2972 in the class that is valid. We use the `flag' field to indicate
2973 choices that were invalid and iterate until we can't find a better
2974 one that hasn't already been tried. */
2976 for (p = elt->first_same_value; p; p = p->next_same_value)
2977 p->flag = 0;
2979 while (found_better)
2981 int best_addr_cost = address_cost (*loc, mode);
2982 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2983 struct table_elt *best_elt = elt;
2984 rtx best_rtx = *loc;
2985 int count;
2987 /* This is at worst case an O(n^2) algorithm, so limit our search
2988 to the first 32 elements on the list. This avoids trouble
2989 compiling code with very long basic blocks that can easily
2990 call simplify_gen_binary so many times that we run out of
2991 memory. */
2993 found_better = 0;
2994 for (p = elt->first_same_value, count = 0;
2995 p && count < 32;
2996 p = p->next_same_value, count++)
2997 if (! p->flag
2998 && (GET_CODE (p->exp) == REG
2999 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3001 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3002 p->exp, op1);
3003 int new_cost;
3004 new_cost = address_cost (new, mode);
3006 if (new_cost < best_addr_cost
3007 || (new_cost == best_addr_cost
3008 && (COST (new) + 1) >> 1 > best_rtx_cost))
3010 found_better = 1;
3011 best_addr_cost = new_cost;
3012 best_rtx_cost = (COST (new) + 1) >> 1;
3013 best_elt = p;
3014 best_rtx = new;
3018 if (found_better)
3020 if (validate_change (insn, loc,
3021 canon_reg (copy_rtx (best_rtx),
3022 NULL_RTX), 0))
3023 return;
3024 else
3025 best_elt->flag = 1;
3031 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3032 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3033 what values are being compared.
3035 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3036 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3037 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3038 compared to produce cc0.
3040 The return value is the comparison operator and is either the code of
3041 A or the code corresponding to the inverse of the comparison. */
3043 static enum rtx_code
3044 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
3045 enum machine_mode *pmode1, enum machine_mode *pmode2)
3047 rtx arg1, arg2;
3049 arg1 = *parg1, arg2 = *parg2;
3051 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3053 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3055 /* Set nonzero when we find something of interest. */
3056 rtx x = 0;
3057 int reverse_code = 0;
3058 struct table_elt *p = 0;
3060 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3061 On machines with CC0, this is the only case that can occur, since
3062 fold_rtx will return the COMPARE or item being compared with zero
3063 when given CC0. */
3065 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3066 x = arg1;
3068 /* If ARG1 is a comparison operator and CODE is testing for
3069 STORE_FLAG_VALUE, get the inner arguments. */
3071 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3073 #ifdef FLOAT_STORE_FLAG_VALUE
3074 REAL_VALUE_TYPE fsfv;
3075 #endif
3077 if (code == NE
3078 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3079 && code == LT && STORE_FLAG_VALUE == -1)
3080 #ifdef FLOAT_STORE_FLAG_VALUE
3081 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3082 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3083 REAL_VALUE_NEGATIVE (fsfv)))
3084 #endif
3086 x = arg1;
3087 else if (code == EQ
3088 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3089 && code == GE && STORE_FLAG_VALUE == -1)
3090 #ifdef FLOAT_STORE_FLAG_VALUE
3091 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3092 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3093 REAL_VALUE_NEGATIVE (fsfv)))
3094 #endif
3096 x = arg1, reverse_code = 1;
3099 /* ??? We could also check for
3101 (ne (and (eq (...) (const_int 1))) (const_int 0))
3103 and related forms, but let's wait until we see them occurring. */
3105 if (x == 0)
3106 /* Look up ARG1 in the hash table and see if it has an equivalence
3107 that lets us see what is being compared. */
3108 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3109 GET_MODE (arg1));
3110 if (p)
3112 p = p->first_same_value;
3114 /* If what we compare is already known to be constant, that is as
3115 good as it gets.
3116 We need to break the loop in this case, because otherwise we
3117 can have an infinite loop when looking at a reg that is known
3118 to be a constant which is the same as a comparison of a reg
3119 against zero which appears later in the insn stream, which in
3120 turn is constant and the same as the comparison of the first reg
3121 against zero... */
3122 if (p->is_const)
3123 break;
3126 for (; p; p = p->next_same_value)
3128 enum machine_mode inner_mode = GET_MODE (p->exp);
3129 #ifdef FLOAT_STORE_FLAG_VALUE
3130 REAL_VALUE_TYPE fsfv;
3131 #endif
3133 /* If the entry isn't valid, skip it. */
3134 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3135 continue;
3137 if (GET_CODE (p->exp) == COMPARE
3138 /* Another possibility is that this machine has a compare insn
3139 that includes the comparison code. In that case, ARG1 would
3140 be equivalent to a comparison operation that would set ARG1 to
3141 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3142 ORIG_CODE is the actual comparison being done; if it is an EQ,
3143 we must reverse ORIG_CODE. On machine with a negative value
3144 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3145 || ((code == NE
3146 || (code == LT
3147 && GET_MODE_CLASS (inner_mode) == MODE_INT
3148 && (GET_MODE_BITSIZE (inner_mode)
3149 <= HOST_BITS_PER_WIDE_INT)
3150 && (STORE_FLAG_VALUE
3151 & ((HOST_WIDE_INT) 1
3152 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3153 #ifdef FLOAT_STORE_FLAG_VALUE
3154 || (code == LT
3155 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3156 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3157 REAL_VALUE_NEGATIVE (fsfv)))
3158 #endif
3160 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3162 x = p->exp;
3163 break;
3165 else if ((code == EQ
3166 || (code == GE
3167 && GET_MODE_CLASS (inner_mode) == MODE_INT
3168 && (GET_MODE_BITSIZE (inner_mode)
3169 <= HOST_BITS_PER_WIDE_INT)
3170 && (STORE_FLAG_VALUE
3171 & ((HOST_WIDE_INT) 1
3172 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3173 #ifdef FLOAT_STORE_FLAG_VALUE
3174 || (code == GE
3175 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3176 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3177 REAL_VALUE_NEGATIVE (fsfv)))
3178 #endif
3180 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3182 reverse_code = 1;
3183 x = p->exp;
3184 break;
3187 /* If this non-trapping address, e.g. fp + constant, the
3188 equivalent is a better operand since it may let us predict
3189 the value of the comparison. */
3190 else if (!rtx_addr_can_trap_p (p->exp))
3192 arg1 = p->exp;
3193 continue;
3197 /* If we didn't find a useful equivalence for ARG1, we are done.
3198 Otherwise, set up for the next iteration. */
3199 if (x == 0)
3200 break;
3202 /* If we need to reverse the comparison, make sure that that is
3203 possible -- we can't necessarily infer the value of GE from LT
3204 with floating-point operands. */
3205 if (reverse_code)
3207 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3208 if (reversed == UNKNOWN)
3209 break;
3210 else
3211 code = reversed;
3213 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3214 code = GET_CODE (x);
3215 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3218 /* Return our results. Return the modes from before fold_rtx
3219 because fold_rtx might produce const_int, and then it's too late. */
3220 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3221 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3223 return code;
3226 /* If X is a nontrivial arithmetic operation on an argument
3227 for which a constant value can be determined, return
3228 the result of operating on that value, as a constant.
3229 Otherwise, return X, possibly with one or more operands
3230 modified by recursive calls to this function.
3232 If X is a register whose contents are known, we do NOT
3233 return those contents here. equiv_constant is called to
3234 perform that task.
3236 INSN is the insn that we may be modifying. If it is 0, make a copy
3237 of X before modifying it. */
3239 static rtx
3240 fold_rtx (rtx x, rtx insn)
3242 enum rtx_code code;
3243 enum machine_mode mode;
3244 const char *fmt;
3245 int i;
3246 rtx new = 0;
3247 int copied = 0;
3248 int must_swap = 0;
3250 /* Folded equivalents of first two operands of X. */
3251 rtx folded_arg0;
3252 rtx folded_arg1;
3254 /* Constant equivalents of first three operands of X;
3255 0 when no such equivalent is known. */
3256 rtx const_arg0;
3257 rtx const_arg1;
3258 rtx const_arg2;
3260 /* The mode of the first operand of X. We need this for sign and zero
3261 extends. */
3262 enum machine_mode mode_arg0;
3264 if (x == 0)
3265 return x;
3267 mode = GET_MODE (x);
3268 code = GET_CODE (x);
3269 switch (code)
3271 case CONST:
3272 case CONST_INT:
3273 case CONST_DOUBLE:
3274 case CONST_VECTOR:
3275 case SYMBOL_REF:
3276 case LABEL_REF:
3277 case REG:
3278 /* No use simplifying an EXPR_LIST
3279 since they are used only for lists of args
3280 in a function call's REG_EQUAL note. */
3281 case EXPR_LIST:
3282 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3283 want to (e.g.,) make (addressof (const_int 0)) just because
3284 the location is known to be zero. */
3285 case ADDRESSOF:
3286 return x;
3288 #ifdef HAVE_cc0
3289 case CC0:
3290 return prev_insn_cc0;
3291 #endif
3293 case PC:
3294 /* If the next insn is a CODE_LABEL followed by a jump table,
3295 PC's value is a LABEL_REF pointing to that label. That
3296 lets us fold switch statements on the VAX. */
3298 rtx next;
3299 if (insn && tablejump_p (insn, &next, NULL))
3300 return gen_rtx_LABEL_REF (Pmode, next);
3302 break;
3304 case SUBREG:
3305 /* See if we previously assigned a constant value to this SUBREG. */
3306 if ((new = lookup_as_function (x, CONST_INT)) != 0
3307 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3308 return new;
3310 /* If this is a paradoxical SUBREG, we have no idea what value the
3311 extra bits would have. However, if the operand is equivalent
3312 to a SUBREG whose operand is the same as our mode, and all the
3313 modes are within a word, we can just use the inner operand
3314 because these SUBREGs just say how to treat the register.
3316 Similarly if we find an integer constant. */
3318 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3320 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3321 struct table_elt *elt;
3323 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3324 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3325 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3326 imode)) != 0)
3327 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3329 if (CONSTANT_P (elt->exp)
3330 && GET_MODE (elt->exp) == VOIDmode)
3331 return elt->exp;
3333 if (GET_CODE (elt->exp) == SUBREG
3334 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3335 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3336 return copy_rtx (SUBREG_REG (elt->exp));
3339 return x;
3342 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3343 We might be able to if the SUBREG is extracting a single word in an
3344 integral mode or extracting the low part. */
3346 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3347 const_arg0 = equiv_constant (folded_arg0);
3348 if (const_arg0)
3349 folded_arg0 = const_arg0;
3351 if (folded_arg0 != SUBREG_REG (x))
3353 new = simplify_subreg (mode, folded_arg0,
3354 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3355 if (new)
3356 return new;
3359 /* If this is a narrowing SUBREG and our operand is a REG, see if
3360 we can find an equivalence for REG that is an arithmetic operation
3361 in a wider mode where both operands are paradoxical SUBREGs
3362 from objects of our result mode. In that case, we couldn't report
3363 an equivalent value for that operation, since we don't know what the
3364 extra bits will be. But we can find an equivalence for this SUBREG
3365 by folding that operation is the narrow mode. This allows us to
3366 fold arithmetic in narrow modes when the machine only supports
3367 word-sized arithmetic.
3369 Also look for a case where we have a SUBREG whose operand is the
3370 same as our result. If both modes are smaller than a word, we
3371 are simply interpreting a register in different modes and we
3372 can use the inner value. */
3374 if (GET_CODE (folded_arg0) == REG
3375 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3376 && subreg_lowpart_p (x))
3378 struct table_elt *elt;
3380 /* We can use HASH here since we know that canon_hash won't be
3381 called. */
3382 elt = lookup (folded_arg0,
3383 HASH (folded_arg0, GET_MODE (folded_arg0)),
3384 GET_MODE (folded_arg0));
3386 if (elt)
3387 elt = elt->first_same_value;
3389 for (; elt; elt = elt->next_same_value)
3391 enum rtx_code eltcode = GET_CODE (elt->exp);
3393 /* Just check for unary and binary operations. */
3394 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3395 && GET_CODE (elt->exp) != SIGN_EXTEND
3396 && GET_CODE (elt->exp) != ZERO_EXTEND
3397 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3398 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3399 && (GET_MODE_CLASS (mode)
3400 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3402 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3404 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3405 op0 = fold_rtx (op0, NULL_RTX);
3407 op0 = equiv_constant (op0);
3408 if (op0)
3409 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3410 op0, mode);
3412 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3413 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3414 && eltcode != DIV && eltcode != MOD
3415 && eltcode != UDIV && eltcode != UMOD
3416 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3417 && eltcode != ROTATE && eltcode != ROTATERT
3418 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3419 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3420 == mode))
3421 || CONSTANT_P (XEXP (elt->exp, 0)))
3422 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3423 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3424 == mode))
3425 || CONSTANT_P (XEXP (elt->exp, 1))))
3427 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3428 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3430 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3431 op0 = fold_rtx (op0, NULL_RTX);
3433 if (op0)
3434 op0 = equiv_constant (op0);
3436 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3437 op1 = fold_rtx (op1, NULL_RTX);
3439 if (op1)
3440 op1 = equiv_constant (op1);
3442 /* If we are looking for the low SImode part of
3443 (ashift:DI c (const_int 32)), it doesn't work
3444 to compute that in SImode, because a 32-bit shift
3445 in SImode is unpredictable. We know the value is 0. */
3446 if (op0 && op1
3447 && GET_CODE (elt->exp) == ASHIFT
3448 && GET_CODE (op1) == CONST_INT
3449 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3451 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3453 /* If the count fits in the inner mode's width,
3454 but exceeds the outer mode's width,
3455 the value will get truncated to 0
3456 by the subreg. */
3457 new = const0_rtx;
3458 else
3459 /* If the count exceeds even the inner mode's width,
3460 don't fold this expression. */
3461 new = 0;
3463 else if (op0 && op1)
3464 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3465 op0, op1);
3468 else if (GET_CODE (elt->exp) == SUBREG
3469 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3470 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3471 <= UNITS_PER_WORD)
3472 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3473 new = copy_rtx (SUBREG_REG (elt->exp));
3475 if (new)
3476 return new;
3480 return x;
3482 case NOT:
3483 case NEG:
3484 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3485 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3486 new = lookup_as_function (XEXP (x, 0), code);
3487 if (new)
3488 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3489 break;
3491 case MEM:
3492 /* If we are not actually processing an insn, don't try to find the
3493 best address. Not only don't we care, but we could modify the
3494 MEM in an invalid way since we have no insn to validate against. */
3495 if (insn != 0)
3496 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3499 /* Even if we don't fold in the insn itself,
3500 we can safely do so here, in hopes of getting a constant. */
3501 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3502 rtx base = 0;
3503 HOST_WIDE_INT offset = 0;
3505 if (GET_CODE (addr) == REG
3506 && REGNO_QTY_VALID_P (REGNO (addr)))
3508 int addr_q = REG_QTY (REGNO (addr));
3509 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3511 if (GET_MODE (addr) == addr_ent->mode
3512 && addr_ent->const_rtx != NULL_RTX)
3513 addr = addr_ent->const_rtx;
3516 /* If address is constant, split it into a base and integer offset. */
3517 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3518 base = addr;
3519 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3520 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3522 base = XEXP (XEXP (addr, 0), 0);
3523 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3525 else if (GET_CODE (addr) == LO_SUM
3526 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3527 base = XEXP (addr, 1);
3528 else if (GET_CODE (addr) == ADDRESSOF)
3529 return change_address (x, VOIDmode, addr);
3531 /* If this is a constant pool reference, we can fold it into its
3532 constant to allow better value tracking. */
3533 if (base && GET_CODE (base) == SYMBOL_REF
3534 && CONSTANT_POOL_ADDRESS_P (base))
3536 rtx constant = get_pool_constant (base);
3537 enum machine_mode const_mode = get_pool_mode (base);
3538 rtx new;
3540 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3542 constant_pool_entries_cost = COST (constant);
3543 constant_pool_entries_regcost = approx_reg_cost (constant);
3546 /* If we are loading the full constant, we have an equivalence. */
3547 if (offset == 0 && mode == const_mode)
3548 return constant;
3550 /* If this actually isn't a constant (weird!), we can't do
3551 anything. Otherwise, handle the two most common cases:
3552 extracting a word from a multi-word constant, and extracting
3553 the low-order bits. Other cases don't seem common enough to
3554 worry about. */
3555 if (! CONSTANT_P (constant))
3556 return x;
3558 if (GET_MODE_CLASS (mode) == MODE_INT
3559 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3560 && offset % UNITS_PER_WORD == 0
3561 && (new = operand_subword (constant,
3562 offset / UNITS_PER_WORD,
3563 0, const_mode)) != 0)
3564 return new;
3566 if (((BYTES_BIG_ENDIAN
3567 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3568 || (! BYTES_BIG_ENDIAN && offset == 0))
3569 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3570 return new;
3573 /* If this is a reference to a label at a known position in a jump
3574 table, we also know its value. */
3575 if (base && GET_CODE (base) == LABEL_REF)
3577 rtx label = XEXP (base, 0);
3578 rtx table_insn = NEXT_INSN (label);
3580 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3581 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3583 rtx table = PATTERN (table_insn);
3585 if (offset >= 0
3586 && (offset / GET_MODE_SIZE (GET_MODE (table))
3587 < XVECLEN (table, 0)))
3588 return XVECEXP (table, 0,
3589 offset / GET_MODE_SIZE (GET_MODE (table)));
3591 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3592 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3594 rtx table = PATTERN (table_insn);
3596 if (offset >= 0
3597 && (offset / GET_MODE_SIZE (GET_MODE (table))
3598 < XVECLEN (table, 1)))
3600 offset /= GET_MODE_SIZE (GET_MODE (table));
3601 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3602 XEXP (table, 0));
3604 if (GET_MODE (table) != Pmode)
3605 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3607 /* Indicate this is a constant. This isn't a
3608 valid form of CONST, but it will only be used
3609 to fold the next insns and then discarded, so
3610 it should be safe.
3612 Note this expression must be explicitly discarded,
3613 by cse_insn, else it may end up in a REG_EQUAL note
3614 and "escape" to cause problems elsewhere. */
3615 return gen_rtx_CONST (GET_MODE (new), new);
3620 return x;
3623 #ifdef NO_FUNCTION_CSE
3624 case CALL:
3625 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3626 return x;
3627 break;
3628 #endif
3630 case ASM_OPERANDS:
3631 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3632 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3633 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3634 break;
3636 default:
3637 break;
3640 const_arg0 = 0;
3641 const_arg1 = 0;
3642 const_arg2 = 0;
3643 mode_arg0 = VOIDmode;
3645 /* Try folding our operands.
3646 Then see which ones have constant values known. */
3648 fmt = GET_RTX_FORMAT (code);
3649 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3650 if (fmt[i] == 'e')
3652 rtx arg = XEXP (x, i);
3653 rtx folded_arg = arg, const_arg = 0;
3654 enum machine_mode mode_arg = GET_MODE (arg);
3655 rtx cheap_arg, expensive_arg;
3656 rtx replacements[2];
3657 int j;
3658 int old_cost = COST_IN (XEXP (x, i), code);
3660 /* Most arguments are cheap, so handle them specially. */
3661 switch (GET_CODE (arg))
3663 case REG:
3664 /* This is the same as calling equiv_constant; it is duplicated
3665 here for speed. */
3666 if (REGNO_QTY_VALID_P (REGNO (arg)))
3668 int arg_q = REG_QTY (REGNO (arg));
3669 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3671 if (arg_ent->const_rtx != NULL_RTX
3672 && GET_CODE (arg_ent->const_rtx) != REG
3673 && GET_CODE (arg_ent->const_rtx) != PLUS)
3674 const_arg
3675 = gen_lowpart_if_possible (GET_MODE (arg),
3676 arg_ent->const_rtx);
3678 break;
3680 case CONST:
3681 case CONST_INT:
3682 case SYMBOL_REF:
3683 case LABEL_REF:
3684 case CONST_DOUBLE:
3685 case CONST_VECTOR:
3686 const_arg = arg;
3687 break;
3689 #ifdef HAVE_cc0
3690 case CC0:
3691 folded_arg = prev_insn_cc0;
3692 mode_arg = prev_insn_cc0_mode;
3693 const_arg = equiv_constant (folded_arg);
3694 break;
3695 #endif
3697 default:
3698 folded_arg = fold_rtx (arg, insn);
3699 const_arg = equiv_constant (folded_arg);
3702 /* For the first three operands, see if the operand
3703 is constant or equivalent to a constant. */
3704 switch (i)
3706 case 0:
3707 folded_arg0 = folded_arg;
3708 const_arg0 = const_arg;
3709 mode_arg0 = mode_arg;
3710 break;
3711 case 1:
3712 folded_arg1 = folded_arg;
3713 const_arg1 = const_arg;
3714 break;
3715 case 2:
3716 const_arg2 = const_arg;
3717 break;
3720 /* Pick the least expensive of the folded argument and an
3721 equivalent constant argument. */
3722 if (const_arg == 0 || const_arg == folded_arg
3723 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3724 cheap_arg = folded_arg, expensive_arg = const_arg;
3725 else
3726 cheap_arg = const_arg, expensive_arg = folded_arg;
3728 /* Try to replace the operand with the cheapest of the two
3729 possibilities. If it doesn't work and this is either of the first
3730 two operands of a commutative operation, try swapping them.
3731 If THAT fails, try the more expensive, provided it is cheaper
3732 than what is already there. */
3734 if (cheap_arg == XEXP (x, i))
3735 continue;
3737 if (insn == 0 && ! copied)
3739 x = copy_rtx (x);
3740 copied = 1;
3743 /* Order the replacements from cheapest to most expensive. */
3744 replacements[0] = cheap_arg;
3745 replacements[1] = expensive_arg;
3747 for (j = 0; j < 2 && replacements[j]; j++)
3749 int new_cost = COST_IN (replacements[j], code);
3751 /* Stop if what existed before was cheaper. Prefer constants
3752 in the case of a tie. */
3753 if (new_cost > old_cost
3754 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3755 break;
3757 /* It's not safe to substitute the operand of a conversion
3758 operator with a constant, as the conversion's identity
3759 depends upon the mode of it's operand. This optimization
3760 is handled by the call to simplify_unary_operation. */
3761 if (GET_RTX_CLASS (code) == '1'
3762 && GET_MODE (replacements[j]) != mode_arg0
3763 && (code == ZERO_EXTEND
3764 || code == SIGN_EXTEND
3765 || code == TRUNCATE
3766 || code == FLOAT_TRUNCATE
3767 || code == FLOAT_EXTEND
3768 || code == FLOAT
3769 || code == FIX
3770 || code == UNSIGNED_FLOAT
3771 || code == UNSIGNED_FIX))
3772 continue;
3774 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3775 break;
3777 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3778 || code == LTGT || code == UNEQ || code == ORDERED
3779 || code == UNORDERED)
3781 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3782 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3784 if (apply_change_group ())
3786 /* Swap them back to be invalid so that this loop can
3787 continue and flag them to be swapped back later. */
3788 rtx tem;
3790 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3791 XEXP (x, 1) = tem;
3792 must_swap = 1;
3793 break;
3799 else
3801 if (fmt[i] == 'E')
3802 /* Don't try to fold inside of a vector of expressions.
3803 Doing nothing is harmless. */
3807 /* If a commutative operation, place a constant integer as the second
3808 operand unless the first operand is also a constant integer. Otherwise,
3809 place any constant second unless the first operand is also a constant. */
3811 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3812 || code == LTGT || code == UNEQ || code == ORDERED
3813 || code == UNORDERED)
3815 if (must_swap
3816 || swap_commutative_operands_p (const_arg0 ? const_arg0
3817 : XEXP (x, 0),
3818 const_arg1 ? const_arg1
3819 : XEXP (x, 1)))
3821 rtx tem = XEXP (x, 0);
3823 if (insn == 0 && ! copied)
3825 x = copy_rtx (x);
3826 copied = 1;
3829 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3830 validate_change (insn, &XEXP (x, 1), tem, 1);
3831 if (apply_change_group ())
3833 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3834 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3839 /* If X is an arithmetic operation, see if we can simplify it. */
3841 switch (GET_RTX_CLASS (code))
3843 case '1':
3845 int is_const = 0;
3847 /* We can't simplify extension ops unless we know the
3848 original mode. */
3849 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3850 && mode_arg0 == VOIDmode)
3851 break;
3853 /* If we had a CONST, strip it off and put it back later if we
3854 fold. */
3855 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3856 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3858 new = simplify_unary_operation (code, mode,
3859 const_arg0 ? const_arg0 : folded_arg0,
3860 mode_arg0);
3861 if (new != 0 && is_const)
3862 new = gen_rtx_CONST (mode, new);
3864 break;
3866 case '<':
3867 /* See what items are actually being compared and set FOLDED_ARG[01]
3868 to those values and CODE to the actual comparison code. If any are
3869 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3870 do anything if both operands are already known to be constant. */
3872 if (const_arg0 == 0 || const_arg1 == 0)
3874 struct table_elt *p0, *p1;
3875 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3876 enum machine_mode mode_arg1;
3878 #ifdef FLOAT_STORE_FLAG_VALUE
3879 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3881 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3882 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3883 false_rtx = CONST0_RTX (mode);
3885 #endif
3887 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3888 &mode_arg0, &mode_arg1);
3889 const_arg0 = equiv_constant (folded_arg0);
3890 const_arg1 = equiv_constant (folded_arg1);
3892 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3893 what kinds of things are being compared, so we can't do
3894 anything with this comparison. */
3896 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3897 break;
3899 /* If we do not now have two constants being compared, see
3900 if we can nevertheless deduce some things about the
3901 comparison. */
3902 if (const_arg0 == 0 || const_arg1 == 0)
3904 /* Some addresses are known to be nonzero. We don't know
3905 their sign, but equality comparisons are known. */
3906 if (const_arg1 == const0_rtx
3907 && nonzero_address_p (folded_arg0))
3909 if (code == EQ)
3910 return false_rtx;
3911 else if (code == NE)
3912 return true_rtx;
3915 /* See if the two operands are the same. */
3917 if (folded_arg0 == folded_arg1
3918 || (GET_CODE (folded_arg0) == REG
3919 && GET_CODE (folded_arg1) == REG
3920 && (REG_QTY (REGNO (folded_arg0))
3921 == REG_QTY (REGNO (folded_arg1))))
3922 || ((p0 = lookup (folded_arg0,
3923 (safe_hash (folded_arg0, mode_arg0)
3924 & HASH_MASK), mode_arg0))
3925 && (p1 = lookup (folded_arg1,
3926 (safe_hash (folded_arg1, mode_arg0)
3927 & HASH_MASK), mode_arg0))
3928 && p0->first_same_value == p1->first_same_value))
3930 /* Sadly two equal NaNs are not equivalent. */
3931 if (!HONOR_NANS (mode_arg0))
3932 return ((code == EQ || code == LE || code == GE
3933 || code == LEU || code == GEU || code == UNEQ
3934 || code == UNLE || code == UNGE
3935 || code == ORDERED)
3936 ? true_rtx : false_rtx);
3937 /* Take care for the FP compares we can resolve. */
3938 if (code == UNEQ || code == UNLE || code == UNGE)
3939 return true_rtx;
3940 if (code == LTGT || code == LT || code == GT)
3941 return false_rtx;
3944 /* If FOLDED_ARG0 is a register, see if the comparison we are
3945 doing now is either the same as we did before or the reverse
3946 (we only check the reverse if not floating-point). */
3947 else if (GET_CODE (folded_arg0) == REG)
3949 int qty = REG_QTY (REGNO (folded_arg0));
3951 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3953 struct qty_table_elem *ent = &qty_table[qty];
3955 if ((comparison_dominates_p (ent->comparison_code, code)
3956 || (! FLOAT_MODE_P (mode_arg0)
3957 && comparison_dominates_p (ent->comparison_code,
3958 reverse_condition (code))))
3959 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3960 || (const_arg1
3961 && rtx_equal_p (ent->comparison_const,
3962 const_arg1))
3963 || (GET_CODE (folded_arg1) == REG
3964 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3965 return (comparison_dominates_p (ent->comparison_code, code)
3966 ? true_rtx : false_rtx);
3972 /* If we are comparing against zero, see if the first operand is
3973 equivalent to an IOR with a constant. If so, we may be able to
3974 determine the result of this comparison. */
3976 if (const_arg1 == const0_rtx)
3978 rtx y = lookup_as_function (folded_arg0, IOR);
3979 rtx inner_const;
3981 if (y != 0
3982 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3983 && GET_CODE (inner_const) == CONST_INT
3984 && INTVAL (inner_const) != 0)
3986 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3987 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3988 && (INTVAL (inner_const)
3989 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3990 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3992 #ifdef FLOAT_STORE_FLAG_VALUE
3993 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3995 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3996 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3997 false_rtx = CONST0_RTX (mode);
3999 #endif
4001 switch (code)
4003 case EQ:
4004 return false_rtx;
4005 case NE:
4006 return true_rtx;
4007 case LT: case LE:
4008 if (has_sign)
4009 return true_rtx;
4010 break;
4011 case GT: case GE:
4012 if (has_sign)
4013 return false_rtx;
4014 break;
4015 default:
4016 break;
4021 new = simplify_relational_operation (code,
4022 (mode_arg0 != VOIDmode
4023 ? mode_arg0
4024 : (GET_MODE (const_arg0
4025 ? const_arg0
4026 : folded_arg0)
4027 != VOIDmode)
4028 ? GET_MODE (const_arg0
4029 ? const_arg0
4030 : folded_arg0)
4031 : GET_MODE (const_arg1
4032 ? const_arg1
4033 : folded_arg1)),
4034 const_arg0 ? const_arg0 : folded_arg0,
4035 const_arg1 ? const_arg1 : folded_arg1);
4036 #ifdef FLOAT_STORE_FLAG_VALUE
4037 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4039 if (new == const0_rtx)
4040 new = CONST0_RTX (mode);
4041 else
4042 new = (CONST_DOUBLE_FROM_REAL_VALUE
4043 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4045 #endif
4046 break;
4048 case '2':
4049 case 'c':
4050 switch (code)
4052 case PLUS:
4053 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4054 with that LABEL_REF as its second operand. If so, the result is
4055 the first operand of that MINUS. This handles switches with an
4056 ADDR_DIFF_VEC table. */
4057 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4059 rtx y
4060 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4061 : lookup_as_function (folded_arg0, MINUS);
4063 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4064 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4065 return XEXP (y, 0);
4067 /* Now try for a CONST of a MINUS like the above. */
4068 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4069 : lookup_as_function (folded_arg0, CONST))) != 0
4070 && GET_CODE (XEXP (y, 0)) == MINUS
4071 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4072 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4073 return XEXP (XEXP (y, 0), 0);
4076 /* Likewise if the operands are in the other order. */
4077 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4079 rtx y
4080 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4081 : lookup_as_function (folded_arg1, MINUS);
4083 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4084 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4085 return XEXP (y, 0);
4087 /* Now try for a CONST of a MINUS like the above. */
4088 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4089 : lookup_as_function (folded_arg1, CONST))) != 0
4090 && GET_CODE (XEXP (y, 0)) == MINUS
4091 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4092 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4093 return XEXP (XEXP (y, 0), 0);
4096 /* If second operand is a register equivalent to a negative
4097 CONST_INT, see if we can find a register equivalent to the
4098 positive constant. Make a MINUS if so. Don't do this for
4099 a non-negative constant since we might then alternate between
4100 choosing positive and negative constants. Having the positive
4101 constant previously-used is the more common case. Be sure
4102 the resulting constant is non-negative; if const_arg1 were
4103 the smallest negative number this would overflow: depending
4104 on the mode, this would either just be the same value (and
4105 hence not save anything) or be incorrect. */
4106 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4107 && INTVAL (const_arg1) < 0
4108 /* This used to test
4110 -INTVAL (const_arg1) >= 0
4112 But The Sun V5.0 compilers mis-compiled that test. So
4113 instead we test for the problematic value in a more direct
4114 manner and hope the Sun compilers get it correct. */
4115 && INTVAL (const_arg1) !=
4116 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4117 && GET_CODE (folded_arg1) == REG)
4119 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4120 struct table_elt *p
4121 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4122 mode);
4124 if (p)
4125 for (p = p->first_same_value; p; p = p->next_same_value)
4126 if (GET_CODE (p->exp) == REG)
4127 return simplify_gen_binary (MINUS, mode, folded_arg0,
4128 canon_reg (p->exp, NULL_RTX));
4130 goto from_plus;
4132 case MINUS:
4133 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4134 If so, produce (PLUS Z C2-C). */
4135 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4137 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4138 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4139 return fold_rtx (plus_constant (copy_rtx (y),
4140 -INTVAL (const_arg1)),
4141 NULL_RTX);
4144 /* Fall through. */
4146 from_plus:
4147 case SMIN: case SMAX: case UMIN: case UMAX:
4148 case IOR: case AND: case XOR:
4149 case MULT:
4150 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4151 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4152 is known to be of similar form, we may be able to replace the
4153 operation with a combined operation. This may eliminate the
4154 intermediate operation if every use is simplified in this way.
4155 Note that the similar optimization done by combine.c only works
4156 if the intermediate operation's result has only one reference. */
4158 if (GET_CODE (folded_arg0) == REG
4159 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4161 int is_shift
4162 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4163 rtx y = lookup_as_function (folded_arg0, code);
4164 rtx inner_const;
4165 enum rtx_code associate_code;
4166 rtx new_const;
4168 if (y == 0
4169 || 0 == (inner_const
4170 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4171 || GET_CODE (inner_const) != CONST_INT
4172 /* If we have compiled a statement like
4173 "if (x == (x & mask1))", and now are looking at
4174 "x & mask2", we will have a case where the first operand
4175 of Y is the same as our first operand. Unless we detect
4176 this case, an infinite loop will result. */
4177 || XEXP (y, 0) == folded_arg0)
4178 break;
4180 /* Don't associate these operations if they are a PLUS with the
4181 same constant and it is a power of two. These might be doable
4182 with a pre- or post-increment. Similarly for two subtracts of
4183 identical powers of two with post decrement. */
4185 if (code == PLUS && const_arg1 == inner_const
4186 && ((HAVE_PRE_INCREMENT
4187 && exact_log2 (INTVAL (const_arg1)) >= 0)
4188 || (HAVE_POST_INCREMENT
4189 && exact_log2 (INTVAL (const_arg1)) >= 0)
4190 || (HAVE_PRE_DECREMENT
4191 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4192 || (HAVE_POST_DECREMENT
4193 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4194 break;
4196 /* Compute the code used to compose the constants. For example,
4197 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4199 associate_code = (is_shift || code == MINUS ? PLUS : code);
4201 new_const = simplify_binary_operation (associate_code, mode,
4202 const_arg1, inner_const);
4204 if (new_const == 0)
4205 break;
4207 /* If we are associating shift operations, don't let this
4208 produce a shift of the size of the object or larger.
4209 This could occur when we follow a sign-extend by a right
4210 shift on a machine that does a sign-extend as a pair
4211 of shifts. */
4213 if (is_shift && GET_CODE (new_const) == CONST_INT
4214 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4216 /* As an exception, we can turn an ASHIFTRT of this
4217 form into a shift of the number of bits - 1. */
4218 if (code == ASHIFTRT)
4219 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4220 else
4221 break;
4224 y = copy_rtx (XEXP (y, 0));
4226 /* If Y contains our first operand (the most common way this
4227 can happen is if Y is a MEM), we would do into an infinite
4228 loop if we tried to fold it. So don't in that case. */
4230 if (! reg_mentioned_p (folded_arg0, y))
4231 y = fold_rtx (y, insn);
4233 return simplify_gen_binary (code, mode, y, new_const);
4235 break;
4237 case DIV: case UDIV:
4238 /* ??? The associative optimization performed immediately above is
4239 also possible for DIV and UDIV using associate_code of MULT.
4240 However, we would need extra code to verify that the
4241 multiplication does not overflow, that is, there is no overflow
4242 in the calculation of new_const. */
4243 break;
4245 default:
4246 break;
4249 new = simplify_binary_operation (code, mode,
4250 const_arg0 ? const_arg0 : folded_arg0,
4251 const_arg1 ? const_arg1 : folded_arg1);
4252 break;
4254 case 'o':
4255 /* (lo_sum (high X) X) is simply X. */
4256 if (code == LO_SUM && const_arg0 != 0
4257 && GET_CODE (const_arg0) == HIGH
4258 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4259 return const_arg1;
4260 break;
4262 case '3':
4263 case 'b':
4264 new = simplify_ternary_operation (code, mode, mode_arg0,
4265 const_arg0 ? const_arg0 : folded_arg0,
4266 const_arg1 ? const_arg1 : folded_arg1,
4267 const_arg2 ? const_arg2 : XEXP (x, 2));
4268 break;
4270 case 'x':
4271 /* Eliminate CONSTANT_P_RTX if its constant. */
4272 if (code == CONSTANT_P_RTX)
4274 if (const_arg0)
4275 return const1_rtx;
4276 if (optimize == 0 || !flag_gcse)
4277 return const0_rtx;
4279 break;
4282 return new ? new : x;
4285 /* Return a constant value currently equivalent to X.
4286 Return 0 if we don't know one. */
4288 static rtx
4289 equiv_constant (rtx x)
4291 if (GET_CODE (x) == REG
4292 && REGNO_QTY_VALID_P (REGNO (x)))
4294 int x_q = REG_QTY (REGNO (x));
4295 struct qty_table_elem *x_ent = &qty_table[x_q];
4297 if (x_ent->const_rtx)
4298 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4301 if (x == 0 || CONSTANT_P (x))
4302 return x;
4304 /* If X is a MEM, try to fold it outside the context of any insn to see if
4305 it might be equivalent to a constant. That handles the case where it
4306 is a constant-pool reference. Then try to look it up in the hash table
4307 in case it is something whose value we have seen before. */
4309 if (GET_CODE (x) == MEM)
4311 struct table_elt *elt;
4313 x = fold_rtx (x, NULL_RTX);
4314 if (CONSTANT_P (x))
4315 return x;
4317 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4318 if (elt == 0)
4319 return 0;
4321 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4322 if (elt->is_const && CONSTANT_P (elt->exp))
4323 return elt->exp;
4326 return 0;
4329 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4330 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4331 least-significant part of X.
4332 MODE specifies how big a part of X to return.
4334 If the requested operation cannot be done, 0 is returned.
4336 This is similar to gen_lowpart in emit-rtl.c. */
4339 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4341 rtx result = gen_lowpart_common (mode, x);
4343 if (result)
4344 return result;
4345 else if (GET_CODE (x) == MEM)
4347 /* This is the only other case we handle. */
4348 int offset = 0;
4349 rtx new;
4351 if (WORDS_BIG_ENDIAN)
4352 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4353 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4354 if (BYTES_BIG_ENDIAN)
4355 /* Adjust the address so that the address-after-the-data is
4356 unchanged. */
4357 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4358 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4360 new = adjust_address_nv (x, mode, offset);
4361 if (! memory_address_p (mode, XEXP (new, 0)))
4362 return 0;
4364 return new;
4366 else
4367 return 0;
4370 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4371 branch. It will be zero if not.
4373 In certain cases, this can cause us to add an equivalence. For example,
4374 if we are following the taken case of
4375 if (i == 2)
4376 we can add the fact that `i' and '2' are now equivalent.
4378 In any case, we can record that this comparison was passed. If the same
4379 comparison is seen later, we will know its value. */
4381 static void
4382 record_jump_equiv (rtx insn, int taken)
4384 int cond_known_true;
4385 rtx op0, op1;
4386 rtx set;
4387 enum machine_mode mode, mode0, mode1;
4388 int reversed_nonequality = 0;
4389 enum rtx_code code;
4391 /* Ensure this is the right kind of insn. */
4392 if (! any_condjump_p (insn))
4393 return;
4394 set = pc_set (insn);
4396 /* See if this jump condition is known true or false. */
4397 if (taken)
4398 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4399 else
4400 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4402 /* Get the type of comparison being done and the operands being compared.
4403 If we had to reverse a non-equality condition, record that fact so we
4404 know that it isn't valid for floating-point. */
4405 code = GET_CODE (XEXP (SET_SRC (set), 0));
4406 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4407 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4409 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4410 if (! cond_known_true)
4412 code = reversed_comparison_code_parts (code, op0, op1, insn);
4414 /* Don't remember if we can't find the inverse. */
4415 if (code == UNKNOWN)
4416 return;
4419 /* The mode is the mode of the non-constant. */
4420 mode = mode0;
4421 if (mode1 != VOIDmode)
4422 mode = mode1;
4424 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4427 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4428 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4429 Make any useful entries we can with that information. Called from
4430 above function and called recursively. */
4432 static void
4433 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4434 rtx op1, int reversed_nonequality)
4436 unsigned op0_hash, op1_hash;
4437 int op0_in_memory, op1_in_memory;
4438 struct table_elt *op0_elt, *op1_elt;
4440 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4441 we know that they are also equal in the smaller mode (this is also
4442 true for all smaller modes whether or not there is a SUBREG, but
4443 is not worth testing for with no SUBREG). */
4445 /* Note that GET_MODE (op0) may not equal MODE. */
4446 if (code == EQ && GET_CODE (op0) == SUBREG
4447 && (GET_MODE_SIZE (GET_MODE (op0))
4448 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4450 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4451 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4453 record_jump_cond (code, mode, SUBREG_REG (op0),
4454 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4455 reversed_nonequality);
4458 if (code == EQ && GET_CODE (op1) == SUBREG
4459 && (GET_MODE_SIZE (GET_MODE (op1))
4460 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4462 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4463 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4465 record_jump_cond (code, mode, SUBREG_REG (op1),
4466 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4467 reversed_nonequality);
4470 /* Similarly, if this is an NE comparison, and either is a SUBREG
4471 making a smaller mode, we know the whole thing is also NE. */
4473 /* Note that GET_MODE (op0) may not equal MODE;
4474 if we test MODE instead, we can get an infinite recursion
4475 alternating between two modes each wider than MODE. */
4477 if (code == NE && GET_CODE (op0) == SUBREG
4478 && subreg_lowpart_p (op0)
4479 && (GET_MODE_SIZE (GET_MODE (op0))
4480 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4482 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4483 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4485 record_jump_cond (code, mode, SUBREG_REG (op0),
4486 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4487 reversed_nonequality);
4490 if (code == NE && GET_CODE (op1) == SUBREG
4491 && subreg_lowpart_p (op1)
4492 && (GET_MODE_SIZE (GET_MODE (op1))
4493 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4495 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4496 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4498 record_jump_cond (code, mode, SUBREG_REG (op1),
4499 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4500 reversed_nonequality);
4503 /* Hash both operands. */
4505 do_not_record = 0;
4506 hash_arg_in_memory = 0;
4507 op0_hash = HASH (op0, mode);
4508 op0_in_memory = hash_arg_in_memory;
4510 if (do_not_record)
4511 return;
4513 do_not_record = 0;
4514 hash_arg_in_memory = 0;
4515 op1_hash = HASH (op1, mode);
4516 op1_in_memory = hash_arg_in_memory;
4518 if (do_not_record)
4519 return;
4521 /* Look up both operands. */
4522 op0_elt = lookup (op0, op0_hash, mode);
4523 op1_elt = lookup (op1, op1_hash, mode);
4525 /* If both operands are already equivalent or if they are not in the
4526 table but are identical, do nothing. */
4527 if ((op0_elt != 0 && op1_elt != 0
4528 && op0_elt->first_same_value == op1_elt->first_same_value)
4529 || op0 == op1 || rtx_equal_p (op0, op1))
4530 return;
4532 /* If we aren't setting two things equal all we can do is save this
4533 comparison. Similarly if this is floating-point. In the latter
4534 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4535 If we record the equality, we might inadvertently delete code
4536 whose intent was to change -0 to +0. */
4538 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4540 struct qty_table_elem *ent;
4541 int qty;
4543 /* If we reversed a floating-point comparison, if OP0 is not a
4544 register, or if OP1 is neither a register or constant, we can't
4545 do anything. */
4547 if (GET_CODE (op1) != REG)
4548 op1 = equiv_constant (op1);
4550 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4551 || GET_CODE (op0) != REG || op1 == 0)
4552 return;
4554 /* Put OP0 in the hash table if it isn't already. This gives it a
4555 new quantity number. */
4556 if (op0_elt == 0)
4558 if (insert_regs (op0, NULL, 0))
4560 rehash_using_reg (op0);
4561 op0_hash = HASH (op0, mode);
4563 /* If OP0 is contained in OP1, this changes its hash code
4564 as well. Faster to rehash than to check, except
4565 for the simple case of a constant. */
4566 if (! CONSTANT_P (op1))
4567 op1_hash = HASH (op1,mode);
4570 op0_elt = insert (op0, NULL, op0_hash, mode);
4571 op0_elt->in_memory = op0_in_memory;
4574 qty = REG_QTY (REGNO (op0));
4575 ent = &qty_table[qty];
4577 ent->comparison_code = code;
4578 if (GET_CODE (op1) == REG)
4580 /* Look it up again--in case op0 and op1 are the same. */
4581 op1_elt = lookup (op1, op1_hash, mode);
4583 /* Put OP1 in the hash table so it gets a new quantity number. */
4584 if (op1_elt == 0)
4586 if (insert_regs (op1, NULL, 0))
4588 rehash_using_reg (op1);
4589 op1_hash = HASH (op1, mode);
4592 op1_elt = insert (op1, NULL, op1_hash, mode);
4593 op1_elt->in_memory = op1_in_memory;
4596 ent->comparison_const = NULL_RTX;
4597 ent->comparison_qty = REG_QTY (REGNO (op1));
4599 else
4601 ent->comparison_const = op1;
4602 ent->comparison_qty = -1;
4605 return;
4608 /* If either side is still missing an equivalence, make it now,
4609 then merge the equivalences. */
4611 if (op0_elt == 0)
4613 if (insert_regs (op0, NULL, 0))
4615 rehash_using_reg (op0);
4616 op0_hash = HASH (op0, mode);
4619 op0_elt = insert (op0, NULL, op0_hash, mode);
4620 op0_elt->in_memory = op0_in_memory;
4623 if (op1_elt == 0)
4625 if (insert_regs (op1, NULL, 0))
4627 rehash_using_reg (op1);
4628 op1_hash = HASH (op1, mode);
4631 op1_elt = insert (op1, NULL, op1_hash, mode);
4632 op1_elt->in_memory = op1_in_memory;
4635 merge_equiv_classes (op0_elt, op1_elt);
4636 last_jump_equiv_class = op0_elt;
4639 /* CSE processing for one instruction.
4640 First simplify sources and addresses of all assignments
4641 in the instruction, using previously-computed equivalents values.
4642 Then install the new sources and destinations in the table
4643 of available values.
4645 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4646 the insn. It means that INSN is inside libcall block. In this
4647 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4649 /* Data on one SET contained in the instruction. */
4651 struct set
4653 /* The SET rtx itself. */
4654 rtx rtl;
4655 /* The SET_SRC of the rtx (the original value, if it is changing). */
4656 rtx src;
4657 /* The hash-table element for the SET_SRC of the SET. */
4658 struct table_elt *src_elt;
4659 /* Hash value for the SET_SRC. */
4660 unsigned src_hash;
4661 /* Hash value for the SET_DEST. */
4662 unsigned dest_hash;
4663 /* The SET_DEST, with SUBREG, etc., stripped. */
4664 rtx inner_dest;
4665 /* Nonzero if the SET_SRC is in memory. */
4666 char src_in_memory;
4667 /* Nonzero if the SET_SRC contains something
4668 whose value cannot be predicted and understood. */
4669 char src_volatile;
4670 /* Original machine mode, in case it becomes a CONST_INT.
4671 The size of this field should match the size of the mode
4672 field of struct rtx_def (see rtl.h). */
4673 ENUM_BITFIELD(machine_mode) mode : 8;
4674 /* A constant equivalent for SET_SRC, if any. */
4675 rtx src_const;
4676 /* Original SET_SRC value used for libcall notes. */
4677 rtx orig_src;
4678 /* Hash value of constant equivalent for SET_SRC. */
4679 unsigned src_const_hash;
4680 /* Table entry for constant equivalent for SET_SRC, if any. */
4681 struct table_elt *src_const_elt;
4684 static void
4685 cse_insn (rtx insn, rtx libcall_insn)
4687 rtx x = PATTERN (insn);
4688 int i;
4689 rtx tem;
4690 int n_sets = 0;
4692 #ifdef HAVE_cc0
4693 /* Records what this insn does to set CC0. */
4694 rtx this_insn_cc0 = 0;
4695 enum machine_mode this_insn_cc0_mode = VOIDmode;
4696 #endif
4698 rtx src_eqv = 0;
4699 struct table_elt *src_eqv_elt = 0;
4700 int src_eqv_volatile = 0;
4701 int src_eqv_in_memory = 0;
4702 unsigned src_eqv_hash = 0;
4704 struct set *sets = (struct set *) 0;
4706 this_insn = insn;
4708 /* Find all the SETs and CLOBBERs in this instruction.
4709 Record all the SETs in the array `set' and count them.
4710 Also determine whether there is a CLOBBER that invalidates
4711 all memory references, or all references at varying addresses. */
4713 if (GET_CODE (insn) == CALL_INSN)
4715 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4717 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4718 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4719 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4723 if (GET_CODE (x) == SET)
4725 sets = alloca (sizeof (struct set));
4726 sets[0].rtl = x;
4728 /* Ignore SETs that are unconditional jumps.
4729 They never need cse processing, so this does not hurt.
4730 The reason is not efficiency but rather
4731 so that we can test at the end for instructions
4732 that have been simplified to unconditional jumps
4733 and not be misled by unchanged instructions
4734 that were unconditional jumps to begin with. */
4735 if (SET_DEST (x) == pc_rtx
4736 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4739 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4740 The hard function value register is used only once, to copy to
4741 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4742 Ensure we invalidate the destination register. On the 80386 no
4743 other code would invalidate it since it is a fixed_reg.
4744 We need not check the return of apply_change_group; see canon_reg. */
4746 else if (GET_CODE (SET_SRC (x)) == CALL)
4748 canon_reg (SET_SRC (x), insn);
4749 apply_change_group ();
4750 fold_rtx (SET_SRC (x), insn);
4751 invalidate (SET_DEST (x), VOIDmode);
4753 else
4754 n_sets = 1;
4756 else if (GET_CODE (x) == PARALLEL)
4758 int lim = XVECLEN (x, 0);
4760 sets = alloca (lim * sizeof (struct set));
4762 /* Find all regs explicitly clobbered in this insn,
4763 and ensure they are not replaced with any other regs
4764 elsewhere in this insn.
4765 When a reg that is clobbered is also used for input,
4766 we should presume that that is for a reason,
4767 and we should not substitute some other register
4768 which is not supposed to be clobbered.
4769 Therefore, this loop cannot be merged into the one below
4770 because a CALL may precede a CLOBBER and refer to the
4771 value clobbered. We must not let a canonicalization do
4772 anything in that case. */
4773 for (i = 0; i < lim; i++)
4775 rtx y = XVECEXP (x, 0, i);
4776 if (GET_CODE (y) == CLOBBER)
4778 rtx clobbered = XEXP (y, 0);
4780 if (GET_CODE (clobbered) == REG
4781 || GET_CODE (clobbered) == SUBREG)
4782 invalidate (clobbered, VOIDmode);
4783 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4784 || GET_CODE (clobbered) == ZERO_EXTRACT)
4785 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4789 for (i = 0; i < lim; i++)
4791 rtx y = XVECEXP (x, 0, i);
4792 if (GET_CODE (y) == SET)
4794 /* As above, we ignore unconditional jumps and call-insns and
4795 ignore the result of apply_change_group. */
4796 if (GET_CODE (SET_SRC (y)) == CALL)
4798 canon_reg (SET_SRC (y), insn);
4799 apply_change_group ();
4800 fold_rtx (SET_SRC (y), insn);
4801 invalidate (SET_DEST (y), VOIDmode);
4803 else if (SET_DEST (y) == pc_rtx
4804 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4806 else
4807 sets[n_sets++].rtl = y;
4809 else if (GET_CODE (y) == CLOBBER)
4811 /* If we clobber memory, canon the address.
4812 This does nothing when a register is clobbered
4813 because we have already invalidated the reg. */
4814 if (GET_CODE (XEXP (y, 0)) == MEM)
4815 canon_reg (XEXP (y, 0), NULL_RTX);
4817 else if (GET_CODE (y) == USE
4818 && ! (GET_CODE (XEXP (y, 0)) == REG
4819 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4820 canon_reg (y, NULL_RTX);
4821 else if (GET_CODE (y) == CALL)
4823 /* The result of apply_change_group can be ignored; see
4824 canon_reg. */
4825 canon_reg (y, insn);
4826 apply_change_group ();
4827 fold_rtx (y, insn);
4831 else if (GET_CODE (x) == CLOBBER)
4833 if (GET_CODE (XEXP (x, 0)) == MEM)
4834 canon_reg (XEXP (x, 0), NULL_RTX);
4837 /* Canonicalize a USE of a pseudo register or memory location. */
4838 else if (GET_CODE (x) == USE
4839 && ! (GET_CODE (XEXP (x, 0)) == REG
4840 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4841 canon_reg (XEXP (x, 0), NULL_RTX);
4842 else if (GET_CODE (x) == CALL)
4844 /* The result of apply_change_group can be ignored; see canon_reg. */
4845 canon_reg (x, insn);
4846 apply_change_group ();
4847 fold_rtx (x, insn);
4850 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4851 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4852 is handled specially for this case, and if it isn't set, then there will
4853 be no equivalence for the destination. */
4854 if (n_sets == 1 && REG_NOTES (insn) != 0
4855 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4856 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4857 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4859 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4860 XEXP (tem, 0) = src_eqv;
4863 /* Canonicalize sources and addresses of destinations.
4864 We do this in a separate pass to avoid problems when a MATCH_DUP is
4865 present in the insn pattern. In that case, we want to ensure that
4866 we don't break the duplicate nature of the pattern. So we will replace
4867 both operands at the same time. Otherwise, we would fail to find an
4868 equivalent substitution in the loop calling validate_change below.
4870 We used to suppress canonicalization of DEST if it appears in SRC,
4871 but we don't do this any more. */
4873 for (i = 0; i < n_sets; i++)
4875 rtx dest = SET_DEST (sets[i].rtl);
4876 rtx src = SET_SRC (sets[i].rtl);
4877 rtx new = canon_reg (src, insn);
4878 int insn_code;
4880 sets[i].orig_src = src;
4881 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4882 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4883 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4884 || (insn_code = recog_memoized (insn)) < 0
4885 || insn_data[insn_code].n_dups > 0)
4886 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4887 else
4888 SET_SRC (sets[i].rtl) = new;
4890 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4892 validate_change (insn, &XEXP (dest, 1),
4893 canon_reg (XEXP (dest, 1), insn), 1);
4894 validate_change (insn, &XEXP (dest, 2),
4895 canon_reg (XEXP (dest, 2), insn), 1);
4898 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4899 || GET_CODE (dest) == ZERO_EXTRACT
4900 || GET_CODE (dest) == SIGN_EXTRACT)
4901 dest = XEXP (dest, 0);
4903 if (GET_CODE (dest) == MEM)
4904 canon_reg (dest, insn);
4907 /* Now that we have done all the replacements, we can apply the change
4908 group and see if they all work. Note that this will cause some
4909 canonicalizations that would have worked individually not to be applied
4910 because some other canonicalization didn't work, but this should not
4911 occur often.
4913 The result of apply_change_group can be ignored; see canon_reg. */
4915 apply_change_group ();
4917 /* Set sets[i].src_elt to the class each source belongs to.
4918 Detect assignments from or to volatile things
4919 and set set[i] to zero so they will be ignored
4920 in the rest of this function.
4922 Nothing in this loop changes the hash table or the register chains. */
4924 for (i = 0; i < n_sets; i++)
4926 rtx src, dest;
4927 rtx src_folded;
4928 struct table_elt *elt = 0, *p;
4929 enum machine_mode mode;
4930 rtx src_eqv_here;
4931 rtx src_const = 0;
4932 rtx src_related = 0;
4933 struct table_elt *src_const_elt = 0;
4934 int src_cost = MAX_COST;
4935 int src_eqv_cost = MAX_COST;
4936 int src_folded_cost = MAX_COST;
4937 int src_related_cost = MAX_COST;
4938 int src_elt_cost = MAX_COST;
4939 int src_regcost = MAX_COST;
4940 int src_eqv_regcost = MAX_COST;
4941 int src_folded_regcost = MAX_COST;
4942 int src_related_regcost = MAX_COST;
4943 int src_elt_regcost = MAX_COST;
4944 /* Set nonzero if we need to call force_const_mem on with the
4945 contents of src_folded before using it. */
4946 int src_folded_force_flag = 0;
4948 dest = SET_DEST (sets[i].rtl);
4949 src = SET_SRC (sets[i].rtl);
4951 /* If SRC is a constant that has no machine mode,
4952 hash it with the destination's machine mode.
4953 This way we can keep different modes separate. */
4955 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4956 sets[i].mode = mode;
4958 if (src_eqv)
4960 enum machine_mode eqvmode = mode;
4961 if (GET_CODE (dest) == STRICT_LOW_PART)
4962 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4963 do_not_record = 0;
4964 hash_arg_in_memory = 0;
4965 src_eqv_hash = HASH (src_eqv, eqvmode);
4967 /* Find the equivalence class for the equivalent expression. */
4969 if (!do_not_record)
4970 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4972 src_eqv_volatile = do_not_record;
4973 src_eqv_in_memory = hash_arg_in_memory;
4976 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4977 value of the INNER register, not the destination. So it is not
4978 a valid substitution for the source. But save it for later. */
4979 if (GET_CODE (dest) == STRICT_LOW_PART)
4980 src_eqv_here = 0;
4981 else
4982 src_eqv_here = src_eqv;
4984 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4985 simplified result, which may not necessarily be valid. */
4986 src_folded = fold_rtx (src, insn);
4988 #if 0
4989 /* ??? This caused bad code to be generated for the m68k port with -O2.
4990 Suppose src is (CONST_INT -1), and that after truncation src_folded
4991 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4992 At the end we will add src and src_const to the same equivalence
4993 class. We now have 3 and -1 on the same equivalence class. This
4994 causes later instructions to be mis-optimized. */
4995 /* If storing a constant in a bitfield, pre-truncate the constant
4996 so we will be able to record it later. */
4997 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4998 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5000 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5002 if (GET_CODE (src) == CONST_INT
5003 && GET_CODE (width) == CONST_INT
5004 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5005 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5006 src_folded
5007 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5008 << INTVAL (width)) - 1));
5010 #endif
5012 /* Compute SRC's hash code, and also notice if it
5013 should not be recorded at all. In that case,
5014 prevent any further processing of this assignment. */
5015 do_not_record = 0;
5016 hash_arg_in_memory = 0;
5018 sets[i].src = src;
5019 sets[i].src_hash = HASH (src, mode);
5020 sets[i].src_volatile = do_not_record;
5021 sets[i].src_in_memory = hash_arg_in_memory;
5023 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5024 a pseudo, do not record SRC. Using SRC as a replacement for
5025 anything else will be incorrect in that situation. Note that
5026 this usually occurs only for stack slots, in which case all the
5027 RTL would be referring to SRC, so we don't lose any optimization
5028 opportunities by not having SRC in the hash table. */
5030 if (GET_CODE (src) == MEM
5031 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5032 && GET_CODE (dest) == REG
5033 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5034 sets[i].src_volatile = 1;
5036 #if 0
5037 /* It is no longer clear why we used to do this, but it doesn't
5038 appear to still be needed. So let's try without it since this
5039 code hurts cse'ing widened ops. */
5040 /* If source is a perverse subreg (such as QI treated as an SI),
5041 treat it as volatile. It may do the work of an SI in one context
5042 where the extra bits are not being used, but cannot replace an SI
5043 in general. */
5044 if (GET_CODE (src) == SUBREG
5045 && (GET_MODE_SIZE (GET_MODE (src))
5046 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5047 sets[i].src_volatile = 1;
5048 #endif
5050 /* Locate all possible equivalent forms for SRC. Try to replace
5051 SRC in the insn with each cheaper equivalent.
5053 We have the following types of equivalents: SRC itself, a folded
5054 version, a value given in a REG_EQUAL note, or a value related
5055 to a constant.
5057 Each of these equivalents may be part of an additional class
5058 of equivalents (if more than one is in the table, they must be in
5059 the same class; we check for this).
5061 If the source is volatile, we don't do any table lookups.
5063 We note any constant equivalent for possible later use in a
5064 REG_NOTE. */
5066 if (!sets[i].src_volatile)
5067 elt = lookup (src, sets[i].src_hash, mode);
5069 sets[i].src_elt = elt;
5071 if (elt && src_eqv_here && src_eqv_elt)
5073 if (elt->first_same_value != src_eqv_elt->first_same_value)
5075 /* The REG_EQUAL is indicating that two formerly distinct
5076 classes are now equivalent. So merge them. */
5077 merge_equiv_classes (elt, src_eqv_elt);
5078 src_eqv_hash = HASH (src_eqv, elt->mode);
5079 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5082 src_eqv_here = 0;
5085 else if (src_eqv_elt)
5086 elt = src_eqv_elt;
5088 /* Try to find a constant somewhere and record it in `src_const'.
5089 Record its table element, if any, in `src_const_elt'. Look in
5090 any known equivalences first. (If the constant is not in the
5091 table, also set `sets[i].src_const_hash'). */
5092 if (elt)
5093 for (p = elt->first_same_value; p; p = p->next_same_value)
5094 if (p->is_const)
5096 src_const = p->exp;
5097 src_const_elt = elt;
5098 break;
5101 if (src_const == 0
5102 && (CONSTANT_P (src_folded)
5103 /* Consider (minus (label_ref L1) (label_ref L2)) as
5104 "constant" here so we will record it. This allows us
5105 to fold switch statements when an ADDR_DIFF_VEC is used. */
5106 || (GET_CODE (src_folded) == MINUS
5107 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5108 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5109 src_const = src_folded, src_const_elt = elt;
5110 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5111 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5113 /* If we don't know if the constant is in the table, get its
5114 hash code and look it up. */
5115 if (src_const && src_const_elt == 0)
5117 sets[i].src_const_hash = HASH (src_const, mode);
5118 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5121 sets[i].src_const = src_const;
5122 sets[i].src_const_elt = src_const_elt;
5124 /* If the constant and our source are both in the table, mark them as
5125 equivalent. Otherwise, if a constant is in the table but the source
5126 isn't, set ELT to it. */
5127 if (src_const_elt && elt
5128 && src_const_elt->first_same_value != elt->first_same_value)
5129 merge_equiv_classes (elt, src_const_elt);
5130 else if (src_const_elt && elt == 0)
5131 elt = src_const_elt;
5133 /* See if there is a register linearly related to a constant
5134 equivalent of SRC. */
5135 if (src_const
5136 && (GET_CODE (src_const) == CONST
5137 || (src_const_elt && src_const_elt->related_value != 0)))
5139 src_related = use_related_value (src_const, src_const_elt);
5140 if (src_related)
5142 struct table_elt *src_related_elt
5143 = lookup (src_related, HASH (src_related, mode), mode);
5144 if (src_related_elt && elt)
5146 if (elt->first_same_value
5147 != src_related_elt->first_same_value)
5148 /* This can occur when we previously saw a CONST
5149 involving a SYMBOL_REF and then see the SYMBOL_REF
5150 twice. Merge the involved classes. */
5151 merge_equiv_classes (elt, src_related_elt);
5153 src_related = 0;
5154 src_related_elt = 0;
5156 else if (src_related_elt && elt == 0)
5157 elt = src_related_elt;
5161 /* See if we have a CONST_INT that is already in a register in a
5162 wider mode. */
5164 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5165 && GET_MODE_CLASS (mode) == MODE_INT
5166 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5168 enum machine_mode wider_mode;
5170 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5171 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5172 && src_related == 0;
5173 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5175 struct table_elt *const_elt
5176 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5178 if (const_elt == 0)
5179 continue;
5181 for (const_elt = const_elt->first_same_value;
5182 const_elt; const_elt = const_elt->next_same_value)
5183 if (GET_CODE (const_elt->exp) == REG)
5185 src_related = gen_lowpart_if_possible (mode,
5186 const_elt->exp);
5187 break;
5192 /* Another possibility is that we have an AND with a constant in
5193 a mode narrower than a word. If so, it might have been generated
5194 as part of an "if" which would narrow the AND. If we already
5195 have done the AND in a wider mode, we can use a SUBREG of that
5196 value. */
5198 if (flag_expensive_optimizations && ! src_related
5199 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5200 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5202 enum machine_mode tmode;
5203 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5205 for (tmode = GET_MODE_WIDER_MODE (mode);
5206 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5207 tmode = GET_MODE_WIDER_MODE (tmode))
5209 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5210 struct table_elt *larger_elt;
5212 if (inner)
5214 PUT_MODE (new_and, tmode);
5215 XEXP (new_and, 0) = inner;
5216 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5217 if (larger_elt == 0)
5218 continue;
5220 for (larger_elt = larger_elt->first_same_value;
5221 larger_elt; larger_elt = larger_elt->next_same_value)
5222 if (GET_CODE (larger_elt->exp) == REG)
5224 src_related
5225 = gen_lowpart_if_possible (mode, larger_elt->exp);
5226 break;
5229 if (src_related)
5230 break;
5235 #ifdef LOAD_EXTEND_OP
5236 /* See if a MEM has already been loaded with a widening operation;
5237 if it has, we can use a subreg of that. Many CISC machines
5238 also have such operations, but this is only likely to be
5239 beneficial these machines. */
5241 if (flag_expensive_optimizations && src_related == 0
5242 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5243 && GET_MODE_CLASS (mode) == MODE_INT
5244 && GET_CODE (src) == MEM && ! do_not_record
5245 && LOAD_EXTEND_OP (mode) != NIL)
5247 enum machine_mode tmode;
5249 /* Set what we are trying to extend and the operation it might
5250 have been extended with. */
5251 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5252 XEXP (memory_extend_rtx, 0) = src;
5254 for (tmode = GET_MODE_WIDER_MODE (mode);
5255 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5256 tmode = GET_MODE_WIDER_MODE (tmode))
5258 struct table_elt *larger_elt;
5260 PUT_MODE (memory_extend_rtx, tmode);
5261 larger_elt = lookup (memory_extend_rtx,
5262 HASH (memory_extend_rtx, tmode), tmode);
5263 if (larger_elt == 0)
5264 continue;
5266 for (larger_elt = larger_elt->first_same_value;
5267 larger_elt; larger_elt = larger_elt->next_same_value)
5268 if (GET_CODE (larger_elt->exp) == REG)
5270 src_related = gen_lowpart_if_possible (mode,
5271 larger_elt->exp);
5272 break;
5275 if (src_related)
5276 break;
5279 #endif /* LOAD_EXTEND_OP */
5281 if (src == src_folded)
5282 src_folded = 0;
5284 /* At this point, ELT, if nonzero, points to a class of expressions
5285 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5286 and SRC_RELATED, if nonzero, each contain additional equivalent
5287 expressions. Prune these latter expressions by deleting expressions
5288 already in the equivalence class.
5290 Check for an equivalent identical to the destination. If found,
5291 this is the preferred equivalent since it will likely lead to
5292 elimination of the insn. Indicate this by placing it in
5293 `src_related'. */
5295 if (elt)
5296 elt = elt->first_same_value;
5297 for (p = elt; p; p = p->next_same_value)
5299 enum rtx_code code = GET_CODE (p->exp);
5301 /* If the expression is not valid, ignore it. Then we do not
5302 have to check for validity below. In most cases, we can use
5303 `rtx_equal_p', since canonicalization has already been done. */
5304 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5305 continue;
5307 /* Also skip paradoxical subregs, unless that's what we're
5308 looking for. */
5309 if (code == SUBREG
5310 && (GET_MODE_SIZE (GET_MODE (p->exp))
5311 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5312 && ! (src != 0
5313 && GET_CODE (src) == SUBREG
5314 && GET_MODE (src) == GET_MODE (p->exp)
5315 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5316 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5317 continue;
5319 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5320 src = 0;
5321 else if (src_folded && GET_CODE (src_folded) == code
5322 && rtx_equal_p (src_folded, p->exp))
5323 src_folded = 0;
5324 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5325 && rtx_equal_p (src_eqv_here, p->exp))
5326 src_eqv_here = 0;
5327 else if (src_related && GET_CODE (src_related) == code
5328 && rtx_equal_p (src_related, p->exp))
5329 src_related = 0;
5331 /* This is the same as the destination of the insns, we want
5332 to prefer it. Copy it to src_related. The code below will
5333 then give it a negative cost. */
5334 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5335 src_related = dest;
5338 /* Find the cheapest valid equivalent, trying all the available
5339 possibilities. Prefer items not in the hash table to ones
5340 that are when they are equal cost. Note that we can never
5341 worsen an insn as the current contents will also succeed.
5342 If we find an equivalent identical to the destination, use it as best,
5343 since this insn will probably be eliminated in that case. */
5344 if (src)
5346 if (rtx_equal_p (src, dest))
5347 src_cost = src_regcost = -1;
5348 else
5350 src_cost = COST (src);
5351 src_regcost = approx_reg_cost (src);
5355 if (src_eqv_here)
5357 if (rtx_equal_p (src_eqv_here, dest))
5358 src_eqv_cost = src_eqv_regcost = -1;
5359 else
5361 src_eqv_cost = COST (src_eqv_here);
5362 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5366 if (src_folded)
5368 if (rtx_equal_p (src_folded, dest))
5369 src_folded_cost = src_folded_regcost = -1;
5370 else
5372 src_folded_cost = COST (src_folded);
5373 src_folded_regcost = approx_reg_cost (src_folded);
5377 if (src_related)
5379 if (rtx_equal_p (src_related, dest))
5380 src_related_cost = src_related_regcost = -1;
5381 else
5383 src_related_cost = COST (src_related);
5384 src_related_regcost = approx_reg_cost (src_related);
5388 /* If this was an indirect jump insn, a known label will really be
5389 cheaper even though it looks more expensive. */
5390 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5391 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5393 /* Terminate loop when replacement made. This must terminate since
5394 the current contents will be tested and will always be valid. */
5395 while (1)
5397 rtx trial;
5399 /* Skip invalid entries. */
5400 while (elt && GET_CODE (elt->exp) != REG
5401 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5402 elt = elt->next_same_value;
5404 /* A paradoxical subreg would be bad here: it'll be the right
5405 size, but later may be adjusted so that the upper bits aren't
5406 what we want. So reject it. */
5407 if (elt != 0
5408 && GET_CODE (elt->exp) == SUBREG
5409 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5410 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5411 /* It is okay, though, if the rtx we're trying to match
5412 will ignore any of the bits we can't predict. */
5413 && ! (src != 0
5414 && GET_CODE (src) == SUBREG
5415 && GET_MODE (src) == GET_MODE (elt->exp)
5416 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5417 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5419 elt = elt->next_same_value;
5420 continue;
5423 if (elt)
5425 src_elt_cost = elt->cost;
5426 src_elt_regcost = elt->regcost;
5429 /* Find cheapest and skip it for the next time. For items
5430 of equal cost, use this order:
5431 src_folded, src, src_eqv, src_related and hash table entry. */
5432 if (src_folded
5433 && preferrable (src_folded_cost, src_folded_regcost,
5434 src_cost, src_regcost) <= 0
5435 && preferrable (src_folded_cost, src_folded_regcost,
5436 src_eqv_cost, src_eqv_regcost) <= 0
5437 && preferrable (src_folded_cost, src_folded_regcost,
5438 src_related_cost, src_related_regcost) <= 0
5439 && preferrable (src_folded_cost, src_folded_regcost,
5440 src_elt_cost, src_elt_regcost) <= 0)
5442 trial = src_folded, src_folded_cost = MAX_COST;
5443 if (src_folded_force_flag)
5445 rtx forced = force_const_mem (mode, trial);
5446 if (forced)
5447 trial = forced;
5450 else if (src
5451 && preferrable (src_cost, src_regcost,
5452 src_eqv_cost, src_eqv_regcost) <= 0
5453 && preferrable (src_cost, src_regcost,
5454 src_related_cost, src_related_regcost) <= 0
5455 && preferrable (src_cost, src_regcost,
5456 src_elt_cost, src_elt_regcost) <= 0)
5457 trial = src, src_cost = MAX_COST;
5458 else if (src_eqv_here
5459 && preferrable (src_eqv_cost, src_eqv_regcost,
5460 src_related_cost, src_related_regcost) <= 0
5461 && preferrable (src_eqv_cost, src_eqv_regcost,
5462 src_elt_cost, src_elt_regcost) <= 0)
5463 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5464 else if (src_related
5465 && preferrable (src_related_cost, src_related_regcost,
5466 src_elt_cost, src_elt_regcost) <= 0)
5467 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5468 else
5470 trial = copy_rtx (elt->exp);
5471 elt = elt->next_same_value;
5472 src_elt_cost = MAX_COST;
5475 /* We don't normally have an insn matching (set (pc) (pc)), so
5476 check for this separately here. We will delete such an
5477 insn below.
5479 For other cases such as a table jump or conditional jump
5480 where we know the ultimate target, go ahead and replace the
5481 operand. While that may not make a valid insn, we will
5482 reemit the jump below (and also insert any necessary
5483 barriers). */
5484 if (n_sets == 1 && dest == pc_rtx
5485 && (trial == pc_rtx
5486 || (GET_CODE (trial) == LABEL_REF
5487 && ! condjump_p (insn))))
5489 SET_SRC (sets[i].rtl) = trial;
5490 cse_jumps_altered = 1;
5491 break;
5494 /* Look for a substitution that makes a valid insn. */
5495 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5497 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5499 /* If we just made a substitution inside a libcall, then we
5500 need to make the same substitution in any notes attached
5501 to the RETVAL insn. */
5502 if (libcall_insn
5503 && (GET_CODE (sets[i].orig_src) == REG
5504 || GET_CODE (sets[i].orig_src) == SUBREG
5505 || GET_CODE (sets[i].orig_src) == MEM))
5506 simplify_replace_rtx (REG_NOTES (libcall_insn),
5507 sets[i].orig_src, copy_rtx (new));
5509 /* The result of apply_change_group can be ignored; see
5510 canon_reg. */
5512 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5513 apply_change_group ();
5514 break;
5517 /* If we previously found constant pool entries for
5518 constants and this is a constant, try making a
5519 pool entry. Put it in src_folded unless we already have done
5520 this since that is where it likely came from. */
5522 else if (constant_pool_entries_cost
5523 && CONSTANT_P (trial)
5524 /* Reject cases that will abort in decode_rtx_const.
5525 On the alpha when simplifying a switch, we get
5526 (const (truncate (minus (label_ref) (label_ref)))). */
5527 && ! (GET_CODE (trial) == CONST
5528 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5529 /* Likewise on IA-64, except without the truncate. */
5530 && ! (GET_CODE (trial) == CONST
5531 && GET_CODE (XEXP (trial, 0)) == MINUS
5532 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5533 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5534 && (src_folded == 0
5535 || (GET_CODE (src_folded) != MEM
5536 && ! src_folded_force_flag))
5537 && GET_MODE_CLASS (mode) != MODE_CC
5538 && mode != VOIDmode)
5540 src_folded_force_flag = 1;
5541 src_folded = trial;
5542 src_folded_cost = constant_pool_entries_cost;
5543 src_folded_regcost = constant_pool_entries_regcost;
5547 src = SET_SRC (sets[i].rtl);
5549 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5550 However, there is an important exception: If both are registers
5551 that are not the head of their equivalence class, replace SET_SRC
5552 with the head of the class. If we do not do this, we will have
5553 both registers live over a portion of the basic block. This way,
5554 their lifetimes will likely abut instead of overlapping. */
5555 if (GET_CODE (dest) == REG
5556 && REGNO_QTY_VALID_P (REGNO (dest)))
5558 int dest_q = REG_QTY (REGNO (dest));
5559 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5561 if (dest_ent->mode == GET_MODE (dest)
5562 && dest_ent->first_reg != REGNO (dest)
5563 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5564 /* Don't do this if the original insn had a hard reg as
5565 SET_SRC or SET_DEST. */
5566 && (GET_CODE (sets[i].src) != REG
5567 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5568 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5569 /* We can't call canon_reg here because it won't do anything if
5570 SRC is a hard register. */
5572 int src_q = REG_QTY (REGNO (src));
5573 struct qty_table_elem *src_ent = &qty_table[src_q];
5574 int first = src_ent->first_reg;
5575 rtx new_src
5576 = (first >= FIRST_PSEUDO_REGISTER
5577 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5579 /* We must use validate-change even for this, because this
5580 might be a special no-op instruction, suitable only to
5581 tag notes onto. */
5582 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5584 src = new_src;
5585 /* If we had a constant that is cheaper than what we are now
5586 setting SRC to, use that constant. We ignored it when we
5587 thought we could make this into a no-op. */
5588 if (src_const && COST (src_const) < COST (src)
5589 && validate_change (insn, &SET_SRC (sets[i].rtl),
5590 src_const, 0))
5591 src = src_const;
5596 /* If we made a change, recompute SRC values. */
5597 if (src != sets[i].src)
5599 cse_altered = 1;
5600 do_not_record = 0;
5601 hash_arg_in_memory = 0;
5602 sets[i].src = src;
5603 sets[i].src_hash = HASH (src, mode);
5604 sets[i].src_volatile = do_not_record;
5605 sets[i].src_in_memory = hash_arg_in_memory;
5606 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5609 /* If this is a single SET, we are setting a register, and we have an
5610 equivalent constant, we want to add a REG_NOTE. We don't want
5611 to write a REG_EQUAL note for a constant pseudo since verifying that
5612 that pseudo hasn't been eliminated is a pain. Such a note also
5613 won't help anything.
5615 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5616 which can be created for a reference to a compile time computable
5617 entry in a jump table. */
5619 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5620 && GET_CODE (src_const) != REG
5621 && ! (GET_CODE (src_const) == CONST
5622 && GET_CODE (XEXP (src_const, 0)) == MINUS
5623 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5624 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5626 /* We only want a REG_EQUAL note if src_const != src. */
5627 if (! rtx_equal_p (src, src_const))
5629 /* Make sure that the rtx is not shared. */
5630 src_const = copy_rtx (src_const);
5632 /* Record the actual constant value in a REG_EQUAL note,
5633 making a new one if one does not already exist. */
5634 set_unique_reg_note (insn, REG_EQUAL, src_const);
5638 /* Now deal with the destination. */
5639 do_not_record = 0;
5641 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5642 to the MEM or REG within it. */
5643 while (GET_CODE (dest) == SIGN_EXTRACT
5644 || GET_CODE (dest) == ZERO_EXTRACT
5645 || GET_CODE (dest) == SUBREG
5646 || GET_CODE (dest) == STRICT_LOW_PART)
5647 dest = XEXP (dest, 0);
5649 sets[i].inner_dest = dest;
5651 if (GET_CODE (dest) == MEM)
5653 #ifdef PUSH_ROUNDING
5654 /* Stack pushes invalidate the stack pointer. */
5655 rtx addr = XEXP (dest, 0);
5656 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5657 && XEXP (addr, 0) == stack_pointer_rtx)
5658 invalidate (stack_pointer_rtx, Pmode);
5659 #endif
5660 dest = fold_rtx (dest, insn);
5663 /* Compute the hash code of the destination now,
5664 before the effects of this instruction are recorded,
5665 since the register values used in the address computation
5666 are those before this instruction. */
5667 sets[i].dest_hash = HASH (dest, mode);
5669 /* Don't enter a bit-field in the hash table
5670 because the value in it after the store
5671 may not equal what was stored, due to truncation. */
5673 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5674 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5676 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5678 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5679 && GET_CODE (width) == CONST_INT
5680 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5681 && ! (INTVAL (src_const)
5682 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5683 /* Exception: if the value is constant,
5684 and it won't be truncated, record it. */
5686 else
5688 /* This is chosen so that the destination will be invalidated
5689 but no new value will be recorded.
5690 We must invalidate because sometimes constant
5691 values can be recorded for bitfields. */
5692 sets[i].src_elt = 0;
5693 sets[i].src_volatile = 1;
5694 src_eqv = 0;
5695 src_eqv_elt = 0;
5699 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5700 the insn. */
5701 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5703 /* One less use of the label this insn used to jump to. */
5704 delete_insn (insn);
5705 cse_jumps_altered = 1;
5706 /* No more processing for this set. */
5707 sets[i].rtl = 0;
5710 /* If this SET is now setting PC to a label, we know it used to
5711 be a conditional or computed branch. */
5712 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5714 /* Now emit a BARRIER after the unconditional jump. */
5715 if (NEXT_INSN (insn) == 0
5716 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5717 emit_barrier_after (insn);
5719 /* We reemit the jump in as many cases as possible just in
5720 case the form of an unconditional jump is significantly
5721 different than a computed jump or conditional jump.
5723 If this insn has multiple sets, then reemitting the
5724 jump is nontrivial. So instead we just force rerecognition
5725 and hope for the best. */
5726 if (n_sets == 1)
5728 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5730 JUMP_LABEL (new) = XEXP (src, 0);
5731 LABEL_NUSES (XEXP (src, 0))++;
5732 delete_insn (insn);
5733 insn = new;
5735 /* Now emit a BARRIER after the unconditional jump. */
5736 if (NEXT_INSN (insn) == 0
5737 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5738 emit_barrier_after (insn);
5740 else
5741 INSN_CODE (insn) = -1;
5743 never_reached_warning (insn, NULL);
5745 /* Do not bother deleting any unreachable code,
5746 let jump/flow do that. */
5748 cse_jumps_altered = 1;
5749 sets[i].rtl = 0;
5752 /* If destination is volatile, invalidate it and then do no further
5753 processing for this assignment. */
5755 else if (do_not_record)
5757 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5758 invalidate (dest, VOIDmode);
5759 else if (GET_CODE (dest) == MEM)
5761 /* Outgoing arguments for a libcall don't
5762 affect any recorded expressions. */
5763 if (! libcall_insn || insn == libcall_insn)
5764 invalidate (dest, VOIDmode);
5766 else if (GET_CODE (dest) == STRICT_LOW_PART
5767 || GET_CODE (dest) == ZERO_EXTRACT)
5768 invalidate (XEXP (dest, 0), GET_MODE (dest));
5769 sets[i].rtl = 0;
5772 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5773 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5775 #ifdef HAVE_cc0
5776 /* If setting CC0, record what it was set to, or a constant, if it
5777 is equivalent to a constant. If it is being set to a floating-point
5778 value, make a COMPARE with the appropriate constant of 0. If we
5779 don't do this, later code can interpret this as a test against
5780 const0_rtx, which can cause problems if we try to put it into an
5781 insn as a floating-point operand. */
5782 if (dest == cc0_rtx)
5784 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5785 this_insn_cc0_mode = mode;
5786 if (FLOAT_MODE_P (mode))
5787 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5788 CONST0_RTX (mode));
5790 #endif
5793 /* Now enter all non-volatile source expressions in the hash table
5794 if they are not already present.
5795 Record their equivalence classes in src_elt.
5796 This way we can insert the corresponding destinations into
5797 the same classes even if the actual sources are no longer in them
5798 (having been invalidated). */
5800 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5801 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5803 struct table_elt *elt;
5804 struct table_elt *classp = sets[0].src_elt;
5805 rtx dest = SET_DEST (sets[0].rtl);
5806 enum machine_mode eqvmode = GET_MODE (dest);
5808 if (GET_CODE (dest) == STRICT_LOW_PART)
5810 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5811 classp = 0;
5813 if (insert_regs (src_eqv, classp, 0))
5815 rehash_using_reg (src_eqv);
5816 src_eqv_hash = HASH (src_eqv, eqvmode);
5818 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5819 elt->in_memory = src_eqv_in_memory;
5820 src_eqv_elt = elt;
5822 /* Check to see if src_eqv_elt is the same as a set source which
5823 does not yet have an elt, and if so set the elt of the set source
5824 to src_eqv_elt. */
5825 for (i = 0; i < n_sets; i++)
5826 if (sets[i].rtl && sets[i].src_elt == 0
5827 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5828 sets[i].src_elt = src_eqv_elt;
5831 for (i = 0; i < n_sets; i++)
5832 if (sets[i].rtl && ! sets[i].src_volatile
5833 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5835 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5837 /* REG_EQUAL in setting a STRICT_LOW_PART
5838 gives an equivalent for the entire destination register,
5839 not just for the subreg being stored in now.
5840 This is a more interesting equivalence, so we arrange later
5841 to treat the entire reg as the destination. */
5842 sets[i].src_elt = src_eqv_elt;
5843 sets[i].src_hash = src_eqv_hash;
5845 else
5847 /* Insert source and constant equivalent into hash table, if not
5848 already present. */
5849 struct table_elt *classp = src_eqv_elt;
5850 rtx src = sets[i].src;
5851 rtx dest = SET_DEST (sets[i].rtl);
5852 enum machine_mode mode
5853 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5855 /* It's possible that we have a source value known to be
5856 constant but don't have a REG_EQUAL note on the insn.
5857 Lack of a note will mean src_eqv_elt will be NULL. This
5858 can happen where we've generated a SUBREG to access a
5859 CONST_INT that is already in a register in a wider mode.
5860 Ensure that the source expression is put in the proper
5861 constant class. */
5862 if (!classp)
5863 classp = sets[i].src_const_elt;
5865 if (sets[i].src_elt == 0)
5867 /* Don't put a hard register source into the table if this is
5868 the last insn of a libcall. In this case, we only need
5869 to put src_eqv_elt in src_elt. */
5870 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5872 struct table_elt *elt;
5874 /* Note that these insert_regs calls cannot remove
5875 any of the src_elt's, because they would have failed to
5876 match if not still valid. */
5877 if (insert_regs (src, classp, 0))
5879 rehash_using_reg (src);
5880 sets[i].src_hash = HASH (src, mode);
5882 elt = insert (src, classp, sets[i].src_hash, mode);
5883 elt->in_memory = sets[i].src_in_memory;
5884 sets[i].src_elt = classp = elt;
5886 else
5887 sets[i].src_elt = classp;
5889 if (sets[i].src_const && sets[i].src_const_elt == 0
5890 && src != sets[i].src_const
5891 && ! rtx_equal_p (sets[i].src_const, src))
5892 sets[i].src_elt = insert (sets[i].src_const, classp,
5893 sets[i].src_const_hash, mode);
5896 else if (sets[i].src_elt == 0)
5897 /* If we did not insert the source into the hash table (e.g., it was
5898 volatile), note the equivalence class for the REG_EQUAL value, if any,
5899 so that the destination goes into that class. */
5900 sets[i].src_elt = src_eqv_elt;
5902 invalidate_from_clobbers (x);
5904 /* Some registers are invalidated by subroutine calls. Memory is
5905 invalidated by non-constant calls. */
5907 if (GET_CODE (insn) == CALL_INSN)
5909 if (! CONST_OR_PURE_CALL_P (insn))
5910 invalidate_memory ();
5911 invalidate_for_call ();
5914 /* Now invalidate everything set by this instruction.
5915 If a SUBREG or other funny destination is being set,
5916 sets[i].rtl is still nonzero, so here we invalidate the reg
5917 a part of which is being set. */
5919 for (i = 0; i < n_sets; i++)
5920 if (sets[i].rtl)
5922 /* We can't use the inner dest, because the mode associated with
5923 a ZERO_EXTRACT is significant. */
5924 rtx dest = SET_DEST (sets[i].rtl);
5926 /* Needed for registers to remove the register from its
5927 previous quantity's chain.
5928 Needed for memory if this is a nonvarying address, unless
5929 we have just done an invalidate_memory that covers even those. */
5930 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5931 invalidate (dest, VOIDmode);
5932 else if (GET_CODE (dest) == MEM)
5934 /* Outgoing arguments for a libcall don't
5935 affect any recorded expressions. */
5936 if (! libcall_insn || insn == libcall_insn)
5937 invalidate (dest, VOIDmode);
5939 else if (GET_CODE (dest) == STRICT_LOW_PART
5940 || GET_CODE (dest) == ZERO_EXTRACT)
5941 invalidate (XEXP (dest, 0), GET_MODE (dest));
5944 /* A volatile ASM invalidates everything. */
5945 if (GET_CODE (insn) == INSN
5946 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5947 && MEM_VOLATILE_P (PATTERN (insn)))
5948 flush_hash_table ();
5950 /* Make sure registers mentioned in destinations
5951 are safe for use in an expression to be inserted.
5952 This removes from the hash table
5953 any invalid entry that refers to one of these registers.
5955 We don't care about the return value from mention_regs because
5956 we are going to hash the SET_DEST values unconditionally. */
5958 for (i = 0; i < n_sets; i++)
5960 if (sets[i].rtl)
5962 rtx x = SET_DEST (sets[i].rtl);
5964 if (GET_CODE (x) != REG)
5965 mention_regs (x);
5966 else
5968 /* We used to rely on all references to a register becoming
5969 inaccessible when a register changes to a new quantity,
5970 since that changes the hash code. However, that is not
5971 safe, since after HASH_SIZE new quantities we get a
5972 hash 'collision' of a register with its own invalid
5973 entries. And since SUBREGs have been changed not to
5974 change their hash code with the hash code of the register,
5975 it wouldn't work any longer at all. So we have to check
5976 for any invalid references lying around now.
5977 This code is similar to the REG case in mention_regs,
5978 but it knows that reg_tick has been incremented, and
5979 it leaves reg_in_table as -1 . */
5980 unsigned int regno = REGNO (x);
5981 unsigned int endregno
5982 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5983 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5984 unsigned int i;
5986 for (i = regno; i < endregno; i++)
5988 if (REG_IN_TABLE (i) >= 0)
5990 remove_invalid_refs (i);
5991 REG_IN_TABLE (i) = -1;
5998 /* We may have just removed some of the src_elt's from the hash table.
5999 So replace each one with the current head of the same class. */
6001 for (i = 0; i < n_sets; i++)
6002 if (sets[i].rtl)
6004 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6005 /* If elt was removed, find current head of same class,
6006 or 0 if nothing remains of that class. */
6008 struct table_elt *elt = sets[i].src_elt;
6010 while (elt && elt->prev_same_value)
6011 elt = elt->prev_same_value;
6013 while (elt && elt->first_same_value == 0)
6014 elt = elt->next_same_value;
6015 sets[i].src_elt = elt ? elt->first_same_value : 0;
6019 /* Now insert the destinations into their equivalence classes. */
6021 for (i = 0; i < n_sets; i++)
6022 if (sets[i].rtl)
6024 rtx dest = SET_DEST (sets[i].rtl);
6025 rtx inner_dest = sets[i].inner_dest;
6026 struct table_elt *elt;
6028 /* Don't record value if we are not supposed to risk allocating
6029 floating-point values in registers that might be wider than
6030 memory. */
6031 if ((flag_float_store
6032 && GET_CODE (dest) == MEM
6033 && FLOAT_MODE_P (GET_MODE (dest)))
6034 /* Don't record BLKmode values, because we don't know the
6035 size of it, and can't be sure that other BLKmode values
6036 have the same or smaller size. */
6037 || GET_MODE (dest) == BLKmode
6038 /* Don't record values of destinations set inside a libcall block
6039 since we might delete the libcall. Things should have been set
6040 up so we won't want to reuse such a value, but we play it safe
6041 here. */
6042 || libcall_insn
6043 /* If we didn't put a REG_EQUAL value or a source into the hash
6044 table, there is no point is recording DEST. */
6045 || sets[i].src_elt == 0
6046 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6047 or SIGN_EXTEND, don't record DEST since it can cause
6048 some tracking to be wrong.
6050 ??? Think about this more later. */
6051 || (GET_CODE (dest) == SUBREG
6052 && (GET_MODE_SIZE (GET_MODE (dest))
6053 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6054 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6055 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6056 continue;
6058 /* STRICT_LOW_PART isn't part of the value BEING set,
6059 and neither is the SUBREG inside it.
6060 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6061 if (GET_CODE (dest) == STRICT_LOW_PART)
6062 dest = SUBREG_REG (XEXP (dest, 0));
6064 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6065 /* Registers must also be inserted into chains for quantities. */
6066 if (insert_regs (dest, sets[i].src_elt, 1))
6068 /* If `insert_regs' changes something, the hash code must be
6069 recalculated. */
6070 rehash_using_reg (dest);
6071 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6074 if (GET_CODE (inner_dest) == MEM
6075 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6076 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6077 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6078 Consider the case in which the address of the MEM is
6079 passed to a function, which alters the MEM. Then, if we
6080 later use Y instead of the MEM we'll miss the update. */
6081 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6082 else
6083 elt = insert (dest, sets[i].src_elt,
6084 sets[i].dest_hash, GET_MODE (dest));
6086 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6087 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6088 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
6089 0))));
6091 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6092 narrower than M2, and both M1 and M2 are the same number of words,
6093 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6094 make that equivalence as well.
6096 However, BAR may have equivalences for which gen_lowpart_if_possible
6097 will produce a simpler value than gen_lowpart_if_possible applied to
6098 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6099 BAR's equivalences. If we don't get a simplified form, make
6100 the SUBREG. It will not be used in an equivalence, but will
6101 cause two similar assignments to be detected.
6103 Note the loop below will find SUBREG_REG (DEST) since we have
6104 already entered SRC and DEST of the SET in the table. */
6106 if (GET_CODE (dest) == SUBREG
6107 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6108 / UNITS_PER_WORD)
6109 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6110 && (GET_MODE_SIZE (GET_MODE (dest))
6111 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6112 && sets[i].src_elt != 0)
6114 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6115 struct table_elt *elt, *classp = 0;
6117 for (elt = sets[i].src_elt->first_same_value; elt;
6118 elt = elt->next_same_value)
6120 rtx new_src = 0;
6121 unsigned src_hash;
6122 struct table_elt *src_elt;
6123 int byte = 0;
6125 /* Ignore invalid entries. */
6126 if (GET_CODE (elt->exp) != REG
6127 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6128 continue;
6130 /* We may have already been playing subreg games. If the
6131 mode is already correct for the destination, use it. */
6132 if (GET_MODE (elt->exp) == new_mode)
6133 new_src = elt->exp;
6134 else
6136 /* Calculate big endian correction for the SUBREG_BYTE.
6137 We have already checked that M1 (GET_MODE (dest))
6138 is not narrower than M2 (new_mode). */
6139 if (BYTES_BIG_ENDIAN)
6140 byte = (GET_MODE_SIZE (GET_MODE (dest))
6141 - GET_MODE_SIZE (new_mode));
6143 new_src = simplify_gen_subreg (new_mode, elt->exp,
6144 GET_MODE (dest), byte);
6147 /* The call to simplify_gen_subreg fails if the value
6148 is VOIDmode, yet we can't do any simplification, e.g.
6149 for EXPR_LISTs denoting function call results.
6150 It is invalid to construct a SUBREG with a VOIDmode
6151 SUBREG_REG, hence a zero new_src means we can't do
6152 this substitution. */
6153 if (! new_src)
6154 continue;
6156 src_hash = HASH (new_src, new_mode);
6157 src_elt = lookup (new_src, src_hash, new_mode);
6159 /* Put the new source in the hash table is if isn't
6160 already. */
6161 if (src_elt == 0)
6163 if (insert_regs (new_src, classp, 0))
6165 rehash_using_reg (new_src);
6166 src_hash = HASH (new_src, new_mode);
6168 src_elt = insert (new_src, classp, src_hash, new_mode);
6169 src_elt->in_memory = elt->in_memory;
6171 else if (classp && classp != src_elt->first_same_value)
6172 /* Show that two things that we've seen before are
6173 actually the same. */
6174 merge_equiv_classes (src_elt, classp);
6176 classp = src_elt->first_same_value;
6177 /* Ignore invalid entries. */
6178 while (classp
6179 && GET_CODE (classp->exp) != REG
6180 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6181 classp = classp->next_same_value;
6186 /* Special handling for (set REG0 REG1) where REG0 is the
6187 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6188 be used in the sequel, so (if easily done) change this insn to
6189 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6190 that computed their value. Then REG1 will become a dead store
6191 and won't cloud the situation for later optimizations.
6193 Do not make this change if REG1 is a hard register, because it will
6194 then be used in the sequel and we may be changing a two-operand insn
6195 into a three-operand insn.
6197 Also do not do this if we are operating on a copy of INSN.
6199 Also don't do this if INSN ends a libcall; this would cause an unrelated
6200 register to be set in the middle of a libcall, and we then get bad code
6201 if the libcall is deleted. */
6203 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6204 && NEXT_INSN (PREV_INSN (insn)) == insn
6205 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6206 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6207 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6209 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6210 struct qty_table_elem *src_ent = &qty_table[src_q];
6212 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6213 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6215 rtx prev = insn;
6216 /* Scan for the previous nonnote insn, but stop at a basic
6217 block boundary. */
6220 prev = PREV_INSN (prev);
6222 while (prev && GET_CODE (prev) == NOTE
6223 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6225 /* Do not swap the registers around if the previous instruction
6226 attaches a REG_EQUIV note to REG1.
6228 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6229 from the pseudo that originally shadowed an incoming argument
6230 to another register. Some uses of REG_EQUIV might rely on it
6231 being attached to REG1 rather than REG2.
6233 This section previously turned the REG_EQUIV into a REG_EQUAL
6234 note. We cannot do that because REG_EQUIV may provide an
6235 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6237 if (prev != 0 && GET_CODE (prev) == INSN
6238 && GET_CODE (PATTERN (prev)) == SET
6239 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6240 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6242 rtx dest = SET_DEST (sets[0].rtl);
6243 rtx src = SET_SRC (sets[0].rtl);
6244 rtx note;
6246 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6247 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6248 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6249 apply_change_group ();
6251 /* If INSN has a REG_EQUAL note, and this note mentions
6252 REG0, then we must delete it, because the value in
6253 REG0 has changed. If the note's value is REG1, we must
6254 also delete it because that is now this insn's dest. */
6255 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6256 if (note != 0
6257 && (reg_mentioned_p (dest, XEXP (note, 0))
6258 || rtx_equal_p (src, XEXP (note, 0))))
6259 remove_note (insn, note);
6264 /* If this is a conditional jump insn, record any known equivalences due to
6265 the condition being tested. */
6267 last_jump_equiv_class = 0;
6268 if (GET_CODE (insn) == JUMP_INSN
6269 && n_sets == 1 && GET_CODE (x) == SET
6270 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6271 record_jump_equiv (insn, 0);
6273 #ifdef HAVE_cc0
6274 /* If the previous insn set CC0 and this insn no longer references CC0,
6275 delete the previous insn. Here we use the fact that nothing expects CC0
6276 to be valid over an insn, which is true until the final pass. */
6277 if (prev_insn && GET_CODE (prev_insn) == INSN
6278 && (tem = single_set (prev_insn)) != 0
6279 && SET_DEST (tem) == cc0_rtx
6280 && ! reg_mentioned_p (cc0_rtx, x))
6281 delete_insn (prev_insn);
6283 prev_insn_cc0 = this_insn_cc0;
6284 prev_insn_cc0_mode = this_insn_cc0_mode;
6285 prev_insn = insn;
6286 #endif
6289 /* Remove from the hash table all expressions that reference memory. */
6291 static void
6292 invalidate_memory (void)
6294 int i;
6295 struct table_elt *p, *next;
6297 for (i = 0; i < HASH_SIZE; i++)
6298 for (p = table[i]; p; p = next)
6300 next = p->next_same_hash;
6301 if (p->in_memory)
6302 remove_from_table (p, i);
6306 /* If ADDR is an address that implicitly affects the stack pointer, return
6307 1 and update the register tables to show the effect. Else, return 0. */
6309 static int
6310 addr_affects_sp_p (rtx addr)
6312 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6313 && GET_CODE (XEXP (addr, 0)) == REG
6314 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6316 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6318 REG_TICK (STACK_POINTER_REGNUM)++;
6319 /* Is it possible to use a subreg of SP? */
6320 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6323 /* This should be *very* rare. */
6324 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6325 invalidate (stack_pointer_rtx, VOIDmode);
6327 return 1;
6330 return 0;
6333 /* Perform invalidation on the basis of everything about an insn
6334 except for invalidating the actual places that are SET in it.
6335 This includes the places CLOBBERed, and anything that might
6336 alias with something that is SET or CLOBBERed.
6338 X is the pattern of the insn. */
6340 static void
6341 invalidate_from_clobbers (rtx x)
6343 if (GET_CODE (x) == CLOBBER)
6345 rtx ref = XEXP (x, 0);
6346 if (ref)
6348 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6349 || GET_CODE (ref) == MEM)
6350 invalidate (ref, VOIDmode);
6351 else if (GET_CODE (ref) == STRICT_LOW_PART
6352 || GET_CODE (ref) == ZERO_EXTRACT)
6353 invalidate (XEXP (ref, 0), GET_MODE (ref));
6356 else if (GET_CODE (x) == PARALLEL)
6358 int i;
6359 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6361 rtx y = XVECEXP (x, 0, i);
6362 if (GET_CODE (y) == CLOBBER)
6364 rtx ref = XEXP (y, 0);
6365 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6366 || GET_CODE (ref) == MEM)
6367 invalidate (ref, VOIDmode);
6368 else if (GET_CODE (ref) == STRICT_LOW_PART
6369 || GET_CODE (ref) == ZERO_EXTRACT)
6370 invalidate (XEXP (ref, 0), GET_MODE (ref));
6376 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6377 and replace any registers in them with either an equivalent constant
6378 or the canonical form of the register. If we are inside an address,
6379 only do this if the address remains valid.
6381 OBJECT is 0 except when within a MEM in which case it is the MEM.
6383 Return the replacement for X. */
6385 static rtx
6386 cse_process_notes (rtx x, rtx object)
6388 enum rtx_code code = GET_CODE (x);
6389 const char *fmt = GET_RTX_FORMAT (code);
6390 int i;
6392 switch (code)
6394 case CONST_INT:
6395 case CONST:
6396 case SYMBOL_REF:
6397 case LABEL_REF:
6398 case CONST_DOUBLE:
6399 case CONST_VECTOR:
6400 case PC:
6401 case CC0:
6402 case LO_SUM:
6403 return x;
6405 case MEM:
6406 validate_change (x, &XEXP (x, 0),
6407 cse_process_notes (XEXP (x, 0), x), 0);
6408 return x;
6410 case EXPR_LIST:
6411 case INSN_LIST:
6412 if (REG_NOTE_KIND (x) == REG_EQUAL)
6413 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6414 if (XEXP (x, 1))
6415 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6416 return x;
6418 case SIGN_EXTEND:
6419 case ZERO_EXTEND:
6420 case SUBREG:
6422 rtx new = cse_process_notes (XEXP (x, 0), object);
6423 /* We don't substitute VOIDmode constants into these rtx,
6424 since they would impede folding. */
6425 if (GET_MODE (new) != VOIDmode)
6426 validate_change (object, &XEXP (x, 0), new, 0);
6427 return x;
6430 case REG:
6431 i = REG_QTY (REGNO (x));
6433 /* Return a constant or a constant register. */
6434 if (REGNO_QTY_VALID_P (REGNO (x)))
6436 struct qty_table_elem *ent = &qty_table[i];
6438 if (ent->const_rtx != NULL_RTX
6439 && (CONSTANT_P (ent->const_rtx)
6440 || GET_CODE (ent->const_rtx) == REG))
6442 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6443 if (new)
6444 return new;
6448 /* Otherwise, canonicalize this register. */
6449 return canon_reg (x, NULL_RTX);
6451 default:
6452 break;
6455 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6456 if (fmt[i] == 'e')
6457 validate_change (object, &XEXP (x, i),
6458 cse_process_notes (XEXP (x, i), object), 0);
6460 return x;
6463 /* Find common subexpressions between the end test of a loop and the beginning
6464 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6466 Often we have a loop where an expression in the exit test is used
6467 in the body of the loop. For example "while (*p) *q++ = *p++;".
6468 Because of the way we duplicate the loop exit test in front of the loop,
6469 however, we don't detect that common subexpression. This will be caught
6470 when global cse is implemented, but this is a quite common case.
6472 This function handles the most common cases of these common expressions.
6473 It is called after we have processed the basic block ending with the
6474 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6475 jumps to a label used only once. */
6477 static void
6478 cse_around_loop (rtx loop_start)
6480 rtx insn;
6481 int i;
6482 struct table_elt *p;
6484 /* If the jump at the end of the loop doesn't go to the start, we don't
6485 do anything. */
6486 for (insn = PREV_INSN (loop_start);
6487 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6488 insn = PREV_INSN (insn))
6491 if (insn == 0
6492 || GET_CODE (insn) != NOTE
6493 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6494 return;
6496 /* If the last insn of the loop (the end test) was an NE comparison,
6497 we will interpret it as an EQ comparison, since we fell through
6498 the loop. Any equivalences resulting from that comparison are
6499 therefore not valid and must be invalidated. */
6500 if (last_jump_equiv_class)
6501 for (p = last_jump_equiv_class->first_same_value; p;
6502 p = p->next_same_value)
6504 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6505 || (GET_CODE (p->exp) == SUBREG
6506 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6507 invalidate (p->exp, VOIDmode);
6508 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6509 || GET_CODE (p->exp) == ZERO_EXTRACT)
6510 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6513 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6514 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6516 The only thing we do with SET_DEST is invalidate entries, so we
6517 can safely process each SET in order. It is slightly less efficient
6518 to do so, but we only want to handle the most common cases.
6520 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6521 These pseudos won't have valid entries in any of the tables indexed
6522 by register number, such as reg_qty. We avoid out-of-range array
6523 accesses by not processing any instructions created after cse started. */
6525 for (insn = NEXT_INSN (loop_start);
6526 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6527 && INSN_UID (insn) < max_insn_uid
6528 && ! (GET_CODE (insn) == NOTE
6529 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6530 insn = NEXT_INSN (insn))
6532 if (INSN_P (insn)
6533 && (GET_CODE (PATTERN (insn)) == SET
6534 || GET_CODE (PATTERN (insn)) == CLOBBER))
6535 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6536 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6537 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6538 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6539 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6540 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6541 loop_start);
6545 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6546 since they are done elsewhere. This function is called via note_stores. */
6548 static void
6549 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6551 enum rtx_code code = GET_CODE (dest);
6553 if (code == MEM
6554 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6555 /* There are times when an address can appear varying and be a PLUS
6556 during this scan when it would be a fixed address were we to know
6557 the proper equivalences. So invalidate all memory if there is
6558 a BLKmode or nonscalar memory reference or a reference to a
6559 variable address. */
6560 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6561 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6563 invalidate_memory ();
6564 return;
6567 if (GET_CODE (set) == CLOBBER
6568 || CC0_P (dest)
6569 || dest == pc_rtx)
6570 return;
6572 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6573 invalidate (XEXP (dest, 0), GET_MODE (dest));
6574 else if (code == REG || code == SUBREG || code == MEM)
6575 invalidate (dest, VOIDmode);
6578 /* Invalidate all insns from START up to the end of the function or the
6579 next label. This called when we wish to CSE around a block that is
6580 conditionally executed. */
6582 static void
6583 invalidate_skipped_block (rtx start)
6585 rtx insn;
6587 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6588 insn = NEXT_INSN (insn))
6590 if (! INSN_P (insn))
6591 continue;
6593 if (GET_CODE (insn) == CALL_INSN)
6595 if (! CONST_OR_PURE_CALL_P (insn))
6596 invalidate_memory ();
6597 invalidate_for_call ();
6600 invalidate_from_clobbers (PATTERN (insn));
6601 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6605 /* If modifying X will modify the value in *DATA (which is really an
6606 `rtx *'), indicate that fact by setting the pointed to value to
6607 NULL_RTX. */
6609 static void
6610 cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
6612 rtx *cse_check_loop_start_value = (rtx *) data;
6614 if (*cse_check_loop_start_value == NULL_RTX
6615 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6616 return;
6618 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6619 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6620 *cse_check_loop_start_value = NULL_RTX;
6623 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6624 a loop that starts with the label at LOOP_START.
6626 If X is a SET, we see if its SET_SRC is currently in our hash table.
6627 If so, we see if it has a value equal to some register used only in the
6628 loop exit code (as marked by jump.c).
6630 If those two conditions are true, we search backwards from the start of
6631 the loop to see if that same value was loaded into a register that still
6632 retains its value at the start of the loop.
6634 If so, we insert an insn after the load to copy the destination of that
6635 load into the equivalent register and (try to) replace our SET_SRC with that
6636 register.
6638 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6640 static void
6641 cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
6643 struct table_elt *src_elt;
6645 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6646 are setting PC or CC0 or whose SET_SRC is already a register. */
6647 if (GET_CODE (x) == SET
6648 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6649 && GET_CODE (SET_SRC (x)) != REG)
6651 src_elt = lookup (SET_SRC (x),
6652 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6653 GET_MODE (SET_DEST (x)));
6655 if (src_elt)
6656 for (src_elt = src_elt->first_same_value; src_elt;
6657 src_elt = src_elt->next_same_value)
6658 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6659 && COST (src_elt->exp) < COST (SET_SRC (x)))
6661 rtx p, set;
6663 /* Look for an insn in front of LOOP_START that sets
6664 something in the desired mode to SET_SRC (x) before we hit
6665 a label or CALL_INSN. */
6667 for (p = prev_nonnote_insn (loop_start);
6668 p && GET_CODE (p) != CALL_INSN
6669 && GET_CODE (p) != CODE_LABEL;
6670 p = prev_nonnote_insn (p))
6671 if ((set = single_set (p)) != 0
6672 && GET_CODE (SET_DEST (set)) == REG
6673 && GET_MODE (SET_DEST (set)) == src_elt->mode
6674 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6676 /* We now have to ensure that nothing between P
6677 and LOOP_START modified anything referenced in
6678 SET_SRC (x). We know that nothing within the loop
6679 can modify it, or we would have invalidated it in
6680 the hash table. */
6681 rtx q;
6682 rtx cse_check_loop_start_value = SET_SRC (x);
6683 for (q = p; q != loop_start; q = NEXT_INSN (q))
6684 if (INSN_P (q))
6685 note_stores (PATTERN (q),
6686 cse_check_loop_start,
6687 &cse_check_loop_start_value);
6689 /* If nothing was changed and we can replace our
6690 SET_SRC, add an insn after P to copy its destination
6691 to what we will be replacing SET_SRC with. */
6692 if (cse_check_loop_start_value
6693 && single_set (p)
6694 && !can_throw_internal (insn)
6695 && validate_change (insn, &SET_SRC (x),
6696 src_elt->exp, 0))
6698 /* If this creates new pseudos, this is unsafe,
6699 because the regno of new pseudo is unsuitable
6700 to index into reg_qty when cse_insn processes
6701 the new insn. Therefore, if a new pseudo was
6702 created, discard this optimization. */
6703 int nregs = max_reg_num ();
6704 rtx move
6705 = gen_move_insn (src_elt->exp, SET_DEST (set));
6706 if (nregs != max_reg_num ())
6708 if (! validate_change (insn, &SET_SRC (x),
6709 SET_SRC (set), 0))
6710 abort ();
6712 else
6714 if (CONSTANT_P (SET_SRC (set))
6715 && ! find_reg_equal_equiv_note (insn))
6716 set_unique_reg_note (insn, REG_EQUAL,
6717 SET_SRC (set));
6718 if (control_flow_insn_p (p))
6719 /* p can cause a control flow transfer so it
6720 is the last insn of a basic block. We can't
6721 therefore use emit_insn_after. */
6722 emit_insn_before (move, next_nonnote_insn (p));
6723 else
6724 emit_insn_after (move, p);
6727 break;
6732 /* Deal with the destination of X affecting the stack pointer. */
6733 addr_affects_sp_p (SET_DEST (x));
6735 /* See comment on similar code in cse_insn for explanation of these
6736 tests. */
6737 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6738 || GET_CODE (SET_DEST (x)) == MEM)
6739 invalidate (SET_DEST (x), VOIDmode);
6740 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6741 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6742 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6745 /* Find the end of INSN's basic block and return its range,
6746 the total number of SETs in all the insns of the block, the last insn of the
6747 block, and the branch path.
6749 The branch path indicates which branches should be followed. If a nonzero
6750 path size is specified, the block should be rescanned and a different set
6751 of branches will be taken. The branch path is only used if
6752 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6754 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6755 used to describe the block. It is filled in with the information about
6756 the current block. The incoming structure's branch path, if any, is used
6757 to construct the output branch path. */
6759 void
6760 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6761 int follow_jumps, int after_loop, int skip_blocks)
6763 rtx p = insn, q;
6764 int nsets = 0;
6765 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6766 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6767 int path_size = data->path_size;
6768 int path_entry = 0;
6769 int i;
6771 /* Update the previous branch path, if any. If the last branch was
6772 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6773 shorten the path by one and look at the previous branch. We know that
6774 at least one branch must have been taken if PATH_SIZE is nonzero. */
6775 while (path_size > 0)
6777 if (data->path[path_size - 1].status != NOT_TAKEN)
6779 data->path[path_size - 1].status = NOT_TAKEN;
6780 break;
6782 else
6783 path_size--;
6786 /* If the first instruction is marked with QImode, that means we've
6787 already processed this block. Our caller will look at DATA->LAST
6788 to figure out where to go next. We want to return the next block
6789 in the instruction stream, not some branched-to block somewhere
6790 else. We accomplish this by pretending our called forbid us to
6791 follow jumps, or skip blocks. */
6792 if (GET_MODE (insn) == QImode)
6793 follow_jumps = skip_blocks = 0;
6795 /* Scan to end of this basic block. */
6796 while (p && GET_CODE (p) != CODE_LABEL)
6798 /* Don't cse out the end of a loop. This makes a difference
6799 only for the unusual loops that always execute at least once;
6800 all other loops have labels there so we will stop in any case.
6801 Cse'ing out the end of the loop is dangerous because it
6802 might cause an invariant expression inside the loop
6803 to be reused after the end of the loop. This would make it
6804 hard to move the expression out of the loop in loop.c,
6805 especially if it is one of several equivalent expressions
6806 and loop.c would like to eliminate it.
6808 If we are running after loop.c has finished, we can ignore
6809 the NOTE_INSN_LOOP_END. */
6811 if (! after_loop && GET_CODE (p) == NOTE
6812 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6813 break;
6815 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6816 the regs restored by the longjmp come from
6817 a later time than the setjmp. */
6818 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6819 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6820 break;
6822 /* A PARALLEL can have lots of SETs in it,
6823 especially if it is really an ASM_OPERANDS. */
6824 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6825 nsets += XVECLEN (PATTERN (p), 0);
6826 else if (GET_CODE (p) != NOTE)
6827 nsets += 1;
6829 /* Ignore insns made by CSE; they cannot affect the boundaries of
6830 the basic block. */
6832 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6833 high_cuid = INSN_CUID (p);
6834 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6835 low_cuid = INSN_CUID (p);
6837 /* See if this insn is in our branch path. If it is and we are to
6838 take it, do so. */
6839 if (path_entry < path_size && data->path[path_entry].branch == p)
6841 if (data->path[path_entry].status != NOT_TAKEN)
6842 p = JUMP_LABEL (p);
6844 /* Point to next entry in path, if any. */
6845 path_entry++;
6848 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6849 was specified, we haven't reached our maximum path length, there are
6850 insns following the target of the jump, this is the only use of the
6851 jump label, and the target label is preceded by a BARRIER.
6853 Alternatively, we can follow the jump if it branches around a
6854 block of code and there are no other branches into the block.
6855 In this case invalidate_skipped_block will be called to invalidate any
6856 registers set in the block when following the jump. */
6858 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6859 && GET_CODE (p) == JUMP_INSN
6860 && GET_CODE (PATTERN (p)) == SET
6861 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6862 && JUMP_LABEL (p) != 0
6863 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6864 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6866 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6867 if ((GET_CODE (q) != NOTE
6868 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6869 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6870 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6871 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6872 break;
6874 /* If we ran into a BARRIER, this code is an extension of the
6875 basic block when the branch is taken. */
6876 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6878 /* Don't allow ourself to keep walking around an
6879 always-executed loop. */
6880 if (next_real_insn (q) == next)
6882 p = NEXT_INSN (p);
6883 continue;
6886 /* Similarly, don't put a branch in our path more than once. */
6887 for (i = 0; i < path_entry; i++)
6888 if (data->path[i].branch == p)
6889 break;
6891 if (i != path_entry)
6892 break;
6894 data->path[path_entry].branch = p;
6895 data->path[path_entry++].status = TAKEN;
6897 /* This branch now ends our path. It was possible that we
6898 didn't see this branch the last time around (when the
6899 insn in front of the target was a JUMP_INSN that was
6900 turned into a no-op). */
6901 path_size = path_entry;
6903 p = JUMP_LABEL (p);
6904 /* Mark block so we won't scan it again later. */
6905 PUT_MODE (NEXT_INSN (p), QImode);
6907 /* Detect a branch around a block of code. */
6908 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6910 rtx tmp;
6912 if (next_real_insn (q) == next)
6914 p = NEXT_INSN (p);
6915 continue;
6918 for (i = 0; i < path_entry; i++)
6919 if (data->path[i].branch == p)
6920 break;
6922 if (i != path_entry)
6923 break;
6925 /* This is no_labels_between_p (p, q) with an added check for
6926 reaching the end of a function (in case Q precedes P). */
6927 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6928 if (GET_CODE (tmp) == CODE_LABEL)
6929 break;
6931 if (tmp == q)
6933 data->path[path_entry].branch = p;
6934 data->path[path_entry++].status = AROUND;
6936 path_size = path_entry;
6938 p = JUMP_LABEL (p);
6939 /* Mark block so we won't scan it again later. */
6940 PUT_MODE (NEXT_INSN (p), QImode);
6944 p = NEXT_INSN (p);
6947 data->low_cuid = low_cuid;
6948 data->high_cuid = high_cuid;
6949 data->nsets = nsets;
6950 data->last = p;
6952 /* If all jumps in the path are not taken, set our path length to zero
6953 so a rescan won't be done. */
6954 for (i = path_size - 1; i >= 0; i--)
6955 if (data->path[i].status != NOT_TAKEN)
6956 break;
6958 if (i == -1)
6959 data->path_size = 0;
6960 else
6961 data->path_size = path_size;
6963 /* End the current branch path. */
6964 data->path[path_size].branch = 0;
6967 /* Perform cse on the instructions of a function.
6968 F is the first instruction.
6969 NREGS is one plus the highest pseudo-reg number used in the instruction.
6971 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6972 (only if -frerun-cse-after-loop).
6974 Returns 1 if jump_optimize should be redone due to simplifications
6975 in conditional jump instructions. */
6978 cse_main (rtx f, int nregs, int after_loop, FILE *file)
6980 struct cse_basic_block_data val;
6981 rtx insn = f;
6982 int i;
6984 val.path = xmalloc (sizeof (struct branch_path)
6985 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6987 cse_jumps_altered = 0;
6988 recorded_label_ref = 0;
6989 constant_pool_entries_cost = 0;
6990 constant_pool_entries_regcost = 0;
6991 val.path_size = 0;
6993 init_recog ();
6994 init_alias_analysis ();
6996 max_reg = nregs;
6998 max_insn_uid = get_max_uid ();
7000 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
7002 #ifdef LOAD_EXTEND_OP
7004 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7005 and change the code and mode as appropriate. */
7006 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7007 #endif
7009 /* Reset the counter indicating how many elements have been made
7010 thus far. */
7011 n_elements_made = 0;
7013 /* Find the largest uid. */
7015 max_uid = get_max_uid ();
7016 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
7018 /* Compute the mapping from uids to cuids.
7019 CUIDs are numbers assigned to insns, like uids,
7020 except that cuids increase monotonically through the code.
7021 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7022 between two insns is not affected by -g. */
7024 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7026 if (GET_CODE (insn) != NOTE
7027 || NOTE_LINE_NUMBER (insn) < 0)
7028 INSN_CUID (insn) = ++i;
7029 else
7030 /* Give a line number note the same cuid as preceding insn. */
7031 INSN_CUID (insn) = i;
7034 ggc_push_context ();
7036 /* Loop over basic blocks.
7037 Compute the maximum number of qty's needed for each basic block
7038 (which is 2 for each SET). */
7039 insn = f;
7040 while (insn)
7042 cse_altered = 0;
7043 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7044 flag_cse_skip_blocks);
7046 /* If this basic block was already processed or has no sets, skip it. */
7047 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7049 PUT_MODE (insn, VOIDmode);
7050 insn = (val.last ? NEXT_INSN (val.last) : 0);
7051 val.path_size = 0;
7052 continue;
7055 cse_basic_block_start = val.low_cuid;
7056 cse_basic_block_end = val.high_cuid;
7057 max_qty = val.nsets * 2;
7059 if (file)
7060 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7061 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7062 val.nsets);
7064 /* Make MAX_QTY bigger to give us room to optimize
7065 past the end of this basic block, if that should prove useful. */
7066 if (max_qty < 500)
7067 max_qty = 500;
7069 max_qty += max_reg;
7071 /* If this basic block is being extended by following certain jumps,
7072 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7073 Otherwise, we start after this basic block. */
7074 if (val.path_size > 0)
7075 cse_basic_block (insn, val.last, val.path, 0);
7076 else
7078 int old_cse_jumps_altered = cse_jumps_altered;
7079 rtx temp;
7081 /* When cse changes a conditional jump to an unconditional
7082 jump, we want to reprocess the block, since it will give
7083 us a new branch path to investigate. */
7084 cse_jumps_altered = 0;
7085 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7086 if (cse_jumps_altered == 0
7087 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7088 insn = temp;
7090 cse_jumps_altered |= old_cse_jumps_altered;
7093 if (cse_altered)
7094 ggc_collect ();
7096 #ifdef USE_C_ALLOCA
7097 alloca (0);
7098 #endif
7101 ggc_pop_context ();
7103 if (max_elements_made < n_elements_made)
7104 max_elements_made = n_elements_made;
7106 /* Clean up. */
7107 end_alias_analysis ();
7108 free (uid_cuid);
7109 free (reg_eqv_table);
7110 free (val.path);
7112 return cse_jumps_altered || recorded_label_ref;
7115 /* Process a single basic block. FROM and TO and the limits of the basic
7116 block. NEXT_BRANCH points to the branch path when following jumps or
7117 a null path when not following jumps.
7119 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7120 loop. This is true when we are being called for the last time on a
7121 block and this CSE pass is before loop.c. */
7123 static rtx
7124 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7125 int around_loop)
7127 rtx insn;
7128 int to_usage = 0;
7129 rtx libcall_insn = NULL_RTX;
7130 int num_insns = 0;
7131 int no_conflict = 0;
7133 /* This array is undefined before max_reg, so only allocate
7134 the space actually needed and adjust the start. */
7136 qty_table = xmalloc ((max_qty - max_reg) * sizeof (struct qty_table_elem));
7137 qty_table -= max_reg;
7139 new_basic_block ();
7141 /* TO might be a label. If so, protect it from being deleted. */
7142 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7143 ++LABEL_NUSES (to);
7145 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7147 enum rtx_code code = GET_CODE (insn);
7149 /* If we have processed 1,000 insns, flush the hash table to
7150 avoid extreme quadratic behavior. We must not include NOTEs
7151 in the count since there may be more of them when generating
7152 debugging information. If we clear the table at different
7153 times, code generated with -g -O might be different than code
7154 generated with -O but not -g.
7156 ??? This is a real kludge and needs to be done some other way.
7157 Perhaps for 2.9. */
7158 if (code != NOTE && num_insns++ > 1000)
7160 flush_hash_table ();
7161 num_insns = 0;
7164 /* See if this is a branch that is part of the path. If so, and it is
7165 to be taken, do so. */
7166 if (next_branch->branch == insn)
7168 enum taken status = next_branch++->status;
7169 if (status != NOT_TAKEN)
7171 if (status == TAKEN)
7172 record_jump_equiv (insn, 1);
7173 else
7174 invalidate_skipped_block (NEXT_INSN (insn));
7176 /* Set the last insn as the jump insn; it doesn't affect cc0.
7177 Then follow this branch. */
7178 #ifdef HAVE_cc0
7179 prev_insn_cc0 = 0;
7180 prev_insn = insn;
7181 #endif
7182 insn = JUMP_LABEL (insn);
7183 continue;
7187 if (GET_MODE (insn) == QImode)
7188 PUT_MODE (insn, VOIDmode);
7190 if (GET_RTX_CLASS (code) == 'i')
7192 rtx p;
7194 /* Process notes first so we have all notes in canonical forms when
7195 looking for duplicate operations. */
7197 if (REG_NOTES (insn))
7198 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7200 /* Track when we are inside in LIBCALL block. Inside such a block,
7201 we do not want to record destinations. The last insn of a
7202 LIBCALL block is not considered to be part of the block, since
7203 its destination is the result of the block and hence should be
7204 recorded. */
7206 if (REG_NOTES (insn) != 0)
7208 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7209 libcall_insn = XEXP (p, 0);
7210 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7212 /* Keep libcall_insn for the last SET insn of a no-conflict
7213 block to prevent changing the destination. */
7214 if (! no_conflict)
7215 libcall_insn = 0;
7216 else
7217 no_conflict = -1;
7219 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
7220 no_conflict = 1;
7223 cse_insn (insn, libcall_insn);
7225 if (no_conflict == -1)
7227 libcall_insn = 0;
7228 no_conflict = 0;
7231 /* If we haven't already found an insn where we added a LABEL_REF,
7232 check this one. */
7233 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7234 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7235 (void *) insn))
7236 recorded_label_ref = 1;
7239 /* If INSN is now an unconditional jump, skip to the end of our
7240 basic block by pretending that we just did the last insn in the
7241 basic block. If we are jumping to the end of our block, show
7242 that we can have one usage of TO. */
7244 if (any_uncondjump_p (insn))
7246 if (to == 0)
7248 free (qty_table + max_reg);
7249 return 0;
7252 if (JUMP_LABEL (insn) == to)
7253 to_usage = 1;
7255 /* Maybe TO was deleted because the jump is unconditional.
7256 If so, there is nothing left in this basic block. */
7257 /* ??? Perhaps it would be smarter to set TO
7258 to whatever follows this insn,
7259 and pretend the basic block had always ended here. */
7260 if (INSN_DELETED_P (to))
7261 break;
7263 insn = PREV_INSN (to);
7266 /* See if it is ok to keep on going past the label
7267 which used to end our basic block. Remember that we incremented
7268 the count of that label, so we decrement it here. If we made
7269 a jump unconditional, TO_USAGE will be one; in that case, we don't
7270 want to count the use in that jump. */
7272 if (to != 0 && NEXT_INSN (insn) == to
7273 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7275 struct cse_basic_block_data val;
7276 rtx prev;
7278 insn = NEXT_INSN (to);
7280 /* If TO was the last insn in the function, we are done. */
7281 if (insn == 0)
7283 free (qty_table + max_reg);
7284 return 0;
7287 /* If TO was preceded by a BARRIER we are done with this block
7288 because it has no continuation. */
7289 prev = prev_nonnote_insn (to);
7290 if (prev && GET_CODE (prev) == BARRIER)
7292 free (qty_table + max_reg);
7293 return insn;
7296 /* Find the end of the following block. Note that we won't be
7297 following branches in this case. */
7298 to_usage = 0;
7299 val.path_size = 0;
7300 val.path = xmalloc (sizeof (struct branch_path)
7301 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7302 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7303 free (val.path);
7305 /* If the tables we allocated have enough space left
7306 to handle all the SETs in the next basic block,
7307 continue through it. Otherwise, return,
7308 and that block will be scanned individually. */
7309 if (val.nsets * 2 + next_qty > max_qty)
7310 break;
7312 cse_basic_block_start = val.low_cuid;
7313 cse_basic_block_end = val.high_cuid;
7314 to = val.last;
7316 /* Prevent TO from being deleted if it is a label. */
7317 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7318 ++LABEL_NUSES (to);
7320 /* Back up so we process the first insn in the extension. */
7321 insn = PREV_INSN (insn);
7325 if (next_qty > max_qty)
7326 abort ();
7328 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7329 the previous insn is the only insn that branches to the head of a loop,
7330 we can cse into the loop. Don't do this if we changed the jump
7331 structure of a loop unless we aren't going to be following jumps. */
7333 insn = prev_nonnote_insn (to);
7334 if ((cse_jumps_altered == 0
7335 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7336 && around_loop && to != 0
7337 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7338 && GET_CODE (insn) == JUMP_INSN
7339 && JUMP_LABEL (insn) != 0
7340 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7341 cse_around_loop (JUMP_LABEL (insn));
7343 free (qty_table + max_reg);
7345 return to ? NEXT_INSN (to) : 0;
7348 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7349 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7351 static int
7352 check_for_label_ref (rtx *rtl, void *data)
7354 rtx insn = (rtx) data;
7356 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7357 we must rerun jump since it needs to place the note. If this is a
7358 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7359 since no REG_LABEL will be added. */
7360 return (GET_CODE (*rtl) == LABEL_REF
7361 && ! LABEL_REF_NONLOCAL_P (*rtl)
7362 && LABEL_P (XEXP (*rtl, 0))
7363 && INSN_UID (XEXP (*rtl, 0)) != 0
7364 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7367 /* Count the number of times registers are used (not set) in X.
7368 COUNTS is an array in which we accumulate the count, INCR is how much
7369 we count each register usage. */
7371 static void
7372 count_reg_usage (rtx x, int *counts, int incr)
7374 enum rtx_code code;
7375 rtx note;
7376 const char *fmt;
7377 int i, j;
7379 if (x == 0)
7380 return;
7382 switch (code = GET_CODE (x))
7384 case REG:
7385 counts[REGNO (x)] += incr;
7386 return;
7388 case PC:
7389 case CC0:
7390 case CONST:
7391 case CONST_INT:
7392 case CONST_DOUBLE:
7393 case CONST_VECTOR:
7394 case SYMBOL_REF:
7395 case LABEL_REF:
7396 return;
7398 case CLOBBER:
7399 /* If we are clobbering a MEM, mark any registers inside the address
7400 as being used. */
7401 if (GET_CODE (XEXP (x, 0)) == MEM)
7402 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7403 return;
7405 case SET:
7406 /* Unless we are setting a REG, count everything in SET_DEST. */
7407 if (GET_CODE (SET_DEST (x)) != REG)
7408 count_reg_usage (SET_DEST (x), counts, incr);
7409 count_reg_usage (SET_SRC (x), counts, incr);
7410 return;
7412 case CALL_INSN:
7413 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7414 /* Fall through. */
7416 case INSN:
7417 case JUMP_INSN:
7418 count_reg_usage (PATTERN (x), counts, incr);
7420 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7421 use them. */
7423 note = find_reg_equal_equiv_note (x);
7424 if (note)
7426 rtx eqv = XEXP (note, 0);
7428 if (GET_CODE (eqv) == EXPR_LIST)
7429 /* This REG_EQUAL note describes the result of a function call.
7430 Process all the arguments. */
7433 count_reg_usage (XEXP (eqv, 0), counts, incr);
7434 eqv = XEXP (eqv, 1);
7436 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7437 else
7438 count_reg_usage (eqv, counts, incr);
7440 return;
7442 case EXPR_LIST:
7443 if (REG_NOTE_KIND (x) == REG_EQUAL
7444 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7445 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7446 involving registers in the address. */
7447 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7448 count_reg_usage (XEXP (x, 0), counts, incr);
7450 count_reg_usage (XEXP (x, 1), counts, incr);
7451 return;
7453 case ASM_OPERANDS:
7454 /* Iterate over just the inputs, not the constraints as well. */
7455 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7456 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7457 return;
7459 case INSN_LIST:
7460 abort ();
7462 default:
7463 break;
7466 fmt = GET_RTX_FORMAT (code);
7467 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7469 if (fmt[i] == 'e')
7470 count_reg_usage (XEXP (x, i), counts, incr);
7471 else if (fmt[i] == 'E')
7472 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7473 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7477 /* Return true if set is live. */
7478 static bool
7479 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7480 int *counts)
7482 #ifdef HAVE_cc0
7483 rtx tem;
7484 #endif
7486 if (set_noop_p (set))
7489 #ifdef HAVE_cc0
7490 else if (GET_CODE (SET_DEST (set)) == CC0
7491 && !side_effects_p (SET_SRC (set))
7492 && ((tem = next_nonnote_insn (insn)) == 0
7493 || !INSN_P (tem)
7494 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7495 return false;
7496 #endif
7497 else if (GET_CODE (SET_DEST (set)) != REG
7498 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7499 || counts[REGNO (SET_DEST (set))] != 0
7500 || side_effects_p (SET_SRC (set))
7501 /* An ADDRESSOF expression can turn into a use of the
7502 internal arg pointer, so always consider the
7503 internal arg pointer live. If it is truly dead,
7504 flow will delete the initializing insn. */
7505 || (SET_DEST (set) == current_function_internal_arg_pointer))
7506 return true;
7507 return false;
7510 /* Return true if insn is live. */
7512 static bool
7513 insn_live_p (rtx insn, int *counts)
7515 int i;
7516 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7517 return true;
7518 else if (GET_CODE (PATTERN (insn)) == SET)
7519 return set_live_p (PATTERN (insn), insn, counts);
7520 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7522 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7524 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7526 if (GET_CODE (elt) == SET)
7528 if (set_live_p (elt, insn, counts))
7529 return true;
7531 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7532 return true;
7534 return false;
7536 else
7537 return true;
7540 /* Return true if libcall is dead as a whole. */
7542 static bool
7543 dead_libcall_p (rtx insn, int *counts)
7545 rtx note, set, new;
7547 /* See if there's a REG_EQUAL note on this insn and try to
7548 replace the source with the REG_EQUAL expression.
7550 We assume that insns with REG_RETVALs can only be reg->reg
7551 copies at this point. */
7552 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7553 if (!note)
7554 return false;
7556 set = single_set (insn);
7557 if (!set)
7558 return false;
7560 new = simplify_rtx (XEXP (note, 0));
7561 if (!new)
7562 new = XEXP (note, 0);
7564 /* While changing insn, we must update the counts accordingly. */
7565 count_reg_usage (insn, counts, -1);
7567 if (validate_change (insn, &SET_SRC (set), new, 0))
7569 count_reg_usage (insn, counts, 1);
7570 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7571 remove_note (insn, note);
7572 return true;
7575 if (CONSTANT_P (new))
7577 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7578 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7580 count_reg_usage (insn, counts, 1);
7581 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7582 remove_note (insn, note);
7583 return true;
7587 count_reg_usage (insn, counts, 1);
7588 return false;
7591 /* Scan all the insns and delete any that are dead; i.e., they store a register
7592 that is never used or they copy a register to itself.
7594 This is used to remove insns made obviously dead by cse, loop or other
7595 optimizations. It improves the heuristics in loop since it won't try to
7596 move dead invariants out of loops or make givs for dead quantities. The
7597 remaining passes of the compilation are also sped up. */
7600 delete_trivially_dead_insns (rtx insns, int nreg)
7602 int *counts;
7603 rtx insn, prev;
7604 int in_libcall = 0, dead_libcall = 0;
7605 int ndead = 0, nlastdead, niterations = 0;
7607 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7608 /* First count the number of times each register is used. */
7609 counts = xcalloc (nreg, sizeof (int));
7610 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7611 count_reg_usage (insn, counts, 1);
7615 nlastdead = ndead;
7616 niterations++;
7617 /* Go from the last insn to the first and delete insns that only set unused
7618 registers or copy a register to itself. As we delete an insn, remove
7619 usage counts for registers it uses.
7621 The first jump optimization pass may leave a real insn as the last
7622 insn in the function. We must not skip that insn or we may end
7623 up deleting code that is not really dead. */
7624 insn = get_last_insn ();
7625 if (! INSN_P (insn))
7626 insn = prev_real_insn (insn);
7628 for (; insn; insn = prev)
7630 int live_insn = 0;
7632 prev = prev_real_insn (insn);
7634 /* Don't delete any insns that are part of a libcall block unless
7635 we can delete the whole libcall block.
7637 Flow or loop might get confused if we did that. Remember
7638 that we are scanning backwards. */
7639 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7641 in_libcall = 1;
7642 live_insn = 1;
7643 dead_libcall = dead_libcall_p (insn, counts);
7645 else if (in_libcall)
7646 live_insn = ! dead_libcall;
7647 else
7648 live_insn = insn_live_p (insn, counts);
7650 /* If this is a dead insn, delete it and show registers in it aren't
7651 being used. */
7653 if (! live_insn)
7655 count_reg_usage (insn, counts, -1);
7656 delete_insn_and_edges (insn);
7657 ndead++;
7660 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7662 in_libcall = 0;
7663 dead_libcall = 0;
7667 while (ndead != nlastdead);
7669 if (rtl_dump_file && ndead)
7670 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7671 ndead, niterations);
7672 /* Clean up. */
7673 free (counts);
7674 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7675 return ndead;
7678 /* This function is called via for_each_rtx. The argument, NEWREG, is
7679 a condition code register with the desired mode. If we are looking
7680 at the same register in a different mode, replace it with
7681 NEWREG. */
7683 static int
7684 cse_change_cc_mode (rtx *loc, void *data)
7686 rtx newreg = (rtx) data;
7688 if (*loc
7689 && GET_CODE (*loc) == REG
7690 && REGNO (*loc) == REGNO (newreg)
7691 && GET_MODE (*loc) != GET_MODE (newreg))
7693 *loc = newreg;
7694 return -1;
7696 return 0;
7699 /* Change the mode of any reference to the register REGNO (NEWREG) to
7700 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7701 any instruction which modifies NEWREG. */
7703 static void
7704 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7706 rtx insn;
7708 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7710 if (! INSN_P (insn))
7711 continue;
7713 if (reg_set_p (newreg, insn))
7714 return;
7716 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, newreg);
7717 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, newreg);
7721 /* BB is a basic block which finishes with CC_REG as a condition code
7722 register which is set to CC_SRC. Look through the successors of BB
7723 to find blocks which have a single predecessor (i.e., this one),
7724 and look through those blocks for an assignment to CC_REG which is
7725 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7726 permitted to change the mode of CC_SRC to a compatible mode. This
7727 returns VOIDmode if no equivalent assignments were found.
7728 Otherwise it returns the mode which CC_SRC should wind up with.
7730 The main complexity in this function is handling the mode issues.
7731 We may have more than one duplicate which we can eliminate, and we
7732 try to find a mode which will work for multiple duplicates. */
7734 static enum machine_mode
7735 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7737 bool found_equiv;
7738 enum machine_mode mode;
7739 unsigned int insn_count;
7740 edge e;
7741 rtx insns[2];
7742 enum machine_mode modes[2];
7743 rtx last_insns[2];
7744 unsigned int i;
7745 rtx newreg;
7747 /* We expect to have two successors. Look at both before picking
7748 the final mode for the comparison. If we have more successors
7749 (i.e., some sort of table jump, although that seems unlikely),
7750 then we require all beyond the first two to use the same
7751 mode. */
7753 found_equiv = false;
7754 mode = GET_MODE (cc_src);
7755 insn_count = 0;
7756 for (e = bb->succ; e; e = e->succ_next)
7758 rtx insn;
7759 rtx end;
7761 if (e->flags & EDGE_COMPLEX)
7762 continue;
7764 if (! e->dest->pred
7765 || e->dest->pred->pred_next
7766 || e->dest == EXIT_BLOCK_PTR)
7767 continue;
7769 end = NEXT_INSN (BB_END (e->dest));
7770 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7772 rtx set;
7774 if (! INSN_P (insn))
7775 continue;
7777 /* If CC_SRC is modified, we have to stop looking for
7778 something which uses it. */
7779 if (modified_in_p (cc_src, insn))
7780 break;
7782 /* Check whether INSN sets CC_REG to CC_SRC. */
7783 set = single_set (insn);
7784 if (set
7785 && GET_CODE (SET_DEST (set)) == REG
7786 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7788 bool found;
7789 enum machine_mode set_mode;
7790 enum machine_mode comp_mode;
7792 found = false;
7793 set_mode = GET_MODE (SET_SRC (set));
7794 comp_mode = set_mode;
7795 if (rtx_equal_p (cc_src, SET_SRC (set)))
7796 found = true;
7797 else if (GET_CODE (cc_src) == COMPARE
7798 && GET_CODE (SET_SRC (set)) == COMPARE
7799 && mode != set_mode
7800 && rtx_equal_p (XEXP (cc_src, 0),
7801 XEXP (SET_SRC (set), 0))
7802 && rtx_equal_p (XEXP (cc_src, 1),
7803 XEXP (SET_SRC (set), 1)))
7806 comp_mode = (*targetm.cc_modes_compatible) (mode, set_mode);
7807 if (comp_mode != VOIDmode
7808 && (can_change_mode || comp_mode == mode))
7809 found = true;
7812 if (found)
7814 found_equiv = true;
7815 if (insn_count < ARRAY_SIZE (insns))
7817 insns[insn_count] = insn;
7818 modes[insn_count] = set_mode;
7819 last_insns[insn_count] = end;
7820 ++insn_count;
7822 if (mode != comp_mode)
7824 if (! can_change_mode)
7825 abort ();
7826 mode = comp_mode;
7827 PUT_MODE (cc_src, mode);
7830 else
7832 if (set_mode != mode)
7834 /* We found a matching expression in the
7835 wrong mode, but we don't have room to
7836 store it in the array. Punt. This case
7837 should be rare. */
7838 break;
7840 /* INSN sets CC_REG to a value equal to CC_SRC
7841 with the right mode. We can simply delete
7842 it. */
7843 delete_insn (insn);
7846 /* We found an instruction to delete. Keep looking,
7847 in the hopes of finding a three-way jump. */
7848 continue;
7851 /* We found an instruction which sets the condition
7852 code, so don't look any farther. */
7853 break;
7856 /* If INSN sets CC_REG in some other way, don't look any
7857 farther. */
7858 if (reg_set_p (cc_reg, insn))
7859 break;
7862 /* If we fell off the bottom of the block, we can keep looking
7863 through successors. We pass CAN_CHANGE_MODE as false because
7864 we aren't prepared to handle compatibility between the
7865 further blocks and this block. */
7866 if (insn == end)
7868 enum machine_mode submode;
7870 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7871 if (submode != VOIDmode)
7873 if (submode != mode)
7874 abort ();
7875 found_equiv = true;
7876 can_change_mode = false;
7881 if (! found_equiv)
7882 return VOIDmode;
7884 /* Now INSN_COUNT is the number of instructions we found which set
7885 CC_REG to a value equivalent to CC_SRC. The instructions are in
7886 INSNS. The modes used by those instructions are in MODES. */
7888 newreg = NULL_RTX;
7889 for (i = 0; i < insn_count; ++i)
7891 if (modes[i] != mode)
7893 /* We need to change the mode of CC_REG in INSNS[i] and
7894 subsequent instructions. */
7895 if (! newreg)
7897 if (GET_MODE (cc_reg) == mode)
7898 newreg = cc_reg;
7899 else
7900 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7902 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7903 newreg);
7906 delete_insn (insns[i]);
7909 return mode;
7912 /* If we have a fixed condition code register (or two), walk through
7913 the instructions and try to eliminate duplicate assignments. */
7915 void
7916 cse_condition_code_reg (void)
7918 unsigned int cc_regno_1;
7919 unsigned int cc_regno_2;
7920 rtx cc_reg_1;
7921 rtx cc_reg_2;
7922 basic_block bb;
7924 if (! (*targetm.fixed_condition_code_regs) (&cc_regno_1, &cc_regno_2))
7925 return;
7927 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7928 if (cc_regno_2 != INVALID_REGNUM)
7929 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7930 else
7931 cc_reg_2 = NULL_RTX;
7933 FOR_EACH_BB (bb)
7935 rtx last_insn;
7936 rtx cc_reg;
7937 rtx insn;
7938 rtx cc_src_insn;
7939 rtx cc_src;
7940 enum machine_mode mode;
7941 enum machine_mode orig_mode;
7943 /* Look for blocks which end with a conditional jump based on a
7944 condition code register. Then look for the instruction which
7945 sets the condition code register. Then look through the
7946 successor blocks for instructions which set the condition
7947 code register to the same value. There are other possible
7948 uses of the condition code register, but these are by far the
7949 most common and the ones which we are most likely to be able
7950 to optimize. */
7952 last_insn = BB_END (bb);
7953 if (GET_CODE (last_insn) != JUMP_INSN)
7954 continue;
7956 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7957 cc_reg = cc_reg_1;
7958 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7959 cc_reg = cc_reg_2;
7960 else
7961 continue;
7963 cc_src_insn = NULL_RTX;
7964 cc_src = NULL_RTX;
7965 for (insn = PREV_INSN (last_insn);
7966 insn && insn != PREV_INSN (BB_HEAD (bb));
7967 insn = PREV_INSN (insn))
7969 rtx set;
7971 if (! INSN_P (insn))
7972 continue;
7973 set = single_set (insn);
7974 if (set
7975 && GET_CODE (SET_DEST (set)) == REG
7976 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7978 cc_src_insn = insn;
7979 cc_src = SET_SRC (set);
7980 break;
7982 else if (reg_set_p (cc_reg, insn))
7983 break;
7986 if (! cc_src_insn)
7987 continue;
7989 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7990 continue;
7992 /* Now CC_REG is a condition code register used for a
7993 conditional jump at the end of the block, and CC_SRC, in
7994 CC_SRC_INSN, is the value to which that condition code
7995 register is set, and CC_SRC is still meaningful at the end of
7996 the basic block. */
7998 orig_mode = GET_MODE (cc_src);
7999 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
8000 if (mode != VOIDmode)
8002 if (mode != GET_MODE (cc_src))
8003 abort ();
8004 if (mode != orig_mode)
8006 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
8008 /* Change the mode of CC_REG in CC_SRC_INSN to
8009 GET_MODE (NEWREG). */
8010 for_each_rtx (&PATTERN (cc_src_insn), cse_change_cc_mode,
8011 newreg);
8012 for_each_rtx (&REG_NOTES (cc_src_insn), cse_change_cc_mode,
8013 newreg);
8015 /* Do the same in the following insns that use the
8016 current value of CC_REG within BB. */
8017 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
8018 NEXT_INSN (last_insn),
8019 newreg);