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This commit was manufactured by cvs2svn to create branch
[official-gcc.git] / gcc / config / i370 / i370.h
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1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GCC.
9
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27
28 /* Target CPU builtins. */
29 #define TARGET_CPU_CPP_BUILTINS() \
30 do \
31 { \
32 builtin_define_std ("GCC"); \
33 builtin_define_std ("gcc"); \
34 builtin_assert ("machine=i370"); \
35 builtin_assert ("cpu=i370"); \
36 } \
37 while (0)
38
39 /* Run-time compilation parameters selecting different hardware subsets. */
40
41 extern int target_flags;
42
43 /* The sizes of the code and literals on the current page. */
44
45 extern int mvs_page_code, mvs_page_lit;
46
47 /* The current page number and the base page number for the function. */
48
49 extern int mvs_page_num, function_base_page;
50
51 /* The name of the current function. */
52
53 extern char *mvs_function_name;
54
55 /* The length of the function name malloc'd area. */
56
57 extern size_t mvs_function_name_length;
58
59 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
60 these are more than twice as fast as load-op-store.
61 On 3090 don't use this since load-op-store is much faster. */
62
63 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
64
65 /* Default target switches */
66
67 #define TARGET_DEFAULT 1
68
69 /* Macro to define tables used to set the flags. This is a list in braces
70 of pairs in braces, each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
73
74 #define TARGET_SWITCHES \
75 { { "char-instructions", 1, N_("Generate char instructions")}, \
76 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
77 { "", TARGET_DEFAULT, 0} }
78
79 #define OVERRIDE_OPTIONS override_options ()
80
81 /* To use IBM supplied macro function prologue and epilogue, define the
82 following to 1. Should only be needed if IBM changes the definition
83 of their prologue and epilogue. */
84
85 #define MACROPROLOGUE 0
86 #define MACROEPILOGUE 0
87
88 /* Target machine storage layout */
89
90 /* Define this if most significant bit is lowest numbered in instructions
91 that operate on numbered bit-fields. */
92
93 #define BITS_BIG_ENDIAN 1
94
95 /* Define this if most significant byte of a word is the lowest numbered. */
96
97 #define BYTES_BIG_ENDIAN 1
98
99 /* Define this if MS word of a multiword is the lowest numbered. */
100
101 #define WORDS_BIG_ENDIAN 1
102
103 /* Width of a word, in units (bytes). */
104
105 #define UNITS_PER_WORD 4
106
107 /* Allocation boundary (in *bits*) for storing pointers in memory. */
108
109 #define POINTER_BOUNDARY 32
110
111 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
112
113 #define PARM_BOUNDARY 32
114
115 /* Boundary (in *bits*) on which stack pointer should be aligned. */
116
117 #define STACK_BOUNDARY 32
118
119 /* Allocation boundary (in *bits*) for the code of a function. */
120
121 #define FUNCTION_BOUNDARY 32
122
123 /* There is no point aligning anything to a rounder boundary than this. */
124
125 #define BIGGEST_ALIGNMENT 64
126
127 /* Alignment of field after `int : 0' in a structure. */
128
129 #define EMPTY_FIELD_BOUNDARY 32
130
131 /* Define this if move instructions will actually fail to work when given
132 unaligned data. */
133
134 #define STRICT_ALIGNMENT 0
135
136 /* Define target floating point format. */
137
138 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
139
140 #ifdef TARGET_HLASM
141 /* HLASM requires #pragma map. */
142 #define REGISTER_TARGET_PRAGMAS() c_register_pragma (0, "map", i370_pr_map)
143 #endif /* TARGET_HLASM */
144
145 /* Define maximum length of page minus page escape overhead. */
146
147 #define MAX_MVS_PAGE_LENGTH 4080
148
149 /* Define special register allocation order desired.
150 Don't fiddle with this. I did, and I got all sorts of register
151 spill errors when compiling even relatively simple programs...
152 I have no clue why ...
153 E.g. this one is bad:
154 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
155 */
156
157 #define REG_ALLOC_ORDER \
158 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
159
160 /* Standard register usage. */
161
162 /* Number of actual hardware registers. The hardware registers are
163 assigned numbers for the compiler from 0 to just below
164 FIRST_PSEUDO_REGISTER.
165 All registers that the compiler knows about must be given numbers,
166 even those that are not normally considered general registers.
167 For the 370, we give the data registers numbers 0-15,
168 and the floating point registers numbers 16-19. */
169
170 #define FIRST_PSEUDO_REGISTER 20
171
172 /* Define base and page registers. */
173
174 #define BASE_REGISTER 3
175 #define PAGE_REGISTER 4
176
177 #ifdef TARGET_HLASM
178 /* 1 for registers that have pervasive standard uses and are not available
179 for the register allocator. These are registers that must have fixed,
180 valid values stored in them for the entire length of the subroutine call,
181 and must not in any way be moved around, jiggered with, etc. That is,
182 they must never be clobbered, and, if clobbered, the register allocator
183 will never restore them back.
184
185 We use five registers in this special way:
186 -- R3 which is used as the base register
187 -- R4 the page origin table pointer used to load R3,
188 -- R11 the arg pointer.
189 -- R12 the TCA pointer
190 -- R13 the stack (DSA) pointer
191
192 A fifth register is also exceptional: R14 is used in many branch
193 instructions to hold the target of the branch. Technically, this
194 does not qualify R14 as a register with a long-term meaning; it should
195 be enough, theoretically, to note that these instructions clobber
196 R14, and let the compiler deal with that. In practice, however,
197 the "clobber" directive acts as a barrier to optimization, and the
198 optimizer appears to be unable to perform optimizations around branches.
199 Thus, a much better strategy appears to give R14 a pervasive use;
200 this eliminates it from the register pool witout hurting optimization.
201
202 There are other registers which have special meanings, but its OK
203 for them to get clobbered, since other allocator config below will
204 make sure that they always have the right value. These are for
205 example:
206 -- R1 the returned structure pointer.
207 -- R10 the static chain reg.
208 -- R15 holds the value a subroutine returns.
209
210 Notice that it is *almost* safe to mark R11 as available to the allocator.
211 By marking it as a call_used_register, in most cases, the compiler
212 can handle it being clobbered. However, there are a few rare
213 circumstances where the register allocator will allocate r11 and
214 also try to use it as the arg pointer ... thus it must be marked fixed.
215 I think this is a bug, but I can't track it down...
216 */
217
218 #define FIXED_REGISTERS \
219 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
220 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
221
222 /* 1 for registers not available across function calls. These must include
223 the FIXED_REGISTERS and also any registers that can be used without being
224 saved.
225 The latter must include the registers where values are returned
226 and the register where structure-value addresses are passed.
227 NOTE: all floating registers are undefined across calls.
228 */
229
230 #define CALL_USED_REGISTERS \
231 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
232 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
233
234 /* Return number of consecutive hard regs needed starting at reg REGNO
235 to hold something of mode MODE.
236 This is ordinarily the length in words of a value of mode MODE
237 but can be less for certain modes in special long registers.
238 Note that DCmode (complex double) needs two regs.
239 */
240 #endif /* TARGET_HLASM */
241
242 /* ================= */
243 #ifdef TARGET_ELF_ABI
244 /* The Linux/ELF ABI uses the same register layout as the
245 * the MVS/OE version, with the following exceptions:
246 * -- r12 (rtca) is not used.
247 */
248
249 #define FIXED_REGISTERS \
250 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
251 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
252
253 #define CALL_USED_REGISTERS \
254 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
255 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
256
257 #endif /* TARGET_ELF_ABI */
258 /* ================= */
259
260
261 #define HARD_REGNO_NREGS(REGNO, MODE) \
262 ((REGNO) > 15 ? \
263 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
264 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
265
266 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
267 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
268 even registers can hold DI. The floating point registers can hold
269 either SF, DF, SC or DC. */
270
271 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
272 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
273 (((MODE) != DImode) && ((MODE) != DFmode))) \
274 : ((MODE) == SFmode || (MODE) == DFmode) || \
275 (MODE) == SCmode || (MODE) == DCmode)
276
277 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
278 mode MODE1 and one has mode MODE2.
279 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
280 for any hard reg, then this must be 0 for correct output. */
281
282 #define MODES_TIEABLE_P(MODE1, MODE2) \
283 (((MODE1) == SFmode || (MODE1) == DFmode) \
284 == ((MODE2) == SFmode || (MODE2) == DFmode))
285
286 /* Specify the registers used for certain standard purposes.
287 The values of these macros are register numbers. */
288
289 /* 370 PC isn't overloaded on a register. */
290
291 /* #define PC_REGNUM */
292
293 /* Register to use for pushing function arguments. */
294
295 #define STACK_POINTER_REGNUM 13
296
297 /* Base register for access to local variables of the function. */
298
299 #define FRAME_POINTER_REGNUM 13
300
301 /* Value should be nonzero if functions must have frame pointers.
302 Zero means the frame pointer need not be set up (and parms may be
303 accessed via the stack pointer) in functions that seem suitable.
304 This is computed in `reload', in reload1.c. */
305
306 #define FRAME_POINTER_REQUIRED 1
307
308 /* Base register for access to arguments of the function. */
309
310 #define ARG_POINTER_REGNUM 11
311
312 /* R10 is register in which static-chain is passed to a function.
313 Static-chaining is done when a nested function references as a global
314 a stack variable of its parent: e.g.
315 int parent_func (int arg) {
316 int x; // x is in parents stack
317 void child_func (void) { x++: } // child references x as global var
318 ...
319 }
320 */
321
322 #define STATIC_CHAIN_REGNUM 10
323
324 /* R1 is register in which address to store a structure value is passed to
325 a function. This is used only when returning 64-bit long-long in a 32-bit arch
326 and when calling functions that return structs by value. e.g.
327 typedef struct A_s { int a,b,c; } A_t;
328 A_t fun_returns_value (void) {
329 A_t a; a.a=1; a.b=2 a.c=3;
330 return a;
331 }
332 In the above, the storage for the return value is in the callers stack, and
333 the R1 points at that mem location.
334 */
335
336 #define STRUCT_VALUE_REGNUM 1
337
338 /* Define the classes of registers for register constraints in the
339 machine description. Also define ranges of constants.
340
341 One of the classes must always be named ALL_REGS and include all hard regs.
342 If there is more than one class, another class must be named NO_REGS
343 and contain no registers.
344
345 The name GENERAL_REGS must be the name of a class (or an alias for
346 another name such as ALL_REGS). This is the class of registers
347 that is allowed by "g" or "r" in a register constraint.
348 Also, registers outside this class are allocated only when
349 instructions express preferences for them.
350
351 The classes must be numbered in nondecreasing order; that is,
352 a larger-numbered class must never be contained completely
353 in a smaller-numbered class.
354
355 For any two classes, it is very desirable that there be another
356 class that represents their union. */
357
358 enum reg_class
359 {
360 NO_REGS, ADDR_REGS, DATA_REGS,
361 FP_REGS, ALL_REGS, LIM_REG_CLASSES
362 };
363
364 #define GENERAL_REGS DATA_REGS
365 #define N_REG_CLASSES (int) LIM_REG_CLASSES
366
367 /* Give names of register classes as strings for dump file. */
368
369 #define REG_CLASS_NAMES \
370 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
371
372 /* Define which registers fit in which classes. This is an initializer for
373 a vector of HARD_REG_SET of length N_REG_CLASSES. */
374
375 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
376
377 /* The same information, inverted:
378 Return the class number of the smallest class containing
379 reg number REGNO. This could be a conditional expression
380 or could index an array. */
381
382 #define REGNO_REG_CLASS(REGNO) \
383 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
384
385 /* The class value for index registers, and the one for base regs. */
386
387 #define INDEX_REG_CLASS ADDR_REGS
388 #define BASE_REG_CLASS ADDR_REGS
389
390 /* Get reg_class from a letter such as appears in the machine description. */
391
392 #define REG_CLASS_FROM_LETTER(C) \
393 ((C) == 'a' ? ADDR_REGS : \
394 ((C) == 'd' ? DATA_REGS : \
395 ((C) == 'f' ? FP_REGS : NO_REGS)))
396
397 /* The letters I, J, K, L and M in a register constraint string can be used
398 to stand for particular ranges of immediate operands.
399 This macro defines what the ranges are.
400 C is the letter, and VALUE is a constant value.
401 Return 1 if VALUE is in the range specified by C. */
402
403 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
404 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
405 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
406 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
407
408 /* Similar, but for floating constants, and defining letters G and H.
409 Here VALUE is the CONST_DOUBLE rtx itself. */
410
411 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
412
413 /* see recog.c for details */
414 #define EXTRA_CONSTRAINT(OP,C) \
415 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
416 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
417
418 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
419 return the class of reg to actually use. In general this is just CLASS;
420 but on some machines in some cases it is preferable to use a more
421 restrictive class.
422
423 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
424 rare occasions when lots of egisters are spilled, reload() will try
425 to put a const int into r0 and then use r0 as an index register.
426 */
427
428 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
429 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
430 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
431 GET_CODE(X) == LABEL_REF || \
432 GET_CODE(X) == SYMBOL_REF || \
433 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
434
435 /* Return the maximum number of consecutive registers needed to represent
436 mode MODE in a register of class CLASS.
437 Note that DCmode (complex double) needs two regs.
438 */
439
440 #define CLASS_MAX_NREGS(CLASS, MODE) \
441 ((CLASS) == FP_REGS ? \
442 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
443 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
444
445 /* Stack layout; function entry, exit and calling. */
446
447 /* Define this if pushing a word on the stack makes the stack pointer a
448 smaller address. */
449 /* ------------------------------------------------------------------- */
450
451 /* ================= */
452 #ifdef TARGET_HLASM
453 /* #define STACK_GROWS_DOWNWARD */
454
455 /* Define this if the nominal address of the stack frame is at the
456 high-address end of the local variables; that is, each additional local
457 variable allocated goes at a more negative offset in the frame. */
458
459 /* #define FRAME_GROWS_DOWNWARD */
460
461 /* Offset within stack frame to start allocating local variables at.
462 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
463 first local allocated. Otherwise, it is the offset to the BEGINNING
464 of the first local allocated. */
465
466 #define STARTING_FRAME_OFFSET \
467 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
468
469 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
470
471 /* If we generate an insn to push BYTES bytes, this says how many the stack
472 pointer really advances by. On the 370, we have no push instruction. */
473
474 #endif /* TARGET_HLASM */
475
476 /* ================= */
477 #ifdef TARGET_ELF_ABI
478
479 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
480 But we want the compiler to generate posistive displacements from the
481 stack pointer, and so we make the frame lie above the stack. */
482
483 #define STACK_GROWS_DOWNWARD
484 /* #define FRAME_GROWS_DOWNWARD */
485
486 /* Offset within stack frame to start allocating local variables at.
487 This is the offset to the BEGINNING of the first local allocated. */
488
489 #define STARTING_FRAME_OFFSET \
490 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
491
492 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
493
494 #endif /* TARGET_ELF_ABI */
495 /* ================= */
496
497 /* #define PUSH_ROUNDING(BYTES) */
498
499 /* Accumulate the outgoing argument count so we can request the right
500 DSA size and determine stack offset. */
501
502 #define ACCUMULATE_OUTGOING_ARGS 1
503
504 /* Define offset from stack pointer, to location where a parm can be
505 pushed. */
506
507 #define STACK_POINTER_OFFSET 148
508
509 /* Offset of first parameter from the argument pointer register value. */
510
511 #define FIRST_PARM_OFFSET(FNDECL) 0
512
513 /* 1 if N is a possible register number for function argument passing.
514 On the 370, no registers are used in this way. */
515
516 #define FUNCTION_ARG_REGNO_P(N) 0
517
518 /* Define a data type for recording info about an argument list during
519 the scan of that argument list. This data type should hold all
520 necessary information about the function itself and about the args
521 processed so far, enough to enable macros such as FUNCTION_ARG to
522 determine where the next arg should go. */
523
524 #define CUMULATIVE_ARGS int
525
526 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
527 a function whose data type is FNTYPE.
528 For a library call, FNTYPE is 0. */
529
530 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
531 ((CUM) = 0)
532
533 /* Update the data in CUM to advance over an argument of mode MODE and
534 data type TYPE. (TYPE is null for libcalls where that information
535 may not be available.) */
536
537 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
538 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
539 ? 256 \
540 : (MODE) != BLKmode \
541 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
542 : (int_size_in_bytes (TYPE) + 3) / 4))
543
544 /* Define where to put the arguments to a function. Value is zero to push
545 the argument on the stack, or a hard register in which to store the
546 argument. */
547
548 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
549
550 /* For an arg passed partly in registers and partly in memory, this is the
551 number of registers used. For args passed entirely in registers or
552 entirely in memory, zero. */
553
554 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
555
556 /* Define if returning from a function call automatically pops the
557 arguments described by the number-of-args field in the call. */
558
559 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
560
561 /* The FUNCTION_VALUE macro defines how to find the value returned by a
562 function. VALTYPE is the data type of the value (as a tree).
563 If the precise function being called is known, FUNC is its FUNCTION_DECL;
564 otherwise, FUNC is NULL.
565
566 On the 370 the return value is in R15 or R16. However,
567 DImode (64-bit ints) scalars need to get returned on the stack,
568 with r15 pointing to the location. To accomplish this, we define
569 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
570 and the DImode scalars.
571 */
572
573 #define RET_REG(MODE) \
574 (((MODE) == DCmode || (MODE) == SCmode \
575 || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
576
577 #define FUNCTION_VALUE(VALTYPE, FUNC) \
578 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
579
580 #define RETURN_IN_MEMORY(VALTYPE) \
581 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
582
583 /* Define how to find the value returned by a library function assuming
584 the value has mode MODE. */
585
586 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
587
588 /* 1 if N is a possible register number for a function value.
589 On the 370 under C/370, R15 and R16 are thus used. */
590
591 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
592
593 /* This macro definition sets up a default value for `main' to return. */
594
595 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
596
597
598 /* Output assembler code for a block containing the constant parts of a
599 trampoline, leaving space for the variable parts.
600
601 On the 370, the trampoline contains these instructions:
602
603 BALR 14,0
604 USING *,14
605 L STATIC_CHAIN_REGISTER,X
606 L 15,Y
607 BR 15
608 X DS 0F
609 Y DS 0F */
610 /*
611 I am confused as to why this emitting raw binary, instead of instructions ...
612 see for example, rs6000/rs000.c for an example of a different way to
613 do this ... especially since BASR should probably be substituted for BALR.
614 */
615
616 #define TRAMPOLINE_TEMPLATE(FILE) \
617 { \
618 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
619 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
620 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
621 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
622 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
623 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
624 assemble_aligned_integer (2, const0_rtx); \
625 assemble_aligned_integer (2, const0_rtx); \
626 assemble_aligned_integer (2, const0_rtx); \
627 assemble_aligned_integer (2, const0_rtx); \
628 }
629
630 /* Length in units of the trampoline for entering a nested function. */
631
632 #define TRAMPOLINE_SIZE 20
633
634 /* Emit RTL insns to initialize the variable parts of a trampoline. */
635
636 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
637 { \
638 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
639 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
640 }
641
642 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
643 pointer does not matter (provided there is a frame pointer). */
644
645 #define EXIT_IGNORE_STACK 1
646
647 /* Addressing modes, and classification of registers for them. */
648
649 /* These assume that REGNO is a hard or pseudo reg number. They give
650 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
651 reg currently allocated to a suitable hard reg.
652 These definitions are NOT overridden anywhere. */
653
654 #define REGNO_OK_FOR_INDEX_P(REGNO) \
655 (((REGNO) > 0 && (REGNO) < 16) \
656 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
657
658 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
659
660 #define REGNO_OK_FOR_DATA_P(REGNO) \
661 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
662
663 #define REGNO_OK_FOR_FP_P(REGNO) \
664 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
665
666 /* Now macros that check whether X is a register and also,
667 strictly, whether it is in a specified class. */
668
669 /* 1 if X is a data register. */
670
671 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
672
673 /* 1 if X is an fp register. */
674
675 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
676
677 /* 1 if X is an address register. */
678
679 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
680
681 /* Maximum number of registers that can appear in a valid memory address. */
682
683 #define MAX_REGS_PER_ADDRESS 2
684
685 /* Recognize any constant value that is a valid address. */
686
687 #define CONSTANT_ADDRESS_P(X) \
688 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
689 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
690 || (GET_CODE (X) == CONST \
691 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
692 || (GET_CODE (X) == CONST \
693 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
694 && !SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (X, 0), 0))))
695
696 /* Nonzero if the constant value X is a legitimate general operand.
697 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
698
699 #define LEGITIMATE_CONSTANT_P(X) 1
700
701 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
702 its validity for a certain class. We have two alternate definitions
703 for each of them. The usual definition accepts all pseudo regs; the
704 other rejects them all. The symbol REG_OK_STRICT causes the latter
705 definition to be used.
706
707 Most source files want to accept pseudo regs in the hope that they will
708 get allocated to the class that the insn wants them to be in.
709 Some source files that are used after register allocation
710 need to be strict. */
711
712 #ifndef REG_OK_STRICT
713
714 /* Nonzero if X is a hard reg that can be used as an index or if it is
715 a pseudo reg. */
716
717 #define REG_OK_FOR_INDEX_P(X) \
718 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
719
720 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
721 a pseudo reg. */
722
723 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
724
725 #else /* REG_OK_STRICT */
726
727 /* Nonzero if X is a hard reg that can be used as an index. */
728
729 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
730
731 /* Nonzero if X is a hard reg that can be used as a base reg. */
732
733 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
734
735 #endif /* REG_OK_STRICT */
736
737 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
738 valid memory address for an instruction.
739 The MODE argument is the machine mode for the MEM expression
740 that wants to use this address.
741
742 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
743 except for CONSTANT_ADDRESS_P which is actually machine-independent.
744 */
745
746 #define COUNT_REGS(X, REGS, FAIL) \
747 if (REG_P (X)) { \
748 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
749 else goto FAIL; \
750 } \
751 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
752 goto FAIL;
753
754 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
755 { \
756 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
757 goto ADDR; \
758 if (GET_CODE (X) == PLUS) \
759 { \
760 int regs = 0; \
761 rtx x0 = XEXP (X, 0); \
762 rtx x1 = XEXP (X, 1); \
763 if (GET_CODE (x0) == PLUS) \
764 { \
765 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
766 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
767 COUNT_REGS (x1, regs, FAIL); \
768 if (regs == 2) \
769 goto ADDR; \
770 } \
771 else if (GET_CODE (x1) == PLUS) \
772 { \
773 COUNT_REGS (x0, regs, FAIL); \
774 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
775 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
776 if (regs == 2) \
777 goto ADDR; \
778 } \
779 else \
780 { \
781 COUNT_REGS (x0, regs, FAIL); \
782 COUNT_REGS (x1, regs, FAIL); \
783 if (regs != 0) \
784 goto ADDR; \
785 } \
786 } \
787 FAIL: ; \
788 }
789
790 /* The 370 has no mode dependent addresses. */
791
792 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
793
794 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
795 Try machine-dependent ways of modifying an illegitimate address
796 to be legitimate. If we find one, return the new, valid address.
797 This macro is used in only one place: `memory_address' in explow.c.
798
799 Several comments:
800 (1) It's not obvious that this macro results in better code
801 than its omission does. For historical reasons we leave it in.
802
803 (2) This macro may be (???) implicated in the accidental promotion
804 or RS operand to RX operands, which bombs out any RS, SI, SS
805 instruction that was expecting a simple address. Note that
806 this occurs fairly rarely ...
807
808 (3) There is a bug somewhere that causes either r4 to be spilled,
809 or causes r0 to be used as a base register. Changeing the macro
810 below will make the bug move around, but will not make it go away
811 ... Note that this is a rare bug ...
812
813 */
814
815 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
816 { \
817 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
818 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
819 copy_to_mode_reg (SImode, XEXP (X, 1))); \
820 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
821 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
822 copy_to_mode_reg (SImode, XEXP (X, 0))); \
823 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
824 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
825 force_operand (XEXP (X, 0), 0)); \
826 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
827 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
828 force_operand (XEXP (X, 1), 0)); \
829 if (memory_address_p (MODE, X)) \
830 goto WIN; \
831 }
832
833 /* Specify the machine mode that this machine uses for the index in the
834 tablejump instruction. */
835
836 #define CASE_VECTOR_MODE SImode
837
838 /* Define this if the tablejump instruction expects the table to contain
839 offsets from the address of the table.
840 Do not define this if the table should contain absolute addresses. */
841
842 /* #define CASE_VECTOR_PC_RELATIVE */
843
844 /* Define this if fixuns_trunc is the same as fix_trunc. */
845
846 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
847
848 /* We use "unsigned char" as default. */
849
850 #define DEFAULT_SIGNED_CHAR 0
851
852 /* Max number of bytes we can move from memory to memory in one reasonably
853 fast instruction. */
854
855 #define MOVE_MAX 256
856
857 /* Nonzero if access to memory by bytes is slow and undesirable. */
858
859 #define SLOW_BYTE_ACCESS 1
860
861 /* Define if shifts truncate the shift count which implies one can omit
862 a sign-extension or zero-extension of a shift count. */
863
864 /* #define SHIFT_COUNT_TRUNCATED */
865
866 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
867 is done just by pretending it is already truncated. */
868
869 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
870
871 /* ??? Investigate defining STORE_FLAG_VALUE to (-1). */
872
873 /* When a prototype says `char' or `short', really pass an `int'. */
874
875 #define PROMOTE_PROTOTYPES 1
876
877 /* Don't perform CSE on function addresses. */
878
879 #define NO_FUNCTION_CSE
880
881 /* Specify the machine mode that pointers have.
882 After generation of rtl, the compiler makes no further distinction
883 between pointers and any other objects of this machine mode. */
884
885 #define Pmode SImode
886
887 /* A function address in a call instruction is a byte address (for
888 indexing purposes) so give the MEM rtx a byte's mode. */
889
890 #define FUNCTION_MODE QImode
891
892 /* A C statement (sans semicolon) to update the integer variable COST
893 based on the relationship between INSN that is dependent on
894 DEP_INSN through the dependence LINK. The default is to make no
895 adjustment to COST. This can be used for example to specify to
896 the scheduler that an output- or anti-dependence does not incur
897 the same cost as a data-dependence.
898
899 We will want to use this to indicate that there is a cost associated
900 with the loading, followed by use of base registers ...
901 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
902 */
903
904 /* Tell final.c how to eliminate redundant test instructions. */
905
906 /* Here we define machine-dependent flags and fields in cc_status
907 (see `conditions.h'). */
908
909 /* Store in cc_status the expressions that the condition codes will
910 describe after execution of an instruction whose pattern is EXP.
911 Do not alter them if the instruction would not alter the cc's.
912
913 On the 370, load insns do not alter the cc's. However, in some
914 cases these instructions can make it possibly invalid to use the
915 saved cc's. In those cases we clear out some or all of the saved
916 cc's so they won't be used.
917
918 Note that only some arith instructions set the CC. These include
919 add, subtract, complement, various shifts. Note that multiply
920 and divide do *not* set set the CC. Therefore, in the code below,
921 don't set the status for MUL, DIV, etc.
922
923 Note that the bitwise ops set the condition code, but not in a
924 way that we can make use of it. So we treat these as clobbering,
925 rather than setting the CC. These are clobbered in the individual
926 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
927 */
928
929 #define NOTICE_UPDATE_CC(EXP, INSN) \
930 { \
931 rtx exp = (EXP); \
932 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
933 exp = XVECEXP (exp, 0, 0); \
934 if (GET_CODE (exp) != SET) \
935 CC_STATUS_INIT; \
936 else \
937 { \
938 if (XEXP (exp, 0) == cc0_rtx) \
939 { \
940 cc_status.value1 = XEXP (exp, 0); \
941 cc_status.value2 = XEXP (exp, 1); \
942 cc_status.flags = 0; \
943 } \
944 else \
945 { \
946 if (cc_status.value1 \
947 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
948 cc_status.value1 = 0; \
949 if (cc_status.value2 \
950 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
951 cc_status.value2 = 0; \
952 switch (GET_CODE (XEXP (exp, 1))) \
953 { \
954 case PLUS: case MINUS: case NEG: \
955 case NOT: case ABS: \
956 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
957 \
958 /* mult and div don't set any cc codes !! */ \
959 case MULT: /* case UMULT: */ case DIV: case UDIV: \
960 /* and, or and xor set the cc's the wrong way !! */ \
961 case AND: case IOR: case XOR: \
962 /* some shifts set the CC some don't. */ \
963 case ASHIFT: case ASHIFTRT: \
964 do {} while (0); \
965 default: \
966 break; \
967 } \
968 } \
969 } \
970 }
971
972
973 #define CC_STATUS_SET(V1, V2) \
974 { \
975 cc_status.flags = 0; \
976 cc_status.value1 = (V1); \
977 cc_status.value2 = (V2); \
978 if (cc_status.value1 \
979 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
980 cc_status.value2 = 0; \
981 }
982
983 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
984 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
985
986 /* ------------------------------------------ */
987 /* Control the assembler format that we output. */
988
989 /* Define standard character escape sequences for non-ASCII targets
990 only. */
991
992 #ifdef TARGET_EBCDIC
993 #define TARGET_ESC 39
994 #define TARGET_BELL 47
995 #define TARGET_BS 22
996 #define TARGET_TAB 5
997 #define TARGET_NEWLINE 21
998 #define TARGET_VT 11
999 #define TARGET_FF 12
1000 #define TARGET_CR 13
1001 #endif
1002
1003 /* ======================================================== */
1004
1005 #ifdef TARGET_HLASM
1006 #define TEXT_SECTION_ASM_OP "* Program text area"
1007 #define DATA_SECTION_ASM_OP "* Program data area"
1008 #define INIT_SECTION_ASM_OP "* Program initialization area"
1009 #define SHARED_SECTION_ASM_OP "* Program shared data"
1010 #define CTOR_LIST_BEGIN /* NO OP */
1011 #define CTOR_LIST_END /* NO OP */
1012 #define MAX_MVS_LABEL_SIZE 8
1013
1014 /* How to refer to registers in assembler output. This sequence is
1015 indexed by compiler's hard-register-number (see above). */
1016
1017 #define REGISTER_NAMES \
1018 { "0", "1", "2", "3", "4", "5", "6", "7", \
1019 "8", "9", "10", "11", "12", "13", "14", "15", \
1020 "0", "2", "4", "6" \
1021 }
1022
1023 #define ASM_COMMENT_START "*"
1024 #define ASM_APP_OFF ""
1025 #define ASM_APP_ON ""
1026
1027 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1028 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1029
1030 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1031 { \
1032 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1033 if (mvs_check_alias (NAME, temp) == 2) \
1034 { \
1035 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1036 } \
1037 }
1038
1039 /* MVS externals are limited to 8 characters, upper case only.
1040 The '_' is mapped to '@', except for MVS functions, then '#'. */
1041
1042
1043 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1044 { \
1045 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1046 if (!mvs_get_alias (NAME, temp)) \
1047 strcpy (temp, NAME); \
1048 if (!strcmp (temp,"main")) \
1049 strcpy (temp,"gccmain"); \
1050 if (mvs_function_check (temp)) \
1051 ch = '#'; \
1052 else \
1053 ch = '@'; \
1054 for (bp = temp; *bp; bp++) \
1055 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1056 fprintf (FILE, "%s", temp); \
1057 }
1058
1059 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1060 sprintf (LABEL, "*%s%lu", PREFIX, (unsigned long)(NUM))
1061
1062 /* Generate case label. For HLASM we can change to the data CSECT
1063 and put the vectors out of the code body. The assembler just
1064 concatenates CSECTs with the same name. */
1065
1066 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1067 fprintf (FILE, "\tDS\t0F\n"); \
1068 fprintf (FILE,"\tCSECT\n"); \
1069 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1070
1071 /* Put the CSECT back to the code body */
1072
1073 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1074 assemble_name (FILE, mvs_function_name); \
1075 fputs ("\tCSECT\n", FILE);
1076
1077 /* This is how to output an element of a case-vector that is absolute. */
1078
1079 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1080 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1081
1082 /* This is how to output an element of a case-vector that is relative. */
1083
1084 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1085 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1086
1087 /* This is how to output an insn to push a register on the stack.
1088 It need not be very fast code.
1089 Right now, PUSH & POP are used only when profiling is enabled,
1090 and then, only to push the static chain reg and the function struct
1091 value reg, and only if those are used. Since profiling is not
1092 supported anyway, punt on this. */
1093
1094 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1095 mvs_check_page (FILE, 8, 4); \
1096 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1097 reg_names[REGNO], STACK_POINTER_OFFSET)
1098
1099 /* This is how to output an insn to pop a register from the stack.
1100 It need not be very fast code. */
1101
1102 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1103 mvs_check_page (FILE, 8, 0); \
1104 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1105 reg_names[REGNO], STACK_POINTER_OFFSET)
1106
1107 /* This outputs a text string. The string are chopped up to fit into
1108 an 80 byte record. Also, control and special characters, interpreted
1109 by the IBM assembler, are output numerically. */
1110
1111 #define MVS_ASCII_TEXT_LENGTH 48
1112
1113 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1114 { \
1115 size_t i, limit = (LEN); \
1116 int j; \
1117 for (j = 0, i = 0; i < limit; j++, i++) \
1118 { \
1119 int c = (PTR)[i]; \
1120 if (ISCNTRL (c) || c == '&') \
1121 { \
1122 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1123 fprintf (FILE, "'\n"); \
1124 j = -1; \
1125 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1126 } \
1127 else \
1128 { \
1129 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1130 fprintf (FILE, "\tDC\tC'"); \
1131 if ( c == '\'' ) \
1132 fprintf (FILE, "%c%c", c, c); \
1133 else \
1134 fprintf (FILE, "%c", c); \
1135 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1136 fprintf (FILE, "'\n" ); \
1137 } \
1138 } \
1139 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1140 fprintf (FILE, "'\n"); \
1141 }
1142
1143 /* This is how to output an assembler line that says to advance the
1144 location counter to a multiple of 2**LOG bytes. */
1145
1146 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1147 if (LOG) \
1148 { \
1149 if ((LOG) == 1) \
1150 fprintf (FILE, "\tDS\t0H\n" ); \
1151 else \
1152 fprintf (FILE, "\tDS\t0F\n" ); \
1153 } \
1154
1155 /* The maximum length of memory that the IBM assembler will allow in one
1156 DS operation. */
1157
1158 #define MAX_CHUNK 32767
1159
1160 /* A C statement to output to the stdio stream FILE an assembler
1161 instruction to advance the location counter by SIZE bytes. Those
1162 bytes should be zero when loaded. */
1163
1164 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1165 { \
1166 unsigned HOST_WIDE_INT s; \
1167 int k; \
1168 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1169 { \
1170 if (s > MAX_CHUNK) \
1171 k = MAX_CHUNK; \
1172 else \
1173 k = s; \
1174 fprintf (FILE, "\tDS\tXL%d\n", k); \
1175 } \
1176 }
1177
1178 /* A C statement (sans semicolon) to output to the stdio stream
1179 FILE the assembler definition of a common-label named NAME whose
1180 size is SIZE bytes. The variable ROUNDED is the size rounded up
1181 to whatever alignment the caller wants. */
1182
1183 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1184 { \
1185 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1186 if (mvs_check_alias(NAME, temp) == 2) \
1187 { \
1188 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1189 } \
1190 fputs ("\tENTRY\t", FILE); \
1191 assemble_name (FILE, NAME); \
1192 fputs ("\n", FILE); \
1193 fprintf (FILE, "\tDS\t0F\n"); \
1194 ASM_OUTPUT_LABEL (FILE,NAME); \
1195 ASM_OUTPUT_SKIP (FILE,SIZE); \
1196 }
1197
1198 /* A C statement (sans semicolon) to output to the stdio stream
1199 FILE the assembler definition of a local-common-label named NAME
1200 whose size is SIZE bytes. The variable ROUNDED is the size
1201 rounded up to whatever alignment the caller wants. */
1202
1203 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1204 { \
1205 fprintf (FILE, "\tDS\t0F\n"); \
1206 ASM_OUTPUT_LABEL (FILE,NAME); \
1207 ASM_OUTPUT_SKIP (FILE,SIZE); \
1208 }
1209
1210 #define ASM_PN_FORMAT "%s%lu"
1211
1212 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1213 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1214 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1215
1216 #define PRINT_OPERAND(FILE, XV, CODE) \
1217 { \
1218 switch (GET_CODE (XV)) \
1219 { \
1220 static char curreg[4]; \
1221 case REG: \
1222 if (CODE == 'N') \
1223 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1224 else \
1225 strcpy (curreg, reg_names[REGNO (XV)]); \
1226 fprintf (FILE, "%s", curreg); \
1227 break; \
1228 case MEM: \
1229 { \
1230 rtx addr = XEXP (XV, 0); \
1231 if (CODE == 'O') \
1232 { \
1233 if (GET_CODE (addr) == PLUS) \
1234 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1235 else \
1236 fprintf (FILE, "0"); \
1237 } \
1238 else if (CODE == 'R') \
1239 { \
1240 if (GET_CODE (addr) == PLUS) \
1241 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1242 else \
1243 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1244 } \
1245 else \
1246 output_address (XEXP (XV, 0)); \
1247 } \
1248 break; \
1249 case SYMBOL_REF: \
1250 case LABEL_REF: \
1251 mvs_page_lit += 4; \
1252 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1253 else fprintf (FILE, "=A("); \
1254 output_addr_const (FILE, XV); \
1255 fprintf (FILE, ")"); \
1256 break; \
1257 case CONST_INT: \
1258 if (CODE == 'B') \
1259 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1260 else if (CODE == 'X') \
1261 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1262 else if (CODE == 'h') \
1263 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1264 else if (CODE == 'H') \
1265 { \
1266 mvs_page_lit += 2; \
1267 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1268 } \
1269 else if (CODE == 'K') \
1270 { \
1271 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1272 mvs_page_lit += 4; \
1273 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1274 } \
1275 else if (CODE == 'W') \
1276 { \
1277 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1278 mvs_page_lit += 8; \
1279 if (0 <= INTVAL (XV)) { \
1280 fprintf (FILE, "=XL8'00000000"); \
1281 } else { \
1282 fprintf (FILE, "=XL8'FFFFFFFF"); \
1283 } \
1284 fprintf (FILE, "%08X'", INTVAL (XV)); \
1285 } \
1286 else \
1287 { \
1288 mvs_page_lit += 4; \
1289 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1290 } \
1291 break; \
1292 case CONST_DOUBLE: \
1293 if (GET_MODE (XV) == DImode) \
1294 { \
1295 if (CODE == 'M') \
1296 { \
1297 mvs_page_lit += 4; \
1298 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1299 } \
1300 else if (CODE == 'L') \
1301 { \
1302 mvs_page_lit += 4; \
1303 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1304 } \
1305 else \
1306 { \
1307 mvs_page_lit += 8; \
1308 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1309 CONST_DOUBLE_HIGH (XV)); \
1310 } \
1311 } \
1312 else \
1313 { \
1314 char buf[50]; \
1315 if (GET_MODE (XV) == SFmode) \
1316 { \
1317 mvs_page_lit += 4; \
1318 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1319 sizeof (buf), 0, 1); \
1320 fprintf (FILE, "=E'%s'", buf); \
1321 } \
1322 else if (GET_MODE (XV) == DFmode) \
1323 { \
1324 mvs_page_lit += 8; \
1325 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1326 sizeof (buf), 0, 1); \
1327 fprintf (FILE, "=D'%s'", buf); \
1328 } \
1329 else /* VOIDmode */ \
1330 { \
1331 mvs_page_lit += 8; \
1332 fprintf (FILE, "=XL8'%08X%08X'", \
1333 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1334 } \
1335 } \
1336 break; \
1337 case CONST: \
1338 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1339 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1340 { \
1341 mvs_page_lit += 4; \
1342 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1343 { \
1344 fprintf (FILE, "=V("); \
1345 ASM_OUTPUT_LABELREF (FILE, \
1346 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1347 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1348 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1349 } \
1350 else \
1351 { \
1352 fprintf (FILE, "=A("); \
1353 output_addr_const (FILE, XV); \
1354 fprintf (FILE, ")"); \
1355 } \
1356 } \
1357 else \
1358 { \
1359 mvs_page_lit += 4; \
1360 fprintf (FILE, "=F'"); \
1361 output_addr_const (FILE, XV); \
1362 fprintf (FILE, "'"); \
1363 } \
1364 break; \
1365 default: \
1366 abort(); \
1367 } \
1368 }
1369
1370 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1371 { \
1372 rtx breg, xreg, offset, plus; \
1373 \
1374 switch (GET_CODE (ADDR)) \
1375 { \
1376 case REG: \
1377 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1378 break; \
1379 case PLUS: \
1380 breg = 0; \
1381 xreg = 0; \
1382 offset = 0; \
1383 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1384 { \
1385 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1386 breg = XEXP (ADDR, 1); \
1387 else \
1388 offset = XEXP (ADDR, 1); \
1389 plus = XEXP (ADDR, 0); \
1390 } \
1391 else \
1392 { \
1393 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1394 breg = XEXP (ADDR, 0); \
1395 else \
1396 offset = XEXP (ADDR, 0); \
1397 plus = XEXP (ADDR, 1); \
1398 } \
1399 if (GET_CODE (plus) == PLUS) \
1400 { \
1401 if (GET_CODE (XEXP (plus, 0)) == REG) \
1402 { \
1403 if (breg) \
1404 xreg = XEXP (plus, 0); \
1405 else \
1406 breg = XEXP (plus, 0); \
1407 } \
1408 else \
1409 { \
1410 offset = XEXP (plus, 0); \
1411 } \
1412 if (GET_CODE (XEXP (plus, 1)) == REG) \
1413 { \
1414 if (breg) \
1415 xreg = XEXP (plus, 1); \
1416 else \
1417 breg = XEXP (plus, 1); \
1418 } \
1419 else \
1420 { \
1421 offset = XEXP (plus, 1); \
1422 } \
1423 } \
1424 else if (GET_CODE (plus) == REG) \
1425 { \
1426 if (breg) \
1427 xreg = plus; \
1428 else \
1429 breg = plus; \
1430 } \
1431 else \
1432 { \
1433 offset = plus; \
1434 } \
1435 if (offset) \
1436 { \
1437 if (GET_CODE (offset) == LABEL_REF) \
1438 fprintf (FILE, "L%d", \
1439 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1440 else \
1441 output_addr_const (FILE, offset); \
1442 } \
1443 else \
1444 fprintf (FILE, "0"); \
1445 if (xreg) \
1446 fprintf (FILE, "(%s,%s)", \
1447 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1448 else \
1449 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1450 break; \
1451 default: \
1452 mvs_page_lit += 4; \
1453 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1454 else fprintf (FILE, "=A("); \
1455 output_addr_const (FILE, ADDR); \
1456 fprintf (FILE, ")"); \
1457 break; \
1458 } \
1459 }
1460
1461 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1462 { \
1463 if (strlen (NAME) + 1 > mvs_function_name_length) \
1464 { \
1465 if (mvs_function_name) \
1466 free (mvs_function_name); \
1467 mvs_function_name = 0; \
1468 } \
1469 if (!mvs_function_name) \
1470 { \
1471 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1472 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1473 } \
1474 if (!strcmp (NAME, "main")) \
1475 strcpy (mvs_function_name, "gccmain"); \
1476 else \
1477 strcpy (mvs_function_name, NAME); \
1478 fprintf (FILE, "\tDS\t0F\n"); \
1479 assemble_name (FILE, mvs_function_name); \
1480 fputs ("\tRMODE\tANY\n", FILE); \
1481 assemble_name (FILE, mvs_function_name); \
1482 fputs ("\tCSECT\n", FILE); \
1483 }
1484
1485 /* Output assembler code to FILE to increment profiler label # LABELNO
1486 for profiling a function entry. */
1487
1488 #define FUNCTION_PROFILER(FILE, LABELNO) \
1489 fprintf (FILE, "Error: No profiling available.\n")
1490
1491 #endif /* TARGET_HLASM */
1492
1493 /* ======================================================== */
1494
1495 #ifdef TARGET_ELF_ABI
1496
1497 /* How to refer to registers in assembler output. This sequence is
1498 indexed by compiler's hard-register-number (see above). */
1499
1500 #define REGISTER_NAMES \
1501 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1502 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1503 "f0", "f2", "f4", "f6" \
1504 }
1505
1506 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1507 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1508 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1509
1510 #define PRINT_OPERAND(FILE, XV, CODE) \
1511 { \
1512 switch (GET_CODE (XV)) \
1513 { \
1514 static char curreg[4]; \
1515 case REG: \
1516 if (CODE == 'N') \
1517 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1518 else \
1519 strcpy (curreg, reg_names[REGNO (XV)]); \
1520 fprintf (FILE, "%s", curreg); \
1521 break; \
1522 case MEM: \
1523 { \
1524 rtx addr = XEXP (XV, 0); \
1525 if (CODE == 'O') \
1526 { \
1527 if (GET_CODE (addr) == PLUS) \
1528 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1529 else \
1530 fprintf (FILE, "0"); \
1531 } \
1532 else if (CODE == 'R') \
1533 { \
1534 if (GET_CODE (addr) == PLUS) \
1535 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1536 else \
1537 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1538 } \
1539 else \
1540 output_address (XEXP (XV, 0)); \
1541 } \
1542 break; \
1543 case SYMBOL_REF: \
1544 case LABEL_REF: \
1545 mvs_page_lit += 4; \
1546 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1547 else fprintf (FILE, "=A("); \
1548 output_addr_const (FILE, XV); \
1549 fprintf (FILE, ")"); \
1550 break; \
1551 case CONST_INT: \
1552 if (CODE == 'B') \
1553 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1554 else if (CODE == 'X') \
1555 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1556 else if (CODE == 'h') \
1557 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1558 else if (CODE == 'H') \
1559 { \
1560 mvs_page_lit += 2; \
1561 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", \
1562 (INTVAL (XV) << 16) >> 16); \
1563 } \
1564 else if (CODE == 'K') \
1565 { \
1566 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1567 mvs_page_lit += 4; \
1568 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1569 (INTVAL (XV) << 16) >> 16); \
1570 } \
1571 else if (CODE == 'W') \
1572 { \
1573 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1574 mvs_page_lit += 8; \
1575 if (0 <= INTVAL (XV)) { \
1576 fprintf (FILE, "=XL8'00000000"); \
1577 } else { \
1578 fprintf (FILE, "=XL8'FFFFFFFF"); \
1579 } \
1580 fprintf (FILE, "%08X'", INTVAL (XV)); \
1581 } \
1582 else \
1583 { \
1584 mvs_page_lit += 4; \
1585 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1586 } \
1587 break; \
1588 case CONST_DOUBLE: \
1589 if (GET_MODE (XV) == DImode) \
1590 { \
1591 if (CODE == 'M') \
1592 { \
1593 mvs_page_lit += 4; \
1594 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1595 } \
1596 else if (CODE == 'L') \
1597 { \
1598 mvs_page_lit += 4; \
1599 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1600 } \
1601 else \
1602 { \
1603 mvs_page_lit += 8; \
1604 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1605 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1606 } \
1607 } \
1608 else \
1609 { \
1610 char buf[50]; \
1611 if (GET_MODE (XV) == SFmode) \
1612 { \
1613 mvs_page_lit += 4; \
1614 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1615 sizeof (buf), 0, 1); \
1616 fprintf (FILE, "=E'%s'", buf); \
1617 } \
1618 else if (GET_MODE (XV) == DFmode) \
1619 { \
1620 mvs_page_lit += 8; \
1621 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1622 sizeof (buf), 0, 1); \
1623 fprintf (FILE, "=D'%s'", buf); \
1624 } \
1625 else /* VOIDmode */ \
1626 { \
1627 mvs_page_lit += 8; \
1628 fprintf (FILE, "=XL8'%08X%08X'", \
1629 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1630 } \
1631 } \
1632 break; \
1633 case CONST: \
1634 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1635 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1636 { \
1637 mvs_page_lit += 4; \
1638 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1639 { \
1640 fprintf (FILE, "=V("); \
1641 ASM_OUTPUT_LABELREF (FILE, \
1642 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1643 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1644 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1645 } \
1646 else \
1647 { \
1648 fprintf (FILE, "=A("); \
1649 output_addr_const (FILE, XV); \
1650 fprintf (FILE, ")"); \
1651 } \
1652 } \
1653 else \
1654 { \
1655 mvs_page_lit += 4; \
1656 fprintf (FILE, "=bogus_bad_F'"); \
1657 output_addr_const (FILE, XV); \
1658 fprintf (FILE, "'"); \
1659 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1660 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1661 debug_rtx (XV); \
1662 abort(); \
1663 } \
1664 break; \
1665 default: \
1666 abort(); \
1667 } \
1668 }
1669
1670 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1671 { \
1672 rtx breg, xreg, offset, plus; \
1673 \
1674 switch (GET_CODE (ADDR)) \
1675 { \
1676 case REG: \
1677 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1678 break; \
1679 case PLUS: \
1680 breg = 0; \
1681 xreg = 0; \
1682 offset = 0; \
1683 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1684 { \
1685 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1686 breg = XEXP (ADDR, 1); \
1687 else \
1688 offset = XEXP (ADDR, 1); \
1689 plus = XEXP (ADDR, 0); \
1690 } \
1691 else \
1692 { \
1693 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1694 breg = XEXP (ADDR, 0); \
1695 else \
1696 offset = XEXP (ADDR, 0); \
1697 plus = XEXP (ADDR, 1); \
1698 } \
1699 if (GET_CODE (plus) == PLUS) \
1700 { \
1701 if (GET_CODE (XEXP (plus, 0)) == REG) \
1702 { \
1703 if (breg) \
1704 xreg = XEXP (plus, 0); \
1705 else \
1706 breg = XEXP (plus, 0); \
1707 } \
1708 else \
1709 { \
1710 offset = XEXP (plus, 0); \
1711 } \
1712 if (GET_CODE (XEXP (plus, 1)) == REG) \
1713 { \
1714 if (breg) \
1715 xreg = XEXP (plus, 1); \
1716 else \
1717 breg = XEXP (plus, 1); \
1718 } \
1719 else \
1720 { \
1721 offset = XEXP (plus, 1); \
1722 } \
1723 } \
1724 else if (GET_CODE (plus) == REG) \
1725 { \
1726 if (breg) \
1727 xreg = plus; \
1728 else \
1729 breg = plus; \
1730 } \
1731 else \
1732 { \
1733 offset = plus; \
1734 } \
1735 if (offset) \
1736 { \
1737 if (GET_CODE (offset) == LABEL_REF) \
1738 fprintf (FILE, "L%d", \
1739 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1740 else \
1741 output_addr_const (FILE, offset); \
1742 } \
1743 else \
1744 fprintf (FILE, "0"); \
1745 if (xreg) \
1746 fprintf (FILE, "(%s,%s)", \
1747 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1748 else \
1749 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1750 break; \
1751 default: \
1752 mvs_page_lit += 4; \
1753 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1754 else fprintf (FILE, "=A("); \
1755 output_addr_const (FILE, ADDR); \
1756 fprintf (FILE, ")"); \
1757 break; \
1758 } \
1759 }
1760
1761 /* Output assembler code to FILE to increment profiler label # LABELNO
1762 for profiling a function entry. */
1763 /* Make it a no-op for now, so we can at least compile glibc */
1764 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1765 mvs_check_page (FILE, 24, 4); \
1766 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1767 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1768 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1769 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1770 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1771 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1772 }
1773
1774 /* Don't bother to output .extern pseudo-ops. They are not needed by
1775 ELF assemblers. */
1776
1777 #undef ASM_OUTPUT_EXTERNAL
1778
1779 #define ASM_DOUBLE "\t.double"
1780
1781 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1782
1783 /* let config/svr4.h define this ...
1784 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1785 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1786 */
1787
1788 /* This is how to output an element of a case-vector that is absolute. */
1789 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1790 mvs_check_page (FILE, 4, 0); \
1791 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1792
1793 /* This is how to output an element of a case-vector that is relative. */
1794 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1795 mvs_check_page (FILE, 4, 0); \
1796 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1797
1798 /* Right now, PUSH & POP are used only when profiling is enabled,
1799 and then, only to push the static chain reg and the function struct
1800 value reg, and only if those are used by the function being profiled.
1801 We don't need this for profiling, so punt. */
1802 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1803 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1804
1805
1806 /* Indicate that jump tables go in the text section. This is
1807 necessary when compiling PIC code. */
1808 #define JUMP_TABLES_IN_TEXT_SECTION 1
1809
1810 /* Define macro used to output shift-double opcodes when the shift
1811 count is in %cl. Some assemblers require %cl as an argument;
1812 some don't.
1813
1814 GAS requires the %cl argument, so override i386/unix.h. */
1815
1816 #undef SHIFT_DOUBLE_OMITS_COUNT
1817 #define SHIFT_DOUBLE_OMITS_COUNT 0
1818
1819 /* Implicit library calls should use memcpy, not bcopy, etc. */
1820 #define TARGET_MEM_FUNCTIONS
1821
1822 /* Output before read-only data. */
1823 #define TEXT_SECTION_ASM_OP "\t.text"
1824
1825 /* Output before writable (initialized) data. */
1826 #define DATA_SECTION_ASM_OP "\t.data"
1827
1828 /* Output before writable (uninitialized) data. */
1829 #define BSS_SECTION_ASM_OP "\t.bss"
1830
1831 /* In the past there was confusion as to what the argument to .align was
1832 in GAS. For the last several years the rule has been this: for a.out
1833 file formats that argument is LOG, and for all other file formats the
1834 argument is 1<<LOG.
1835
1836 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1837 doubt or guess work, and since this file is used for both a.out and other
1838 file formats, we use one of them. */
1839
1840 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1841 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1842
1843 /* Globalizing directive for a label. */
1844 #define GLOBAL_ASM_OP ".globl "
1845
1846 /* This says how to output an assembler line
1847 to define a global common symbol. */
1848
1849 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1850 ( fputs (".comm ", (FILE)), \
1851 assemble_name ((FILE), (NAME)), \
1852 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1853
1854 /* This says how to output an assembler line
1855 to define a local common symbol. */
1856
1857 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1858 ( fputs (".lcomm ", (FILE)), \
1859 assemble_name ((FILE), (NAME)), \
1860 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1861
1862 #endif /* TARGET_ELF_ABI */
1863 #endif /* ! GCC_I370_H */
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