1 ;; Scheduling description for IBM PowerPC 476 processor.
2 ;; Copyright (C) 2009-2014 Free Software Foundation, Inc.
3 ;; Contributed by Peter Bergner (bergner@vnet.ibm.com).
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify
8 ;; it under the terms of the GNU General Public License as published by
9 ;; the Free Software Foundation; either version 3, or (at your option)
12 ;; GCC is distributed in the hope that it will be useful,
13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ;; GNU General Public License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
21 ;; PPC476 Embedded PowerPC controller
22 ;; 3 issue (476) / 4 issue (476fp)
24 ;; i_pipe - complex integer / compare
25 ;; lj_pipe - load-store / simple integer arithmetic
26 ;; b_pipe - branch pipe
27 ;; f_pipe - floating point arithmetic
29 (define_automaton "ppc476_core,ppc476_apu")
31 (define_cpu_unit "ppc476_i_pipe,ppc476_lj_pipe,ppc476_b_pipe" "ppc476_core")
32 (define_cpu_unit "ppc476_issue_fp,ppc476_f_pipe" "ppc476_apu")
33 (define_cpu_unit "ppc476_issue_0,ppc476_issue_1,ppc476_issue_2" "ppc476_core")
35 (define_reservation "ppc476_issue" "ppc476_issue_0|ppc476_issue_1|ppc476_issue_2")
36 (define_reservation "ppc476_issue2" "ppc476_issue_0+ppc476_issue_1\
37 |ppc476_issue_0+ppc476_issue_2\
38 |ppc476_issue_1+ppc476_issue_2")
39 (define_reservation "ppc476_issue3" "ppc476_issue_0+ppc476_issue_1+ppc476_issue_2")
41 (define_insn_reservation "ppc476-load" 4
42 (and (eq_attr "type" "load,load_l,store_c,sync")
43 (eq_attr "cpu" "ppc476"))
47 (define_insn_reservation "ppc476-store" 4
48 (and (eq_attr "type" "store")
49 (eq_attr "cpu" "ppc476"))
53 (define_insn_reservation "ppc476-fpload" 4
54 (and (eq_attr "type" "fpload")
55 (eq_attr "cpu" "ppc476"))
59 (define_insn_reservation "ppc476-fpstore" 4
60 (and (eq_attr "type" "fpstore")
61 (eq_attr "cpu" "ppc476"))
65 (define_insn_reservation "ppc476-simple-integer" 1
66 (and (ior (eq_attr "type" "integer,insert,exts")
67 (and (eq_attr "type" "add,shift")
68 (eq_attr "dot" "no")))
69 (eq_attr "cpu" "ppc476"))
71 ppc476_i_pipe|ppc476_lj_pipe")
73 (define_insn_reservation "ppc476-complex-integer" 1
74 (and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap,popcnt")
75 (eq_attr "cpu" "ppc476"))
79 (define_insn_reservation "ppc476-compare" 4
80 (and (ior (eq_attr "type" "compare,fast_compare,mfcr,mfcrf,\
82 (and (eq_attr "type" "add,shift")
83 (eq_attr "dot" "yes")))
84 (eq_attr "cpu" "ppc476"))
88 (define_insn_reservation "ppc476-imul" 4
89 (and (eq_attr "type" "mul,halfmul")
90 (eq_attr "cpu" "ppc476"))
94 (define_insn_reservation "ppc476-idiv" 11
95 (and (eq_attr "type" "div")
96 (eq_attr "cpu" "ppc476"))
100 (define_insn_reservation "ppc476-branch" 1
101 (and (eq_attr "type" "branch,jmpreg")
102 (eq_attr "cpu" "ppc476"))
106 (define_insn_reservation "ppc476-two" 2
107 (and (eq_attr "type" "two")
108 (eq_attr "cpu" "ppc476"))
110 ppc476_i_pipe|ppc476_lj_pipe,\
111 ppc476_i_pipe|ppc476_lj_pipe")
113 (define_insn_reservation "ppc476-three" 3
114 (and (eq_attr "type" "three")
115 (eq_attr "cpu" "ppc476"))
117 ppc476_i_pipe|ppc476_lj_pipe,\
118 ppc476_i_pipe|ppc476_lj_pipe,\
119 ppc476_i_pipe|ppc476_lj_pipe")
121 (define_insn_reservation "ppc476-fpcompare" 6
122 (and (eq_attr "type" "fpcompare")
123 (eq_attr "cpu" "ppc476"))
124 "ppc476_issue+ppc476_issue_fp,\
125 ppc476_f_pipe+ppc476_i_pipe")
127 (define_insn_reservation "ppc476-fp" 6
128 (and (eq_attr "type" "fp,dmul")
129 (eq_attr "cpu" "ppc476"))
133 (define_insn_reservation "ppc476-sdiv" 19
134 (and (eq_attr "type" "sdiv")
135 (eq_attr "cpu" "ppc476"))
139 (define_insn_reservation "ppc476-ddiv" 33
140 (and (eq_attr "type" "ddiv")
141 (eq_attr "cpu" "ppc476"))