gcc/config/s390/s390.h

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
   3    Free Software Foundation, Inc.
   4    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   5                   Ulrich Weigand (uweigand@de.ibm.com).
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify it under
  10 the terms of the GNU General Public License as published by the Free
  11 Software Foundation; either version 2, or (at your option) any later
  12 version.
  13
  14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  17 for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING.  If not, write to the Free
  21 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
  22 02110-1301, USA.  */
  23
  24 #ifndef _S390_H
  25 #define _S390_H
  26
  27 /* Override the __fixdfdi etc. routines when building libgcc2.
  28    ??? This should be done in a cleaner way ...  */
  29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
  30 #include <config/s390/fixdfdi.h>
  31 #endif
  32
  33 /* Which processor to generate code or schedule for. The cpu attribute
  34    defines a list that mirrors this list, so changes to s390.md must be
  35    made at the same time.  */
  36
  37 enum processor_type
  38 {
  39   PROCESSOR_9672_G5,
  40   PROCESSOR_9672_G6,
  41   PROCESSOR_2064_Z900,
  42   PROCESSOR_2084_Z990,
  43   PROCESSOR_2094_Z9_109,
  44   PROCESSOR_max
  45 };
  46
  47 /* Optional architectural facilities supported by the processor.  */
  48
  49 enum processor_flags
  50 {
  51   PF_IEEE_FLOAT = 1,
  52   PF_ZARCH = 2,
  53   PF_LONG_DISPLACEMENT = 4,
  54   PF_EXTIMM = 8
  55 };
  56
  57 extern enum processor_type s390_tune;
  58 extern enum processor_flags s390_tune_flags;
  59
  60 extern enum processor_type s390_arch;
  61 extern enum processor_flags s390_arch_flags;
  62
  63 #define TARGET_CPU_IEEE_FLOAT \
  64         (s390_arch_flags & PF_IEEE_FLOAT)
  65 #define TARGET_CPU_ZARCH \
  66         (s390_arch_flags & PF_ZARCH)
  67 #define TARGET_CPU_LONG_DISPLACEMENT \
  68         (s390_arch_flags & PF_LONG_DISPLACEMENT)
  69 #define TARGET_CPU_EXTIMM \
  70         (s390_arch_flags & PF_EXTIMM)
  71
  72 #define TARGET_LONG_DISPLACEMENT \
  73        (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
  74 #define TARGET_EXTIMM \
  75        (TARGET_ZARCH && TARGET_CPU_EXTIMM)
  76
  77 /* Run-time target specification.  */
  78
  79 /* Defaults for option flags defined only on some subtargets.  */
  80 #ifndef TARGET_TPF_PROFILING
  81 #define TARGET_TPF_PROFILING 0
  82 #endif
  83
  84 /* This will be overridden by OS headers.  */
  85 #define TARGET_TPF 0
  86
  87 /* Target CPU builtins.  */
  88 #define TARGET_CPU_CPP_BUILTINS()                       \
  89   do                                                    \
  90     {                                                   \
  91       builtin_assert ("cpu=s390");                      \
  92       builtin_assert ("machine=s390");                  \
  93       builtin_define ("__s390__");                      \
  94       if (TARGET_64BIT)                                 \
  95         builtin_define ("__s390x__");                   \
  96       if (TARGET_LONG_DOUBLE_128)                       \
  97         builtin_define ("__LONG_DOUBLE_128__");         \
  98     }                                                   \
  99   while (0)
 100
 101 /* ??? Once this actually works, it could be made a runtime option.  */
 102 #define TARGET_IBM_FLOAT           0
 103 #define TARGET_IEEE_FLOAT          1
 104
 105 #ifdef DEFAULT_TARGET_64BIT
 106 #define TARGET_DEFAULT             (MASK_64BIT | MASK_ZARCH | MASK_HARD_FLOAT)
 107 #else
 108 #define TARGET_DEFAULT             MASK_HARD_FLOAT
 109 #endif
 110
 111 /* Support for configure-time defaults.  */
 112 #define OPTION_DEFAULT_SPECS                                    \
 113   { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" },                 \
 114   { "arch", "%{!march=*:-march=%(VALUE)}" },                    \
 115   { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
 116
 117 /* Defaulting rules.  */
 118 #ifdef DEFAULT_TARGET_64BIT
 119 #define DRIVER_SELF_SPECS                                       \
 120   "%{!m31:%{!m64:-m64}}",                                       \
 121   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 122   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 123 #else
 124 #define DRIVER_SELF_SPECS                                       \
 125   "%{!m31:%{!m64:-m31}}",                                       \
 126   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 127   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 128 #endif
 129
 130 /* Target version string.  Overridden by the OS header.  */
 131 #ifdef DEFAULT_TARGET_64BIT
 132 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
 133 #else
 134 #define TARGET_VERSION fprintf (stderr, " (S/390)");
 135 #endif
 136
 137 /* Hooks to override options.  */
 138 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
 139 #define OVERRIDE_OPTIONS override_options ()
 140
 141 /* Frame pointer is not used for debugging.  */
 142 #define CAN_DEBUG_WITHOUT_FP
 143
 144
 145 /* In libgcc2, determine target settings as compile-time constants.  */
 146 #ifdef IN_LIBGCC2
 147 #undef TARGET_64BIT
 148 #ifdef __s390x__
 149 #define TARGET_64BIT 1
 150 #else
 151 #define TARGET_64BIT 0
 152 #endif
 153 #endif
 154
 155
 156 /* Target machine storage layout.  */
 157
 158 /* Everything is big-endian.  */
 159 #define BITS_BIG_ENDIAN 1
 160 #define BYTES_BIG_ENDIAN 1
 161 #define WORDS_BIG_ENDIAN 1
 162
 163 /* Width of a word, in units (bytes).  */
 164 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
 165 #ifndef IN_LIBGCC2
 166 #define MIN_UNITS_PER_WORD 4
 167 #endif
 168 #define MAX_BITS_PER_WORD 64
 169
 170 /* Function arguments and return values are promoted to word size.  */
 171 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE)            \
 172 if (INTEGRAL_MODE_P (MODE) &&                           \
 173     GET_MODE_SIZE (MODE) < UNITS_PER_WORD) {            \
 174   (MODE) = Pmode;                                       \
 175           }
 176
 177 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 178 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
 179
 180 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 181 #define STACK_BOUNDARY 64
 182
 183 /* Allocation boundary (in *bits*) for the code of a function.  */
 184 #define FUNCTION_BOUNDARY 32
 185
 186 /* There is no point aligning anything to a rounder boundary than this.  */
 187 #define BIGGEST_ALIGNMENT 64
 188
 189 /* Alignment of field after `int : 0' in a structure.  */
 190 #define EMPTY_FIELD_BOUNDARY 32
 191
 192 /* Alignment on even addresses for LARL instruction.  */
 193 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 194 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 195
 196 /* Alignment is not required by the hardware.  */
 197 #define STRICT_ALIGNMENT 0
 198
 199 /* Mode of stack savearea.
 200    FUNCTION is VOIDmode because calling convention maintains SP.
 201    BLOCK needs Pmode for SP.
 202    NONLOCAL needs twice Pmode to maintain both backchain and SP.  */
 203 #define STACK_SAVEAREA_MODE(LEVEL)      \
 204   (LEVEL == SAVE_FUNCTION ? VOIDmode    \
 205   : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
 206
 207 /* Define target floating point format.  */
 208 #define TARGET_FLOAT_FORMAT \
 209   (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
 210
 211
 212 /* Type layout.  */
 213
 214 /* Sizes in bits of the source language data types.  */
 215 #define SHORT_TYPE_SIZE 16
 216 #define INT_TYPE_SIZE 32
 217 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
 218 #define LONG_LONG_TYPE_SIZE 64
 219 #define FLOAT_TYPE_SIZE 32
 220 #define DOUBLE_TYPE_SIZE 64
 221 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
 222
 223 /* Define this to set long double type size to use in libgcc2.c, which can
 224    not depend on target_flags.  */
 225 #ifdef __LONG_DOUBLE_128__
 226 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
 227 #else
 228 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
 229 #endif
 230
 231 /* Work around target_flags dependency in ada/targtyps.c.  */
 232 #define WIDEST_HARDWARE_FP_SIZE 64
 233
 234 /* We use "unsigned char" as default.  */
 235 #define DEFAULT_SIGNED_CHAR 0
 236
 237
 238 /* Register usage.  */
 239
 240 /* We have 16 general purpose registers (registers 0-15),
 241    and 16 floating point registers (registers 16-31).
 242    (On non-IEEE machines, we have only 4 fp registers.)
 243
 244    Amongst the general purpose registers, some are used
 245    for specific purposes:
 246    GPR 11: Hard frame pointer (if needed)
 247    GPR 12: Global offset table pointer (if needed)
 248    GPR 13: Literal pool base register
 249    GPR 14: Return address register
 250    GPR 15: Stack pointer
 251
 252    Registers 32-35 are 'fake' hard registers that do not
 253    correspond to actual hardware:
 254    Reg 32: Argument pointer
 255    Reg 33: Condition code
 256    Reg 34: Frame pointer
 257    Reg 35: Return address pointer
 258
 259    Registers 36 and 37 are mapped to access registers
 260    0 and 1, used to implement thread-local storage.  */
 261
 262 #define FIRST_PSEUDO_REGISTER 38
 263
 264 /* Standard register usage.  */
 265 #define GENERAL_REGNO_P(N)      ((int)(N) >= 0 && (N) < 16)
 266 #define ADDR_REGNO_P(N)         ((N) >= 1 && (N) < 16)
 267 #define FP_REGNO_P(N)           ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
 268 #define CC_REGNO_P(N)           ((N) == 33)
 269 #define FRAME_REGNO_P(N)        ((N) == 32 || (N) == 34 || (N) == 35)
 270 #define ACCESS_REGNO_P(N)       ((N) == 36 || (N) == 37)
 271
 272 #define GENERAL_REG_P(X)        (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 273 #define ADDR_REG_P(X)           (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
 274 #define FP_REG_P(X)             (REG_P (X) && FP_REGNO_P (REGNO (X)))
 275 #define CC_REG_P(X)             (REG_P (X) && CC_REGNO_P (REGNO (X)))
 276 #define FRAME_REG_P(X)          (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
 277 #define ACCESS_REG_P(X)         (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
 278
 279 /* Set up fixed registers and calling convention:
 280
 281    GPRs 0-5 are always call-clobbered,
 282    GPRs 6-15 are always call-saved.
 283    GPR 12 is fixed if used as GOT pointer.
 284    GPR 13 is always fixed (as literal pool pointer).
 285    GPR 14 is always fixed on S/390 machines (as return address).
 286    GPR 15 is always fixed (as stack pointer).
 287    The 'fake' hard registers are call-clobbered and fixed.
 288    The access registers are call-saved and fixed.
 289
 290    On 31-bit, FPRs 18-19 are call-clobbered;
 291    on 64-bit, FPRs 24-31 are call-clobbered.
 292    The remaining FPRs are call-saved.  */
 293
 294 #define FIXED_REGISTERS                         \
 295 { 0, 0, 0, 0,                                   \
 296   0, 0, 0, 0,                                   \
 297   0, 0, 0, 0,                                   \
 298   0, 1, 1, 1,                                   \
 299   0, 0, 0, 0,                                   \
 300   0, 0, 0, 0,                                   \
 301   0, 0, 0, 0,                                   \
 302   0, 0, 0, 0,                                   \
 303   1, 1, 1, 1,                                   \
 304   1, 1 }
 305
 306 #define CALL_USED_REGISTERS                     \
 307 { 1, 1, 1, 1,                                   \
 308   1, 1, 0, 0,                                   \
 309   0, 0, 0, 0,                                   \
 310   0, 1, 1, 1,                                   \
 311   1, 1, 1, 1,                                   \
 312   1, 1, 1, 1,                                   \
 313   1, 1, 1, 1,                                   \
 314   1, 1, 1, 1,                                   \
 315   1, 1, 1, 1,                                   \
 316   1, 1 }
 317
 318 #define CALL_REALLY_USED_REGISTERS              \
 319 { 1, 1, 1, 1,                                   \
 320   1, 1, 0, 0,                                   \
 321   0, 0, 0, 0,                                   \
 322   0, 0, 0, 0,                                   \
 323   1, 1, 1, 1,                                   \
 324   1, 1, 1, 1,                                   \
 325   1, 1, 1, 1,                                   \
 326   1, 1, 1, 1,                                   \
 327   1, 1, 1, 1,                                   \
 328   0, 0 }
 329
 330 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
 331
 332 /* Preferred register allocation order.  */
 333 #define REG_ALLOC_ORDER                                         \
 334 {  1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13,            \
 335    16, 17, 18, 19, 20, 21, 22, 23,                              \
 336    24, 25, 26, 27, 28, 29, 30, 31,                              \
 337    15, 32, 33, 34, 35, 36, 37 }
 338
 339
 340 /* Fitting values into registers.  */
 341
 342 /* Integer modes <= word size fit into any GPR.
 343    Integer modes > word size fit into successive GPRs, starting with
 344    an even-numbered register.
 345    SImode and DImode fit into FPRs as well.
 346
 347    Floating point modes <= word size fit into any FPR or GPR.
 348    Floating point modes > word size (i.e. DFmode on 32-bit) fit
 349    into any FPR, or an even-odd GPR pair.
 350    TFmode fits only into an even-odd FPR pair.
 351
 352    Complex floating point modes fit either into two FPRs, or into
 353    successive GPRs (again starting with an even number).
 354    TCmode fits only into two successive even-odd FPR pairs.
 355
 356    Condition code modes fit only into the CC register.  */
 357
 358 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
 359   (FP_REGNO_P(REGNO)?                                           \
 360    (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ?                \
 361     2 * ((GET_MODE_SIZE(MODE) / 2 + 8 - 1) / 8) :               \
 362     ((GET_MODE_SIZE(MODE) + 8 - 1) / 8)) :                      \
 363    GENERAL_REGNO_P(REGNO)?                                      \
 364     ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
 365    ACCESS_REGNO_P(REGNO)?                                       \
 366     ((GET_MODE_SIZE(MODE) + 4 - 1) / 4) :                       \
 367    1)
 368
 369 #define HARD_REGNO_MODE_OK(REGNO, MODE)                             \
 370   (FP_REGNO_P(REGNO)?                                               \
 371    (((MODE) == SImode || (MODE) == DImode                           \
 372      || GET_MODE_CLASS(MODE) == MODE_FLOAT                          \
 373      || GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT)                 \
 374     && (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))) :    \
 375    GENERAL_REGNO_P(REGNO)?                                          \
 376    ((HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))          \
 377     && (((MODE) != TFmode && (MODE) != TCmode) || TARGET_64BIT)) :  \
 378    CC_REGNO_P(REGNO)?                                               \
 379      GET_MODE_CLASS (MODE) == MODE_CC :                             \
 380    FRAME_REGNO_P(REGNO)?                                            \
 381      (enum machine_mode) (MODE) == Pmode :                          \
 382    ACCESS_REGNO_P(REGNO)?                                           \
 383      (((MODE) == SImode || ((enum machine_mode) (MODE) == Pmode))   \
 384       && (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))) :  \
 385    0)
 386
 387 #define HARD_REGNO_RENAME_OK(FROM, TO) \
 388   s390_hard_regno_rename_ok (FROM, TO)
 389
 390 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 391    (((MODE1) == SFmode || (MODE1) == DFmode)    \
 392    == ((MODE2) == SFmode || (MODE2) == DFmode))
 393
 394 /* Maximum number of registers to represent a value of mode MODE
 395    in a register of class CLASS.  */
 396 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 397      ((CLASS) == FP_REGS ?                                              \
 398       (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ?                     \
 399        2 * (GET_MODE_SIZE (MODE) / 2 + 8 - 1) / 8 :                     \
 400        (GET_MODE_SIZE (MODE) + 8 - 1) / 8) :                            \
 401       (CLASS) == ACCESS_REGS ?                                          \
 402       (GET_MODE_SIZE (MODE) + 4 - 1) / 4 :                              \
 403       (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 404
 405 /* If a 4-byte value is loaded into a FPR, it is placed into the
 406    *upper* half of the register, not the lower.  Therefore, we
 407    cannot use SUBREGs to switch between modes in FP registers.
 408    Likewise for access registers, since they have only half the
 409    word size on 64-bit.  */
 410 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)                       \
 411   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)                           \
 412    ? ((reg_classes_intersect_p (FP_REGS, CLASS)                         \
 413        && (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8))         \
 414       || reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
 415
 416 /* Register classes.  */
 417
 418 /* We use the following register classes:
 419    GENERAL_REGS     All general purpose registers
 420    ADDR_REGS        All general purpose registers except %r0
 421                     (These registers can be used in address generation)
 422    FP_REGS          All floating point registers
 423    CC_REGS          The condition code register
 424    ACCESS_REGS      The access registers
 425
 426    GENERAL_FP_REGS  Union of GENERAL_REGS and FP_REGS
 427    ADDR_FP_REGS     Union of ADDR_REGS and FP_REGS
 428    GENERAL_CC_REGS  Union of GENERAL_REGS and CC_REGS
 429    ADDR_CC_REGS     Union of ADDR_REGS and CC_REGS
 430
 431    NO_REGS          No registers
 432    ALL_REGS         All registers
 433
 434    Note that the 'fake' frame pointer and argument pointer registers
 435    are included amongst the address registers here.  */
 436
 437 enum reg_class
 438 {
 439   NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
 440   ADDR_CC_REGS, GENERAL_CC_REGS,
 441   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
 442   ALL_REGS, LIM_REG_CLASSES
 443 };
 444 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 445
 446 #define REG_CLASS_NAMES                                                 \
 447 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS",     \
 448   "ADDR_CC_REGS", "GENERAL_CC_REGS",                                    \
 449   "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
 450
 451 /* Class -> register mapping.  */
 452 #define REG_CLASS_CONTENTS \
 453 {                                                       \
 454   { 0x00000000, 0x00000000 },   /* NO_REGS */           \
 455   { 0x00000000, 0x00000002 },   /* CC_REGS */           \
 456   { 0x0000fffe, 0x0000000d },   /* ADDR_REGS */         \
 457   { 0x0000ffff, 0x0000000d },   /* GENERAL_REGS */      \
 458   { 0x00000000, 0x00000030 },   /* ACCESS_REGS */       \
 459   { 0x0000fffe, 0x0000000f },   /* ADDR_CC_REGS */      \
 460   { 0x0000ffff, 0x0000000f },   /* GENERAL_CC_REGS */   \
 461   { 0xffff0000, 0x00000000 },   /* FP_REGS */           \
 462   { 0xfffffffe, 0x0000000d },   /* ADDR_FP_REGS */      \
 463   { 0xffffffff, 0x0000000d },   /* GENERAL_FP_REGS */   \
 464   { 0xffffffff, 0x0000003f },   /* ALL_REGS */          \
 465 }
 466
 467 /* Register -> class mapping.  */
 468 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 469 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
 470
 471 /* ADDR_REGS can be used as base or index register.  */
 472 #define INDEX_REG_CLASS ADDR_REGS
 473 #define BASE_REG_CLASS ADDR_REGS
 474
 475 /* Check whether REGNO is a hard register of the suitable class
 476    or a pseudo register currently allocated to one such.  */
 477 #define REGNO_OK_FOR_INDEX_P(REGNO)                                     \
 478     (((REGNO) < FIRST_PSEUDO_REGISTER                                   \
 479      && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS)                         \
 480     || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
 481 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
 482
 483
 484 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
 485    return the class of reg to actually use.  */
 486 #define PREFERRED_RELOAD_CLASS(X, CLASS)        \
 487   s390_preferred_reload_class ((X), (CLASS))
 488
 489 /* We need a secondary reload when loading a PLUS which is
 490    not a valid operand for LOAD ADDRESS.  */
 491 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN)   \
 492   s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
 493
 494 /* We need a secondary reload when storing a double-word
 495    to a non-offsettable memory address.  */
 496 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
 497   s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
 498
 499 /* We need secondary memory to move data between GPRs and FPRs.  */
 500 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
 501  ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
 502
 503 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
 504    because the movsi and movsf patterns don't handle r/f moves.  */
 505 #define SECONDARY_MEMORY_NEEDED_MODE(MODE)              \
 506  (GET_MODE_BITSIZE (MODE) < 32                          \
 507   ? mode_for_size (32, GET_MODE_CLASS (MODE), 0)        \
 508   : MODE)
 509
 510
 511 /* Define various machine-dependent constraint letters.  */
 512
 513 #define REG_CLASS_FROM_LETTER(C)                                        \
 514   ((C) == 'a' ? ADDR_REGS :                                             \
 515    (C) == 'd' ? GENERAL_REGS :                                          \
 516    (C) == 'f' ? FP_REGS :                                               \
 517    (C) == 'c' ? CC_REGS :                                               \
 518    (C) == 't' ? ACCESS_REGS : NO_REGS)
 519
 520 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                          \
 521   s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
 522
 523 #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                 \
 524   s390_const_double_ok_for_constraint_p ((VALUE), (C), (STR))
 525
 526 #define EXTRA_CONSTRAINT_STR(OP, C, STR)                                \
 527   s390_extra_constraint_str ((OP), (C), (STR))
 528 #define EXTRA_MEMORY_CONSTRAINT(C, STR)                                 \
 529   ((C) == 'Q' || (C) == 'R' || (C) == 'S' || (C) == 'T' || (C) == 'A')
 530 #define EXTRA_ADDRESS_CONSTRAINT(C, STR)                                \
 531   ((C) == 'U' || (C) == 'W' || (C) == 'Y')
 532
 533 #define CONSTRAINT_LEN(C, STR)                                          \
 534   ((C) == 'N' ? 5 :                                                     \
 535    (C) == 'O' ? 2 :                                                     \
 536    (C) == 'A' ? 2 :                                                     \
 537    (C) == 'B' ? 2 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
 538
 539 /* Stack layout and calling conventions.  */
 540
 541 /* Our stack grows from higher to lower addresses.  However, local variables
 542    are accessed by positive offsets, and function arguments are stored at
 543    increasing addresses.  */
 544 #define STACK_GROWS_DOWNWARD
 545 #define FRAME_GROWS_DOWNWARD 1
 546 /* #undef ARGS_GROW_DOWNWARD */
 547
 548 /* The basic stack layout looks like this: the stack pointer points
 549    to the register save area for called functions.  Above that area
 550    is the location to place outgoing arguments.  Above those follow
 551    dynamic allocations (alloca), and finally the local variables.  */
 552
 553 /* Offset from stack-pointer to first location of outgoing args.  */
 554 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
 555
 556 /* Offset within stack frame to start allocating local variables at.  */
 557 #define STARTING_FRAME_OFFSET 0
 558
 559 /* Offset from the stack pointer register to an item dynamically
 560    allocated on the stack, e.g., by `alloca'.  */
 561 extern int current_function_outgoing_args_size;
 562 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
 563   (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
 564
 565 /* Offset of first parameter from the argument pointer register value.
 566    We have a fake argument pointer register that points directly to
 567    the argument area.  */
 568 #define FIRST_PARM_OFFSET(FNDECL) 0
 569
 570 /* Defining this macro makes __builtin_frame_address(0) and
 571    __builtin_return_address(0) work with -fomit-frame-pointer.  */
 572 #define INITIAL_FRAME_ADDRESS_RTX                                             \
 573   (TARGET_PACKED_STACK ?                                                      \
 574    plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) :                         \
 575    plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
 576
 577 /* The return address of the current frame is retrieved
 578    from the initial value of register RETURN_REGNUM.
 579    For frames farther back, we use the stack slot where
 580    the corresponding RETURN_REGNUM register was saved.  */
 581 #define DYNAMIC_CHAIN_ADDRESS(FRAME)                                          \
 582   (TARGET_PACKED_STACK ?                                                      \
 583    plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
 584
 585 #define RETURN_ADDR_RTX(COUNT, FRAME)                                         \
 586   s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
 587
 588 /* In 31-bit mode, we need to mask off the high bit of return addresses.  */
 589 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
 590
 591
 592 /* Exception handling.  */
 593
 594 /* Describe calling conventions for DWARF-2 exception handling.  */
 595 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, RETURN_REGNUM)
 596 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
 597 #define DWARF_FRAME_RETURN_COLUMN  14
 598
 599 /* Describe how we implement __builtin_eh_return.  */
 600 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
 601 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
 602
 603 /* Select a format to encode pointers in exception handling data.  */
 604 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)                          \
 605   (flag_pic                                                                 \
 606     ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
 607    : DW_EH_PE_absptr)
 608
 609
 610 /* Frame registers.  */
 611
 612 #define STACK_POINTER_REGNUM 15
 613 #define FRAME_POINTER_REGNUM 34
 614 #define HARD_FRAME_POINTER_REGNUM 11
 615 #define ARG_POINTER_REGNUM 32
 616 #define RETURN_ADDRESS_POINTER_REGNUM 35
 617
 618 /* The static chain must be call-clobbered, but not used for
 619    function argument passing.  As register 1 is clobbered by
 620    the trampoline code, we only have one option.  */
 621 #define STATIC_CHAIN_REGNUM 0
 622
 623 /* Number of hardware registers that go into the DWARF-2 unwind info.
 624    To avoid ABI incompatibility, this number must not change even as
 625    'fake' hard registers are added or removed.  */
 626 #define DWARF_FRAME_REGISTERS 34
 627
 628
 629 /* Frame pointer and argument pointer elimination.  */
 630
 631 #define FRAME_POINTER_REQUIRED 0
 632
 633 #define ELIMINABLE_REGS                                         \
 634 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },                \
 635  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },           \
 636  { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },                  \
 637  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },             \
 638  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM },       \
 639  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },  \
 640  { BASE_REGNUM, BASE_REGNUM }}
 641
 642 #define CAN_ELIMINATE(FROM, TO) \
 643   s390_can_eliminate ((FROM), (TO))
 644
 645 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 646   (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
 647
 648
 649 /* Stack arguments.  */
 650
 651 /* We need current_function_outgoing_args to be valid.  */
 652 #define ACCUMULATE_OUTGOING_ARGS 1
 653
 654 /* Return doesn't modify the stack.  */
 655 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
 656
 657
 658 /* Register arguments.  */
 659
 660 typedef struct s390_arg_structure
 661 {
 662   int gprs;                     /* gpr so far */
 663   int fprs;                     /* fpr so far */
 664 }
 665 CUMULATIVE_ARGS;
 666
 667 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
 668   ((CUM).gprs=0, (CUM).fprs=0)
 669
 670 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 671   s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
 672
 673 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
 674   s390_function_arg (&CUM, MODE, TYPE, NAMED)
 675
 676 /* Arguments can be placed in general registers 2 to 6,
 677    or in floating point registers 0 and 2.  */
 678 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
 679                                  (N) == 16 || (N) == 17)
 680
 681
 682 /* Scalar return values.  */
 683
 684 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 685   s390_function_value ((VALTYPE), VOIDmode)
 686
 687 #define LIBCALL_VALUE(MODE) \
 688   s390_function_value (NULL, (MODE))
 689
 690 /* Only gpr 2 and fpr 0 are ever used as return registers.  */
 691 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
 692
 693
 694 /* Function entry and exit.  */
 695
 696 /* When returning from a function, the stack pointer does not matter.  */
 697 #define EXIT_IGNORE_STACK       1
 698
 699
 700 /* Profiling.  */
 701
 702 #define FUNCTION_PROFILER(FILE, LABELNO)                        \
 703   s390_function_profiler ((FILE), ((LABELNO)))
 704
 705 #define PROFILE_BEFORE_PROLOGUE 1
 706
 707
 708 /* Implementing the varargs macros.  */
 709
 710 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
 711   s390_va_start (valist, nextarg)
 712
 713 /* Trampolines for nested functions.  */
 714
 715 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
 716
 717 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT)                       \
 718    s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
 719
 720 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 721    s390_trampoline_template (FILE)
 722
 723
 724 /* Addressing modes, and classification of registers for them.  */
 725
 726 /* Recognize any constant value that is a valid address.  */
 727 #define CONSTANT_ADDRESS_P(X) 0
 728
 729 /* Maximum number of registers that can appear in a valid memory address.  */
 730 #define MAX_REGS_PER_ADDRESS 2
 731
 732 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
 733    its validity for a certain class.  We have two alternate definitions
 734    for each of them.  The usual definition accepts all pseudo regs; the
 735    other rejects them all.  The symbol REG_OK_STRICT causes the latter
 736    definition to be used.
 737
 738    Most source files want to accept pseudo regs in the hope that they will
 739    get allocated to the class that the insn wants them to be in.
 740    Some source files that are used after register allocation
 741    need to be strict.  */
 742
 743 #define REG_OK_FOR_INDEX_NONSTRICT_P(X)         \
 744 ((GET_MODE (X) == Pmode) &&                     \
 745  ((REGNO (X) >= FIRST_PSEUDO_REGISTER)          \
 746   || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
 747
 748 #define REG_OK_FOR_BASE_NONSTRICT_P(X)    REG_OK_FOR_INDEX_NONSTRICT_P (X)
 749
 750 #define REG_OK_FOR_INDEX_STRICT_P(X)                            \
 751 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
 752
 753 #define REG_OK_FOR_BASE_STRICT_P(X)                             \
 754 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
 755
 756 #ifndef REG_OK_STRICT
 757 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_NONSTRICT_P(X)
 758 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P(X)
 759 #else
 760 #define REG_OK_FOR_INDEX_P(X)  REG_OK_FOR_INDEX_STRICT_P(X)
 761 #define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_STRICT_P(X)
 762 #endif
 763
 764 /* S/390 has no mode dependent addresses.  */
 765 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
 766
 767 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
 768    valid memory address for an instruction.
 769    The MODE argument is the machine mode for the MEM expression
 770    that wants to use this address.  */
 771 #ifdef REG_OK_STRICT
 772 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 773 {                                                                       \
 774   if (legitimate_address_p (MODE, X, 1))                                \
 775     goto ADDR;                                                          \
 776 }
 777 #else
 778 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 779 {                                                                       \
 780   if (legitimate_address_p (MODE, X, 0))                                \
 781     goto ADDR;                                                          \
 782 }
 783 #endif
 784
 785 /* Try machine-dependent ways of modifying an illegitimate address
 786    to be legitimate.  If we find one, return the new, valid address.
 787    This macro is used in only one place: `memory_address' in explow.c.  */
 788 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)                          \
 789 {                                                                       \
 790   (X) = legitimize_address (X, OLDX, MODE);                             \
 791   if (memory_address_p (MODE, X))                                       \
 792     goto WIN;                                                           \
 793 }
 794
 795 /* Try a machine-dependent way of reloading an illegitimate address
 796    operand.  If we find one, push the reload and jump to WIN.  This
 797    macro is used in only one place: `find_reloads_address' in reload.c.  */
 798 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
 799 do {                                                                    \
 800   rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE));   \
 801   if (new)                                                              \
 802     {                                                                   \
 803       (AD) = new;                                                       \
 804       goto WIN;                                                         \
 805     }                                                                   \
 806 } while (0)
 807
 808 /* Nonzero if the constant value X is a legitimate general operand.
 809    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 810 #define LEGITIMATE_CONSTANT_P(X) \
 811      legitimate_constant_p (X)
 812
 813 /* Helper macro for s390.c and s390.md to check for symbolic constants.  */
 814 #define SYMBOLIC_CONST(X)       \
 815 (GET_CODE (X) == SYMBOL_REF                                             \
 816  || GET_CODE (X) == LABEL_REF                                           \
 817  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 818
 819 #define TLS_SYMBOLIC_CONST(X)   \
 820 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X))       \
 821  || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
 822
 823
 824 /* Condition codes.  */
 825
 826 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
 827    return the mode to be used for the comparison.  */
 828 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
 829
 830 /* Canonicalize a comparison from one we don't have to one we do have.  */
 831 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
 832   s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
 833
 834 /* Define the information needed to generate branch and scc insns.  This is
 835    stored from the compare operation.  Note that we can't use "rtx" here
 836    since it hasn't been defined!  */
 837 extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
 838
 839
 840 /* Relative costs of operations.  */
 841
 842 /* On s390, copy between fprs and gprs is expensive.  */
 843 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)                        \
 844   ((   (   reg_classes_intersect_p ((CLASS1), GENERAL_REGS)             \
 845         && reg_classes_intersect_p ((CLASS2), FP_REGS))                 \
 846     || (   reg_classes_intersect_p ((CLASS1), FP_REGS)                  \
 847         && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
 848
 849 /* A C expression for the cost of moving data of mode M between a
 850    register and memory.  A value of 2 is the default; this cost is
 851    relative to those in `REGISTER_MOVE_COST'.  */
 852 #define MEMORY_MOVE_COST(M, C, I) 1
 853
 854 /* A C expression for the cost of a branch instruction.  A value of 1
 855    is the default; other values are interpreted relative to that.  */
 856 #define BRANCH_COST 1
 857
 858 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 859 #define SLOW_BYTE_ACCESS 1
 860
 861 /* An integer expression for the size in bits of the largest integer machine
 862    mode that should actually be used.  We allow pairs of registers.  */
 863 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
 864
 865 /* The maximum number of bytes that a single instruction can move quickly
 866    between memory and registers or between two memory locations.  */
 867 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
 868 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
 869 #define MAX_MOVE_MAX 16
 870
 871 /* Determine whether to use move_by_pieces or block move insn.  */
 872 #define MOVE_BY_PIECES_P(SIZE, ALIGN)           \
 873   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 874     || (TARGET_64BIT && (SIZE) == 8) )
 875
 876 /* Determine whether to use clear_by_pieces or block clear insn.  */
 877 #define CLEAR_BY_PIECES_P(SIZE, ALIGN)          \
 878   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 879     || (TARGET_64BIT && (SIZE) == 8) )
 880
 881 /* This macro is used to determine whether store_by_pieces should be
 882    called to "memset" storage with byte values other than zero, or
 883    to "memcpy" storage when the source is a constant string.  */
 884 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
 885
 886 /* Don't perform CSE on function addresses.  */
 887 #define NO_FUNCTION_CSE
 888
 889
 890 /* Sections.  */
 891
 892 /* Output before read-only data.  */
 893 #define TEXT_SECTION_ASM_OP ".text"
 894
 895 /* Output before writable (initialized) data.  */
 896 #define DATA_SECTION_ASM_OP ".data"
 897
 898 /* Output before writable (uninitialized) data.  */
 899 #define BSS_SECTION_ASM_OP ".bss"
 900
 901 /* S/390 constant pool breaks the devices in crtstuff.c to control section
 902    in where code resides.  We have to write it as asm code.  */
 903 #ifndef __s390x__
 904 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
 905     asm (SECTION_OP "\n\
 906         bras\t%r2,1f\n\
 907 0:      .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
 908 1:      l\t%r3,0(%r2)\n\
 909         bas\t%r14,0(%r3,%r2)\n\
 910         .previous");
 911 #endif
 912
 913
 914 /* Position independent code.  */
 915
 916 extern int flag_pic;
 917
 918 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
 919
 920 #define LEGITIMATE_PIC_OPERAND_P(X)  legitimate_pic_operand_p (X)
 921
 922
 923 /* Assembler file format.  */
 924
 925 /* Character to start a comment.  */
 926 #define ASM_COMMENT_START "#"
 927
 928 /* Declare an uninitialized external linkage data object.  */
 929 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 930   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 931
 932 /* Globalizing directive for a label.  */
 933 #define GLOBAL_ASM_OP ".globl "
 934
 935 /* Advance the location counter to a multiple of 2**LOG bytes.  */
 936 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
 937   if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
 938
 939 /* Advance the location counter by SIZE bytes.  */
 940 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
 941   fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 942
 943 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h.  */
 944 #define LOCAL_LABEL_PREFIX "."
 945
 946 /* How to refer to registers in assembler output.  This sequence is
 947    indexed by compiler's hard-register-number (see above).  */
 948 #define REGISTER_NAMES                                                  \
 949 { "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",        \
 950   "%r8",  "%r9",  "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",       \
 951   "%f0",  "%f2",  "%f4",  "%f6",  "%f1",  "%f3",  "%f5",  "%f7",        \
 952   "%f8",  "%f10", "%f12", "%f14", "%f9",  "%f11", "%f13", "%f15",       \
 953   "%ap",  "%cc",  "%fp",  "%rp",  "%a0",  "%a1"                         \
 954 }
 955
 956 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 957 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 958 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 959
 960 /* Output machine-dependent UNSPECs in address constants.  */
 961 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)          \
 962 do {                                                    \
 963   if (!s390_output_addr_const_extra (FILE, (X)))        \
 964     goto FAIL;                                          \
 965 } while (0);
 966
 967 /* Output an element of a case-vector that is absolute.  */
 968 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                            \
 969 do {                                                                    \
 970   char buf[32];                                                         \
 971   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 972   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 973   assemble_name ((FILE), buf);                                          \
 974   fputc ('\n', (FILE));                                                 \
 975 } while (0)
 976
 977 /* Output an element of a case-vector that is relative.  */
 978 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)                \
 979 do {                                                                    \
 980   char buf[32];                                                         \
 981   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 982   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 983   assemble_name ((FILE), buf);                                          \
 984   fputc ('-', (FILE));                                                  \
 985   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL));                        \
 986   assemble_name ((FILE), buf);                                          \
 987   fputc ('\n', (FILE));                                                 \
 988 } while (0)
 989
 990
 991 /* Miscellaneous parameters.  */
 992
 993 /* Specify the machine mode that this machine uses for the index in the
 994    tablejump instruction.  */
 995 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
 996
 997 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 998    is done just by pretending it is already truncated.  */
 999 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
1000
1001 /* Specify the machine mode that pointers have.
1002    After generation of rtl, the compiler makes no further distinction
1003    between pointers and any other objects of this machine mode.  */
1004 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1005
1006 /* This is -1 for "pointer mode" extend.  See ptr_extend in s390.md.  */
1007 #define POINTERS_EXTEND_UNSIGNED -1
1008
1009 /* A function address in a call instruction is a byte address (for
1010    indexing purposes) so give the MEM rtx a byte's mode.  */
1011 #define FUNCTION_MODE QImode
1012
1013 /* Specify the value which is used when clz operand is zero.  */
1014 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
1015
1016 /* Machine-specific symbol_ref flags.  */
1017 #define SYMBOL_FLAG_ALIGN1      (SYMBOL_FLAG_MACH_DEP << 0)
1018
1019 /* Check whether integer displacement is in range.  */
1020 #define DISP_IN_RANGE(d) \
1021   (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
1022                            : ((d) >= 0 && (d) <= 4095))
1023
1024 #endif