1 ;; Machine Descriptions for R8C/M16C/M32C
3 ;; Free Software Foundation, Inc.
4 ;; Contributed by Red Hat.
6 ;; This file is part of GCC.
8 ;; GCC is free software; you can redistribute it and/or modify it
9 ;; under the terms of the GNU General Public License as published
10 ;; by the Free Software Foundation; either version 2, or (at your
11 ;; option) any later version.
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ;; License for more details.
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING. If not, write to the Free
20 ;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
25 ; Shifts are unusual for m32c. We only support shifting in one
26 ; "direction" but the shift count is signed. Also, immediate shift
27 ; counts have a limited range, and variable shift counts have to be in
28 ; $r1h which GCC normally doesn't even know about.
30 ; Other than compensating for the above, the patterns below are pretty
33 (define_insn "ashlqi3_i"
34 [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
35 (ashift:QI (match_operand:QI 1 "mra_operand" "0,0")
36 (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
37 (clobber (match_scratch:HI 3 "=X,R1w"))]
41 mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
44 (define_insn "ashrqi3_i"
45 [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
46 (ashiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
47 (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
48 (clobber (match_scratch:HI 3 "=X,R1w"))]
52 mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
55 (define_insn "lshrqi3_i"
56 [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
57 (lshiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
58 (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
59 (clobber (match_scratch:HI 3 "=X,R1w"))]
63 mov.b\t%2,r1h\n\tshl.b\tr1h,%0"
67 (define_expand "ashlqi3"
68 [(parallel [(set (match_operand:QI 0 "mra_operand" "")
69 (ashift:QI (match_operand:QI 1 "mra_operand" "")
70 (match_operand:QI 2 "general_operand" "")))
71 (clobber (match_scratch:HI 3 ""))])]
73 "if (m32c_prepare_shift (operands, 1, ASHIFT))
77 (define_expand "ashrqi3"
78 [(parallel [(set (match_operand:QI 0 "mra_operand" "")
79 (ashiftrt:QI (match_operand:QI 1 "mra_operand" "")
80 (neg:QI (match_operand:QI 2 "general_operand" ""))))
81 (clobber (match_scratch:HI 3 ""))])]
83 "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
87 (define_expand "lshrqi3"
88 [(parallel [(set (match_operand:QI 0 "mra_operand" "")
89 (lshiftrt:QI (match_operand:QI 1 "mra_operand" "")
90 (neg:QI (match_operand:QI 2 "general_operand" ""))))
91 (clobber (match_scratch:HI 3 ""))])]
93 "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
97 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
99 (define_insn "ashlhi3_i"
100 [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
101 (ashift:HI (match_operand:HI 1 "mra_operand" "0,0")
102 (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
103 (clobber (match_scratch:HI 3 "=X,R1w"))]
107 mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
110 (define_insn "ashrhi3_i"
111 [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
112 (ashiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
113 (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
114 (clobber (match_scratch:HI 3 "=X,R1w"))]
118 mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
121 (define_insn "lshrhi3_i"
122 [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm,RhiSd*Rmm")
123 (lshiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
124 (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
125 (clobber (match_scratch:HI 3 "=X,R1w"))]
129 mov.b\t%2,r1h\n\tshl.w\tr1h,%0"
133 (define_expand "ashlhi3"
134 [(parallel [(set (match_operand:HI 0 "mra_operand" "")
135 (ashift:HI (match_operand:HI 1 "mra_operand" "")
136 (match_operand:QI 2 "general_operand" "")))
137 (clobber (match_scratch:HI 3 ""))])]
139 "if (m32c_prepare_shift (operands, 1, ASHIFT))
143 (define_expand "ashrhi3"
144 [(parallel [(set (match_operand:HI 0 "mra_operand" "")
145 (ashiftrt:HI (match_operand:HI 1 "mra_operand" "")
146 (neg:QI (match_operand:QI 2 "general_operand" ""))))
147 (clobber (match_scratch:HI 3 ""))])]
149 "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
153 (define_expand "lshrhi3"
154 [(parallel [(set (match_operand:HI 0 "mra_operand" "")
155 (lshiftrt:HI (match_operand:HI 1 "mra_operand" "")
156 (neg:QI (match_operand:QI 2 "general_operand" ""))))
157 (clobber (match_scratch:HI 3 ""))])]
159 "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
166 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
169 (define_insn "ashlpsi3_i"
170 [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
171 (ashift:PSI (match_operand:PSI 1 "mra_operand" "0,0")
172 (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
173 (clobber (match_scratch:HI 3 "=X,R1w"))]
177 mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
180 (define_insn "ashrpsi3_i"
181 [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
182 (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
183 (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
184 (clobber (match_scratch:HI 3 "=X,R1w"))]
188 mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
191 (define_insn "lshrpsi3_i"
192 [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd,??Rmm")
193 (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
194 (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
195 (clobber (match_scratch:HI 3 "=X,R1w"))]
199 mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
203 (define_expand "ashlpsi3"
204 [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
205 (ashift:PSI (match_operand:PSI 1 "mra_operand" "")
206 (match_operand:QI 2 "mrai_operand" "")))
207 (clobber (match_scratch:HI 3 ""))])]
209 "if (m32c_prepare_shift (operands, 1, ASHIFT))
213 (define_expand "ashrpsi3"
214 [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
215 (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
216 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
217 (clobber (match_scratch:HI 3 ""))])]
219 "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
223 (define_expand "lshrpsi3"
224 [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
225 (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
226 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
227 (clobber (match_scratch:HI 3 ""))])]
229 "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
233 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
235 ; The m16c has a maximum shift count of -16..16, even when in a
236 ; register. It's optimal to use multiple shifts of -8..8 rather than
237 ; loading larger constants into R1H multiple time. The m32c can shift
238 ; -32..32 either via immediates or in registers. Hence, separate
242 (define_insn "ashlsi3_16"
243 [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
244 (ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
245 (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd")))
246 (clobber (match_scratch:HI 3 "=X,R1w"))]
250 mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
251 [(set_attr "flags" "sz,sz")]
254 (define_insn "ashrsi3_16"
255 [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
256 (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
257 (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
258 (clobber (match_scratch:HI 3 "=X,R1w"))]
262 mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
265 (define_insn "lshrsi3_16"
266 [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
267 (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
268 (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
269 (clobber (match_scratch:HI 3 "=X,R1w"))]
273 mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
278 (define_insn "ashlsi3_24"
279 [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
280 (ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
281 (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd")))
282 (clobber (match_scratch:HI 3 "=X,R1w"))]
286 mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
289 (define_insn "ashrsi3_24"
290 [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
291 (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
292 (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
293 (clobber (match_scratch:HI 3 "=X,R1w"))]
297 mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
300 (define_insn "lshrsi3_24"
301 [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
302 (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
303 (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
304 (clobber (match_scratch:HI 3 "=X,R1w"))]
308 mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
314 (define_expand "ashlsi3"
315 [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
316 (ashift:SI (match_operand:SI 1 "r0123_operand" "")
317 (match_operand:QI 2 "mrai_operand" "")))
318 (clobber (match_scratch:HI 3 ""))])]
320 "if (m32c_prepare_shift (operands, 1, ASHIFT))
324 (define_expand "ashrsi3"
325 [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
326 (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "")
327 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
328 (clobber (match_scratch:HI 3 ""))])]
330 "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
334 (define_expand "lshrsi3"
335 [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
336 (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "")
337 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
338 (clobber (match_scratch:HI 3 ""))])]
340 "if (m32c_prepare_shift (operands, -1, LSHIFTRT))