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1 ;; Machine Descriptions for R8C/M16C/M32C
2 ;; Copyright (C) 2005
3 ;; Free Software Foundation, Inc.
4 ;; Contributed by Red Hat.
5 ;;
6 ;; This file is part of GCC.
7 ;;
8 ;; GCC is free software; you can redistribute it and/or modify it
9 ;; under the terms of the GNU General Public License as published
10 ;; by the Free Software Foundation; either version 2, or (at your
11 ;; option) any later version.
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16 ;; License for more details.
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING.  If not, write to the Free
20 ;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
21 ;; 02110-1301, USA.
23 ;; bit shifting
25 ; Shifts are unusual for m32c.  We only support shifting in one
26 ; "direction" but the shift count is signed.  Also, immediate shift
27 ; counts have a limited range, and variable shift counts have to be in
28 ; $r1h which GCC normally doesn't even know about.
30 ; Other than compensating for the above, the patterns below are pretty
31 ; straightforward.
33 (define_insn "ashlqi3_i"
34   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
35         (ashift:QI (match_operand:QI 1 "mra_operand" "0,0")
36                    (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
37    (clobber (match_scratch:HI 3 "=X,R1w"))]
38   ""
39   "@
40    sha.b\t%2,%0
41    mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
42   )
44 (define_insn "ashrqi3_i"
45   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
46         (ashiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
47                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
48    (clobber (match_scratch:HI 3 "=X,R1w"))]
49   ""
50   "@
51    sha.b\t%2,%0
52    mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
53   )
55 (define_insn "lshrqi3_i"
56   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
57         (lshiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
58                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
59    (clobber (match_scratch:HI 3 "=X,R1w"))]
60   ""
61   "@
62    shl.b\t%2,%0
63    mov.b\t%2,r1h\n\tshl.b\tr1h,%0"
64   )
67 (define_expand "ashlqi3"
68   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
69         (ashift:QI (match_operand:QI 1 "mra_operand" "")
70                    (match_operand:QI 2 "general_operand" "")))
71    (clobber (match_scratch:HI 3 ""))])]
72   ""
73   "if (m32c_prepare_shift (operands, 1, ASHIFT))
74      DONE;"
75   )
77 (define_expand "ashrqi3"
78   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
79         (ashiftrt:QI (match_operand:QI 1 "mra_operand" "")
80                      (neg:QI (match_operand:QI 2 "general_operand" ""))))
81    (clobber (match_scratch:HI 3 ""))])]
82   ""
83   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
84      DONE;"
85   )
87 (define_expand "lshrqi3"
88   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
89                    (lshiftrt:QI (match_operand:QI 1 "mra_operand" "")
90                                 (neg:QI (match_operand:QI 2 "general_operand" ""))))
91               (clobber (match_scratch:HI 3 ""))])]
92   ""
93   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
94      DONE;"
95   )
97 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
99 (define_insn "ashlhi3_i"
100   [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
101         (ashift:HI (match_operand:HI 1 "mra_operand" "0,0")
102                    (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
103    (clobber (match_scratch:HI 3 "=X,R1w"))]
104   ""
105   "@
106    sha.w\t%2,%0
107    mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
108   )
110 (define_insn "ashrhi3_i"
111   [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
112         (ashiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
113                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
114    (clobber (match_scratch:HI 3 "=X,R1w"))]
115   ""
116   "@
117    sha.w\t%2,%0
118    mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
119   )
121 (define_insn "lshrhi3_i"
122   [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm,RhiSd*Rmm")
123         (lshiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
124                      (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
125    (clobber (match_scratch:HI 3 "=X,R1w"))]
126   ""
127   "@
128    shl.w\t%2,%0
129    mov.b\t%2,r1h\n\tshl.w\tr1h,%0"
130   )
133 (define_expand "ashlhi3"
134   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
135                    (ashift:HI (match_operand:HI 1 "mra_operand" "")
136                               (match_operand:QI 2 "general_operand" "")))
137               (clobber (match_scratch:HI 3 ""))])]
138   ""
139   "if (m32c_prepare_shift (operands, 1, ASHIFT))
140      DONE;"
141   )
143 (define_expand "ashrhi3"
144   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
145                    (ashiftrt:HI (match_operand:HI 1 "mra_operand" "")
146                                 (neg:QI (match_operand:QI 2 "general_operand" ""))))
147               (clobber (match_scratch:HI 3 ""))])]
148   ""
149   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
150      DONE;"
151   )
153 (define_expand "lshrhi3"
154   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
155                    (lshiftrt:HI (match_operand:HI 1 "mra_operand" "")
156                                 (neg:QI (match_operand:QI 2 "general_operand" ""))))
157               (clobber (match_scratch:HI 3 ""))])]
158   ""
159   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
160      DONE;"
161   )
166 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
169 (define_insn "ashlpsi3_i"
170   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
171         (ashift:PSI (match_operand:PSI 1 "mra_operand" "0,0")
172                     (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
173    (clobber (match_scratch:HI 3 "=X,R1w"))]
174   "TARGET_A24"
175   "@
176    sha.l\t%2,%0
177    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
178   )
180 (define_insn "ashrpsi3_i"
181   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
182         (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
183                       (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
184    (clobber (match_scratch:HI 3 "=X,R1w"))]
185   "TARGET_A24"
186   "@
187    sha.l\t%2,%0
188    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
189   )
191 (define_insn "lshrpsi3_i"
192   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd,??Rmm")
193         (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
194                       (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
195    (clobber (match_scratch:HI 3 "=X,R1w"))]
196   "TARGET_A24"
197   "@
198    shl.l\t%2,%0
199    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
200   )
203 (define_expand "ashlpsi3"
204   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
205                    (ashift:PSI (match_operand:PSI 1 "mra_operand" "")
206                                (match_operand:QI 2 "mrai_operand" "")))
207               (clobber (match_scratch:HI 3 ""))])]
208   "TARGET_A24"
209   "if (m32c_prepare_shift (operands, 1, ASHIFT))
210      DONE;"
211   )
213 (define_expand "ashrpsi3"
214   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
215                    (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
216                                  (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
217               (clobber (match_scratch:HI 3 ""))])]
218   "TARGET_A24"
219   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
220      DONE;"
221   )
223 (define_expand "lshrpsi3"
224   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
225                    (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
226                                  (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
227               (clobber (match_scratch:HI 3 ""))])]
228   "TARGET_A24"
229   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
230      DONE;"
231   )
233 ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
235 ; The m16c has a maximum shift count of -16..16, even when in a
236 ; register.  It's optimal to use multiple shifts of -8..8 rather than
237 ; loading larger constants into R1H multiple time.  The m32c can shift
238 ; -32..32 either via immediates or in registers.  Hence, separate
239 ; patterns.
242 (define_insn "ashlsi3_16"
243   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
244         (ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
245                    (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd")))
246    (clobber (match_scratch:HI 3 "=X,R1w"))]
247   "TARGET_A16"
248   "@
249    sha.l\t%2,%0
250    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
251   [(set_attr "flags" "sz,sz")]
252   )
254 (define_insn "ashrsi3_16"
255   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
256         (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
257                      (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
258    (clobber (match_scratch:HI 3 "=X,R1w"))]
259   "TARGET_A16"
260   "@
261    sha.l\t%2,%0
262    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
263   )
265 (define_insn "lshrsi3_16"
266   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
267         (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
268                      (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
269    (clobber (match_scratch:HI 3 "=X,R1w"))]
270   "TARGET_A16"
271   "@
272    shl.l\t%2,%0
273    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
274   )
278 (define_insn "ashlsi3_24"
279   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
280         (ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
281                    (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd")))
282    (clobber (match_scratch:HI 3 "=X,R1w"))]
283   "TARGET_A24"
284   "@
285    sha.l\t%2,%0
286    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
287   )
289 (define_insn "ashrsi3_24"
290   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
291         (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
292                      (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
293    (clobber (match_scratch:HI 3 "=X,R1w"))]
294   "TARGET_A24"
295   "@
296    sha.l\t%2,%0
297    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
298   )
300 (define_insn "lshrsi3_24"
301   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
302         (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
303                      (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
304    (clobber (match_scratch:HI 3 "=X,R1w"))]
305   "TARGET_A24"
306   "@
307    shl.l\t%2,%0
308    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
309   )
314 (define_expand "ashlsi3"
315   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
316                    (ashift:SI (match_operand:SI 1 "r0123_operand" "")
317                               (match_operand:QI 2 "mrai_operand" "")))
318               (clobber (match_scratch:HI 3 ""))])]
319   ""
320   "if (m32c_prepare_shift (operands, 1, ASHIFT))
321      DONE;"
322   )
324 (define_expand "ashrsi3"
325   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
326                    (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "")
327                                 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
328               (clobber (match_scratch:HI 3 ""))])]
329   ""
330   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
331      DONE;"
332   )
334 (define_expand "lshrsi3"
335   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
336                    (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "")
337                                 (neg:QI (match_operand:QI 2 "mrai_operand" ""))))
338               (clobber (match_scratch:HI 3 ""))])]
339   ""
340   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
341      DONE;"
342   )