boehm-gc/include/private/gc_locks.h

   1 /*
   2  * Copyright 1988, 1989 Hans-J. Boehm, Alan J. Demers
   3  * Copyright (c) 1991-1994 by Xerox Corporation.  All rights reserved.
   4  * Copyright (c) 1996-1999 by Silicon Graphics.  All rights reserved.
   5  * Copyright (c) 1999 by Hewlett-Packard Company. All rights reserved.
   6  *
   7  *
   8  * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
   9  * OR IMPLIED.  ANY USE IS AT YOUR OWN RISK.
  10  *
  11  * Permission is hereby granted to use or copy this program
  12  * for any purpose,  provided the above notices are retained on all copies.
  13  * Permission to modify the code and to distribute modified code is granted,
  14  * provided the above notices are retained, and a notice that the code was
  15  * modified is included with the above copyright notice.
  16  */
  17
  18 #ifndef GC_LOCKS_H
  19 #define GC_LOCKS_H
  20
  21 /*
  22  * Mutual exclusion between allocator/collector routines.
  23  * Needed if there is more than one allocator thread.
  24  * FASTLOCK() is assumed to try to acquire the lock in a cheap and
  25  * dirty way that is acceptable for a few instructions, e.g. by
  26  * inhibiting preemption.  This is assumed to have succeeded only
  27  * if a subsequent call to FASTLOCK_SUCCEEDED() returns TRUE.
  28  * FASTUNLOCK() is called whether or not FASTLOCK_SUCCEEDED().
  29  * If signals cannot be tolerated with the FASTLOCK held, then
  30  * FASTLOCK should disable signals.  The code executed under
  31  * FASTLOCK is otherwise immune to interruption, provided it is
  32  * not restarted.
  33  * DCL_LOCK_STATE declares any local variables needed by LOCK and UNLOCK
  34  * and/or DISABLE_SIGNALS and ENABLE_SIGNALS and/or FASTLOCK.
  35  * (There is currently no equivalent for FASTLOCK.)
  36  *
  37  * In the PARALLEL_MARK case, we also need to define a number of
  38  * other inline finctions here:
  39  *   GC_bool GC_compare_and_exchange( volatile GC_word *addr,
  40  *                                    GC_word old, GC_word new )
  41  *   GC_word GC_atomic_add( volatile GC_word *addr, GC_word how_much )
  42  *   void GC_memory_barrier( )
  43  *
  44  */
  45 # ifdef THREADS
  46    void GC_noop1 GC_PROTO((word));
  47 #  ifdef PCR_OBSOLETE   /* Faster, but broken with multiple lwp's       */
  48 #    include  "th/PCR_Th.h"
  49 #    include  "th/PCR_ThCrSec.h"
  50      extern struct PCR_Th_MLRep GC_allocate_ml;
  51 #    define DCL_LOCK_STATE  PCR_sigset_t GC_old_sig_mask
  52 #    define LOCK() PCR_Th_ML_Acquire(&GC_allocate_ml)
  53 #    define UNLOCK() PCR_Th_ML_Release(&GC_allocate_ml)
  54 #    define UNLOCK() PCR_Th_ML_Release(&GC_allocate_ml)
  55 #    define FASTLOCK() PCR_ThCrSec_EnterSys()
  56      /* Here we cheat (a lot): */
  57 #        define FASTLOCK_SUCCEEDED() (*(int *)(&GC_allocate_ml) == 0)
  58                 /* TRUE if nobody currently holds the lock */
  59 #    define FASTUNLOCK() PCR_ThCrSec_ExitSys()
  60 #  endif
  61 #  ifdef PCR
  62 #    include <base/PCR_Base.h>
  63 #    include <th/PCR_Th.h>
  64      extern PCR_Th_ML GC_allocate_ml;
  65 #    define DCL_LOCK_STATE \
  66          PCR_ERes GC_fastLockRes; PCR_sigset_t GC_old_sig_mask
  67 #    define LOCK() PCR_Th_ML_Acquire(&GC_allocate_ml)
  68 #    define UNLOCK() PCR_Th_ML_Release(&GC_allocate_ml)
  69 #    define FASTLOCK() (GC_fastLockRes = PCR_Th_ML_Try(&GC_allocate_ml))
  70 #    define FASTLOCK_SUCCEEDED() (GC_fastLockRes == PCR_ERes_okay)
  71 #    define FASTUNLOCK()  {\
  72         if( FASTLOCK_SUCCEEDED() ) PCR_Th_ML_Release(&GC_allocate_ml); }
  73 #  endif
  74 #  ifdef SRC_M3
  75      extern GC_word RT0u__inCritical;
  76 #    define LOCK() RT0u__inCritical++
  77 #    define UNLOCK() RT0u__inCritical--
  78 #  endif
  79 #  ifdef GC_SOLARIS_THREADS
  80 #    include <thread.h>
  81 #    include <signal.h>
  82      extern mutex_t GC_allocate_ml;
  83 #    define LOCK() mutex_lock(&GC_allocate_ml);
  84 #    define UNLOCK() mutex_unlock(&GC_allocate_ml);
  85 #  endif
  86
  87 /* Try to define GC_TEST_AND_SET and a matching GC_CLEAR for spin lock  */
  88 /* acquisition and release.  We need this for correct operation of the  */
  89 /* incremental GC.                                                      */
  90 #  ifdef __GNUC__
  91 #    if defined(I386)
  92        inline static int GC_test_and_set(volatile unsigned int *addr) {
  93           int oldval;
  94           /* Note: the "xchg" instruction does not need a "lock" prefix */
  95           __asm__ __volatile__("xchgl %0, %1"
  96                 : "=r"(oldval), "=m"(*(addr))
  97                 : "0"(1), "m"(*(addr)) : "memory");
  98           return oldval;
  99        }
 100 #      define GC_TEST_AND_SET_DEFINED
 101 #    endif
 102 #    if defined(IA64)
 103 #     include <ia64intrin.h>
 104        inline static int GC_test_and_set(volatile unsigned int *addr) {
 105           return __sync_lock_test_and_set(addr, 1);
 106        }
 107 #      define GC_TEST_AND_SET_DEFINED
 108        inline static void GC_clear(volatile unsigned int *addr) {
 109           *addr = 0;
 110        }
 111 #      define GC_CLEAR_DEFINED
 112 #    endif
 113 #    ifdef SPARC
 114        inline static int GC_test_and_set(volatile unsigned int *addr) {
 115          int oldval;
 116
 117          __asm__ __volatile__("ldstub %1,%0"
 118          : "=r"(oldval), "=m"(*addr)
 119          : "m"(*addr) : "memory");
 120          return oldval;
 121        }
 122 #      define GC_TEST_AND_SET_DEFINED
 123 #    endif
 124 #    ifdef M68K
 125        /* Contributed by Tony Mantler.  I'm not sure how well it was    */
 126        /* tested.                                                       */
 127        inline static int GC_test_and_set(volatile unsigned int *addr) {
 128           char oldval; /* this must be no longer than 8 bits */
 129
 130           /* The return value is semi-phony. */
 131           /* 'tas' sets bit 7 while the return */
 132           /* value pretends bit 0 was set */
 133           __asm__ __volatile__(
 134                  "tas %1@; sne %0; negb %0"
 135                  : "=d" (oldval)
 136                  : "a" (addr) : "memory");
 137           return oldval;
 138        }
 139 #      define GC_TEST_AND_SET_DEFINED
 140 #    endif
 141 #    if defined(POWERPC)
 142 #     if 0 /* CPP_WORDSZ == 64  totally broken to use int locks with ldarx */
 143         inline static int GC_test_and_set(volatile unsigned int *addr) {
 144           unsigned long oldval;
 145           unsigned long temp = 1; /* locked value */
 146
 147           __asm__ __volatile__(
 148                "1:\tldarx %0,0,%3\n"   /* load and reserve               */
 149                "\tcmpdi %0, 0\n"       /* if load is                     */
 150                "\tbne 2f\n"            /*   non-zero, return already set */
 151                "\tstdcx. %2,0,%1\n"    /* else store conditional         */
 152                "\tbne- 1b\n"           /* retry if lost reservation      */
 153                "\tsync\n"              /* import barrier                 */
 154                "2:\t\n"                /* oldval is zero if we set       */
 155               : "=&r"(oldval), "=p"(addr)
 156               : "r"(temp), "1"(addr)
 157               : "cr0","memory");
 158           return (int)oldval;
 159         }
 160 #     else
 161         inline static int GC_test_and_set(volatile unsigned int *addr) {
 162           int oldval;
 163           int temp = 1; /* locked value */
 164
 165           __asm__ __volatile__(
 166                "1:\tlwarx %0,0,%3\n"   /* load and reserve               */
 167                "\tcmpwi %0, 0\n"       /* if load is                     */
 168                "\tbne 2f\n"            /*   non-zero, return already set */
 169                "\tstwcx. %2,0,%1\n"    /* else store conditional         */
 170                "\tbne- 1b\n"           /* retry if lost reservation      */
 171                "\tsync\n"              /* import barrier                 */
 172                "2:\t\n"                /* oldval is zero if we set       */
 173               : "=&r"(oldval), "=p"(addr)
 174               : "r"(temp), "1"(addr)
 175               : "cr0","memory");
 176           return oldval;
 177         }
 178 #     endif
 179 #     define GC_TEST_AND_SET_DEFINED
 180       inline static void GC_clear(volatile unsigned int *addr) {
 181         __asm__ __volatile__("lwsync" : : : "memory");
 182         *(addr) = 0;
 183       }
 184 #     define GC_CLEAR_DEFINED
 185 #    endif
 186 #    if defined(ALPHA)
 187         inline static int GC_test_and_set(volatile unsigned int * addr)
 188         {
 189           unsigned long oldvalue;
 190           unsigned long temp;
 191
 192           __asm__ __volatile__(
 193                              "1:     ldl_l %0,%1\n"
 194                              "       and %0,%3,%2\n"
 195                              "       bne %2,2f\n"
 196                              "       xor %0,%3,%0\n"
 197                              "       stl_c %0,%1\n"
 198 #       ifdef __ELF__
 199                              "       beq %0,3f\n"
 200 #       else
 201                              "       beq %0,1b\n"
 202 #       endif
 203                              "       mb\n"
 204                              "2:\n"
 205 #       ifdef __ELF__
 206                              ".section .text2,\"ax\"\n"
 207                              "3:     br 1b\n"
 208                              ".previous"
 209 #       endif
 210                              :"=&r" (temp), "=m" (*addr), "=&r" (oldvalue)
 211                              :"Ir" (1), "m" (*addr)
 212                              :"memory");
 213
 214           return oldvalue;
 215         }
 216 #       define GC_TEST_AND_SET_DEFINED
 217         inline static void GC_clear(volatile unsigned int *addr) {
 218           __asm__ __volatile__("mb" : : : "memory");
 219           *(addr) = 0;
 220         }
 221 #       define GC_CLEAR_DEFINED
 222 #    endif /* ALPHA */
 223 #    ifdef ARM32
 224         inline static int GC_test_and_set(volatile unsigned int *addr) {
 225           int oldval;
 226           /* SWP on ARM is very similar to XCHG on x86.  Doesn't lock the
 227            * bus because there are no SMP ARM machines.  If/when there are,
 228            * this code will likely need to be updated. */
 229           /* See linuxthreads/sysdeps/arm/pt-machine.h in glibc-2.1 */
 230           __asm__ __volatile__("swp %0, %1, [%2]"
 231                              : "=r"(oldval)
 232                              : "0"(1), "r"(addr)
 233                              : "memory");
 234           return oldval;
 235         }
 236 #       define GC_TEST_AND_SET_DEFINED
 237 #    endif /* ARM32 */
 238 #    ifdef CRIS
 239         inline static int GC_test_and_set(volatile unsigned int *addr) {
 240           /* Ripped from linuxthreads/sysdeps/cris/pt-machine.h.        */
 241           /* Included with Hans-Peter Nilsson's permission.             */
 242           register unsigned long int ret;
 243
 244           /* Note the use of a dummy output of *addr to expose the write.
 245            * The memory barrier is to stop *other* writes being moved past
 246            * this code.
 247            */
 248             __asm__ __volatile__("clearf\n"
 249                                  "0:\n\t"
 250                                  "movu.b [%2],%0\n\t"
 251                                  "ax\n\t"
 252                                  "move.b %3,[%2]\n\t"
 253                                  "bwf 0b\n\t"
 254                                  "clearf"
 255                                  : "=&r" (ret), "=m" (*addr)
 256                                  : "r" (addr), "r" ((int) 1), "m" (*addr)
 257                                  : "memory");
 258             return ret;
 259         }
 260 #       define GC_TEST_AND_SET_DEFINED
 261 #    endif /* CRIS */
 262 #    ifdef S390
 263        inline static int GC_test_and_set(volatile unsigned int *addr) {
 264          int ret;
 265          __asm__ __volatile__ (
 266           "     l     %0,0(%2)\n"
 267           "0:   cs    %0,%1,0(%2)\n"
 268           "     jl    0b"
 269           : "=&d" (ret)
 270           : "d" (1), "a" (addr)
 271           : "cc", "memory");
 272          return ret;
 273        }
 274 #    endif
 275 #  endif /* __GNUC__ */
 276 #  if (defined(ALPHA) && !defined(__GNUC__))
 277 #    ifndef OSF1
 278         --> We currently assume that if gcc is not used, we are
 279         --> running under Tru64.
 280 #    endif
 281 #    include <machine/builtins.h>
 282 #    include <c_asm.h>
 283 #    define GC_test_and_set(addr) __ATOMIC_EXCH_LONG(addr, 1)
 284 #    define GC_TEST_AND_SET_DEFINED
 285 #    define GC_clear(addr) { asm("mb"); *(volatile unsigned *)addr = 0; }
 286 #    define GC_CLEAR_DEFINED
 287 #  endif
 288 #  if defined(MSWIN32)
 289 #    define GC_test_and_set(addr) InterlockedExchange((LPLONG)addr,1)
 290 #    define GC_TEST_AND_SET_DEFINED
 291 #  endif
 292 #  ifdef MIPS
 293 #    ifdef LINUX
 294 #      include <sys/tas.h>
 295 #      define GC_test_and_set(addr) _test_and_set((int *) addr,1)
 296 #      define GC_TEST_AND_SET_DEFINED
 297 #    elif __mips < 3 || !(defined (_ABIN32) || defined(_ABI64)) \
 298         || !defined(_COMPILER_VERSION) || _COMPILER_VERSION < 700
 299 #        ifdef __GNUC__
 300 #          define GC_test_and_set(addr) _test_and_set((void *)addr,1)
 301 #        else
 302 #          define GC_test_and_set(addr) test_and_set((void *)addr,1)
 303 #        endif
 304 #    else
 305 #        include <sgidefs.h>
 306 #        include <mutex.h>
 307 #        define GC_test_and_set(addr) __test_and_set32((void *)addr,1)
 308 #        define GC_clear(addr) __lock_release(addr);
 309 #        define GC_CLEAR_DEFINED
 310 #    endif
 311 #    define GC_TEST_AND_SET_DEFINED
 312 #  endif /* MIPS */
 313 #  if defined(_AIX)
 314 #    include <sys/atomic_op.h>
 315 #    if (defined(_POWER) || defined(_POWERPC))
 316 #      if defined(__GNUC__)
 317          inline static void GC_memsync() {
 318            __asm__ __volatile__ ("sync" : : : "memory");
 319          }
 320 #      else
 321 #        ifndef inline
 322 #          define inline __inline
 323 #        endif
 324 #        pragma mc_func GC_memsync { \
 325            "7c0004ac" /* sync (same opcode used for dcs)*/ \
 326          }
 327 #      endif
 328 #    else
 329 #    error dont know how to memsync
 330 #    endif
 331      inline static int GC_test_and_set(volatile unsigned int * addr) {
 332           int oldvalue = 0;
 333           if (compare_and_swap((void *)addr, &oldvalue, 1)) {
 334             GC_memsync();
 335             return 0;
 336           } else return 1;
 337      }
 338 #    define GC_TEST_AND_SET_DEFINED
 339      inline static void GC_clear(volatile unsigned int *addr) {
 340           GC_memsync();
 341           *(addr) = 0;
 342      }
 343 #    define GC_CLEAR_DEFINED
 344
 345 #  endif
 346 #  if 0 /* defined(HP_PA) */
 347      /* The official recommendation seems to be to not use ldcw from    */
 348      /* user mode.  Since multithreaded incremental collection doesn't  */
 349      /* work anyway on HP_PA, this shouldn't be a major loss.           */
 350
 351      /* "set" means 0 and "clear" means 1 here.         */
 352 #    define GC_test_and_set(addr) !GC_test_and_clear(addr);
 353 #    define GC_TEST_AND_SET_DEFINED
 354 #    define GC_clear(addr) GC_noop1((word)(addr)); *(volatile unsigned int *)addr = 1;
 355         /* The above needs a memory barrier! */
 356 #    define GC_CLEAR_DEFINED
 357 #  endif
 358 #  if defined(GC_TEST_AND_SET_DEFINED) && !defined(GC_CLEAR_DEFINED)
 359 #    ifdef __GNUC__
 360        inline static void GC_clear(volatile unsigned int *addr) {
 361          /* Try to discourage gcc from moving anything past this. */
 362          __asm__ __volatile__(" " : : : "memory");
 363          *(addr) = 0;
 364        }
 365 #    else
 366             /* The function call in the following should prevent the    */
 367             /* compiler from moving assignments to below the UNLOCK.    */
 368 #      define GC_clear(addr) GC_noop1((word)(addr)); \
 369                              *((volatile unsigned int *)(addr)) = 0;
 370 #    endif
 371 #    define GC_CLEAR_DEFINED
 372 #  endif /* !GC_CLEAR_DEFINED */
 373
 374 #  if !defined(GC_TEST_AND_SET_DEFINED)
 375 #    define USE_PTHREAD_LOCKS
 376 #  endif
 377
 378 #  if defined(GC_PTHREADS) && !defined(GC_SOLARIS_THREADS) \
 379       && !defined(GC_WIN32_THREADS)
 380 #    define NO_THREAD (pthread_t)(-1)
 381 #    include <pthread.h>
 382 #    if defined(PARALLEL_MARK)
 383       /* We need compare-and-swap to update mark bits, where it's       */
 384       /* performance critical.  If USE_MARK_BYTES is defined, it is     */
 385       /* no longer needed for this purpose.  However we use it in       */
 386       /* either case to implement atomic fetch-and-add, though that's   */
 387       /* less performance critical, and could perhaps be done with      */
 388       /* a lock.                                                        */
 389 #     if defined(GENERIC_COMPARE_AND_SWAP)
 390         /* Probably not useful, except for debugging.   */
 391         /* We do use GENERIC_COMPARE_AND_SWAP on PA_RISC, but we        */
 392         /* minimize its use.                                            */
 393         extern pthread_mutex_t GC_compare_and_swap_lock;
 394
 395         /* Note that if GC_word updates are not atomic, a concurrent    */
 396         /* reader should acquire GC_compare_and_swap_lock.  On          */
 397         /* currently supported platforms, such updates are atomic.      */
 398         extern GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 399                                                GC_word old, GC_word new_val);
 400 #     endif /* GENERIC_COMPARE_AND_SWAP */
 401 #     if defined(I386)
 402 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 403          /* Returns TRUE if the comparison succeeded. */
 404          inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 405                                                        GC_word old,
 406                                                        GC_word new_val)
 407          {
 408            char result;
 409            __asm__ __volatile__("lock; cmpxchgl %2, %0; setz %1"
 410                 : "+m"(*(addr)), "=r"(result)
 411                 : "r" (new_val), "a"(old) : "memory");
 412            return (GC_bool) result;
 413          }
 414 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 415        inline static void GC_memory_barrier()
 416        {
 417          /* We believe the processor ensures at least processor */
 418          /* consistent ordering.  Thus a compiler barrier       */
 419          /* should suffice.                                     */
 420          __asm__ __volatile__("" : : : "memory");
 421        }
 422 #     endif /* I386 */
 423
 424 #     if defined(POWERPC)
 425 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 426 #       if CPP_WORDSZ == 64
 427         /* Returns TRUE if the comparison succeeded. */
 428         inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 429             GC_word old, GC_word new_val)
 430         {
 431             unsigned long result, dummy;
 432             __asm__ __volatile__(
 433                 "1:\tldarx %0,0,%5\n"
 434                   "\tcmpd %0,%4\n"
 435                   "\tbne  2f\n"
 436                   "\tstdcx. %3,0,%2\n"
 437                   "\tbne- 1b\n"
 438                   "\tsync\n"
 439                   "\tli %1, 1\n"
 440                   "\tb 3f\n"
 441                 "2:\tli %1, 0\n"
 442                 "3:\t\n"
 443                 :  "=&r" (dummy), "=r" (result), "=p" (addr)
 444                 :  "r" (new_val), "r" (old), "2"(addr)
 445                 : "cr0","memory");
 446             return (GC_bool) result;
 447         }
 448 #       else
 449         /* Returns TRUE if the comparison succeeded. */
 450         inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 451             GC_word old, GC_word new_val)
 452         {
 453             int result, dummy;
 454             __asm__ __volatile__(
 455                 "1:\tlwarx %0,0,%5\n"
 456                   "\tcmpw %0,%4\n"
 457                   "\tbne  2f\n"
 458                   "\tstwcx. %3,0,%2\n"
 459                   "\tbne- 1b\n"
 460                   "\tsync\n"
 461                   "\tli %1, 1\n"
 462                   "\tb 3f\n"
 463                 "2:\tli %1, 0\n"
 464                 "3:\t\n"
 465                 :  "=&r" (dummy), "=r" (result), "=p" (addr)
 466                 :  "r" (new_val), "r" (old), "2"(addr)
 467                 : "cr0","memory");
 468             return (GC_bool) result;
 469         }
 470 #       endif
 471 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 472         inline static void GC_memory_barrier()
 473         {
 474             __asm__ __volatile__("sync" : : : "memory");
 475         }
 476 #     endif /* POWERPC */
 477
 478 #     if defined(IA64)
 479 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 480          inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 481                                                        GC_word old,
 482                                                        GC_word new_val)
 483          {
 484            return __sync_bool_compare_and_swap (addr, old, new_val);
 485          }
 486 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 487 #      if 0
 488         /* Shouldn't be needed; we use volatile stores instead. */
 489         inline static void GC_memory_barrier()
 490         {
 491           __sync_synchronize ();
 492         }
 493 #      endif /* 0 */
 494 #     endif /* IA64 */
 495 #     if defined(ALPHA)
 496 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 497 #        if defined(__GNUC__)
 498            inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 499                                                          GC_word old, GC_word new_val)
 500            {
 501              unsigned long was_equal;
 502              unsigned long temp;
 503
 504              __asm__ __volatile__(
 505                              "1:     ldq_l %0,%1\n"
 506                              "       cmpeq %0,%4,%2\n"
 507                              "       mov %3,%0\n"
 508                              "       beq %2,2f\n"
 509                              "       stq_c %0,%1\n"
 510                              "       beq %0,1b\n"
 511                              "2:\n"
 512                              "       mb\n"
 513                              :"=&r" (temp), "=m" (*addr), "=&r" (was_equal)
 514                              : "r" (new_val), "Ir" (old)
 515                              :"memory");
 516              return was_equal;
 517            }
 518 #        else /* !__GNUC__ */
 519            inline static GC_bool GC_compare_and_exchange(volatile GC_word *addr,
 520                                                          GC_word old, GC_word new_val)
 521           {
 522             return __CMP_STORE_QUAD(addr, old, new_val, addr);
 523           }
 524 #        endif /* !__GNUC__ */
 525 #      endif /* !GENERIC_COMPARE_AND_SWAP */
 526 #      ifdef __GNUC__
 527          inline static void GC_memory_barrier()
 528          {
 529            __asm__ __volatile__("mb" : : : "memory");
 530          }
 531 #      else
 532 #        define GC_memory_barrier() asm("mb")
 533 #      endif /* !__GNUC__ */
 534 #     endif /* ALPHA */
 535 #     if defined(S390)
 536 #      if !defined(GENERIC_COMPARE_AND_SWAP)
 537          inline static GC_bool GC_compare_and_exchange(volatile C_word *addr,
 538                                          GC_word old, GC_word new_val)
 539          {
 540            int retval;
 541            __asm__ __volatile__ (
 542 #            ifndef __s390x__
 543                "     cs  %1,%2,0(%3)\n"
 544 #            else
 545                "     csg %1,%2,0(%3)\n"
 546 #            endif
 547              "     ipm %0\n"
 548              "     srl %0,28\n"
 549              : "=&d" (retval), "+d" (old)
 550              : "d" (new_val), "a" (addr)
 551              : "cc", "memory");
 552            return retval == 0;
 553          }
 554 #      endif
 555 #     endif
 556 #     if !defined(GENERIC_COMPARE_AND_SWAP)
 557         /* Returns the original value of *addr. */
 558         inline static GC_word GC_atomic_add(volatile GC_word *addr,
 559                                             GC_word how_much)
 560         {
 561           GC_word old;
 562           do {
 563             old = *addr;
 564           } while (!GC_compare_and_exchange(addr, old, old+how_much));
 565           return old;
 566         }
 567 #     else /* GENERIC_COMPARE_AND_SWAP */
 568         /* So long as a GC_word can be atomically updated, it should    */
 569         /* be OK to read *addr without a lock.                          */
 570         extern GC_word GC_atomic_add(volatile GC_word *addr, GC_word how_much);
 571 #     endif /* GENERIC_COMPARE_AND_SWAP */
 572
 573 #    endif /* PARALLEL_MARK */
 574
 575 #    if !defined(THREAD_LOCAL_ALLOC) && !defined(USE_PTHREAD_LOCKS)
 576       /* In the THREAD_LOCAL_ALLOC case, the allocation lock tends to   */
 577       /* be held for long periods, if it is held at all.  Thus spinning */
 578       /* and sleeping for fixed periods are likely to result in         */
 579       /* significant wasted time.  We thus rely mostly on queued locks. */
 580 #     define USE_SPIN_LOCK
 581       extern volatile unsigned int GC_allocate_lock;
 582       extern void GC_lock(void);
 583         /* Allocation lock holder.  Only set if acquired by client through */
 584         /* GC_call_with_alloc_lock.                                        */
 585 #     ifdef GC_ASSERTIONS
 586 #        define LOCK() \
 587                 { if (GC_test_and_set(&GC_allocate_lock)) GC_lock(); \
 588                   SET_LOCK_HOLDER(); }
 589 #        define UNLOCK() \
 590                 { GC_ASSERT(I_HOLD_LOCK()); UNSET_LOCK_HOLDER(); \
 591                   GC_clear(&GC_allocate_lock); }
 592 #     else
 593 #        define LOCK() \
 594                 { if (GC_test_and_set(&GC_allocate_lock)) GC_lock(); }
 595 #        define UNLOCK() \
 596                 GC_clear(&GC_allocate_lock)
 597 #     endif /* !GC_ASSERTIONS */
 598 #     if 0
 599         /* Another alternative for OSF1 might be:               */
 600 #       include <sys/mman.h>
 601         extern msemaphore GC_allocate_semaphore;
 602 #       define LOCK() { if (msem_lock(&GC_allocate_semaphore, MSEM_IF_NOWAIT) \
 603                             != 0) GC_lock(); else GC_allocate_lock = 1; }
 604         /* The following is INCORRECT, since the memory model is too weak. */
 605         /* Is this true?  Presumably msem_unlock has the right semantics?  */
 606         /*              - HB                                               */
 607 #       define UNLOCK() { GC_allocate_lock = 0; \
 608                           msem_unlock(&GC_allocate_semaphore, 0); }
 609 #     endif /* 0 */
 610 #    else /* THREAD_LOCAL_ALLOC  || USE_PTHREAD_LOCKS */
 611 #      ifndef USE_PTHREAD_LOCKS
 612 #        define USE_PTHREAD_LOCKS
 613 #      endif
 614 #    endif /* THREAD_LOCAL_ALLOC */
 615 #   ifdef USE_PTHREAD_LOCKS
 616 #      include <pthread.h>
 617        extern pthread_mutex_t GC_allocate_ml;
 618 #      ifdef GC_ASSERTIONS
 619 #        define LOCK() \
 620                 { GC_lock(); \
 621                   SET_LOCK_HOLDER(); }
 622 #        define UNLOCK() \
 623                 { GC_ASSERT(I_HOLD_LOCK()); UNSET_LOCK_HOLDER(); \
 624                   pthread_mutex_unlock(&GC_allocate_ml); }
 625 #      else /* !GC_ASSERTIONS */
 626 #        if defined(NO_PTHREAD_TRYLOCK)
 627 #          define LOCK() GC_lock();
 628 #        else /* !defined(NO_PTHREAD_TRYLOCK) */
 629 #        define LOCK() \
 630            { if (0 != pthread_mutex_trylock(&GC_allocate_ml)) GC_lock(); }
 631 #        endif
 632 #        define UNLOCK() pthread_mutex_unlock(&GC_allocate_ml)
 633 #      endif /* !GC_ASSERTIONS */
 634 #   endif /* USE_PTHREAD_LOCKS */
 635 #   define SET_LOCK_HOLDER() GC_lock_holder = pthread_self()
 636 #   define UNSET_LOCK_HOLDER() GC_lock_holder = NO_THREAD
 637 #   define I_HOLD_LOCK() (pthread_equal(GC_lock_holder, pthread_self()))
 638     extern VOLATILE GC_bool GC_collecting;
 639 #   define ENTER_GC() GC_collecting = 1;
 640 #   define EXIT_GC() GC_collecting = 0;
 641     extern void GC_lock(void);
 642     extern pthread_t GC_lock_holder;
 643 #   ifdef GC_ASSERTIONS
 644       extern pthread_t GC_mark_lock_holder;
 645 #   endif
 646 #  endif /* GC_PTHREADS with linux_threads.c implementation */
 647 #  if defined(GC_WIN32_THREADS)
 648 #    if defined(GC_PTHREADS)
 649 #      include <pthread.h>
 650        extern pthread_mutex_t GC_allocate_ml;
 651 #      define LOCK()   pthread_mutex_lock(&GC_allocate_ml)
 652 #      define UNLOCK() pthread_mutex_unlock(&GC_allocate_ml)
 653 #    else
 654 #      include <windows.h>
 655        GC_API CRITICAL_SECTION GC_allocate_ml;
 656 #      define LOCK() EnterCriticalSection(&GC_allocate_ml);
 657 #      define UNLOCK() LeaveCriticalSection(&GC_allocate_ml);
 658 #    endif
 659 #  endif
 660 #  ifndef SET_LOCK_HOLDER
 661 #      define SET_LOCK_HOLDER()
 662 #      define UNSET_LOCK_HOLDER()
 663 #      define I_HOLD_LOCK() FALSE
 664                 /* Used on platforms were locks can be reacquired,      */
 665                 /* so it doesn't matter if we lie.                      */
 666 #  endif
 667 # else /* !THREADS */
 668 #    define LOCK()
 669 #    define UNLOCK()
 670 # endif /* !THREADS */
 671 # ifndef SET_LOCK_HOLDER
 672 #   define SET_LOCK_HOLDER()
 673 #   define UNSET_LOCK_HOLDER()
 674 #   define I_HOLD_LOCK() FALSE
 675                 /* Used on platforms were locks can be reacquired,      */
 676                 /* so it doesn't matter if we lie.                      */
 677 # endif
 678 # ifndef ENTER_GC
 679 #   define ENTER_GC()
 680 #   define EXIT_GC()
 681 # endif
 682
 683 # ifndef DCL_LOCK_STATE
 684 #   define DCL_LOCK_STATE
 685 # endif
 686 # ifndef FASTLOCK
 687 #   define FASTLOCK() LOCK()
 688 #   define FASTLOCK_SUCCEEDED() TRUE
 689 #   define FASTUNLOCK() UNLOCK()
 690 # endif
 691
 692 #endif /* GC_LOCKS_H */