* dbxout.c (current_file): Also wrap inside DBX_DEBUGGING_INFO ||
[official-gcc.git] / gcc / reload.c
blob13dd25ed06120b7ed2cf16d197380ca7b9df0039
1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
57 NOTE SIDE EFFECTS:
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
64 better that way.
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
81 register.
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
87 #define REG_OK_STRICT
89 #include "config.h"
90 #include "system.h"
91 #include "coretypes.h"
92 #include "tm.h"
93 #include "rtl.h"
94 #include "tm_p.h"
95 #include "insn-config.h"
96 #include "expr.h"
97 #include "optabs.h"
98 #include "recog.h"
99 #include "reload.h"
100 #include "regs.h"
101 #include "hard-reg-set.h"
102 #include "flags.h"
103 #include "real.h"
104 #include "output.h"
105 #include "function.h"
106 #include "toplev.h"
107 #include "target.h"
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
111 #endif
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
115 #endif
117 /* All reloads of the current insn are recorded here. See reload.h for
118 comments. */
119 int n_reloads;
120 struct reload rld[MAX_RELOADS];
122 /* All the "earlyclobber" operands of the current insn
123 are recorded here. */
124 int n_earlyclobbers;
125 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
127 int reload_n_operands;
129 /* Replacing reloads.
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
136 /* Nonzero means record the places to replace. */
137 static int replace_reloads;
139 /* Each replacement is recorded with a structure like this. */
140 struct replacement
142 rtx *where; /* Location to store in */
143 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what; /* which reload this is for */
146 enum machine_mode mode; /* mode it must have */
149 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
151 /* Number of replacements currently recorded. */
152 static int n_replacements;
154 /* Used to track what is modified by an operand. */
155 struct decomposition
157 int reg_flag; /* Nonzero if referencing a register. */
158 int safe; /* Nonzero if this can't conflict with anything. */
159 rtx base; /* Base address for MEM. */
160 HOST_WIDE_INT start; /* Starting offset or register number. */
161 HOST_WIDE_INT end; /* Ending offset or register number. */
164 #ifdef SECONDARY_MEMORY_NEEDED
166 /* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
172 reload each. */
174 static rtx secondary_memlocs[NUM_MACHINE_MODES];
175 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
176 #endif
178 /* The instruction we are doing reloads for;
179 so we can test whether a register dies in it. */
180 static rtx this_insn;
182 /* Nonzero if this instruction is a user-specified asm with operands. */
183 static int this_insn_is_asm;
185 /* If hard_regs_live_known is nonzero,
186 we can tell which hard regs are currently live,
187 at least enough to succeed in choosing dummy reloads. */
188 static int hard_regs_live_known;
190 /* Indexed by hard reg number,
191 element is nonnegative if hard reg has been spilled.
192 This vector is passed to `find_reloads' as an argument
193 and is not changed here. */
194 static short *static_reload_reg_p;
196 /* Set to 1 in subst_reg_equivs if it changes anything. */
197 static int subst_reg_equivs_changed;
199 /* On return from push_reload, holds the reload-number for the OUT
200 operand, which can be different for that from the input operand. */
201 static int output_reloadnum;
203 /* Compare two RTX's. */
204 #define MATCHES(x, y) \
205 (x == y || (x != 0 && (GET_CODE (x) == REG \
206 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
207 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209 /* Indicates if two reloads purposes are for similar enough things that we
210 can merge their reloads. */
211 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
212 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
213 || ((when1) == (when2) && (op1) == (op2)) \
214 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
215 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
216 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
217 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
218 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
221 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
222 ((when1) != (when2) \
223 || ! ((op1) == (op2) \
224 || (when1) == RELOAD_FOR_INPUT \
225 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228 /* If we are going to reload an address, compute the reload type to
229 use. */
230 #define ADDR_TYPE(type) \
231 ((type) == RELOAD_FOR_INPUT_ADDRESS \
232 ? RELOAD_FOR_INPADDR_ADDRESS \
233 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
234 ? RELOAD_FOR_OUTADDR_ADDRESS \
235 : (type)))
237 #ifdef HAVE_SECONDARY_RELOADS
238 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
239 enum machine_mode, enum reload_type,
240 enum insn_code *);
241 #endif
242 static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
243 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
244 static void push_replacement (rtx *, int, enum machine_mode);
245 static void dup_replacements (rtx *, rtx *);
246 static void combine_reloads (void);
247 static int find_reusable_reload (rtx *, rtx, enum reg_class,
248 enum reload_type, int, int);
249 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
250 enum machine_mode, enum reg_class, int, int);
251 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
252 static struct decomposition decompose (rtx);
253 static int immune_p (rtx, rtx, struct decomposition);
254 static int alternative_allows_memconst (const char *, int);
255 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
256 int *);
257 static rtx make_memloc (rtx, int);
258 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
259 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
260 int, enum reload_type, int, rtx);
261 static rtx subst_reg_equivs (rtx, rtx);
262 static rtx subst_indexed_address (rtx);
263 static void update_auto_inc_notes (rtx, int, int);
264 static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
265 int, enum reload_type,int, rtx);
266 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
267 enum machine_mode, int,
268 enum reload_type, int);
269 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
270 int, rtx);
271 static void copy_replacements_1 (rtx *, rtx *, int);
272 static int find_inc_amount (rtx, rtx);
274 #ifdef HAVE_SECONDARY_RELOADS
276 /* Determine if any secondary reloads are needed for loading (if IN_P is
277 nonzero) or storing (if IN_P is zero) X to or from a reload register of
278 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
279 are needed, push them.
281 Return the reload number of the secondary reload we made, or -1 if
282 we didn't need one. *PICODE is set to the insn_code to use if we do
283 need a secondary reload. */
285 static int
286 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
287 enum reg_class reload_class,
288 enum machine_mode reload_mode, enum reload_type type,
289 enum insn_code *picode)
291 enum reg_class class = NO_REGS;
292 enum machine_mode mode = reload_mode;
293 enum insn_code icode = CODE_FOR_nothing;
294 enum reg_class t_class = NO_REGS;
295 enum machine_mode t_mode = VOIDmode;
296 enum insn_code t_icode = CODE_FOR_nothing;
297 enum reload_type secondary_type;
298 int s_reload, t_reload = -1;
300 if (type == RELOAD_FOR_INPUT_ADDRESS
301 || type == RELOAD_FOR_OUTPUT_ADDRESS
302 || type == RELOAD_FOR_INPADDR_ADDRESS
303 || type == RELOAD_FOR_OUTADDR_ADDRESS)
304 secondary_type = type;
305 else
306 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
308 *picode = CODE_FOR_nothing;
310 /* If X is a paradoxical SUBREG, use the inner value to determine both the
311 mode and object being reloaded. */
312 if (GET_CODE (x) == SUBREG
313 && (GET_MODE_SIZE (GET_MODE (x))
314 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
316 x = SUBREG_REG (x);
317 reload_mode = GET_MODE (x);
320 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
321 is still a pseudo-register by now, it *must* have an equivalent MEM
322 but we don't want to assume that), use that equivalent when seeing if
323 a secondary reload is needed since whether or not a reload is needed
324 might be sensitive to the form of the MEM. */
326 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
327 && reg_equiv_mem[REGNO (x)] != 0)
328 x = reg_equiv_mem[REGNO (x)];
330 #ifdef SECONDARY_INPUT_RELOAD_CLASS
331 if (in_p)
332 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
333 #endif
335 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
336 if (! in_p)
337 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
338 #endif
340 /* If we don't need any secondary registers, done. */
341 if (class == NO_REGS)
342 return -1;
344 /* Get a possible insn to use. If the predicate doesn't accept X, don't
345 use the insn. */
347 icode = (in_p ? reload_in_optab[(int) reload_mode]
348 : reload_out_optab[(int) reload_mode]);
350 if (icode != CODE_FOR_nothing
351 && insn_data[(int) icode].operand[in_p].predicate
352 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
353 icode = CODE_FOR_nothing;
355 /* If we will be using an insn, see if it can directly handle the reload
356 register we will be using. If it can, the secondary reload is for a
357 scratch register. If it can't, we will use the secondary reload for
358 an intermediate register and require a tertiary reload for the scratch
359 register. */
361 if (icode != CODE_FOR_nothing)
363 /* If IN_P is nonzero, the reload register will be the output in
364 operand 0. If IN_P is zero, the reload register will be the input
365 in operand 1. Outputs should have an initial "=", which we must
366 skip. */
368 enum reg_class insn_class;
370 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
371 insn_class = ALL_REGS;
372 else
374 const char *insn_constraint
375 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
376 char insn_letter = *insn_constraint;
377 insn_class
378 = (insn_letter == 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
380 insn_constraint));
382 if (insn_class == NO_REGS)
383 abort ();
384 if (in_p
385 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
386 abort ();
389 /* The scratch register's constraint must start with "=&". */
390 if (insn_data[(int) icode].operand[2].constraint[0] != '='
391 || insn_data[(int) icode].operand[2].constraint[1] != '&')
392 abort ();
394 if (reg_class_subset_p (reload_class, insn_class))
395 mode = insn_data[(int) icode].operand[2].mode;
396 else
398 const char *t_constraint
399 = &insn_data[(int) icode].operand[2].constraint[2];
400 char t_letter = *t_constraint;
401 class = insn_class;
402 t_mode = insn_data[(int) icode].operand[2].mode;
403 t_class = (t_letter == 'r' ? GENERAL_REGS
404 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
405 t_constraint));
406 t_icode = icode;
407 icode = CODE_FOR_nothing;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
420 other way.
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 if (in_p && class == reload_class && icode == CODE_FOR_nothing
426 && t_icode == CODE_FOR_nothing)
427 abort ();
429 /* If we need a tertiary reload, see if we have one we can reuse or else
430 make a new one. */
432 if (t_class != NO_REGS)
434 for (t_reload = 0; t_reload < n_reloads; t_reload++)
435 if (rld[t_reload].secondary_p
436 && (reg_class_subset_p (t_class, rld[t_reload].class)
437 || reg_class_subset_p (rld[t_reload].class, t_class))
438 && ((in_p && rld[t_reload].inmode == t_mode)
439 || (! in_p && rld[t_reload].outmode == t_mode))
440 && ((in_p && (rld[t_reload].secondary_in_icode
441 == CODE_FOR_nothing))
442 || (! in_p &&(rld[t_reload].secondary_out_icode
443 == CODE_FOR_nothing)))
444 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
445 && MERGABLE_RELOADS (secondary_type,
446 rld[t_reload].when_needed,
447 opnum, rld[t_reload].opnum))
449 if (in_p)
450 rld[t_reload].inmode = t_mode;
451 if (! in_p)
452 rld[t_reload].outmode = t_mode;
454 if (reg_class_subset_p (t_class, rld[t_reload].class))
455 rld[t_reload].class = t_class;
457 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
458 rld[t_reload].optional &= optional;
459 rld[t_reload].secondary_p = 1;
460 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
461 opnum, rld[t_reload].opnum))
462 rld[t_reload].when_needed = RELOAD_OTHER;
465 if (t_reload == n_reloads)
467 /* We need to make a new tertiary reload for this register class. */
468 rld[t_reload].in = rld[t_reload].out = 0;
469 rld[t_reload].class = t_class;
470 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
471 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
472 rld[t_reload].reg_rtx = 0;
473 rld[t_reload].optional = optional;
474 rld[t_reload].inc = 0;
475 /* Maybe we could combine these, but it seems too tricky. */
476 rld[t_reload].nocombine = 1;
477 rld[t_reload].in_reg = 0;
478 rld[t_reload].out_reg = 0;
479 rld[t_reload].opnum = opnum;
480 rld[t_reload].when_needed = secondary_type;
481 rld[t_reload].secondary_in_reload = -1;
482 rld[t_reload].secondary_out_reload = -1;
483 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
484 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
485 rld[t_reload].secondary_p = 1;
487 n_reloads++;
491 /* See if we can reuse an existing secondary reload. */
492 for (s_reload = 0; s_reload < n_reloads; s_reload++)
493 if (rld[s_reload].secondary_p
494 && (reg_class_subset_p (class, rld[s_reload].class)
495 || reg_class_subset_p (rld[s_reload].class, class))
496 && ((in_p && rld[s_reload].inmode == mode)
497 || (! in_p && rld[s_reload].outmode == mode))
498 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
499 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
500 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
501 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
502 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
503 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
504 opnum, rld[s_reload].opnum))
506 if (in_p)
507 rld[s_reload].inmode = mode;
508 if (! in_p)
509 rld[s_reload].outmode = mode;
511 if (reg_class_subset_p (class, rld[s_reload].class))
512 rld[s_reload].class = class;
514 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
515 rld[s_reload].optional &= optional;
516 rld[s_reload].secondary_p = 1;
517 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
518 opnum, rld[s_reload].opnum))
519 rld[s_reload].when_needed = RELOAD_OTHER;
522 if (s_reload == n_reloads)
524 #ifdef SECONDARY_MEMORY_NEEDED
525 /* If we need a memory location to copy between the two reload regs,
526 set it up now. Note that we do the input case before making
527 the reload and the output case after. This is due to the
528 way reloads are output. */
530 if (in_p && icode == CODE_FOR_nothing
531 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
533 get_secondary_mem (x, reload_mode, opnum, type);
535 /* We may have just added new reloads. Make sure we add
536 the new reload at the end. */
537 s_reload = n_reloads;
539 #endif
541 /* We need to make a new secondary reload for this register class. */
542 rld[s_reload].in = rld[s_reload].out = 0;
543 rld[s_reload].class = class;
545 rld[s_reload].inmode = in_p ? mode : VOIDmode;
546 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
547 rld[s_reload].reg_rtx = 0;
548 rld[s_reload].optional = optional;
549 rld[s_reload].inc = 0;
550 /* Maybe we could combine these, but it seems too tricky. */
551 rld[s_reload].nocombine = 1;
552 rld[s_reload].in_reg = 0;
553 rld[s_reload].out_reg = 0;
554 rld[s_reload].opnum = opnum;
555 rld[s_reload].when_needed = secondary_type;
556 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
557 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
558 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
559 rld[s_reload].secondary_out_icode
560 = ! in_p ? t_icode : CODE_FOR_nothing;
561 rld[s_reload].secondary_p = 1;
563 n_reloads++;
565 #ifdef SECONDARY_MEMORY_NEEDED
566 if (! in_p && icode == CODE_FOR_nothing
567 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
568 get_secondary_mem (x, mode, opnum, type);
569 #endif
572 *picode = icode;
573 return s_reload;
575 #endif /* HAVE_SECONDARY_RELOADS */
577 #ifdef SECONDARY_MEMORY_NEEDED
579 /* Return a memory location that will be used to copy X in mode MODE.
580 If we haven't already made a location for this mode in this insn,
581 call find_reloads_address on the location being returned. */
584 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
585 int opnum, enum reload_type type)
587 rtx loc;
588 int mem_valid;
590 /* By default, if MODE is narrower than a word, widen it to a word.
591 This is required because most machines that require these memory
592 locations do not support short load and stores from all registers
593 (e.g., FP registers). */
595 #ifdef SECONDARY_MEMORY_NEEDED_MODE
596 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
597 #else
598 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
599 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
600 #endif
602 /* If we already have made a MEM for this operand in MODE, return it. */
603 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
604 return secondary_memlocs_elim[(int) mode][opnum];
606 /* If this is the first time we've tried to get a MEM for this mode,
607 allocate a new one. `something_changed' in reload will get set
608 by noticing that the frame size has changed. */
610 if (secondary_memlocs[(int) mode] == 0)
612 #ifdef SECONDARY_MEMORY_NEEDED_RTX
613 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
614 #else
615 secondary_memlocs[(int) mode]
616 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
617 #endif
620 /* Get a version of the address doing any eliminations needed. If that
621 didn't give us a new MEM, make a new one if it isn't valid. */
623 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
624 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
626 if (! mem_valid && loc == secondary_memlocs[(int) mode])
627 loc = copy_rtx (loc);
629 /* The only time the call below will do anything is if the stack
630 offset is too large. In that case IND_LEVELS doesn't matter, so we
631 can just pass a zero. Adjust the type to be the address of the
632 corresponding object. If the address was valid, save the eliminated
633 address. If it wasn't valid, we need to make a reload each time, so
634 don't save it. */
636 if (! mem_valid)
638 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
639 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
640 : RELOAD_OTHER);
642 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
643 opnum, type, 0, 0);
646 secondary_memlocs_elim[(int) mode][opnum] = loc;
647 return loc;
650 /* Clear any secondary memory locations we've made. */
652 void
653 clear_secondary_mem (void)
655 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
657 #endif /* SECONDARY_MEMORY_NEEDED */
659 /* Find the largest class for which every register number plus N is valid in
660 M1 (if in range) and is cheap to move into REGNO.
661 Abort if no such class exists. */
663 static enum reg_class
664 find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
665 unsigned int dest_regno ATTRIBUTE_UNUSED)
667 int best_cost = -1;
668 int class;
669 int regno;
670 enum reg_class best_class = NO_REGS;
671 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
672 unsigned int best_size = 0;
673 int cost;
675 for (class = 1; class < N_REG_CLASSES; class++)
677 int bad = 0;
678 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
679 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
680 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
681 && ! HARD_REGNO_MODE_OK (regno + n, m1))
682 bad = 1;
684 if (bad)
685 continue;
686 cost = REGISTER_MOVE_COST (m1, class, dest_class);
688 if ((reg_class_size[class] > best_size
689 && (best_cost < 0 || best_cost >= cost))
690 || best_cost > cost)
692 best_class = class;
693 best_size = reg_class_size[class];
694 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
698 if (best_size == 0)
699 abort ();
701 return best_class;
704 /* Return the number of a previously made reload that can be combined with
705 a new one, or n_reloads if none of the existing reloads can be used.
706 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
707 push_reload, they determine the kind of the new reload that we try to
708 combine. P_IN points to the corresponding value of IN, which can be
709 modified by this function.
710 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
712 static int
713 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
714 enum reload_type type, int opnum, int dont_share)
716 rtx in = *p_in;
717 int i;
718 /* We can't merge two reloads if the output of either one is
719 earlyclobbered. */
721 if (earlyclobber_operand_p (out))
722 return n_reloads;
724 /* We can use an existing reload if the class is right
725 and at least one of IN and OUT is a match
726 and the other is at worst neutral.
727 (A zero compared against anything is neutral.)
729 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
730 for the same thing since that can cause us to need more reload registers
731 than we otherwise would. */
733 for (i = 0; i < n_reloads; i++)
734 if ((reg_class_subset_p (class, rld[i].class)
735 || reg_class_subset_p (rld[i].class, class))
736 /* If the existing reload has a register, it must fit our class. */
737 && (rld[i].reg_rtx == 0
738 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
739 true_regnum (rld[i].reg_rtx)))
740 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
741 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
742 || (out != 0 && MATCHES (rld[i].out, out)
743 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
744 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
745 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
746 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
747 return i;
749 /* Reloading a plain reg for input can match a reload to postincrement
750 that reg, since the postincrement's value is the right value.
751 Likewise, it can match a preincrement reload, since we regard
752 the preincrementation as happening before any ref in this insn
753 to that register. */
754 for (i = 0; i < n_reloads; i++)
755 if ((reg_class_subset_p (class, rld[i].class)
756 || reg_class_subset_p (rld[i].class, class))
757 /* If the existing reload has a register, it must fit our
758 class. */
759 && (rld[i].reg_rtx == 0
760 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
761 true_regnum (rld[i].reg_rtx)))
762 && out == 0 && rld[i].out == 0 && rld[i].in != 0
763 && ((GET_CODE (in) == REG
764 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
765 && MATCHES (XEXP (rld[i].in, 0), in))
766 || (GET_CODE (rld[i].in) == REG
767 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
768 && MATCHES (XEXP (in, 0), rld[i].in)))
769 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
770 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
771 && MERGABLE_RELOADS (type, rld[i].when_needed,
772 opnum, rld[i].opnum))
774 /* Make sure reload_in ultimately has the increment,
775 not the plain register. */
776 if (GET_CODE (in) == REG)
777 *p_in = rld[i].in;
778 return i;
780 return n_reloads;
783 /* Return nonzero if X is a SUBREG which will require reloading of its
784 SUBREG_REG expression. */
786 static int
787 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
789 rtx inner;
791 /* Only SUBREGs are problematical. */
792 if (GET_CODE (x) != SUBREG)
793 return 0;
795 inner = SUBREG_REG (x);
797 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
798 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
799 return 1;
801 /* If INNER is not a hard register, then INNER will not need to
802 be reloaded. */
803 if (GET_CODE (inner) != REG
804 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
805 return 0;
807 /* If INNER is not ok for MODE, then INNER will need reloading. */
808 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
809 return 1;
811 /* If the outer part is a word or smaller, INNER larger than a
812 word and the number of regs for INNER is not the same as the
813 number of words in INNER, then INNER will need reloading. */
814 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
815 && output
816 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
817 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
818 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
821 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
822 requiring an extra reload register. The caller has already found that
823 IN contains some reference to REGNO, so check that we can produce the
824 new value in a single step. E.g. if we have
825 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
826 instruction that adds one to a register, this should succeed.
827 However, if we have something like
828 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
829 needs to be loaded into a register first, we need a separate reload
830 register.
831 Such PLUS reloads are generated by find_reload_address_part.
832 The out-of-range PLUS expressions are usually introduced in the instruction
833 patterns by register elimination and substituting pseudos without a home
834 by their function-invariant equivalences. */
835 static int
836 can_reload_into (rtx in, int regno, enum machine_mode mode)
838 rtx dst, test_insn;
839 int r = 0;
840 struct recog_data save_recog_data;
842 /* For matching constraints, we often get notional input reloads where
843 we want to use the original register as the reload register. I.e.
844 technically this is a non-optional input-output reload, but IN is
845 already a valid register, and has been chosen as the reload register.
846 Speed this up, since it trivially works. */
847 if (GET_CODE (in) == REG)
848 return 1;
850 /* To test MEMs properly, we'd have to take into account all the reloads
851 that are already scheduled, which can become quite complicated.
852 And since we've already handled address reloads for this MEM, it
853 should always succeed anyway. */
854 if (GET_CODE (in) == MEM)
855 return 1;
857 /* If we can make a simple SET insn that does the job, everything should
858 be fine. */
859 dst = gen_rtx_REG (mode, regno);
860 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
861 save_recog_data = recog_data;
862 if (recog_memoized (test_insn) >= 0)
864 extract_insn (test_insn);
865 r = constrain_operands (1);
867 recog_data = save_recog_data;
868 return r;
871 /* Record one reload that needs to be performed.
872 IN is an rtx saying where the data are to be found before this instruction.
873 OUT says where they must be stored after the instruction.
874 (IN is zero for data not read, and OUT is zero for data not written.)
875 INLOC and OUTLOC point to the places in the instructions where
876 IN and OUT were found.
877 If IN and OUT are both nonzero, it means the same register must be used
878 to reload both IN and OUT.
880 CLASS is a register class required for the reloaded data.
881 INMODE is the machine mode that the instruction requires
882 for the reg that replaces IN and OUTMODE is likewise for OUT.
884 If IN is zero, then OUT's location and mode should be passed as
885 INLOC and INMODE.
887 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
889 OPTIONAL nonzero means this reload does not need to be performed:
890 it can be discarded if that is more convenient.
892 OPNUM and TYPE say what the purpose of this reload is.
894 The return value is the reload-number for this reload.
896 If both IN and OUT are nonzero, in some rare cases we might
897 want to make two separate reloads. (Actually we never do this now.)
898 Therefore, the reload-number for OUT is stored in
899 output_reloadnum when we return; the return value applies to IN.
900 Usually (presently always), when IN and OUT are nonzero,
901 the two reload-numbers are equal, but the caller should be careful to
902 distinguish them. */
905 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
906 enum reg_class class, enum machine_mode inmode,
907 enum machine_mode outmode, int strict_low, int optional,
908 int opnum, enum reload_type type)
910 int i;
911 int dont_share = 0;
912 int dont_remove_subreg = 0;
913 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
914 int secondary_in_reload = -1, secondary_out_reload = -1;
915 enum insn_code secondary_in_icode = CODE_FOR_nothing;
916 enum insn_code secondary_out_icode = CODE_FOR_nothing;
918 /* INMODE and/or OUTMODE could be VOIDmode if no mode
919 has been specified for the operand. In that case,
920 use the operand's mode as the mode to reload. */
921 if (inmode == VOIDmode && in != 0)
922 inmode = GET_MODE (in);
923 if (outmode == VOIDmode && out != 0)
924 outmode = GET_MODE (out);
926 /* If IN is a pseudo register everywhere-equivalent to a constant, and
927 it is not in a hard register, reload straight from the constant,
928 since we want to get rid of such pseudo registers.
929 Often this is done earlier, but not always in find_reloads_address. */
930 if (in != 0 && GET_CODE (in) == REG)
932 int regno = REGNO (in);
934 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
935 && reg_equiv_constant[regno] != 0)
936 in = reg_equiv_constant[regno];
939 /* Likewise for OUT. Of course, OUT will never be equivalent to
940 an actual constant, but it might be equivalent to a memory location
941 (in the case of a parameter). */
942 if (out != 0 && GET_CODE (out) == REG)
944 int regno = REGNO (out);
946 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
947 && reg_equiv_constant[regno] != 0)
948 out = reg_equiv_constant[regno];
951 /* If we have a read-write operand with an address side-effect,
952 change either IN or OUT so the side-effect happens only once. */
953 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
954 switch (GET_CODE (XEXP (in, 0)))
956 case POST_INC: case POST_DEC: case POST_MODIFY:
957 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
958 break;
960 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
961 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
962 break;
964 default:
965 break;
968 /* If we are reloading a (SUBREG constant ...), really reload just the
969 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
970 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
971 a pseudo and hence will become a MEM) with M1 wider than M2 and the
972 register is a pseudo, also reload the inside expression.
973 For machines that extend byte loads, do this for any SUBREG of a pseudo
974 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
975 M2 is an integral mode that gets extended when loaded.
976 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
977 either M1 is not valid for R or M2 is wider than a word but we only
978 need one word to store an M2-sized quantity in R.
979 (However, if OUT is nonzero, we need to reload the reg *and*
980 the subreg, so do nothing here, and let following statement handle it.)
982 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
983 we can't handle it here because CONST_INT does not indicate a mode.
985 Similarly, we must reload the inside expression if we have a
986 STRICT_LOW_PART (presumably, in == out in the cas).
988 Also reload the inner expression if it does not require a secondary
989 reload but the SUBREG does.
991 Finally, reload the inner expression if it is a register that is in
992 the class whose registers cannot be referenced in a different size
993 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
994 cannot reload just the inside since we might end up with the wrong
995 register class. But if it is inside a STRICT_LOW_PART, we have
996 no choice, so we hope we do get the right register class there. */
998 if (in != 0 && GET_CODE (in) == SUBREG
999 && (subreg_lowpart_p (in) || strict_low)
1000 #ifdef CANNOT_CHANGE_MODE_CLASS
1001 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1002 #endif
1003 && (CONSTANT_P (SUBREG_REG (in))
1004 || GET_CODE (SUBREG_REG (in)) == PLUS
1005 || strict_low
1006 || (((GET_CODE (SUBREG_REG (in)) == REG
1007 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1008 || GET_CODE (SUBREG_REG (in)) == MEM)
1009 && ((GET_MODE_SIZE (inmode)
1010 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1011 #ifdef LOAD_EXTEND_OP
1012 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1014 <= UNITS_PER_WORD)
1015 && (GET_MODE_SIZE (inmode)
1016 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1017 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1018 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
1019 #endif
1020 #ifdef WORD_REGISTER_OPERATIONS
1021 || ((GET_MODE_SIZE (inmode)
1022 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1023 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1024 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1025 / UNITS_PER_WORD)))
1026 #endif
1028 || (GET_CODE (SUBREG_REG (in)) == REG
1029 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1030 /* The case where out is nonzero
1031 is handled differently in the following statement. */
1032 && (out == 0 || subreg_lowpart_p (in))
1033 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1034 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1035 > UNITS_PER_WORD)
1036 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1037 / UNITS_PER_WORD)
1038 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1039 GET_MODE (SUBREG_REG (in)))))
1040 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1041 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1042 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1043 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1044 GET_MODE (SUBREG_REG (in)),
1045 SUBREG_REG (in))
1046 == NO_REGS))
1047 #endif
1048 #ifdef CANNOT_CHANGE_MODE_CLASS
1049 || (GET_CODE (SUBREG_REG (in)) == REG
1050 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1051 && REG_CANNOT_CHANGE_MODE_P
1052 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1053 #endif
1056 in_subreg_loc = inloc;
1057 inloc = &SUBREG_REG (in);
1058 in = *inloc;
1059 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1060 if (GET_CODE (in) == MEM)
1061 /* This is supposed to happen only for paradoxical subregs made by
1062 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1063 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1064 abort ();
1065 #endif
1066 inmode = GET_MODE (in);
1069 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1070 either M1 is not valid for R or M2 is wider than a word but we only
1071 need one word to store an M2-sized quantity in R.
1073 However, we must reload the inner reg *as well as* the subreg in
1074 that case. */
1076 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1077 code above. This can happen if SUBREG_BYTE != 0. */
1079 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1081 enum reg_class in_class = class;
1083 if (GET_CODE (SUBREG_REG (in)) == REG)
1084 in_class
1085 = find_valid_class (inmode,
1086 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1087 GET_MODE (SUBREG_REG (in)),
1088 SUBREG_BYTE (in),
1089 GET_MODE (in)),
1090 REGNO (SUBREG_REG (in)));
1092 /* This relies on the fact that emit_reload_insns outputs the
1093 instructions for input reloads of type RELOAD_OTHER in the same
1094 order as the reloads. Thus if the outer reload is also of type
1095 RELOAD_OTHER, we are guaranteed that this inner reload will be
1096 output before the outer reload. */
1097 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1098 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1099 dont_remove_subreg = 1;
1102 /* Similarly for paradoxical and problematical SUBREGs on the output.
1103 Note that there is no reason we need worry about the previous value
1104 of SUBREG_REG (out); even if wider than out,
1105 storing in a subreg is entitled to clobber it all
1106 (except in the case of STRICT_LOW_PART,
1107 and in that case the constraint should label it input-output.) */
1108 if (out != 0 && GET_CODE (out) == SUBREG
1109 && (subreg_lowpart_p (out) || strict_low)
1110 #ifdef CANNOT_CHANGE_MODE_CLASS
1111 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1112 #endif
1113 && (CONSTANT_P (SUBREG_REG (out))
1114 || strict_low
1115 || (((GET_CODE (SUBREG_REG (out)) == REG
1116 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1117 || GET_CODE (SUBREG_REG (out)) == MEM)
1118 && ((GET_MODE_SIZE (outmode)
1119 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1120 #ifdef WORD_REGISTER_OPERATIONS
1121 || ((GET_MODE_SIZE (outmode)
1122 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1123 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1124 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1125 / UNITS_PER_WORD)))
1126 #endif
1128 || (GET_CODE (SUBREG_REG (out)) == REG
1129 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1130 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1131 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1132 > UNITS_PER_WORD)
1133 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1134 / UNITS_PER_WORD)
1135 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1136 GET_MODE (SUBREG_REG (out)))))
1137 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1138 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1139 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1140 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1141 GET_MODE (SUBREG_REG (out)),
1142 SUBREG_REG (out))
1143 == NO_REGS))
1144 #endif
1145 #ifdef CANNOT_CHANGE_MODE_CLASS
1146 || (GET_CODE (SUBREG_REG (out)) == REG
1147 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1148 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1149 GET_MODE (SUBREG_REG (out)),
1150 outmode))
1151 #endif
1154 out_subreg_loc = outloc;
1155 outloc = &SUBREG_REG (out);
1156 out = *outloc;
1157 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1158 if (GET_CODE (out) == MEM
1159 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1160 abort ();
1161 #endif
1162 outmode = GET_MODE (out);
1165 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1166 either M1 is not valid for R or M2 is wider than a word but we only
1167 need one word to store an M2-sized quantity in R.
1169 However, we must reload the inner reg *as well as* the subreg in
1170 that case. In this case, the inner reg is an in-out reload. */
1172 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1174 /* This relies on the fact that emit_reload_insns outputs the
1175 instructions for output reloads of type RELOAD_OTHER in reverse
1176 order of the reloads. Thus if the outer reload is also of type
1177 RELOAD_OTHER, we are guaranteed that this inner reload will be
1178 output after the outer reload. */
1179 dont_remove_subreg = 1;
1180 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1181 &SUBREG_REG (out),
1182 find_valid_class (outmode,
1183 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1184 GET_MODE (SUBREG_REG (out)),
1185 SUBREG_BYTE (out),
1186 GET_MODE (out)),
1187 REGNO (SUBREG_REG (out))),
1188 VOIDmode, VOIDmode, 0, 0,
1189 opnum, RELOAD_OTHER);
1192 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1193 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1194 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1195 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1196 dont_share = 1;
1198 /* If IN is a SUBREG of a hard register, make a new REG. This
1199 simplifies some of the cases below. */
1201 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1202 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1203 && ! dont_remove_subreg)
1204 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1206 /* Similarly for OUT. */
1207 if (out != 0 && GET_CODE (out) == SUBREG
1208 && GET_CODE (SUBREG_REG (out)) == REG
1209 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1210 && ! dont_remove_subreg)
1211 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1213 /* Narrow down the class of register wanted if that is
1214 desirable on this machine for efficiency. */
1215 if (in != 0)
1216 class = PREFERRED_RELOAD_CLASS (in, class);
1218 /* Output reloads may need analogous treatment, different in detail. */
1219 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1220 if (out != 0)
1221 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1222 #endif
1224 /* Make sure we use a class that can handle the actual pseudo
1225 inside any subreg. For example, on the 386, QImode regs
1226 can appear within SImode subregs. Although GENERAL_REGS
1227 can handle SImode, QImode needs a smaller class. */
1228 #ifdef LIMIT_RELOAD_CLASS
1229 if (in_subreg_loc)
1230 class = LIMIT_RELOAD_CLASS (inmode, class);
1231 else if (in != 0 && GET_CODE (in) == SUBREG)
1232 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1234 if (out_subreg_loc)
1235 class = LIMIT_RELOAD_CLASS (outmode, class);
1236 if (out != 0 && GET_CODE (out) == SUBREG)
1237 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1238 #endif
1240 /* Verify that this class is at least possible for the mode that
1241 is specified. */
1242 if (this_insn_is_asm)
1244 enum machine_mode mode;
1245 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1246 mode = inmode;
1247 else
1248 mode = outmode;
1249 if (mode == VOIDmode)
1251 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1252 mode = word_mode;
1253 if (in != 0)
1254 inmode = word_mode;
1255 if (out != 0)
1256 outmode = word_mode;
1258 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1259 if (HARD_REGNO_MODE_OK (i, mode)
1260 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1262 int nregs = HARD_REGNO_NREGS (i, mode);
1264 int j;
1265 for (j = 1; j < nregs; j++)
1266 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1267 break;
1268 if (j == nregs)
1269 break;
1271 if (i == FIRST_PSEUDO_REGISTER)
1273 error_for_asm (this_insn, "impossible register constraint in `asm'");
1274 class = ALL_REGS;
1278 /* Optional output reloads are always OK even if we have no register class,
1279 since the function of these reloads is only to have spill_reg_store etc.
1280 set, so that the storing insn can be deleted later. */
1281 if (class == NO_REGS
1282 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1283 abort ();
1285 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1287 if (i == n_reloads)
1289 /* See if we need a secondary reload register to move between CLASS
1290 and IN or CLASS and OUT. Get the icode and push any required reloads
1291 needed for each of them if so. */
1293 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1294 if (in != 0)
1295 secondary_in_reload
1296 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1297 &secondary_in_icode);
1298 #endif
1300 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1301 if (out != 0 && GET_CODE (out) != SCRATCH)
1302 secondary_out_reload
1303 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1304 type, &secondary_out_icode);
1305 #endif
1307 /* We found no existing reload suitable for re-use.
1308 So add an additional reload. */
1310 #ifdef SECONDARY_MEMORY_NEEDED
1311 /* If a memory location is needed for the copy, make one. */
1312 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1313 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1314 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1315 class, inmode))
1316 get_secondary_mem (in, inmode, opnum, type);
1317 #endif
1319 i = n_reloads;
1320 rld[i].in = in;
1321 rld[i].out = out;
1322 rld[i].class = class;
1323 rld[i].inmode = inmode;
1324 rld[i].outmode = outmode;
1325 rld[i].reg_rtx = 0;
1326 rld[i].optional = optional;
1327 rld[i].inc = 0;
1328 rld[i].nocombine = 0;
1329 rld[i].in_reg = inloc ? *inloc : 0;
1330 rld[i].out_reg = outloc ? *outloc : 0;
1331 rld[i].opnum = opnum;
1332 rld[i].when_needed = type;
1333 rld[i].secondary_in_reload = secondary_in_reload;
1334 rld[i].secondary_out_reload = secondary_out_reload;
1335 rld[i].secondary_in_icode = secondary_in_icode;
1336 rld[i].secondary_out_icode = secondary_out_icode;
1337 rld[i].secondary_p = 0;
1339 n_reloads++;
1341 #ifdef SECONDARY_MEMORY_NEEDED
1342 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1343 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1344 && SECONDARY_MEMORY_NEEDED (class,
1345 REGNO_REG_CLASS (reg_or_subregno (out)),
1346 outmode))
1347 get_secondary_mem (out, outmode, opnum, type);
1348 #endif
1350 else
1352 /* We are reusing an existing reload,
1353 but we may have additional information for it.
1354 For example, we may now have both IN and OUT
1355 while the old one may have just one of them. */
1357 /* The modes can be different. If they are, we want to reload in
1358 the larger mode, so that the value is valid for both modes. */
1359 if (inmode != VOIDmode
1360 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1361 rld[i].inmode = inmode;
1362 if (outmode != VOIDmode
1363 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1364 rld[i].outmode = outmode;
1365 if (in != 0)
1367 rtx in_reg = inloc ? *inloc : 0;
1368 /* If we merge reloads for two distinct rtl expressions that
1369 are identical in content, there might be duplicate address
1370 reloads. Remove the extra set now, so that if we later find
1371 that we can inherit this reload, we can get rid of the
1372 address reloads altogether.
1374 Do not do this if both reloads are optional since the result
1375 would be an optional reload which could potentially leave
1376 unresolved address replacements.
1378 It is not sufficient to call transfer_replacements since
1379 choose_reload_regs will remove the replacements for address
1380 reloads of inherited reloads which results in the same
1381 problem. */
1382 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1383 && ! (rld[i].optional && optional))
1385 /* We must keep the address reload with the lower operand
1386 number alive. */
1387 if (opnum > rld[i].opnum)
1389 remove_address_replacements (in);
1390 in = rld[i].in;
1391 in_reg = rld[i].in_reg;
1393 else
1394 remove_address_replacements (rld[i].in);
1396 rld[i].in = in;
1397 rld[i].in_reg = in_reg;
1399 if (out != 0)
1401 rld[i].out = out;
1402 rld[i].out_reg = outloc ? *outloc : 0;
1404 if (reg_class_subset_p (class, rld[i].class))
1405 rld[i].class = class;
1406 rld[i].optional &= optional;
1407 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1408 opnum, rld[i].opnum))
1409 rld[i].when_needed = RELOAD_OTHER;
1410 rld[i].opnum = MIN (rld[i].opnum, opnum);
1413 /* If the ostensible rtx being reloaded differs from the rtx found
1414 in the location to substitute, this reload is not safe to combine
1415 because we cannot reliably tell whether it appears in the insn. */
1417 if (in != 0 && in != *inloc)
1418 rld[i].nocombine = 1;
1420 #if 0
1421 /* This was replaced by changes in find_reloads_address_1 and the new
1422 function inc_for_reload, which go with a new meaning of reload_inc. */
1424 /* If this is an IN/OUT reload in an insn that sets the CC,
1425 it must be for an autoincrement. It doesn't work to store
1426 the incremented value after the insn because that would clobber the CC.
1427 So we must do the increment of the value reloaded from,
1428 increment it, store it back, then decrement again. */
1429 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1431 out = 0;
1432 rld[i].out = 0;
1433 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1434 /* If we did not find a nonzero amount-to-increment-by,
1435 that contradicts the belief that IN is being incremented
1436 in an address in this insn. */
1437 if (rld[i].inc == 0)
1438 abort ();
1440 #endif
1442 /* If we will replace IN and OUT with the reload-reg,
1443 record where they are located so that substitution need
1444 not do a tree walk. */
1446 if (replace_reloads)
1448 if (inloc != 0)
1450 struct replacement *r = &replacements[n_replacements++];
1451 r->what = i;
1452 r->subreg_loc = in_subreg_loc;
1453 r->where = inloc;
1454 r->mode = inmode;
1456 if (outloc != 0 && outloc != inloc)
1458 struct replacement *r = &replacements[n_replacements++];
1459 r->what = i;
1460 r->where = outloc;
1461 r->subreg_loc = out_subreg_loc;
1462 r->mode = outmode;
1466 /* If this reload is just being introduced and it has both
1467 an incoming quantity and an outgoing quantity that are
1468 supposed to be made to match, see if either one of the two
1469 can serve as the place to reload into.
1471 If one of them is acceptable, set rld[i].reg_rtx
1472 to that one. */
1474 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1476 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1477 inmode, outmode,
1478 rld[i].class, i,
1479 earlyclobber_operand_p (out));
1481 /* If the outgoing register already contains the same value
1482 as the incoming one, we can dispense with loading it.
1483 The easiest way to tell the caller that is to give a phony
1484 value for the incoming operand (same as outgoing one). */
1485 if (rld[i].reg_rtx == out
1486 && (GET_CODE (in) == REG || CONSTANT_P (in))
1487 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1488 static_reload_reg_p, i, inmode))
1489 rld[i].in = out;
1492 /* If this is an input reload and the operand contains a register that
1493 dies in this insn and is used nowhere else, see if it is the right class
1494 to be used for this reload. Use it if so. (This occurs most commonly
1495 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1496 this if it is also an output reload that mentions the register unless
1497 the output is a SUBREG that clobbers an entire register.
1499 Note that the operand might be one of the spill regs, if it is a
1500 pseudo reg and we are in a block where spilling has not taken place.
1501 But if there is no spilling in this block, that is OK.
1502 An explicitly used hard reg cannot be a spill reg. */
1504 if (rld[i].reg_rtx == 0 && in != 0)
1506 rtx note;
1507 int regno;
1508 enum machine_mode rel_mode = inmode;
1510 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1511 rel_mode = outmode;
1513 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1514 if (REG_NOTE_KIND (note) == REG_DEAD
1515 && GET_CODE (XEXP (note, 0)) == REG
1516 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1517 && reg_mentioned_p (XEXP (note, 0), in)
1518 && ! refers_to_regno_for_reload_p (regno,
1519 (regno
1520 + HARD_REGNO_NREGS (regno,
1521 rel_mode)),
1522 PATTERN (this_insn), inloc)
1523 /* If this is also an output reload, IN cannot be used as
1524 the reload register if it is set in this insn unless IN
1525 is also OUT. */
1526 && (out == 0 || in == out
1527 || ! hard_reg_set_here_p (regno,
1528 (regno
1529 + HARD_REGNO_NREGS (regno,
1530 rel_mode)),
1531 PATTERN (this_insn)))
1532 /* ??? Why is this code so different from the previous?
1533 Is there any simple coherent way to describe the two together?
1534 What's going on here. */
1535 && (in != out
1536 || (GET_CODE (in) == SUBREG
1537 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1538 / UNITS_PER_WORD)
1539 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1540 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1541 /* Make sure the operand fits in the reg that dies. */
1542 && (GET_MODE_SIZE (rel_mode)
1543 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1544 && HARD_REGNO_MODE_OK (regno, inmode)
1545 && HARD_REGNO_MODE_OK (regno, outmode))
1547 unsigned int offs;
1548 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1549 HARD_REGNO_NREGS (regno, outmode));
1551 for (offs = 0; offs < nregs; offs++)
1552 if (fixed_regs[regno + offs]
1553 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1554 regno + offs))
1555 break;
1557 if (offs == nregs
1558 && (! (refers_to_regno_for_reload_p
1559 (regno, (regno + HARD_REGNO_NREGS (regno, inmode)),
1560 in, (rtx *)0))
1561 || can_reload_into (in, regno, inmode)))
1563 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1564 break;
1569 if (out)
1570 output_reloadnum = i;
1572 return i;
1575 /* Record an additional place we must replace a value
1576 for which we have already recorded a reload.
1577 RELOADNUM is the value returned by push_reload
1578 when the reload was recorded.
1579 This is used in insn patterns that use match_dup. */
1581 static void
1582 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1584 if (replace_reloads)
1586 struct replacement *r = &replacements[n_replacements++];
1587 r->what = reloadnum;
1588 r->where = loc;
1589 r->subreg_loc = 0;
1590 r->mode = mode;
1594 /* Duplicate any replacement we have recorded to apply at
1595 location ORIG_LOC to also be performed at DUP_LOC.
1596 This is used in insn patterns that use match_dup. */
1598 static void
1599 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1601 int i, n = n_replacements;
1603 for (i = 0; i < n; i++)
1605 struct replacement *r = &replacements[i];
1606 if (r->where == orig_loc)
1607 push_replacement (dup_loc, r->what, r->mode);
1611 /* Transfer all replacements that used to be in reload FROM to be in
1612 reload TO. */
1614 void
1615 transfer_replacements (int to, int from)
1617 int i;
1619 for (i = 0; i < n_replacements; i++)
1620 if (replacements[i].what == from)
1621 replacements[i].what = to;
1624 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1625 or a subpart of it. If we have any replacements registered for IN_RTX,
1626 cancel the reloads that were supposed to load them.
1627 Return nonzero if we canceled any reloads. */
1629 remove_address_replacements (rtx in_rtx)
1631 int i, j;
1632 char reload_flags[MAX_RELOADS];
1633 int something_changed = 0;
1635 memset (reload_flags, 0, sizeof reload_flags);
1636 for (i = 0, j = 0; i < n_replacements; i++)
1638 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1639 reload_flags[replacements[i].what] |= 1;
1640 else
1642 replacements[j++] = replacements[i];
1643 reload_flags[replacements[i].what] |= 2;
1646 /* Note that the following store must be done before the recursive calls. */
1647 n_replacements = j;
1649 for (i = n_reloads - 1; i >= 0; i--)
1651 if (reload_flags[i] == 1)
1653 deallocate_reload_reg (i);
1654 remove_address_replacements (rld[i].in);
1655 rld[i].in = 0;
1656 something_changed = 1;
1659 return something_changed;
1662 /* If there is only one output reload, and it is not for an earlyclobber
1663 operand, try to combine it with a (logically unrelated) input reload
1664 to reduce the number of reload registers needed.
1666 This is safe if the input reload does not appear in
1667 the value being output-reloaded, because this implies
1668 it is not needed any more once the original insn completes.
1670 If that doesn't work, see we can use any of the registers that
1671 die in this insn as a reload register. We can if it is of the right
1672 class and does not appear in the value being output-reloaded. */
1674 static void
1675 combine_reloads (void)
1677 int i;
1678 int output_reload = -1;
1679 int secondary_out = -1;
1680 rtx note;
1682 /* Find the output reload; return unless there is exactly one
1683 and that one is mandatory. */
1685 for (i = 0; i < n_reloads; i++)
1686 if (rld[i].out != 0)
1688 if (output_reload >= 0)
1689 return;
1690 output_reload = i;
1693 if (output_reload < 0 || rld[output_reload].optional)
1694 return;
1696 /* An input-output reload isn't combinable. */
1698 if (rld[output_reload].in != 0)
1699 return;
1701 /* If this reload is for an earlyclobber operand, we can't do anything. */
1702 if (earlyclobber_operand_p (rld[output_reload].out))
1703 return;
1705 /* If there is a reload for part of the address of this operand, we would
1706 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1707 its life to the point where doing this combine would not lower the
1708 number of spill registers needed. */
1709 for (i = 0; i < n_reloads; i++)
1710 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1711 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1712 && rld[i].opnum == rld[output_reload].opnum)
1713 return;
1715 /* Check each input reload; can we combine it? */
1717 for (i = 0; i < n_reloads; i++)
1718 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1719 /* Life span of this reload must not extend past main insn. */
1720 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1721 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1722 && rld[i].when_needed != RELOAD_OTHER
1723 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1724 == CLASS_MAX_NREGS (rld[output_reload].class,
1725 rld[output_reload].outmode))
1726 && rld[i].inc == 0
1727 && rld[i].reg_rtx == 0
1728 #ifdef SECONDARY_MEMORY_NEEDED
1729 /* Don't combine two reloads with different secondary
1730 memory locations. */
1731 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1732 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1733 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1734 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1735 #endif
1736 && (SMALL_REGISTER_CLASSES
1737 ? (rld[i].class == rld[output_reload].class)
1738 : (reg_class_subset_p (rld[i].class,
1739 rld[output_reload].class)
1740 || reg_class_subset_p (rld[output_reload].class,
1741 rld[i].class)))
1742 && (MATCHES (rld[i].in, rld[output_reload].out)
1743 /* Args reversed because the first arg seems to be
1744 the one that we imagine being modified
1745 while the second is the one that might be affected. */
1746 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1747 rld[i].in)
1748 /* However, if the input is a register that appears inside
1749 the output, then we also can't share.
1750 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1751 If the same reload reg is used for both reg 69 and the
1752 result to be stored in memory, then that result
1753 will clobber the address of the memory ref. */
1754 && ! (GET_CODE (rld[i].in) == REG
1755 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1756 rld[output_reload].out))))
1757 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1758 rld[i].when_needed != RELOAD_FOR_INPUT)
1759 && (reg_class_size[(int) rld[i].class]
1760 || SMALL_REGISTER_CLASSES)
1761 /* We will allow making things slightly worse by combining an
1762 input and an output, but no worse than that. */
1763 && (rld[i].when_needed == RELOAD_FOR_INPUT
1764 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1766 int j;
1768 /* We have found a reload to combine with! */
1769 rld[i].out = rld[output_reload].out;
1770 rld[i].out_reg = rld[output_reload].out_reg;
1771 rld[i].outmode = rld[output_reload].outmode;
1772 /* Mark the old output reload as inoperative. */
1773 rld[output_reload].out = 0;
1774 /* The combined reload is needed for the entire insn. */
1775 rld[i].when_needed = RELOAD_OTHER;
1776 /* If the output reload had a secondary reload, copy it. */
1777 if (rld[output_reload].secondary_out_reload != -1)
1779 rld[i].secondary_out_reload
1780 = rld[output_reload].secondary_out_reload;
1781 rld[i].secondary_out_icode
1782 = rld[output_reload].secondary_out_icode;
1785 #ifdef SECONDARY_MEMORY_NEEDED
1786 /* Copy any secondary MEM. */
1787 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1788 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1789 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1790 #endif
1791 /* If required, minimize the register class. */
1792 if (reg_class_subset_p (rld[output_reload].class,
1793 rld[i].class))
1794 rld[i].class = rld[output_reload].class;
1796 /* Transfer all replacements from the old reload to the combined. */
1797 for (j = 0; j < n_replacements; j++)
1798 if (replacements[j].what == output_reload)
1799 replacements[j].what = i;
1801 return;
1804 /* If this insn has only one operand that is modified or written (assumed
1805 to be the first), it must be the one corresponding to this reload. It
1806 is safe to use anything that dies in this insn for that output provided
1807 that it does not occur in the output (we already know it isn't an
1808 earlyclobber. If this is an asm insn, give up. */
1810 if (INSN_CODE (this_insn) == -1)
1811 return;
1813 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1814 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1815 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1816 return;
1818 /* See if some hard register that dies in this insn and is not used in
1819 the output is the right class. Only works if the register we pick
1820 up can fully hold our output reload. */
1821 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1822 if (REG_NOTE_KIND (note) == REG_DEAD
1823 && GET_CODE (XEXP (note, 0)) == REG
1824 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1825 rld[output_reload].out)
1826 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1827 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1828 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1829 REGNO (XEXP (note, 0)))
1830 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1831 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1832 /* Ensure that a secondary or tertiary reload for this output
1833 won't want this register. */
1834 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1835 || (! (TEST_HARD_REG_BIT
1836 (reg_class_contents[(int) rld[secondary_out].class],
1837 REGNO (XEXP (note, 0))))
1838 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1839 || ! (TEST_HARD_REG_BIT
1840 (reg_class_contents[(int) rld[secondary_out].class],
1841 REGNO (XEXP (note, 0)))))))
1842 && ! fixed_regs[REGNO (XEXP (note, 0))])
1844 rld[output_reload].reg_rtx
1845 = gen_rtx_REG (rld[output_reload].outmode,
1846 REGNO (XEXP (note, 0)));
1847 return;
1851 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1852 See if one of IN and OUT is a register that may be used;
1853 this is desirable since a spill-register won't be needed.
1854 If so, return the register rtx that proves acceptable.
1856 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1857 CLASS is the register class required for the reload.
1859 If FOR_REAL is >= 0, it is the number of the reload,
1860 and in some cases when it can be discovered that OUT doesn't need
1861 to be computed, clear out rld[FOR_REAL].out.
1863 If FOR_REAL is -1, this should not be done, because this call
1864 is just to see if a register can be found, not to find and install it.
1866 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1867 puts an additional constraint on being able to use IN for OUT since
1868 IN must not appear elsewhere in the insn (it is assumed that IN itself
1869 is safe from the earlyclobber). */
1871 static rtx
1872 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1873 enum machine_mode inmode, enum machine_mode outmode,
1874 enum reg_class class, int for_real, int earlyclobber)
1876 rtx in = real_in;
1877 rtx out = real_out;
1878 int in_offset = 0;
1879 int out_offset = 0;
1880 rtx value = 0;
1882 /* If operands exceed a word, we can't use either of them
1883 unless they have the same size. */
1884 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1885 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1886 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1887 return 0;
1889 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1890 respectively refers to a hard register. */
1892 /* Find the inside of any subregs. */
1893 while (GET_CODE (out) == SUBREG)
1895 if (GET_CODE (SUBREG_REG (out)) == REG
1896 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1897 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1898 GET_MODE (SUBREG_REG (out)),
1899 SUBREG_BYTE (out),
1900 GET_MODE (out));
1901 out = SUBREG_REG (out);
1903 while (GET_CODE (in) == SUBREG)
1905 if (GET_CODE (SUBREG_REG (in)) == REG
1906 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1907 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1908 GET_MODE (SUBREG_REG (in)),
1909 SUBREG_BYTE (in),
1910 GET_MODE (in));
1911 in = SUBREG_REG (in);
1914 /* Narrow down the reg class, the same way push_reload will;
1915 otherwise we might find a dummy now, but push_reload won't. */
1916 class = PREFERRED_RELOAD_CLASS (in, class);
1918 /* See if OUT will do. */
1919 if (GET_CODE (out) == REG
1920 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1922 unsigned int regno = REGNO (out) + out_offset;
1923 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1924 rtx saved_rtx;
1926 /* When we consider whether the insn uses OUT,
1927 ignore references within IN. They don't prevent us
1928 from copying IN into OUT, because those refs would
1929 move into the insn that reloads IN.
1931 However, we only ignore IN in its role as this reload.
1932 If the insn uses IN elsewhere and it contains OUT,
1933 that counts. We can't be sure it's the "same" operand
1934 so it might not go through this reload. */
1935 saved_rtx = *inloc;
1936 *inloc = const0_rtx;
1938 if (regno < FIRST_PSEUDO_REGISTER
1939 && HARD_REGNO_MODE_OK (regno, outmode)
1940 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1941 PATTERN (this_insn), outloc))
1943 unsigned int i;
1945 for (i = 0; i < nwords; i++)
1946 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1947 regno + i))
1948 break;
1950 if (i == nwords)
1952 if (GET_CODE (real_out) == REG)
1953 value = real_out;
1954 else
1955 value = gen_rtx_REG (outmode, regno);
1959 *inloc = saved_rtx;
1962 /* Consider using IN if OUT was not acceptable
1963 or if OUT dies in this insn (like the quotient in a divmod insn).
1964 We can't use IN unless it is dies in this insn,
1965 which means we must know accurately which hard regs are live.
1966 Also, the result can't go in IN if IN is used within OUT,
1967 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1968 if (hard_regs_live_known
1969 && GET_CODE (in) == REG
1970 && REGNO (in) < FIRST_PSEUDO_REGISTER
1971 && (value == 0
1972 || find_reg_note (this_insn, REG_UNUSED, real_out))
1973 && find_reg_note (this_insn, REG_DEAD, real_in)
1974 && !fixed_regs[REGNO (in)]
1975 && HARD_REGNO_MODE_OK (REGNO (in),
1976 /* The only case where out and real_out might
1977 have different modes is where real_out
1978 is a subreg, and in that case, out
1979 has a real mode. */
1980 (GET_MODE (out) != VOIDmode
1981 ? GET_MODE (out) : outmode)))
1983 unsigned int regno = REGNO (in) + in_offset;
1984 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1986 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1987 && ! hard_reg_set_here_p (regno, regno + nwords,
1988 PATTERN (this_insn))
1989 && (! earlyclobber
1990 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1991 PATTERN (this_insn), inloc)))
1993 unsigned int i;
1995 for (i = 0; i < nwords; i++)
1996 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1997 regno + i))
1998 break;
2000 if (i == nwords)
2002 /* If we were going to use OUT as the reload reg
2003 and changed our mind, it means OUT is a dummy that
2004 dies here. So don't bother copying value to it. */
2005 if (for_real >= 0 && value == real_out)
2006 rld[for_real].out = 0;
2007 if (GET_CODE (real_in) == REG)
2008 value = real_in;
2009 else
2010 value = gen_rtx_REG (inmode, regno);
2015 return value;
2018 /* This page contains subroutines used mainly for determining
2019 whether the IN or an OUT of a reload can serve as the
2020 reload register. */
2022 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2025 earlyclobber_operand_p (rtx x)
2027 int i;
2029 for (i = 0; i < n_earlyclobbers; i++)
2030 if (reload_earlyclobbers[i] == x)
2031 return 1;
2033 return 0;
2036 /* Return 1 if expression X alters a hard reg in the range
2037 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2038 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2039 X should be the body of an instruction. */
2041 static int
2042 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2044 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2046 rtx op0 = SET_DEST (x);
2048 while (GET_CODE (op0) == SUBREG)
2049 op0 = SUBREG_REG (op0);
2050 if (GET_CODE (op0) == REG)
2052 unsigned int r = REGNO (op0);
2054 /* See if this reg overlaps range under consideration. */
2055 if (r < end_regno
2056 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2057 return 1;
2060 else if (GET_CODE (x) == PARALLEL)
2062 int i = XVECLEN (x, 0) - 1;
2064 for (; i >= 0; i--)
2065 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2066 return 1;
2069 return 0;
2072 /* Return 1 if ADDR is a valid memory address for mode MODE,
2073 and check that each pseudo reg has the proper kind of
2074 hard reg. */
2077 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2079 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2080 return 0;
2082 win:
2083 return 1;
2086 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2087 if they are the same hard reg, and has special hacks for
2088 autoincrement and autodecrement.
2089 This is specifically intended for find_reloads to use
2090 in determining whether two operands match.
2091 X is the operand whose number is the lower of the two.
2093 The value is 2 if Y contains a pre-increment that matches
2094 a non-incrementing address in X. */
2096 /* ??? To be completely correct, we should arrange to pass
2097 for X the output operand and for Y the input operand.
2098 For now, we assume that the output operand has the lower number
2099 because that is natural in (SET output (... input ...)). */
2102 operands_match_p (rtx x, rtx y)
2104 int i;
2105 RTX_CODE code = GET_CODE (x);
2106 const char *fmt;
2107 int success_2;
2109 if (x == y)
2110 return 1;
2111 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2112 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2113 && GET_CODE (SUBREG_REG (y)) == REG)))
2115 int j;
2117 if (code == SUBREG)
2119 i = REGNO (SUBREG_REG (x));
2120 if (i >= FIRST_PSEUDO_REGISTER)
2121 goto slow;
2122 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2123 GET_MODE (SUBREG_REG (x)),
2124 SUBREG_BYTE (x),
2125 GET_MODE (x));
2127 else
2128 i = REGNO (x);
2130 if (GET_CODE (y) == SUBREG)
2132 j = REGNO (SUBREG_REG (y));
2133 if (j >= FIRST_PSEUDO_REGISTER)
2134 goto slow;
2135 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2136 GET_MODE (SUBREG_REG (y)),
2137 SUBREG_BYTE (y),
2138 GET_MODE (y));
2140 else
2141 j = REGNO (y);
2143 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2144 multiple hard register group, so that for example (reg:DI 0) and
2145 (reg:SI 1) will be considered the same register. */
2146 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2147 && i < FIRST_PSEUDO_REGISTER)
2148 i += HARD_REGNO_NREGS (i, GET_MODE (x)) - 1;
2149 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2150 && j < FIRST_PSEUDO_REGISTER)
2151 j += HARD_REGNO_NREGS (j, GET_MODE (y)) - 1;
2153 return i == j;
2155 /* If two operands must match, because they are really a single
2156 operand of an assembler insn, then two postincrements are invalid
2157 because the assembler insn would increment only once.
2158 On the other hand, a postincrement matches ordinary indexing
2159 if the postincrement is the output operand. */
2160 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2161 return operands_match_p (XEXP (x, 0), y);
2162 /* Two preincrements are invalid
2163 because the assembler insn would increment only once.
2164 On the other hand, a preincrement matches ordinary indexing
2165 if the preincrement is the input operand.
2166 In this case, return 2, since some callers need to do special
2167 things when this happens. */
2168 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2169 || GET_CODE (y) == PRE_MODIFY)
2170 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2172 slow:
2174 /* Now we have disposed of all the cases
2175 in which different rtx codes can match. */
2176 if (code != GET_CODE (y))
2177 return 0;
2178 if (code == LABEL_REF)
2179 return XEXP (x, 0) == XEXP (y, 0);
2180 if (code == SYMBOL_REF)
2181 return XSTR (x, 0) == XSTR (y, 0);
2183 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2185 if (GET_MODE (x) != GET_MODE (y))
2186 return 0;
2188 /* Compare the elements. If any pair of corresponding elements
2189 fail to match, return 0 for the whole things. */
2191 success_2 = 0;
2192 fmt = GET_RTX_FORMAT (code);
2193 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2195 int val, j;
2196 switch (fmt[i])
2198 case 'w':
2199 if (XWINT (x, i) != XWINT (y, i))
2200 return 0;
2201 break;
2203 case 'i':
2204 if (XINT (x, i) != XINT (y, i))
2205 return 0;
2206 break;
2208 case 'e':
2209 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2210 if (val == 0)
2211 return 0;
2212 /* If any subexpression returns 2,
2213 we should return 2 if we are successful. */
2214 if (val == 2)
2215 success_2 = 1;
2216 break;
2218 case '0':
2219 break;
2221 case 'E':
2222 if (XVECLEN (x, i) != XVECLEN (y, i))
2223 return 0;
2224 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2226 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2227 if (val == 0)
2228 return 0;
2229 if (val == 2)
2230 success_2 = 1;
2232 break;
2234 /* It is believed that rtx's at this level will never
2235 contain anything but integers and other rtx's,
2236 except for within LABEL_REFs and SYMBOL_REFs. */
2237 default:
2238 abort ();
2241 return 1 + success_2;
2244 /* Describe the range of registers or memory referenced by X.
2245 If X is a register, set REG_FLAG and put the first register
2246 number into START and the last plus one into END.
2247 If X is a memory reference, put a base address into BASE
2248 and a range of integer offsets into START and END.
2249 If X is pushing on the stack, we can assume it causes no trouble,
2250 so we set the SAFE field. */
2252 static struct decomposition
2253 decompose (rtx x)
2255 struct decomposition val;
2256 int all_const = 0;
2258 val.reg_flag = 0;
2259 val.safe = 0;
2260 val.base = 0;
2261 if (GET_CODE (x) == MEM)
2263 rtx base = NULL_RTX, offset = 0;
2264 rtx addr = XEXP (x, 0);
2266 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2267 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2269 val.base = XEXP (addr, 0);
2270 val.start = -GET_MODE_SIZE (GET_MODE (x));
2271 val.end = GET_MODE_SIZE (GET_MODE (x));
2272 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2273 return val;
2276 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2278 if (GET_CODE (XEXP (addr, 1)) == PLUS
2279 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2280 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2282 val.base = XEXP (addr, 0);
2283 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2284 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2285 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2286 return val;
2290 if (GET_CODE (addr) == CONST)
2292 addr = XEXP (addr, 0);
2293 all_const = 1;
2295 if (GET_CODE (addr) == PLUS)
2297 if (CONSTANT_P (XEXP (addr, 0)))
2299 base = XEXP (addr, 1);
2300 offset = XEXP (addr, 0);
2302 else if (CONSTANT_P (XEXP (addr, 1)))
2304 base = XEXP (addr, 0);
2305 offset = XEXP (addr, 1);
2309 if (offset == 0)
2311 base = addr;
2312 offset = const0_rtx;
2314 if (GET_CODE (offset) == CONST)
2315 offset = XEXP (offset, 0);
2316 if (GET_CODE (offset) == PLUS)
2318 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2320 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2321 offset = XEXP (offset, 0);
2323 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2325 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2326 offset = XEXP (offset, 1);
2328 else
2330 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2331 offset = const0_rtx;
2334 else if (GET_CODE (offset) != CONST_INT)
2336 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2337 offset = const0_rtx;
2340 if (all_const && GET_CODE (base) == PLUS)
2341 base = gen_rtx_CONST (GET_MODE (base), base);
2343 if (GET_CODE (offset) != CONST_INT)
2344 abort ();
2346 val.start = INTVAL (offset);
2347 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2348 val.base = base;
2349 return val;
2351 else if (GET_CODE (x) == REG)
2353 val.reg_flag = 1;
2354 val.start = true_regnum (x);
2355 if (val.start < 0)
2357 /* A pseudo with no hard reg. */
2358 val.start = REGNO (x);
2359 val.end = val.start + 1;
2361 else
2362 /* A hard reg. */
2363 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2365 else if (GET_CODE (x) == SUBREG)
2367 if (GET_CODE (SUBREG_REG (x)) != REG)
2368 /* This could be more precise, but it's good enough. */
2369 return decompose (SUBREG_REG (x));
2370 val.reg_flag = 1;
2371 val.start = true_regnum (x);
2372 if (val.start < 0)
2373 return decompose (SUBREG_REG (x));
2374 else
2375 /* A hard reg. */
2376 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2378 else if (CONSTANT_P (x)
2379 /* This hasn't been assigned yet, so it can't conflict yet. */
2380 || GET_CODE (x) == SCRATCH)
2381 val.safe = 1;
2382 else
2383 abort ();
2384 return val;
2387 /* Return 1 if altering Y will not modify the value of X.
2388 Y is also described by YDATA, which should be decompose (Y). */
2390 static int
2391 immune_p (rtx x, rtx y, struct decomposition ydata)
2393 struct decomposition xdata;
2395 if (ydata.reg_flag)
2396 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2397 if (ydata.safe)
2398 return 1;
2400 if (GET_CODE (y) != MEM)
2401 abort ();
2402 /* If Y is memory and X is not, Y can't affect X. */
2403 if (GET_CODE (x) != MEM)
2404 return 1;
2406 xdata = decompose (x);
2408 if (! rtx_equal_p (xdata.base, ydata.base))
2410 /* If bases are distinct symbolic constants, there is no overlap. */
2411 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2412 return 1;
2413 /* Constants and stack slots never overlap. */
2414 if (CONSTANT_P (xdata.base)
2415 && (ydata.base == frame_pointer_rtx
2416 || ydata.base == hard_frame_pointer_rtx
2417 || ydata.base == stack_pointer_rtx))
2418 return 1;
2419 if (CONSTANT_P (ydata.base)
2420 && (xdata.base == frame_pointer_rtx
2421 || xdata.base == hard_frame_pointer_rtx
2422 || xdata.base == stack_pointer_rtx))
2423 return 1;
2424 /* If either base is variable, we don't know anything. */
2425 return 0;
2428 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2431 /* Similar, but calls decompose. */
2434 safe_from_earlyclobber (rtx op, rtx clobber)
2436 struct decomposition early_data;
2438 early_data = decompose (clobber);
2439 return immune_p (op, clobber, early_data);
2442 /* Main entry point of this file: search the body of INSN
2443 for values that need reloading and record them with push_reload.
2444 REPLACE nonzero means record also where the values occur
2445 so that subst_reloads can be used.
2447 IND_LEVELS says how many levels of indirection are supported by this
2448 machine; a value of zero means that a memory reference is not a valid
2449 memory address.
2451 LIVE_KNOWN says we have valid information about which hard
2452 regs are live at each point in the program; this is true when
2453 we are called from global_alloc but false when stupid register
2454 allocation has been done.
2456 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2457 which is nonnegative if the reg has been commandeered for reloading into.
2458 It is copied into STATIC_RELOAD_REG_P and referenced from there
2459 by various subroutines.
2461 Return TRUE if some operands need to be changed, because of swapping
2462 commutative operands, reg_equiv_address substitution, or whatever. */
2465 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2466 short *reload_reg_p)
2468 int insn_code_number;
2469 int i, j;
2470 int noperands;
2471 /* These start out as the constraints for the insn
2472 and they are chewed up as we consider alternatives. */
2473 char *constraints[MAX_RECOG_OPERANDS];
2474 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2475 a register. */
2476 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2477 char pref_or_nothing[MAX_RECOG_OPERANDS];
2478 /* Nonzero for a MEM operand whose entire address needs a reload. */
2479 int address_reloaded[MAX_RECOG_OPERANDS];
2480 /* Nonzero for an address operand that needs to be completely reloaded. */
2481 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2482 /* Value of enum reload_type to use for operand. */
2483 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2484 /* Value of enum reload_type to use within address of operand. */
2485 enum reload_type address_type[MAX_RECOG_OPERANDS];
2486 /* Save the usage of each operand. */
2487 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2488 int no_input_reloads = 0, no_output_reloads = 0;
2489 int n_alternatives;
2490 int this_alternative[MAX_RECOG_OPERANDS];
2491 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2492 char this_alternative_win[MAX_RECOG_OPERANDS];
2493 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2494 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2495 int this_alternative_matches[MAX_RECOG_OPERANDS];
2496 int swapped;
2497 int goal_alternative[MAX_RECOG_OPERANDS];
2498 int this_alternative_number;
2499 int goal_alternative_number = 0;
2500 int operand_reloadnum[MAX_RECOG_OPERANDS];
2501 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2502 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2503 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2504 char goal_alternative_win[MAX_RECOG_OPERANDS];
2505 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2506 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2507 int goal_alternative_swapped;
2508 int best;
2509 int commutative;
2510 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2511 rtx substed_operand[MAX_RECOG_OPERANDS];
2512 rtx body = PATTERN (insn);
2513 rtx set = single_set (insn);
2514 int goal_earlyclobber = 0, this_earlyclobber;
2515 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2516 int retval = 0;
2518 this_insn = insn;
2519 n_reloads = 0;
2520 n_replacements = 0;
2521 n_earlyclobbers = 0;
2522 replace_reloads = replace;
2523 hard_regs_live_known = live_known;
2524 static_reload_reg_p = reload_reg_p;
2526 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2527 neither are insns that SET cc0. Insns that use CC0 are not allowed
2528 to have any input reloads. */
2529 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2530 no_output_reloads = 1;
2532 #ifdef HAVE_cc0
2533 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2534 no_input_reloads = 1;
2535 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2536 no_output_reloads = 1;
2537 #endif
2539 #ifdef SECONDARY_MEMORY_NEEDED
2540 /* The eliminated forms of any secondary memory locations are per-insn, so
2541 clear them out here. */
2543 memset (secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2544 #endif
2546 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2547 is cheap to move between them. If it is not, there may not be an insn
2548 to do the copy, so we may need a reload. */
2549 if (GET_CODE (body) == SET
2550 && GET_CODE (SET_DEST (body)) == REG
2551 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2552 && GET_CODE (SET_SRC (body)) == REG
2553 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2554 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2555 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2556 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2557 return 0;
2559 extract_insn (insn);
2561 noperands = reload_n_operands = recog_data.n_operands;
2562 n_alternatives = recog_data.n_alternatives;
2564 /* Just return "no reloads" if insn has no operands with constraints. */
2565 if (noperands == 0 || n_alternatives == 0)
2566 return 0;
2568 insn_code_number = INSN_CODE (insn);
2569 this_insn_is_asm = insn_code_number < 0;
2571 memcpy (operand_mode, recog_data.operand_mode,
2572 noperands * sizeof (enum machine_mode));
2573 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2575 commutative = -1;
2577 /* If we will need to know, later, whether some pair of operands
2578 are the same, we must compare them now and save the result.
2579 Reloading the base and index registers will clobber them
2580 and afterward they will fail to match. */
2582 for (i = 0; i < noperands; i++)
2584 char *p;
2585 int c;
2587 substed_operand[i] = recog_data.operand[i];
2588 p = constraints[i];
2590 modified[i] = RELOAD_READ;
2592 /* Scan this operand's constraint to see if it is an output operand,
2593 an in-out operand, is commutative, or should match another. */
2595 while ((c = *p))
2597 p += CONSTRAINT_LEN (c, p);
2598 if (c == '=')
2599 modified[i] = RELOAD_WRITE;
2600 else if (c == '+')
2601 modified[i] = RELOAD_READ_WRITE;
2602 else if (c == '%')
2604 /* The last operand should not be marked commutative. */
2605 if (i == noperands - 1)
2606 abort ();
2608 commutative = i;
2610 else if (ISDIGIT (c))
2612 c = strtoul (p - 1, &p, 10);
2614 operands_match[c][i]
2615 = operands_match_p (recog_data.operand[c],
2616 recog_data.operand[i]);
2618 /* An operand may not match itself. */
2619 if (c == i)
2620 abort ();
2622 /* If C can be commuted with C+1, and C might need to match I,
2623 then C+1 might also need to match I. */
2624 if (commutative >= 0)
2626 if (c == commutative || c == commutative + 1)
2628 int other = c + (c == commutative ? 1 : -1);
2629 operands_match[other][i]
2630 = operands_match_p (recog_data.operand[other],
2631 recog_data.operand[i]);
2633 if (i == commutative || i == commutative + 1)
2635 int other = i + (i == commutative ? 1 : -1);
2636 operands_match[c][other]
2637 = operands_match_p (recog_data.operand[c],
2638 recog_data.operand[other]);
2640 /* Note that C is supposed to be less than I.
2641 No need to consider altering both C and I because in
2642 that case we would alter one into the other. */
2648 /* Examine each operand that is a memory reference or memory address
2649 and reload parts of the addresses into index registers.
2650 Also here any references to pseudo regs that didn't get hard regs
2651 but are equivalent to constants get replaced in the insn itself
2652 with those constants. Nobody will ever see them again.
2654 Finally, set up the preferred classes of each operand. */
2656 for (i = 0; i < noperands; i++)
2658 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2660 address_reloaded[i] = 0;
2661 address_operand_reloaded[i] = 0;
2662 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2663 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2664 : RELOAD_OTHER);
2665 address_type[i]
2666 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2667 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2668 : RELOAD_OTHER);
2670 if (*constraints[i] == 0)
2671 /* Ignore things like match_operator operands. */
2673 else if (constraints[i][0] == 'p'
2674 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2676 address_operand_reloaded[i]
2677 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2678 recog_data.operand[i],
2679 recog_data.operand_loc[i],
2680 i, operand_type[i], ind_levels, insn);
2682 /* If we now have a simple operand where we used to have a
2683 PLUS or MULT, re-recognize and try again. */
2684 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2685 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2686 && (GET_CODE (recog_data.operand[i]) == MULT
2687 || GET_CODE (recog_data.operand[i]) == PLUS))
2689 INSN_CODE (insn) = -1;
2690 retval = find_reloads (insn, replace, ind_levels, live_known,
2691 reload_reg_p);
2692 return retval;
2695 recog_data.operand[i] = *recog_data.operand_loc[i];
2696 substed_operand[i] = recog_data.operand[i];
2698 /* Address operands are reloaded in their existing mode,
2699 no matter what is specified in the machine description. */
2700 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2702 else if (code == MEM)
2704 address_reloaded[i]
2705 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2706 recog_data.operand_loc[i],
2707 XEXP (recog_data.operand[i], 0),
2708 &XEXP (recog_data.operand[i], 0),
2709 i, address_type[i], ind_levels, insn);
2710 recog_data.operand[i] = *recog_data.operand_loc[i];
2711 substed_operand[i] = recog_data.operand[i];
2713 else if (code == SUBREG)
2715 rtx reg = SUBREG_REG (recog_data.operand[i]);
2716 rtx op
2717 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2718 ind_levels,
2719 set != 0
2720 && &SET_DEST (set) == recog_data.operand_loc[i],
2721 insn,
2722 &address_reloaded[i]);
2724 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2725 that didn't get a hard register, emit a USE with a REG_EQUAL
2726 note in front so that we might inherit a previous, possibly
2727 wider reload. */
2729 if (replace
2730 && GET_CODE (op) == MEM
2731 && GET_CODE (reg) == REG
2732 && (GET_MODE_SIZE (GET_MODE (reg))
2733 >= GET_MODE_SIZE (GET_MODE (op))))
2734 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2735 insn),
2736 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2738 substed_operand[i] = recog_data.operand[i] = op;
2740 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2741 /* We can get a PLUS as an "operand" as a result of register
2742 elimination. See eliminate_regs and gen_reload. We handle
2743 a unary operator by reloading the operand. */
2744 substed_operand[i] = recog_data.operand[i]
2745 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2746 ind_levels, 0, insn,
2747 &address_reloaded[i]);
2748 else if (code == REG)
2750 /* This is equivalent to calling find_reloads_toplev.
2751 The code is duplicated for speed.
2752 When we find a pseudo always equivalent to a constant,
2753 we replace it by the constant. We must be sure, however,
2754 that we don't try to replace it in the insn in which it
2755 is being set. */
2756 int regno = REGNO (recog_data.operand[i]);
2757 if (reg_equiv_constant[regno] != 0
2758 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2760 /* Record the existing mode so that the check if constants are
2761 allowed will work when operand_mode isn't specified. */
2763 if (operand_mode[i] == VOIDmode)
2764 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2766 substed_operand[i] = recog_data.operand[i]
2767 = reg_equiv_constant[regno];
2769 if (reg_equiv_memory_loc[regno] != 0
2770 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2771 /* We need not give a valid is_set_dest argument since the case
2772 of a constant equivalence was checked above. */
2773 substed_operand[i] = recog_data.operand[i]
2774 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2775 ind_levels, 0, insn,
2776 &address_reloaded[i]);
2778 /* If the operand is still a register (we didn't replace it with an
2779 equivalent), get the preferred class to reload it into. */
2780 code = GET_CODE (recog_data.operand[i]);
2781 preferred_class[i]
2782 = ((code == REG && REGNO (recog_data.operand[i])
2783 >= FIRST_PSEUDO_REGISTER)
2784 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2785 : NO_REGS);
2786 pref_or_nothing[i]
2787 = (code == REG
2788 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2789 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2792 /* If this is simply a copy from operand 1 to operand 0, merge the
2793 preferred classes for the operands. */
2794 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2795 && recog_data.operand[1] == SET_SRC (set))
2797 preferred_class[0] = preferred_class[1]
2798 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2799 pref_or_nothing[0] |= pref_or_nothing[1];
2800 pref_or_nothing[1] |= pref_or_nothing[0];
2803 /* Now see what we need for pseudo-regs that didn't get hard regs
2804 or got the wrong kind of hard reg. For this, we must consider
2805 all the operands together against the register constraints. */
2807 best = MAX_RECOG_OPERANDS * 2 + 600;
2809 swapped = 0;
2810 goal_alternative_swapped = 0;
2811 try_swapped:
2813 /* The constraints are made of several alternatives.
2814 Each operand's constraint looks like foo,bar,... with commas
2815 separating the alternatives. The first alternatives for all
2816 operands go together, the second alternatives go together, etc.
2818 First loop over alternatives. */
2820 for (this_alternative_number = 0;
2821 this_alternative_number < n_alternatives;
2822 this_alternative_number++)
2824 /* Loop over operands for one constraint alternative. */
2825 /* LOSERS counts those that don't fit this alternative
2826 and would require loading. */
2827 int losers = 0;
2828 /* BAD is set to 1 if it some operand can't fit this alternative
2829 even after reloading. */
2830 int bad = 0;
2831 /* REJECT is a count of how undesirable this alternative says it is
2832 if any reloading is required. If the alternative matches exactly
2833 then REJECT is ignored, but otherwise it gets this much
2834 counted against it in addition to the reloading needed. Each
2835 ? counts three times here since we want the disparaging caused by
2836 a bad register class to only count 1/3 as much. */
2837 int reject = 0;
2839 this_earlyclobber = 0;
2841 for (i = 0; i < noperands; i++)
2843 char *p = constraints[i];
2844 char *end;
2845 int len;
2846 int win = 0;
2847 int did_match = 0;
2848 /* 0 => this operand can be reloaded somehow for this alternative. */
2849 int badop = 1;
2850 /* 0 => this operand can be reloaded if the alternative allows regs. */
2851 int winreg = 0;
2852 int c;
2853 int m;
2854 rtx operand = recog_data.operand[i];
2855 int offset = 0;
2856 /* Nonzero means this is a MEM that must be reloaded into a reg
2857 regardless of what the constraint says. */
2858 int force_reload = 0;
2859 int offmemok = 0;
2860 /* Nonzero if a constant forced into memory would be OK for this
2861 operand. */
2862 int constmemok = 0;
2863 int earlyclobber = 0;
2865 /* If the predicate accepts a unary operator, it means that
2866 we need to reload the operand, but do not do this for
2867 match_operator and friends. */
2868 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2869 operand = XEXP (operand, 0);
2871 /* If the operand is a SUBREG, extract
2872 the REG or MEM (or maybe even a constant) within.
2873 (Constants can occur as a result of reg_equiv_constant.) */
2875 while (GET_CODE (operand) == SUBREG)
2877 /* Offset only matters when operand is a REG and
2878 it is a hard reg. This is because it is passed
2879 to reg_fits_class_p if it is a REG and all pseudos
2880 return 0 from that function. */
2881 if (GET_CODE (SUBREG_REG (operand)) == REG
2882 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2884 if (!subreg_offset_representable_p
2885 (REGNO (SUBREG_REG (operand)),
2886 GET_MODE (SUBREG_REG (operand)),
2887 SUBREG_BYTE (operand),
2888 GET_MODE (operand)))
2889 force_reload = 1;
2890 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2891 GET_MODE (SUBREG_REG (operand)),
2892 SUBREG_BYTE (operand),
2893 GET_MODE (operand));
2895 operand = SUBREG_REG (operand);
2896 /* Force reload if this is a constant or PLUS or if there may
2897 be a problem accessing OPERAND in the outer mode. */
2898 if (CONSTANT_P (operand)
2899 || GET_CODE (operand) == PLUS
2900 /* We must force a reload of paradoxical SUBREGs
2901 of a MEM because the alignment of the inner value
2902 may not be enough to do the outer reference. On
2903 big-endian machines, it may also reference outside
2904 the object.
2906 On machines that extend byte operations and we have a
2907 SUBREG where both the inner and outer modes are no wider
2908 than a word and the inner mode is narrower, is integral,
2909 and gets extended when loaded from memory, combine.c has
2910 made assumptions about the behavior of the machine in such
2911 register access. If the data is, in fact, in memory we
2912 must always load using the size assumed to be in the
2913 register and let the insn do the different-sized
2914 accesses.
2916 This is doubly true if WORD_REGISTER_OPERATIONS. In
2917 this case eliminate_regs has left non-paradoxical
2918 subregs for push_reload to see. Make sure it does
2919 by forcing the reload.
2921 ??? When is it right at this stage to have a subreg
2922 of a mem that is _not_ to be handled specially? IMO
2923 those should have been reduced to just a mem. */
2924 || ((GET_CODE (operand) == MEM
2925 || (GET_CODE (operand)== REG
2926 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2927 #ifndef WORD_REGISTER_OPERATIONS
2928 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2929 < BIGGEST_ALIGNMENT)
2930 && (GET_MODE_SIZE (operand_mode[i])
2931 > GET_MODE_SIZE (GET_MODE (operand))))
2932 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2933 #ifdef LOAD_EXTEND_OP
2934 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2935 && (GET_MODE_SIZE (GET_MODE (operand))
2936 <= UNITS_PER_WORD)
2937 && (GET_MODE_SIZE (operand_mode[i])
2938 > GET_MODE_SIZE (GET_MODE (operand)))
2939 && INTEGRAL_MODE_P (GET_MODE (operand))
2940 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2941 #endif
2943 #endif
2946 force_reload = 1;
2949 this_alternative[i] = (int) NO_REGS;
2950 this_alternative_win[i] = 0;
2951 this_alternative_match_win[i] = 0;
2952 this_alternative_offmemok[i] = 0;
2953 this_alternative_earlyclobber[i] = 0;
2954 this_alternative_matches[i] = -1;
2956 /* An empty constraint or empty alternative
2957 allows anything which matched the pattern. */
2958 if (*p == 0 || *p == ',')
2959 win = 1, badop = 0;
2961 /* Scan this alternative's specs for this operand;
2962 set WIN if the operand fits any letter in this alternative.
2963 Otherwise, clear BADOP if this operand could
2964 fit some letter after reloads,
2965 or set WINREG if this operand could fit after reloads
2966 provided the constraint allows some registers. */
2969 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
2971 case '\0':
2972 len = 0;
2973 break;
2974 case ',':
2975 c = '\0';
2976 break;
2978 case '=': case '+': case '*':
2979 break;
2981 case '%':
2982 /* The last operand should not be marked commutative. */
2983 if (i != noperands - 1)
2984 commutative = i;
2985 break;
2987 case '?':
2988 reject += 6;
2989 break;
2991 case '!':
2992 reject = 600;
2993 break;
2995 case '#':
2996 /* Ignore rest of this alternative as far as
2997 reloading is concerned. */
2999 p++;
3000 while (*p && *p != ',');
3001 len = 0;
3002 break;
3004 case '0': case '1': case '2': case '3': case '4':
3005 case '5': case '6': case '7': case '8': case '9':
3006 m = strtoul (p, &end, 10);
3007 p = end;
3008 len = 0;
3010 this_alternative_matches[i] = m;
3011 /* We are supposed to match a previous operand.
3012 If we do, we win if that one did.
3013 If we do not, count both of the operands as losers.
3014 (This is too conservative, since most of the time
3015 only a single reload insn will be needed to make
3016 the two operands win. As a result, this alternative
3017 may be rejected when it is actually desirable.) */
3018 if ((swapped && (m != commutative || i != commutative + 1))
3019 /* If we are matching as if two operands were swapped,
3020 also pretend that operands_match had been computed
3021 with swapped.
3022 But if I is the second of those and C is the first,
3023 don't exchange them, because operands_match is valid
3024 only on one side of its diagonal. */
3025 ? (operands_match
3026 [(m == commutative || m == commutative + 1)
3027 ? 2 * commutative + 1 - m : m]
3028 [(i == commutative || i == commutative + 1)
3029 ? 2 * commutative + 1 - i : i])
3030 : operands_match[m][i])
3032 /* If we are matching a non-offsettable address where an
3033 offsettable address was expected, then we must reject
3034 this combination, because we can't reload it. */
3035 if (this_alternative_offmemok[m]
3036 && GET_CODE (recog_data.operand[m]) == MEM
3037 && this_alternative[m] == (int) NO_REGS
3038 && ! this_alternative_win[m])
3039 bad = 1;
3041 did_match = this_alternative_win[m];
3043 else
3045 /* Operands don't match. */
3046 rtx value;
3047 /* Retroactively mark the operand we had to match
3048 as a loser, if it wasn't already. */
3049 if (this_alternative_win[m])
3050 losers++;
3051 this_alternative_win[m] = 0;
3052 if (this_alternative[m] == (int) NO_REGS)
3053 bad = 1;
3054 /* But count the pair only once in the total badness of
3055 this alternative, if the pair can be a dummy reload. */
3056 value
3057 = find_dummy_reload (recog_data.operand[i],
3058 recog_data.operand[m],
3059 recog_data.operand_loc[i],
3060 recog_data.operand_loc[m],
3061 operand_mode[i], operand_mode[m],
3062 this_alternative[m], -1,
3063 this_alternative_earlyclobber[m]);
3065 if (value != 0)
3066 losers--;
3068 /* This can be fixed with reloads if the operand
3069 we are supposed to match can be fixed with reloads. */
3070 badop = 0;
3071 this_alternative[i] = this_alternative[m];
3073 /* If we have to reload this operand and some previous
3074 operand also had to match the same thing as this
3075 operand, we don't know how to do that. So reject this
3076 alternative. */
3077 if (! did_match || force_reload)
3078 for (j = 0; j < i; j++)
3079 if (this_alternative_matches[j]
3080 == this_alternative_matches[i])
3081 badop = 1;
3082 break;
3084 case 'p':
3085 /* All necessary reloads for an address_operand
3086 were handled in find_reloads_address. */
3087 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3088 win = 1;
3089 badop = 0;
3090 break;
3092 case 'm':
3093 if (force_reload)
3094 break;
3095 if (GET_CODE (operand) == MEM
3096 || (GET_CODE (operand) == REG
3097 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3098 && reg_renumber[REGNO (operand)] < 0))
3099 win = 1;
3100 if (CONSTANT_P (operand)
3101 /* force_const_mem does not accept HIGH. */
3102 && GET_CODE (operand) != HIGH)
3103 badop = 0;
3104 constmemok = 1;
3105 break;
3107 case '<':
3108 if (GET_CODE (operand) == MEM
3109 && ! address_reloaded[i]
3110 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3111 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3112 win = 1;
3113 break;
3115 case '>':
3116 if (GET_CODE (operand) == MEM
3117 && ! address_reloaded[i]
3118 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3119 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3120 win = 1;
3121 break;
3123 /* Memory operand whose address is not offsettable. */
3124 case 'V':
3125 if (force_reload)
3126 break;
3127 if (GET_CODE (operand) == MEM
3128 && ! (ind_levels ? offsettable_memref_p (operand)
3129 : offsettable_nonstrict_memref_p (operand))
3130 /* Certain mem addresses will become offsettable
3131 after they themselves are reloaded. This is important;
3132 we don't want our own handling of unoffsettables
3133 to override the handling of reg_equiv_address. */
3134 && !(GET_CODE (XEXP (operand, 0)) == REG
3135 && (ind_levels == 0
3136 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3137 win = 1;
3138 break;
3140 /* Memory operand whose address is offsettable. */
3141 case 'o':
3142 if (force_reload)
3143 break;
3144 if ((GET_CODE (operand) == MEM
3145 /* If IND_LEVELS, find_reloads_address won't reload a
3146 pseudo that didn't get a hard reg, so we have to
3147 reject that case. */
3148 && ((ind_levels ? offsettable_memref_p (operand)
3149 : offsettable_nonstrict_memref_p (operand))
3150 /* A reloaded address is offsettable because it is now
3151 just a simple register indirect. */
3152 || address_reloaded[i]))
3153 || (GET_CODE (operand) == REG
3154 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3155 && reg_renumber[REGNO (operand)] < 0
3156 /* If reg_equiv_address is nonzero, we will be
3157 loading it into a register; hence it will be
3158 offsettable, but we cannot say that reg_equiv_mem
3159 is offsettable without checking. */
3160 && ((reg_equiv_mem[REGNO (operand)] != 0
3161 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3162 || (reg_equiv_address[REGNO (operand)] != 0))))
3163 win = 1;
3164 /* force_const_mem does not accept HIGH. */
3165 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3166 || GET_CODE (operand) == MEM)
3167 badop = 0;
3168 constmemok = 1;
3169 offmemok = 1;
3170 break;
3172 case '&':
3173 /* Output operand that is stored before the need for the
3174 input operands (and their index registers) is over. */
3175 earlyclobber = 1, this_earlyclobber = 1;
3176 break;
3178 case 'E':
3179 case 'F':
3180 if (GET_CODE (operand) == CONST_DOUBLE
3181 || (GET_CODE (operand) == CONST_VECTOR
3182 && (GET_MODE_CLASS (GET_MODE (operand))
3183 == MODE_VECTOR_FLOAT)))
3184 win = 1;
3185 break;
3187 case 'G':
3188 case 'H':
3189 if (GET_CODE (operand) == CONST_DOUBLE
3190 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3191 win = 1;
3192 break;
3194 case 's':
3195 if (GET_CODE (operand) == CONST_INT
3196 || (GET_CODE (operand) == CONST_DOUBLE
3197 && GET_MODE (operand) == VOIDmode))
3198 break;
3199 case 'i':
3200 if (CONSTANT_P (operand)
3201 #ifdef LEGITIMATE_PIC_OPERAND_P
3202 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3203 #endif
3205 win = 1;
3206 break;
3208 case 'n':
3209 if (GET_CODE (operand) == CONST_INT
3210 || (GET_CODE (operand) == CONST_DOUBLE
3211 && GET_MODE (operand) == VOIDmode))
3212 win = 1;
3213 break;
3215 case 'I':
3216 case 'J':
3217 case 'K':
3218 case 'L':
3219 case 'M':
3220 case 'N':
3221 case 'O':
3222 case 'P':
3223 if (GET_CODE (operand) == CONST_INT
3224 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3225 win = 1;
3226 break;
3228 case 'X':
3229 win = 1;
3230 break;
3232 case 'g':
3233 if (! force_reload
3234 /* A PLUS is never a valid operand, but reload can make
3235 it from a register when eliminating registers. */
3236 && GET_CODE (operand) != PLUS
3237 /* A SCRATCH is not a valid operand. */
3238 && GET_CODE (operand) != SCRATCH
3239 #ifdef LEGITIMATE_PIC_OPERAND_P
3240 && (! CONSTANT_P (operand)
3241 || ! flag_pic
3242 || LEGITIMATE_PIC_OPERAND_P (operand))
3243 #endif
3244 && (GENERAL_REGS == ALL_REGS
3245 || GET_CODE (operand) != REG
3246 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3247 && reg_renumber[REGNO (operand)] < 0)))
3248 win = 1;
3249 /* Drop through into 'r' case. */
3251 case 'r':
3252 this_alternative[i]
3253 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3254 goto reg;
3256 default:
3257 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3259 #ifdef EXTRA_CONSTRAINT_STR
3260 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3262 if (force_reload)
3263 break;
3264 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3265 win = 1;
3266 /* If the address was already reloaded,
3267 we win as well. */
3268 else if (GET_CODE (operand) == MEM
3269 && address_reloaded[i])
3270 win = 1;
3271 /* Likewise if the address will be reloaded because
3272 reg_equiv_address is nonzero. For reg_equiv_mem
3273 we have to check. */
3274 else if (GET_CODE (operand) == REG
3275 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3276 && reg_renumber[REGNO (operand)] < 0
3277 && ((reg_equiv_mem[REGNO (operand)] != 0
3278 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3279 || (reg_equiv_address[REGNO (operand)] != 0)))
3280 win = 1;
3282 /* If we didn't already win, we can reload
3283 constants via force_const_mem, and other
3284 MEMs by reloading the address like for 'o'. */
3285 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3286 || GET_CODE (operand) == MEM)
3287 badop = 0;
3288 constmemok = 1;
3289 offmemok = 1;
3290 break;
3292 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3294 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3295 win = 1;
3297 /* If we didn't already win, we can reload
3298 the address into a base register. */
3299 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3300 badop = 0;
3301 break;
3304 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3305 win = 1;
3306 #endif
3307 break;
3310 this_alternative[i]
3311 = (int) (reg_class_subunion
3312 [this_alternative[i]]
3313 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3314 reg:
3315 if (GET_MODE (operand) == BLKmode)
3316 break;
3317 winreg = 1;
3318 if (GET_CODE (operand) == REG
3319 && reg_fits_class_p (operand, this_alternative[i],
3320 offset, GET_MODE (recog_data.operand[i])))
3321 win = 1;
3322 break;
3324 while ((p += len), c);
3326 constraints[i] = p;
3328 /* If this operand could be handled with a reg,
3329 and some reg is allowed, then this operand can be handled. */
3330 if (winreg && this_alternative[i] != (int) NO_REGS)
3331 badop = 0;
3333 /* Record which operands fit this alternative. */
3334 this_alternative_earlyclobber[i] = earlyclobber;
3335 if (win && ! force_reload)
3336 this_alternative_win[i] = 1;
3337 else if (did_match && ! force_reload)
3338 this_alternative_match_win[i] = 1;
3339 else
3341 int const_to_mem = 0;
3343 this_alternative_offmemok[i] = offmemok;
3344 losers++;
3345 if (badop)
3346 bad = 1;
3347 /* Alternative loses if it has no regs for a reg operand. */
3348 if (GET_CODE (operand) == REG
3349 && this_alternative[i] == (int) NO_REGS
3350 && this_alternative_matches[i] < 0)
3351 bad = 1;
3353 /* If this is a constant that is reloaded into the desired
3354 class by copying it to memory first, count that as another
3355 reload. This is consistent with other code and is
3356 required to avoid choosing another alternative when
3357 the constant is moved into memory by this function on
3358 an early reload pass. Note that the test here is
3359 precisely the same as in the code below that calls
3360 force_const_mem. */
3361 if (CONSTANT_P (operand)
3362 /* force_const_mem does not accept HIGH. */
3363 && GET_CODE (operand) != HIGH
3364 && ((PREFERRED_RELOAD_CLASS (operand,
3365 (enum reg_class) this_alternative[i])
3366 == NO_REGS)
3367 || no_input_reloads)
3368 && operand_mode[i] != VOIDmode)
3370 const_to_mem = 1;
3371 if (this_alternative[i] != (int) NO_REGS)
3372 losers++;
3374 /* If constant pool symbols are not valid addresses,
3375 count an extra reload for the address. */
3376 if (!targetm.direct_pool_load_p (operand_mode[i]))
3377 losers++;
3380 /* If we can't reload this value at all, reject this
3381 alternative. Note that we could also lose due to
3382 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3383 here. */
3385 if (! CONSTANT_P (operand)
3386 && (enum reg_class) this_alternative[i] != NO_REGS
3387 && (PREFERRED_RELOAD_CLASS (operand,
3388 (enum reg_class) this_alternative[i])
3389 == NO_REGS))
3390 bad = 1;
3392 /* Alternative loses if it requires a type of reload not
3393 permitted for this insn. We can always reload SCRATCH
3394 and objects with a REG_UNUSED note. */
3395 else if (GET_CODE (operand) != SCRATCH
3396 && modified[i] != RELOAD_READ && no_output_reloads
3397 && ! find_reg_note (insn, REG_UNUSED, operand))
3398 bad = 1;
3399 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3400 && ! const_to_mem)
3401 bad = 1;
3403 #ifdef SECONDARY_MEMORY_NEEDED
3404 /* If this alternative would use memory to move a value
3405 between registers, it would need two reloads, one for
3406 the load and one for the store. Account for the extra
3407 reload here. */
3408 if (GET_CODE (operand) == REG
3409 && REGNO (operand) < FIRST_PSEUDO_REGISTER
3410 && this_alternative[i] != NO_REGS
3411 && (SECONDARY_MEMORY_NEEDED
3412 (this_alternative[i],
3413 REGNO_REG_CLASS (REGNO (operand)),
3414 GET_MODE (operand))))
3415 losers++;
3416 #endif
3418 /* We prefer to reload pseudos over reloading other things,
3419 since such reloads may be able to be eliminated later.
3420 If we are reloading a SCRATCH, we won't be generating any
3421 insns, just using a register, so it is also preferred.
3422 So bump REJECT in other cases. Don't do this in the
3423 case where we are forcing a constant into memory and
3424 it will then win since we don't want to have a different
3425 alternative match then. */
3426 if (! (GET_CODE (operand) == REG
3427 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3428 && GET_CODE (operand) != SCRATCH
3429 && ! (const_to_mem && constmemok))
3430 reject += 2;
3432 /* Input reloads can be inherited more often than output
3433 reloads can be removed, so penalize output reloads. */
3434 if (operand_type[i] != RELOAD_FOR_INPUT
3435 && GET_CODE (operand) != SCRATCH)
3436 reject++;
3439 /* If this operand is a pseudo register that didn't get a hard
3440 reg and this alternative accepts some register, see if the
3441 class that we want is a subset of the preferred class for this
3442 register. If not, but it intersects that class, use the
3443 preferred class instead. If it does not intersect the preferred
3444 class, show that usage of this alternative should be discouraged;
3445 it will be discouraged more still if the register is `preferred
3446 or nothing'. We do this because it increases the chance of
3447 reusing our spill register in a later insn and avoiding a pair
3448 of memory stores and loads.
3450 Don't bother with this if this alternative will accept this
3451 operand.
3453 Don't do this for a multiword operand, since it is only a
3454 small win and has the risk of requiring more spill registers,
3455 which could cause a large loss.
3457 Don't do this if the preferred class has only one register
3458 because we might otherwise exhaust the class. */
3460 if (! win && ! did_match
3461 && this_alternative[i] != (int) NO_REGS
3462 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3463 && reg_class_size[(int) preferred_class[i]] > 1)
3465 if (! reg_class_subset_p (this_alternative[i],
3466 preferred_class[i]))
3468 /* Since we don't have a way of forming the intersection,
3469 we just do something special if the preferred class
3470 is a subset of the class we have; that's the most
3471 common case anyway. */
3472 if (reg_class_subset_p (preferred_class[i],
3473 this_alternative[i]))
3474 this_alternative[i] = (int) preferred_class[i];
3475 else
3476 reject += (2 + 2 * pref_or_nothing[i]);
3481 /* Now see if any output operands that are marked "earlyclobber"
3482 in this alternative conflict with any input operands
3483 or any memory addresses. */
3485 for (i = 0; i < noperands; i++)
3486 if (this_alternative_earlyclobber[i]
3487 && (this_alternative_win[i] || this_alternative_match_win[i]))
3489 struct decomposition early_data;
3491 early_data = decompose (recog_data.operand[i]);
3493 if (modified[i] == RELOAD_READ)
3494 abort ();
3496 if (this_alternative[i] == NO_REGS)
3498 this_alternative_earlyclobber[i] = 0;
3499 if (this_insn_is_asm)
3500 error_for_asm (this_insn,
3501 "`&' constraint used with no register class");
3502 else
3503 abort ();
3506 for (j = 0; j < noperands; j++)
3507 /* Is this an input operand or a memory ref? */
3508 if ((GET_CODE (recog_data.operand[j]) == MEM
3509 || modified[j] != RELOAD_WRITE)
3510 && j != i
3511 /* Ignore things like match_operator operands. */
3512 && *recog_data.constraints[j] != 0
3513 /* Don't count an input operand that is constrained to match
3514 the early clobber operand. */
3515 && ! (this_alternative_matches[j] == i
3516 && rtx_equal_p (recog_data.operand[i],
3517 recog_data.operand[j]))
3518 /* Is it altered by storing the earlyclobber operand? */
3519 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3520 early_data))
3522 /* If the output is in a single-reg class,
3523 it's costly to reload it, so reload the input instead. */
3524 if (reg_class_size[this_alternative[i]] == 1
3525 && (GET_CODE (recog_data.operand[j]) == REG
3526 || GET_CODE (recog_data.operand[j]) == SUBREG))
3528 losers++;
3529 this_alternative_win[j] = 0;
3530 this_alternative_match_win[j] = 0;
3532 else
3533 break;
3535 /* If an earlyclobber operand conflicts with something,
3536 it must be reloaded, so request this and count the cost. */
3537 if (j != noperands)
3539 losers++;
3540 this_alternative_win[i] = 0;
3541 this_alternative_match_win[j] = 0;
3542 for (j = 0; j < noperands; j++)
3543 if (this_alternative_matches[j] == i
3544 && this_alternative_match_win[j])
3546 this_alternative_win[j] = 0;
3547 this_alternative_match_win[j] = 0;
3548 losers++;
3553 /* If one alternative accepts all the operands, no reload required,
3554 choose that alternative; don't consider the remaining ones. */
3555 if (losers == 0)
3557 /* Unswap these so that they are never swapped at `finish'. */
3558 if (commutative >= 0)
3560 recog_data.operand[commutative] = substed_operand[commutative];
3561 recog_data.operand[commutative + 1]
3562 = substed_operand[commutative + 1];
3564 for (i = 0; i < noperands; i++)
3566 goal_alternative_win[i] = this_alternative_win[i];
3567 goal_alternative_match_win[i] = this_alternative_match_win[i];
3568 goal_alternative[i] = this_alternative[i];
3569 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3570 goal_alternative_matches[i] = this_alternative_matches[i];
3571 goal_alternative_earlyclobber[i]
3572 = this_alternative_earlyclobber[i];
3574 goal_alternative_number = this_alternative_number;
3575 goal_alternative_swapped = swapped;
3576 goal_earlyclobber = this_earlyclobber;
3577 goto finish;
3580 /* REJECT, set by the ! and ? constraint characters and when a register
3581 would be reloaded into a non-preferred class, discourages the use of
3582 this alternative for a reload goal. REJECT is incremented by six
3583 for each ? and two for each non-preferred class. */
3584 losers = losers * 6 + reject;
3586 /* If this alternative can be made to work by reloading,
3587 and it needs less reloading than the others checked so far,
3588 record it as the chosen goal for reloading. */
3589 if (! bad && best > losers)
3591 for (i = 0; i < noperands; i++)
3593 goal_alternative[i] = this_alternative[i];
3594 goal_alternative_win[i] = this_alternative_win[i];
3595 goal_alternative_match_win[i] = this_alternative_match_win[i];
3596 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3597 goal_alternative_matches[i] = this_alternative_matches[i];
3598 goal_alternative_earlyclobber[i]
3599 = this_alternative_earlyclobber[i];
3601 goal_alternative_swapped = swapped;
3602 best = losers;
3603 goal_alternative_number = this_alternative_number;
3604 goal_earlyclobber = this_earlyclobber;
3608 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3609 then we need to try each alternative twice,
3610 the second time matching those two operands
3611 as if we had exchanged them.
3612 To do this, really exchange them in operands.
3614 If we have just tried the alternatives the second time,
3615 return operands to normal and drop through. */
3617 if (commutative >= 0)
3619 swapped = !swapped;
3620 if (swapped)
3622 enum reg_class tclass;
3623 int t;
3625 recog_data.operand[commutative] = substed_operand[commutative + 1];
3626 recog_data.operand[commutative + 1] = substed_operand[commutative];
3627 /* Swap the duplicates too. */
3628 for (i = 0; i < recog_data.n_dups; i++)
3629 if (recog_data.dup_num[i] == commutative
3630 || recog_data.dup_num[i] == commutative + 1)
3631 *recog_data.dup_loc[i]
3632 = recog_data.operand[(int) recog_data.dup_num[i]];
3634 tclass = preferred_class[commutative];
3635 preferred_class[commutative] = preferred_class[commutative + 1];
3636 preferred_class[commutative + 1] = tclass;
3638 t = pref_or_nothing[commutative];
3639 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3640 pref_or_nothing[commutative + 1] = t;
3642 memcpy (constraints, recog_data.constraints,
3643 noperands * sizeof (char *));
3644 goto try_swapped;
3646 else
3648 recog_data.operand[commutative] = substed_operand[commutative];
3649 recog_data.operand[commutative + 1]
3650 = substed_operand[commutative + 1];
3651 /* Unswap the duplicates too. */
3652 for (i = 0; i < recog_data.n_dups; i++)
3653 if (recog_data.dup_num[i] == commutative
3654 || recog_data.dup_num[i] == commutative + 1)
3655 *recog_data.dup_loc[i]
3656 = recog_data.operand[(int) recog_data.dup_num[i]];
3660 /* The operands don't meet the constraints.
3661 goal_alternative describes the alternative
3662 that we could reach by reloading the fewest operands.
3663 Reload so as to fit it. */
3665 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3667 /* No alternative works with reloads?? */
3668 if (insn_code_number >= 0)
3669 fatal_insn ("unable to generate reloads for:", insn);
3670 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3671 /* Avoid further trouble with this insn. */
3672 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3673 n_reloads = 0;
3674 return 0;
3677 /* Jump to `finish' from above if all operands are valid already.
3678 In that case, goal_alternative_win is all 1. */
3679 finish:
3681 /* Right now, for any pair of operands I and J that are required to match,
3682 with I < J,
3683 goal_alternative_matches[J] is I.
3684 Set up goal_alternative_matched as the inverse function:
3685 goal_alternative_matched[I] = J. */
3687 for (i = 0; i < noperands; i++)
3688 goal_alternative_matched[i] = -1;
3690 for (i = 0; i < noperands; i++)
3691 if (! goal_alternative_win[i]
3692 && goal_alternative_matches[i] >= 0)
3693 goal_alternative_matched[goal_alternative_matches[i]] = i;
3695 for (i = 0; i < noperands; i++)
3696 goal_alternative_win[i] |= goal_alternative_match_win[i];
3698 /* If the best alternative is with operands 1 and 2 swapped,
3699 consider them swapped before reporting the reloads. Update the
3700 operand numbers of any reloads already pushed. */
3702 if (goal_alternative_swapped)
3704 rtx tem;
3706 tem = substed_operand[commutative];
3707 substed_operand[commutative] = substed_operand[commutative + 1];
3708 substed_operand[commutative + 1] = tem;
3709 tem = recog_data.operand[commutative];
3710 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3711 recog_data.operand[commutative + 1] = tem;
3712 tem = *recog_data.operand_loc[commutative];
3713 *recog_data.operand_loc[commutative]
3714 = *recog_data.operand_loc[commutative + 1];
3715 *recog_data.operand_loc[commutative + 1] = tem;
3717 for (i = 0; i < n_reloads; i++)
3719 if (rld[i].opnum == commutative)
3720 rld[i].opnum = commutative + 1;
3721 else if (rld[i].opnum == commutative + 1)
3722 rld[i].opnum = commutative;
3726 for (i = 0; i < noperands; i++)
3728 operand_reloadnum[i] = -1;
3730 /* If this is an earlyclobber operand, we need to widen the scope.
3731 The reload must remain valid from the start of the insn being
3732 reloaded until after the operand is stored into its destination.
3733 We approximate this with RELOAD_OTHER even though we know that we
3734 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3736 One special case that is worth checking is when we have an
3737 output that is earlyclobber but isn't used past the insn (typically
3738 a SCRATCH). In this case, we only need have the reload live
3739 through the insn itself, but not for any of our input or output
3740 reloads.
3741 But we must not accidentally narrow the scope of an existing
3742 RELOAD_OTHER reload - leave these alone.
3744 In any case, anything needed to address this operand can remain
3745 however they were previously categorized. */
3747 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3748 operand_type[i]
3749 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3750 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3753 /* Any constants that aren't allowed and can't be reloaded
3754 into registers are here changed into memory references. */
3755 for (i = 0; i < noperands; i++)
3756 if (! goal_alternative_win[i]
3757 && CONSTANT_P (recog_data.operand[i])
3758 /* force_const_mem does not accept HIGH. */
3759 && GET_CODE (recog_data.operand[i]) != HIGH
3760 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3761 (enum reg_class) goal_alternative[i])
3762 == NO_REGS)
3763 || no_input_reloads)
3764 && operand_mode[i] != VOIDmode)
3766 substed_operand[i] = recog_data.operand[i]
3767 = find_reloads_toplev (force_const_mem (operand_mode[i],
3768 recog_data.operand[i]),
3769 i, address_type[i], ind_levels, 0, insn,
3770 NULL);
3771 if (alternative_allows_memconst (recog_data.constraints[i],
3772 goal_alternative_number))
3773 goal_alternative_win[i] = 1;
3776 /* Record the values of the earlyclobber operands for the caller. */
3777 if (goal_earlyclobber)
3778 for (i = 0; i < noperands; i++)
3779 if (goal_alternative_earlyclobber[i])
3780 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3782 /* Now record reloads for all the operands that need them. */
3783 for (i = 0; i < noperands; i++)
3784 if (! goal_alternative_win[i])
3786 /* Operands that match previous ones have already been handled. */
3787 if (goal_alternative_matches[i] >= 0)
3789 /* Handle an operand with a nonoffsettable address
3790 appearing where an offsettable address will do
3791 by reloading the address into a base register.
3793 ??? We can also do this when the operand is a register and
3794 reg_equiv_mem is not offsettable, but this is a bit tricky,
3795 so we don't bother with it. It may not be worth doing. */
3796 else if (goal_alternative_matched[i] == -1
3797 && goal_alternative_offmemok[i]
3798 && GET_CODE (recog_data.operand[i]) == MEM)
3800 operand_reloadnum[i]
3801 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3802 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3803 MODE_BASE_REG_CLASS (VOIDmode),
3804 GET_MODE (XEXP (recog_data.operand[i], 0)),
3805 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3806 rld[operand_reloadnum[i]].inc
3807 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3809 /* If this operand is an output, we will have made any
3810 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3811 now we are treating part of the operand as an input, so
3812 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3814 if (modified[i] == RELOAD_WRITE)
3816 for (j = 0; j < n_reloads; j++)
3818 if (rld[j].opnum == i)
3820 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3821 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3822 else if (rld[j].when_needed
3823 == RELOAD_FOR_OUTADDR_ADDRESS)
3824 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3829 else if (goal_alternative_matched[i] == -1)
3831 operand_reloadnum[i]
3832 = push_reload ((modified[i] != RELOAD_WRITE
3833 ? recog_data.operand[i] : 0),
3834 (modified[i] != RELOAD_READ
3835 ? recog_data.operand[i] : 0),
3836 (modified[i] != RELOAD_WRITE
3837 ? recog_data.operand_loc[i] : 0),
3838 (modified[i] != RELOAD_READ
3839 ? recog_data.operand_loc[i] : 0),
3840 (enum reg_class) goal_alternative[i],
3841 (modified[i] == RELOAD_WRITE
3842 ? VOIDmode : operand_mode[i]),
3843 (modified[i] == RELOAD_READ
3844 ? VOIDmode : operand_mode[i]),
3845 (insn_code_number < 0 ? 0
3846 : insn_data[insn_code_number].operand[i].strict_low),
3847 0, i, operand_type[i]);
3849 /* In a matching pair of operands, one must be input only
3850 and the other must be output only.
3851 Pass the input operand as IN and the other as OUT. */
3852 else if (modified[i] == RELOAD_READ
3853 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3855 operand_reloadnum[i]
3856 = push_reload (recog_data.operand[i],
3857 recog_data.operand[goal_alternative_matched[i]],
3858 recog_data.operand_loc[i],
3859 recog_data.operand_loc[goal_alternative_matched[i]],
3860 (enum reg_class) goal_alternative[i],
3861 operand_mode[i],
3862 operand_mode[goal_alternative_matched[i]],
3863 0, 0, i, RELOAD_OTHER);
3864 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3866 else if (modified[i] == RELOAD_WRITE
3867 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3869 operand_reloadnum[goal_alternative_matched[i]]
3870 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3871 recog_data.operand[i],
3872 recog_data.operand_loc[goal_alternative_matched[i]],
3873 recog_data.operand_loc[i],
3874 (enum reg_class) goal_alternative[i],
3875 operand_mode[goal_alternative_matched[i]],
3876 operand_mode[i],
3877 0, 0, i, RELOAD_OTHER);
3878 operand_reloadnum[i] = output_reloadnum;
3880 else if (insn_code_number >= 0)
3881 abort ();
3882 else
3884 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3885 /* Avoid further trouble with this insn. */
3886 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3887 n_reloads = 0;
3888 return 0;
3891 else if (goal_alternative_matched[i] < 0
3892 && goal_alternative_matches[i] < 0
3893 && !address_operand_reloaded[i]
3894 && optimize)
3896 /* For each non-matching operand that's a MEM or a pseudo-register
3897 that didn't get a hard register, make an optional reload.
3898 This may get done even if the insn needs no reloads otherwise. */
3900 rtx operand = recog_data.operand[i];
3902 while (GET_CODE (operand) == SUBREG)
3903 operand = SUBREG_REG (operand);
3904 if ((GET_CODE (operand) == MEM
3905 || (GET_CODE (operand) == REG
3906 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3907 /* If this is only for an output, the optional reload would not
3908 actually cause us to use a register now, just note that
3909 something is stored here. */
3910 && ((enum reg_class) goal_alternative[i] != NO_REGS
3911 || modified[i] == RELOAD_WRITE)
3912 && ! no_input_reloads
3913 /* An optional output reload might allow to delete INSN later.
3914 We mustn't make in-out reloads on insns that are not permitted
3915 output reloads.
3916 If this is an asm, we can't delete it; we must not even call
3917 push_reload for an optional output reload in this case,
3918 because we can't be sure that the constraint allows a register,
3919 and push_reload verifies the constraints for asms. */
3920 && (modified[i] == RELOAD_READ
3921 || (! no_output_reloads && ! this_insn_is_asm)))
3922 operand_reloadnum[i]
3923 = push_reload ((modified[i] != RELOAD_WRITE
3924 ? recog_data.operand[i] : 0),
3925 (modified[i] != RELOAD_READ
3926 ? recog_data.operand[i] : 0),
3927 (modified[i] != RELOAD_WRITE
3928 ? recog_data.operand_loc[i] : 0),
3929 (modified[i] != RELOAD_READ
3930 ? recog_data.operand_loc[i] : 0),
3931 (enum reg_class) goal_alternative[i],
3932 (modified[i] == RELOAD_WRITE
3933 ? VOIDmode : operand_mode[i]),
3934 (modified[i] == RELOAD_READ
3935 ? VOIDmode : operand_mode[i]),
3936 (insn_code_number < 0 ? 0
3937 : insn_data[insn_code_number].operand[i].strict_low),
3938 1, i, operand_type[i]);
3939 /* If a memory reference remains (either as a MEM or a pseudo that
3940 did not get a hard register), yet we can't make an optional
3941 reload, check if this is actually a pseudo register reference;
3942 we then need to emit a USE and/or a CLOBBER so that reload
3943 inheritance will do the right thing. */
3944 else if (replace
3945 && (GET_CODE (operand) == MEM
3946 || (GET_CODE (operand) == REG
3947 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3948 && reg_renumber [REGNO (operand)] < 0)))
3950 operand = *recog_data.operand_loc[i];
3952 while (GET_CODE (operand) == SUBREG)
3953 operand = SUBREG_REG (operand);
3954 if (GET_CODE (operand) == REG)
3956 if (modified[i] != RELOAD_WRITE)
3957 /* We mark the USE with QImode so that we recognize
3958 it as one that can be safely deleted at the end
3959 of reload. */
3960 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3961 insn), QImode);
3962 if (modified[i] != RELOAD_READ)
3963 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3967 else if (goal_alternative_matches[i] >= 0
3968 && goal_alternative_win[goal_alternative_matches[i]]
3969 && modified[i] == RELOAD_READ
3970 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3971 && ! no_input_reloads && ! no_output_reloads
3972 && optimize)
3974 /* Similarly, make an optional reload for a pair of matching
3975 objects that are in MEM or a pseudo that didn't get a hard reg. */
3977 rtx operand = recog_data.operand[i];
3979 while (GET_CODE (operand) == SUBREG)
3980 operand = SUBREG_REG (operand);
3981 if ((GET_CODE (operand) == MEM
3982 || (GET_CODE (operand) == REG
3983 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3984 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3985 != NO_REGS))
3986 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3987 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3988 recog_data.operand[i],
3989 recog_data.operand_loc[goal_alternative_matches[i]],
3990 recog_data.operand_loc[i],
3991 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3992 operand_mode[goal_alternative_matches[i]],
3993 operand_mode[i],
3994 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3997 /* Perform whatever substitutions on the operands we are supposed
3998 to make due to commutativity or replacement of registers
3999 with equivalent constants or memory slots. */
4001 for (i = 0; i < noperands; i++)
4003 /* We only do this on the last pass through reload, because it is
4004 possible for some data (like reg_equiv_address) to be changed during
4005 later passes. Moreover, we loose the opportunity to get a useful
4006 reload_{in,out}_reg when we do these replacements. */
4008 if (replace)
4010 rtx substitution = substed_operand[i];
4012 *recog_data.operand_loc[i] = substitution;
4014 /* If we're replacing an operand with a LABEL_REF, we need
4015 to make sure that there's a REG_LABEL note attached to
4016 this instruction. */
4017 if (GET_CODE (insn) != JUMP_INSN
4018 && GET_CODE (substitution) == LABEL_REF
4019 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4020 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4021 XEXP (substitution, 0),
4022 REG_NOTES (insn));
4024 else
4025 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4028 /* If this insn pattern contains any MATCH_DUP's, make sure that
4029 they will be substituted if the operands they match are substituted.
4030 Also do now any substitutions we already did on the operands.
4032 Don't do this if we aren't making replacements because we might be
4033 propagating things allocated by frame pointer elimination into places
4034 it doesn't expect. */
4036 if (insn_code_number >= 0 && replace)
4037 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4039 int opno = recog_data.dup_num[i];
4040 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4041 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4044 #if 0
4045 /* This loses because reloading of prior insns can invalidate the equivalence
4046 (or at least find_equiv_reg isn't smart enough to find it any more),
4047 causing this insn to need more reload regs than it needed before.
4048 It may be too late to make the reload regs available.
4049 Now this optimization is done safely in choose_reload_regs. */
4051 /* For each reload of a reg into some other class of reg,
4052 search for an existing equivalent reg (same value now) in the right class.
4053 We can use it as long as we don't need to change its contents. */
4054 for (i = 0; i < n_reloads; i++)
4055 if (rld[i].reg_rtx == 0
4056 && rld[i].in != 0
4057 && GET_CODE (rld[i].in) == REG
4058 && rld[i].out == 0)
4060 rld[i].reg_rtx
4061 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4062 static_reload_reg_p, 0, rld[i].inmode);
4063 /* Prevent generation of insn to load the value
4064 because the one we found already has the value. */
4065 if (rld[i].reg_rtx)
4066 rld[i].in = rld[i].reg_rtx;
4068 #endif
4070 /* Perhaps an output reload can be combined with another
4071 to reduce needs by one. */
4072 if (!goal_earlyclobber)
4073 combine_reloads ();
4075 /* If we have a pair of reloads for parts of an address, they are reloading
4076 the same object, the operands themselves were not reloaded, and they
4077 are for two operands that are supposed to match, merge the reloads and
4078 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4080 for (i = 0; i < n_reloads; i++)
4082 int k;
4084 for (j = i + 1; j < n_reloads; j++)
4085 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4086 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4087 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4088 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4089 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4090 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4091 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4092 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4093 && rtx_equal_p (rld[i].in, rld[j].in)
4094 && (operand_reloadnum[rld[i].opnum] < 0
4095 || rld[operand_reloadnum[rld[i].opnum]].optional)
4096 && (operand_reloadnum[rld[j].opnum] < 0
4097 || rld[operand_reloadnum[rld[j].opnum]].optional)
4098 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4099 || (goal_alternative_matches[rld[j].opnum]
4100 == rld[i].opnum)))
4102 for (k = 0; k < n_replacements; k++)
4103 if (replacements[k].what == j)
4104 replacements[k].what = i;
4106 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4107 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4108 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4109 else
4110 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4111 rld[j].in = 0;
4115 /* Scan all the reloads and update their type.
4116 If a reload is for the address of an operand and we didn't reload
4117 that operand, change the type. Similarly, change the operand number
4118 of a reload when two operands match. If a reload is optional, treat it
4119 as though the operand isn't reloaded.
4121 ??? This latter case is somewhat odd because if we do the optional
4122 reload, it means the object is hanging around. Thus we need only
4123 do the address reload if the optional reload was NOT done.
4125 Change secondary reloads to be the address type of their operand, not
4126 the normal type.
4128 If an operand's reload is now RELOAD_OTHER, change any
4129 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4130 RELOAD_FOR_OTHER_ADDRESS. */
4132 for (i = 0; i < n_reloads; i++)
4134 if (rld[i].secondary_p
4135 && rld[i].when_needed == operand_type[rld[i].opnum])
4136 rld[i].when_needed = address_type[rld[i].opnum];
4138 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4139 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4140 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4141 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4142 && (operand_reloadnum[rld[i].opnum] < 0
4143 || rld[operand_reloadnum[rld[i].opnum]].optional))
4145 /* If we have a secondary reload to go along with this reload,
4146 change its type to RELOAD_FOR_OPADDR_ADDR. */
4148 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4149 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4150 && rld[i].secondary_in_reload != -1)
4152 int secondary_in_reload = rld[i].secondary_in_reload;
4154 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4156 /* If there's a tertiary reload we have to change it also. */
4157 if (secondary_in_reload > 0
4158 && rld[secondary_in_reload].secondary_in_reload != -1)
4159 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4160 = RELOAD_FOR_OPADDR_ADDR;
4163 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4164 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4165 && rld[i].secondary_out_reload != -1)
4167 int secondary_out_reload = rld[i].secondary_out_reload;
4169 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4171 /* If there's a tertiary reload we have to change it also. */
4172 if (secondary_out_reload
4173 && rld[secondary_out_reload].secondary_out_reload != -1)
4174 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4175 = RELOAD_FOR_OPADDR_ADDR;
4178 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4179 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4180 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4181 else
4182 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4185 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4186 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4187 && operand_reloadnum[rld[i].opnum] >= 0
4188 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4189 == RELOAD_OTHER))
4190 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4192 if (goal_alternative_matches[rld[i].opnum] >= 0)
4193 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4196 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4197 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4198 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4200 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4201 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4202 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4203 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4204 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4205 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4206 This is complicated by the fact that a single operand can have more
4207 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4208 choose_reload_regs without affecting code quality, and cases that
4209 actually fail are extremely rare, so it turns out to be better to fix
4210 the problem here by not generating cases that choose_reload_regs will
4211 fail for. */
4212 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4213 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4214 a single operand.
4215 We can reduce the register pressure by exploiting that a
4216 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4217 does not conflict with any of them, if it is only used for the first of
4218 the RELOAD_FOR_X_ADDRESS reloads. */
4220 int first_op_addr_num = -2;
4221 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4222 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4223 int need_change = 0;
4224 /* We use last_op_addr_reload and the contents of the above arrays
4225 first as flags - -2 means no instance encountered, -1 means exactly
4226 one instance encountered.
4227 If more than one instance has been encountered, we store the reload
4228 number of the first reload of the kind in question; reload numbers
4229 are known to be non-negative. */
4230 for (i = 0; i < noperands; i++)
4231 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4232 for (i = n_reloads - 1; i >= 0; i--)
4234 switch (rld[i].when_needed)
4236 case RELOAD_FOR_OPERAND_ADDRESS:
4237 if (++first_op_addr_num >= 0)
4239 first_op_addr_num = i;
4240 need_change = 1;
4242 break;
4243 case RELOAD_FOR_INPUT_ADDRESS:
4244 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4246 first_inpaddr_num[rld[i].opnum] = i;
4247 need_change = 1;
4249 break;
4250 case RELOAD_FOR_OUTPUT_ADDRESS:
4251 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4253 first_outpaddr_num[rld[i].opnum] = i;
4254 need_change = 1;
4256 break;
4257 default:
4258 break;
4262 if (need_change)
4264 for (i = 0; i < n_reloads; i++)
4266 int first_num;
4267 enum reload_type type;
4269 switch (rld[i].when_needed)
4271 case RELOAD_FOR_OPADDR_ADDR:
4272 first_num = first_op_addr_num;
4273 type = RELOAD_FOR_OPERAND_ADDRESS;
4274 break;
4275 case RELOAD_FOR_INPADDR_ADDRESS:
4276 first_num = first_inpaddr_num[rld[i].opnum];
4277 type = RELOAD_FOR_INPUT_ADDRESS;
4278 break;
4279 case RELOAD_FOR_OUTADDR_ADDRESS:
4280 first_num = first_outpaddr_num[rld[i].opnum];
4281 type = RELOAD_FOR_OUTPUT_ADDRESS;
4282 break;
4283 default:
4284 continue;
4286 if (first_num < 0)
4287 continue;
4288 else if (i > first_num)
4289 rld[i].when_needed = type;
4290 else
4292 /* Check if the only TYPE reload that uses reload I is
4293 reload FIRST_NUM. */
4294 for (j = n_reloads - 1; j > first_num; j--)
4296 if (rld[j].when_needed == type
4297 && (rld[i].secondary_p
4298 ? rld[j].secondary_in_reload == i
4299 : reg_mentioned_p (rld[i].in, rld[j].in)))
4301 rld[i].when_needed = type;
4302 break;
4310 /* See if we have any reloads that are now allowed to be merged
4311 because we've changed when the reload is needed to
4312 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4313 check for the most common cases. */
4315 for (i = 0; i < n_reloads; i++)
4316 if (rld[i].in != 0 && rld[i].out == 0
4317 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4318 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4319 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4320 for (j = 0; j < n_reloads; j++)
4321 if (i != j && rld[j].in != 0 && rld[j].out == 0
4322 && rld[j].when_needed == rld[i].when_needed
4323 && MATCHES (rld[i].in, rld[j].in)
4324 && rld[i].class == rld[j].class
4325 && !rld[i].nocombine && !rld[j].nocombine
4326 && rld[i].reg_rtx == rld[j].reg_rtx)
4328 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4329 transfer_replacements (i, j);
4330 rld[j].in = 0;
4333 #ifdef HAVE_cc0
4334 /* If we made any reloads for addresses, see if they violate a
4335 "no input reloads" requirement for this insn. But loads that we
4336 do after the insn (such as for output addresses) are fine. */
4337 if (no_input_reloads)
4338 for (i = 0; i < n_reloads; i++)
4339 if (rld[i].in != 0
4340 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4341 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4342 abort ();
4343 #endif
4345 /* Compute reload_mode and reload_nregs. */
4346 for (i = 0; i < n_reloads; i++)
4348 rld[i].mode
4349 = (rld[i].inmode == VOIDmode
4350 || (GET_MODE_SIZE (rld[i].outmode)
4351 > GET_MODE_SIZE (rld[i].inmode)))
4352 ? rld[i].outmode : rld[i].inmode;
4354 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4357 /* Special case a simple move with an input reload and a
4358 destination of a hard reg, if the hard reg is ok, use it. */
4359 for (i = 0; i < n_reloads; i++)
4360 if (rld[i].when_needed == RELOAD_FOR_INPUT
4361 && GET_CODE (PATTERN (insn)) == SET
4362 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4363 && SET_SRC (PATTERN (insn)) == rld[i].in)
4365 rtx dest = SET_DEST (PATTERN (insn));
4366 unsigned int regno = REGNO (dest);
4368 if (regno < FIRST_PSEUDO_REGISTER
4369 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4370 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4372 int nr = HARD_REGNO_NREGS (regno, rld[i].mode);
4373 int ok = 1, nri;
4375 for (nri = 1; nri < nr; nri ++)
4376 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4377 ok = 0;
4379 if (ok)
4380 rld[i].reg_rtx = dest;
4384 return retval;
4387 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4388 accepts a memory operand with constant address. */
4390 static int
4391 alternative_allows_memconst (const char *constraint, int altnum)
4393 int c;
4394 /* Skip alternatives before the one requested. */
4395 while (altnum > 0)
4397 while (*constraint++ != ',');
4398 altnum--;
4400 /* Scan the requested alternative for 'm' or 'o'.
4401 If one of them is present, this alternative accepts memory constants. */
4402 for (; (c = *constraint) && c != ',' && c != '#';
4403 constraint += CONSTRAINT_LEN (c, constraint))
4404 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4405 return 1;
4406 return 0;
4409 /* Scan X for memory references and scan the addresses for reloading.
4410 Also checks for references to "constant" regs that we want to eliminate
4411 and replaces them with the values they stand for.
4412 We may alter X destructively if it contains a reference to such.
4413 If X is just a constant reg, we return the equivalent value
4414 instead of X.
4416 IND_LEVELS says how many levels of indirect addressing this machine
4417 supports.
4419 OPNUM and TYPE identify the purpose of the reload.
4421 IS_SET_DEST is true if X is the destination of a SET, which is not
4422 appropriate to be replaced by a constant.
4424 INSN, if nonzero, is the insn in which we do the reload. It is used
4425 to determine if we may generate output reloads, and where to put USEs
4426 for pseudos that we have to replace with stack slots.
4428 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4429 result of find_reloads_address. */
4431 static rtx
4432 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4433 int ind_levels, int is_set_dest, rtx insn,
4434 int *address_reloaded)
4436 RTX_CODE code = GET_CODE (x);
4438 const char *fmt = GET_RTX_FORMAT (code);
4439 int i;
4440 int copied;
4442 if (code == REG)
4444 /* This code is duplicated for speed in find_reloads. */
4445 int regno = REGNO (x);
4446 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4447 x = reg_equiv_constant[regno];
4448 #if 0
4449 /* This creates (subreg (mem...)) which would cause an unnecessary
4450 reload of the mem. */
4451 else if (reg_equiv_mem[regno] != 0)
4452 x = reg_equiv_mem[regno];
4453 #endif
4454 else if (reg_equiv_memory_loc[regno]
4455 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4457 rtx mem = make_memloc (x, regno);
4458 if (reg_equiv_address[regno]
4459 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4461 /* If this is not a toplevel operand, find_reloads doesn't see
4462 this substitution. We have to emit a USE of the pseudo so
4463 that delete_output_reload can see it. */
4464 if (replace_reloads && recog_data.operand[opnum] != x)
4465 /* We mark the USE with QImode so that we recognize it
4466 as one that can be safely deleted at the end of
4467 reload. */
4468 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4469 QImode);
4470 x = mem;
4471 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4472 opnum, type, ind_levels, insn);
4473 if (address_reloaded)
4474 *address_reloaded = i;
4477 return x;
4479 if (code == MEM)
4481 rtx tem = x;
4483 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4484 opnum, type, ind_levels, insn);
4485 if (address_reloaded)
4486 *address_reloaded = i;
4488 return tem;
4491 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4493 /* Check for SUBREG containing a REG that's equivalent to a constant.
4494 If the constant has a known value, truncate it right now.
4495 Similarly if we are extracting a single-word of a multi-word
4496 constant. If the constant is symbolic, allow it to be substituted
4497 normally. push_reload will strip the subreg later. If the
4498 constant is VOIDmode, abort because we will lose the mode of
4499 the register (this should never happen because one of the cases
4500 above should handle it). */
4502 int regno = REGNO (SUBREG_REG (x));
4503 rtx tem;
4505 if (subreg_lowpart_p (x)
4506 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4507 && reg_equiv_constant[regno] != 0
4508 && (tem = gen_lowpart_common (GET_MODE (x),
4509 reg_equiv_constant[regno])) != 0)
4510 return tem;
4512 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4513 && reg_equiv_constant[regno] != 0)
4515 tem =
4516 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4517 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4518 if (!tem)
4519 abort ();
4520 return tem;
4523 /* If the subreg contains a reg that will be converted to a mem,
4524 convert the subreg to a narrower memref now.
4525 Otherwise, we would get (subreg (mem ...) ...),
4526 which would force reload of the mem.
4528 We also need to do this if there is an equivalent MEM that is
4529 not offsettable. In that case, alter_subreg would produce an
4530 invalid address on big-endian machines.
4532 For machines that extend byte loads, we must not reload using
4533 a wider mode if we have a paradoxical SUBREG. find_reloads will
4534 force a reload in that case. So we should not do anything here. */
4536 else if (regno >= FIRST_PSEUDO_REGISTER
4537 #ifdef LOAD_EXTEND_OP
4538 && (GET_MODE_SIZE (GET_MODE (x))
4539 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4540 #endif
4541 && (reg_equiv_address[regno] != 0
4542 || (reg_equiv_mem[regno] != 0
4543 && (! strict_memory_address_p (GET_MODE (x),
4544 XEXP (reg_equiv_mem[regno], 0))
4545 || ! offsettable_memref_p (reg_equiv_mem[regno])
4546 || num_not_at_initial_offset))))
4547 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4548 insn);
4551 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4553 if (fmt[i] == 'e')
4555 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4556 ind_levels, is_set_dest, insn,
4557 address_reloaded);
4558 /* If we have replaced a reg with it's equivalent memory loc -
4559 that can still be handled here e.g. if it's in a paradoxical
4560 subreg - we must make the change in a copy, rather than using
4561 a destructive change. This way, find_reloads can still elect
4562 not to do the change. */
4563 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4565 x = shallow_copy_rtx (x);
4566 copied = 1;
4568 XEXP (x, i) = new_part;
4571 return x;
4574 /* Return a mem ref for the memory equivalent of reg REGNO.
4575 This mem ref is not shared with anything. */
4577 static rtx
4578 make_memloc (rtx ad, int regno)
4580 /* We must rerun eliminate_regs, in case the elimination
4581 offsets have changed. */
4582 rtx tem
4583 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4585 /* If TEM might contain a pseudo, we must copy it to avoid
4586 modifying it when we do the substitution for the reload. */
4587 if (rtx_varies_p (tem, 0))
4588 tem = copy_rtx (tem);
4590 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4591 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4593 /* Copy the result if it's still the same as the equivalence, to avoid
4594 modifying it when we do the substitution for the reload. */
4595 if (tem == reg_equiv_memory_loc[regno])
4596 tem = copy_rtx (tem);
4597 return tem;
4600 /* Returns true if AD could be turned into a valid memory reference
4601 to mode MODE by reloading the part pointed to by PART into a
4602 register. */
4604 static int
4605 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4607 int retv;
4608 rtx tem = *part;
4609 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4611 *part = reg;
4612 retv = memory_address_p (mode, ad);
4613 *part = tem;
4615 return retv;
4618 /* Record all reloads needed for handling memory address AD
4619 which appears in *LOC in a memory reference to mode MODE
4620 which itself is found in location *MEMREFLOC.
4621 Note that we take shortcuts assuming that no multi-reg machine mode
4622 occurs as part of an address.
4624 OPNUM and TYPE specify the purpose of this reload.
4626 IND_LEVELS says how many levels of indirect addressing this machine
4627 supports.
4629 INSN, if nonzero, is the insn in which we do the reload. It is used
4630 to determine if we may generate output reloads, and where to put USEs
4631 for pseudos that we have to replace with stack slots.
4633 Value is nonzero if this address is reloaded or replaced as a whole.
4634 This is interesting to the caller if the address is an autoincrement.
4636 Note that there is no verification that the address will be valid after
4637 this routine does its work. Instead, we rely on the fact that the address
4638 was valid when reload started. So we need only undo things that reload
4639 could have broken. These are wrong register types, pseudos not allocated
4640 to a hard register, and frame pointer elimination. */
4642 static int
4643 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4644 rtx *loc, int opnum, enum reload_type type,
4645 int ind_levels, rtx insn)
4647 int regno;
4648 int removed_and = 0;
4649 rtx tem;
4651 /* If the address is a register, see if it is a legitimate address and
4652 reload if not. We first handle the cases where we need not reload
4653 or where we must reload in a non-standard way. */
4655 if (GET_CODE (ad) == REG)
4657 regno = REGNO (ad);
4659 /* If the register is equivalent to an invariant expression, substitute
4660 the invariant, and eliminate any eliminable register references. */
4661 tem = reg_equiv_constant[regno];
4662 if (tem != 0
4663 && (tem = eliminate_regs (tem, mode, insn))
4664 && strict_memory_address_p (mode, tem))
4666 *loc = ad = tem;
4667 return 0;
4670 tem = reg_equiv_memory_loc[regno];
4671 if (tem != 0)
4673 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4675 tem = make_memloc (ad, regno);
4676 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4678 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4679 &XEXP (tem, 0), opnum,
4680 ADDR_TYPE (type), ind_levels, insn);
4682 /* We can avoid a reload if the register's equivalent memory
4683 expression is valid as an indirect memory address.
4684 But not all addresses are valid in a mem used as an indirect
4685 address: only reg or reg+constant. */
4687 if (ind_levels > 0
4688 && strict_memory_address_p (mode, tem)
4689 && (GET_CODE (XEXP (tem, 0)) == REG
4690 || (GET_CODE (XEXP (tem, 0)) == PLUS
4691 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4692 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4694 /* TEM is not the same as what we'll be replacing the
4695 pseudo with after reload, put a USE in front of INSN
4696 in the final reload pass. */
4697 if (replace_reloads
4698 && num_not_at_initial_offset
4699 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4701 *loc = tem;
4702 /* We mark the USE with QImode so that we
4703 recognize it as one that can be safely
4704 deleted at the end of reload. */
4705 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4706 insn), QImode);
4708 /* This doesn't really count as replacing the address
4709 as a whole, since it is still a memory access. */
4711 return 0;
4713 ad = tem;
4717 /* The only remaining case where we can avoid a reload is if this is a
4718 hard register that is valid as a base register and which is not the
4719 subject of a CLOBBER in this insn. */
4721 else if (regno < FIRST_PSEUDO_REGISTER
4722 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4723 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4724 return 0;
4726 /* If we do not have one of the cases above, we must do the reload. */
4727 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4728 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4729 return 1;
4732 if (strict_memory_address_p (mode, ad))
4734 /* The address appears valid, so reloads are not needed.
4735 But the address may contain an eliminable register.
4736 This can happen because a machine with indirect addressing
4737 may consider a pseudo register by itself a valid address even when
4738 it has failed to get a hard reg.
4739 So do a tree-walk to find and eliminate all such regs. */
4741 /* But first quickly dispose of a common case. */
4742 if (GET_CODE (ad) == PLUS
4743 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4744 && GET_CODE (XEXP (ad, 0)) == REG
4745 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4746 return 0;
4748 subst_reg_equivs_changed = 0;
4749 *loc = subst_reg_equivs (ad, insn);
4751 if (! subst_reg_equivs_changed)
4752 return 0;
4754 /* Check result for validity after substitution. */
4755 if (strict_memory_address_p (mode, ad))
4756 return 0;
4759 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4762 if (memrefloc)
4764 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4765 ind_levels, win);
4767 break;
4768 win:
4769 *memrefloc = copy_rtx (*memrefloc);
4770 XEXP (*memrefloc, 0) = ad;
4771 move_replacements (&ad, &XEXP (*memrefloc, 0));
4772 return 1;
4774 while (0);
4775 #endif
4777 /* The address is not valid. We have to figure out why. First see if
4778 we have an outer AND and remove it if so. Then analyze what's inside. */
4780 if (GET_CODE (ad) == AND)
4782 removed_and = 1;
4783 loc = &XEXP (ad, 0);
4784 ad = *loc;
4787 /* One possibility for why the address is invalid is that it is itself
4788 a MEM. This can happen when the frame pointer is being eliminated, a
4789 pseudo is not allocated to a hard register, and the offset between the
4790 frame and stack pointers is not its initial value. In that case the
4791 pseudo will have been replaced by a MEM referring to the
4792 stack pointer. */
4793 if (GET_CODE (ad) == MEM)
4795 /* First ensure that the address in this MEM is valid. Then, unless
4796 indirect addresses are valid, reload the MEM into a register. */
4797 tem = ad;
4798 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4799 opnum, ADDR_TYPE (type),
4800 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4802 /* If tem was changed, then we must create a new memory reference to
4803 hold it and store it back into memrefloc. */
4804 if (tem != ad && memrefloc)
4806 *memrefloc = copy_rtx (*memrefloc);
4807 copy_replacements (tem, XEXP (*memrefloc, 0));
4808 loc = &XEXP (*memrefloc, 0);
4809 if (removed_and)
4810 loc = &XEXP (*loc, 0);
4813 /* Check similar cases as for indirect addresses as above except
4814 that we can allow pseudos and a MEM since they should have been
4815 taken care of above. */
4817 if (ind_levels == 0
4818 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4819 || GET_CODE (XEXP (tem, 0)) == MEM
4820 || ! (GET_CODE (XEXP (tem, 0)) == REG
4821 || (GET_CODE (XEXP (tem, 0)) == PLUS
4822 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4823 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4825 /* Must use TEM here, not AD, since it is the one that will
4826 have any subexpressions reloaded, if needed. */
4827 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4828 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4829 VOIDmode, 0,
4830 0, opnum, type);
4831 return ! removed_and;
4833 else
4834 return 0;
4837 /* If we have address of a stack slot but it's not valid because the
4838 displacement is too large, compute the sum in a register.
4839 Handle all base registers here, not just fp/ap/sp, because on some
4840 targets (namely SH) we can also get too large displacements from
4841 big-endian corrections. */
4842 else if (GET_CODE (ad) == PLUS
4843 && GET_CODE (XEXP (ad, 0)) == REG
4844 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4845 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4846 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4848 /* Unshare the MEM rtx so we can safely alter it. */
4849 if (memrefloc)
4851 *memrefloc = copy_rtx (*memrefloc);
4852 loc = &XEXP (*memrefloc, 0);
4853 if (removed_and)
4854 loc = &XEXP (*loc, 0);
4857 if (double_reg_address_ok)
4859 /* Unshare the sum as well. */
4860 *loc = ad = copy_rtx (ad);
4862 /* Reload the displacement into an index reg.
4863 We assume the frame pointer or arg pointer is a base reg. */
4864 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4865 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4866 type, ind_levels);
4867 return 0;
4869 else
4871 /* If the sum of two regs is not necessarily valid,
4872 reload the sum into a base reg.
4873 That will at least work. */
4874 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4875 Pmode, opnum, type, ind_levels);
4877 return ! removed_and;
4880 /* If we have an indexed stack slot, there are three possible reasons why
4881 it might be invalid: The index might need to be reloaded, the address
4882 might have been made by frame pointer elimination and hence have a
4883 constant out of range, or both reasons might apply.
4885 We can easily check for an index needing reload, but even if that is the
4886 case, we might also have an invalid constant. To avoid making the
4887 conservative assumption and requiring two reloads, we see if this address
4888 is valid when not interpreted strictly. If it is, the only problem is
4889 that the index needs a reload and find_reloads_address_1 will take care
4890 of it.
4892 Handle all base registers here, not just fp/ap/sp, because on some
4893 targets (namely SPARC) we can also get invalid addresses from preventive
4894 subreg big-endian corrections made by find_reloads_toplev.
4896 If we decide to do something, it must be that `double_reg_address_ok'
4897 is true. We generate a reload of the base register + constant and
4898 rework the sum so that the reload register will be added to the index.
4899 This is safe because we know the address isn't shared.
4901 We check for the base register as both the first and second operand of
4902 the innermost PLUS. */
4904 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4905 && GET_CODE (XEXP (ad, 0)) == PLUS
4906 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4907 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4908 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4910 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4911 plus_constant (XEXP (XEXP (ad, 0), 0),
4912 INTVAL (XEXP (ad, 1))),
4913 XEXP (XEXP (ad, 0), 1));
4914 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4915 MODE_BASE_REG_CLASS (mode),
4916 GET_MODE (ad), opnum, type, ind_levels);
4917 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4918 type, 0, insn);
4920 return 0;
4923 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4924 && GET_CODE (XEXP (ad, 0)) == PLUS
4925 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4926 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4927 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4929 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4930 XEXP (XEXP (ad, 0), 0),
4931 plus_constant (XEXP (XEXP (ad, 0), 1),
4932 INTVAL (XEXP (ad, 1))));
4933 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4934 MODE_BASE_REG_CLASS (mode),
4935 GET_MODE (ad), opnum, type, ind_levels);
4936 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4937 type, 0, insn);
4939 return 0;
4942 /* See if address becomes valid when an eliminable register
4943 in a sum is replaced. */
4945 tem = ad;
4946 if (GET_CODE (ad) == PLUS)
4947 tem = subst_indexed_address (ad);
4948 if (tem != ad && strict_memory_address_p (mode, tem))
4950 /* Ok, we win that way. Replace any additional eliminable
4951 registers. */
4953 subst_reg_equivs_changed = 0;
4954 tem = subst_reg_equivs (tem, insn);
4956 /* Make sure that didn't make the address invalid again. */
4958 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4960 *loc = tem;
4961 return 0;
4965 /* If constants aren't valid addresses, reload the constant address
4966 into a register. */
4967 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4969 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4970 Unshare it so we can safely alter it. */
4971 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4972 && CONSTANT_POOL_ADDRESS_P (ad))
4974 *memrefloc = copy_rtx (*memrefloc);
4975 loc = &XEXP (*memrefloc, 0);
4976 if (removed_and)
4977 loc = &XEXP (*loc, 0);
4980 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4981 Pmode, opnum, type, ind_levels);
4982 return ! removed_and;
4985 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4986 insn);
4989 /* Find all pseudo regs appearing in AD
4990 that are eliminable in favor of equivalent values
4991 and do not have hard regs; replace them by their equivalents.
4992 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4993 front of it for pseudos that we have to replace with stack slots. */
4995 static rtx
4996 subst_reg_equivs (rtx ad, rtx insn)
4998 RTX_CODE code = GET_CODE (ad);
4999 int i;
5000 const char *fmt;
5002 switch (code)
5004 case HIGH:
5005 case CONST_INT:
5006 case CONST:
5007 case CONST_DOUBLE:
5008 case CONST_VECTOR:
5009 case SYMBOL_REF:
5010 case LABEL_REF:
5011 case PC:
5012 case CC0:
5013 return ad;
5015 case REG:
5017 int regno = REGNO (ad);
5019 if (reg_equiv_constant[regno] != 0)
5021 subst_reg_equivs_changed = 1;
5022 return reg_equiv_constant[regno];
5024 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5026 rtx mem = make_memloc (ad, regno);
5027 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5029 subst_reg_equivs_changed = 1;
5030 /* We mark the USE with QImode so that we recognize it
5031 as one that can be safely deleted at the end of
5032 reload. */
5033 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5034 QImode);
5035 return mem;
5039 return ad;
5041 case PLUS:
5042 /* Quickly dispose of a common case. */
5043 if (XEXP (ad, 0) == frame_pointer_rtx
5044 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5045 return ad;
5046 break;
5048 default:
5049 break;
5052 fmt = GET_RTX_FORMAT (code);
5053 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5054 if (fmt[i] == 'e')
5055 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5056 return ad;
5059 /* Compute the sum of X and Y, making canonicalizations assumed in an
5060 address, namely: sum constant integers, surround the sum of two
5061 constants with a CONST, put the constant as the second operand, and
5062 group the constant on the outermost sum.
5064 This routine assumes both inputs are already in canonical form. */
5067 form_sum (rtx x, rtx y)
5069 rtx tem;
5070 enum machine_mode mode = GET_MODE (x);
5072 if (mode == VOIDmode)
5073 mode = GET_MODE (y);
5075 if (mode == VOIDmode)
5076 mode = Pmode;
5078 if (GET_CODE (x) == CONST_INT)
5079 return plus_constant (y, INTVAL (x));
5080 else if (GET_CODE (y) == CONST_INT)
5081 return plus_constant (x, INTVAL (y));
5082 else if (CONSTANT_P (x))
5083 tem = x, x = y, y = tem;
5085 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5086 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5088 /* Note that if the operands of Y are specified in the opposite
5089 order in the recursive calls below, infinite recursion will occur. */
5090 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5091 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5093 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5094 constant will have been placed second. */
5095 if (CONSTANT_P (x) && CONSTANT_P (y))
5097 if (GET_CODE (x) == CONST)
5098 x = XEXP (x, 0);
5099 if (GET_CODE (y) == CONST)
5100 y = XEXP (y, 0);
5102 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5105 return gen_rtx_PLUS (mode, x, y);
5108 /* If ADDR is a sum containing a pseudo register that should be
5109 replaced with a constant (from reg_equiv_constant),
5110 return the result of doing so, and also apply the associative
5111 law so that the result is more likely to be a valid address.
5112 (But it is not guaranteed to be one.)
5114 Note that at most one register is replaced, even if more are
5115 replaceable. Also, we try to put the result into a canonical form
5116 so it is more likely to be a valid address.
5118 In all other cases, return ADDR. */
5120 static rtx
5121 subst_indexed_address (rtx addr)
5123 rtx op0 = 0, op1 = 0, op2 = 0;
5124 rtx tem;
5125 int regno;
5127 if (GET_CODE (addr) == PLUS)
5129 /* Try to find a register to replace. */
5130 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5131 if (GET_CODE (op0) == REG
5132 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5133 && reg_renumber[regno] < 0
5134 && reg_equiv_constant[regno] != 0)
5135 op0 = reg_equiv_constant[regno];
5136 else if (GET_CODE (op1) == REG
5137 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5138 && reg_renumber[regno] < 0
5139 && reg_equiv_constant[regno] != 0)
5140 op1 = reg_equiv_constant[regno];
5141 else if (GET_CODE (op0) == PLUS
5142 && (tem = subst_indexed_address (op0)) != op0)
5143 op0 = tem;
5144 else if (GET_CODE (op1) == PLUS
5145 && (tem = subst_indexed_address (op1)) != op1)
5146 op1 = tem;
5147 else
5148 return addr;
5150 /* Pick out up to three things to add. */
5151 if (GET_CODE (op1) == PLUS)
5152 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5153 else if (GET_CODE (op0) == PLUS)
5154 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5156 /* Compute the sum. */
5157 if (op2 != 0)
5158 op1 = form_sum (op1, op2);
5159 if (op1 != 0)
5160 op0 = form_sum (op0, op1);
5162 return op0;
5164 return addr;
5167 /* Update the REG_INC notes for an insn. It updates all REG_INC
5168 notes for the instruction which refer to REGNO the to refer
5169 to the reload number.
5171 INSN is the insn for which any REG_INC notes need updating.
5173 REGNO is the register number which has been reloaded.
5175 RELOADNUM is the reload number. */
5177 static void
5178 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5179 int reloadnum ATTRIBUTE_UNUSED)
5181 #ifdef AUTO_INC_DEC
5182 rtx link;
5184 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5185 if (REG_NOTE_KIND (link) == REG_INC
5186 && (int) REGNO (XEXP (link, 0)) == regno)
5187 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5188 #endif
5191 /* Record the pseudo registers we must reload into hard registers in a
5192 subexpression of a would-be memory address, X referring to a value
5193 in mode MODE. (This function is not called if the address we find
5194 is strictly valid.)
5196 CONTEXT = 1 means we are considering regs as index regs,
5197 = 0 means we are considering them as base regs.
5199 OPNUM and TYPE specify the purpose of any reloads made.
5201 IND_LEVELS says how many levels of indirect addressing are
5202 supported at this point in the address.
5204 INSN, if nonzero, is the insn in which we do the reload. It is used
5205 to determine if we may generate output reloads.
5207 We return nonzero if X, as a whole, is reloaded or replaced. */
5209 /* Note that we take shortcuts assuming that no multi-reg machine mode
5210 occurs as part of an address.
5211 Also, this is not fully machine-customizable; it works for machines
5212 such as VAXen and 68000's and 32000's, but other possible machines
5213 could have addressing modes that this does not handle right. */
5215 static int
5216 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5217 rtx *loc, int opnum, enum reload_type type,
5218 int ind_levels, rtx insn)
5220 RTX_CODE code = GET_CODE (x);
5222 switch (code)
5224 case PLUS:
5226 rtx orig_op0 = XEXP (x, 0);
5227 rtx orig_op1 = XEXP (x, 1);
5228 RTX_CODE code0 = GET_CODE (orig_op0);
5229 RTX_CODE code1 = GET_CODE (orig_op1);
5230 rtx op0 = orig_op0;
5231 rtx op1 = orig_op1;
5233 if (GET_CODE (op0) == SUBREG)
5235 op0 = SUBREG_REG (op0);
5236 code0 = GET_CODE (op0);
5237 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5238 op0 = gen_rtx_REG (word_mode,
5239 (REGNO (op0) +
5240 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5241 GET_MODE (SUBREG_REG (orig_op0)),
5242 SUBREG_BYTE (orig_op0),
5243 GET_MODE (orig_op0))));
5246 if (GET_CODE (op1) == SUBREG)
5248 op1 = SUBREG_REG (op1);
5249 code1 = GET_CODE (op1);
5250 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5251 /* ??? Why is this given op1's mode and above for
5252 ??? op0 SUBREGs we use word_mode? */
5253 op1 = gen_rtx_REG (GET_MODE (op1),
5254 (REGNO (op1) +
5255 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5256 GET_MODE (SUBREG_REG (orig_op1)),
5257 SUBREG_BYTE (orig_op1),
5258 GET_MODE (orig_op1))));
5260 /* Plus in the index register may be created only as a result of
5261 register remateralization for expression like &localvar*4. Reload it.
5262 It may be possible to combine the displacement on the outer level,
5263 but it is probably not worthwhile to do so. */
5264 if (context)
5266 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5267 opnum, ADDR_TYPE (type), ind_levels, insn);
5268 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5269 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5270 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5271 return 1;
5274 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5275 || code0 == ZERO_EXTEND || code1 == MEM)
5277 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5278 type, ind_levels, insn);
5279 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5280 type, ind_levels, insn);
5283 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5284 || code1 == ZERO_EXTEND || code0 == MEM)
5286 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5287 type, ind_levels, insn);
5288 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5289 type, ind_levels, insn);
5292 else if (code0 == CONST_INT || code0 == CONST
5293 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5294 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5295 type, ind_levels, insn);
5297 else if (code1 == CONST_INT || code1 == CONST
5298 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5299 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5300 type, ind_levels, insn);
5302 else if (code0 == REG && code1 == REG)
5304 if (REG_OK_FOR_INDEX_P (op0)
5305 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5306 return 0;
5307 else if (REG_OK_FOR_INDEX_P (op1)
5308 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5309 return 0;
5310 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5311 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5312 type, ind_levels, insn);
5313 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5314 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5315 type, ind_levels, insn);
5316 else if (REG_OK_FOR_INDEX_P (op1))
5317 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5318 type, ind_levels, insn);
5319 else if (REG_OK_FOR_INDEX_P (op0))
5320 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5321 type, ind_levels, insn);
5322 else
5324 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5325 type, ind_levels, insn);
5326 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5327 type, ind_levels, insn);
5331 else if (code0 == REG)
5333 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5334 type, ind_levels, insn);
5335 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5336 type, ind_levels, insn);
5339 else if (code1 == REG)
5341 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5342 type, ind_levels, insn);
5343 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5344 type, ind_levels, insn);
5348 return 0;
5350 case POST_MODIFY:
5351 case PRE_MODIFY:
5353 rtx op0 = XEXP (x, 0);
5354 rtx op1 = XEXP (x, 1);
5356 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5357 return 0;
5359 /* Currently, we only support {PRE,POST}_MODIFY constructs
5360 where a base register is {inc,dec}remented by the contents
5361 of another register or by a constant value. Thus, these
5362 operands must match. */
5363 if (op0 != XEXP (op1, 0))
5364 abort ();
5366 /* Require index register (or constant). Let's just handle the
5367 register case in the meantime... If the target allows
5368 auto-modify by a constant then we could try replacing a pseudo
5369 register with its equivalent constant where applicable. */
5370 if (REG_P (XEXP (op1, 1)))
5371 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5372 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5373 opnum, type, ind_levels, insn);
5375 if (REG_P (XEXP (op1, 0)))
5377 int regno = REGNO (XEXP (op1, 0));
5378 int reloadnum;
5380 /* A register that is incremented cannot be constant! */
5381 if (regno >= FIRST_PSEUDO_REGISTER
5382 && reg_equiv_constant[regno] != 0)
5383 abort ();
5385 /* Handle a register that is equivalent to a memory location
5386 which cannot be addressed directly. */
5387 if (reg_equiv_memory_loc[regno] != 0
5388 && (reg_equiv_address[regno] != 0
5389 || num_not_at_initial_offset))
5391 rtx tem = make_memloc (XEXP (x, 0), regno);
5393 if (reg_equiv_address[regno]
5394 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5396 /* First reload the memory location's address.
5397 We can't use ADDR_TYPE (type) here, because we need to
5398 write back the value after reading it, hence we actually
5399 need two registers. */
5400 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5401 &XEXP (tem, 0), opnum,
5402 RELOAD_OTHER,
5403 ind_levels, insn);
5405 /* Then reload the memory location into a base
5406 register. */
5407 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5408 &XEXP (op1, 0),
5409 MODE_BASE_REG_CLASS (mode),
5410 GET_MODE (x), GET_MODE (x), 0,
5411 0, opnum, RELOAD_OTHER);
5413 update_auto_inc_notes (this_insn, regno, reloadnum);
5414 return 0;
5418 if (reg_renumber[regno] >= 0)
5419 regno = reg_renumber[regno];
5421 /* We require a base register here... */
5422 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5424 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5425 &XEXP (op1, 0), &XEXP (x, 0),
5426 MODE_BASE_REG_CLASS (mode),
5427 GET_MODE (x), GET_MODE (x), 0, 0,
5428 opnum, RELOAD_OTHER);
5430 update_auto_inc_notes (this_insn, regno, reloadnum);
5431 return 0;
5434 else
5435 abort ();
5437 return 0;
5439 case POST_INC:
5440 case POST_DEC:
5441 case PRE_INC:
5442 case PRE_DEC:
5443 if (GET_CODE (XEXP (x, 0)) == REG)
5445 int regno = REGNO (XEXP (x, 0));
5446 int value = 0;
5447 rtx x_orig = x;
5449 /* A register that is incremented cannot be constant! */
5450 if (regno >= FIRST_PSEUDO_REGISTER
5451 && reg_equiv_constant[regno] != 0)
5452 abort ();
5454 /* Handle a register that is equivalent to a memory location
5455 which cannot be addressed directly. */
5456 if (reg_equiv_memory_loc[regno] != 0
5457 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5459 rtx tem = make_memloc (XEXP (x, 0), regno);
5460 if (reg_equiv_address[regno]
5461 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5463 /* First reload the memory location's address.
5464 We can't use ADDR_TYPE (type) here, because we need to
5465 write back the value after reading it, hence we actually
5466 need two registers. */
5467 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5468 &XEXP (tem, 0), opnum, type,
5469 ind_levels, insn);
5470 /* Put this inside a new increment-expression. */
5471 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5472 /* Proceed to reload that, as if it contained a register. */
5476 /* If we have a hard register that is ok as an index,
5477 don't make a reload. If an autoincrement of a nice register
5478 isn't "valid", it must be that no autoincrement is "valid".
5479 If that is true and something made an autoincrement anyway,
5480 this must be a special context where one is allowed.
5481 (For example, a "push" instruction.)
5482 We can't improve this address, so leave it alone. */
5484 /* Otherwise, reload the autoincrement into a suitable hard reg
5485 and record how much to increment by. */
5487 if (reg_renumber[regno] >= 0)
5488 regno = reg_renumber[regno];
5489 if ((regno >= FIRST_PSEUDO_REGISTER
5490 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5491 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5493 int reloadnum;
5495 /* If we can output the register afterwards, do so, this
5496 saves the extra update.
5497 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5498 CALL_INSN - and it does not set CC0.
5499 But don't do this if we cannot directly address the
5500 memory location, since this will make it harder to
5501 reuse address reloads, and increases register pressure.
5502 Also don't do this if we can probably update x directly. */
5503 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5504 ? XEXP (x, 0)
5505 : reg_equiv_mem[regno]);
5506 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5507 if (insn && GET_CODE (insn) == INSN && equiv
5508 && memory_operand (equiv, GET_MODE (equiv))
5509 #ifdef HAVE_cc0
5510 && ! sets_cc0_p (PATTERN (insn))
5511 #endif
5512 && ! (icode != CODE_FOR_nothing
5513 && ((*insn_data[icode].operand[0].predicate)
5514 (equiv, Pmode))
5515 && ((*insn_data[icode].operand[1].predicate)
5516 (equiv, Pmode))))
5518 /* We use the original pseudo for loc, so that
5519 emit_reload_insns() knows which pseudo this
5520 reload refers to and updates the pseudo rtx, not
5521 its equivalent memory location, as well as the
5522 corresponding entry in reg_last_reload_reg. */
5523 loc = &XEXP (x_orig, 0);
5524 x = XEXP (x, 0);
5525 reloadnum
5526 = push_reload (x, x, loc, loc,
5527 (context ? INDEX_REG_CLASS :
5528 MODE_BASE_REG_CLASS (mode)),
5529 GET_MODE (x), GET_MODE (x), 0, 0,
5530 opnum, RELOAD_OTHER);
5532 else
5534 reloadnum
5535 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5536 (context ? INDEX_REG_CLASS :
5537 MODE_BASE_REG_CLASS (mode)),
5538 GET_MODE (x), GET_MODE (x), 0, 0,
5539 opnum, type);
5540 rld[reloadnum].inc
5541 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5543 value = 1;
5546 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5547 reloadnum);
5549 return value;
5552 else if (GET_CODE (XEXP (x, 0)) == MEM)
5554 /* This is probably the result of a substitution, by eliminate_regs,
5555 of an equivalent address for a pseudo that was not allocated to a
5556 hard register. Verify that the specified address is valid and
5557 reload it into a register. */
5558 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5559 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5560 rtx link;
5561 int reloadnum;
5563 /* Since we know we are going to reload this item, don't decrement
5564 for the indirection level.
5566 Note that this is actually conservative: it would be slightly
5567 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5568 reload1.c here. */
5569 /* We can't use ADDR_TYPE (type) here, because we need to
5570 write back the value after reading it, hence we actually
5571 need two registers. */
5572 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5573 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5574 opnum, type, ind_levels, insn);
5576 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5577 (context ? INDEX_REG_CLASS :
5578 MODE_BASE_REG_CLASS (mode)),
5579 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5580 rld[reloadnum].inc
5581 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5583 link = FIND_REG_INC_NOTE (this_insn, tem);
5584 if (link != 0)
5585 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5587 return 1;
5589 return 0;
5591 case MEM:
5592 /* This is probably the result of a substitution, by eliminate_regs, of
5593 an equivalent address for a pseudo that was not allocated to a hard
5594 register. Verify that the specified address is valid and reload it
5595 into a register.
5597 Since we know we are going to reload this item, don't decrement for
5598 the indirection level.
5600 Note that this is actually conservative: it would be slightly more
5601 efficient to use the value of SPILL_INDIRECT_LEVELS from
5602 reload1.c here. */
5604 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5605 opnum, ADDR_TYPE (type), ind_levels, insn);
5606 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5607 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5608 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5609 return 1;
5611 case REG:
5613 int regno = REGNO (x);
5615 if (reg_equiv_constant[regno] != 0)
5617 find_reloads_address_part (reg_equiv_constant[regno], loc,
5618 (context ? INDEX_REG_CLASS :
5619 MODE_BASE_REG_CLASS (mode)),
5620 GET_MODE (x), opnum, type, ind_levels);
5621 return 1;
5624 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5625 that feeds this insn. */
5626 if (reg_equiv_mem[regno] != 0)
5628 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5629 (context ? INDEX_REG_CLASS :
5630 MODE_BASE_REG_CLASS (mode)),
5631 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5632 return 1;
5634 #endif
5636 if (reg_equiv_memory_loc[regno]
5637 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5639 rtx tem = make_memloc (x, regno);
5640 if (reg_equiv_address[regno] != 0
5641 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5643 x = tem;
5644 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5645 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5646 ind_levels, insn);
5650 if (reg_renumber[regno] >= 0)
5651 regno = reg_renumber[regno];
5653 if ((regno >= FIRST_PSEUDO_REGISTER
5654 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5655 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5657 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5658 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5659 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5660 return 1;
5663 /* If a register appearing in an address is the subject of a CLOBBER
5664 in this insn, reload it into some other register to be safe.
5665 The CLOBBER is supposed to make the register unavailable
5666 from before this insn to after it. */
5667 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5669 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5670 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5671 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5672 return 1;
5675 return 0;
5677 case SUBREG:
5678 if (GET_CODE (SUBREG_REG (x)) == REG)
5680 /* If this is a SUBREG of a hard register and the resulting register
5681 is of the wrong class, reload the whole SUBREG. This avoids
5682 needless copies if SUBREG_REG is multi-word. */
5683 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5685 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5687 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5688 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5690 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5691 (context ? INDEX_REG_CLASS :
5692 MODE_BASE_REG_CLASS (mode)),
5693 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5694 return 1;
5697 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5698 is larger than the class size, then reload the whole SUBREG. */
5699 else
5701 enum reg_class class = (context ? INDEX_REG_CLASS
5702 : MODE_BASE_REG_CLASS (mode));
5703 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5704 > reg_class_size[class])
5706 x = find_reloads_subreg_address (x, 0, opnum, type,
5707 ind_levels, insn);
5708 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5709 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5710 return 1;
5714 break;
5716 default:
5717 break;
5721 const char *fmt = GET_RTX_FORMAT (code);
5722 int i;
5724 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5726 if (fmt[i] == 'e')
5727 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5728 opnum, type, ind_levels, insn);
5732 return 0;
5735 /* X, which is found at *LOC, is a part of an address that needs to be
5736 reloaded into a register of class CLASS. If X is a constant, or if
5737 X is a PLUS that contains a constant, check that the constant is a
5738 legitimate operand and that we are supposed to be able to load
5739 it into the register.
5741 If not, force the constant into memory and reload the MEM instead.
5743 MODE is the mode to use, in case X is an integer constant.
5745 OPNUM and TYPE describe the purpose of any reloads made.
5747 IND_LEVELS says how many levels of indirect addressing this machine
5748 supports. */
5750 static void
5751 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5752 enum machine_mode mode, int opnum,
5753 enum reload_type type, int ind_levels)
5755 if (CONSTANT_P (x)
5756 && (! LEGITIMATE_CONSTANT_P (x)
5757 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5759 rtx tem;
5761 tem = x = force_const_mem (mode, x);
5762 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5763 opnum, type, ind_levels, 0);
5766 else if (GET_CODE (x) == PLUS
5767 && CONSTANT_P (XEXP (x, 1))
5768 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5769 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5771 rtx tem;
5773 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5774 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5775 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5776 opnum, type, ind_levels, 0);
5779 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5780 mode, VOIDmode, 0, 0, opnum, type);
5783 /* X, a subreg of a pseudo, is a part of an address that needs to be
5784 reloaded.
5786 If the pseudo is equivalent to a memory location that cannot be directly
5787 addressed, make the necessary address reloads.
5789 If address reloads have been necessary, or if the address is changed
5790 by register elimination, return the rtx of the memory location;
5791 otherwise, return X.
5793 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5794 memory location.
5796 OPNUM and TYPE identify the purpose of the reload.
5798 IND_LEVELS says how many levels of indirect addressing are
5799 supported at this point in the address.
5801 INSN, if nonzero, is the insn in which we do the reload. It is used
5802 to determine where to put USEs for pseudos that we have to replace with
5803 stack slots. */
5805 static rtx
5806 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5807 enum reload_type type, int ind_levels, rtx insn)
5809 int regno = REGNO (SUBREG_REG (x));
5811 if (reg_equiv_memory_loc[regno])
5813 /* If the address is not directly addressable, or if the address is not
5814 offsettable, then it must be replaced. */
5815 if (! force_replace
5816 && (reg_equiv_address[regno]
5817 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5818 force_replace = 1;
5820 if (force_replace || num_not_at_initial_offset)
5822 rtx tem = make_memloc (SUBREG_REG (x), regno);
5824 /* If the address changes because of register elimination, then
5825 it must be replaced. */
5826 if (force_replace
5827 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5829 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5830 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5831 int offset;
5833 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5834 hold the correct (negative) byte offset. */
5835 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5836 offset = inner_size - outer_size;
5837 else
5838 offset = SUBREG_BYTE (x);
5840 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5841 PUT_MODE (tem, GET_MODE (x));
5843 /* If this was a paradoxical subreg that we replaced, the
5844 resulting memory must be sufficiently aligned to allow
5845 us to widen the mode of the memory. */
5846 if (outer_size > inner_size && STRICT_ALIGNMENT)
5848 rtx base;
5850 base = XEXP (tem, 0);
5851 if (GET_CODE (base) == PLUS)
5853 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5854 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5855 return x;
5856 base = XEXP (base, 0);
5858 if (GET_CODE (base) != REG
5859 || (REGNO_POINTER_ALIGN (REGNO (base))
5860 < outer_size * BITS_PER_UNIT))
5861 return x;
5864 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5865 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5866 ind_levels, insn);
5868 /* If this is not a toplevel operand, find_reloads doesn't see
5869 this substitution. We have to emit a USE of the pseudo so
5870 that delete_output_reload can see it. */
5871 if (replace_reloads && recog_data.operand[opnum] != x)
5872 /* We mark the USE with QImode so that we recognize it
5873 as one that can be safely deleted at the end of
5874 reload. */
5875 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5876 SUBREG_REG (x)),
5877 insn), QImode);
5878 x = tem;
5882 return x;
5885 /* Substitute into the current INSN the registers into which we have reloaded
5886 the things that need reloading. The array `replacements'
5887 contains the locations of all pointers that must be changed
5888 and says what to replace them with.
5890 Return the rtx that X translates into; usually X, but modified. */
5892 void
5893 subst_reloads (rtx insn)
5895 int i;
5897 for (i = 0; i < n_replacements; i++)
5899 struct replacement *r = &replacements[i];
5900 rtx reloadreg = rld[r->what].reg_rtx;
5901 if (reloadreg)
5903 #ifdef ENABLE_CHECKING
5904 /* Internal consistency test. Check that we don't modify
5905 anything in the equivalence arrays. Whenever something from
5906 those arrays needs to be reloaded, it must be unshared before
5907 being substituted into; the equivalence must not be modified.
5908 Otherwise, if the equivalence is used after that, it will
5909 have been modified, and the thing substituted (probably a
5910 register) is likely overwritten and not a usable equivalence. */
5911 int check_regno;
5913 for (check_regno = 0; check_regno < max_regno; check_regno++)
5915 #define CHECK_MODF(ARRAY) \
5916 if (ARRAY[check_regno] \
5917 && loc_mentioned_in_p (r->where, \
5918 ARRAY[check_regno])) \
5919 abort ()
5921 CHECK_MODF (reg_equiv_constant);
5922 CHECK_MODF (reg_equiv_memory_loc);
5923 CHECK_MODF (reg_equiv_address);
5924 CHECK_MODF (reg_equiv_mem);
5925 #undef CHECK_MODF
5927 #endif /* ENABLE_CHECKING */
5929 /* If we're replacing a LABEL_REF with a register, add a
5930 REG_LABEL note to indicate to flow which label this
5931 register refers to. */
5932 if (GET_CODE (*r->where) == LABEL_REF
5933 && GET_CODE (insn) == JUMP_INSN)
5934 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5935 XEXP (*r->where, 0),
5936 REG_NOTES (insn));
5938 /* Encapsulate RELOADREG so its machine mode matches what
5939 used to be there. Note that gen_lowpart_common will
5940 do the wrong thing if RELOADREG is multi-word. RELOADREG
5941 will always be a REG here. */
5942 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5943 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
5945 /* If we are putting this into a SUBREG and RELOADREG is a
5946 SUBREG, we would be making nested SUBREGs, so we have to fix
5947 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5949 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5951 if (GET_MODE (*r->subreg_loc)
5952 == GET_MODE (SUBREG_REG (reloadreg)))
5953 *r->subreg_loc = SUBREG_REG (reloadreg);
5954 else
5956 int final_offset =
5957 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5959 /* When working with SUBREGs the rule is that the byte
5960 offset must be a multiple of the SUBREG's mode. */
5961 final_offset = (final_offset /
5962 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5963 final_offset = (final_offset *
5964 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5966 *r->where = SUBREG_REG (reloadreg);
5967 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5970 else
5971 *r->where = reloadreg;
5973 /* If reload got no reg and isn't optional, something's wrong. */
5974 else if (! rld[r->what].optional)
5975 abort ();
5979 /* Make a copy of any replacements being done into X and move those
5980 copies to locations in Y, a copy of X. */
5982 void
5983 copy_replacements (rtx x, rtx y)
5985 /* We can't support X being a SUBREG because we might then need to know its
5986 location if something inside it was replaced. */
5987 if (GET_CODE (x) == SUBREG)
5988 abort ();
5990 copy_replacements_1 (&x, &y, n_replacements);
5993 static void
5994 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
5996 int i, j;
5997 rtx x, y;
5998 struct replacement *r;
5999 enum rtx_code code;
6000 const char *fmt;
6002 for (j = 0; j < orig_replacements; j++)
6004 if (replacements[j].subreg_loc == px)
6006 r = &replacements[n_replacements++];
6007 r->where = replacements[j].where;
6008 r->subreg_loc = py;
6009 r->what = replacements[j].what;
6010 r->mode = replacements[j].mode;
6012 else if (replacements[j].where == px)
6014 r = &replacements[n_replacements++];
6015 r->where = py;
6016 r->subreg_loc = 0;
6017 r->what = replacements[j].what;
6018 r->mode = replacements[j].mode;
6022 x = *px;
6023 y = *py;
6024 code = GET_CODE (x);
6025 fmt = GET_RTX_FORMAT (code);
6027 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6029 if (fmt[i] == 'e')
6030 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6031 else if (fmt[i] == 'E')
6032 for (j = XVECLEN (x, i); --j >= 0; )
6033 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6034 orig_replacements);
6038 /* Change any replacements being done to *X to be done to *Y. */
6040 void
6041 move_replacements (rtx *x, rtx *y)
6043 int i;
6045 for (i = 0; i < n_replacements; i++)
6046 if (replacements[i].subreg_loc == x)
6047 replacements[i].subreg_loc = y;
6048 else if (replacements[i].where == x)
6050 replacements[i].where = y;
6051 replacements[i].subreg_loc = 0;
6055 /* If LOC was scheduled to be replaced by something, return the replacement.
6056 Otherwise, return *LOC. */
6059 find_replacement (rtx *loc)
6061 struct replacement *r;
6063 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6065 rtx reloadreg = rld[r->what].reg_rtx;
6067 if (reloadreg && r->where == loc)
6069 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6070 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6072 return reloadreg;
6074 else if (reloadreg && r->subreg_loc == loc)
6076 /* RELOADREG must be either a REG or a SUBREG.
6078 ??? Is it actually still ever a SUBREG? If so, why? */
6080 if (GET_CODE (reloadreg) == REG)
6081 return gen_rtx_REG (GET_MODE (*loc),
6082 (REGNO (reloadreg) +
6083 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6084 GET_MODE (SUBREG_REG (*loc)),
6085 SUBREG_BYTE (*loc),
6086 GET_MODE (*loc))));
6087 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6088 return reloadreg;
6089 else
6091 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6093 /* When working with SUBREGs the rule is that the byte
6094 offset must be a multiple of the SUBREG's mode. */
6095 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6096 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6097 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6098 final_offset);
6103 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6104 what's inside and make a new rtl if so. */
6105 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6106 || GET_CODE (*loc) == MULT)
6108 rtx x = find_replacement (&XEXP (*loc, 0));
6109 rtx y = find_replacement (&XEXP (*loc, 1));
6111 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6112 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6115 return *loc;
6118 /* Return nonzero if register in range [REGNO, ENDREGNO)
6119 appears either explicitly or implicitly in X
6120 other than being stored into (except for earlyclobber operands).
6122 References contained within the substructure at LOC do not count.
6123 LOC may be zero, meaning don't ignore anything.
6125 This is similar to refers_to_regno_p in rtlanal.c except that we
6126 look at equivalences for pseudos that didn't get hard registers. */
6129 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6130 rtx x, rtx *loc)
6132 int i;
6133 unsigned int r;
6134 RTX_CODE code;
6135 const char *fmt;
6137 if (x == 0)
6138 return 0;
6140 repeat:
6141 code = GET_CODE (x);
6143 switch (code)
6145 case REG:
6146 r = REGNO (x);
6148 /* If this is a pseudo, a hard register must not have been allocated.
6149 X must therefore either be a constant or be in memory. */
6150 if (r >= FIRST_PSEUDO_REGISTER)
6152 if (reg_equiv_memory_loc[r])
6153 return refers_to_regno_for_reload_p (regno, endregno,
6154 reg_equiv_memory_loc[r],
6155 (rtx*) 0);
6157 if (reg_equiv_constant[r])
6158 return 0;
6160 abort ();
6163 return (endregno > r
6164 && regno < r + (r < FIRST_PSEUDO_REGISTER
6165 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6166 : 1));
6168 case SUBREG:
6169 /* If this is a SUBREG of a hard reg, we can see exactly which
6170 registers are being modified. Otherwise, handle normally. */
6171 if (GET_CODE (SUBREG_REG (x)) == REG
6172 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6174 unsigned int inner_regno = subreg_regno (x);
6175 unsigned int inner_endregno
6176 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6177 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6179 return endregno > inner_regno && regno < inner_endregno;
6181 break;
6183 case CLOBBER:
6184 case SET:
6185 if (&SET_DEST (x) != loc
6186 /* Note setting a SUBREG counts as referring to the REG it is in for
6187 a pseudo but not for hard registers since we can
6188 treat each word individually. */
6189 && ((GET_CODE (SET_DEST (x)) == SUBREG
6190 && loc != &SUBREG_REG (SET_DEST (x))
6191 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6192 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6193 && refers_to_regno_for_reload_p (regno, endregno,
6194 SUBREG_REG (SET_DEST (x)),
6195 loc))
6196 /* If the output is an earlyclobber operand, this is
6197 a conflict. */
6198 || ((GET_CODE (SET_DEST (x)) != REG
6199 || earlyclobber_operand_p (SET_DEST (x)))
6200 && refers_to_regno_for_reload_p (regno, endregno,
6201 SET_DEST (x), loc))))
6202 return 1;
6204 if (code == CLOBBER || loc == &SET_SRC (x))
6205 return 0;
6206 x = SET_SRC (x);
6207 goto repeat;
6209 default:
6210 break;
6213 /* X does not match, so try its subexpressions. */
6215 fmt = GET_RTX_FORMAT (code);
6216 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6218 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6220 if (i == 0)
6222 x = XEXP (x, 0);
6223 goto repeat;
6225 else
6226 if (refers_to_regno_for_reload_p (regno, endregno,
6227 XEXP (x, i), loc))
6228 return 1;
6230 else if (fmt[i] == 'E')
6232 int j;
6233 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6234 if (loc != &XVECEXP (x, i, j)
6235 && refers_to_regno_for_reload_p (regno, endregno,
6236 XVECEXP (x, i, j), loc))
6237 return 1;
6240 return 0;
6243 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6244 we check if any register number in X conflicts with the relevant register
6245 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6246 contains a MEM (we don't bother checking for memory addresses that can't
6247 conflict because we expect this to be a rare case.
6249 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6250 that we look at equivalences for pseudos that didn't get hard registers. */
6253 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6255 int regno, endregno;
6257 /* Overly conservative. */
6258 if (GET_CODE (x) == STRICT_LOW_PART
6259 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6260 x = XEXP (x, 0);
6262 /* If either argument is a constant, then modifying X can not affect IN. */
6263 if (CONSTANT_P (x) || CONSTANT_P (in))
6264 return 0;
6265 else if (GET_CODE (x) == SUBREG)
6267 regno = REGNO (SUBREG_REG (x));
6268 if (regno < FIRST_PSEUDO_REGISTER)
6269 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6270 GET_MODE (SUBREG_REG (x)),
6271 SUBREG_BYTE (x),
6272 GET_MODE (x));
6274 else if (GET_CODE (x) == REG)
6276 regno = REGNO (x);
6278 /* If this is a pseudo, it must not have been assigned a hard register.
6279 Therefore, it must either be in memory or be a constant. */
6281 if (regno >= FIRST_PSEUDO_REGISTER)
6283 if (reg_equiv_memory_loc[regno])
6284 return refers_to_mem_for_reload_p (in);
6285 else if (reg_equiv_constant[regno])
6286 return 0;
6287 abort ();
6290 else if (GET_CODE (x) == MEM)
6291 return refers_to_mem_for_reload_p (in);
6292 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6293 || GET_CODE (x) == CC0)
6294 return reg_mentioned_p (x, in);
6295 else if (GET_CODE (x) == PLUS)
6296 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6297 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6298 else
6299 abort ();
6301 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6302 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6304 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6307 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6308 registers. */
6311 refers_to_mem_for_reload_p (rtx x)
6313 const char *fmt;
6314 int i;
6316 if (GET_CODE (x) == MEM)
6317 return 1;
6319 if (GET_CODE (x) == REG)
6320 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6321 && reg_equiv_memory_loc[REGNO (x)]);
6323 fmt = GET_RTX_FORMAT (GET_CODE (x));
6324 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6325 if (fmt[i] == 'e'
6326 && (GET_CODE (XEXP (x, i)) == MEM
6327 || refers_to_mem_for_reload_p (XEXP (x, i))))
6328 return 1;
6330 return 0;
6333 /* Check the insns before INSN to see if there is a suitable register
6334 containing the same value as GOAL.
6335 If OTHER is -1, look for a register in class CLASS.
6336 Otherwise, just see if register number OTHER shares GOAL's value.
6338 Return an rtx for the register found, or zero if none is found.
6340 If RELOAD_REG_P is (short *)1,
6341 we reject any hard reg that appears in reload_reg_rtx
6342 because such a hard reg is also needed coming into this insn.
6344 If RELOAD_REG_P is any other nonzero value,
6345 it is a vector indexed by hard reg number
6346 and we reject any hard reg whose element in the vector is nonnegative
6347 as well as any that appears in reload_reg_rtx.
6349 If GOAL is zero, then GOALREG is a register number; we look
6350 for an equivalent for that register.
6352 MODE is the machine mode of the value we want an equivalence for.
6353 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6355 This function is used by jump.c as well as in the reload pass.
6357 If GOAL is the sum of the stack pointer and a constant, we treat it
6358 as if it were a constant except that sp is required to be unchanging. */
6361 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6362 short *reload_reg_p, int goalreg, enum machine_mode mode)
6364 rtx p = insn;
6365 rtx goaltry, valtry, value, where;
6366 rtx pat;
6367 int regno = -1;
6368 int valueno;
6369 int goal_mem = 0;
6370 int goal_const = 0;
6371 int goal_mem_addr_varies = 0;
6372 int need_stable_sp = 0;
6373 int nregs;
6374 int valuenregs;
6376 if (goal == 0)
6377 regno = goalreg;
6378 else if (GET_CODE (goal) == REG)
6379 regno = REGNO (goal);
6380 else if (GET_CODE (goal) == MEM)
6382 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6383 if (MEM_VOLATILE_P (goal))
6384 return 0;
6385 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6386 return 0;
6387 /* An address with side effects must be reexecuted. */
6388 switch (code)
6390 case POST_INC:
6391 case PRE_INC:
6392 case POST_DEC:
6393 case PRE_DEC:
6394 case POST_MODIFY:
6395 case PRE_MODIFY:
6396 return 0;
6397 default:
6398 break;
6400 goal_mem = 1;
6402 else if (CONSTANT_P (goal))
6403 goal_const = 1;
6404 else if (GET_CODE (goal) == PLUS
6405 && XEXP (goal, 0) == stack_pointer_rtx
6406 && CONSTANT_P (XEXP (goal, 1)))
6407 goal_const = need_stable_sp = 1;
6408 else if (GET_CODE (goal) == PLUS
6409 && XEXP (goal, 0) == frame_pointer_rtx
6410 && CONSTANT_P (XEXP (goal, 1)))
6411 goal_const = 1;
6412 else
6413 return 0;
6415 /* Scan insns back from INSN, looking for one that copies
6416 a value into or out of GOAL.
6417 Stop and give up if we reach a label. */
6419 while (1)
6421 p = PREV_INSN (p);
6422 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6423 return 0;
6425 if (GET_CODE (p) == INSN
6426 /* If we don't want spill regs ... */
6427 && (! (reload_reg_p != 0
6428 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6429 /* ... then ignore insns introduced by reload; they aren't
6430 useful and can cause results in reload_as_needed to be
6431 different from what they were when calculating the need for
6432 spills. If we notice an input-reload insn here, we will
6433 reject it below, but it might hide a usable equivalent.
6434 That makes bad code. It may even abort: perhaps no reg was
6435 spilled for this insn because it was assumed we would find
6436 that equivalent. */
6437 || INSN_UID (p) < reload_first_uid))
6439 rtx tem;
6440 pat = single_set (p);
6442 /* First check for something that sets some reg equal to GOAL. */
6443 if (pat != 0
6444 && ((regno >= 0
6445 && true_regnum (SET_SRC (pat)) == regno
6446 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6448 (regno >= 0
6449 && true_regnum (SET_DEST (pat)) == regno
6450 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6452 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6453 /* When looking for stack pointer + const,
6454 make sure we don't use a stack adjust. */
6455 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6456 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6457 || (goal_mem
6458 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6459 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6460 || (goal_mem
6461 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6462 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6463 /* If we are looking for a constant,
6464 and something equivalent to that constant was copied
6465 into a reg, we can use that reg. */
6466 || (goal_const && REG_NOTES (p) != 0
6467 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6468 && ((rtx_equal_p (XEXP (tem, 0), goal)
6469 && (valueno
6470 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6471 || (GET_CODE (SET_DEST (pat)) == REG
6472 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6473 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6474 == MODE_FLOAT)
6475 && GET_CODE (goal) == CONST_INT
6476 && 0 != (goaltry
6477 = operand_subword (XEXP (tem, 0), 0, 0,
6478 VOIDmode))
6479 && rtx_equal_p (goal, goaltry)
6480 && (valtry
6481 = operand_subword (SET_DEST (pat), 0, 0,
6482 VOIDmode))
6483 && (valueno = true_regnum (valtry)) >= 0)))
6484 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6485 NULL_RTX))
6486 && GET_CODE (SET_DEST (pat)) == REG
6487 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6488 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6489 == MODE_FLOAT)
6490 && GET_CODE (goal) == CONST_INT
6491 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6492 VOIDmode))
6493 && rtx_equal_p (goal, goaltry)
6494 && (valtry
6495 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6496 && (valueno = true_regnum (valtry)) >= 0)))
6498 if (other >= 0)
6500 if (valueno != other)
6501 continue;
6503 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6504 continue;
6505 else
6507 int i;
6509 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6510 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6511 valueno + i))
6512 break;
6513 if (i >= 0)
6514 continue;
6516 value = valtry;
6517 where = p;
6518 break;
6523 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6524 (or copying VALUE into GOAL, if GOAL is also a register).
6525 Now verify that VALUE is really valid. */
6527 /* VALUENO is the register number of VALUE; a hard register. */
6529 /* Don't try to re-use something that is killed in this insn. We want
6530 to be able to trust REG_UNUSED notes. */
6531 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6532 return 0;
6534 /* If we propose to get the value from the stack pointer or if GOAL is
6535 a MEM based on the stack pointer, we need a stable SP. */
6536 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6537 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6538 goal)))
6539 need_stable_sp = 1;
6541 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6542 if (GET_MODE (value) != mode)
6543 return 0;
6545 /* Reject VALUE if it was loaded from GOAL
6546 and is also a register that appears in the address of GOAL. */
6548 if (goal_mem && value == SET_DEST (single_set (where))
6549 && refers_to_regno_for_reload_p (valueno,
6550 (valueno
6551 + HARD_REGNO_NREGS (valueno, mode)),
6552 goal, (rtx*) 0))
6553 return 0;
6555 /* Reject registers that overlap GOAL. */
6557 if (!goal_mem && !goal_const
6558 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6559 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6560 return 0;
6562 nregs = HARD_REGNO_NREGS (regno, mode);
6563 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6565 /* Reject VALUE if it is one of the regs reserved for reloads.
6566 Reload1 knows how to reuse them anyway, and it would get
6567 confused if we allocated one without its knowledge.
6568 (Now that insns introduced by reload are ignored above,
6569 this case shouldn't happen, but I'm not positive.) */
6571 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6573 int i;
6574 for (i = 0; i < valuenregs; ++i)
6575 if (reload_reg_p[valueno + i] >= 0)
6576 return 0;
6579 /* Reject VALUE if it is a register being used for an input reload
6580 even if it is not one of those reserved. */
6582 if (reload_reg_p != 0)
6584 int i;
6585 for (i = 0; i < n_reloads; i++)
6586 if (rld[i].reg_rtx != 0 && rld[i].in)
6588 int regno1 = REGNO (rld[i].reg_rtx);
6589 int nregs1 = HARD_REGNO_NREGS (regno1,
6590 GET_MODE (rld[i].reg_rtx));
6591 if (regno1 < valueno + valuenregs
6592 && regno1 + nregs1 > valueno)
6593 return 0;
6597 if (goal_mem)
6598 /* We must treat frame pointer as varying here,
6599 since it can vary--in a nonlocal goto as generated by expand_goto. */
6600 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6602 /* Now verify that the values of GOAL and VALUE remain unaltered
6603 until INSN is reached. */
6605 p = insn;
6606 while (1)
6608 p = PREV_INSN (p);
6609 if (p == where)
6610 return value;
6612 /* Don't trust the conversion past a function call
6613 if either of the two is in a call-clobbered register, or memory. */
6614 if (GET_CODE (p) == CALL_INSN)
6616 int i;
6618 if (goal_mem || need_stable_sp)
6619 return 0;
6621 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6622 for (i = 0; i < nregs; ++i)
6623 if (call_used_regs[regno + i])
6624 return 0;
6626 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6627 for (i = 0; i < valuenregs; ++i)
6628 if (call_used_regs[valueno + i])
6629 return 0;
6630 #ifdef NON_SAVING_SETJMP
6631 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6632 return 0;
6633 #endif
6636 if (INSN_P (p))
6638 pat = PATTERN (p);
6640 /* Watch out for unspec_volatile, and volatile asms. */
6641 if (volatile_insn_p (pat))
6642 return 0;
6644 /* If this insn P stores in either GOAL or VALUE, return 0.
6645 If GOAL is a memory ref and this insn writes memory, return 0.
6646 If GOAL is a memory ref and its address is not constant,
6647 and this insn P changes a register used in GOAL, return 0. */
6649 if (GET_CODE (pat) == COND_EXEC)
6650 pat = COND_EXEC_CODE (pat);
6651 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6653 rtx dest = SET_DEST (pat);
6654 while (GET_CODE (dest) == SUBREG
6655 || GET_CODE (dest) == ZERO_EXTRACT
6656 || GET_CODE (dest) == SIGN_EXTRACT
6657 || GET_CODE (dest) == STRICT_LOW_PART)
6658 dest = XEXP (dest, 0);
6659 if (GET_CODE (dest) == REG)
6661 int xregno = REGNO (dest);
6662 int xnregs;
6663 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6664 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6665 else
6666 xnregs = 1;
6667 if (xregno < regno + nregs && xregno + xnregs > regno)
6668 return 0;
6669 if (xregno < valueno + valuenregs
6670 && xregno + xnregs > valueno)
6671 return 0;
6672 if (goal_mem_addr_varies
6673 && reg_overlap_mentioned_for_reload_p (dest, goal))
6674 return 0;
6675 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6676 return 0;
6678 else if (goal_mem && GET_CODE (dest) == MEM
6679 && ! push_operand (dest, GET_MODE (dest)))
6680 return 0;
6681 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6682 && reg_equiv_memory_loc[regno] != 0)
6683 return 0;
6684 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6685 return 0;
6687 else if (GET_CODE (pat) == PARALLEL)
6689 int i;
6690 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6692 rtx v1 = XVECEXP (pat, 0, i);
6693 if (GET_CODE (v1) == COND_EXEC)
6694 v1 = COND_EXEC_CODE (v1);
6695 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6697 rtx dest = SET_DEST (v1);
6698 while (GET_CODE (dest) == SUBREG
6699 || GET_CODE (dest) == ZERO_EXTRACT
6700 || GET_CODE (dest) == SIGN_EXTRACT
6701 || GET_CODE (dest) == STRICT_LOW_PART)
6702 dest = XEXP (dest, 0);
6703 if (GET_CODE (dest) == REG)
6705 int xregno = REGNO (dest);
6706 int xnregs;
6707 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6708 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6709 else
6710 xnregs = 1;
6711 if (xregno < regno + nregs
6712 && xregno + xnregs > regno)
6713 return 0;
6714 if (xregno < valueno + valuenregs
6715 && xregno + xnregs > valueno)
6716 return 0;
6717 if (goal_mem_addr_varies
6718 && reg_overlap_mentioned_for_reload_p (dest,
6719 goal))
6720 return 0;
6721 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6722 return 0;
6724 else if (goal_mem && GET_CODE (dest) == MEM
6725 && ! push_operand (dest, GET_MODE (dest)))
6726 return 0;
6727 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6728 && reg_equiv_memory_loc[regno] != 0)
6729 return 0;
6730 else if (need_stable_sp
6731 && push_operand (dest, GET_MODE (dest)))
6732 return 0;
6737 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6739 rtx link;
6741 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6742 link = XEXP (link, 1))
6744 pat = XEXP (link, 0);
6745 if (GET_CODE (pat) == CLOBBER)
6747 rtx dest = SET_DEST (pat);
6749 if (GET_CODE (dest) == REG)
6751 int xregno = REGNO (dest);
6752 int xnregs
6753 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6755 if (xregno < regno + nregs
6756 && xregno + xnregs > regno)
6757 return 0;
6758 else if (xregno < valueno + valuenregs
6759 && xregno + xnregs > valueno)
6760 return 0;
6761 else if (goal_mem_addr_varies
6762 && reg_overlap_mentioned_for_reload_p (dest,
6763 goal))
6764 return 0;
6767 else if (goal_mem && GET_CODE (dest) == MEM
6768 && ! push_operand (dest, GET_MODE (dest)))
6769 return 0;
6770 else if (need_stable_sp
6771 && push_operand (dest, GET_MODE (dest)))
6772 return 0;
6777 #ifdef AUTO_INC_DEC
6778 /* If this insn auto-increments or auto-decrements
6779 either regno or valueno, return 0 now.
6780 If GOAL is a memory ref and its address is not constant,
6781 and this insn P increments a register used in GOAL, return 0. */
6783 rtx link;
6785 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6786 if (REG_NOTE_KIND (link) == REG_INC
6787 && GET_CODE (XEXP (link, 0)) == REG)
6789 int incno = REGNO (XEXP (link, 0));
6790 if (incno < regno + nregs && incno >= regno)
6791 return 0;
6792 if (incno < valueno + valuenregs && incno >= valueno)
6793 return 0;
6794 if (goal_mem_addr_varies
6795 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6796 goal))
6797 return 0;
6800 #endif
6805 /* Find a place where INCED appears in an increment or decrement operator
6806 within X, and return the amount INCED is incremented or decremented by.
6807 The value is always positive. */
6809 static int
6810 find_inc_amount (rtx x, rtx inced)
6812 enum rtx_code code = GET_CODE (x);
6813 const char *fmt;
6814 int i;
6816 if (code == MEM)
6818 rtx addr = XEXP (x, 0);
6819 if ((GET_CODE (addr) == PRE_DEC
6820 || GET_CODE (addr) == POST_DEC
6821 || GET_CODE (addr) == PRE_INC
6822 || GET_CODE (addr) == POST_INC)
6823 && XEXP (addr, 0) == inced)
6824 return GET_MODE_SIZE (GET_MODE (x));
6825 else if ((GET_CODE (addr) == PRE_MODIFY
6826 || GET_CODE (addr) == POST_MODIFY)
6827 && GET_CODE (XEXP (addr, 1)) == PLUS
6828 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6829 && XEXP (addr, 0) == inced
6830 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6832 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6833 return i < 0 ? -i : i;
6837 fmt = GET_RTX_FORMAT (code);
6838 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6840 if (fmt[i] == 'e')
6842 int tem = find_inc_amount (XEXP (x, i), inced);
6843 if (tem != 0)
6844 return tem;
6846 if (fmt[i] == 'E')
6848 int j;
6849 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6851 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6852 if (tem != 0)
6853 return tem;
6858 return 0;
6861 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6862 If SETS is nonzero, also consider SETs. */
6865 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
6866 int sets)
6868 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6869 unsigned int endregno = regno + nregs;
6871 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6872 || (sets && GET_CODE (PATTERN (insn)) == SET))
6873 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6875 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6877 return test >= regno && test < endregno;
6880 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6882 int i = XVECLEN (PATTERN (insn), 0) - 1;
6884 for (; i >= 0; i--)
6886 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6887 if ((GET_CODE (elt) == CLOBBER
6888 || (sets && GET_CODE (PATTERN (insn)) == SET))
6889 && GET_CODE (XEXP (elt, 0)) == REG)
6891 unsigned int test = REGNO (XEXP (elt, 0));
6893 if (test >= regno && test < endregno)
6894 return 1;
6899 return 0;
6902 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6904 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
6906 int regno;
6908 if (GET_MODE (reloadreg) == mode)
6909 return reloadreg;
6911 regno = REGNO (reloadreg);
6913 if (WORDS_BIG_ENDIAN)
6914 regno += HARD_REGNO_NREGS (regno, GET_MODE (reloadreg))
6915 - HARD_REGNO_NREGS (regno, mode);
6917 return gen_rtx_REG (mode, regno);
6920 static const char *const reload_when_needed_name[] =
6922 "RELOAD_FOR_INPUT",
6923 "RELOAD_FOR_OUTPUT",
6924 "RELOAD_FOR_INSN",
6925 "RELOAD_FOR_INPUT_ADDRESS",
6926 "RELOAD_FOR_INPADDR_ADDRESS",
6927 "RELOAD_FOR_OUTPUT_ADDRESS",
6928 "RELOAD_FOR_OUTADDR_ADDRESS",
6929 "RELOAD_FOR_OPERAND_ADDRESS",
6930 "RELOAD_FOR_OPADDR_ADDR",
6931 "RELOAD_OTHER",
6932 "RELOAD_FOR_OTHER_ADDRESS"
6935 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6937 /* These functions are used to print the variables set by 'find_reloads' */
6939 void
6940 debug_reload_to_stream (FILE *f)
6942 int r;
6943 const char *prefix;
6945 if (! f)
6946 f = stderr;
6947 for (r = 0; r < n_reloads; r++)
6949 fprintf (f, "Reload %d: ", r);
6951 if (rld[r].in != 0)
6953 fprintf (f, "reload_in (%s) = ",
6954 GET_MODE_NAME (rld[r].inmode));
6955 print_inline_rtx (f, rld[r].in, 24);
6956 fprintf (f, "\n\t");
6959 if (rld[r].out != 0)
6961 fprintf (f, "reload_out (%s) = ",
6962 GET_MODE_NAME (rld[r].outmode));
6963 print_inline_rtx (f, rld[r].out, 24);
6964 fprintf (f, "\n\t");
6967 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6969 fprintf (f, "%s (opnum = %d)",
6970 reload_when_needed_name[(int) rld[r].when_needed],
6971 rld[r].opnum);
6973 if (rld[r].optional)
6974 fprintf (f, ", optional");
6976 if (rld[r].nongroup)
6977 fprintf (f, ", nongroup");
6979 if (rld[r].inc != 0)
6980 fprintf (f, ", inc by %d", rld[r].inc);
6982 if (rld[r].nocombine)
6983 fprintf (f, ", can't combine");
6985 if (rld[r].secondary_p)
6986 fprintf (f, ", secondary_reload_p");
6988 if (rld[r].in_reg != 0)
6990 fprintf (f, "\n\treload_in_reg: ");
6991 print_inline_rtx (f, rld[r].in_reg, 24);
6994 if (rld[r].out_reg != 0)
6996 fprintf (f, "\n\treload_out_reg: ");
6997 print_inline_rtx (f, rld[r].out_reg, 24);
7000 if (rld[r].reg_rtx != 0)
7002 fprintf (f, "\n\treload_reg_rtx: ");
7003 print_inline_rtx (f, rld[r].reg_rtx, 24);
7006 prefix = "\n\t";
7007 if (rld[r].secondary_in_reload != -1)
7009 fprintf (f, "%ssecondary_in_reload = %d",
7010 prefix, rld[r].secondary_in_reload);
7011 prefix = ", ";
7014 if (rld[r].secondary_out_reload != -1)
7015 fprintf (f, "%ssecondary_out_reload = %d\n",
7016 prefix, rld[r].secondary_out_reload);
7018 prefix = "\n\t";
7019 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7021 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7022 insn_data[rld[r].secondary_in_icode].name);
7023 prefix = ", ";
7026 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7027 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7028 insn_data[rld[r].secondary_out_icode].name);
7030 fprintf (f, "\n");
7034 void
7035 debug_reload (void)
7037 debug_reload_to_stream (stderr);