* tree-ssa-loop-prefetch.c (determine_unroll_factor): Bound the unroll
[official-gcc.git] / gcc / reg-stack.c
blobf21d833c00ba977869b0b3a6a7221e639455b641
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
72 * Methodology:
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
78 * asm_operands:
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
173 #include "timevar.h"
174 #include "tree-pass.h"
175 #include "target.h"
176 #include "vecprim.h"
178 #ifdef STACK_REGS
180 /* We use this array to cache info about insns, because otherwise we
181 spend too much time in stack_regs_mentioned_p.
183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
184 the insn uses stack registers, two indicates the insn does not use
185 stack registers. */
186 static VEC(char,heap) *stack_regs_mentioned_data;
188 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
190 int regstack_completed = 0;
192 /* This is the basic stack record. TOP is an index into REG[] such
193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
195 If TOP is -2, REG[] is not yet initialized. Stack initialization
196 consists of placing each live reg in array `reg' and setting `top'
197 appropriately.
199 REG_SET indicates which registers are live. */
201 typedef struct stack_def
203 int top; /* index to top stack element */
204 HARD_REG_SET reg_set; /* set of live registers */
205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
206 } *stack;
208 /* This is used to carry information about basic blocks. It is
209 attached to the AUX field of the standard CFG block. */
211 typedef struct block_info_def
213 struct stack_def stack_in; /* Input stack configuration. */
214 struct stack_def stack_out; /* Output stack configuration. */
215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
216 int done; /* True if block already converted. */
217 int predecessors; /* Number of predecessors that need
218 to be visited. */
219 } *block_info;
221 #define BLOCK_INFO(B) ((block_info) (B)->aux)
223 /* Passed to change_stack to indicate where to emit insns. */
224 enum emit_where
226 EMIT_AFTER,
227 EMIT_BEFORE
230 /* The block we're currently working on. */
231 static basic_block current_block;
233 /* In the current_block, whether we're processing the first register
234 stack or call instruction, i.e. the regstack is currently the
235 same as BLOCK_INFO(current_block)->stack_in. */
236 static bool starting_stack_p;
238 /* This is the register file for all register after conversion. */
239 static rtx
240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
242 #define FP_MODE_REG(regno,mode) \
243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
245 /* Used to initialize uninitialized registers. */
246 static rtx not_a_num;
248 /* Forward declarations */
250 static int stack_regs_mentioned_p (rtx pat);
251 static void pop_stack (stack, int);
252 static rtx *get_true_reg (rtx *);
254 static int check_asm_stack_operands (rtx);
255 static int get_asm_operand_n_inputs (rtx);
256 static rtx stack_result (tree);
257 static void replace_reg (rtx *, int);
258 static void remove_regno_note (rtx, enum reg_note, unsigned int);
259 static int get_hard_regnum (stack, rtx);
260 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
261 static void swap_to_top(rtx, stack, rtx, rtx);
262 static bool move_for_stack_reg (rtx, stack, rtx);
263 static bool move_nan_for_stack_reg (rtx, stack, rtx);
264 static int swap_rtx_condition_1 (rtx);
265 static int swap_rtx_condition (rtx);
266 static void compare_for_stack_reg (rtx, stack, rtx);
267 static bool subst_stack_regs_pat (rtx, stack, rtx);
268 static void subst_asm_stack_regs (rtx, stack);
269 static bool subst_stack_regs (rtx, stack);
270 static void change_stack (rtx, stack, stack, enum emit_where);
271 static void print_stack (FILE *, stack);
272 static rtx next_flags_user (rtx);
274 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
276 static int
277 stack_regs_mentioned_p (rtx pat)
279 const char *fmt;
280 int i;
282 if (STACK_REG_P (pat))
283 return 1;
285 fmt = GET_RTX_FORMAT (GET_CODE (pat));
286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
288 if (fmt[i] == 'E')
290 int j;
292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
294 return 1;
296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
297 return 1;
300 return 0;
303 /* Return nonzero if INSN mentions stacked registers, else return zero. */
306 stack_regs_mentioned (rtx insn)
308 unsigned int uid, max;
309 int test;
311 if (! INSN_P (insn) || !stack_regs_mentioned_data)
312 return 0;
314 uid = INSN_UID (insn);
315 max = VEC_length (char, stack_regs_mentioned_data);
316 if (uid >= max)
318 /* Allocate some extra size to avoid too many reallocs, but
319 do not grow too quickly. */
320 max = uid + uid / 20 + 1;
321 VEC_safe_grow_cleared (char, heap, stack_regs_mentioned_data, max);
324 test = VEC_index (char, stack_regs_mentioned_data, uid);
325 if (test == 0)
327 /* This insn has yet to be examined. Do so now. */
328 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
329 VEC_replace (char, stack_regs_mentioned_data, uid, test);
332 return test == 1;
335 static rtx ix86_flags_rtx;
337 static rtx
338 next_flags_user (rtx insn)
340 /* Search forward looking for the first use of this value.
341 Stop at block boundaries. */
343 while (insn != BB_END (current_block))
345 insn = NEXT_INSN (insn);
347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
348 return insn;
350 if (CALL_P (insn))
351 return NULL_RTX;
353 return NULL_RTX;
356 /* Reorganize the stack into ascending numbers, before this insn. */
358 static void
359 straighten_stack (rtx insn, stack regstack)
361 struct stack_def temp_stack;
362 int top;
364 /* If there is only a single register on the stack, then the stack is
365 already in increasing order and no reorganization is needed.
367 Similarly if the stack is empty. */
368 if (regstack->top <= 0)
369 return;
371 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
373 for (top = temp_stack.top = regstack->top; top >= 0; top--)
374 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
376 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
379 /* Pop a register from the stack. */
381 static void
382 pop_stack (stack regstack, int regno)
384 int top = regstack->top;
386 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
387 regstack->top--;
388 /* If regno was not at the top of stack then adjust stack. */
389 if (regstack->reg [top] != regno)
391 int i;
392 for (i = regstack->top; i >= 0; i--)
393 if (regstack->reg [i] == regno)
395 int j;
396 for (j = i; j < top; j++)
397 regstack->reg [j] = regstack->reg [j + 1];
398 break;
403 /* Return a pointer to the REG expression within PAT. If PAT is not a
404 REG, possible enclosed by a conversion rtx, return the inner part of
405 PAT that stopped the search. */
407 static rtx *
408 get_true_reg (rtx *pat)
410 for (;;)
411 switch (GET_CODE (*pat))
413 case SUBREG:
414 /* Eliminate FP subregister accesses in favor of the
415 actual FP register in use. */
417 rtx subreg;
418 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
420 int regno_off = subreg_regno_offset (REGNO (subreg),
421 GET_MODE (subreg),
422 SUBREG_BYTE (*pat),
423 GET_MODE (*pat));
424 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
425 GET_MODE (subreg));
426 default:
427 return pat;
430 case FLOAT:
431 case FIX:
432 case FLOAT_EXTEND:
433 pat = & XEXP (*pat, 0);
434 break;
436 case UNSPEC:
437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP)
438 pat = & XVECEXP (*pat, 0, 0);
439 return pat;
441 case FLOAT_TRUNCATE:
442 if (!flag_unsafe_math_optimizations)
443 return pat;
444 pat = & XEXP (*pat, 0);
445 break;
449 /* Set if we find any malformed asms in a block. */
450 static bool any_malformed_asm;
452 /* There are many rules that an asm statement for stack-like regs must
453 follow. Those rules are explained at the top of this file: the rule
454 numbers below refer to that explanation. */
456 static int
457 check_asm_stack_operands (rtx insn)
459 int i;
460 int n_clobbers;
461 int malformed_asm = 0;
462 rtx body = PATTERN (insn);
464 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
465 char implicitly_dies[FIRST_PSEUDO_REGISTER];
466 int alt;
468 rtx *clobber_reg = 0;
469 int n_inputs, n_outputs;
471 /* Find out what the constraints require. If no constraint
472 alternative matches, this asm is malformed. */
473 extract_insn (insn);
474 constrain_operands (1);
475 alt = which_alternative;
477 preprocess_constraints ();
479 n_inputs = get_asm_operand_n_inputs (body);
480 n_outputs = recog_data.n_operands - n_inputs;
482 if (alt < 0)
484 malformed_asm = 1;
485 /* Avoid further trouble with this insn. */
486 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
487 return 0;
490 /* Strip SUBREGs here to make the following code simpler. */
491 for (i = 0; i < recog_data.n_operands; i++)
492 if (GET_CODE (recog_data.operand[i]) == SUBREG
493 && REG_P (SUBREG_REG (recog_data.operand[i])))
494 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
496 /* Set up CLOBBER_REG. */
498 n_clobbers = 0;
500 if (GET_CODE (body) == PARALLEL)
502 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
504 for (i = 0; i < XVECLEN (body, 0); i++)
505 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
507 rtx clobber = XVECEXP (body, 0, i);
508 rtx reg = XEXP (clobber, 0);
510 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
511 reg = SUBREG_REG (reg);
513 if (STACK_REG_P (reg))
515 clobber_reg[n_clobbers] = reg;
516 n_clobbers++;
521 /* Enforce rule #4: Output operands must specifically indicate which
522 reg an output appears in after an asm. "=f" is not allowed: the
523 operand constraints must select a class with a single reg.
525 Also enforce rule #5: Output operands must start at the top of
526 the reg-stack: output operands may not "skip" a reg. */
528 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
529 for (i = 0; i < n_outputs; i++)
530 if (STACK_REG_P (recog_data.operand[i]))
532 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
534 error_for_asm (insn, "output constraint %d must specify a single register", i);
535 malformed_asm = 1;
537 else
539 int j;
541 for (j = 0; j < n_clobbers; j++)
542 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
544 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
545 i, reg_names [REGNO (clobber_reg[j])]);
546 malformed_asm = 1;
547 break;
549 if (j == n_clobbers)
550 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
555 /* Search for first non-popped reg. */
556 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
557 if (! reg_used_as_output[i])
558 break;
560 /* If there are any other popped regs, that's an error. */
561 for (; i < LAST_STACK_REG + 1; i++)
562 if (reg_used_as_output[i])
563 break;
565 if (i != LAST_STACK_REG + 1)
567 error_for_asm (insn, "output regs must be grouped at top of stack");
568 malformed_asm = 1;
571 /* Enforce rule #2: All implicitly popped input regs must be closer
572 to the top of the reg-stack than any input that is not implicitly
573 popped. */
575 memset (implicitly_dies, 0, sizeof (implicitly_dies));
576 for (i = n_outputs; i < n_outputs + n_inputs; i++)
577 if (STACK_REG_P (recog_data.operand[i]))
579 /* An input reg is implicitly popped if it is tied to an
580 output, or if there is a CLOBBER for it. */
581 int j;
583 for (j = 0; j < n_clobbers; j++)
584 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
585 break;
587 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
588 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
591 /* Search for first non-popped reg. */
592 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
593 if (! implicitly_dies[i])
594 break;
596 /* If there are any other popped regs, that's an error. */
597 for (; i < LAST_STACK_REG + 1; i++)
598 if (implicitly_dies[i])
599 break;
601 if (i != LAST_STACK_REG + 1)
603 error_for_asm (insn,
604 "implicitly popped regs must be grouped at top of stack");
605 malformed_asm = 1;
608 /* Enforce rule #3: If any input operand uses the "f" constraint, all
609 output constraints must use the "&" earlyclobber.
611 ??? Detect this more deterministically by having constrain_asm_operands
612 record any earlyclobber. */
614 for (i = n_outputs; i < n_outputs + n_inputs; i++)
615 if (recog_op_alt[i][alt].matches == -1)
617 int j;
619 for (j = 0; j < n_outputs; j++)
620 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
622 error_for_asm (insn,
623 "output operand %d must use %<&%> constraint", j);
624 malformed_asm = 1;
628 if (malformed_asm)
630 /* Avoid further trouble with this insn. */
631 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
632 any_malformed_asm = true;
633 return 0;
636 return 1;
639 /* Calculate the number of inputs and outputs in BODY, an
640 asm_operands. N_OPERANDS is the total number of operands, and
641 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
642 placed. */
644 static int
645 get_asm_operand_n_inputs (rtx body)
647 switch (GET_CODE (body))
649 case SET:
650 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
651 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
653 case ASM_OPERANDS:
654 return ASM_OPERANDS_INPUT_LENGTH (body);
656 case PARALLEL:
657 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
659 default:
660 gcc_unreachable ();
664 /* If current function returns its result in an fp stack register,
665 return the REG. Otherwise, return 0. */
667 static rtx
668 stack_result (tree decl)
670 rtx result;
672 /* If the value is supposed to be returned in memory, then clearly
673 it is not returned in a stack register. */
674 if (aggregate_value_p (DECL_RESULT (decl), decl))
675 return 0;
677 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
678 if (result != 0)
679 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
680 decl, true);
682 return result != 0 && STACK_REG_P (result) ? result : 0;
687 * This section deals with stack register substitution, and forms the second
688 * pass over the RTL.
691 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
692 the desired hard REGNO. */
694 static void
695 replace_reg (rtx *reg, int regno)
697 gcc_assert (regno >= FIRST_STACK_REG);
698 gcc_assert (regno <= LAST_STACK_REG);
699 gcc_assert (STACK_REG_P (*reg));
701 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
702 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
704 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
707 /* Remove a note of type NOTE, which must be found, for register
708 number REGNO from INSN. Remove only one such note. */
710 static void
711 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
713 rtx *note_link, this;
715 note_link = &REG_NOTES (insn);
716 for (this = *note_link; this; this = XEXP (this, 1))
717 if (REG_NOTE_KIND (this) == note
718 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
720 *note_link = XEXP (this, 1);
721 return;
723 else
724 note_link = &XEXP (this, 1);
726 gcc_unreachable ();
729 /* Find the hard register number of virtual register REG in REGSTACK.
730 The hard register number is relative to the top of the stack. -1 is
731 returned if the register is not found. */
733 static int
734 get_hard_regnum (stack regstack, rtx reg)
736 int i;
738 gcc_assert (STACK_REG_P (reg));
740 for (i = regstack->top; i >= 0; i--)
741 if (regstack->reg[i] == REGNO (reg))
742 break;
744 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
747 /* Emit an insn to pop virtual register REG before or after INSN.
748 REGSTACK is the stack state after INSN and is updated to reflect this
749 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
750 is represented as a SET whose destination is the register to be popped
751 and source is the top of stack. A death note for the top of stack
752 cases the movdf pattern to pop. */
754 static rtx
755 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
757 rtx pop_insn, pop_rtx;
758 int hard_regno;
760 /* For complex types take care to pop both halves. These may survive in
761 CLOBBER and USE expressions. */
762 if (COMPLEX_MODE_P (GET_MODE (reg)))
764 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
765 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
767 pop_insn = NULL_RTX;
768 if (get_hard_regnum (regstack, reg1) >= 0)
769 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
770 if (get_hard_regnum (regstack, reg2) >= 0)
771 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
772 gcc_assert (pop_insn);
773 return pop_insn;
776 hard_regno = get_hard_regnum (regstack, reg);
778 gcc_assert (hard_regno >= FIRST_STACK_REG);
780 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
781 FP_MODE_REG (FIRST_STACK_REG, DFmode));
783 if (where == EMIT_AFTER)
784 pop_insn = emit_insn_after (pop_rtx, insn);
785 else
786 pop_insn = emit_insn_before (pop_rtx, insn);
788 REG_NOTES (pop_insn)
789 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
790 REG_NOTES (pop_insn));
792 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
793 = regstack->reg[regstack->top];
794 regstack->top -= 1;
795 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
797 return pop_insn;
800 /* Emit an insn before or after INSN to swap virtual register REG with
801 the top of stack. REGSTACK is the stack state before the swap, and
802 is updated to reflect the swap. A swap insn is represented as a
803 PARALLEL of two patterns: each pattern moves one reg to the other.
805 If REG is already at the top of the stack, no insn is emitted. */
807 static void
808 emit_swap_insn (rtx insn, stack regstack, rtx reg)
810 int hard_regno;
811 rtx swap_rtx;
812 int tmp, other_reg; /* swap regno temps */
813 rtx i1; /* the stack-reg insn prior to INSN */
814 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
816 hard_regno = get_hard_regnum (regstack, reg);
818 gcc_assert (hard_regno >= FIRST_STACK_REG);
819 if (hard_regno == FIRST_STACK_REG)
820 return;
822 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
824 tmp = regstack->reg[other_reg];
825 regstack->reg[other_reg] = regstack->reg[regstack->top];
826 regstack->reg[regstack->top] = tmp;
828 /* Find the previous insn involving stack regs, but don't pass a
829 block boundary. */
830 i1 = NULL;
831 if (current_block && insn != BB_HEAD (current_block))
833 rtx tmp = PREV_INSN (insn);
834 rtx limit = PREV_INSN (BB_HEAD (current_block));
835 while (tmp != limit)
837 if (LABEL_P (tmp)
838 || CALL_P (tmp)
839 || NOTE_INSN_BASIC_BLOCK_P (tmp)
840 || (NONJUMP_INSN_P (tmp)
841 && stack_regs_mentioned (tmp)))
843 i1 = tmp;
844 break;
846 tmp = PREV_INSN (tmp);
850 if (i1 != NULL_RTX
851 && (i1set = single_set (i1)) != NULL_RTX)
853 rtx i1src = *get_true_reg (&SET_SRC (i1set));
854 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
856 /* If the previous register stack push was from the reg we are to
857 swap with, omit the swap. */
859 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
860 && REG_P (i1src)
861 && REGNO (i1src) == (unsigned) hard_regno - 1
862 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
863 return;
865 /* If the previous insn wrote to the reg we are to swap with,
866 omit the swap. */
868 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
869 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
870 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
871 return;
874 /* Avoid emitting the swap if this is the first register stack insn
875 of the current_block. Instead update the current_block's stack_in
876 and let compensate edges take care of this for us. */
877 if (current_block && starting_stack_p)
879 BLOCK_INFO (current_block)->stack_in = *regstack;
880 starting_stack_p = false;
881 return;
884 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
885 FP_MODE_REG (FIRST_STACK_REG, XFmode));
887 if (i1)
888 emit_insn_after (swap_rtx, i1);
889 else if (current_block)
890 emit_insn_before (swap_rtx, BB_HEAD (current_block));
891 else
892 emit_insn_before (swap_rtx, insn);
895 /* Emit an insns before INSN to swap virtual register SRC1 with
896 the top of stack and virtual register SRC2 with second stack
897 slot. REGSTACK is the stack state before the swaps, and
898 is updated to reflect the swaps. A swap insn is represented as a
899 PARALLEL of two patterns: each pattern moves one reg to the other.
901 If SRC1 and/or SRC2 are already at the right place, no swap insn
902 is emitted. */
904 static void
905 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
907 struct stack_def temp_stack;
908 int regno, j, k, temp;
910 temp_stack = *regstack;
912 /* Place operand 1 at the top of stack. */
913 regno = get_hard_regnum (&temp_stack, src1);
914 gcc_assert (regno >= 0);
915 if (regno != FIRST_STACK_REG)
917 k = temp_stack.top - (regno - FIRST_STACK_REG);
918 j = temp_stack.top;
920 temp = temp_stack.reg[k];
921 temp_stack.reg[k] = temp_stack.reg[j];
922 temp_stack.reg[j] = temp;
925 /* Place operand 2 next on the stack. */
926 regno = get_hard_regnum (&temp_stack, src2);
927 gcc_assert (regno >= 0);
928 if (regno != FIRST_STACK_REG + 1)
930 k = temp_stack.top - (regno - FIRST_STACK_REG);
931 j = temp_stack.top - 1;
933 temp = temp_stack.reg[k];
934 temp_stack.reg[k] = temp_stack.reg[j];
935 temp_stack.reg[j] = temp;
938 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
941 /* Handle a move to or from a stack register in PAT, which is in INSN.
942 REGSTACK is the current stack. Return whether a control flow insn
943 was deleted in the process. */
945 static bool
946 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
948 rtx *psrc = get_true_reg (&SET_SRC (pat));
949 rtx *pdest = get_true_reg (&SET_DEST (pat));
950 rtx src, dest;
951 rtx note;
952 bool control_flow_insn_deleted = false;
954 src = *psrc; dest = *pdest;
956 if (STACK_REG_P (src) && STACK_REG_P (dest))
958 /* Write from one stack reg to another. If SRC dies here, then
959 just change the register mapping and delete the insn. */
961 note = find_regno_note (insn, REG_DEAD, REGNO (src));
962 if (note)
964 int i;
966 /* If this is a no-op move, there must not be a REG_DEAD note. */
967 gcc_assert (REGNO (src) != REGNO (dest));
969 for (i = regstack->top; i >= 0; i--)
970 if (regstack->reg[i] == REGNO (src))
971 break;
973 /* The destination must be dead, or life analysis is borked. */
974 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
976 /* If the source is not live, this is yet another case of
977 uninitialized variables. Load up a NaN instead. */
978 if (i < 0)
979 return move_nan_for_stack_reg (insn, regstack, dest);
981 /* It is possible that the dest is unused after this insn.
982 If so, just pop the src. */
984 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
985 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
986 else
988 regstack->reg[i] = REGNO (dest);
989 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
990 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
993 control_flow_insn_deleted |= control_flow_insn_p (insn);
994 delete_insn (insn);
995 return control_flow_insn_deleted;
998 /* The source reg does not die. */
1000 /* If this appears to be a no-op move, delete it, or else it
1001 will confuse the machine description output patterns. But if
1002 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1003 for REG_UNUSED will not work for deleted insns. */
1005 if (REGNO (src) == REGNO (dest))
1007 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1008 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1010 control_flow_insn_deleted |= control_flow_insn_p (insn);
1011 delete_insn (insn);
1012 return control_flow_insn_deleted;
1015 /* The destination ought to be dead. */
1016 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1018 replace_reg (psrc, get_hard_regnum (regstack, src));
1020 regstack->reg[++regstack->top] = REGNO (dest);
1021 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1022 replace_reg (pdest, FIRST_STACK_REG);
1024 else if (STACK_REG_P (src))
1026 /* Save from a stack reg to MEM, or possibly integer reg. Since
1027 only top of stack may be saved, emit an exchange first if
1028 needs be. */
1030 emit_swap_insn (insn, regstack, src);
1032 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1033 if (note)
1035 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1036 regstack->top--;
1037 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1039 else if ((GET_MODE (src) == XFmode)
1040 && regstack->top < REG_STACK_SIZE - 1)
1042 /* A 387 cannot write an XFmode value to a MEM without
1043 clobbering the source reg. The output code can handle
1044 this by reading back the value from the MEM.
1045 But it is more efficient to use a temp register if one is
1046 available. Push the source value here if the register
1047 stack is not full, and then write the value to memory via
1048 a pop. */
1049 rtx push_rtx;
1050 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1052 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1053 emit_insn_before (push_rtx, insn);
1054 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1055 REG_NOTES (insn));
1058 replace_reg (psrc, FIRST_STACK_REG);
1060 else
1062 rtx pat = PATTERN (insn);
1064 gcc_assert (STACK_REG_P (dest));
1066 /* Load from MEM, or possibly integer REG or constant, into the
1067 stack regs. The actual target is always the top of the
1068 stack. The stack mapping is changed to reflect that DEST is
1069 now at top of stack. */
1071 /* The destination ought to be dead. However, there is a
1072 special case with i387 UNSPEC_TAN, where destination is live
1073 (an argument to fptan) but inherent load of 1.0 is modelled
1074 as a load from a constant. */
1075 if (! (GET_CODE (pat) == PARALLEL
1076 && XVECLEN (pat, 0) == 2
1077 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1078 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1079 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN))
1080 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1082 gcc_assert (regstack->top < REG_STACK_SIZE);
1084 regstack->reg[++regstack->top] = REGNO (dest);
1085 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1086 replace_reg (pdest, FIRST_STACK_REG);
1089 return control_flow_insn_deleted;
1092 /* A helper function which replaces INSN with a pattern that loads up
1093 a NaN into DEST, then invokes move_for_stack_reg. */
1095 static bool
1096 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
1098 rtx pat;
1100 dest = FP_MODE_REG (REGNO (dest), SFmode);
1101 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1102 PATTERN (insn) = pat;
1103 INSN_CODE (insn) = -1;
1105 return move_for_stack_reg (insn, regstack, pat);
1108 /* Swap the condition on a branch, if there is one. Return true if we
1109 found a condition to swap. False if the condition was not used as
1110 such. */
1112 static int
1113 swap_rtx_condition_1 (rtx pat)
1115 const char *fmt;
1116 int i, r = 0;
1118 if (COMPARISON_P (pat))
1120 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1121 r = 1;
1123 else
1125 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1126 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1128 if (fmt[i] == 'E')
1130 int j;
1132 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1133 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1135 else if (fmt[i] == 'e')
1136 r |= swap_rtx_condition_1 (XEXP (pat, i));
1140 return r;
1143 static int
1144 swap_rtx_condition (rtx insn)
1146 rtx pat = PATTERN (insn);
1148 /* We're looking for a single set to cc0 or an HImode temporary. */
1150 if (GET_CODE (pat) == SET
1151 && REG_P (SET_DEST (pat))
1152 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1154 insn = next_flags_user (insn);
1155 if (insn == NULL_RTX)
1156 return 0;
1157 pat = PATTERN (insn);
1160 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1161 with the cc value right now. We may be able to search for one
1162 though. */
1164 if (GET_CODE (pat) == SET
1165 && GET_CODE (SET_SRC (pat)) == UNSPEC
1166 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1168 rtx dest = SET_DEST (pat);
1170 /* Search forward looking for the first use of this value.
1171 Stop at block boundaries. */
1172 while (insn != BB_END (current_block))
1174 insn = NEXT_INSN (insn);
1175 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1176 break;
1177 if (CALL_P (insn))
1178 return 0;
1181 /* We haven't found it. */
1182 if (insn == BB_END (current_block))
1183 return 0;
1185 /* So we've found the insn using this value. If it is anything
1186 other than sahf or the value does not die (meaning we'd have
1187 to search further), then we must give up. */
1188 pat = PATTERN (insn);
1189 if (GET_CODE (pat) != SET
1190 || GET_CODE (SET_SRC (pat)) != UNSPEC
1191 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1192 || ! dead_or_set_p (insn, dest))
1193 return 0;
1195 /* Now we are prepared to handle this as a normal cc0 setter. */
1196 insn = next_flags_user (insn);
1197 if (insn == NULL_RTX)
1198 return 0;
1199 pat = PATTERN (insn);
1202 if (swap_rtx_condition_1 (pat))
1204 int fail = 0;
1205 INSN_CODE (insn) = -1;
1206 if (recog_memoized (insn) == -1)
1207 fail = 1;
1208 /* In case the flags don't die here, recurse to try fix
1209 following user too. */
1210 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1212 insn = next_flags_user (insn);
1213 if (!insn || !swap_rtx_condition (insn))
1214 fail = 1;
1216 if (fail)
1218 swap_rtx_condition_1 (pat);
1219 return 0;
1221 return 1;
1223 return 0;
1226 /* Handle a comparison. Special care needs to be taken to avoid
1227 causing comparisons that a 387 cannot do correctly, such as EQ.
1229 Also, a pop insn may need to be emitted. The 387 does have an
1230 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1231 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1232 set up. */
1234 static void
1235 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1237 rtx *src1, *src2;
1238 rtx src1_note, src2_note;
1240 src1 = get_true_reg (&XEXP (pat_src, 0));
1241 src2 = get_true_reg (&XEXP (pat_src, 1));
1243 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1244 registers that die in this insn - move those to stack top first. */
1245 if ((! STACK_REG_P (*src1)
1246 || (STACK_REG_P (*src2)
1247 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1248 && swap_rtx_condition (insn))
1250 rtx temp;
1251 temp = XEXP (pat_src, 0);
1252 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1253 XEXP (pat_src, 1) = temp;
1255 src1 = get_true_reg (&XEXP (pat_src, 0));
1256 src2 = get_true_reg (&XEXP (pat_src, 1));
1258 INSN_CODE (insn) = -1;
1261 /* We will fix any death note later. */
1263 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1265 if (STACK_REG_P (*src2))
1266 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1267 else
1268 src2_note = NULL_RTX;
1270 emit_swap_insn (insn, regstack, *src1);
1272 replace_reg (src1, FIRST_STACK_REG);
1274 if (STACK_REG_P (*src2))
1275 replace_reg (src2, get_hard_regnum (regstack, *src2));
1277 if (src1_note)
1279 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1280 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1283 /* If the second operand dies, handle that. But if the operands are
1284 the same stack register, don't bother, because only one death is
1285 needed, and it was just handled. */
1287 if (src2_note
1288 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1289 && REGNO (*src1) == REGNO (*src2)))
1291 /* As a special case, two regs may die in this insn if src2 is
1292 next to top of stack and the top of stack also dies. Since
1293 we have already popped src1, "next to top of stack" is really
1294 at top (FIRST_STACK_REG) now. */
1296 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1297 && src1_note)
1299 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1300 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1302 else
1304 /* The 386 can only represent death of the first operand in
1305 the case handled above. In all other cases, emit a separate
1306 pop and remove the death note from here. */
1308 /* link_cc0_insns (insn); */
1310 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1312 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1313 EMIT_AFTER);
1318 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1319 is the current register layout. Return whether a control flow insn
1320 was deleted in the process. */
1322 static bool
1323 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1325 rtx *dest, *src;
1326 bool control_flow_insn_deleted = false;
1328 switch (GET_CODE (pat))
1330 case USE:
1331 /* Deaths in USE insns can happen in non optimizing compilation.
1332 Handle them by popping the dying register. */
1333 src = get_true_reg (&XEXP (pat, 0));
1334 if (STACK_REG_P (*src)
1335 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1337 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1338 return control_flow_insn_deleted;
1340 /* ??? Uninitialized USE should not happen. */
1341 else
1342 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1343 break;
1345 case CLOBBER:
1347 rtx note;
1349 dest = get_true_reg (&XEXP (pat, 0));
1350 if (STACK_REG_P (*dest))
1352 note = find_reg_note (insn, REG_DEAD, *dest);
1354 if (pat != PATTERN (insn))
1356 /* The fix_truncdi_1 pattern wants to be able to allocate
1357 its own scratch register. It does this by clobbering
1358 an fp reg so that it is assured of an empty reg-stack
1359 register. If the register is live, kill it now.
1360 Remove the DEAD/UNUSED note so we don't try to kill it
1361 later too. */
1363 if (note)
1364 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1365 else
1367 note = find_reg_note (insn, REG_UNUSED, *dest);
1368 gcc_assert (note);
1370 remove_note (insn, note);
1371 replace_reg (dest, FIRST_STACK_REG + 1);
1373 else
1375 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1376 indicates an uninitialized value. Because reload removed
1377 all other clobbers, this must be due to a function
1378 returning without a value. Load up a NaN. */
1380 if (!note)
1382 rtx t = *dest;
1383 if (COMPLEX_MODE_P (GET_MODE (t)))
1385 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1386 if (get_hard_regnum (regstack, u) == -1)
1388 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1389 rtx insn2 = emit_insn_before (pat2, insn);
1390 control_flow_insn_deleted
1391 |= move_nan_for_stack_reg (insn2, regstack, u);
1394 if (get_hard_regnum (regstack, t) == -1)
1395 control_flow_insn_deleted
1396 |= move_nan_for_stack_reg (insn, regstack, t);
1400 break;
1403 case SET:
1405 rtx *src1 = (rtx *) 0, *src2;
1406 rtx src1_note, src2_note;
1407 rtx pat_src;
1409 dest = get_true_reg (&SET_DEST (pat));
1410 src = get_true_reg (&SET_SRC (pat));
1411 pat_src = SET_SRC (pat);
1413 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1414 if (STACK_REG_P (*src)
1415 || (STACK_REG_P (*dest)
1416 && (REG_P (*src) || MEM_P (*src)
1417 || GET_CODE (*src) == CONST_DOUBLE)))
1419 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1420 break;
1423 switch (GET_CODE (pat_src))
1425 case COMPARE:
1426 compare_for_stack_reg (insn, regstack, pat_src);
1427 break;
1429 case CALL:
1431 int count;
1432 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1433 --count >= 0;)
1435 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1436 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1439 replace_reg (dest, FIRST_STACK_REG);
1440 break;
1442 case REG:
1443 /* This is a `tstM2' case. */
1444 gcc_assert (*dest == cc0_rtx);
1445 src1 = src;
1447 /* Fall through. */
1449 case FLOAT_TRUNCATE:
1450 case SQRT:
1451 case ABS:
1452 case NEG:
1453 /* These insns only operate on the top of the stack. DEST might
1454 be cc0_rtx if we're processing a tstM pattern. Also, it's
1455 possible that the tstM case results in a REG_DEAD note on the
1456 source. */
1458 if (src1 == 0)
1459 src1 = get_true_reg (&XEXP (pat_src, 0));
1461 emit_swap_insn (insn, regstack, *src1);
1463 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1465 if (STACK_REG_P (*dest))
1466 replace_reg (dest, FIRST_STACK_REG);
1468 if (src1_note)
1470 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1471 regstack->top--;
1472 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1475 replace_reg (src1, FIRST_STACK_REG);
1476 break;
1478 case MINUS:
1479 case DIV:
1480 /* On i386, reversed forms of subM3 and divM3 exist for
1481 MODE_FLOAT, so the same code that works for addM3 and mulM3
1482 can be used. */
1483 case MULT:
1484 case PLUS:
1485 /* These insns can accept the top of stack as a destination
1486 from a stack reg or mem, or can use the top of stack as a
1487 source and some other stack register (possibly top of stack)
1488 as a destination. */
1490 src1 = get_true_reg (&XEXP (pat_src, 0));
1491 src2 = get_true_reg (&XEXP (pat_src, 1));
1493 /* We will fix any death note later. */
1495 if (STACK_REG_P (*src1))
1496 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1497 else
1498 src1_note = NULL_RTX;
1499 if (STACK_REG_P (*src2))
1500 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1501 else
1502 src2_note = NULL_RTX;
1504 /* If either operand is not a stack register, then the dest
1505 must be top of stack. */
1507 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1508 emit_swap_insn (insn, regstack, *dest);
1509 else
1511 /* Both operands are REG. If neither operand is already
1512 at the top of stack, choose to make the one that is the dest
1513 the new top of stack. */
1515 int src1_hard_regnum, src2_hard_regnum;
1517 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1518 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1519 gcc_assert (src1_hard_regnum != -1);
1520 gcc_assert (src2_hard_regnum != -1);
1522 if (src1_hard_regnum != FIRST_STACK_REG
1523 && src2_hard_regnum != FIRST_STACK_REG)
1524 emit_swap_insn (insn, regstack, *dest);
1527 if (STACK_REG_P (*src1))
1528 replace_reg (src1, get_hard_regnum (regstack, *src1));
1529 if (STACK_REG_P (*src2))
1530 replace_reg (src2, get_hard_regnum (regstack, *src2));
1532 if (src1_note)
1534 rtx src1_reg = XEXP (src1_note, 0);
1536 /* If the register that dies is at the top of stack, then
1537 the destination is somewhere else - merely substitute it.
1538 But if the reg that dies is not at top of stack, then
1539 move the top of stack to the dead reg, as though we had
1540 done the insn and then a store-with-pop. */
1542 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1544 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1545 replace_reg (dest, get_hard_regnum (regstack, *dest));
1547 else
1549 int regno = get_hard_regnum (regstack, src1_reg);
1551 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1552 replace_reg (dest, regno);
1554 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1555 = regstack->reg[regstack->top];
1558 CLEAR_HARD_REG_BIT (regstack->reg_set,
1559 REGNO (XEXP (src1_note, 0)));
1560 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1561 regstack->top--;
1563 else if (src2_note)
1565 rtx src2_reg = XEXP (src2_note, 0);
1566 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1568 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1569 replace_reg (dest, get_hard_regnum (regstack, *dest));
1571 else
1573 int regno = get_hard_regnum (regstack, src2_reg);
1575 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1576 replace_reg (dest, regno);
1578 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1579 = regstack->reg[regstack->top];
1582 CLEAR_HARD_REG_BIT (regstack->reg_set,
1583 REGNO (XEXP (src2_note, 0)));
1584 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1585 regstack->top--;
1587 else
1589 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1590 replace_reg (dest, get_hard_regnum (regstack, *dest));
1593 /* Keep operand 1 matching with destination. */
1594 if (COMMUTATIVE_ARITH_P (pat_src)
1595 && REG_P (*src1) && REG_P (*src2)
1596 && REGNO (*src1) != REGNO (*dest))
1598 int tmp = REGNO (*src1);
1599 replace_reg (src1, REGNO (*src2));
1600 replace_reg (src2, tmp);
1602 break;
1604 case UNSPEC:
1605 switch (XINT (pat_src, 1))
1607 case UNSPEC_FIST:
1609 case UNSPEC_FIST_FLOOR:
1610 case UNSPEC_FIST_CEIL:
1612 /* These insns only operate on the top of the stack. */
1614 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1615 emit_swap_insn (insn, regstack, *src1);
1617 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1619 if (STACK_REG_P (*dest))
1620 replace_reg (dest, FIRST_STACK_REG);
1622 if (src1_note)
1624 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1625 regstack->top--;
1626 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1629 replace_reg (src1, FIRST_STACK_REG);
1630 break;
1632 case UNSPEC_FXAM:
1634 /* This insn only operate on the top of the stack. */
1636 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1637 emit_swap_insn (insn, regstack, *src1);
1639 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1641 replace_reg (src1, FIRST_STACK_REG);
1643 if (src1_note)
1645 remove_regno_note (insn, REG_DEAD,
1646 REGNO (XEXP (src1_note, 0)));
1647 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1648 EMIT_AFTER);
1651 break;
1653 case UNSPEC_SIN:
1654 case UNSPEC_COS:
1655 case UNSPEC_FRNDINT:
1656 case UNSPEC_F2XM1:
1658 case UNSPEC_FRNDINT_FLOOR:
1659 case UNSPEC_FRNDINT_CEIL:
1660 case UNSPEC_FRNDINT_TRUNC:
1661 case UNSPEC_FRNDINT_MASK_PM:
1663 /* Above insns operate on the top of the stack. */
1665 case UNSPEC_SINCOS_COS:
1666 case UNSPEC_XTRACT_FRACT:
1668 /* Above insns operate on the top two stack slots,
1669 first part of one input, double output insn. */
1671 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1673 emit_swap_insn (insn, regstack, *src1);
1675 /* Input should never die, it is replaced with output. */
1676 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1677 gcc_assert (!src1_note);
1679 if (STACK_REG_P (*dest))
1680 replace_reg (dest, FIRST_STACK_REG);
1682 replace_reg (src1, FIRST_STACK_REG);
1683 break;
1685 case UNSPEC_SINCOS_SIN:
1686 case UNSPEC_XTRACT_EXP:
1688 /* These insns operate on the top two stack slots,
1689 second part of one input, double output insn. */
1691 regstack->top++;
1692 /* FALLTHRU */
1694 case UNSPEC_TAN:
1696 /* For UNSPEC_TAN, regstack->top is already increased
1697 by inherent load of constant 1.0. */
1699 /* Output value is generated in the second stack slot.
1700 Move current value from second slot to the top. */
1701 regstack->reg[regstack->top]
1702 = regstack->reg[regstack->top - 1];
1704 gcc_assert (STACK_REG_P (*dest));
1706 regstack->reg[regstack->top - 1] = REGNO (*dest);
1707 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1708 replace_reg (dest, FIRST_STACK_REG + 1);
1710 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1712 replace_reg (src1, FIRST_STACK_REG);
1713 break;
1715 case UNSPEC_FPATAN:
1716 case UNSPEC_FYL2X:
1717 case UNSPEC_FYL2XP1:
1718 /* These insns operate on the top two stack slots. */
1720 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1721 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1723 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1724 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1726 swap_to_top (insn, regstack, *src1, *src2);
1728 replace_reg (src1, FIRST_STACK_REG);
1729 replace_reg (src2, FIRST_STACK_REG + 1);
1731 if (src1_note)
1732 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1733 if (src2_note)
1734 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1736 /* Pop both input operands from the stack. */
1737 CLEAR_HARD_REG_BIT (regstack->reg_set,
1738 regstack->reg[regstack->top]);
1739 CLEAR_HARD_REG_BIT (regstack->reg_set,
1740 regstack->reg[regstack->top - 1]);
1741 regstack->top -= 2;
1743 /* Push the result back onto the stack. */
1744 regstack->reg[++regstack->top] = REGNO (*dest);
1745 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1746 replace_reg (dest, FIRST_STACK_REG);
1747 break;
1749 case UNSPEC_FSCALE_FRACT:
1750 case UNSPEC_FPREM_F:
1751 case UNSPEC_FPREM1_F:
1752 /* These insns operate on the top two stack slots.
1753 first part of double input, double output insn. */
1755 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1756 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1758 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1759 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1761 /* Inputs should never die, they are
1762 replaced with outputs. */
1763 gcc_assert (!src1_note);
1764 gcc_assert (!src2_note);
1766 swap_to_top (insn, regstack, *src1, *src2);
1768 /* Push the result back onto stack. Empty stack slot
1769 will be filled in second part of insn. */
1770 if (STACK_REG_P (*dest))
1772 regstack->reg[regstack->top] = REGNO (*dest);
1773 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1774 replace_reg (dest, FIRST_STACK_REG);
1777 replace_reg (src1, FIRST_STACK_REG);
1778 replace_reg (src2, FIRST_STACK_REG + 1);
1779 break;
1781 case UNSPEC_FSCALE_EXP:
1782 case UNSPEC_FPREM_U:
1783 case UNSPEC_FPREM1_U:
1784 /* These insns operate on the top two stack slots./
1785 second part of double input, double output insn. */
1787 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1788 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1790 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1791 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1793 /* Inputs should never die, they are
1794 replaced with outputs. */
1795 gcc_assert (!src1_note);
1796 gcc_assert (!src2_note);
1798 swap_to_top (insn, regstack, *src1, *src2);
1800 /* Push the result back onto stack. Fill empty slot from
1801 first part of insn and fix top of stack pointer. */
1802 if (STACK_REG_P (*dest))
1804 regstack->reg[regstack->top - 1] = REGNO (*dest);
1805 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1806 replace_reg (dest, FIRST_STACK_REG + 1);
1809 replace_reg (src1, FIRST_STACK_REG);
1810 replace_reg (src2, FIRST_STACK_REG + 1);
1811 break;
1813 case UNSPEC_SAHF:
1814 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1815 The combination matches the PPRO fcomi instruction. */
1817 pat_src = XVECEXP (pat_src, 0, 0);
1818 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1819 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1820 /* Fall through. */
1822 case UNSPEC_FNSTSW:
1823 /* Combined fcomp+fnstsw generated for doing well with
1824 CSE. When optimizing this would have been broken
1825 up before now. */
1827 pat_src = XVECEXP (pat_src, 0, 0);
1828 gcc_assert (GET_CODE (pat_src) == COMPARE);
1830 compare_for_stack_reg (insn, regstack, pat_src);
1831 break;
1833 default:
1834 gcc_unreachable ();
1836 break;
1838 case IF_THEN_ELSE:
1839 /* This insn requires the top of stack to be the destination. */
1841 src1 = get_true_reg (&XEXP (pat_src, 1));
1842 src2 = get_true_reg (&XEXP (pat_src, 2));
1844 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1845 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1847 /* If the comparison operator is an FP comparison operator,
1848 it is handled correctly by compare_for_stack_reg () who
1849 will move the destination to the top of stack. But if the
1850 comparison operator is not an FP comparison operator, we
1851 have to handle it here. */
1852 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1853 && REGNO (*dest) != regstack->reg[regstack->top])
1855 /* In case one of operands is the top of stack and the operands
1856 dies, it is safe to make it the destination operand by
1857 reversing the direction of cmove and avoid fxch. */
1858 if ((REGNO (*src1) == regstack->reg[regstack->top]
1859 && src1_note)
1860 || (REGNO (*src2) == regstack->reg[regstack->top]
1861 && src2_note))
1863 int idx1 = (get_hard_regnum (regstack, *src1)
1864 - FIRST_STACK_REG);
1865 int idx2 = (get_hard_regnum (regstack, *src2)
1866 - FIRST_STACK_REG);
1868 /* Make reg-stack believe that the operands are already
1869 swapped on the stack */
1870 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1871 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1873 /* Reverse condition to compensate the operand swap.
1874 i386 do have comparison always reversible. */
1875 PUT_CODE (XEXP (pat_src, 0),
1876 reversed_comparison_code (XEXP (pat_src, 0), insn));
1878 else
1879 emit_swap_insn (insn, regstack, *dest);
1883 rtx src_note [3];
1884 int i;
1886 src_note[0] = 0;
1887 src_note[1] = src1_note;
1888 src_note[2] = src2_note;
1890 if (STACK_REG_P (*src1))
1891 replace_reg (src1, get_hard_regnum (regstack, *src1));
1892 if (STACK_REG_P (*src2))
1893 replace_reg (src2, get_hard_regnum (regstack, *src2));
1895 for (i = 1; i <= 2; i++)
1896 if (src_note [i])
1898 int regno = REGNO (XEXP (src_note[i], 0));
1900 /* If the register that dies is not at the top of
1901 stack, then move the top of stack to the dead reg.
1902 Top of stack should never die, as it is the
1903 destination. */
1904 gcc_assert (regno != regstack->reg[regstack->top]);
1905 remove_regno_note (insn, REG_DEAD, regno);
1906 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1907 EMIT_AFTER);
1911 /* Make dest the top of stack. Add dest to regstack if
1912 not present. */
1913 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1914 regstack->reg[++regstack->top] = REGNO (*dest);
1915 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1916 replace_reg (dest, FIRST_STACK_REG);
1917 break;
1919 default:
1920 gcc_unreachable ();
1922 break;
1925 default:
1926 break;
1929 return control_flow_insn_deleted;
1932 /* Substitute hard regnums for any stack regs in INSN, which has
1933 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1934 before the insn, and is updated with changes made here.
1936 There are several requirements and assumptions about the use of
1937 stack-like regs in asm statements. These rules are enforced by
1938 record_asm_stack_regs; see comments there for details. Any
1939 asm_operands left in the RTL at this point may be assume to meet the
1940 requirements, since record_asm_stack_regs removes any problem asm. */
1942 static void
1943 subst_asm_stack_regs (rtx insn, stack regstack)
1945 rtx body = PATTERN (insn);
1946 int alt;
1948 rtx *note_reg; /* Array of note contents */
1949 rtx **note_loc; /* Address of REG field of each note */
1950 enum reg_note *note_kind; /* The type of each note */
1952 rtx *clobber_reg = 0;
1953 rtx **clobber_loc = 0;
1955 struct stack_def temp_stack;
1956 int n_notes;
1957 int n_clobbers;
1958 rtx note;
1959 int i;
1960 int n_inputs, n_outputs;
1962 if (! check_asm_stack_operands (insn))
1963 return;
1965 /* Find out what the constraints required. If no constraint
1966 alternative matches, that is a compiler bug: we should have caught
1967 such an insn in check_asm_stack_operands. */
1968 extract_insn (insn);
1969 constrain_operands (1);
1970 alt = which_alternative;
1972 preprocess_constraints ();
1974 n_inputs = get_asm_operand_n_inputs (body);
1975 n_outputs = recog_data.n_operands - n_inputs;
1977 gcc_assert (alt >= 0);
1979 /* Strip SUBREGs here to make the following code simpler. */
1980 for (i = 0; i < recog_data.n_operands; i++)
1981 if (GET_CODE (recog_data.operand[i]) == SUBREG
1982 && REG_P (SUBREG_REG (recog_data.operand[i])))
1984 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1985 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1988 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1990 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1991 i++;
1993 note_reg = alloca (i * sizeof (rtx));
1994 note_loc = alloca (i * sizeof (rtx *));
1995 note_kind = alloca (i * sizeof (enum reg_note));
1997 n_notes = 0;
1998 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2000 rtx reg = XEXP (note, 0);
2001 rtx *loc = & XEXP (note, 0);
2003 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2005 loc = & SUBREG_REG (reg);
2006 reg = SUBREG_REG (reg);
2009 if (STACK_REG_P (reg)
2010 && (REG_NOTE_KIND (note) == REG_DEAD
2011 || REG_NOTE_KIND (note) == REG_UNUSED))
2013 note_reg[n_notes] = reg;
2014 note_loc[n_notes] = loc;
2015 note_kind[n_notes] = REG_NOTE_KIND (note);
2016 n_notes++;
2020 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2022 n_clobbers = 0;
2024 if (GET_CODE (body) == PARALLEL)
2026 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2027 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2029 for (i = 0; i < XVECLEN (body, 0); i++)
2030 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2032 rtx clobber = XVECEXP (body, 0, i);
2033 rtx reg = XEXP (clobber, 0);
2034 rtx *loc = & XEXP (clobber, 0);
2036 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2038 loc = & SUBREG_REG (reg);
2039 reg = SUBREG_REG (reg);
2042 if (STACK_REG_P (reg))
2044 clobber_reg[n_clobbers] = reg;
2045 clobber_loc[n_clobbers] = loc;
2046 n_clobbers++;
2051 temp_stack = *regstack;
2053 /* Put the input regs into the desired place in TEMP_STACK. */
2055 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2056 if (STACK_REG_P (recog_data.operand[i])
2057 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2058 FLOAT_REGS)
2059 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2061 /* If an operand needs to be in a particular reg in
2062 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2063 these constraints are for single register classes, and
2064 reload guaranteed that operand[i] is already in that class,
2065 we can just use REGNO (recog_data.operand[i]) to know which
2066 actual reg this operand needs to be in. */
2068 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2070 gcc_assert (regno >= 0);
2072 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2074 /* recog_data.operand[i] is not in the right place. Find
2075 it and swap it with whatever is already in I's place.
2076 K is where recog_data.operand[i] is now. J is where it
2077 should be. */
2078 int j, k, temp;
2080 k = temp_stack.top - (regno - FIRST_STACK_REG);
2081 j = (temp_stack.top
2082 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2084 temp = temp_stack.reg[k];
2085 temp_stack.reg[k] = temp_stack.reg[j];
2086 temp_stack.reg[j] = temp;
2090 /* Emit insns before INSN to make sure the reg-stack is in the right
2091 order. */
2093 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2095 /* Make the needed input register substitutions. Do death notes and
2096 clobbers too, because these are for inputs, not outputs. */
2098 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2099 if (STACK_REG_P (recog_data.operand[i]))
2101 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2103 gcc_assert (regnum >= 0);
2105 replace_reg (recog_data.operand_loc[i], regnum);
2108 for (i = 0; i < n_notes; i++)
2109 if (note_kind[i] == REG_DEAD)
2111 int regnum = get_hard_regnum (regstack, note_reg[i]);
2113 gcc_assert (regnum >= 0);
2115 replace_reg (note_loc[i], regnum);
2118 for (i = 0; i < n_clobbers; i++)
2120 /* It's OK for a CLOBBER to reference a reg that is not live.
2121 Don't try to replace it in that case. */
2122 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2124 if (regnum >= 0)
2126 /* Sigh - clobbers always have QImode. But replace_reg knows
2127 that these regs can't be MODE_INT and will assert. Just put
2128 the right reg there without calling replace_reg. */
2130 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2134 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2136 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2137 if (STACK_REG_P (recog_data.operand[i]))
2139 /* An input reg is implicitly popped if it is tied to an
2140 output, or if there is a CLOBBER for it. */
2141 int j;
2143 for (j = 0; j < n_clobbers; j++)
2144 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2145 break;
2147 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2149 /* recog_data.operand[i] might not be at the top of stack.
2150 But that's OK, because all we need to do is pop the
2151 right number of regs off of the top of the reg-stack.
2152 record_asm_stack_regs guaranteed that all implicitly
2153 popped regs were grouped at the top of the reg-stack. */
2155 CLEAR_HARD_REG_BIT (regstack->reg_set,
2156 regstack->reg[regstack->top]);
2157 regstack->top--;
2161 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2162 Note that there isn't any need to substitute register numbers.
2163 ??? Explain why this is true. */
2165 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2167 /* See if there is an output for this hard reg. */
2168 int j;
2170 for (j = 0; j < n_outputs; j++)
2171 if (STACK_REG_P (recog_data.operand[j])
2172 && REGNO (recog_data.operand[j]) == (unsigned) i)
2174 regstack->reg[++regstack->top] = i;
2175 SET_HARD_REG_BIT (regstack->reg_set, i);
2176 break;
2180 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2181 input that the asm didn't implicitly pop. If the asm didn't
2182 implicitly pop an input reg, that reg will still be live.
2184 Note that we can't use find_regno_note here: the register numbers
2185 in the death notes have already been substituted. */
2187 for (i = 0; i < n_outputs; i++)
2188 if (STACK_REG_P (recog_data.operand[i]))
2190 int j;
2192 for (j = 0; j < n_notes; j++)
2193 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2194 && note_kind[j] == REG_UNUSED)
2196 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2197 EMIT_AFTER);
2198 break;
2202 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2203 if (STACK_REG_P (recog_data.operand[i]))
2205 int j;
2207 for (j = 0; j < n_notes; j++)
2208 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2209 && note_kind[j] == REG_DEAD
2210 && TEST_HARD_REG_BIT (regstack->reg_set,
2211 REGNO (recog_data.operand[i])))
2213 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2214 EMIT_AFTER);
2215 break;
2220 /* Substitute stack hard reg numbers for stack virtual registers in
2221 INSN. Non-stack register numbers are not changed. REGSTACK is the
2222 current stack content. Insns may be emitted as needed to arrange the
2223 stack for the 387 based on the contents of the insn. Return whether
2224 a control flow insn was deleted in the process. */
2226 static bool
2227 subst_stack_regs (rtx insn, stack regstack)
2229 rtx *note_link, note;
2230 bool control_flow_insn_deleted = false;
2231 int i;
2233 if (CALL_P (insn))
2235 int top = regstack->top;
2237 /* If there are any floating point parameters to be passed in
2238 registers for this call, make sure they are in the right
2239 order. */
2241 if (top >= 0)
2243 straighten_stack (insn, regstack);
2245 /* Now mark the arguments as dead after the call. */
2247 while (regstack->top >= 0)
2249 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2250 regstack->top--;
2255 /* Do the actual substitution if any stack regs are mentioned.
2256 Since we only record whether entire insn mentions stack regs, and
2257 subst_stack_regs_pat only works for patterns that contain stack regs,
2258 we must check each pattern in a parallel here. A call_value_pop could
2259 fail otherwise. */
2261 if (stack_regs_mentioned (insn))
2263 int n_operands = asm_noperands (PATTERN (insn));
2264 if (n_operands >= 0)
2266 /* This insn is an `asm' with operands. Decode the operands,
2267 decide how many are inputs, and do register substitution.
2268 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2270 subst_asm_stack_regs (insn, regstack);
2271 return control_flow_insn_deleted;
2274 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2275 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2277 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2279 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2280 XVECEXP (PATTERN (insn), 0, i)
2281 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2282 control_flow_insn_deleted
2283 |= subst_stack_regs_pat (insn, regstack,
2284 XVECEXP (PATTERN (insn), 0, i));
2287 else
2288 control_flow_insn_deleted
2289 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2292 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2293 REG_UNUSED will already have been dealt with, so just return. */
2295 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2296 return control_flow_insn_deleted;
2298 /* If this a noreturn call, we can't insert pop insns after it.
2299 Instead, reset the stack state to empty. */
2300 if (CALL_P (insn)
2301 && find_reg_note (insn, REG_NORETURN, NULL))
2303 regstack->top = -1;
2304 CLEAR_HARD_REG_SET (regstack->reg_set);
2305 return control_flow_insn_deleted;
2308 /* If there is a REG_UNUSED note on a stack register on this insn,
2309 the indicated reg must be popped. The REG_UNUSED note is removed,
2310 since the form of the newly emitted pop insn references the reg,
2311 making it no longer `unset'. */
2313 note_link = &REG_NOTES (insn);
2314 for (note = *note_link; note; note = XEXP (note, 1))
2315 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2317 *note_link = XEXP (note, 1);
2318 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2320 else
2321 note_link = &XEXP (note, 1);
2323 return control_flow_insn_deleted;
2326 /* Change the organization of the stack so that it fits a new basic
2327 block. Some registers might have to be popped, but there can never be
2328 a register live in the new block that is not now live.
2330 Insert any needed insns before or after INSN, as indicated by
2331 WHERE. OLD is the original stack layout, and NEW is the desired
2332 form. OLD is updated to reflect the code emitted, i.e., it will be
2333 the same as NEW upon return.
2335 This function will not preserve block_end[]. But that information
2336 is no longer needed once this has executed. */
2338 static void
2339 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2341 int reg;
2342 int update_end = 0;
2344 /* Stack adjustments for the first insn in a block update the
2345 current_block's stack_in instead of inserting insns directly.
2346 compensate_edges will add the necessary code later. */
2347 if (current_block
2348 && starting_stack_p
2349 && where == EMIT_BEFORE)
2351 BLOCK_INFO (current_block)->stack_in = *new;
2352 starting_stack_p = false;
2353 *old = *new;
2354 return;
2357 /* We will be inserting new insns "backwards". If we are to insert
2358 after INSN, find the next insn, and insert before it. */
2360 if (where == EMIT_AFTER)
2362 if (current_block && BB_END (current_block) == insn)
2363 update_end = 1;
2364 insn = NEXT_INSN (insn);
2367 /* Pop any registers that are not needed in the new block. */
2369 /* If the destination block's stack already has a specified layout
2370 and contains two or more registers, use a more intelligent algorithm
2371 to pop registers that minimizes the number number of fxchs below. */
2372 if (new->top > 0)
2374 bool slots[REG_STACK_SIZE];
2375 int pops[REG_STACK_SIZE];
2376 int next, dest, topsrc;
2378 /* First pass to determine the free slots. */
2379 for (reg = 0; reg <= new->top; reg++)
2380 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2382 /* Second pass to allocate preferred slots. */
2383 topsrc = -1;
2384 for (reg = old->top; reg > new->top; reg--)
2385 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2387 dest = -1;
2388 for (next = 0; next <= new->top; next++)
2389 if (!slots[next] && new->reg[next] == old->reg[reg])
2391 /* If this is a preference for the new top of stack, record
2392 the fact by remembering it's old->reg in topsrc. */
2393 if (next == new->top)
2394 topsrc = reg;
2395 slots[next] = true;
2396 dest = next;
2397 break;
2399 pops[reg] = dest;
2401 else
2402 pops[reg] = reg;
2404 /* Intentionally, avoid placing the top of stack in it's correct
2405 location, if we still need to permute the stack below and we
2406 can usefully place it somewhere else. This is the case if any
2407 slot is still unallocated, in which case we should place the
2408 top of stack there. */
2409 if (topsrc != -1)
2410 for (reg = 0; reg < new->top; reg++)
2411 if (!slots[reg])
2413 pops[topsrc] = reg;
2414 slots[new->top] = false;
2415 slots[reg] = true;
2416 break;
2419 /* Third pass allocates remaining slots and emits pop insns. */
2420 next = new->top;
2421 for (reg = old->top; reg > new->top; reg--)
2423 dest = pops[reg];
2424 if (dest == -1)
2426 /* Find next free slot. */
2427 while (slots[next])
2428 next--;
2429 dest = next--;
2431 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2432 EMIT_BEFORE);
2435 else
2437 /* The following loop attempts to maximize the number of times we
2438 pop the top of the stack, as this permits the use of the faster
2439 ffreep instruction on platforms that support it. */
2440 int live, next;
2442 live = 0;
2443 for (reg = 0; reg <= old->top; reg++)
2444 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2445 live++;
2447 next = live;
2448 while (old->top >= live)
2449 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2451 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next]))
2452 next--;
2453 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2454 EMIT_BEFORE);
2456 else
2457 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2458 EMIT_BEFORE);
2461 if (new->top == -2)
2463 /* If the new block has never been processed, then it can inherit
2464 the old stack order. */
2466 new->top = old->top;
2467 memcpy (new->reg, old->reg, sizeof (new->reg));
2469 else
2471 /* This block has been entered before, and we must match the
2472 previously selected stack order. */
2474 /* By now, the only difference should be the order of the stack,
2475 not their depth or liveliness. */
2477 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2478 gcc_unreachable ();
2479 win:
2480 gcc_assert (old->top == new->top);
2482 /* If the stack is not empty (new->top != -1), loop here emitting
2483 swaps until the stack is correct.
2485 The worst case number of swaps emitted is N + 2, where N is the
2486 depth of the stack. In some cases, the reg at the top of
2487 stack may be correct, but swapped anyway in order to fix
2488 other regs. But since we never swap any other reg away from
2489 its correct slot, this algorithm will converge. */
2491 if (new->top != -1)
2494 /* Swap the reg at top of stack into the position it is
2495 supposed to be in, until the correct top of stack appears. */
2497 while (old->reg[old->top] != new->reg[new->top])
2499 for (reg = new->top; reg >= 0; reg--)
2500 if (new->reg[reg] == old->reg[old->top])
2501 break;
2503 gcc_assert (reg != -1);
2505 emit_swap_insn (insn, old,
2506 FP_MODE_REG (old->reg[reg], DFmode));
2509 /* See if any regs remain incorrect. If so, bring an
2510 incorrect reg to the top of stack, and let the while loop
2511 above fix it. */
2513 for (reg = new->top; reg >= 0; reg--)
2514 if (new->reg[reg] != old->reg[reg])
2516 emit_swap_insn (insn, old,
2517 FP_MODE_REG (old->reg[reg], DFmode));
2518 break;
2520 } while (reg >= 0);
2522 /* At this point there must be no differences. */
2524 for (reg = old->top; reg >= 0; reg--)
2525 gcc_assert (old->reg[reg] == new->reg[reg]);
2528 if (update_end)
2529 BB_END (current_block) = PREV_INSN (insn);
2532 /* Print stack configuration. */
2534 static void
2535 print_stack (FILE *file, stack s)
2537 if (! file)
2538 return;
2540 if (s->top == -2)
2541 fprintf (file, "uninitialized\n");
2542 else if (s->top == -1)
2543 fprintf (file, "empty\n");
2544 else
2546 int i;
2547 fputs ("[ ", file);
2548 for (i = 0; i <= s->top; ++i)
2549 fprintf (file, "%d ", s->reg[i]);
2550 fputs ("]\n", file);
2554 /* This function was doing life analysis. We now let the regular live
2555 code do it's job, so we only need to check some extra invariants
2556 that reg-stack expects. Primary among these being that all registers
2557 are initialized before use.
2559 The function returns true when code was emitted to CFG edges and
2560 commit_edge_insertions needs to be called. */
2562 static int
2563 convert_regs_entry (void)
2565 int inserted = 0;
2566 edge e;
2567 edge_iterator ei;
2569 /* Load something into each stack register live at function entry.
2570 Such live registers can be caused by uninitialized variables or
2571 functions not returning values on all paths. In order to keep
2572 the push/pop code happy, and to not scrog the register stack, we
2573 must put something in these registers. Use a QNaN.
2575 Note that we are inserting converted code here. This code is
2576 never seen by the convert_regs pass. */
2578 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2580 basic_block block = e->dest;
2581 block_info bi = BLOCK_INFO (block);
2582 int reg, top = -1;
2584 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2585 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2587 rtx init;
2589 bi->stack_in.reg[++top] = reg;
2591 init = gen_rtx_SET (VOIDmode,
2592 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2593 not_a_num);
2594 insert_insn_on_edge (init, e);
2595 inserted = 1;
2598 bi->stack_in.top = top;
2601 return inserted;
2604 /* Construct the desired stack for function exit. This will either
2605 be `empty', or the function return value at top-of-stack. */
2607 static void
2608 convert_regs_exit (void)
2610 int value_reg_low, value_reg_high;
2611 stack output_stack;
2612 rtx retvalue;
2614 retvalue = stack_result (current_function_decl);
2615 value_reg_low = value_reg_high = -1;
2616 if (retvalue)
2618 value_reg_low = REGNO (retvalue);
2619 value_reg_high = value_reg_low
2620 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2623 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2624 if (value_reg_low == -1)
2625 output_stack->top = -1;
2626 else
2628 int reg;
2630 output_stack->top = value_reg_high - value_reg_low;
2631 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2633 output_stack->reg[value_reg_high - reg] = reg;
2634 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2639 /* Copy the stack info from the end of edge E's source block to the
2640 start of E's destination block. */
2642 static void
2643 propagate_stack (edge e)
2645 stack src_stack = &BLOCK_INFO (e->src)->stack_out;
2646 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2647 int reg;
2649 /* Preserve the order of the original stack, but check whether
2650 any pops are needed. */
2651 dest_stack->top = -1;
2652 for (reg = 0; reg <= src_stack->top; ++reg)
2653 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2654 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2658 /* Adjust the stack of edge E's source block on exit to match the stack
2659 of it's target block upon input. The stack layouts of both blocks
2660 should have been defined by now. */
2662 static bool
2663 compensate_edge (edge e)
2665 basic_block source = e->src, target = e->dest;
2666 stack target_stack = &BLOCK_INFO (target)->stack_in;
2667 stack source_stack = &BLOCK_INFO (source)->stack_out;
2668 struct stack_def regstack;
2669 int reg;
2671 if (dump_file)
2672 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2674 gcc_assert (target_stack->top != -2);
2676 /* Check whether stacks are identical. */
2677 if (target_stack->top == source_stack->top)
2679 for (reg = target_stack->top; reg >= 0; --reg)
2680 if (target_stack->reg[reg] != source_stack->reg[reg])
2681 break;
2683 if (reg == -1)
2685 if (dump_file)
2686 fprintf (dump_file, "no changes needed\n");
2687 return false;
2691 if (dump_file)
2693 fprintf (dump_file, "correcting stack to ");
2694 print_stack (dump_file, target_stack);
2697 /* Abnormal calls may appear to have values live in st(0), but the
2698 abnormal return path will not have actually loaded the values. */
2699 if (e->flags & EDGE_ABNORMAL_CALL)
2701 /* Assert that the lifetimes are as we expect -- one value
2702 live at st(0) on the end of the source block, and no
2703 values live at the beginning of the destination block.
2704 For complex return values, we may have st(1) live as well. */
2705 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2706 gcc_assert (target_stack->top == -1);
2707 return false;
2710 /* Handle non-call EH edges specially. The normal return path have
2711 values in registers. These will be popped en masse by the unwind
2712 library. */
2713 if (e->flags & EDGE_EH)
2715 gcc_assert (target_stack->top == -1);
2716 return false;
2719 /* We don't support abnormal edges. Global takes care to
2720 avoid any live register across them, so we should never
2721 have to insert instructions on such edges. */
2722 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2724 /* Make a copy of source_stack as change_stack is destructive. */
2725 regstack = *source_stack;
2727 /* It is better to output directly to the end of the block
2728 instead of to the edge, because emit_swap can do minimal
2729 insn scheduling. We can do this when there is only one
2730 edge out, and it is not abnormal. */
2731 if (EDGE_COUNT (source->succs) == 1)
2733 current_block = source;
2734 change_stack (BB_END (source), &regstack, target_stack,
2735 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2737 else
2739 rtx seq, after;
2741 current_block = NULL;
2742 start_sequence ();
2744 /* ??? change_stack needs some point to emit insns after. */
2745 after = emit_note (NOTE_INSN_DELETED);
2747 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2749 seq = get_insns ();
2750 end_sequence ();
2752 insert_insn_on_edge (seq, e);
2753 return true;
2755 return false;
2758 /* Traverse all non-entry edges in the CFG, and emit the necessary
2759 edge compensation code to change the stack from stack_out of the
2760 source block to the stack_in of the destination block. */
2762 static bool
2763 compensate_edges (void)
2765 bool inserted = false;
2766 basic_block bb;
2768 starting_stack_p = false;
2770 FOR_EACH_BB (bb)
2771 if (bb != ENTRY_BLOCK_PTR)
2773 edge e;
2774 edge_iterator ei;
2776 FOR_EACH_EDGE (e, ei, bb->succs)
2777 inserted |= compensate_edge (e);
2779 return inserted;
2782 /* Select the better of two edges E1 and E2 to use to determine the
2783 stack layout for their shared destination basic block. This is
2784 typically the more frequently executed. The edge E1 may be NULL
2785 (in which case E2 is returned), but E2 is always non-NULL. */
2787 static edge
2788 better_edge (edge e1, edge e2)
2790 if (!e1)
2791 return e2;
2793 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2794 return e1;
2795 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2796 return e2;
2798 if (e1->count > e2->count)
2799 return e1;
2800 if (e1->count < e2->count)
2801 return e2;
2803 /* Prefer critical edges to minimize inserting compensation code on
2804 critical edges. */
2806 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2807 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2809 /* Avoid non-deterministic behavior. */
2810 return (e1->src->index < e2->src->index) ? e1 : e2;
2813 /* Convert stack register references in one block. */
2815 static void
2816 convert_regs_1 (basic_block block)
2818 struct stack_def regstack;
2819 block_info bi = BLOCK_INFO (block);
2820 int reg;
2821 rtx insn, next;
2822 bool control_flow_insn_deleted = false;
2824 any_malformed_asm = false;
2826 /* Choose an initial stack layout, if one hasn't already been chosen. */
2827 if (bi->stack_in.top == -2)
2829 edge e, beste = NULL;
2830 edge_iterator ei;
2832 /* Select the best incoming edge (typically the most frequent) to
2833 use as a template for this basic block. */
2834 FOR_EACH_EDGE (e, ei, block->preds)
2835 if (BLOCK_INFO (e->src)->done)
2836 beste = better_edge (beste, e);
2838 if (beste)
2839 propagate_stack (beste);
2840 else
2842 /* No predecessors. Create an arbitrary input stack. */
2843 bi->stack_in.top = -1;
2844 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2845 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2846 bi->stack_in.reg[++bi->stack_in.top] = reg;
2850 if (dump_file)
2852 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2853 print_stack (dump_file, &bi->stack_in);
2856 /* Process all insns in this block. Keep track of NEXT so that we
2857 don't process insns emitted while substituting in INSN. */
2858 current_block = block;
2859 next = BB_HEAD (block);
2860 regstack = bi->stack_in;
2861 starting_stack_p = true;
2865 insn = next;
2866 next = NEXT_INSN (insn);
2868 /* Ensure we have not missed a block boundary. */
2869 gcc_assert (next);
2870 if (insn == BB_END (block))
2871 next = NULL;
2873 /* Don't bother processing unless there is a stack reg
2874 mentioned or if it's a CALL_INSN. */
2875 if (stack_regs_mentioned (insn)
2876 || CALL_P (insn))
2878 if (dump_file)
2880 fprintf (dump_file, " insn %d input stack: ",
2881 INSN_UID (insn));
2882 print_stack (dump_file, &regstack);
2884 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2885 starting_stack_p = false;
2888 while (next);
2890 if (dump_file)
2892 fprintf (dump_file, "Expected live registers [");
2893 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2894 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2895 fprintf (dump_file, " %d", reg);
2896 fprintf (dump_file, " ]\nOutput stack: ");
2897 print_stack (dump_file, &regstack);
2900 insn = BB_END (block);
2901 if (JUMP_P (insn))
2902 insn = PREV_INSN (insn);
2904 /* If the function is declared to return a value, but it returns one
2905 in only some cases, some registers might come live here. Emit
2906 necessary moves for them. */
2908 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2910 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2911 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2913 rtx set;
2915 if (dump_file)
2916 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
2918 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2919 insn = emit_insn_after (set, insn);
2920 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2924 /* Amongst the insns possibly deleted during the substitution process above,
2925 might have been the only trapping insn in the block. We purge the now
2926 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2927 called at the end of convert_regs. The order in which we process the
2928 blocks ensures that we never delete an already processed edge.
2930 Note that, at this point, the CFG may have been damaged by the emission
2931 of instructions after an abnormal call, which moves the basic block end
2932 (and is the reason why we call fixup_abnormal_edges later). So we must
2933 be sure that the trapping insn has been deleted before trying to purge
2934 dead edges, otherwise we risk purging valid edges.
2936 ??? We are normally supposed not to delete trapping insns, so we pretend
2937 that the insns deleted above don't actually trap. It would have been
2938 better to detect this earlier and avoid creating the EH edge in the first
2939 place, still, but we don't have enough information at that time. */
2941 if (control_flow_insn_deleted)
2942 purge_dead_edges (block);
2944 /* Something failed if the stack lives don't match. If we had malformed
2945 asms, we zapped the instruction itself, but that didn't produce the
2946 same pattern of register kills as before. */
2947 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2948 gcc_assert (any_malformed_asm);
2949 win:
2950 bi->stack_out = regstack;
2951 bi->done = true;
2954 /* Convert registers in all blocks reachable from BLOCK. */
2956 static void
2957 convert_regs_2 (basic_block block)
2959 basic_block *stack, *sp;
2961 /* We process the blocks in a top-down manner, in a way such that one block
2962 is only processed after all its predecessors. The number of predecessors
2963 of every block has already been computed. */
2965 stack = XNEWVEC (basic_block, n_basic_blocks);
2966 sp = stack;
2968 *sp++ = block;
2972 edge e;
2973 edge_iterator ei;
2975 block = *--sp;
2977 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2978 some dead EH outgoing edge after the deletion of the trapping
2979 insn inside the block. Since the number of predecessors of
2980 BLOCK's successors was computed based on the initial edge set,
2981 we check the necessity to process some of these successors
2982 before such an edge deletion may happen. However, there is
2983 a pitfall: if BLOCK is the only predecessor of a successor and
2984 the edge between them happens to be deleted, the successor
2985 becomes unreachable and should not be processed. The problem
2986 is that there is no way to preventively detect this case so we
2987 stack the successor in all cases and hand over the task of
2988 fixing up the discrepancy to convert_regs_1. */
2990 FOR_EACH_EDGE (e, ei, block->succs)
2991 if (! (e->flags & EDGE_DFS_BACK))
2993 BLOCK_INFO (e->dest)->predecessors--;
2994 if (!BLOCK_INFO (e->dest)->predecessors)
2995 *sp++ = e->dest;
2998 convert_regs_1 (block);
3000 while (sp != stack);
3002 free (stack);
3005 /* Traverse all basic blocks in a function, converting the register
3006 references in each insn from the "flat" register file that gcc uses,
3007 to the stack-like registers the 387 uses. */
3009 static void
3010 convert_regs (void)
3012 int inserted;
3013 basic_block b;
3014 edge e;
3015 edge_iterator ei;
3017 /* Initialize uninitialized registers on function entry. */
3018 inserted = convert_regs_entry ();
3020 /* Construct the desired stack for function exit. */
3021 convert_regs_exit ();
3022 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3024 /* ??? Future: process inner loops first, and give them arbitrary
3025 initial stacks which emit_swap_insn can modify. This ought to
3026 prevent double fxch that often appears at the head of a loop. */
3028 /* Process all blocks reachable from all entry points. */
3029 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3030 convert_regs_2 (e->dest);
3032 /* ??? Process all unreachable blocks. Though there's no excuse
3033 for keeping these even when not optimizing. */
3034 FOR_EACH_BB (b)
3036 block_info bi = BLOCK_INFO (b);
3038 if (! bi->done)
3039 convert_regs_2 (b);
3042 inserted |= compensate_edges ();
3044 clear_aux_for_blocks ();
3046 fixup_abnormal_edges ();
3047 if (inserted)
3048 commit_edge_insertions ();
3050 if (dump_file)
3051 fputc ('\n', dump_file);
3054 /* Convert register usage from "flat" register file usage to a "stack
3055 register file. FILE is the dump file, if used.
3057 Construct a CFG and run life analysis. Then convert each insn one
3058 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3059 code duplication created when the converter inserts pop insns on
3060 the edges. */
3062 static bool
3063 reg_to_stack (void)
3065 basic_block bb;
3066 int i;
3067 int max_uid;
3069 /* Clean up previous run. */
3070 if (stack_regs_mentioned_data != NULL)
3071 VEC_free (char, heap, stack_regs_mentioned_data);
3073 /* See if there is something to do. Flow analysis is quite
3074 expensive so we might save some compilation time. */
3075 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3076 if (regs_ever_live[i])
3077 break;
3078 if (i > LAST_STACK_REG)
3079 return false;
3081 /* Ok, floating point instructions exist. If not optimizing,
3082 build the CFG and run life analysis.
3083 Also need to rebuild life when superblock scheduling is done
3084 as it don't update liveness yet. */
3085 if (!optimize
3086 || ((flag_sched2_use_superblocks || flag_sched2_use_traces)
3087 && flag_schedule_insns_after_reload))
3089 count_or_remove_death_notes (NULL, 1);
3090 life_analysis (PROP_DEATH_NOTES);
3092 mark_dfs_back_edges ();
3094 /* Set up block info for each basic block. */
3095 alloc_aux_for_blocks (sizeof (struct block_info_def));
3096 FOR_EACH_BB (bb)
3098 block_info bi = BLOCK_INFO (bb);
3099 edge_iterator ei;
3100 edge e;
3101 int reg;
3103 FOR_EACH_EDGE (e, ei, bb->preds)
3104 if (!(e->flags & EDGE_DFS_BACK)
3105 && e->src != ENTRY_BLOCK_PTR)
3106 bi->predecessors++;
3108 /* Set current register status at last instruction `uninitialized'. */
3109 bi->stack_in.top = -2;
3111 /* Copy live_at_end and live_at_start into temporaries. */
3112 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3114 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg))
3115 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3116 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg))
3117 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3121 /* Create the replacement registers up front. */
3122 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3124 enum machine_mode mode;
3125 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3126 mode != VOIDmode;
3127 mode = GET_MODE_WIDER_MODE (mode))
3128 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3129 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3130 mode != VOIDmode;
3131 mode = GET_MODE_WIDER_MODE (mode))
3132 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3135 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3137 /* A QNaN for initializing uninitialized variables.
3139 ??? We can't load from constant memory in PIC mode, because
3140 we're inserting these instructions before the prologue and
3141 the PIC register hasn't been set up. In that case, fall back
3142 on zero, which we can get from `ldz'. */
3144 if (flag_pic)
3145 not_a_num = CONST0_RTX (SFmode);
3146 else
3148 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
3149 not_a_num = force_const_mem (SFmode, not_a_num);
3152 /* Allocate a cache for stack_regs_mentioned. */
3153 max_uid = get_max_uid ();
3154 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1);
3155 memset (VEC_address (char, stack_regs_mentioned_data),
3156 0, sizeof (char) * max_uid + 1);
3158 convert_regs ();
3160 free_aux_for_blocks ();
3161 return true;
3163 #endif /* STACK_REGS */
3165 static bool
3166 gate_handle_stack_regs (void)
3168 #ifdef STACK_REGS
3169 return 1;
3170 #else
3171 return 0;
3172 #endif
3175 /* Convert register usage from flat register file usage to a stack
3176 register file. */
3177 static unsigned int
3178 rest_of_handle_stack_regs (void)
3180 #ifdef STACK_REGS
3181 if (reg_to_stack () && optimize)
3183 regstack_completed = 1;
3184 if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK
3185 | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0))
3186 && (flag_reorder_blocks || flag_reorder_blocks_and_partition))
3188 reorder_basic_blocks (0);
3189 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK);
3192 else
3193 regstack_completed = 1;
3194 #endif
3195 return 0;
3198 struct tree_opt_pass pass_stack_regs =
3200 "stack", /* name */
3201 gate_handle_stack_regs, /* gate */
3202 rest_of_handle_stack_regs, /* execute */
3203 NULL, /* sub */
3204 NULL, /* next */
3205 0, /* static_pass_number */
3206 TV_REG_STACK, /* tv_id */
3207 0, /* properties_required */
3208 0, /* properties_provided */
3209 0, /* properties_destroyed */
3210 0, /* todo_flags_start */
3211 TODO_dump_func |
3212 TODO_ggc_collect, /* todo_flags_finish */
3213 'k' /* letter */