1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
71 #ifdef XCOFF_DEBUGGING_INFO
72 #include "xcoffout.h" /* Needed for external data
73 declarations for e.g. AIX 4.x. */
76 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
77 #include "dwarf2out.h"
80 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
81 null default for it to save conditionalization later. */
82 #ifndef CC_STATUS_INIT
83 #define CC_STATUS_INIT
86 /* How to start an assembler comment. */
87 #ifndef ASM_COMMENT_START
88 #define ASM_COMMENT_START ";#"
91 /* Is the given character a logical line separator for the assembler? */
92 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
93 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
96 #ifndef JUMP_TABLES_IN_TEXT_SECTION
97 #define JUMP_TABLES_IN_TEXT_SECTION 0
100 /* Last insn processed by final_scan_insn. */
101 static rtx debug_insn
;
102 rtx current_output_insn
;
104 /* Line number of last NOTE. */
105 static int last_linenum
;
107 /* Highest line number in current block. */
108 static int high_block_linenum
;
110 /* Likewise for function. */
111 static int high_function_linenum
;
113 /* Filename of last NOTE. */
114 static const char *last_filename
;
116 /* Number of basic blocks seen so far;
117 used if profile_block_flag is set. */
118 static int count_basic_blocks
;
120 /* Number of instrumented arcs when profile_arc_flag is set. */
121 extern int count_instrumented_edges
;
123 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
125 /* Nonzero while outputting an `asm' with operands.
126 This means that inconsistencies are the user's fault, so don't abort.
127 The precise value is the insn being output, to pass to error_for_asm. */
128 static rtx this_is_asm_operands
;
130 /* Number of operands of this insn, for an `asm' with operands. */
131 static unsigned int insn_noperands
;
133 /* Compare optimization flag. */
135 static rtx last_ignored_compare
= 0;
137 /* Flag indicating this insn is the start of a new basic block. */
139 static int new_block
= 1;
141 /* Assign a unique number to each insn that is output.
142 This can be used to generate unique local labels. */
144 static int insn_counter
= 0;
147 /* This variable contains machine-dependent flags (defined in tm.h)
148 set and examined by output routines
149 that describe how to interpret the condition codes properly. */
153 /* During output of an insn, this contains a copy of cc_status
154 from before the insn. */
156 CC_STATUS cc_prev_status
;
159 /* Indexed by hardware reg number, is 1 if that register is ever
160 used in the current function.
162 In life_analysis, or in stupid_life_analysis, this is set
163 up to record the hard regs used explicitly. Reload adds
164 in the hard regs used for holding pseudo regs. Final uses
165 it to generate the code in the function prologue and epilogue
166 to save and restore registers as needed. */
168 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
170 /* Nonzero means current function must be given a frame pointer.
171 Set in stmt.c if anything is allocated on the stack there.
172 Set in reload1.c if anything is allocated on the stack there. */
174 int frame_pointer_needed
;
176 /* Assign unique numbers to labels generated for profiling. */
178 int profile_label_no
;
180 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
182 static int block_depth
;
184 /* Nonzero if have enabled APP processing of our assembler output. */
188 /* If we are outputting an insn sequence, this contains the sequence rtx.
193 #ifdef ASSEMBLER_DIALECT
195 /* Number of the assembler dialect to use, starting at 0. */
196 static int dialect_number
;
199 /* Indexed by line number, nonzero if there is a note for that line. */
201 static char *line_note_exists
;
203 #ifdef HAVE_conditional_execution
204 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
205 rtx current_insn_predicate
;
208 /* Linked list to hold line numbers for each basic block. */
212 struct bb_list
*next
; /* pointer to next basic block */
213 int line_num
; /* line number */
214 int file_label_num
; /* LPBC<n> label # for stored filename */
215 int func_label_num
; /* LPBC<n> label # for stored function name */
218 static struct bb_list
*bb_head
= 0; /* Head of basic block list */
219 static struct bb_list
**bb_tail
= &bb_head
; /* Ptr to store next bb ptr */
220 static int bb_file_label_num
= -1; /* Current label # for file */
221 static int bb_func_label_num
= -1; /* Current label # for func */
223 /* Linked list to hold the strings for each file and function name output. */
227 struct bb_str
*next
; /* pointer to next string */
228 const char *string
; /* string */
229 int label_num
; /* label number */
230 int length
; /* string length */
233 static struct bb_str
*sbb_head
= 0; /* Head of string list. */
234 static struct bb_str
**sbb_tail
= &sbb_head
; /* Ptr to store next bb str */
235 static int sbb_label_num
= 0; /* Last label used */
237 #ifdef HAVE_ATTR_length
238 static int asm_insn_count
PARAMS ((rtx
));
240 static void profile_function
PARAMS ((FILE *));
241 static void profile_after_prologue
PARAMS ((FILE *));
242 static void add_bb
PARAMS ((FILE *));
243 static int add_bb_string
PARAMS ((const char *, int));
244 static void notice_source_line
PARAMS ((rtx
));
245 static rtx walk_alter_subreg
PARAMS ((rtx
));
246 static void output_asm_name
PARAMS ((void));
247 static tree get_decl_from_op
PARAMS ((rtx
, int *));
248 static void output_operand
PARAMS ((rtx
, int));
249 #ifdef LEAF_REGISTERS
250 static void leaf_renumber_regs
PARAMS ((rtx
));
253 static int alter_cond
PARAMS ((rtx
));
255 #ifndef ADDR_VEC_ALIGN
256 static int final_addr_vec_align
PARAMS ((rtx
));
258 #ifdef HAVE_ATTR_length
259 static int align_fuzz
PARAMS ((rtx
, rtx
, int, unsigned));
262 /* Initialize data in final at the beginning of a compilation. */
265 init_final (filename
)
266 const char *filename ATTRIBUTE_UNUSED
;
271 #ifdef ASSEMBLER_DIALECT
272 dialect_number
= ASSEMBLER_DIALECT
;
276 /* Called at end of source file,
277 to output the block-profiling table for this entire compilation. */
281 const char *filename
;
285 if (profile_block_flag
|| profile_arc_flag
)
288 int align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
292 int long_bytes
= LONG_TYPE_SIZE
/ BITS_PER_UNIT
;
293 int gcov_type_bytes
= GCOV_TYPE_SIZE
/ BITS_PER_UNIT
;
294 int pointer_bytes
= POINTER_SIZE
/ BITS_PER_UNIT
;
295 unsigned int align2
= LONG_TYPE_SIZE
;
297 if (profile_block_flag
)
298 size
= long_bytes
* count_basic_blocks
;
300 size
= gcov_type_bytes
* count_instrumented_edges
;
303 rounded
+= (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) - 1;
304 rounded
= (rounded
/ (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
305 * (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
));
307 /* ??? This _really_ ought to be done with a structure layout
308 and with assemble_constructor. If long_bytes != pointer_bytes
309 we'll be emitting unaligned data at some point. */
310 if (long_bytes
!= pointer_bytes
)
315 /* Output the main header, of 11 words:
316 0: 1 if this file is initialized, else 0.
317 1: address of file name (LPBX1).
318 2: address of table of counts (LPBX2).
319 3: number of counts in the table.
320 4: always 0, for compatibility with Sun.
322 The following are GNU extensions:
324 5: address of table of start addrs of basic blocks (LPBX3).
325 6: Number of bytes in this header.
326 7: address of table of function names (LPBX4).
327 8: address of table of line numbers (LPBX5) or 0.
328 9: address of table of file names (LPBX6) or 0.
329 10: space reserved for basic block profiling. */
331 ASM_OUTPUT_ALIGN (asm_out_file
, align
);
333 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBX", 0);
336 assemble_integer (const0_rtx
, long_bytes
, align2
, 1);
338 /* Address of filename. */
339 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 1);
340 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
), pointer_bytes
,
343 /* Address of count table. */
344 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
345 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
), pointer_bytes
,
348 /* Count of the # of basic blocks or # of instrumented arcs. */
349 assemble_integer (GEN_INT (profile_block_flag
351 : count_instrumented_edges
),
352 long_bytes
, align2
, 1);
354 /* Zero word (link field). */
355 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
357 /* address of basic block start address table */
358 if (profile_block_flag
)
360 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 3);
361 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
362 pointer_bytes
, align2
, 1);
365 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
367 /* Byte count for extended structure. */
368 assemble_integer (GEN_INT (11 * UNITS_PER_WORD
), long_bytes
, align2
, 1);
370 /* Address of function name table. */
371 if (profile_block_flag
)
373 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 4);
374 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
375 pointer_bytes
, align2
, 1);
378 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
380 /* Address of line number and filename tables if debugging. */
381 if (write_symbols
!= NO_DEBUG
&& profile_block_flag
)
383 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 5);
384 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
385 pointer_bytes
, align2
, 1);
386 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 6);
387 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
388 pointer_bytes
, align2
, 1);
392 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
393 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
396 /* Space for extension ptr (link field). */
397 assemble_integer (const0_rtx
, UNITS_PER_WORD
, align2
, 1);
399 /* Output the file name changing the suffix to .d for
400 Sun tcov compatibility. */
401 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBX", 1);
403 char *cwd
= getpwd ();
404 int len
= strlen (filename
) + strlen (cwd
) + 1;
405 char *data_file
= (char *) alloca (len
+ 4);
407 strcpy (data_file
, cwd
);
408 strcat (data_file
, "/");
409 strcat (data_file
, filename
);
410 strip_off_ending (data_file
, len
);
411 if (profile_block_flag
)
412 strcat (data_file
, ".d");
414 strcat (data_file
, ".da");
415 assemble_string (data_file
, strlen (data_file
) + 1);
418 /* Make space for the table of counts. */
421 /* Realign data section. */
422 ASM_OUTPUT_ALIGN (asm_out_file
, align
);
423 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBX", 2);
425 assemble_zeros (size
);
429 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 2);
430 #ifdef ASM_OUTPUT_SHARED_LOCAL
431 if (flag_shared_data
)
432 ASM_OUTPUT_SHARED_LOCAL (asm_out_file
, name
, size
, rounded
);
435 #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
436 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file
, NULL_TREE
, name
,
437 size
, BIGGEST_ALIGNMENT
);
439 #ifdef ASM_OUTPUT_ALIGNED_LOCAL
440 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file
, name
, size
,
443 ASM_OUTPUT_LOCAL (asm_out_file
, name
, size
, rounded
);
448 /* Output any basic block strings */
449 if (profile_block_flag
)
451 readonly_data_section ();
454 ASM_OUTPUT_ALIGN (asm_out_file
, align
);
455 for (sptr
= sbb_head
; sptr
!= 0; sptr
= sptr
->next
)
457 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBC",
459 assemble_string (sptr
->string
, sptr
->length
);
464 /* Output the table of addresses. */
465 if (profile_block_flag
)
467 /* Realign in new section */
468 ASM_OUTPUT_ALIGN (asm_out_file
, align
);
469 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBX", 3);
470 for (i
= 0; i
< count_basic_blocks
; i
++)
472 ASM_GENERATE_INTERNAL_LABEL (name
, "LPB", i
);
473 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
474 pointer_bytes
, align2
, 1);
478 /* Output the table of function names. */
479 if (profile_block_flag
)
481 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBX", 4);
482 for ((ptr
= bb_head
), (i
= 0); ptr
!= 0; (ptr
= ptr
->next
), i
++)
484 if (ptr
->func_label_num
>= 0)
486 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBC",
487 ptr
->func_label_num
);
488 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
489 pointer_bytes
, align2
, 1);
492 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
495 for (; i
< count_basic_blocks
; i
++)
496 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
499 if (write_symbols
!= NO_DEBUG
&& profile_block_flag
)
501 /* Output the table of line numbers. */
502 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBX", 5);
503 for ((ptr
= bb_head
), (i
= 0); ptr
!= 0; (ptr
= ptr
->next
), i
++)
504 assemble_integer (GEN_INT (ptr
->line_num
), long_bytes
, align2
, 1);
506 for (; i
< count_basic_blocks
; i
++)
507 assemble_integer (const0_rtx
, long_bytes
, align2
, 1);
509 /* Output the table of file names. */
510 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file
, "LPBX", 6);
511 for ((ptr
= bb_head
), (i
= 0); ptr
!= 0; (ptr
= ptr
->next
), i
++)
513 if (ptr
->file_label_num
>= 0)
515 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBC",
516 ptr
->file_label_num
);
517 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
518 pointer_bytes
, align2
, 1);
521 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
524 for (; i
< count_basic_blocks
; i
++)
525 assemble_integer (const0_rtx
, pointer_bytes
, align2
, 1);
528 /* End with the address of the table of addresses,
529 so we can find it easily, as the last word in the file's text. */
530 if (profile_block_flag
)
532 ASM_GENERATE_INTERNAL_LABEL (name
, "LPBX", 3);
533 assemble_integer (gen_rtx_SYMBOL_REF (Pmode
, name
),
534 pointer_bytes
, align2
, 1);
539 /* Default target function prologue and epilogue assembler output.
541 If not overridden for epilogue code, then the function body itself
542 contains return instructions wherever needed. */
544 default_function_pro_epilogue (file
, size
)
545 FILE *file ATTRIBUTE_UNUSED
;
546 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
550 /* Default target hook that outputs nothing to a stream. */
552 no_asm_to_stream (file
)
553 FILE *file ATTRIBUTE_UNUSED
;
557 /* Enable APP processing of subsequent output.
558 Used before the output from an `asm' statement. */
565 fputs (ASM_APP_ON
, asm_out_file
);
570 /* Disable APP processing of subsequent output.
571 Called from varasm.c before most kinds of output. */
578 fputs (ASM_APP_OFF
, asm_out_file
);
583 /* Return the number of slots filled in the current
584 delayed branch sequence (we don't count the insn needing the
585 delay slot). Zero if not in a delayed branch sequence. */
589 dbr_sequence_length ()
591 if (final_sequence
!= 0)
592 return XVECLEN (final_sequence
, 0) - 1;
598 /* The next two pages contain routines used to compute the length of an insn
599 and to shorten branches. */
601 /* Arrays for insn lengths, and addresses. The latter is referenced by
602 `insn_current_length'. */
604 static short *insn_lengths
;
606 #ifdef HAVE_ATTR_length
607 varray_type insn_addresses_
;
610 /* Max uid for which the above arrays are valid. */
611 static int insn_lengths_max_uid
;
613 /* Address of insn being processed. Used by `insn_current_length'. */
614 int insn_current_address
;
616 /* Address of insn being processed in previous iteration. */
617 int insn_last_address
;
619 /* konwn invariant alignment of insn being processed. */
620 int insn_current_align
;
622 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
623 gives the next following alignment insn that increases the known
624 alignment, or NULL_RTX if there is no such insn.
625 For any alignment obtained this way, we can again index uid_align with
626 its uid to obtain the next following align that in turn increases the
627 alignment, till we reach NULL_RTX; the sequence obtained this way
628 for each insn we'll call the alignment chain of this insn in the following
631 struct label_alignment
637 static rtx
*uid_align
;
638 static int *uid_shuid
;
639 static struct label_alignment
*label_align
;
641 /* Indicate that branch shortening hasn't yet been done. */
655 insn_lengths_max_uid
= 0;
657 #ifdef HAVE_ATTR_length
658 INSN_ADDRESSES_FREE ();
667 /* Obtain the current length of an insn. If branch shortening has been done,
668 get its actual length. Otherwise, get its maximum length. */
671 get_attr_length (insn
)
672 rtx insn ATTRIBUTE_UNUSED
;
674 #ifdef HAVE_ATTR_length
679 if (insn_lengths_max_uid
> INSN_UID (insn
))
680 return insn_lengths
[INSN_UID (insn
)];
682 switch (GET_CODE (insn
))
690 length
= insn_default_length (insn
);
694 body
= PATTERN (insn
);
695 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
697 /* Alignment is machine-dependent and should be handled by
701 length
= insn_default_length (insn
);
705 body
= PATTERN (insn
);
706 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
709 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
710 length
= asm_insn_count (body
) * insn_default_length (insn
);
711 else if (GET_CODE (body
) == SEQUENCE
)
712 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
713 length
+= get_attr_length (XVECEXP (body
, 0, i
));
715 length
= insn_default_length (insn
);
722 #ifdef ADJUST_INSN_LENGTH
723 ADJUST_INSN_LENGTH (insn
, length
);
726 #else /* not HAVE_ATTR_length */
728 #endif /* not HAVE_ATTR_length */
731 /* Code to handle alignment inside shorten_branches. */
733 /* Here is an explanation how the algorithm in align_fuzz can give
736 Call a sequence of instructions beginning with alignment point X
737 and continuing until the next alignment point `block X'. When `X'
738 is used in an expression, it means the alignment value of the
741 Call the distance between the start of the first insn of block X, and
742 the end of the last insn of block X `IX', for the `inner size of X'.
743 This is clearly the sum of the instruction lengths.
745 Likewise with the next alignment-delimited block following X, which we
748 Call the distance between the start of the first insn of block X, and
749 the start of the first insn of block Y `OX', for the `outer size of X'.
751 The estimated padding is then OX - IX.
753 OX can be safely estimated as
758 OX = round_up(IX, X) + Y - X
760 Clearly est(IX) >= real(IX), because that only depends on the
761 instruction lengths, and those being overestimated is a given.
763 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
764 we needn't worry about that when thinking about OX.
766 When X >= Y, the alignment provided by Y adds no uncertainty factor
767 for branch ranges starting before X, so we can just round what we have.
768 But when X < Y, we don't know anything about the, so to speak,
769 `middle bits', so we have to assume the worst when aligning up from an
770 address mod X to one mod Y, which is Y - X. */
773 #define LABEL_ALIGN(LABEL) align_labels_log
776 #ifndef LABEL_ALIGN_MAX_SKIP
777 #define LABEL_ALIGN_MAX_SKIP (align_labels-1)
781 #define LOOP_ALIGN(LABEL) align_loops_log
784 #ifndef LOOP_ALIGN_MAX_SKIP
785 #define LOOP_ALIGN_MAX_SKIP (align_loops-1)
788 #ifndef LABEL_ALIGN_AFTER_BARRIER
789 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
792 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
793 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
797 #define JUMP_ALIGN(LABEL) align_jumps_log
800 #ifndef JUMP_ALIGN_MAX_SKIP
801 #define JUMP_ALIGN_MAX_SKIP (align_jumps-1)
804 #ifndef ADDR_VEC_ALIGN
806 final_addr_vec_align (addr_vec
)
809 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
811 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
812 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
813 return exact_log2 (align
);
817 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
820 #ifndef INSN_LENGTH_ALIGNMENT
821 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
824 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
826 static int min_labelno
, max_labelno
;
828 #define LABEL_TO_ALIGNMENT(LABEL) \
829 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
831 #define LABEL_TO_MAX_SKIP(LABEL) \
832 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
834 /* For the benefit of port specific code do this also as a function. */
837 label_to_alignment (label
)
840 return LABEL_TO_ALIGNMENT (label
);
843 #ifdef HAVE_ATTR_length
844 /* The differences in addresses
845 between a branch and its target might grow or shrink depending on
846 the alignment the start insn of the range (the branch for a forward
847 branch or the label for a backward branch) starts out on; if these
848 differences are used naively, they can even oscillate infinitely.
849 We therefore want to compute a 'worst case' address difference that
850 is independent of the alignment the start insn of the range end
851 up on, and that is at least as large as the actual difference.
852 The function align_fuzz calculates the amount we have to add to the
853 naively computed difference, by traversing the part of the alignment
854 chain of the start insn of the range that is in front of the end insn
855 of the range, and considering for each alignment the maximum amount
856 that it might contribute to a size increase.
858 For casesi tables, we also want to know worst case minimum amounts of
859 address difference, in case a machine description wants to introduce
860 some common offset that is added to all offsets in a table.
861 For this purpose, align_fuzz with a growth argument of 0 comuptes the
862 appropriate adjustment. */
864 /* Compute the maximum delta by which the difference of the addresses of
865 START and END might grow / shrink due to a different address for start
866 which changes the size of alignment insns between START and END.
867 KNOWN_ALIGN_LOG is the alignment known for START.
868 GROWTH should be ~0 if the objective is to compute potential code size
869 increase, and 0 if the objective is to compute potential shrink.
870 The return value is undefined for any other value of GROWTH. */
873 align_fuzz (start
, end
, known_align_log
, growth
)
878 int uid
= INSN_UID (start
);
880 int known_align
= 1 << known_align_log
;
881 int end_shuid
= INSN_SHUID (end
);
884 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
886 int align_addr
, new_align
;
888 uid
= INSN_UID (align_label
);
889 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
890 if (uid_shuid
[uid
] > end_shuid
)
892 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
893 new_align
= 1 << known_align_log
;
894 if (new_align
< known_align
)
896 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
897 known_align
= new_align
;
902 /* Compute a worst-case reference address of a branch so that it
903 can be safely used in the presence of aligned labels. Since the
904 size of the branch itself is unknown, the size of the branch is
905 not included in the range. I.e. for a forward branch, the reference
906 address is the end address of the branch as known from the previous
907 branch shortening pass, minus a value to account for possible size
908 increase due to alignment. For a backward branch, it is the start
909 address of the branch as known from the current pass, plus a value
910 to account for possible size increase due to alignment.
911 NB.: Therefore, the maximum offset allowed for backward branches needs
912 to exclude the branch size. */
915 insn_current_reference_address (branch
)
921 if (! INSN_ADDRESSES_SET_P ())
924 seq
= NEXT_INSN (PREV_INSN (branch
));
925 seq_uid
= INSN_UID (seq
);
926 if (GET_CODE (branch
) != JUMP_INSN
)
927 /* This can happen for example on the PA; the objective is to know the
928 offset to address something in front of the start of the function.
929 Thus, we can treat it like a backward branch.
930 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
931 any alignment we'd encounter, so we skip the call to align_fuzz. */
932 return insn_current_address
;
933 dest
= JUMP_LABEL (branch
);
935 /* BRANCH has no proper alignment chain set, so use SEQ.
936 BRANCH also has no INSN_SHUID. */
937 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
939 /* Forward branch. */
940 return (insn_last_address
+ insn_lengths
[seq_uid
]
941 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
945 /* Backward branch. */
946 return (insn_current_address
947 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
950 #endif /* HAVE_ATTR_length */
953 compute_alignments ()
956 int log
, max_skip
, max_log
;
964 max_labelno
= max_label_num ();
965 min_labelno
= get_first_label_num ();
966 label_align
= (struct label_alignment
*)
967 xcalloc (max_labelno
- min_labelno
+ 1, sizeof (struct label_alignment
));
969 /* If not optimizing or optimizing for size, don't assign any alignments. */
970 if (! optimize
|| optimize_size
)
973 for (i
= 0; i
< n_basic_blocks
; i
++)
975 basic_block bb
= BASIC_BLOCK (i
);
976 rtx label
= bb
->head
;
977 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
980 if (GET_CODE (label
) != CODE_LABEL
)
982 max_log
= LABEL_ALIGN (label
);
983 max_skip
= LABEL_ALIGN_MAX_SKIP
;
985 for (e
= bb
->pred
; e
; e
= e
->pred_next
)
987 if (e
->flags
& EDGE_FALLTHRU
)
988 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
990 branch_frequency
+= EDGE_FREQUENCY (e
);
993 /* There are two purposes to align block with no fallthru incomming edge:
994 1) to avoid fetch stalls when branch destination is near cache boundary
995 2) to improve cache effciency in case the previous block is not executed
996 (so it does not need to be in the cache).
998 We to catch first case, we align frequently executed blocks.
999 To catch the second, we align blocks that are executed more frequently
1000 than the predecesor and the predecesor is likely to not be executed
1001 when function is called. */
1004 && (branch_frequency
> BB_FREQ_MAX
/ 10
1005 || (bb
->frequency
> BASIC_BLOCK (i
- 1)->frequency
* 10
1006 && (BASIC_BLOCK (i
- 1)->frequency
1007 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
1009 log
= JUMP_ALIGN (label
);
1013 max_skip
= JUMP_ALIGN_MAX_SKIP
;
1016 /* In case block is frequent and reached mostly by non-fallthru edge,
1017 align it. It is most likely an first block of loop. */
1019 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
1020 && branch_frequency
> fallthru_frequency
* 5)
1022 log
= LOOP_ALIGN (label
);
1026 max_skip
= LOOP_ALIGN_MAX_SKIP
;
1029 LABEL_TO_ALIGNMENT (label
) = max_log
;
1030 LABEL_TO_MAX_SKIP (label
) = max_skip
;
1034 /* Make a pass over all insns and compute their actual lengths by shortening
1035 any branches of variable length if possible. */
1037 /* Give a default value for the lowest address in a function. */
1039 #ifndef FIRST_INSN_ADDRESS
1040 #define FIRST_INSN_ADDRESS 0
1043 /* shorten_branches might be called multiple times: for example, the SH
1044 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1045 In order to do this, it needs proper length information, which it obtains
1046 by calling shorten_branches. This cannot be collapsed with
1047 shorten_branches itself into a single pass unless we also want to intergate
1048 reorg.c, since the branch splitting exposes new instructions with delay
1052 shorten_branches (first
)
1053 rtx first ATTRIBUTE_UNUSED
;
1060 #ifdef HAVE_ATTR_length
1061 #define MAX_CODE_ALIGN 16
1063 int something_changed
= 1;
1064 char *varying_length
;
1067 rtx align_tab
[MAX_CODE_ALIGN
];
1071 /* Compute maximum UID and allocate label_align / uid_shuid. */
1072 max_uid
= get_max_uid ();
1074 uid_shuid
= (int *) xmalloc (max_uid
* sizeof *uid_shuid
);
1076 if (max_labelno
!= max_label_num ())
1078 int old
= max_labelno
;
1082 max_labelno
= max_label_num ();
1084 n_labels
= max_labelno
- min_labelno
+ 1;
1085 n_old_labels
= old
- min_labelno
+ 1;
1087 label_align
= (struct label_alignment
*) xrealloc
1088 (label_align
, n_labels
* sizeof (struct label_alignment
));
1090 /* Range of labels grows monotonically in the function. Abort here
1091 means that the initialization of array got lost. */
1092 if (n_old_labels
> n_labels
)
1095 memset (label_align
+ n_old_labels
, 0,
1096 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
1099 /* Initialize label_align and set up uid_shuid to be strictly
1100 monotonically rising with insn order. */
1101 /* We use max_log here to keep track of the maximum alignment we want to
1102 impose on the next CODE_LABEL (or the current one if we are processing
1103 the CODE_LABEL itself). */
1108 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
1112 INSN_SHUID (insn
) = i
++;
1115 /* reorg might make the first insn of a loop being run once only,
1116 and delete the label in front of it. Then we want to apply
1117 the loop alignment to the new label created by reorg, which
1118 is separated by the former loop start insn from the
1119 NOTE_INSN_LOOP_BEG. */
1121 else if (GET_CODE (insn
) == CODE_LABEL
)
1125 /* Merge in alignments computed by compute_alignments. */
1126 log
= LABEL_TO_ALIGNMENT (insn
);
1130 max_skip
= LABEL_TO_MAX_SKIP (insn
);
1133 log
= LABEL_ALIGN (insn
);
1137 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1139 next
= NEXT_INSN (insn
);
1140 /* ADDR_VECs only take room if read-only data goes into the text
1142 if (JUMP_TABLES_IN_TEXT_SECTION
1143 #if !defined(READONLY_DATA_SECTION)
1147 if (next
&& GET_CODE (next
) == JUMP_INSN
)
1149 rtx nextbody
= PATTERN (next
);
1150 if (GET_CODE (nextbody
) == ADDR_VEC
1151 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1153 log
= ADDR_VEC_ALIGN (next
);
1157 max_skip
= LABEL_ALIGN_MAX_SKIP
;
1161 LABEL_TO_ALIGNMENT (insn
) = max_log
;
1162 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
1166 else if (GET_CODE (insn
) == BARRIER
)
1170 for (label
= insn
; label
&& ! INSN_P (label
);
1171 label
= NEXT_INSN (label
))
1172 if (GET_CODE (label
) == CODE_LABEL
)
1174 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
1178 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
1184 #ifdef HAVE_ATTR_length
1186 /* Allocate the rest of the arrays. */
1187 insn_lengths
= (short *) xmalloc (max_uid
* sizeof (short));
1188 insn_lengths_max_uid
= max_uid
;
1189 /* Syntax errors can lead to labels being outside of the main insn stream.
1190 Initialize insn_addresses, so that we get reproducible results. */
1191 INSN_ADDRESSES_ALLOC (max_uid
);
1193 varying_length
= (char *) xcalloc (max_uid
, sizeof (char));
1195 /* Initialize uid_align. We scan instructions
1196 from end to start, and keep in align_tab[n] the last seen insn
1197 that does an alignment of at least n+1, i.e. the successor
1198 in the alignment chain for an insn that does / has a known
1200 uid_align
= (rtx
*) xcalloc (max_uid
, sizeof *uid_align
);
1202 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
1203 align_tab
[i
] = NULL_RTX
;
1204 seq
= get_last_insn ();
1205 for (; seq
; seq
= PREV_INSN (seq
))
1207 int uid
= INSN_UID (seq
);
1209 log
= (GET_CODE (seq
) == CODE_LABEL
? LABEL_TO_ALIGNMENT (seq
) : 0);
1210 uid_align
[uid
] = align_tab
[0];
1213 /* Found an alignment label. */
1214 uid_align
[uid
] = align_tab
[log
];
1215 for (i
= log
- 1; i
>= 0; i
--)
1219 #ifdef CASE_VECTOR_SHORTEN_MODE
1222 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1225 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
1226 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
1229 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
1231 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
1232 int len
, i
, min
, max
, insn_shuid
;
1234 addr_diff_vec_flags flags
;
1236 if (GET_CODE (insn
) != JUMP_INSN
1237 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1239 pat
= PATTERN (insn
);
1240 len
= XVECLEN (pat
, 1);
1243 min_align
= MAX_CODE_ALIGN
;
1244 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1246 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1247 int shuid
= INSN_SHUID (lab
);
1258 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1259 min_align
= LABEL_TO_ALIGNMENT (lab
);
1261 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
1262 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
1263 insn_shuid
= INSN_SHUID (insn
);
1264 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1265 flags
.min_align
= min_align
;
1266 flags
.base_after_vec
= rel
> insn_shuid
;
1267 flags
.min_after_vec
= min
> insn_shuid
;
1268 flags
.max_after_vec
= max
> insn_shuid
;
1269 flags
.min_after_base
= min
> rel
;
1270 flags
.max_after_base
= max
> rel
;
1271 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1274 #endif /* CASE_VECTOR_SHORTEN_MODE */
1276 /* Compute initial lengths, addresses, and varying flags for each insn. */
1277 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1279 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1281 uid
= INSN_UID (insn
);
1283 insn_lengths
[uid
] = 0;
1285 if (GET_CODE (insn
) == CODE_LABEL
)
1287 int log
= LABEL_TO_ALIGNMENT (insn
);
1290 int align
= 1 << log
;
1291 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1292 insn_lengths
[uid
] = new_address
- insn_current_address
;
1296 INSN_ADDRESSES (uid
) = insn_current_address
;
1298 if (GET_CODE (insn
) == NOTE
|| GET_CODE (insn
) == BARRIER
1299 || GET_CODE (insn
) == CODE_LABEL
)
1301 if (INSN_DELETED_P (insn
))
1304 body
= PATTERN (insn
);
1305 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1307 /* This only takes room if read-only data goes into the text
1309 if (JUMP_TABLES_IN_TEXT_SECTION
1310 #if !defined(READONLY_DATA_SECTION)
1314 insn_lengths
[uid
] = (XVECLEN (body
,
1315 GET_CODE (body
) == ADDR_DIFF_VEC
)
1316 * GET_MODE_SIZE (GET_MODE (body
)));
1317 /* Alignment is handled by ADDR_VEC_ALIGN. */
1319 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1320 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1321 else if (GET_CODE (body
) == SEQUENCE
)
1324 int const_delay_slots
;
1326 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1328 const_delay_slots
= 0;
1330 /* Inside a delay slot sequence, we do not do any branch shortening
1331 if the shortening could change the number of delay slots
1333 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1335 rtx inner_insn
= XVECEXP (body
, 0, i
);
1336 int inner_uid
= INSN_UID (inner_insn
);
1339 if (GET_CODE (body
) == ASM_INPUT
1340 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1341 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1342 * insn_default_length (inner_insn
));
1344 inner_length
= insn_default_length (inner_insn
);
1346 insn_lengths
[inner_uid
] = inner_length
;
1347 if (const_delay_slots
)
1349 if ((varying_length
[inner_uid
]
1350 = insn_variable_length_p (inner_insn
)) != 0)
1351 varying_length
[uid
] = 1;
1352 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1353 + insn_lengths
[uid
]);
1356 varying_length
[inner_uid
] = 0;
1357 insn_lengths
[uid
] += inner_length
;
1360 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1362 insn_lengths
[uid
] = insn_default_length (insn
);
1363 varying_length
[uid
] = insn_variable_length_p (insn
);
1366 /* If needed, do any adjustment. */
1367 #ifdef ADJUST_INSN_LENGTH
1368 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1369 if (insn_lengths
[uid
] < 0)
1370 fatal_insn ("Negative insn length", insn
);
1374 /* Now loop over all the insns finding varying length insns. For each,
1375 get the current insn length. If it has changed, reflect the change.
1376 When nothing changes for a full pass, we are done. */
1378 while (something_changed
)
1380 something_changed
= 0;
1381 insn_current_align
= MAX_CODE_ALIGN
- 1;
1382 for (insn_current_address
= FIRST_INSN_ADDRESS
, insn
= first
;
1384 insn
= NEXT_INSN (insn
))
1387 #ifdef ADJUST_INSN_LENGTH
1392 uid
= INSN_UID (insn
);
1394 if (GET_CODE (insn
) == CODE_LABEL
)
1396 int log
= LABEL_TO_ALIGNMENT (insn
);
1397 if (log
> insn_current_align
)
1399 int align
= 1 << log
;
1400 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1401 insn_lengths
[uid
] = new_address
- insn_current_address
;
1402 insn_current_align
= log
;
1403 insn_current_address
= new_address
;
1406 insn_lengths
[uid
] = 0;
1407 INSN_ADDRESSES (uid
) = insn_current_address
;
1411 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1412 if (length_align
< insn_current_align
)
1413 insn_current_align
= length_align
;
1415 insn_last_address
= INSN_ADDRESSES (uid
);
1416 INSN_ADDRESSES (uid
) = insn_current_address
;
1418 #ifdef CASE_VECTOR_SHORTEN_MODE
1419 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
1420 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1422 rtx body
= PATTERN (insn
);
1423 int old_length
= insn_lengths
[uid
];
1424 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1425 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1426 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1427 addr_diff_vec_flags flags
= ADDR_DIFF_VEC_FLAGS (body
);
1428 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1429 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1430 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1434 /* Try to find a known alignment for rel_lab. */
1435 for (prev
= rel_lab
;
1437 && ! insn_lengths
[INSN_UID (prev
)]
1438 && ! (varying_length
[INSN_UID (prev
)] & 1);
1439 prev
= PREV_INSN (prev
))
1440 if (varying_length
[INSN_UID (prev
)] & 2)
1442 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1446 /* See the comment on addr_diff_vec_flags in rtl.h for the
1447 meaning of the flags values. base: REL_LAB vec: INSN */
1448 /* Anything after INSN has still addresses from the last
1449 pass; adjust these so that they reflect our current
1450 estimate for this pass. */
1451 if (flags
.base_after_vec
)
1452 rel_addr
+= insn_current_address
- insn_last_address
;
1453 if (flags
.min_after_vec
)
1454 min_addr
+= insn_current_address
- insn_last_address
;
1455 if (flags
.max_after_vec
)
1456 max_addr
+= insn_current_address
- insn_last_address
;
1457 /* We want to know the worst case, i.e. lowest possible value
1458 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1459 its offset is positive, and we have to be wary of code shrink;
1460 otherwise, it is negative, and we have to be vary of code
1462 if (flags
.min_after_base
)
1464 /* If INSN is between REL_LAB and MIN_LAB, the size
1465 changes we are about to make can change the alignment
1466 within the observed offset, therefore we have to break
1467 it up into two parts that are independent. */
1468 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1470 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1471 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1474 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1478 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1480 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1481 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1484 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1486 /* Likewise, determine the highest lowest possible value
1487 for the offset of MAX_LAB. */
1488 if (flags
.max_after_base
)
1490 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1492 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1493 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1496 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1500 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1502 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1503 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1506 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1508 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1509 max_addr
- rel_addr
,
1511 if (JUMP_TABLES_IN_TEXT_SECTION
1512 #if !defined(READONLY_DATA_SECTION)
1518 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1519 insn_current_address
+= insn_lengths
[uid
];
1520 if (insn_lengths
[uid
] != old_length
)
1521 something_changed
= 1;
1526 #endif /* CASE_VECTOR_SHORTEN_MODE */
1528 if (! (varying_length
[uid
]))
1530 if (GET_CODE (insn
) == INSN
1531 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1535 body
= PATTERN (insn
);
1536 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1538 rtx inner_insn
= XVECEXP (body
, 0, i
);
1539 int inner_uid
= INSN_UID (inner_insn
);
1541 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1543 insn_current_address
+= insn_lengths
[inner_uid
];
1547 insn_current_address
+= insn_lengths
[uid
];
1552 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1556 body
= PATTERN (insn
);
1558 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1560 rtx inner_insn
= XVECEXP (body
, 0, i
);
1561 int inner_uid
= INSN_UID (inner_insn
);
1564 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1566 /* insn_current_length returns 0 for insns with a
1567 non-varying length. */
1568 if (! varying_length
[inner_uid
])
1569 inner_length
= insn_lengths
[inner_uid
];
1571 inner_length
= insn_current_length (inner_insn
);
1573 if (inner_length
!= insn_lengths
[inner_uid
])
1575 insn_lengths
[inner_uid
] = inner_length
;
1576 something_changed
= 1;
1578 insn_current_address
+= insn_lengths
[inner_uid
];
1579 new_length
+= inner_length
;
1584 new_length
= insn_current_length (insn
);
1585 insn_current_address
+= new_length
;
1588 #ifdef ADJUST_INSN_LENGTH
1589 /* If needed, do any adjustment. */
1590 tmp_length
= new_length
;
1591 ADJUST_INSN_LENGTH (insn
, new_length
);
1592 insn_current_address
+= (new_length
- tmp_length
);
1595 if (new_length
!= insn_lengths
[uid
])
1597 insn_lengths
[uid
] = new_length
;
1598 something_changed
= 1;
1601 /* For a non-optimizing compile, do only a single pass. */
1606 free (varying_length
);
1608 #endif /* HAVE_ATTR_length */
1611 #ifdef HAVE_ATTR_length
1612 /* Given the body of an INSN known to be generated by an ASM statement, return
1613 the number of machine instructions likely to be generated for this insn.
1614 This is used to compute its length. */
1617 asm_insn_count (body
)
1620 const char *template;
1623 if (GET_CODE (body
) == ASM_INPUT
)
1624 template = XSTR (body
, 0);
1626 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1628 for (; *template; template++)
1629 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1636 /* Output assembler code for the start of a function,
1637 and initialize some of the variables in this file
1638 for the new function. The label for the function and associated
1639 assembler pseudo-ops have already been output in `assemble_start_function'.
1641 FIRST is the first insn of the rtl for the function being compiled.
1642 FILE is the file to write assembler code to.
1643 OPTIMIZE is nonzero if we should eliminate redundant
1644 test and compare insns. */
1647 final_start_function (first
, file
, optimize
)
1650 int optimize ATTRIBUTE_UNUSED
;
1654 this_is_asm_operands
= 0;
1656 #ifdef NON_SAVING_SETJMP
1657 /* A function that calls setjmp should save and restore all the
1658 call-saved registers on a system where longjmp clobbers them. */
1659 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1663 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1664 if (!call_used_regs
[i
])
1665 regs_ever_live
[i
] = 1;
1669 if (NOTE_LINE_NUMBER (first
) != NOTE_INSN_DELETED
)
1670 notice_source_line (first
);
1671 high_block_linenum
= high_function_linenum
= last_linenum
;
1673 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1675 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1676 if (write_symbols
!= DWARF2_DEBUG
)
1677 dwarf2out_begin_prologue (0, NULL
);
1680 #ifdef LEAF_REG_REMAP
1681 if (current_function_uses_only_leaf_regs
)
1682 leaf_renumber_regs (first
);
1685 /* The Sun386i and perhaps other machines don't work right
1686 if the profiling code comes after the prologue. */
1687 #ifdef PROFILE_BEFORE_PROLOGUE
1689 profile_function (file
);
1690 #endif /* PROFILE_BEFORE_PROLOGUE */
1692 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1693 if (dwarf2out_do_frame ())
1694 dwarf2out_frame_debug (NULL_RTX
);
1697 /* If debugging, assign block numbers to all of the blocks in this
1701 remove_unnecessary_notes ();
1703 number_blocks (current_function_decl
);
1704 /* We never actually put out begin/end notes for the top-level
1705 block in the function. But, conceptually, that block is
1707 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1710 /* First output the function prologue: code to set up the stack frame. */
1711 (*targetm
.asm_out
.function_prologue
) (file
, get_frame_size ());
1713 /* If the machine represents the prologue as RTL, the profiling code must
1714 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1715 #ifdef HAVE_prologue
1716 if (! HAVE_prologue
)
1718 profile_after_prologue (file
);
1722 /* If we are doing basic block profiling, remember a printable version
1723 of the function name. */
1724 if (profile_block_flag
)
1727 add_bb_string ((*decl_printable_name
) (current_function_decl
, 2),
1733 profile_after_prologue (file
)
1734 FILE *file ATTRIBUTE_UNUSED
;
1736 #ifdef FUNCTION_BLOCK_PROFILER
1737 if (profile_block_flag
)
1739 FUNCTION_BLOCK_PROFILER (file
, count_basic_blocks
);
1741 #endif /* FUNCTION_BLOCK_PROFILER */
1743 #ifndef PROFILE_BEFORE_PROLOGUE
1745 profile_function (file
);
1746 #endif /* not PROFILE_BEFORE_PROLOGUE */
1750 profile_function (file
)
1753 #ifndef NO_PROFILE_COUNTERS
1754 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1756 #if defined(ASM_OUTPUT_REG_PUSH)
1757 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1758 int sval
= current_function_returns_struct
;
1760 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1761 int cxt
= current_function_needs_context
;
1763 #endif /* ASM_OUTPUT_REG_PUSH */
1765 #ifndef NO_PROFILE_COUNTERS
1767 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1768 ASM_OUTPUT_INTERNAL_LABEL (file
, "LP", profile_label_no
);
1769 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1772 function_section (current_function_decl
);
1774 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1776 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1778 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1781 ASM_OUTPUT_REG_PUSH (file
, STRUCT_VALUE_REGNUM
);
1786 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1788 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1790 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1793 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1798 FUNCTION_PROFILER (file
, profile_label_no
);
1800 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1802 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1804 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1807 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1812 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1814 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_INCOMING_REGNUM
);
1816 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1819 ASM_OUTPUT_REG_POP (file
, STRUCT_VALUE_REGNUM
);
1825 /* Output assembler code for the end of a function.
1826 For clarity, args are same as those of `final_start_function'
1827 even though not all of them are needed. */
1830 final_end_function ()
1834 (*debug_hooks
->end_function
) (high_function_linenum
);
1836 /* Finally, output the function epilogue:
1837 code to restore the stack frame and return to the caller. */
1838 (*targetm
.asm_out
.function_epilogue
) (asm_out_file
, get_frame_size ());
1840 /* And debug output. */
1841 (*debug_hooks
->end_epilogue
) ();
1843 #if defined (DWARF2_UNWIND_INFO)
1844 if (write_symbols
!= DWARF2_DEBUG
&& dwarf2out_do_frame ())
1845 dwarf2out_end_epilogue ();
1848 bb_func_label_num
= -1; /* not in function, nuke label # */
1851 /* Add a block to the linked list that remembers the current line/file/function
1852 for basic block profiling. Emit the label in front of the basic block and
1853 the instructions that increment the count field. */
1859 struct bb_list
*ptr
=
1860 (struct bb_list
*) permalloc (sizeof (struct bb_list
));
1862 /* Add basic block to linked list. */
1864 ptr
->line_num
= last_linenum
;
1865 ptr
->file_label_num
= bb_file_label_num
;
1866 ptr
->func_label_num
= bb_func_label_num
;
1868 bb_tail
= &ptr
->next
;
1870 /* Enable the table of basic-block use counts
1871 to point at the code it applies to. */
1872 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPB", count_basic_blocks
);
1874 /* Before first insn of this basic block, increment the
1875 count of times it was entered. */
1876 #ifdef BLOCK_PROFILER
1877 BLOCK_PROFILER (file
, count_basic_blocks
);
1884 count_basic_blocks
++;
1887 /* Add a string to be used for basic block profiling. */
1890 add_bb_string (string
, perm_p
)
1895 struct bb_str
*ptr
= 0;
1899 string
= "<unknown>";
1903 /* Allocate a new string if the current string isn't permanent. If
1904 the string is permanent search for the same string in other
1907 len
= strlen (string
) + 1;
1910 char *p
= (char *) permalloc (len
);
1911 memcpy (p
, string
, len
);
1915 for (ptr
= sbb_head
; ptr
!= (struct bb_str
*) 0; ptr
= ptr
->next
)
1916 if (ptr
->string
== string
)
1919 /* Allocate a new string block if we need to. */
1922 ptr
= (struct bb_str
*) permalloc (sizeof (*ptr
));
1925 ptr
->label_num
= sbb_label_num
++;
1926 ptr
->string
= string
;
1928 sbb_tail
= &ptr
->next
;
1931 return ptr
->label_num
;
1934 /* Output assembler code for some insns: all or part of a function.
1935 For description of args, see `final_start_function', above.
1937 PRESCAN is 1 if we are not really outputting,
1938 just scanning as if we were outputting.
1939 Prescanning deletes and rearranges insns just like ordinary output.
1940 PRESCAN is -2 if we are outputting after having prescanned.
1941 In this case, don't try to delete or rearrange insns
1942 because that has already been done.
1943 Prescanning is done only on certain machines. */
1946 final (first
, file
, optimize
, prescan
)
1956 last_ignored_compare
= 0;
1959 /* Make a map indicating which line numbers appear in this function.
1960 When producing SDB debugging info, delete troublesome line number
1961 notes from inlined functions in other files as well as duplicate
1962 line number notes. */
1963 #ifdef SDB_DEBUGGING_INFO
1964 if (write_symbols
== SDB_DEBUG
)
1967 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1968 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1970 if ((RTX_INTEGRATED_P (insn
)
1971 && strcmp (NOTE_SOURCE_FILE (insn
), main_input_filename
) != 0)
1973 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1974 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)))
1976 delete_insn (insn
); /* Use delete_note. */
1980 if (NOTE_LINE_NUMBER (insn
) > max_line
)
1981 max_line
= NOTE_LINE_NUMBER (insn
);
1987 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1988 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > max_line
)
1989 max_line
= NOTE_LINE_NUMBER (insn
);
1992 line_note_exists
= (char *) xcalloc (max_line
+ 1, sizeof (char));
1994 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1996 if (INSN_UID (insn
) > max_uid
) /* find largest UID */
1997 max_uid
= INSN_UID (insn
);
1998 if (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) > 0)
1999 line_note_exists
[NOTE_LINE_NUMBER (insn
)] = 1;
2001 /* If CC tracking across branches is enabled, record the insn which
2002 jumps to each branch only reached from one place. */
2003 if (optimize
&& GET_CODE (insn
) == JUMP_INSN
)
2005 rtx lab
= JUMP_LABEL (insn
);
2006 if (lab
&& LABEL_NUSES (lab
) == 1)
2008 LABEL_REFS (lab
) = insn
;
2018 /* Output the insns. */
2019 for (insn
= NEXT_INSN (first
); insn
;)
2021 #ifdef HAVE_ATTR_length
2022 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
2025 /* Irritatingly, the reg-stack pass is creating new instructions
2026 and because of REG_DEAD note abuse it has to run after
2027 shorten_branches. Fake address of -1 then. */
2028 insn_current_address
= -1;
2030 /* This can be triggered by bugs elsewhere in the compiler if
2031 new insns are created after init_insn_lengths is called. */
2036 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
2037 #endif /* HAVE_ATTR_length */
2039 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0);
2042 /* Do basic-block profiling here
2043 if the last insn was a conditional branch. */
2044 if (profile_block_flag
&& new_block
)
2047 free (line_note_exists
);
2048 line_note_exists
= NULL
;
2052 get_insn_template (code
, insn
)
2056 const void *output
= insn_data
[code
].output
;
2057 switch (insn_data
[code
].output_format
)
2059 case INSN_OUTPUT_FORMAT_SINGLE
:
2060 return (const char *) output
;
2061 case INSN_OUTPUT_FORMAT_MULTI
:
2062 return ((const char *const *) output
)[which_alternative
];
2063 case INSN_OUTPUT_FORMAT_FUNCTION
:
2066 return (*(insn_output_fn
) output
) (recog_data
.operand
, insn
);
2073 /* The final scan for one insn, INSN.
2074 Args are same as in `final', except that INSN
2075 is the insn being scanned.
2076 Value returned is the next insn to be scanned.
2078 NOPEEPHOLES is the flag to disallow peephole processing (currently
2079 used for within delayed branch sequence output). */
2082 final_scan_insn (insn
, file
, optimize
, prescan
, nopeepholes
)
2085 int optimize ATTRIBUTE_UNUSED
;
2087 int nopeepholes ATTRIBUTE_UNUSED
;
2095 /* Ignore deleted insns. These can occur when we split insns (due to a
2096 template of "#") while not optimizing. */
2097 if (INSN_DELETED_P (insn
))
2098 return NEXT_INSN (insn
);
2100 switch (GET_CODE (insn
))
2106 switch (NOTE_LINE_NUMBER (insn
))
2108 case NOTE_INSN_DELETED
:
2109 case NOTE_INSN_LOOP_BEG
:
2110 case NOTE_INSN_LOOP_END
:
2111 case NOTE_INSN_LOOP_CONT
:
2112 case NOTE_INSN_LOOP_VTOP
:
2113 case NOTE_INSN_FUNCTION_END
:
2114 case NOTE_INSN_REPEATED_LINE_NUMBER
:
2115 case NOTE_INSN_RANGE_BEG
:
2116 case NOTE_INSN_RANGE_END
:
2117 case NOTE_INSN_LIVE
:
2118 case NOTE_INSN_EXPECTED_VALUE
:
2121 case NOTE_INSN_BASIC_BLOCK
:
2122 #ifdef IA64_UNWIND_INFO
2123 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2126 fprintf (asm_out_file
, "\t%s basic block %d\n",
2127 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
2130 case NOTE_INSN_EH_REGION_BEG
:
2131 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
2132 NOTE_EH_HANDLER (insn
));
2135 case NOTE_INSN_EH_REGION_END
:
2136 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
2137 NOTE_EH_HANDLER (insn
));
2140 case NOTE_INSN_PROLOGUE_END
:
2141 (*targetm
.asm_out
.function_end_prologue
) (file
);
2142 profile_after_prologue (file
);
2145 case NOTE_INSN_EPILOGUE_BEG
:
2146 (*targetm
.asm_out
.function_begin_epilogue
) (file
);
2149 case NOTE_INSN_FUNCTION_BEG
:
2151 (*debug_hooks
->end_prologue
) (last_linenum
);
2154 case NOTE_INSN_BLOCK_BEG
:
2155 if (debug_info_level
== DINFO_LEVEL_NORMAL
2156 || debug_info_level
== DINFO_LEVEL_VERBOSE
2157 || write_symbols
== DWARF_DEBUG
2158 || write_symbols
== DWARF2_DEBUG
)
2160 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2164 high_block_linenum
= last_linenum
;
2166 /* Output debugging info about the symbol-block beginning. */
2167 (*debug_hooks
->begin_block
) (last_linenum
, n
);
2169 /* Mark this block as output. */
2170 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
2174 case NOTE_INSN_BLOCK_END
:
2175 if (debug_info_level
== DINFO_LEVEL_NORMAL
2176 || debug_info_level
== DINFO_LEVEL_VERBOSE
2177 || write_symbols
== DWARF_DEBUG
2178 || write_symbols
== DWARF2_DEBUG
)
2180 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
2184 /* End of a symbol-block. */
2186 if (block_depth
< 0)
2189 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
2193 case NOTE_INSN_DELETED_LABEL
:
2194 /* Emit the label. We may have deleted the CODE_LABEL because
2195 the label could be proved to be unreachable, though still
2196 referenced (in the form of having its address taken. */
2197 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2204 if (NOTE_LINE_NUMBER (insn
) <= 0)
2207 /* This note is a line-number. */
2212 /* If there is anything real after this note, output it.
2213 If another line note follows, omit this one. */
2214 for (note
= NEXT_INSN (insn
); note
; note
= NEXT_INSN (note
))
2216 if (GET_CODE (note
) != NOTE
&& GET_CODE (note
) != CODE_LABEL
)
2219 /* These types of notes can be significant
2220 so make sure the preceding line number stays. */
2221 else if (GET_CODE (note
) == NOTE
2222 && (NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_BEG
2223 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_BLOCK_END
2224 || NOTE_LINE_NUMBER (note
) == NOTE_INSN_FUNCTION_BEG
))
2226 else if (GET_CODE (note
) == NOTE
&& NOTE_LINE_NUMBER (note
) > 0)
2228 /* Another line note follows; we can delete this note
2229 if no intervening line numbers have notes elsewhere. */
2231 for (num
= NOTE_LINE_NUMBER (insn
) + 1;
2232 num
< NOTE_LINE_NUMBER (note
);
2234 if (line_note_exists
[num
])
2237 if (num
>= NOTE_LINE_NUMBER (note
))
2243 /* Output this line note if it is the first or the last line
2247 notice_source_line (insn
);
2248 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2256 #if defined (DWARF2_UNWIND_INFO)
2257 if (dwarf2out_do_frame ())
2258 dwarf2out_frame_debug (insn
);
2263 /* The target port might emit labels in the output function for
2264 some insn, e.g. sh.c output_branchy_insn. */
2265 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
2267 int align
= LABEL_TO_ALIGNMENT (insn
);
2268 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2269 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
2272 if (align
&& NEXT_INSN (insn
))
2273 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2274 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
2276 ASM_OUTPUT_ALIGN (file
, align
);
2281 /* If this label is reached from only one place, set the condition
2282 codes from the instruction just before the branch. */
2284 /* Disabled because some insns set cc_status in the C output code
2285 and NOTICE_UPDATE_CC alone can set incorrect status. */
2286 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2288 rtx jump
= LABEL_REFS (insn
);
2289 rtx barrier
= prev_nonnote_insn (insn
);
2291 /* If the LABEL_REFS field of this label has been set to point
2292 at a branch, the predecessor of the branch is a regular
2293 insn, and that branch is the only way to reach this label,
2294 set the condition codes based on the branch and its
2296 if (barrier
&& GET_CODE (barrier
) == BARRIER
2297 && jump
&& GET_CODE (jump
) == JUMP_INSN
2298 && (prev
= prev_nonnote_insn (jump
))
2299 && GET_CODE (prev
) == INSN
)
2301 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
2302 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
2310 #ifdef FINAL_PRESCAN_LABEL
2311 FINAL_PRESCAN_INSN (insn
, NULL
, 0);
2314 if (LABEL_NAME (insn
))
2315 (*debug_hooks
->label
) (insn
);
2319 fputs (ASM_APP_OFF
, file
);
2322 if (NEXT_INSN (insn
) != 0
2323 && GET_CODE (NEXT_INSN (insn
)) == JUMP_INSN
)
2325 rtx nextbody
= PATTERN (NEXT_INSN (insn
));
2327 /* If this label is followed by a jump-table,
2328 make sure we put the label in the read-only section. Also
2329 possibly write the label and jump table together. */
2331 if (GET_CODE (nextbody
) == ADDR_VEC
2332 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2334 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2335 /* In this case, the case vector is being moved by the
2336 target, so don't output the label at all. Leave that
2337 to the back end macros. */
2339 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2343 readonly_data_section ();
2345 #ifdef ADDR_VEC_ALIGN
2346 log_align
= ADDR_VEC_ALIGN (NEXT_INSN (insn
));
2348 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2350 ASM_OUTPUT_ALIGN (file
, log_align
);
2353 function_section (current_function_decl
);
2355 #ifdef ASM_OUTPUT_CASE_LABEL
2356 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2359 if (LABEL_ALTERNATE_NAME (insn
))
2360 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2362 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2368 if (LABEL_ALTERNATE_NAME (insn
))
2369 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file
, insn
);
2371 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
2376 rtx body
= PATTERN (insn
);
2377 int insn_code_number
;
2378 const char *template;
2381 /* An INSN, JUMP_INSN or CALL_INSN.
2382 First check for special kinds that recog doesn't recognize. */
2384 if (GET_CODE (body
) == USE
/* These are just declarations */
2385 || GET_CODE (body
) == CLOBBER
)
2389 /* If there is a REG_CC_SETTER note on this insn, it means that
2390 the setting of the condition code was done in the delay slot
2391 of the insn that branched here. So recover the cc status
2392 from the insn that set it. */
2394 note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2397 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2398 cc_prev_status
= cc_status
;
2402 /* Detect insns that are really jump-tables
2403 and output them as such. */
2405 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2407 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2416 fputs (ASM_APP_OFF
, file
);
2420 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2421 if (GET_CODE (body
) == ADDR_VEC
)
2423 #ifdef ASM_OUTPUT_ADDR_VEC
2424 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2431 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2432 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2438 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2439 for (idx
= 0; idx
< vlen
; idx
++)
2441 if (GET_CODE (body
) == ADDR_VEC
)
2443 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2444 ASM_OUTPUT_ADDR_VEC_ELT
2445 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2452 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2453 ASM_OUTPUT_ADDR_DIFF_ELT
2456 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2457 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2463 #ifdef ASM_OUTPUT_CASE_END
2464 ASM_OUTPUT_CASE_END (file
,
2465 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2470 function_section (current_function_decl
);
2475 /* Do basic-block profiling when we reach a new block.
2476 Done here to avoid jump tables. */
2477 if (profile_block_flag
&& new_block
)
2480 if (GET_CODE (body
) == ASM_INPUT
)
2482 const char *string
= XSTR (body
, 0);
2484 /* There's no telling what that did to the condition codes. */
2493 fputs (ASM_APP_ON
, file
);
2496 fprintf (asm_out_file
, "\t%s\n", string
);
2501 /* Detect `asm' construct with operands. */
2502 if (asm_noperands (body
) >= 0)
2504 unsigned int noperands
= asm_noperands (body
);
2505 rtx
*ops
= (rtx
*) alloca (noperands
* sizeof (rtx
));
2508 /* There's no telling what that did to the condition codes. */
2513 /* Get out the operand values. */
2514 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2515 /* Inhibit aborts on what would otherwise be compiler bugs. */
2516 insn_noperands
= noperands
;
2517 this_is_asm_operands
= insn
;
2519 /* Output the insn using them. */
2524 fputs (ASM_APP_ON
, file
);
2527 output_asm_insn (string
, ops
);
2530 this_is_asm_operands
= 0;
2534 if (prescan
<= 0 && app_on
)
2536 fputs (ASM_APP_OFF
, file
);
2540 if (GET_CODE (body
) == SEQUENCE
)
2542 /* A delayed-branch sequence */
2548 final_sequence
= body
;
2550 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2551 force the restoration of a comparison that was previously
2552 thought unnecessary. If that happens, cancel this sequence
2553 and cause that insn to be restored. */
2555 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1);
2556 if (next
!= XVECEXP (body
, 0, 1))
2562 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2564 rtx insn
= XVECEXP (body
, 0, i
);
2565 rtx next
= NEXT_INSN (insn
);
2566 /* We loop in case any instruction in a delay slot gets
2569 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1);
2570 while (insn
!= next
);
2572 #ifdef DBR_OUTPUT_SEQEND
2573 DBR_OUTPUT_SEQEND (file
);
2577 /* If the insn requiring the delay slot was a CALL_INSN, the
2578 insns in the delay slot are actually executed before the
2579 called function. Hence we don't preserve any CC-setting
2580 actions in these insns and the CC must be marked as being
2581 clobbered by the function. */
2582 if (GET_CODE (XVECEXP (body
, 0, 0)) == CALL_INSN
)
2587 /* Following a conditional branch sequence, we have a new basic
2589 if (profile_block_flag
)
2591 rtx insn
= XVECEXP (body
, 0, 0);
2592 rtx body
= PATTERN (insn
);
2594 if ((GET_CODE (insn
) == JUMP_INSN
&& GET_CODE (body
) == SET
2595 && GET_CODE (SET_SRC (body
)) != LABEL_REF
)
2596 || (GET_CODE (insn
) == JUMP_INSN
2597 && GET_CODE (body
) == PARALLEL
2598 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
2599 && GET_CODE (SET_SRC (XVECEXP (body
, 0, 0))) != LABEL_REF
))
2605 /* We have a real machine instruction as rtl. */
2607 body
= PATTERN (insn
);
2610 set
= single_set (insn
);
2612 /* Check for redundant test and compare instructions
2613 (when the condition codes are already set up as desired).
2614 This is done only when optimizing; if not optimizing,
2615 it should be possible for the user to alter a variable
2616 with the debugger in between statements
2617 and the next statement should reexamine the variable
2618 to compute the condition codes. */
2623 rtx set
= single_set (insn
);
2627 && GET_CODE (SET_DEST (set
)) == CC0
2628 && insn
!= last_ignored_compare
)
2630 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2631 SET_SRC (set
) = alter_subreg (SET_SRC (set
));
2632 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2634 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2635 XEXP (SET_SRC (set
), 0)
2636 = alter_subreg (XEXP (SET_SRC (set
), 0));
2637 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2638 XEXP (SET_SRC (set
), 1)
2639 = alter_subreg (XEXP (SET_SRC (set
), 1));
2641 if ((cc_status
.value1
!= 0
2642 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2643 || (cc_status
.value2
!= 0
2644 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2646 /* Don't delete insn if it has an addressing side-effect. */
2647 if (! FIND_REG_INC_NOTE (insn
, 0)
2648 /* or if anything in it is volatile. */
2649 && ! volatile_refs_p (PATTERN (insn
)))
2651 /* We don't really delete the insn; just ignore it. */
2652 last_ignored_compare
= insn
;
2660 /* Following a conditional branch, we have a new basic block.
2661 But if we are inside a sequence, the new block starts after the
2662 last insn of the sequence. */
2663 if (profile_block_flag
&& final_sequence
== 0
2664 && ((GET_CODE (insn
) == JUMP_INSN
&& GET_CODE (body
) == SET
2665 && GET_CODE (SET_SRC (body
)) != LABEL_REF
)
2666 || (GET_CODE (insn
) == JUMP_INSN
&& GET_CODE (body
) == PARALLEL
2667 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
2668 && GET_CODE (SET_SRC (XVECEXP (body
, 0, 0))) != LABEL_REF
)))
2672 /* Don't bother outputting obvious no-ops, even without -O.
2673 This optimization is fast and doesn't interfere with debugging.
2674 Don't do this if the insn is in a delay slot, since this
2675 will cause an improper number of delay insns to be written. */
2676 if (final_sequence
== 0
2678 && GET_CODE (insn
) == INSN
&& GET_CODE (body
) == SET
2679 && GET_CODE (SET_SRC (body
)) == REG
2680 && GET_CODE (SET_DEST (body
)) == REG
2681 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2686 /* If this is a conditional branch, maybe modify it
2687 if the cc's are in a nonstandard state
2688 so that it accomplishes the same thing that it would
2689 do straightforwardly if the cc's were set up normally. */
2691 if (cc_status
.flags
!= 0
2692 && GET_CODE (insn
) == JUMP_INSN
2693 && GET_CODE (body
) == SET
2694 && SET_DEST (body
) == pc_rtx
2695 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2696 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body
), 0))) == '<'
2697 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2698 /* This is done during prescan; it is not done again
2699 in final scan when prescan has been done. */
2702 /* This function may alter the contents of its argument
2703 and clear some of the cc_status.flags bits.
2704 It may also return 1 meaning condition now always true
2705 or -1 meaning condition now always false
2706 or 2 meaning condition nontrivial but altered. */
2707 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2708 /* If condition now has fixed value, replace the IF_THEN_ELSE
2709 with its then-operand or its else-operand. */
2711 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2713 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2715 /* The jump is now either unconditional or a no-op.
2716 If it has become a no-op, don't try to output it.
2717 (It would not be recognized.) */
2718 if (SET_SRC (body
) == pc_rtx
)
2723 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2724 /* Replace (set (pc) (return)) with (return). */
2725 PATTERN (insn
) = body
= SET_SRC (body
);
2727 /* Rerecognize the instruction if it has changed. */
2729 INSN_CODE (insn
) = -1;
2732 /* Make same adjustments to instructions that examine the
2733 condition codes without jumping and instructions that
2734 handle conditional moves (if this machine has either one). */
2736 if (cc_status
.flags
!= 0
2739 rtx cond_rtx
, then_rtx
, else_rtx
;
2741 if (GET_CODE (insn
) != JUMP_INSN
2742 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2744 cond_rtx
= XEXP (SET_SRC (set
), 0);
2745 then_rtx
= XEXP (SET_SRC (set
), 1);
2746 else_rtx
= XEXP (SET_SRC (set
), 2);
2750 cond_rtx
= SET_SRC (set
);
2751 then_rtx
= const_true_rtx
;
2752 else_rtx
= const0_rtx
;
2755 switch (GET_CODE (cond_rtx
))
2769 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2771 result
= alter_cond (cond_rtx
);
2773 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2774 else if (result
== -1)
2775 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2776 else if (result
== 2)
2777 INSN_CODE (insn
) = -1;
2778 if (SET_DEST (set
) == SET_SRC (set
))
2790 #ifdef HAVE_peephole
2791 /* Do machine-specific peephole optimizations if desired. */
2793 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2795 rtx next
= peephole (insn
);
2796 /* When peepholing, if there were notes within the peephole,
2797 emit them before the peephole. */
2798 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2800 rtx prev
= PREV_INSN (insn
);
2802 for (note
= NEXT_INSN (insn
); note
!= next
;
2803 note
= NEXT_INSN (note
))
2804 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
);
2806 /* In case this is prescan, put the notes
2807 in proper position for later rescan. */
2808 note
= NEXT_INSN (insn
);
2809 PREV_INSN (note
) = prev
;
2810 NEXT_INSN (prev
) = note
;
2811 NEXT_INSN (PREV_INSN (next
)) = insn
;
2812 PREV_INSN (insn
) = PREV_INSN (next
);
2813 NEXT_INSN (insn
) = next
;
2814 PREV_INSN (next
) = insn
;
2817 /* PEEPHOLE might have changed this. */
2818 body
= PATTERN (insn
);
2822 /* Try to recognize the instruction.
2823 If successful, verify that the operands satisfy the
2824 constraints for the instruction. Crash if they don't,
2825 since `reload' should have changed them so that they do. */
2827 insn_code_number
= recog_memoized (insn
);
2828 cleanup_subreg_operands (insn
);
2830 /* Dump the insn in the assembly for debugging. */
2831 if (flag_dump_rtl_in_asm
)
2833 print_rtx_head
= ASM_COMMENT_START
;
2834 print_rtl_single (asm_out_file
, insn
);
2835 print_rtx_head
= "";
2838 if (! constrain_operands_cached (1))
2839 fatal_insn_not_found (insn
);
2841 /* Some target machines need to prescan each insn before
2844 #ifdef FINAL_PRESCAN_INSN
2845 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2848 #ifdef HAVE_conditional_execution
2849 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2850 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2852 current_insn_predicate
= NULL_RTX
;
2856 cc_prev_status
= cc_status
;
2858 /* Update `cc_status' for this instruction.
2859 The instruction's output routine may change it further.
2860 If the output routine for a jump insn needs to depend
2861 on the cc status, it should look at cc_prev_status. */
2863 NOTICE_UPDATE_CC (body
, insn
);
2866 current_output_insn
= debug_insn
= insn
;
2868 #if defined (DWARF2_UNWIND_INFO)
2869 if (GET_CODE (insn
) == CALL_INSN
&& dwarf2out_do_frame ())
2870 dwarf2out_frame_debug (insn
);
2873 /* Find the proper template for this insn. */
2874 template = get_insn_template (insn_code_number
, insn
);
2876 /* If the C code returns 0, it means that it is a jump insn
2877 which follows a deleted test insn, and that test insn
2878 needs to be reinserted. */
2883 if (prev_nonnote_insn (insn
) != last_ignored_compare
)
2887 /* We have already processed the notes between the setter and
2888 the user. Make sure we don't process them again, this is
2889 particularly important if one of the notes is a block
2890 scope note or an EH note. */
2892 prev
!= last_ignored_compare
;
2893 prev
= PREV_INSN (prev
))
2895 if (GET_CODE (prev
) == NOTE
)
2896 delete_insn (prev
); /* Use delete_note. */
2902 /* If the template is the string "#", it means that this insn must
2904 if (template[0] == '#' && template[1] == '\0')
2906 rtx
new = try_split (body
, insn
, 0);
2908 /* If we didn't split the insn, go away. */
2909 if (new == insn
&& PATTERN (new) == body
)
2910 fatal_insn ("Could not split insn", insn
);
2912 #ifdef HAVE_ATTR_length
2913 /* This instruction should have been split in shorten_branches,
2914 to ensure that we would have valid length info for the
2926 #ifdef IA64_UNWIND_INFO
2927 IA64_UNWIND_EMIT (asm_out_file
, insn
);
2929 /* Output assembler code from the template. */
2931 output_asm_insn (template, recog_data
.operand
);
2933 #if defined (DWARF2_UNWIND_INFO)
2934 #if defined (HAVE_prologue)
2935 if (GET_CODE (insn
) == INSN
&& dwarf2out_do_frame ())
2936 dwarf2out_frame_debug (insn
);
2938 if (!ACCUMULATE_OUTGOING_ARGS
2939 && GET_CODE (insn
) == INSN
2940 && dwarf2out_do_frame ())
2941 dwarf2out_frame_debug (insn
);
2946 /* It's not at all clear why we did this and doing so interferes
2947 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2950 /* Mark this insn as having been output. */
2951 INSN_DELETED_P (insn
) = 1;
2954 /* Emit information for vtable gc. */
2955 note
= find_reg_note (insn
, REG_VTABLE_REF
, NULL_RTX
);
2957 assemble_vtable_entry (XEXP (XEXP (note
, 0), 0),
2958 INTVAL (XEXP (XEXP (note
, 0), 1)));
2960 current_output_insn
= debug_insn
= 0;
2963 return NEXT_INSN (insn
);
2966 /* Output debugging info to the assembler file FILE
2967 based on the NOTE-insn INSN, assumed to be a line number. */
2970 notice_source_line (insn
)
2973 const char *filename
= NOTE_SOURCE_FILE (insn
);
2975 /* Remember filename for basic block profiling.
2976 Filenames are allocated on the permanent obstack
2977 or are passed in ARGV, so we don't have to save
2980 if (profile_block_flag
&& last_filename
!= filename
)
2981 bb_file_label_num
= add_bb_string (filename
, TRUE
);
2983 last_filename
= filename
;
2984 last_linenum
= NOTE_LINE_NUMBER (insn
);
2985 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2986 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2989 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2990 directly to the desired hard register. */
2993 cleanup_subreg_operands (insn
)
2997 extract_insn_cached (insn
);
2998 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3000 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
)
3001 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand
[i
]);
3002 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
3003 || GET_CODE (recog_data
.operand
[i
]) == MULT
3004 || GET_CODE (recog_data
.operand
[i
]) == MEM
)
3005 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand
[i
]);
3008 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3010 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
3011 *recog_data
.dup_loc
[i
] = alter_subreg (*recog_data
.dup_loc
[i
]);
3012 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
3013 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
3014 || GET_CODE (*recog_data
.dup_loc
[i
]) == MEM
)
3015 *recog_data
.dup_loc
[i
] = walk_alter_subreg (*recog_data
.dup_loc
[i
]);
3019 /* If X is a SUBREG, replace it with a REG or a MEM,
3020 based on the thing it is a subreg of. */
3026 rtx y
= SUBREG_REG (x
);
3028 if (GET_CODE (y
) == SUBREG
)
3029 y
= alter_subreg (y
);
3031 /* If reload is operating, we may be replacing inside this SUBREG.
3032 Check for that and make a new one if so. */
3033 if (reload_in_progress
&& find_replacement (&SUBREG_REG (x
)) != 0)
3036 if (GET_CODE (y
) == REG
)
3038 int regno
= subreg_hard_regno (x
, 1);
3042 ORIGINAL_REGNO (x
) = ORIGINAL_REGNO (y
);
3043 /* This field has a different meaning for REGs and SUBREGs. Make sure
3047 else if (GET_CODE (y
) == MEM
)
3049 HOST_WIDE_INT offset
= SUBREG_BYTE (x
);
3051 /* Catch these instead of generating incorrect code. */
3052 if ((offset
% GET_MODE_SIZE (GET_MODE (x
))) != 0)
3056 MEM_COPY_ATTRIBUTES (x
, y
);
3057 XEXP (x
, 0) = plus_constant (XEXP (y
, 0), offset
);
3063 /* Do alter_subreg on all the SUBREGs contained in X. */
3066 walk_alter_subreg (x
)
3069 switch (GET_CODE (x
))
3073 XEXP (x
, 0) = walk_alter_subreg (XEXP (x
, 0));
3074 XEXP (x
, 1) = walk_alter_subreg (XEXP (x
, 1));
3078 XEXP (x
, 0) = walk_alter_subreg (XEXP (x
, 0));
3082 return alter_subreg (x
);
3093 /* Given BODY, the body of a jump instruction, alter the jump condition
3094 as required by the bits that are set in cc_status.flags.
3095 Not all of the bits there can be handled at this level in all cases.
3097 The value is normally 0.
3098 1 means that the condition has become always true.
3099 -1 means that the condition has become always false.
3100 2 means that COND has been altered. */
3108 if (cc_status
.flags
& CC_REVERSED
)
3111 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
3114 if (cc_status
.flags
& CC_INVERTED
)
3117 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
3120 if (cc_status
.flags
& CC_NOT_POSITIVE
)
3121 switch (GET_CODE (cond
))
3126 /* Jump becomes unconditional. */
3132 /* Jump becomes no-op. */
3136 PUT_CODE (cond
, EQ
);
3141 PUT_CODE (cond
, NE
);
3149 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
3150 switch (GET_CODE (cond
))
3154 /* Jump becomes unconditional. */
3159 /* Jump becomes no-op. */
3164 PUT_CODE (cond
, EQ
);
3170 PUT_CODE (cond
, NE
);
3178 if (cc_status
.flags
& CC_NO_OVERFLOW
)
3179 switch (GET_CODE (cond
))
3182 /* Jump becomes unconditional. */
3186 PUT_CODE (cond
, EQ
);
3191 PUT_CODE (cond
, NE
);
3196 /* Jump becomes no-op. */
3203 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
3204 switch (GET_CODE (cond
))
3210 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
3215 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
3220 if (cc_status
.flags
& CC_NOT_SIGNED
)
3221 /* The flags are valid if signed condition operators are converted
3223 switch (GET_CODE (cond
))
3226 PUT_CODE (cond
, LEU
);
3231 PUT_CODE (cond
, LTU
);
3236 PUT_CODE (cond
, GTU
);
3241 PUT_CODE (cond
, GEU
);
3253 /* Report inconsistency between the assembler template and the operands.
3254 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3257 output_operand_lossage (msgid
)
3260 if (this_is_asm_operands
)
3261 error_for_asm (this_is_asm_operands
, "invalid `asm': %s", _(msgid
));
3263 internal_error ("output_operand: %s", _(msgid
));
3266 /* Output of assembler code from a template, and its subroutines. */
3268 /* Annotate the assembly with a comment describing the pattern and
3269 alternative used. */
3276 int num
= INSN_CODE (debug_insn
);
3277 fprintf (asm_out_file
, "\t%s %d\t%s",
3278 ASM_COMMENT_START
, INSN_UID (debug_insn
),
3279 insn_data
[num
].name
);
3280 if (insn_data
[num
].n_alternatives
> 1)
3281 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3282 #ifdef HAVE_ATTR_length
3283 fprintf (asm_out_file
, "\t[length = %d]",
3284 get_attr_length (debug_insn
));
3286 /* Clear this so only the first assembler insn
3287 of any rtl insn will get the special comment for -dp. */
3292 /* If OP is a REG or MEM and we can find a decl corresponding to it or
3293 its address, return that decl. Set *PADDRESSP to 1 if the decl
3294 corresponds to the address of the object and 0 if to the object. */
3297 get_decl_from_op (op
, paddressp
)
3306 if (GET_CODE (op
) == REG
)
3307 return REGNO_DECL (ORIGINAL_REGNO (op
));
3308 else if (GET_CODE (op
) != MEM
)
3311 if (MEM_DECL (op
) != 0)
3312 return MEM_DECL (op
);
3314 /* Otherwise we have an address, so indicate it and look at the address. */
3318 /* First check if we have a decl for the address, then look at the right side
3319 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3320 But don't allow the address to itself be indirect. */
3321 if ((decl
= get_decl_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3323 else if (GET_CODE (op
) == PLUS
3324 && (decl
= get_decl_from_op (XEXP (op
, 1), &inner_addressp
)))
3327 while (GET_RTX_CLASS (GET_CODE (op
)) == '1'
3328 || GET_RTX_CLASS (GET_CODE (op
)) == '2')
3331 decl
= get_decl_from_op (op
, &inner_addressp
);
3332 return inner_addressp
? 0 : decl
;
3335 /* Output text from TEMPLATE to the assembler output file,
3336 obeying %-directions to substitute operands taken from
3337 the vector OPERANDS.
3339 %N (for N a digit) means print operand N in usual manner.
3340 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3341 and print the label name with no punctuation.
3342 %cN means require operand N to be a constant
3343 and print the constant expression with no punctuation.
3344 %aN means expect operand N to be a memory address
3345 (not a memory reference!) and print a reference
3347 %nN means expect operand N to be a constant
3348 and print a constant expression for minus the value
3349 of the operand, with no other punctuation. */
3352 output_asm_insn (template, operands
)
3353 const char *template;
3358 #ifdef ASSEMBLER_DIALECT
3361 int oporder
[MAX_RECOG_OPERANDS
];
3364 /* An insn may return a null string template
3365 in a case where no assembler code is needed. */
3370 putc ('\t', asm_out_file
);
3372 #ifdef ASM_OUTPUT_OPCODE
3373 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3380 if (flag_print_asm_name
)
3383 putc (c
, asm_out_file
);
3384 #ifdef ASM_OUTPUT_OPCODE
3385 while ((c
= *p
) == '\t')
3387 putc (c
, asm_out_file
);
3390 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3394 #ifdef ASSEMBLER_DIALECT
3400 output_operand_lossage ("nested assembly dialect alternatives");
3404 /* If we want the first dialect, do nothing. Otherwise, skip
3405 DIALECT_NUMBER of strings ending with '|'. */
3406 for (i
= 0; i
< dialect_number
; i
++)
3408 while (*p
&& *p
!= '}' && *p
++ != '|')
3417 output_operand_lossage ("unterminated assembly dialect alternative");
3424 /* Skip to close brace. */
3429 output_operand_lossage ("unterminated assembly dialect alternative");
3433 while (*p
++ != '}');
3437 putc (c
, asm_out_file
);
3442 putc (c
, asm_out_file
);
3448 /* %% outputs a single %. */
3452 putc (c
, asm_out_file
);
3454 /* %= outputs a number which is unique to each insn in the entire
3455 compilation. This is useful for making local labels that are
3456 referred to more than once in a given insn. */
3460 fprintf (asm_out_file
, "%d", insn_counter
);
3462 /* % followed by a letter and some digits
3463 outputs an operand in a special way depending on the letter.
3464 Letters `acln' are implemented directly.
3465 Other letters are passed to `output_operand' so that
3466 the PRINT_OPERAND macro can define them. */
3467 else if (ISLOWER (*p
) || ISUPPER (*p
))
3472 if (! (*p
>= '0' && *p
<= '9'))
3473 output_operand_lossage ("operand number missing after %-letter");
3474 else if (this_is_asm_operands
3475 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3476 output_operand_lossage ("operand number out of range");
3477 else if (letter
== 'l')
3478 output_asm_label (operands
[c
]);
3479 else if (letter
== 'a')
3480 output_address (operands
[c
]);
3481 else if (letter
== 'c')
3483 if (CONSTANT_ADDRESS_P (operands
[c
]))
3484 output_addr_const (asm_out_file
, operands
[c
]);
3486 output_operand (operands
[c
], 'c');
3488 else if (letter
== 'n')
3490 if (GET_CODE (operands
[c
]) == CONST_INT
)
3491 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3492 - INTVAL (operands
[c
]));
3495 putc ('-', asm_out_file
);
3496 output_addr_const (asm_out_file
, operands
[c
]);
3500 output_operand (operands
[c
], letter
);
3504 while ((c
= *p
) >= '0' && c
<= '9')
3507 /* % followed by a digit outputs an operand the default way. */
3508 else if (*p
>= '0' && *p
<= '9')
3511 if (this_is_asm_operands
3512 && (c
< 0 || (unsigned int) c
>= insn_noperands
))
3513 output_operand_lossage ("operand number out of range");
3515 output_operand (operands
[c
], 0);
3518 while ((c
= *p
) >= '0' && c
<= '9')
3521 /* % followed by punctuation: output something for that
3522 punctuation character alone, with no operand.
3523 The PRINT_OPERAND macro decides what is actually done. */
3524 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3525 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3526 output_operand (NULL_RTX
, *p
++);
3529 output_operand_lossage ("invalid %%-code");
3533 putc (c
, asm_out_file
);
3536 /* Write out the variable names for operands, if we know them. */
3537 if (flag_verbose_asm
)
3542 for (i
= 0; i
< ops
; i
++)
3545 tree decl
= get_decl_from_op (operands
[oporder
[i
]], &addressp
);
3547 if (decl
&& DECL_NAME (decl
))
3549 fprintf (asm_out_file
, "%s %s%s",
3550 wrote
? "," : ASM_COMMENT_START
,
3551 addressp
? "*" : "",
3552 IDENTIFIER_POINTER (DECL_NAME (decl
)));
3558 if (flag_print_asm_name
)
3561 putc ('\n', asm_out_file
);
3564 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3567 output_asm_label (x
)
3572 if (GET_CODE (x
) == LABEL_REF
)
3574 if (GET_CODE (x
) == CODE_LABEL
3575 || (GET_CODE (x
) == NOTE
3576 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3577 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3579 output_operand_lossage ("`%l' operand isn't a label");
3581 assemble_name (asm_out_file
, buf
);
3584 /* Print operand X using machine-dependent assembler syntax.
3585 The macro PRINT_OPERAND is defined just to control this function.
3586 CODE is a non-digit that preceded the operand-number in the % spec,
3587 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3588 between the % and the digits.
3589 When CODE is a non-letter, X is 0.
3591 The meanings of the letters are machine-dependent and controlled
3592 by PRINT_OPERAND. */
3595 output_operand (x
, code
)
3597 int code ATTRIBUTE_UNUSED
;
3599 if (x
&& GET_CODE (x
) == SUBREG
)
3600 x
= alter_subreg (x
);
3602 /* If X is a pseudo-register, abort now rather than writing trash to the
3605 if (x
&& GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
3608 PRINT_OPERAND (asm_out_file
, x
, code
);
3611 /* Print a memory reference operand for address X
3612 using machine-dependent assembler syntax.
3613 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3619 walk_alter_subreg (x
);
3620 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3623 /* Print an integer constant expression in assembler syntax.
3624 Addition and subtraction are the only arithmetic
3625 that may appear in these expressions. */
3628 output_addr_const (file
, x
)
3635 switch (GET_CODE (x
))
3645 #ifdef ASM_OUTPUT_SYMBOL_REF
3646 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3648 assemble_name (file
, XSTR (x
, 0));
3656 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3657 assemble_name (file
, buf
);
3661 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3665 /* This used to output parentheses around the expression,
3666 but that does not work on the 386 (either ATT or BSD assembler). */
3667 output_addr_const (file
, XEXP (x
, 0));
3671 if (GET_MODE (x
) == VOIDmode
)
3673 /* We can use %d if the number is one word and positive. */
3674 if (CONST_DOUBLE_HIGH (x
))
3675 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3676 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3677 else if (CONST_DOUBLE_LOW (x
) < 0)
3678 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3680 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3683 /* We can't handle floating point constants;
3684 PRINT_OPERAND must handle them. */
3685 output_operand_lossage ("floating constant misused");
3689 /* Some assemblers need integer constants to appear last (eg masm). */
3690 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3692 output_addr_const (file
, XEXP (x
, 1));
3693 if (INTVAL (XEXP (x
, 0)) >= 0)
3694 fprintf (file
, "+");
3695 output_addr_const (file
, XEXP (x
, 0));
3699 output_addr_const (file
, XEXP (x
, 0));
3700 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3701 || INTVAL (XEXP (x
, 1)) >= 0)
3702 fprintf (file
, "+");
3703 output_addr_const (file
, XEXP (x
, 1));
3708 /* Avoid outputting things like x-x or x+5-x,
3709 since some assemblers can't handle that. */
3710 x
= simplify_subtraction (x
);
3711 if (GET_CODE (x
) != MINUS
)
3714 output_addr_const (file
, XEXP (x
, 0));
3715 fprintf (file
, "-");
3716 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
3717 && INTVAL (XEXP (x
, 1)) < 0)
3718 || GET_CODE (XEXP (x
, 1)) != CONST_INT
)
3720 fputs (targetm
.asm_out
.open_paren
, file
);
3721 output_addr_const (file
, XEXP (x
, 1));
3722 fputs (targetm
.asm_out
.close_paren
, file
);
3725 output_addr_const (file
, XEXP (x
, 1));
3730 output_addr_const (file
, XEXP (x
, 0));
3734 #ifdef OUTPUT_ADDR_CONST_EXTRA
3735 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3740 output_operand_lossage ("invalid expression as operand");
3744 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3745 %R prints the value of REGISTER_PREFIX.
3746 %L prints the value of LOCAL_LABEL_PREFIX.
3747 %U prints the value of USER_LABEL_PREFIX.
3748 %I prints the value of IMMEDIATE_PREFIX.
3749 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3750 Also supported are %d, %x, %s, %e, %f, %g and %%.
3752 We handle alternate assembler dialects here, just like output_asm_insn. */
3755 asm_fprintf
VPARAMS ((FILE *file
, const char *p
, ...))
3760 VA_OPEN (argptr
, p
);
3761 VA_FIXEDARG (argptr
, FILE *, file
);
3762 VA_FIXEDARG (argptr
, const char *, p
);
3769 #ifdef ASSEMBLER_DIALECT
3774 /* If we want the first dialect, do nothing. Otherwise, skip
3775 DIALECT_NUMBER of strings ending with '|'. */
3776 for (i
= 0; i
< dialect_number
; i
++)
3778 while (*p
&& *p
++ != '|')
3788 /* Skip to close brace. */
3789 while (*p
&& *p
++ != '}')
3800 while ((c
>= '0' && c
<= '9') || c
== '.')
3808 fprintf (file
, "%%");
3811 case 'd': case 'i': case 'u':
3812 case 'x': case 'p': case 'X':
3816 fprintf (file
, buf
, va_arg (argptr
, int));
3820 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3821 but we do not check for those cases. It means that the value
3822 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3824 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3826 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3836 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3843 fprintf (file
, buf
, va_arg (argptr
, long));
3851 fprintf (file
, buf
, va_arg (argptr
, double));
3857 fprintf (file
, buf
, va_arg (argptr
, char *));
3861 #ifdef ASM_OUTPUT_OPCODE
3862 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3867 #ifdef REGISTER_PREFIX
3868 fprintf (file
, "%s", REGISTER_PREFIX
);
3873 #ifdef IMMEDIATE_PREFIX
3874 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3879 #ifdef LOCAL_LABEL_PREFIX
3880 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3885 fputs (user_label_prefix
, file
);
3888 #ifdef ASM_FPRINTF_EXTENSIONS
3889 /* Upper case letters are reserved for general use by asm_fprintf
3890 and so are not available to target specific code. In order to
3891 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3892 they are defined here. As they get turned into real extensions
3893 to asm_fprintf they should be removed from this list. */
3894 case 'A': case 'B': case 'C': case 'D': case 'E':
3895 case 'F': case 'G': case 'H': case 'J': case 'K':
3896 case 'M': case 'N': case 'P': case 'Q': case 'S':
3897 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3900 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3913 /* Split up a CONST_DOUBLE or integer constant rtx
3914 into two rtx's for single words,
3915 storing in *FIRST the word that comes first in memory in the target
3916 and in *SECOND the other. */
3919 split_double (value
, first
, second
)
3921 rtx
*first
, *second
;
3923 if (GET_CODE (value
) == CONST_INT
)
3925 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3927 /* In this case the CONST_INT holds both target words.
3928 Extract the bits from it into two word-sized pieces.
3929 Sign extend each half to HOST_WIDE_INT. */
3930 unsigned HOST_WIDE_INT low
, high
;
3931 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3933 /* Set sign_bit to the most significant bit of a word. */
3935 sign_bit
<<= BITS_PER_WORD
- 1;
3937 /* Set mask so that all bits of the word are set. We could
3938 have used 1 << BITS_PER_WORD instead of basing the
3939 calculation on sign_bit. However, on machines where
3940 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3941 compiler warning, even though the code would never be
3943 mask
= sign_bit
<< 1;
3946 /* Set sign_extend as any remaining bits. */
3947 sign_extend
= ~mask
;
3949 /* Pick the lower word and sign-extend it. */
3950 low
= INTVAL (value
);
3955 /* Pick the higher word, shifted to the least significant
3956 bits, and sign-extend it. */
3957 high
= INTVAL (value
);
3958 high
>>= BITS_PER_WORD
- 1;
3961 if (high
& sign_bit
)
3962 high
|= sign_extend
;
3964 /* Store the words in the target machine order. */
3965 if (WORDS_BIG_ENDIAN
)
3967 *first
= GEN_INT (high
);
3968 *second
= GEN_INT (low
);
3972 *first
= GEN_INT (low
);
3973 *second
= GEN_INT (high
);
3978 /* The rule for using CONST_INT for a wider mode
3979 is that we regard the value as signed.
3980 So sign-extend it. */
3981 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3982 if (WORDS_BIG_ENDIAN
)
3994 else if (GET_CODE (value
) != CONST_DOUBLE
)
3996 if (WORDS_BIG_ENDIAN
)
3998 *first
= const0_rtx
;
4004 *second
= const0_rtx
;
4007 else if (GET_MODE (value
) == VOIDmode
4008 /* This is the old way we did CONST_DOUBLE integers. */
4009 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
4011 /* In an integer, the words are defined as most and least significant.
4012 So order them by the target's convention. */
4013 if (WORDS_BIG_ENDIAN
)
4015 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
4016 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
4020 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
4021 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
4026 #ifdef REAL_ARITHMETIC
4029 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
4031 /* Note, this converts the REAL_VALUE_TYPE to the target's
4032 format, splits up the floating point double and outputs
4033 exactly 32 bits of it into each of l[0] and l[1] --
4034 not necessarily BITS_PER_WORD bits. */
4035 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
4037 /* If 32 bits is an entire word for the target, but not for the host,
4038 then sign-extend on the host so that the number will look the same
4039 way on the host that it would on the target. See for instance
4040 simplify_unary_operation. The #if is needed to avoid compiler
4043 #if HOST_BITS_PER_LONG > 32
4044 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
4046 if (l
[0] & ((long) 1 << 31))
4047 l
[0] |= ((long) (-1) << 32);
4048 if (l
[1] & ((long) 1 << 31))
4049 l
[1] |= ((long) (-1) << 32);
4053 *first
= GEN_INT ((HOST_WIDE_INT
) l
[0]);
4054 *second
= GEN_INT ((HOST_WIDE_INT
) l
[1]);
4056 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
4057 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
4058 && ! flag_pretend_float
)
4062 #ifdef HOST_WORDS_BIG_ENDIAN
4069 /* Host and target agree => no need to swap. */
4070 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
4071 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
4075 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
4076 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
4078 #endif /* no REAL_ARITHMETIC */
4082 /* Return nonzero if this function has no function calls. */
4090 if (profile_flag
|| profile_block_flag
|| profile_arc_flag
)
4093 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
4095 if (GET_CODE (insn
) == CALL_INSN
4096 && ! SIBLING_CALL_P (insn
))
4098 if (GET_CODE (insn
) == INSN
4099 && GET_CODE (PATTERN (insn
)) == SEQUENCE
4100 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
4101 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
4104 for (link
= current_function_epilogue_delay_list
;
4106 link
= XEXP (link
, 1))
4108 insn
= XEXP (link
, 0);
4110 if (GET_CODE (insn
) == CALL_INSN
4111 && ! SIBLING_CALL_P (insn
))
4113 if (GET_CODE (insn
) == INSN
4114 && GET_CODE (PATTERN (insn
)) == SEQUENCE
4115 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
4116 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
4123 /* Return 1 if branch is an forward branch.
4124 Uses insn_shuid array, so it works only in the final pass. May be used by
4125 output templates to customary add branch prediction hints.
4128 final_forward_branch_p (insn
)
4131 int insn_id
, label_id
;
4134 insn_id
= INSN_SHUID (insn
);
4135 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
4136 /* We've hit some insns that does not have id information available. */
4137 if (!insn_id
|| !label_id
)
4139 return insn_id
< label_id
;
4142 /* On some machines, a function with no call insns
4143 can run faster if it doesn't create its own register window.
4144 When output, the leaf function should use only the "output"
4145 registers. Ordinarily, the function would be compiled to use
4146 the "input" registers to find its arguments; it is a candidate
4147 for leaf treatment if it uses only the "input" registers.
4148 Leaf function treatment means renumbering so the function
4149 uses the "output" registers instead. */
4151 #ifdef LEAF_REGISTERS
4153 /* Return 1 if this function uses only the registers that can be
4154 safely renumbered. */
4157 only_leaf_regs_used ()
4160 char *permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
4162 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4163 if ((regs_ever_live
[i
] || global_regs
[i
])
4164 && ! permitted_reg_in_leaf_functions
[i
])
4167 if (current_function_uses_pic_offset_table
4168 && pic_offset_table_rtx
!= 0
4169 && GET_CODE (pic_offset_table_rtx
) == REG
4170 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
4176 /* Scan all instructions and renumber all registers into those
4177 available in leaf functions. */
4180 leaf_renumber_regs (first
)
4185 /* Renumber only the actual patterns.
4186 The reg-notes can contain frame pointer refs,
4187 and renumbering them could crash, and should not be needed. */
4188 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
4190 leaf_renumber_regs_insn (PATTERN (insn
));
4191 for (insn
= current_function_epilogue_delay_list
;
4193 insn
= XEXP (insn
, 1))
4194 if (INSN_P (XEXP (insn
, 0)))
4195 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
4198 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4199 available in leaf functions. */
4202 leaf_renumber_regs_insn (in_rtx
)
4206 const char *format_ptr
;
4211 /* Renumber all input-registers into output-registers.
4212 renumbered_regs would be 1 for an output-register;
4215 if (GET_CODE (in_rtx
) == REG
)
4219 /* Don't renumber the same reg twice. */
4223 newreg
= REGNO (in_rtx
);
4224 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4225 to reach here as part of a REG_NOTE. */
4226 if (newreg
>= FIRST_PSEUDO_REGISTER
)
4231 newreg
= LEAF_REG_REMAP (newreg
);
4234 regs_ever_live
[REGNO (in_rtx
)] = 0;
4235 regs_ever_live
[newreg
] = 1;
4236 REGNO (in_rtx
) = newreg
;
4240 if (INSN_P (in_rtx
))
4242 /* Inside a SEQUENCE, we find insns.
4243 Renumber just the patterns of these insns,
4244 just as we do for the top-level insns. */
4245 leaf_renumber_regs_insn (PATTERN (in_rtx
));
4249 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
4251 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
4252 switch (*format_ptr
++)
4255 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
4259 if (NULL
!= XVEC (in_rtx
, i
))
4261 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
4262 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));