| blob | 17f22767582bff6c43fb50c7dac4d526efca7445 |
1 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
3 * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
4 for non-QImode registers
6 2018-01-22 Richard Biener <rguenther@suse.de>
8 PR tree-optimization/83963
9 * graphite-scop-detection.c (scop_detection::get_sese): Delay
10 including the loop exit block.
11 (scop_detection::merge_sese): Likewise.
12 (scop_detection::add_scop): Do it here instead.
14 2018-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16 * doc/sourcebuild.texi (arm_softfloat): Document.
18 2018-01-21 John David Anglin <danglin@gcc.gnu.org>
20 PR gcc/77734
21 * config/pa/pa.c (pa_function_ok_for_sibcall): Use
22 targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
23 Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
25 2018-01-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
26 David Edelsohn <dje.gcc@gmail.com>
28 PR target/83946
29 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
30 Change "crset eq" to "crset 2".
31 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
32 (*call_indirect_aix<mode>_nospec): Likewise.
33 (*call_value_indirect_aix<mode>_nospec): Likewise.
34 (*call_indirect_elfv2<mode>_nospec): Likewise.
35 (*call_value_indirect_elfv2<mode>_nospec): Likewise.
36 (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
37 change assembly output from . to $.
38 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
39 (indirect_jump<mode>_nospec): Change assembly output from . to $.
40 (*tablejump<mode>_internal1_nospec): Likewise.
42 2018-01-21 Oleg Endo <olegendo@gcc.gnu.org>
44 PR target/80870
45 * config/sh/sh_optimize_sett_clrt.cc:
46 Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
48 2018-01-20 Richard Sandiford <richard.sandiford@linaro.org>
50 PR tree-optimization/83940
51 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
52 offset_dt to vect_constant_def rather than vect_unknown_def_type.
53 (vect_check_load_store_mask): Add a mask_dt_out parameter and
54 use it to pass back the definition type.
55 (vect_check_store_rhs): Likewise rhs_dt_out.
56 (vect_build_gather_load_calls): Add a mask_dt argument and use
57 it instead of a call to vect_is_simple_use.
58 (vectorizable_store): Update calls to vect_check_load_store_mask
59 and vect_check_store_rhs. Use the dt returned by the latter instead
60 of scatter_src_dt. Use the cached mask_dt and gs_info.offset_dt
61 instead of calls to vect_is_simple_use. Pass the scalar rather
62 than the vector operand to vect_is_simple_use when handling
63 second and subsequent copies of an rhs value.
64 (vectorizable_load): Update calls to vect_check_load_store_mask
65 and vect_build_gather_load_calls. Use the cached mask_dt and
66 gs_info.offset_dt instead of calls to vect_is_simple_use.
68 2018-01-20 Jakub Jelinek <jakub@redhat.com>
70 PR middle-end/83945
71 * tree-emutls.c: Include gimplify.h.
72 (lower_emutls_2): New function.
73 (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
74 with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
75 it before further processing.
77 PR target/83930
78 * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
79 UINTVAL (trueop1) instead of INTVAL (op1).
81 2018-01-19 Jakub Jelinek <jakub@redhat.com>
83 PR debug/81570
84 PR debug/83728
85 * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
86 INCOMING_FRAME_SP_OFFSET if not defined.
87 (scan_trace): Add ENTRY argument. If true and
88 DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
89 emit a note to adjust the CFA offset.
90 (create_cfi_notes): Adjust scan_trace callers.
91 (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
92 INCOMING_FRAME_SP_OFFSET in the CIE.
93 * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
94 * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
95 Likewise.
96 * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
97 * doc/tm.texi: Regenerated.
99 2018-01-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
101 PR rtl-optimization/83147
102 * lra-constraints.c (remove_inheritance_pseudos): Use
103 lra_substitute_pseudo_within_insn.
105 2018-01-19 Tom de Vries <tom@codesourcery.com>
106 Cesar Philippidis <cesar@codesourcery.com>
108 PR target/83920
109 * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
111 2018-01-19 Cesar Philippidis <cesar@codesourcery.com>
113 PR target/83790
114 * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
115 spaces for function labels.
117 2018-01-19 Martin Liska <mliska@suse.cz>
119 * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
120 (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
121 (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
122 (PRED_OPCODE_POSITIVE): Change from 64 to 59.
123 (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
124 (PRED_CONST_RETURN): Change from 69 to 65.
125 (PRED_NULL_RETURN): Change from 91 to 71.
126 (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
127 (PRED_LOOP_GUARD): Change from 66 to 73.
129 2018-01-19 Martin Liska <mliska@suse.cz>
131 * predict.c (predict_insn_def): Add new assert.
132 (struct branch_predictor): Change type to signed integer.
133 (test_prediction_value_range): Amend test to cover
134 PROB_UNINITIALIZED.
135 * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
136 (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
137 (PRED_LOOP_ITERATIONS_MAX): Likewise.
138 (PRED_LOOP_IV_COMPARE): Likewise.
139 * predict.h (PROB_UNINITIALIZED): Define new constant.
141 2018-01-19 Martin Liska <mliska@suse.cz>
143 * predict.c (dump_prediction): Add new format for
144 analyze_brprob.py script which is enabled with -details
145 suboption.
146 * profile-count.h (precise_p): New function.
148 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
150 PR tree-optimization/83922
151 * tree-vect-loop.c (vect_verify_full_masking): Return false if
152 there are no statements that need masking.
153 (vect_active_double_reduction_p): New function.
154 (vect_analyze_loop_operations): Use it when handling phis that
155 are not in the loop header.
157 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
159 PR tree-optimization/83914
160 * tree-vect-loop.c (vectorizable_induction): Don't convert
161 init_expr or apply the peeling adjustment for inductions
162 that are nested within the vectorized loop.
164 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
166 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
167 instead of NEG.
169 2018-01-18 Jakub Jelinek <jakub@redhat.com>
171 PR sanitizer/81715
172 PR testsuite/83882
173 * function.h (gimplify_parameters): Add gimple_seq * argument.
174 * function.c: Include gimple.h and options.h.
175 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
176 for the added local temporaries if needed.
177 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
178 if there are any parameter cleanups, wrap whole body into a
179 try/finally with the cleanups.
181 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
183 PR target/82964
184 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
185 Use GET_MODE_CLASS for scalar floating point.
187 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
189 PR ipa/82256
190 patch by PaX Team
191 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
192 Fix call of call_cgraph_insertion_hooks.
194 2018-01-18 Martin Sebor <msebor@redhat.com>
196 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
198 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
200 PR ipa/83619
201 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
202 frequencies.
204 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
206 PR other/70268
207 * common.opt: (-ffile-prefix-map): New option.
208 * opts.c (common_handle_option): Defer it.
209 * opts-global.c (handle_common_deferred_options): Handle it.
210 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
211 * file-prefix-map.h: New file.
212 (remap_debug_filename, add_debug_prefix_map): ...here.
213 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
214 * final.c (debug_prefix_map, add_debug_prefix_map
215 remap_debug_filename): Move to...
216 * file-prefix-map.c: New file.
217 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
218 generalize, get rid of alloca(), use strrchr() instead of strchr().
219 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
220 Implement in terms of add_prefix_map().
221 (remap_macro_filename, remap_debug_filename): Implement in term of
222 remap_filename().
223 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
224 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
225 * dbxout.c: Include file-prefix-map.h.
226 * varasm.c: Likewise.
227 * vmsdbgout.c: Likewise.
228 * xcoffout.c: Likewise.
229 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
230 * doc/cppopts.texi (-fmacro-prefix-map): Document.
231 * doc/invoke.texi (-ffile-prefix-map): Document.
232 (-fdebug-prefix-map): Update description.
234 2018-01-18 Martin Liska <mliska@suse.cz>
236 * config/i386/i386.c (indirect_thunk_name): Document that also
237 lfence is emitted.
238 (output_indirect_thunk): Document why both instructions
239 (pause and lfence) are generated.
241 2018-01-18 Richard Biener <rguenther@suse.de>
243 PR tree-optimization/83887
244 * graphite-scop-detection.c
245 (scop_detection::get_nearest_dom_with_single_entry): Remove.
246 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
247 (scop_detection::merge_sese): Re-implement with a flood-fill
248 algorithm that properly finds a SESE region if it exists.
250 2018-01-18 Jakub Jelinek <jakub@redhat.com>
252 PR c/61240
253 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
254 pointer_diff optimizations use view_convert instead of convert.
256 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
258 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
259 Generate different code for -mno-speculate-indirect-jumps.
260 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
261 (*call_indirect_aix<mode>): Disable for
262 -mno-speculate-indirect-jumps.
263 (*call_indirect_aix<mode>_nospec): New define_insn.
264 (*call_value_indirect_aix<mode>): Disable for
265 -mno-speculate-indirect-jumps.
266 (*call_value_indirect_aix<mode>_nospec): New define_insn.
267 (*sibcall_nonlocal_sysv<mode>): Generate different code for
268 -mno-speculate-indirect-jumps.
269 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
271 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
273 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
274 long double type, set the flags for noting the default long double
275 type, even if we don't pass or return a long double type.
277 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
279 PR ipa/83051
280 * ipa-inline.c (flatten_function): Do not overwrite final inlining
281 failure.
283 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
285 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
286 support for merge[hl].
287 (fold_mergehl_helper): New helper function.
288 (tree-vector-builder.h): New #include for tree_vector_builder usage.
289 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
290 (altivec_vmrglw_direct): Add xxmrglw insn.
292 2018-01-17 Andrew Waterman <andrew@sifive.com>
294 * config/riscv/riscv.c (riscv_conditional_register_usage): If
295 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
297 2018-01-17 David Malcolm <dmalcolm@redhat.com>
299 PR lto/83121
300 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
301 call the lto_location_cache before reading the
302 DECL_SOURCE_LOCATION of the types.
304 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
305 Richard Sandiford <richard.sandiford@linaro.org>
307 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
308 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
309 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
310 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
311 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
312 Add declaration.
313 * config/aarch64/constraints.md (aarch64_movti_operand):
314 Limit immediates.
315 * config/aarch64/predicates.md (Uti): Add new constraint.
317 2018-01-17 Carl Love <cel@us.ibm.com>
318 * config/rs6000/vsx.md (define_expand xl_len_r,
319 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
320 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
321 lxvll.
322 (define_expand, define_insn): Move the shift left from the
323 define_insn to the define_expand for lxvl and stxvl instructions.
324 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
325 and XL_LEN_R definitions to PURE.
327 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
329 * config/i386/i386.c (indirect_thunk_name): Declare regno
330 as unsigned int. Compare regno with INVALID_REGNUM.
331 (output_indirect_thunk): Ditto.
332 (output_indirect_thunk_function): Ditto.
333 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
334 in the call to output_indirect_thunk_function.
336 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
338 PR middle-end/83884
339 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
340 rather than the size of inner_type to determine the stack slot size
341 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
343 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
345 PR target/83546
346 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
347 to PTA_SILVERMONT.
349 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
351 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
352 endian Linux systems to optionally enable multilibs for selecting
353 the long double type if the user configured an explicit type.
354 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
355 have no long double multilibs if not defined.
356 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
357 warn if the user used -mabi={ieee,ibm}longdouble and we built
358 multilibs for long double.
359 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
360 appropriate multilib option.
361 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
362 multilib options.
363 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
364 for building long double multilibs.
365 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
367 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
369 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
370 copies.
372 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
373 64 bits.
374 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
375 128 bits.
377 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
378 variables.
380 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
381 return value.
383 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
385 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
386 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
388 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
390 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
391 different rtl trees depending on TARGET_64BIT.
392 (rs6000_gen_lvx): Likewise.
394 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
396 * config/visium/visium.md (nop): Tweak comment.
397 (hazard_nop): Likewise.
399 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
401 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
402 -mspeculate-indirect-jumps.
403 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
404 for -mno-speculate-indirect-jumps.
405 (*call_indirect_elfv2<mode>_nospec): New define_insn.
406 (*call_value_indirect_elfv2<mode>): Disable for
407 -mno-speculate-indirect-jumps.
408 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
409 (indirect_jump): Emit different RTL for
410 -mno-speculate-indirect-jumps.
411 (*indirect_jump<mode>): Disable for
412 -mno-speculate-indirect-jumps.
413 (*indirect_jump<mode>_nospec): New define_insn.
414 (tablejump): Emit different RTL for
415 -mno-speculate-indirect-jumps.
416 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
417 (tablejumpsi_nospec): New define_expand.
418 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
419 (tablejumpdi_nospec): New define_expand.
420 (*tablejump<mode>_internal1): Disable for
421 -mno-speculate-indirect-jumps.
422 (*tablejump<mode>_internal1_nospec): New define_insn.
423 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
424 option.
426 2018-01-16 Artyom Skrobov tyomitch@gmail.com
428 * caller-save.c (insert_save): Drop unnecessary parameter. All
429 callers updated.
431 2018-01-16 Jakub Jelinek <jakub@redhat.com>
432 Richard Biener <rguenth@suse.de>
434 PR libgomp/83590
435 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
436 return early, inline manually is_gimple_sizepos. Make sure if we
437 call gimplify_expr we don't end up with a gimple constant.
438 * tree.c (variably_modified_type_p): Don't return true for
439 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
440 * gimplify.h (is_gimple_sizepos): Remove.
442 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
444 PR tree-optimization/83857
445 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
446 vectorizable_live_operation for pure SLP statements.
447 (vectorizable_live_operation): Handle PHIs.
449 2018-01-16 Richard Biener <rguenther@suse.de>
451 PR tree-optimization/83867
452 * tree-vect-stmts.c (vect_transform_stmt): Precompute
453 nested_in_vect_loop_p since the scalar stmt may get invalidated.
455 2018-01-16 Jakub Jelinek <jakub@redhat.com>
457 PR c/83844
458 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
459 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
460 If off is not INTEGER_CST, issue a may not be aligned warning
461 rather than isn't aligned. Use isn%'t rather than isn't.
462 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
463 into MULT_EXPR.
464 <case MULT_EXPR>: Improve the case when bottom and one of the
465 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
466 operand, in that case check if the other operand is multiple of
467 bottom divided by the INTEGER_CST operand.
469 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
471 PR target/83858
472 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
473 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
474 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
475 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
476 * config/pa/pa.c (pa_function_arg_advance): Likewise.
477 (pa_function_arg, pa_arg_partial_bytes): Likewise.
478 (pa_function_arg_size): New function.
480 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
482 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
483 in a separate statement.
485 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
487 PR tree-optimization/83847
488 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
489 group gathers and scatters.
491 2018-01-16 Jakub Jelinek <jakub@redhat.com>
493 PR rtl-optimization/86620
494 * params.def (max-sched-ready-insns): Bump minimum value to 1.
496 PR rtl-optimization/83213
497 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
498 to last if both are JUMP_INSNs.
500 PR tree-optimization/83843
501 * gimple-ssa-store-merging.c
502 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
503 store_immediate_info for bswap/nop orig_stores.
505 2018-01-15 Andrew Waterman <andrew@sifive.com>
507 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
508 !TARGET_MUL.
509 <UDIV>: Increase cost if !TARGET_DIV.
511 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
513 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
514 (define_attr "cr_logical_3op"): New.
515 (cceq_ior_compare): Adjust.
516 (cceq_ior_compare_complement): Adjust.
517 (*cceq_rev_compare): Adjust.
518 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
519 (is_cracked_insn): Adjust.
520 (insn_must_be_first_in_group): Adjust.
521 * config/rs6000/40x.md: Adjust.
522 * config/rs6000/440.md: Adjust.
523 * config/rs6000/476.md: Adjust.
524 * config/rs6000/601.md: Adjust.
525 * config/rs6000/603.md: Adjust.
526 * config/rs6000/6xx.md: Adjust.
527 * config/rs6000/7450.md: Adjust.
528 * config/rs6000/7xx.md: Adjust.
529 * config/rs6000/8540.md: Adjust.
530 * config/rs6000/cell.md: Adjust.
531 * config/rs6000/e300c2c3.md: Adjust.
532 * config/rs6000/e500mc.md: Adjust.
533 * config/rs6000/e500mc64.md: Adjust.
534 * config/rs6000/e5500.md: Adjust.
535 * config/rs6000/e6500.md: Adjust.
536 * config/rs6000/mpc.md: Adjust.
537 * config/rs6000/power4.md: Adjust.
538 * config/rs6000/power5.md: Adjust.
539 * config/rs6000/power6.md: Adjust.
540 * config/rs6000/power7.md: Adjust.
541 * config/rs6000/power8.md: Adjust.
542 * config/rs6000/power9.md: Adjust.
543 * config/rs6000/rs64.md: Adjust.
544 * config/rs6000/titan.md: Adjust.
546 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
548 * config/i386/predicates.md (indirect_branch_operand): Rewrite
549 ix86_indirect_branch_register logic.
551 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
553 * config/i386/constraints.md (Bs): Update
554 ix86_indirect_branch_register check. Don't check
555 ix86_indirect_branch_register with GOT_memory_operand.
556 (Bw): Likewise.
557 * config/i386/predicates.md (GOT_memory_operand): Don't check
558 ix86_indirect_branch_register here.
559 (GOT32_symbol_operand): Likewise.
561 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
563 * config/i386/predicates.md (constant_call_address_operand):
564 Rewrite ix86_indirect_branch_register logic.
565 (sibcall_insn_operand): Likewise.
567 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
569 * config/i386/constraints.md (Bs): Replace
570 ix86_indirect_branch_thunk_register with
571 ix86_indirect_branch_register.
572 (Bw): Likewise.
573 * config/i386/i386.md (indirect_jump): Likewise.
574 (tablejump): Likewise.
575 (*sibcall_memory): Likewise.
576 (*sibcall_value_memory): Likewise.
577 Peepholes of indirect call and jump via memory: Likewise.
578 * config/i386/i386.opt: Likewise.
579 * config/i386/predicates.md (indirect_branch_operand): Likewise.
580 (GOT_memory_operand): Likewise.
581 (call_insn_operand): Likewise.
582 (sibcall_insn_operand): Likewise.
583 (GOT32_symbol_operand): Likewise.
585 2018-01-15 Jakub Jelinek <jakub@redhat.com>
587 PR middle-end/83837
588 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
589 type rather than type addr's type points to.
590 (expand_omp_atomic_mutex): Likewise.
591 (expand_omp_atomic): Likewise.
593 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
595 PR target/83839
596 * config/i386/i386.c (output_indirect_thunk_function): Use
597 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
598 for __x86_return_thunk.
600 2018-01-15 Richard Biener <rguenther@suse.de>
602 PR middle-end/83850
603 * expmed.c (extract_bit_field_1): Fix typo.
605 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
607 PR target/83687
608 * config/arm/iterators.md (VF): New mode iterator.
609 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
610 Remove integer-related logic from pattern.
611 (neon_vabd<mode>_3): Likewise.
613 2018-01-15 Jakub Jelinek <jakub@redhat.com>
615 PR middle-end/82694
616 * common.opt (fstrict-overflow): No longer an alias.
617 (fwrapv-pointer): New option.
618 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
619 also for pointer types based on flag_wrapv_pointer.
620 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
621 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
622 opts->x_flag_wrapv got set.
623 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
624 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
625 POINTER_TYPE_OVERFLOW_UNDEFINED.
626 * match.pd: Likewise in address comparison pattern.
627 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
629 2018-01-15 Richard Biener <rguenther@suse.de>
631 PR lto/83804
632 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
633 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
634 Reset type names to their identifier if their TYPE_DECL doesn't
635 have linkage (and thus is used for ODR and devirt).
636 (save_debug_info_for_decl): Remove.
637 (save_debug_info_for_type): Likewise.
638 (add_tree_to_fld_list): Adjust.
639 * tree-pretty-print.c (dump_generic_node): Make dumping of
640 type names more robust.
642 2018-01-15 Richard Biener <rguenther@suse.de>
644 * BASE-VER: Bump to 8.0.1.
646 2018-01-14 Martin Sebor <msebor@redhat.com>
648 PR other/83508
649 * builtins.c (check_access): Avoid warning when the no-warning bit
650 is set.
652 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
654 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
655 * ira-color (allocno_hard_regs_compare): Likewise.
657 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
659 PR target/83013
660 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
661 Use .pushsection/.popsection.
663 2018-01-14 Martin Sebor <msebor@redhat.com>
665 PR c++/81327
666 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
668 2018-01-14 Jakub Jelinek <jakub@redhat.com>
670 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
671 entry from extra_headers.
672 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
673 extra_headers, make the list bitwise identical to the i?86-*-* one.
675 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
677 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
678 -mcmodel=large with -mindirect-branch=thunk,
679 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
680 -mfunction-return=thunk-extern.
681 * doc/invoke.texi: Document -mcmodel=large is incompatible with
682 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
683 -mfunction-return=thunk and -mfunction-return=thunk-extern.
685 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
687 * config/i386/i386.c (print_reg): Print the name of the full
688 integer register without '%'.
689 (ix86_print_operand): Handle 'V'.
690 * doc/extend.texi: Document 'V' modifier.
692 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
694 * config/i386/constraints.md (Bs): Disallow memory operand for
695 -mindirect-branch-register.
696 (Bw): Likewise.
697 * config/i386/predicates.md (indirect_branch_operand): Likewise.
698 (GOT_memory_operand): Likewise.
699 (call_insn_operand): Likewise.
700 (sibcall_insn_operand): Likewise.
701 (GOT32_symbol_operand): Likewise.
702 * config/i386/i386.md (indirect_jump): Call convert_memory_address
703 for -mindirect-branch-register.
704 (tablejump): Likewise.
705 (*sibcall_memory): Likewise.
706 (*sibcall_value_memory): Likewise.
707 Disallow peepholes of indirect call and jump via memory for
708 -mindirect-branch-register.
709 (*call_pop): Replace m with Bw.
710 (*call_value_pop): Likewise.
711 (*sibcall_pop_memory): Replace m with Bs.
712 * config/i386/i386.opt (mindirect-branch-register): New option.
713 * doc/invoke.texi: Document -mindirect-branch-register option.
715 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
717 * config/i386/i386-protos.h (ix86_output_function_return): New.
718 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
719 set function_return_type.
720 (indirect_thunk_name): Add ret_p to indicate thunk for function
721 return.
722 (output_indirect_thunk_function): Pass false to
723 indirect_thunk_name.
724 (ix86_output_indirect_branch_via_reg): Likewise.
725 (ix86_output_indirect_branch_via_push): Likewise.
726 (output_indirect_thunk_function): Create alias for function
727 return thunk if regno < 0.
728 (ix86_output_function_return): New function.
729 (ix86_handle_fndecl_attribute): Handle function_return.
730 (ix86_attribute_table): Add function_return.
731 * config/i386/i386.h (machine_function): Add
732 function_return_type.
733 * config/i386/i386.md (simple_return_internal): Use
734 ix86_output_function_return.
735 (simple_return_internal_long): Likewise.
736 * config/i386/i386.opt (mfunction-return=): New option.
737 (indirect_branch): Mention -mfunction-return=.
738 * doc/extend.texi: Document function_return function attribute.
739 * doc/invoke.texi: Document -mfunction-return= option.
741 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
743 * config/i386/i386-opts.h (indirect_branch): New.
744 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
745 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
746 with local indirect jump when converting indirect call and jump.
747 (ix86_set_indirect_branch_type): New.
748 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
749 (indirectlabelno): New.
750 (indirect_thunk_needed): Likewise.
751 (indirect_thunk_bnd_needed): Likewise.
752 (indirect_thunks_used): Likewise.
753 (indirect_thunks_bnd_used): Likewise.
754 (INDIRECT_LABEL): Likewise.
755 (indirect_thunk_name): Likewise.
756 (output_indirect_thunk): Likewise.
757 (output_indirect_thunk_function): Likewise.
758 (ix86_output_indirect_branch_via_reg): Likewise.
759 (ix86_output_indirect_branch_via_push): Likewise.
760 (ix86_output_indirect_branch): Likewise.
761 (ix86_output_indirect_jmp): Likewise.
762 (ix86_code_end): Call output_indirect_thunk_function if needed.
763 (ix86_output_call_insn): Call ix86_output_indirect_branch if
764 needed.
765 (ix86_handle_fndecl_attribute): Handle indirect_branch.
766 (ix86_attribute_table): Add indirect_branch.
767 * config/i386/i386.h (machine_function): Add indirect_branch_type
768 and has_local_indirect_jump.
769 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
770 to true.
771 (tablejump): Likewise.
772 (*indirect_jump): Use ix86_output_indirect_jmp.
773 (*tablejump_1): Likewise.
774 (simple_return_indirect_internal): Likewise.
775 * config/i386/i386.opt (mindirect-branch=): New option.
776 (indirect_branch): New.
777 (keep): Likewise.
778 (thunk): Likewise.
779 (thunk-inline): Likewise.
780 (thunk-extern): Likewise.
781 * doc/extend.texi: Document indirect_branch function attribute.
782 * doc/invoke.texi: Document -mindirect-branch= option.
784 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
786 PR ipa/83051
787 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
789 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
791 * ipa-inline.c (want_inline_small_function_p): Return false if
792 inlining has already failed with CIF_FINAL_ERROR.
793 (update_caller_keys): Call want_inline_small_function_p before
794 can_inline_edge_p.
795 (update_callee_keys): Likewise.
797 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
799 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
800 New function.
801 (rs6000_quadword_masked_address_p): Likewise.
802 (quad_aligned_load_p): Likewise.
803 (quad_aligned_store_p): Likewise.
804 (const_load_sequence_p): Add comment to describe the outer-most loop.
805 (mimic_memory_attributes_and_flags): New function.
806 (rs6000_gen_stvx): Likewise.
807 (replace_swapped_aligned_store): Likewise.
808 (rs6000_gen_lvx): Likewise.
809 (replace_swapped_aligned_load): Likewise.
810 (replace_swapped_load_constant): Capitalize argument name in
811 comment describing this function.
812 (rs6000_analyze_swaps): Add a third pass to search for vector loads
813 and stores that access quad-word aligned addresses and replace
814 with stvx or lvx instructions when appropriate.
815 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
816 New function prototype.
817 (rs6000_quadword_masked_address_p): Likewise.
818 (rs6000_gen_lvx): Likewise.
819 (rs6000_gen_stvx): Likewise.
820 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
821 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
822 when memory address is aligned.
823 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
824 this split to select lvx instruction when memory address is aligned.
825 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
826 instruction when memory address is aligned.
827 (*vsx_le_perm_load_v16qi): Likewise.
828 (four unnamed splitters): Modify to select the stvx instruction
829 when memory is aligned.
831 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
833 * predict.c (determine_unlikely_bbs): Handle correctly BBs
834 which appears in the queue multiple times.
836 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
837 Alan Hayward <alan.hayward@arm.com>
838 David Sherwood <david.sherwood@arm.com>
840 * tree-vectorizer.h (vec_lower_bound): New structure.
841 (_loop_vec_info): Add check_nonzero and lower_bounds.
842 (LOOP_VINFO_CHECK_NONZERO): New macro.
843 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
844 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
845 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
846 fields. Make seg_len the distance travelled, not including the
847 access size.
848 (dr_direction_indicator): Declare.
849 (dr_zero_step_indicator): Likewise.
850 (dr_known_forward_stride_p): Likewise.
851 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
852 tree-ssanames.h.
853 (runtime_alias_check_p): Allow runtime alias checks with
854 variable strides.
855 (operator ==): Compare access_size and align.
856 (prune_runtime_alias_test_list): Rework for new distinction between
857 the access_size and seg_len.
858 (create_intersect_range_checks_index): Likewise. Cope with polynomial
859 segment lengths.
860 (get_segment_min_max): New function.
861 (create_intersect_range_checks): Use it.
862 (dr_step_indicator): New function.
863 (dr_direction_indicator): Likewise.
864 (dr_zero_step_indicator): Likewise.
865 (dr_known_forward_stride_p): Likewise.
866 * tree-loop-distribution.c (data_ref_segment_size): Return
867 DR_STEP * (niters - 1).
868 (compute_alias_check_pairs): Update call to the dr_with_seg_len
869 constructor.
870 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
871 (vect_preserves_scalar_order_p): New function, split out from...
872 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
873 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
874 (vect_vfa_access_size): New function.
875 (vect_vfa_align): Likewise.
876 (vect_compile_time_alias): Take access_size_a and access_b arguments.
877 (dump_lower_bound): New function.
878 (vect_check_lower_bound): Likewise.
879 (vect_small_gap_p): Likewise.
880 (vectorizable_with_step_bound_p): Likewise.
881 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
882 depencies if the vectorization factor is 1. Convert the checks
883 for nonzero steps into checks on the bounds of DR_STEP. Try using
884 a bunds check for variable steps if the minimum required step is
885 relatively small. Update calls to the dr_with_seg_len
886 constructor and to vect_compile_time_alias.
887 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
888 function.
889 (vect_loop_versioning): Call it.
890 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
891 when retrying.
892 (vect_estimate_min_profitable_iters): Account for any bounds checks.
894 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
895 Alan Hayward <alan.hayward@arm.com>
896 David Sherwood <david.sherwood@arm.com>
898 * doc/sourcebuild.texi (vect_scatter_store): Document.
899 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
900 optabs.
901 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
902 Document.
903 * genopinit.c (main): Add supports_vec_scatter_store and
904 supports_vec_scatter_store_cached to target_optabs.
905 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
906 IFN_MASK_SCATTER_STORE.
907 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
908 functions.
909 * internal-fn.h (internal_store_fn_p): Declare.
910 (internal_fn_stored_value_index): Likewise.
911 * internal-fn.c (scatter_store_direct): New macro.
912 (expand_scatter_store_optab_fn): New function.
913 (direct_scatter_store_optab_supported_p): New macro.
914 (internal_store_fn_p): New function.
915 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
916 IFN_MASK_SCATTER_STORE.
917 (internal_fn_mask_index): Likewise.
918 (internal_fn_stored_value_index): New function.
919 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
920 for scatter stores.
921 * optabs-query.h (supports_vec_scatter_store_p): Declare.
922 * optabs-query.c (supports_vec_scatter_store_p): New function.
923 * tree-vectorizer.h (vect_get_store_rhs): Declare.
924 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
925 true for scatter stores.
926 (vect_gather_scatter_fn_p): Handle scatter stores too.
927 (vect_check_gather_scatter): Consider using scatter stores if
928 supports_vec_scatter_store_p.
929 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
930 scatter stores too.
931 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
932 internal_fn_stored_value_index.
933 (check_load_store_masking): Handle scatter stores too.
934 (vect_get_store_rhs): Make public.
935 (vectorizable_call): Use internal_store_fn_p.
936 (vectorizable_store): Handle scatter store internal functions.
937 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
938 when deciding whether the end of the group has been reached.
939 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
940 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
941 (mask_scatter_store<mode>): New insns.
943 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
944 Alan Hayward <alan.hayward@arm.com>
945 David Sherwood <david.sherwood@arm.com>
947 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
948 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
949 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
950 function.
951 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
952 Use vect_truncate_gather_scatter_offset if we can't treat the
953 operation as a normal gather load or scatter store.
954 (get_group_load_store_type): Take the gather_scatter_info
955 as argument. Try using a gather load or scatter store for
956 single-element groups.
957 (get_load_store_type): Update calls to get_group_load_store_type
958 and vect_use_strided_gather_scatters_p.
960 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
961 Alan Hayward <alan.hayward@arm.com>
962 David Sherwood <david.sherwood@arm.com>
964 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
965 optional tree argument.
966 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
967 null target hooks.
968 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
969 but continue to use the current value as a fallback.
970 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
971 to compare the updates.
972 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
973 (get_load_store_type): Use it when handling a strided access.
974 (vect_get_strided_load_store_ops): New function.
975 (vect_get_data_ptr_increment): Likewise.
976 (vectorizable_load): Handle strided gather loads. Always pass
977 a step to vect_create_data_ref_ptr and bump_vector_ptr.
979 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
980 Alan Hayward <alan.hayward@arm.com>
981 David Sherwood <david.sherwood@arm.com>
983 * doc/md.texi (gather_load@var{m}): Document.
984 (mask_gather_load@var{m}): Likewise.
985 * genopinit.c (main): Add supports_vec_gather_load and
986 supports_vec_gather_load_cached to target_optabs.
987 * optabs-tree.c (init_tree_optimization_optabs): Use
988 ggc_cleared_alloc to allocate target_optabs.
989 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
990 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
991 functions.
992 * internal-fn.h (internal_load_fn_p): Declare.
993 (internal_gather_scatter_fn_p): Likewise.
994 (internal_fn_mask_index): Likewise.
995 (internal_gather_scatter_fn_supported_p): Likewise.
996 * internal-fn.c (gather_load_direct): New macro.
997 (expand_gather_load_optab_fn): New function.
998 (direct_gather_load_optab_supported_p): New macro.
999 (direct_internal_fn_optab): New function.
1000 (internal_load_fn_p): Likewise.
1001 (internal_gather_scatter_fn_p): Likewise.
1002 (internal_fn_mask_index): Likewise.
1003 (internal_gather_scatter_fn_supported_p): Likewise.
1004 * optabs-query.c (supports_at_least_one_mode_p): New function.
1005 (supports_vec_gather_load_p): Likewise.
1006 * optabs-query.h (supports_vec_gather_load_p): Declare.
1007 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1008 and memory_type field.
1009 (NUM_PATTERNS): Bump to 15.
1010 * tree-vect-data-refs.c: Include internal-fn.h.
1011 (vect_gather_scatter_fn_p): New function.
1012 (vect_describe_gather_scatter_call): Likewise.
1013 (vect_check_gather_scatter): Try using internal functions for
1014 gather loads. Recognize existing calls to a gather load function.
1015 (vect_analyze_data_refs): Consider using gather loads if
1016 supports_vec_gather_load_p.
1017 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1018 (vect_get_gather_scatter_offset_type): Likewise.
1019 (vect_convert_mask_for_vectype): Likewise.
1020 (vect_add_conversion_to_patterm): Likewise.
1021 (vect_try_gather_scatter_pattern): Likewise.
1022 (vect_recog_gather_scatter_pattern): New pattern recognizer.
1023 (vect_vect_recog_func_ptrs): Add it.
1024 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1025 internal_fn_mask_index and internal_gather_scatter_fn_p.
1026 (check_load_store_masking): Take the gather_scatter_info as an
1027 argument and handle gather loads.
1028 (vect_get_gather_scatter_ops): New function.
1029 (vectorizable_call): Check internal_load_fn_p.
1030 (vectorizable_load): Likewise. Handle gather load internal
1031 functions.
1032 (vectorizable_store): Update call to check_load_store_masking.
1033 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1034 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1035 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1036 (aarch64_gather_scale_operand_d): New predicates.
1037 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1038 (mask_gather_load<mode>): New insns.
1040 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1041 Alan Hayward <alan.hayward@arm.com>
1042 David Sherwood <david.sherwood@arm.com>
1044 * optabs.def (fold_left_plus_optab): New optab.
1045 * doc/md.texi (fold_left_plus_@var{m}): Document.
1046 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
1047 * internal-fn.c (fold_left_direct): Define.
1048 (expand_fold_left_optab_fn): Likewise.
1049 (direct_fold_left_optab_supported_p): Likewise.
1050 * fold-const-call.c (fold_const_fold_left): New function.
1051 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
1052 * tree-parloops.c (valid_reduction_p): New function.
1053 (gather_scalar_reductions): Use it.
1054 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
1055 (vect_finish_replace_stmt): Declare.
1056 * tree-vect-loop.c (fold_left_reduction_fn): New function.
1057 (needs_fold_left_reduction_p): New function, split out from...
1058 (vect_is_simple_reduction): ...here. Accept reductions that
1059 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
1060 (vect_force_simple_reduction): Also store the reduction type in
1061 the assignment's STMT_VINFO_REDUC_TYPE.
1062 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
1063 (merge_with_identity): New function.
1064 (vect_expand_fold_left): Likewise.
1065 (vectorize_fold_left_reduction): Likewise.
1066 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
1067 scalar phi in place for it. Check for target support and reject
1068 cases that would reassociate the operation. Defer the transform
1069 phase to vectorize_fold_left_reduction.
1070 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
1071 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
1072 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
1074 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1076 * tree-if-conv.c (predicate_mem_writes): Remove redundant
1077 call to ifc_temp_var.
1079 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1080 Alan Hayward <alan.hayward@arm.com>
1081 David Sherwood <david.sherwood@arm.com>
1083 * target.def (legitimize_address_displacement): Take the original
1084 offset as a poly_int.
1085 * targhooks.h (default_legitimize_address_displacement): Update
1086 accordingly.
1087 * targhooks.c (default_legitimize_address_displacement): Likewise.
1088 * doc/tm.texi: Regenerate.
1089 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
1090 as an argument, moving assert of ad->disp == ad->disp_term to...
1091 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
1092 Try calling targetm.legitimize_address_displacement before expanding
1093 the address rather than afterwards, and adjust for the new interface.
1094 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
1095 Match the new hook interface. Handle SVE addresses.
1096 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
1097 new hook interface.
1099 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1101 * Makefile.in (OBJS): Add early-remat.o.
1102 * target.def (select_early_remat_modes): New hook.
1103 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1104 * doc/tm.texi: Regenerate.
1105 * targhooks.h (default_select_early_remat_modes): Declare.
1106 * targhooks.c (default_select_early_remat_modes): New function.
1107 * timevar.def (TV_EARLY_REMAT): New timevar.
1108 * passes.def (pass_early_remat): New pass.
1109 * tree-pass.h (make_pass_early_remat): Declare.
1110 * early-remat.c: New file.
1111 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1112 function.
1113 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1115 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1116 Alan Hayward <alan.hayward@arm.com>
1117 David Sherwood <david.sherwood@arm.com>
1119 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1120 vfm1 with a bound_epilog parameter.
1121 (vect_do_peeling): Update calls accordingly, and move the prologue
1122 call earlier in the function. Treat the base bound_epilog as 0 for
1123 fully-masked loops and retain vf - 1 for other loops. Add 1 to
1124 this base when peeling for gaps.
1125 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1126 with fully-masked loops.
1127 (vect_estimate_min_profitable_iters): Handle the single peeled
1128 iteration in that case.
1130 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1131 Alan Hayward <alan.hayward@arm.com>
1132 David Sherwood <david.sherwood@arm.com>
1134 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1135 single-element interleaving even if the size is not a power of 2.
1136 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1137 accesses for single-element interleaving if the group size is
1138 not a power of 2.
1140 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1141 Alan Hayward <alan.hayward@arm.com>
1142 David Sherwood <david.sherwood@arm.com>
1144 * doc/md.texi (fold_extract_last_@var{m}): Document.
1145 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1146 * optabs.def (fold_extract_last_optab): New optab.
1147 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1148 * internal-fn.c (fold_extract_direct): New macro.
1149 (expand_fold_extract_optab_fn): Likewise.
1150 (direct_fold_extract_optab_supported_p): Likewise.
1151 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1152 * tree-vect-loop.c (vect_model_reduction_cost): Handle
1153 EXTRACT_LAST_REDUCTION.
1154 (get_initial_def_for_reduction): Do not create an initial vector
1155 for EXTRACT_LAST_REDUCTION reductions.
1156 (vectorizable_reduction): Leave the scalar phi in place for
1157 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
1158 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
1159 epilogue code for EXTRACT_LAST_REDUCTION and defer the
1160 transform phase to vectorizable_condition.
1161 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1162 split out from...
1163 (vect_finish_stmt_generation): ...here.
1164 (vect_finish_replace_stmt): New function.
1165 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1166 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1167 pattern.
1168 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1170 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1171 Alan Hayward <alan.hayward@arm.com>
1172 David Sherwood <david.sherwood@arm.com>
1174 * doc/md.texi (extract_last_@var{m}): Document.
1175 * optabs.def (extract_last_optab): New optab.
1176 * internal-fn.def (EXTRACT_LAST): New internal function.
1177 * internal-fn.c (cond_unary_direct): New macro.
1178 (expand_cond_unary_optab_fn): Likewise.
1179 (direct_cond_unary_optab_supported_p): Likewise.
1180 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1181 loops using EXTRACT_LAST.
1182 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1183 (extract_last_<mode>): ...this optab.
1184 (vec_extract<mode><Vel>): Update accordingly.
1186 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1187 Alan Hayward <alan.hayward@arm.com>
1188 David Sherwood <david.sherwood@arm.com>
1190 * target.def (empty_mask_is_expensive): New hook.
1191 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1192 * doc/tm.texi: Regenerate.
1193 * targhooks.h (default_empty_mask_is_expensive): Declare.
1194 * targhooks.c (default_empty_mask_is_expensive): New function.
1195 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1196 if the target says that empty masks are expensive.
1197 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1198 New function.
1199 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1201 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1202 Alan Hayward <alan.hayward@arm.com>
1203 David Sherwood <david.sherwood@arm.com>
1205 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1206 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1207 (vect_use_loop_mask_for_alignment_p): New function.
1208 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1209 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1210 niters_skip argument. Make sure that the first niters_skip elements
1211 of the first iteration are inactive.
1212 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1213 Update call to vect_set_loop_masks_directly.
1214 (get_misalign_in_elems): New function, split out from...
1215 (vect_gen_prolog_loop_niters): ...here.
1216 (vect_update_init_of_dr): Take a code argument that specifies whether
1217 the adjustment should be added or subtracted.
1218 (vect_update_init_of_drs): Likewise.
1219 (vect_prepare_for_masked_peels): New function.
1220 (vect_do_peeling): Skip prologue peeling if we're using a mask
1221 instead. Update call to vect_update_inits_of_drs.
1222 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1223 mask_skip_niters.
1224 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1225 alignment. Do not include the number of peeled iterations in
1226 the minimum threshold in that case.
1227 (vectorizable_induction): Adjust the start value down by
1228 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1229 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1230 Take the number of skipped iterations into account when calculating
1231 the loop bounds.
1232 * tree-vect-stmts.c (vect_gen_while_not): New function.
1234 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1235 Alan Hayward <alan.hayward@arm.com>
1236 David Sherwood <david.sherwood@arm.com>
1238 * doc/sourcebuild.texi (vect_fully_masked): Document.
1239 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1240 default value to 0.
1241 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1242 split out from...
1243 (vect_analyze_loop_2): ...here. Don't check the vectorization
1244 factor against the number of loop iterations if the loop is
1245 fully-masked.
1247 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1248 Alan Hayward <alan.hayward@arm.com>
1249 David Sherwood <david.sherwood@arm.com>
1251 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1252 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1253 (dump_groups): Update accordingly.
1254 (iv_use::mem_type): New member variable.
1255 (address_p): New function.
1256 (record_use): Add a mem_type argument and initialize the new
1257 mem_type field.
1258 (record_group_use): Add a mem_type argument. Use address_p.
1259 Remove obsolete null checks of base_object. Update call to record_use.
1260 (find_interesting_uses_op): Update call to record_group_use.
1261 (find_interesting_uses_cond): Likewise.
1262 (find_interesting_uses_address): Likewise.
1263 (get_mem_type_for_internal_fn): New function.
1264 (find_address_like_use): Likewise.
1265 (find_interesting_uses_stmt): Try find_address_like_use before
1266 calling find_interesting_uses_op.
1267 (addr_offset_valid_p): Use the iv mem_type field as the type
1268 of the addressed memory.
1269 (add_autoinc_candidates): Likewise.
1270 (get_address_cost): Likewise.
1271 (split_small_address_groups_p): Use address_p.
1272 (split_address_groups): Likewise.
1273 (add_iv_candidate_for_use): Likewise.
1274 (autoinc_possible_for_pair): Likewise.
1275 (rewrite_groups): Likewise.
1276 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1277 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1278 (get_alias_ptr_type_for_ptr_address): New function.
1279 (rewrite_use_address): Rewrite address uses in calls that were
1280 identified by find_address_like_use.
1282 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1283 Alan Hayward <alan.hayward@arm.com>
1284 David Sherwood <david.sherwood@arm.com>
1286 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1287 TARGET_MEM_REFs.
1288 * gimple-expr.h (is_gimple_addressable: Likewise.
1289 * gimple-expr.c (is_gimple_address): Likewise.
1290 * internal-fn.c (expand_call_mem_ref): New function.
1291 (expand_mask_load_optab_fn): Use it.
1292 (expand_mask_store_optab_fn): Likewise.
1294 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1295 Alan Hayward <alan.hayward@arm.com>
1296 David Sherwood <david.sherwood@arm.com>
1298 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1299 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1300 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1301 (cond_umax@var{mode}): Document.
1302 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1303 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1304 (cond_umin_optab, cond_umax_optab): New optabs.
1305 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1306 (COND_IOR, COND_XOR): New internal functions.
1307 * internal-fn.h (get_conditional_internal_fn): Declare.
1308 * internal-fn.c (cond_binary_direct): New macro.
1309 (expand_cond_binary_optab_fn): Likewise.
1310 (direct_cond_binary_optab_supported_p): Likewise.
1311 (get_conditional_internal_fn): New function.
1312 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1313 Cope with reduction statements that are vectorized as calls rather
1314 than assignments.
1315 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1316 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1317 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1318 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1319 (UNSPEC_COND_EOR): New unspecs.
1320 (optab): Add mappings for them.
1321 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1322 (sve_int_op, sve_fp_op): New int attributes.
1324 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1325 Alan Hayward <alan.hayward@arm.com>
1326 David Sherwood <david.sherwood@arm.com>
1328 * optabs.def (while_ult_optab): New optab.
1329 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1330 * internal-fn.def (WHILE_ULT): New internal function.
1331 * internal-fn.h (direct_internal_fn_supported_p): New override
1332 that takes two types as argument.
1333 * internal-fn.c (while_direct): New macro.
1334 (expand_while_optab_fn): New function.
1335 (convert_optab_supported_p): Likewise.
1336 (direct_while_optab_supported_p): New macro.
1337 * wide-int.h (wi::udiv_ceil): New function.
1338 * tree-vectorizer.h (rgroup_masks): New structure.
1339 (vec_loop_masks): New typedef.
1340 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1341 and fully_masked_p.
1342 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1343 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1344 (vect_max_vf): New function.
1345 (slpeel_make_loop_iterate_ntimes): Delete.
1346 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1347 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1348 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1349 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1350 internal-fn.h, stor-layout.h and optabs-query.h.
1351 (vect_set_loop_mask): New function.
1352 (add_preheader_seq): Likewise.
1353 (add_header_seq): Likewise.
1354 (interleave_supported_p): Likewise.
1355 (vect_maybe_permute_loop_masks): Likewise.
1356 (vect_set_loop_masks_directly): Likewise.
1357 (vect_set_loop_condition_masked): Likewise.
1358 (vect_set_loop_condition_unmasked): New function, split out from
1359 slpeel_make_loop_iterate_ntimes.
1360 (slpeel_make_loop_iterate_ntimes): Rename to..
1361 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1362 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1363 (vect_do_peeling): Update call accordingly.
1364 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1365 loops.
1366 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1367 mask_compare_type, can_fully_mask_p and fully_masked_p.
1368 (release_vec_loop_masks): New function.
1369 (_loop_vec_info): Use it to free the loop masks.
1370 (can_produce_all_loop_masks_p): New function.
1371 (vect_get_max_nscalars_per_iter): Likewise.
1372 (vect_verify_full_masking): Likewise.
1373 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1374 retries, and free the mask rgroups before retrying. Check loop-wide
1375 reasons for disallowing fully-masked loops. Make the final decision
1376 about whether use a fully-masked loop or not.
1377 (vect_estimate_min_profitable_iters): Do not assume that peeling
1378 for the number of iterations will be needed for fully-masked loops.
1379 (vectorizable_reduction): Disable fully-masked loops.
1380 (vectorizable_live_operation): Likewise.
1381 (vect_halve_mask_nunits): New function.
1382 (vect_double_mask_nunits): Likewise.
1383 (vect_record_loop_mask): Likewise.
1384 (vect_get_loop_mask): Likewise.
1385 (vect_transform_loop): Handle the case in which the final loop
1386 iteration might handle a partial vector. Call vect_set_loop_condition
1387 instead of slpeel_make_loop_iterate_ntimes.
1388 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1389 (check_load_store_masking): New function.
1390 (prepare_load_store_mask): Likewise.
1391 (vectorizable_store): Handle fully-masked loops.
1392 (vectorizable_load): Likewise.
1393 (supportable_widening_operation): Use vect_halve_mask_nunits for
1394 booleans.
1395 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1396 (vect_gen_while): New function.
1397 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1398 (aarch64_uqdec<mode>): New insn.
1400 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1401 Alan Hayward <alan.hayward@arm.com>
1402 David Sherwood <david.sherwood@arm.com>
1404 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1405 (reduc_xor_scal_optab): New optabs.
1406 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1407 (reduc_xor_scal_@var{m}): Document.
1408 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1409 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1410 internal functions.
1411 * fold-const-call.c (fold_const_call): Handle them.
1412 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1413 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1414 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1415 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1416 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1417 (UNSPEC_XORV): New unspecs.
1418 (optab): Add entries for them.
1419 (BITWISEV): New int iterator.
1420 (bit_reduc_op): New int attributes.
1422 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1423 Alan Hayward <alan.hayward@arm.com>
1424 David Sherwood <david.sherwood@arm.com>
1426 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1427 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1428 * optabs.def (vec_shl_insert_optab): New optab.
1429 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1430 (duplicate_and_interleave): Likewise.
1431 * tree-vect-loop.c: Include internal-fn.h.
1432 (neutral_op_for_slp_reduction): New function, split out from
1433 get_initial_defs_for_reduction.
1434 (get_initial_def_for_reduction): Handle option 2 for variable-length
1435 vectors by loading the neutral value into a vector and then shifting
1436 the initial value into element 0.
1437 (get_initial_defs_for_reduction): Replace the code argument with
1438 the neutral value calculated by neutral_op_for_slp_reduction.
1439 Use gimple_build_vector for constant-length vectors.
1440 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1441 but the first group_size elements have a neutral value.
1442 Use duplicate_and_interleave otherwise.
1443 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1444 Update call to get_initial_defs_for_reduction. Handle SLP
1445 reductions for variable-length vectors by creating one vector
1446 result for each scalar result, with the elements associated
1447 with other scalar results stubbed out with the neutral value.
1448 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1449 Require IFN_VEC_SHL_INSERT for double reductions on
1450 variable-length vectors, or SLP reductions that have
1451 a neutral value. Require can_duplicate_and_interleave_p
1452 support for variable-length unchained SLP reductions if there
1453 is no neutral value, such as for MIN/MAX reductions. Also require
1454 the number of vector elements to be a multiple of the number of
1455 SLP statements when doing variable-length unchained SLP reductions.
1456 Update call to vect_create_epilog_for_reduction.
1457 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1458 and remove initial values.
1459 (duplicate_and_interleave): Make public.
1460 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1461 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1463 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1464 Alan Hayward <alan.hayward@arm.com>
1465 David Sherwood <david.sherwood@arm.com>
1467 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1468 (can_duplicate_and_interleave_p): New function.
1469 (vect_get_and_check_slp_defs): Take the vector of statements
1470 rather than just the current one. Remove excess parentheses.
1471 Restriction rejectinon of vect_constant_def and vect_external_def
1472 for variable-length vectors to boolean types, or types for which
1473 can_duplicate_and_interleave_p is false.
1474 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1475 (duplicate_and_interleave): New function.
1476 (vect_get_constant_vectors): Use gimple_build_vector for
1477 constant-length vectors and suitable variable-length constant
1478 vectors. Use duplicate_and_interleave for other variable-length
1479 vectors. Don't defer the update when inserting new statements.
1481 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1482 Alan Hayward <alan.hayward@arm.com>
1483 David Sherwood <david.sherwood@arm.com>
1485 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1486 min_profitable_iters doesn't go negative.
1488 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1489 Alan Hayward <alan.hayward@arm.com>
1490 David Sherwood <david.sherwood@arm.com>
1492 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1493 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1494 * optabs.def (vec_mask_load_lanes_optab): New optab.
1495 (vec_mask_store_lanes_optab): Likewise.
1496 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1497 (MASK_STORE_LANES): Likewise.
1498 * internal-fn.c (mask_load_lanes_direct): New macro.
1499 (mask_store_lanes_direct): Likewise.
1500 (expand_mask_load_optab_fn): Handle masked operations.
1501 (expand_mask_load_lanes_optab_fn): New macro.
1502 (expand_mask_store_optab_fn): Handle masked operations.
1503 (expand_mask_store_lanes_optab_fn): New macro.
1504 (direct_mask_load_lanes_optab_supported_p): Likewise.
1505 (direct_mask_store_lanes_optab_supported_p): Likewise.
1506 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1507 parameter.
1508 (vect_load_lanes_supported): Likewise.
1509 * tree-vect-data-refs.c (strip_conversion): New function.
1510 (can_group_stmts_p): Likewise.
1511 (vect_analyze_data_ref_accesses): Use it instead of checking
1512 for a pair of assignments.
1513 (vect_store_lanes_supported): Take a masked_p parameter.
1514 (vect_load_lanes_supported): Likewise.
1515 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1516 vect_store_lanes_supported and vect_load_lanes_supported.
1517 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1518 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1519 parameter. Don't allow gaps for masked accesses.
1520 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1521 and vect_load_lanes_supported.
1522 (get_load_store_type): Take a masked_p parameter and update
1523 call to get_group_load_store_type.
1524 (vectorizable_store): Update call to get_load_store_type.
1525 Handle IFN_MASK_STORE_LANES.
1526 (vectorizable_load): Update call to get_load_store_type.
1527 Handle IFN_MASK_LOAD_LANES.
1529 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1530 Alan Hayward <alan.hayward@arm.com>
1531 David Sherwood <david.sherwood@arm.com>
1533 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1534 modes for SVE.
1535 * config/aarch64/aarch64-protos.h
1536 (aarch64_sve_struct_memory_operand_p): Declare.
1537 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1538 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1539 (VPRED, vpred): Handle SVE structure modes.
1540 * config/aarch64/constraints.md (Utx): New constraint.
1541 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1542 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1543 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1544 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1545 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1546 structure modes. Split into pieces after RA.
1547 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1548 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1549 New patterns.
1550 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1551 SVE structure modes.
1552 (aarch64_classify_address): Likewise.
1553 (sizetochar): Move earlier in file.
1554 (aarch64_print_operand): Handle SVE register lists.
1555 (aarch64_array_mode): New function.
1556 (aarch64_sve_struct_memory_operand_p): Likewise.
1557 (TARGET_ARRAY_MODE): Redefine.
1559 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1560 Alan Hayward <alan.hayward@arm.com>
1561 David Sherwood <david.sherwood@arm.com>
1563 * target.def (array_mode): New target hook.
1564 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1565 * doc/tm.texi: Regenerate.
1566 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1567 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1568 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1569 targetm.array_mode.
1570 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1571 type sizes.
1573 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1574 Alan Hayward <alan.hayward@arm.com>
1575 David Sherwood <david.sherwood@arm.com>
1577 * fold-const.c (fold_binary_loc): Check the argument types
1578 rather than the result type when testing for a vector operation.
1580 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1582 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1583 * doc/tm.texi: Regenerate.
1585 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1586 Alan Hayward <alan.hayward@arm.com>
1587 David Sherwood <david.sherwood@arm.com>
1589 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1590 (sve): Document new AArch64 extension.
1591 * doc/md.texi (w): Extend the description of the AArch64
1592 constraint to include SVE vectors.
1593 (Upl, Upa): Document new AArch64 predicate constraints.
1594 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1595 enum.
1596 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1597 (msve-vector-bits=): New option.
1598 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1599 SVE when these are disabled.
1600 (sve): New extension.
1601 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1602 modes. Adjust their number of units based on aarch64_sve_vg.
1603 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1604 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1605 aarch64_addr_query_type.
1606 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1607 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1608 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1609 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1610 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1611 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1612 (aarch64_simd_imm_zero_p): Delete.
1613 (aarch64_check_zero_based_sve_index_immediate): Declare.
1614 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1615 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1616 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1617 (aarch64_sve_float_mul_immediate_p): Likewise.
1618 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1619 rather than an rtx.
1620 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1621 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1622 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1623 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1624 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1625 (aarch64_regmode_natural_size): Likewise.
1626 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1627 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1628 left one place.
1629 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1630 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1631 for VG and the SVE predicate registers.
1632 (V_ALIASES): Add a "z"-prefixed alias.
1633 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1634 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1635 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1636 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1637 (REG_CLASS_NAMES): Add entries for them.
1638 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1639 and the predicate registers.
1640 (aarch64_sve_vg): Declare.
1641 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1642 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1643 (REGMODE_NATURAL_SIZE): Define.
1644 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1645 SVE macros.
1646 * config/aarch64/aarch64.c: Include cfgrtl.h.
1647 (simd_immediate_info): Add a constructor for series vectors,
1648 and an associated step field.
1649 (aarch64_sve_vg): New variable.
1650 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1651 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1652 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1653 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1654 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1655 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1656 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1657 (aarch64_get_mask_mode): New functions.
1658 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1659 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1660 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1661 predicate modes and predicate registers. Explicitly restrict
1662 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1663 to store a vector mode if it is recognized by
1664 aarch64_classify_vector_mode.
1665 (aarch64_regmode_natural_size): New function.
1666 (aarch64_hard_regno_caller_save_mode): Return the original mode
1667 for predicates.
1668 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1669 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1670 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1671 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1672 functions.
1673 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1674 does not overlap dest if the function is frame-related. Handle
1675 SVE constants.
1676 (aarch64_split_add_offset): New function.
1677 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1678 them aarch64_add_offset.
1679 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1680 and update call to aarch64_sub_sp.
1681 (aarch64_add_cfa_expression): New function.
1682 (aarch64_expand_prologue): Pass extra temporary registers to the
1683 functions above. Handle the case in which we need to emit new
1684 DW_CFA_expressions for registers that were originally saved
1685 relative to the stack pointer, but now have to be expressed
1686 relative to the frame pointer.
1687 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1688 functions above.
1689 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1690 IP0 and IP1 values for SVE frames.
1691 (aarch64_expand_vec_series): New function.
1692 (aarch64_expand_sve_widened_duplicate): Likewise.
1693 (aarch64_expand_sve_const_vector): Likewise.
1694 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1695 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1696 into the register, rather than emitting a SET directly.
1697 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1698 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1699 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1700 (offset_9bit_signed_scaled_p): New functions.
1701 (aarch64_replicate_bitmask_imm): New function.
1702 (aarch64_bitmask_imm): Use it.
1703 (aarch64_cannot_force_const_mem): Reject expressions involving
1704 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1705 (aarch64_classify_index): Handle SVE indices, by requiring
1706 a plain register index with a scale that matches the element size.
1707 (aarch64_classify_address): Handle SVE addresses. Assert that
1708 the mode of the address is VOIDmode or an integer mode.
1709 Update call to aarch64_classify_symbol.
1710 (aarch64_classify_symbolic_expression): Update call to
1711 aarch64_classify_symbol.
1712 (aarch64_const_vec_all_in_range_p): New function.
1713 (aarch64_print_vector_float_operand): Likewise.
1714 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1715 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1716 and the FP immediates 1.0 and 0.5.
1717 (aarch64_print_address_internal): Handle SVE addresses.
1718 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1719 (aarch64_regno_regclass): Handle predicate registers.
1720 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1721 data modes.
1722 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1723 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1724 (aarch64_convert_sve_vector_bits): New function.
1725 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1726 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1727 rather than an rtx.
1728 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1729 Handle SVE vector and predicate modes. Accept VL-based constants
1730 that need only one temporary register, and VL offsets that require
1731 no temporary registers.
1732 (aarch64_conditional_register_usage): Mark the predicate registers
1733 as fixed if SVE isn't available.
1734 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1735 Return true for SVE vector and predicate modes.
1736 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1737 rather than an unsigned int. Handle SVE modes.
1738 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1739 SVE modes.
1740 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1741 if SVE is enabled.
1742 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1743 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1744 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1745 (aarch64_sve_float_mul_immediate_p): New functions.
1746 (aarch64_sve_valid_immediate): New function.
1747 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1748 Explicitly reject structure modes. Check for INDEX constants.
1749 Handle PTRUE and PFALSE constants.
1750 (aarch64_check_zero_based_sve_index_immediate): New function.
1751 (aarch64_simd_imm_zero_p): Delete.
1752 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1753 vector modes. Accept constants in the range of CNT[BHWD].
1754 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1755 ask for an Advanced SIMD mode.
1756 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1757 (aarch64_simd_vector_alignment): Handle SVE predicates.
1758 (aarch64_vectorize_preferred_vector_alignment): New function.
1759 (aarch64_simd_vector_alignment_reachable): Use it instead of
1760 the vector size.
1761 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1762 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1763 functions.
1764 (MAX_VECT_LEN): Delete.
1765 (expand_vec_perm_d): Add a vec_flags field.
1766 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1767 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1768 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1769 for SVE modes.
1770 (aarch64_evpc_rev): Rename to...
1771 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1772 (aarch64_evpc_rev_global): New function.
1773 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1774 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1775 MAX_VECT_LEN.
1776 (aarch64_evpc_sve_tbl): New function.
1777 (aarch64_expand_vec_perm_const_1): Update after rename of
1778 aarch64_evpc_rev. Handle SVE permutes too, trying
1779 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1780 than aarch64_evpc_tbl.
1781 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1782 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1783 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1784 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1785 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1786 (aarch64_expand_sve_vcond): New functions.
1787 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1788 of aarch64_vector_mode_p.
1789 (aarch64_dwarf_poly_indeterminate_value): New function.
1790 (aarch64_compute_pressure_classes): Likewise.
1791 (aarch64_can_change_mode_class): Likewise.
1792 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1793 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1794 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1795 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1796 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1797 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1798 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1799 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1800 constraints.
1801 (Dn, Dl, Dr): Accept const as well as const_vector.
1802 (Dz): Likewise. Compare against CONST0_RTX.
1803 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1804 of "vector" where appropriate.
1805 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1806 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1807 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1808 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1809 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1810 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1811 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1812 (v_int_equiv): Extend to SVE modes.
1813 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1814 mode attributes.
1815 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1816 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1817 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1818 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1819 (SVE_COND_FP_CMP): New int iterators.
1820 (perm_hilo): Handle the new unpack unspecs.
1821 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1822 attributes.
1823 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1824 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1825 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1826 (aarch64_equality_operator, aarch64_constant_vector_operand)
1827 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1828 (aarch64_sve_nonimmediate_operand): Likewise.
1829 (aarch64_sve_general_operand): Likewise.
1830 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1831 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1832 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1833 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1834 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1835 (aarch64_sve_float_arith_immediate): Likewise.
1836 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1837 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1838 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1839 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1840 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1841 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1842 (aarch64_sve_float_arith_operand): Likewise.
1843 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1844 (aarch64_sve_float_mul_operand): Likewise.
1845 (aarch64_sve_vec_perm_operand): Likewise.
1846 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1847 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1848 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1849 as well as const_vector.
1850 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1851 in file. Use CONST0_RTX and CONSTM1_RTX.
1852 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1853 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1854 Use aarch64_simd_imm_zero.
1855 * config/aarch64/aarch64-sve.md: New file.
1856 * config/aarch64/aarch64.md: Include it.
1857 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1858 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1859 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1860 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1861 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1862 (sve): New attribute.
1863 (enabled): Disable instructions with the sve attribute unless
1864 TARGET_SVE.
1865 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1866 aarch64_expand_mov_immediate.
1867 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1868 CNT[BHSD] immediates.
1869 (movti): Split CONST_POLY_INT moves into two halves.
1870 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1871 Split additions that need a temporary here if the destination
1872 is the stack pointer.
1873 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1874 (*add<mode>3_poly_1): New instruction.
1875 (set_clobber_cc): New expander.
1877 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1879 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1880 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1881 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1882 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1883 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1884 Change innermode from fixed_mode_size to machine_mode.
1885 (simplify_subreg): Update call accordingly. Handle a constant-sized
1886 subreg of a variable-length CONST_VECTOR.
1888 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1889 Alan Hayward <alan.hayward@arm.com>
1890 David Sherwood <david.sherwood@arm.com>
1892 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1893 (add_offset_to_base): New function, split out from...
1894 (create_mem_ref): ...here. When handling a scale other than 1,
1895 check first whether the address is valid without the offset.
1896 Add it into the base if so, leaving the index and scale as-is.
1898 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1900 PR c++/83778
1901 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1902 fold_for_warn before checking if arg2 is INTEGER_CST.
1904 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1906 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1907 (store_multiple_operation): Delete.
1908 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1909 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1910 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1911 guarded by TARGET_STRING.
1912 (rs6000_output_load_multiple): Delete.
1913 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1914 OPTION_MASK_STRING / TARGET_STRING handling.
1915 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1916 (const rs6000_opt_masks) <"string">: Change mask to 0.
1917 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1918 (MASK_STRING): Delete.
1919 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1920 parts. Simplify.
1921 (load_multiple): Delete.
1922 (*ldmsi8): Delete.
1923 (*ldmsi7): Delete.
1924 (*ldmsi6): Delete.
1925 (*ldmsi5): Delete.
1926 (*ldmsi4): Delete.
1927 (*ldmsi3): Delete.
1928 (store_multiple): Delete.
1929 (*stmsi8): Delete.
1930 (*stmsi7): Delete.
1931 (*stmsi6): Delete.
1932 (*stmsi5): Delete.
1933 (*stmsi4): Delete.
1934 (*stmsi3): Delete.
1935 (movmemsi_8reg): Delete.
1936 (corresponding unnamed define_insn): Delete.
1937 (movmemsi_6reg): Delete.
1938 (corresponding unnamed define_insn): Delete.
1939 (movmemsi_4reg): Delete.
1940 (corresponding unnamed define_insn): Delete.
1941 (movmemsi_2reg): Delete.
1942 (corresponding unnamed define_insn): Delete.
1943 (movmemsi_1reg): Delete.
1944 (corresponding unnamed define_insn): Delete.
1945 * config/rs6000/rs6000.opt (mno-string): New.
1946 (mstring): Replace by deprecation warning stub.
1947 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1949 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1951 * regrename.c (regrename_do_replace): If replacing the same
1952 reg multiple times, try to reuse last created gen_raw_REG.
1954 PR debug/81155
1955 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1956 main to workaround a bug in GDB.
1958 2018-01-12 Tom de Vries <tom@codesourcery.com>
1960 PR target/83737
1961 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1963 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1965 PR rtl-optimization/80481
1966 * ira-color.c (get_cap_member): New function.
1967 (allocnos_conflict_by_live_ranges_p): Use it.
1968 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1969 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1971 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1973 PR target/83628
1974 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1975 (*saddl_se_1): Ditto.
1976 (*ssubsi_1): Ditto.
1977 (*ssubl_se_1): Ditto.
1979 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1981 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1982 rather than wi::to_widest for DR_INITs.
1983 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1984 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1985 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1986 INTEGER_CSTs.
1987 (vect_analyze_group_access_1): Note that here.
1989 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1991 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1992 polynomial type sizes.
1994 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1996 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1997 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1998 (gimple_add_tmp_var): Likewise.
2000 2018-01-12 Martin Liska <mliska@suse.cz>
2002 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2003 (gimple_alloc_sizes): Likewise.
2004 (dump_gimple_statistics): Use PRIu64 in printf format.
2005 * gimple.h: Change uint64_t to int.
2007 2018-01-12 Martin Liska <mliska@suse.cz>
2009 * tree-core.h: Use uint64_t instead of int.
2010 * tree.c (tree_node_counts): Likewise.
2011 (tree_node_sizes): Likewise.
2012 (dump_tree_statistics): Use PRIu64 in printf format.
2014 2018-01-12 Martin Liska <mliska@suse.cz>
2016 * Makefile.in: As qsort_chk is implemented in vec.c, add
2017 vec.o to linkage of gencfn-macros.
2018 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2019 passing the info to record_node_allocation_statistics.
2020 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2021 and pass the info.
2022 * ggc-common.c (struct ggc_usage): Add operator== and use
2023 it in operator< and compare function.
2024 * mem-stats.h (struct mem_usage): Likewise.
2025 * vec.c (struct vec_usage): Remove operator< and compare
2026 function. Can be simply inherited.
2028 2018-01-12 Martin Jambor <mjambor@suse.cz>
2030 PR target/81616
2031 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2032 * tree-ssa-math-opts.c: Include domwalk.h.
2033 (convert_mult_to_fma_1): New function.
2034 (fma_transformation_info): New type.
2035 (fma_deferring_state): Likewise.
2036 (cancel_fma_deferring): New function.
2037 (result_of_phi): Likewise.
2038 (last_fma_candidate_feeds_initial_phi): Likewise.
2039 (convert_mult_to_fma): Added deferring logic, split actual
2040 transformation to convert_mult_to_fma_1.
2041 (math_opts_dom_walker): New type.
2042 (math_opts_dom_walker::after_dom_children): New method, body moved
2043 here from pass_optimize_widening_mul::execute, added deferring logic
2044 bits.
2045 (pass_optimize_widening_mul::execute): Moved most of code to
2046 math_opts_dom_walker::after_dom_children.
2047 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
2048 * config/i386/i386.c (ix86_option_override_internal): Added
2049 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
2051 2018-01-12 Richard Biener <rguenther@suse.de>
2053 PR debug/83157
2054 * dwarf2out.c (gen_variable_die): Do not reset old_die for
2055 inline instance vars.
2057 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
2059 PR target/81819
2060 * config/rx/rx.c (rx_is_restricted_memory_address):
2061 Handle SUBREG case.
2063 2018-01-12 Richard Biener <rguenther@suse.de>
2065 PR tree-optimization/80846
2066 * target.def (split_reduction): New target hook.
2067 * targhooks.c (default_split_reduction): New function.
2068 * targhooks.h (default_split_reduction): Declare.
2069 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
2070 target requests first reduce vectors by combining low and high
2071 parts.
2072 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
2073 (get_vectype_for_scalar_type_and_size): Export.
2074 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
2075 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
2076 * doc/tm.texi: Regenerate.
2077 * config/i386/i386.c (ix86_split_reduction): Implement
2078 TARGET_VECTORIZE_SPLIT_REDUCTION.
2080 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2082 PR target/83368
2083 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
2084 in PIC mode except for TARGET_VXWORKS_RTP.
2085 * config/sparc/sparc.c: Include cfgrtl.h.
2086 (TARGET_INIT_PIC_REG): Define.
2087 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
2088 (sparc_pic_register_p): New predicate.
2089 (sparc_legitimate_address_p): Use it.
2090 (sparc_legitimize_pic_address): Likewise.
2091 (sparc_delegitimize_address): Likewise.
2092 (sparc_mode_dependent_address_p): Likewise.
2093 (gen_load_pcrel_sym): Remove 4th parameter.
2094 (load_got_register): Adjust call to above. Remove obsolete stuff.
2095 (sparc_expand_prologue): Do not call load_got_register here.
2096 (sparc_flat_expand_prologue): Likewise.
2097 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2098 (sparc_use_pseudo_pic_reg): New function.
2099 (sparc_init_pic_reg): Likewise.
2100 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2101 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2103 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
2105 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2106 Add item for branch_cost.
2108 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2110 PR rtl-optimization/83565
2111 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2112 not extend the result to a larger mode for rotate operations.
2113 (num_sign_bit_copies1): Likewise.
2115 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2117 PR target/40411
2118 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2119 -symbolic.
2120 Use values-Xc.o for -pedantic.
2121 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2123 2018-01-12 Martin Liska <mliska@suse.cz>
2125 PR ipa/83054
2126 * ipa-devirt.c (final_warning_record::grow_type_warnings):
2127 New function.
2128 (possible_polymorphic_call_targets): Use it.
2129 (ipa_devirt): Likewise.
2131 2018-01-12 Martin Liska <mliska@suse.cz>
2133 * profile-count.h (enum profile_quality): Use 0 as invalid
2134 enum value of profile_quality.
2136 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
2138 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2139 -mext-string options.
2141 2018-01-12 Richard Biener <rguenther@suse.de>
2143 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2144 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2145 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2146 Likewise.
2147 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2149 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
2151 * configure.ac (--with-long-double-format): Add support for the
2152 configuration option to change the default long double format on
2153 PowerPC systems.
2154 * config.gcc (powerpc*-linux*-*): Likewise.
2155 * configure: Regenerate.
2156 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2157 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2158 used without modification.
2160 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2162 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2163 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2164 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2165 MISC_BUILTIN_SPEC_BARRIER.
2166 (rs6000_init_builtins): Likewise.
2167 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2168 enum value.
2169 (speculation_barrier): New define_insn.
2170 * doc/extend.texi: Document __builtin_speculation_barrier.
2172 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2174 PR target/83203
2175 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2176 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2177 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2178 iterators.
2179 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2180 integral modes instead of "ss" and "sd".
2181 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2182 vectors with 32-bit and 64-bit elements.
2183 (vecdupssescalarmodesuffix): New mode attribute.
2184 (vec_dup<mode>): Use it.
2186 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2188 PR target/83330
2189 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2190 frame if argument is passed on stack.
2192 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2194 PR target/82682
2195 * ree.c (combine_reaching_defs): Optimize also
2196 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2197 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2199 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2201 PR middle-end/83189
2202 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2204 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2206 PR middle-end/83718
2207 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2208 after they are computed.
2210 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2212 PR tree-optimization/83695
2213 * gimple-loop-linterchange.cc
2214 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2215 reset cached scev information after interchange.
2216 (pass_linterchange::execute): Remove call to scev_reset_htab.
2218 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2220 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2221 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2222 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2223 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2224 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2225 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2226 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2227 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2228 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2229 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2230 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2231 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2232 (V_lane_reg): Likewise.
2233 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2234 New define_expand.
2235 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2236 (vfmal_lane_low<mode>_intrinsic,
2237 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2238 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2239 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2240 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2241 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2242 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2244 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2246 * config/arm/arm-cpus.in (fp16fml): New feature.
2247 (ALL_SIMD): Add fp16fml.
2248 (armv8.2-a): Add fp16fml as an option.
2249 (armv8.3-a): Likewise.
2250 (armv8.4-a): Add fp16fml as part of fp16.
2251 * config/arm/arm.h (TARGET_FP16FML): Define.
2252 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2253 when appropriate.
2254 * config/arm/arm-modes.def (V2HF): Define.
2255 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2256 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2257 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2258 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2259 vfmsl_low, vfmsl_high): New set of builtins.
2260 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2261 (vfml_op): New code attribute.
2262 (VFMLHALVES): New int iterator.
2263 (VFML, VFMLSEL): New mode attributes.
2264 (V_reg): Define mapping for V2HF.
2265 (V_hi, V_lo): New mode attributes.
2266 (VF_constraint): Likewise.
2267 (vfml_half, vfml_half_selector): New int attributes.
2268 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2269 define_expand.
2270 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2271 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2272 New define_insn.
2273 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2274 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2275 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2276 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2277 documentation.
2278 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2279 Document new effective target and option set.
2281 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2283 * config/arm/arm-cpus.in (armv8_4): New feature.
2284 (ARMv8_4a): New fgroup.
2285 (armv8.4-a): New arch.
2286 * config/arm/arm-tables.opt: Regenerate.
2287 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2288 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2289 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2290 Add matching rules for -march=armv8.4-a and extensions.
2291 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2293 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2295 PR target/81821
2296 * config/rx/rx.md (BW): New mode attribute.
2297 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2299 2018-01-11 Richard Biener <rguenther@suse.de>
2301 PR tree-optimization/83435
2302 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2303 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2304 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2306 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2307 Alan Hayward <alan.hayward@arm.com>
2308 David Sherwood <david.sherwood@arm.com>
2310 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2311 field.
2312 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2313 (aarch64_print_address_internal): Use it to check for a zero offset.
2315 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2316 Alan Hayward <alan.hayward@arm.com>
2317 David Sherwood <david.sherwood@arm.com>
2319 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2320 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2321 Return a poly_int64 rather than a HOST_WIDE_INT.
2322 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2323 rather than a HOST_WIDE_INT.
2324 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2325 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2326 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2327 final_offset from HOST_WIDE_INT to poly_int64.
2328 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2329 to_constant when getting the number of units in an Advanced SIMD
2330 mode.
2331 (aarch64_builtin_vectorized_function): Check for a constant number
2332 of units.
2333 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2334 GET_MODE_SIZE.
2335 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2336 attribute instead of GET_MODE_NUNITS.
2337 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2338 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2339 GET_MODE_SIZE for fixed-size registers.
2340 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2341 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2342 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2343 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2344 (aarch64_print_operand, aarch64_print_address_internal)
2345 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2346 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2347 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2348 Handle polynomial GET_MODE_SIZE.
2349 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2350 wider than SImode without modification.
2351 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2352 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2353 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2354 passing and returning SVE modes.
2355 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2356 rather than GEN_INT.
2357 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2358 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2359 (aarch64_allocate_and_probe_stack_space): Likewise.
2360 (aarch64_layout_frame): Cope with polynomial offsets.
2361 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2362 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2363 polynomial offsets.
2364 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2365 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2366 poly_int64 rather than a HOST_WIDE_INT.
2367 (aarch64_get_separate_components, aarch64_process_components)
2368 (aarch64_expand_prologue, aarch64_expand_epilogue)
2369 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2370 (aarch64_anchor_offset): New function, split out from...
2371 (aarch64_legitimize_address): ...here.
2372 (aarch64_builtin_vectorization_cost): Handle polynomial
2373 TYPE_VECTOR_SUBPARTS.
2374 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2375 GET_MODE_NUNITS.
2376 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2377 number of elements from the PARALLEL rather than the mode.
2378 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2379 rather than GET_MODE_BITSIZE.
2380 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2381 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2382 (aarch64_expand_vec_perm_const_1): Handle polynomial
2383 d->perm.length () and d->perm elements.
2384 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2385 Apply to_constant to d->perm elements.
2386 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2387 polynomial CONST_VECTOR_NUNITS.
2388 (aarch64_move_pointer): Take amount as a poly_int64 rather
2389 than an int.
2390 (aarch64_progress_pointer): Avoid temporary variable.
2391 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2392 the mode attribute instead of GET_MODE.
2394 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2395 Alan Hayward <alan.hayward@arm.com>
2396 David Sherwood <david.sherwood@arm.com>
2398 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2399 x exists before using it.
2400 (aarch64_add_constant_internal): Rename to...
2401 (aarch64_add_offset_1): ...this. Replace regnum with separate
2402 src and dest rtxes. Handle the case in which they're different,
2403 including when the offset is zero. Replace scratchreg with an rtx.
2404 Use 2 additions if there is no spare register into which we can
2405 move a 16-bit constant.
2406 (aarch64_add_constant): Delete.
2407 (aarch64_add_offset): Replace reg with separate src and dest
2408 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2409 Use aarch64_add_offset_1.
2410 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2411 an rtx rather than an int. Take the delta as a poly_int64
2412 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2413 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2414 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2415 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2416 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2417 and aarch64_add_sp.
2418 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2419 aarch64_add_constant.
2421 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2423 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2424 Use scalar_float_mode.
2426 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2428 * config/aarch64/aarch64-simd.md
2429 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2430 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2431 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2432 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2433 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2434 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2435 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2436 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2437 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2438 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2440 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2442 PR target/83514
2443 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2444 targ_options->x_arm_arch_string is non NULL.
2446 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2448 * config/aarch64/aarch64.h
2449 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2451 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2453 PR target/82096
2454 * expmed.c (emit_store_flag_force): Swap if const op0
2455 and change VOIDmode to mode of op0.
2457 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2459 PR rtl-optimization/83761
2460 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2461 than bytes to mode_for_size.
2463 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2465 PR middle-end/83189
2466 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2467 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2468 profile.
2470 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2472 PR middle-end/83575
2473 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2474 when in layout mode.
2475 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2476 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2477 partition fixup.
2479 2018-01-10 Michael Collison <michael.collison@arm.com>
2481 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2482 * config/aarch64/aarch64-option-extension.def: Add
2483 AARCH64_OPT_EXTENSION of 'fp16fml'.
2484 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2485 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2486 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2487 * config/aarch64/constraints.md (Ui7): New constraint.
2488 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2489 (VFMLA_SEL_W): Ditto.
2490 (f16quad): Ditto.
2491 (f16mac1): Ditto.
2492 (VFMLA16_LOW): New int iterator.
2493 (VFMLA16_HIGH): Ditto.
2494 (UNSPEC_FMLAL): New unspec.
2495 (UNSPEC_FMLSL): Ditto.
2496 (UNSPEC_FMLAL2): Ditto.
2497 (UNSPEC_FMLSL2): Ditto.
2498 (f16mac): New code attribute.
2499 * config/aarch64/aarch64-simd-builtins.def
2500 (aarch64_fmlal_lowv2sf): Ditto.
2501 (aarch64_fmlsl_lowv2sf): Ditto.
2502 (aarch64_fmlalq_lowv4sf): Ditto.
2503 (aarch64_fmlslq_lowv4sf): Ditto.
2504 (aarch64_fmlal_highv2sf): Ditto.
2505 (aarch64_fmlsl_highv2sf): Ditto.
2506 (aarch64_fmlalq_highv4sf): Ditto.
2507 (aarch64_fmlslq_highv4sf): Ditto.
2508 (aarch64_fmlal_lane_lowv2sf): Ditto.
2509 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2510 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2511 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2512 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2513 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2514 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2515 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2516 (aarch64_fmlal_lane_highv2sf): Ditto.
2517 (aarch64_fmlsl_lane_highv2sf): Ditto.
2518 (aarch64_fmlal_laneq_highv2sf): Ditto.
2519 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2520 (aarch64_fmlalq_lane_highv4sf): Ditto.
2521 (aarch64_fmlsl_lane_highv4sf): Ditto.
2522 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2523 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2524 * config/aarch64/aarch64-simd.md:
2525 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2526 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2527 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2528 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2529 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2530 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2531 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2532 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2533 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2534 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2535 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2536 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2537 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2538 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2539 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2540 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2541 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2542 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2543 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2544 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2545 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2546 (vfmlsl_low_u32): Ditto.
2547 (vfmlalq_low_u32): Ditto.
2548 (vfmlslq_low_u32): Ditto.
2549 (vfmlal_high_u32): Ditto.
2550 (vfmlsl_high_u32): Ditto.
2551 (vfmlalq_high_u32): Ditto.
2552 (vfmlslq_high_u32): Ditto.
2553 (vfmlal_lane_low_u32): Ditto.
2554 (vfmlsl_lane_low_u32): Ditto.
2555 (vfmlal_laneq_low_u32): Ditto.
2556 (vfmlsl_laneq_low_u32): Ditto.
2557 (vfmlalq_lane_low_u32): Ditto.
2558 (vfmlslq_lane_low_u32): Ditto.
2559 (vfmlalq_laneq_low_u32): Ditto.
2560 (vfmlslq_laneq_low_u32): Ditto.
2561 (vfmlal_lane_high_u32): Ditto.
2562 (vfmlsl_lane_high_u32): Ditto.
2563 (vfmlal_laneq_high_u32): Ditto.
2564 (vfmlsl_laneq_high_u32): Ditto.
2565 (vfmlalq_lane_high_u32): Ditto.
2566 (vfmlslq_lane_high_u32): Ditto.
2567 (vfmlalq_laneq_high_u32): Ditto.
2568 (vfmlslq_laneq_high_u32): Ditto.
2569 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2570 (AARCH64_FL_FOR_ARCH8_4): New.
2571 (AARCH64_ISA_F16FML): New ISA flag.
2572 (TARGET_F16FML): New feature flag for fp16fml.
2573 (doc/invoke.texi): Document new fp16fml option.
2575 2018-01-10 Michael Collison <michael.collison@arm.com>
2577 * config/aarch64/aarch64-builtins.c:
2578 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2579 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2580 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2581 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2582 (AARCH64_ISA_SHA3): New ISA flag.
2583 (TARGET_SHA3): New feature flag for sha3.
2584 * config/aarch64/iterators.md (sha512_op): New int attribute.
2585 (CRYPTO_SHA512): New int iterator.
2586 (UNSPEC_SHA512H): New unspec.
2587 (UNSPEC_SHA512H2): Ditto.
2588 (UNSPEC_SHA512SU0): Ditto.
2589 (UNSPEC_SHA512SU1): Ditto.
2590 * config/aarch64/aarch64-simd-builtins.def
2591 (aarch64_crypto_sha512hqv2di): New builtin.
2592 (aarch64_crypto_sha512h2qv2di): Ditto.
2593 (aarch64_crypto_sha512su0qv2di): Ditto.
2594 (aarch64_crypto_sha512su1qv2di): Ditto.
2595 (aarch64_eor3qv8hi): Ditto.
2596 (aarch64_rax1qv2di): Ditto.
2597 (aarch64_xarqv2di): Ditto.
2598 (aarch64_bcaxqv8hi): Ditto.
2599 * config/aarch64/aarch64-simd.md:
2600 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2601 (aarch64_crypto_sha512su0qv2di): Ditto.
2602 (aarch64_crypto_sha512su1qv2di): Ditto.
2603 (aarch64_eor3qv8hi): Ditto.
2604 (aarch64_rax1qv2di): Ditto.
2605 (aarch64_xarqv2di): Ditto.
2606 (aarch64_bcaxqv8hi): Ditto.
2607 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2608 (vsha512h2q_u64): Ditto.
2609 (vsha512su0q_u64): Ditto.
2610 (vsha512su1q_u64): Ditto.
2611 (veor3q_u16): Ditto.
2612 (vrax1q_u64): Ditto.
2613 (vxarq_u64): Ditto.
2614 (vbcaxq_u16): Ditto.
2615 * config/arm/types.md (crypto_sha512): New type attribute.
2616 (crypto_sha3): Ditto.
2617 (doc/invoke.texi): Document new sha3 option.
2619 2018-01-10 Michael Collison <michael.collison@arm.com>
2621 * config/aarch64/aarch64-builtins.c:
2622 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2623 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2624 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2625 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2626 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2627 (AARCH64_ISA_SM4): New ISA flag.
2628 (TARGET_SM4): New feature flag for sm4.
2629 * config/aarch64/aarch64-simd-builtins.def
2630 (aarch64_sm3ss1qv4si): Ditto.
2631 (aarch64_sm3tt1aq4si): Ditto.
2632 (aarch64_sm3tt1bq4si): Ditto.
2633 (aarch64_sm3tt2aq4si): Ditto.
2634 (aarch64_sm3tt2bq4si): Ditto.
2635 (aarch64_sm3partw1qv4si): Ditto.
2636 (aarch64_sm3partw2qv4si): Ditto.
2637 (aarch64_sm4eqv4si): Ditto.
2638 (aarch64_sm4ekeyqv4si): Ditto.
2639 * config/aarch64/aarch64-simd.md:
2640 (aarch64_sm3ss1qv4si): Ditto.
2641 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2642 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2643 (aarch64_sm4eqv4si): Ditto.
2644 (aarch64_sm4ekeyqv4si): Ditto.
2645 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2646 (sm3part_op): Ditto.
2647 (CRYPTO_SM3TT): Ditto.
2648 (CRYPTO_SM3PART): Ditto.
2649 (UNSPEC_SM3SS1): New unspec.
2650 (UNSPEC_SM3TT1A): Ditto.
2651 (UNSPEC_SM3TT1B): Ditto.
2652 (UNSPEC_SM3TT2A): Ditto.
2653 (UNSPEC_SM3TT2B): Ditto.
2654 (UNSPEC_SM3PARTW1): Ditto.
2655 (UNSPEC_SM3PARTW2): Ditto.
2656 (UNSPEC_SM4E): Ditto.
2657 (UNSPEC_SM4EKEY): Ditto.
2658 * config/aarch64/constraints.md (Ui2): New constraint.
2659 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2660 * config/arm/types.md (crypto_sm3): New type attribute.
2661 (crypto_sm4): Ditto.
2662 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2663 (vsm3tt1aq_u32): Ditto.
2664 (vsm3tt1bq_u32): Ditto.
2665 (vsm3tt2aq_u32): Ditto.
2666 (vsm3tt2bq_u32): Ditto.
2667 (vsm3partw1q_u32): Ditto.
2668 (vsm3partw2q_u32): Ditto.
2669 (vsm4eq_u32): Ditto.
2670 (vsm4ekeyq_u32): Ditto.
2671 (doc/invoke.texi): Document new sm4 option.
2673 2018-01-10 Michael Collison <michael.collison@arm.com>
2675 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2676 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2677 (AARCH64_FL_FOR_ARCH8_4): New.
2678 (AARCH64_FL_V8_4): New flag.
2679 (doc/invoke.texi): Document new armv8.4-a option.
2681 2018-01-10 Michael Collison <michael.collison@arm.com>
2683 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2684 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2685 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2686 * config/aarch64/aarch64-option-extension.def: Add
2687 AARCH64_OPT_EXTENSION of 'sha2'.
2688 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2689 (crypto): Disable sha2 and aes if crypto disabled.
2690 (crypto): Enable aes and sha2 if enabled.
2691 (simd): Disable sha2 and aes if simd disabled.
2692 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2693 New flags.
2694 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2695 (TARGET_SHA2): New feature flag for sha2.
2696 (TARGET_AES): New feature flag for aes.
2697 * config/aarch64/aarch64-simd.md:
2698 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2699 conditional on TARGET_AES.
2700 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2701 (aarch64_crypto_sha1hsi): Make pattern conditional
2702 on TARGET_SHA2.
2703 (aarch64_crypto_sha1hv4si): Ditto.
2704 (aarch64_be_crypto_sha1hv4si): Ditto.
2705 (aarch64_crypto_sha1su1v4si): Ditto.
2706 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2707 (aarch64_crypto_sha1su0v4si): Ditto.
2708 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2709 (aarch64_crypto_sha256su0v4si): Ditto.
2710 (aarch64_crypto_sha256su1v4si): Ditto.
2711 (doc/invoke.texi): Document new aes and sha2 options.
2713 2018-01-10 Martin Sebor <msebor@redhat.com>
2715 PR tree-optimization/83781
2716 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2717 as string arrays.
2719 2018-01-11 Martin Sebor <msebor@gmail.com>
2720 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2722 PR tree-optimization/83501
2723 PR tree-optimization/81703
2725 * tree-ssa-strlen.c (get_string_cst): Rename...
2726 (get_string_len): ...to this. Handle global constants.
2727 (handle_char_store): Adjust.
2729 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2730 Jim Wilson <jimw@sifive.com>
2732 * config/riscv/riscv-protos.h (riscv_output_return): New.
2733 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2734 (riscv_attribute_table, riscv_output_return),
2735 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2736 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2737 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2738 function.
2739 (riscv_expand_prologue): Add early return for naked function.
2740 (riscv_expand_epilogue): Likewise.
2741 (riscv_function_ok_for_sibcall): Return false for naked function.
2742 (riscv_set_current_function): New.
2743 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2744 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2745 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2746 * doc/extend.texi (RISC-V Function Attributes): New.
2748 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2750 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2751 check for 128-bit long double before checking TCmode.
2752 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2753 128-bit long doubles before checking TFmode or TCmode.
2754 (FLOAT128_IBM_P): Likewise.
2756 2018-01-10 Martin Sebor <msebor@redhat.com>
2758 PR tree-optimization/83671
2759 * builtins.c (c_strlen): Unconditionally return zero for the empty
2760 string.
2761 Use -Warray-bounds for warnings.
2762 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2763 for non-constant array indices with COMPONENT_REF, arrays of
2764 arrays, and pointers to arrays.
2765 (gimple_fold_builtin_strlen): Determine and set length range for
2766 non-constant character arrays.
2768 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2770 PR middle-end/81897
2771 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2772 empty blocks.
2774 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2776 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2778 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2780 PR target/83399
2781 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2782 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2783 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2784 indexed_or_indirect_operand predicate.
2785 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2786 (*vsx_le_perm_load_v8hi): Likewise.
2787 (*vsx_le_perm_load_v16qi): Likewise.
2788 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2789 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2790 (*vsx_le_perm_store_v8hi): Likewise.
2791 (*vsx_le_perm_store_v16qi): Likewise.
2792 (eight unnamed splitters): Likewise.
2794 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2796 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2797 * config/rs6000/emmintrin.h: Likewise.
2798 * config/rs6000/mmintrin.h: Likewise.
2799 * config/rs6000/xmmintrin.h: Likewise.
2801 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2803 PR c++/43486
2804 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2805 "public_flag".
2806 * tree.c (tree_nop_conversion): Return true for location wrapper
2807 nodes.
2808 (maybe_wrap_with_location): New function.
2809 (selftest::check_strip_nops): New function.
2810 (selftest::test_location_wrappers): New function.
2811 (selftest::tree_c_tests): Call it.
2812 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2813 (maybe_wrap_with_location): New decl.
2814 (EXPR_LOCATION_WRAPPER_P): New macro.
2815 (location_wrapper_p): New inline function.
2816 (tree_strip_any_location_wrapper): New inline function.
2818 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2820 PR target/83735
2821 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2822 stack_realign_offset for the largest alignment of stack slot
2823 actually used.
2824 (ix86_find_max_used_stack_alignment): New function.
2825 (ix86_finalize_stack_frame_flags): Use it. Set
2826 max_used_stack_alignment if we don't realign stack.
2827 * config/i386/i386.h (machine_function): Add
2828 max_used_stack_alignment.
2830 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2832 * config/arm/arm.opt (-mbranch-cost): New option.
2833 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2834 account.
2836 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2838 PR target/83629
2839 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2840 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2842 2018-01-10 Richard Biener <rguenther@suse.de>
2844 PR debug/83765
2845 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2846 early out so it also covers the case where we have a non-NULL
2847 origin.
2849 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2851 PR tree-optimization/83753
2852 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2853 for non-strided grouped accesses if the number of elements is 1.
2855 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2857 PR target/81616
2858 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2859 * i386.h (TARGET_USE_GATHER): Define.
2860 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2862 2018-01-10 Martin Liska <mliska@suse.cz>
2864 PR bootstrap/82831
2865 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2866 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2867 partitioning.
2868 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2869 CLEANUP_NO_PARTITIONING is not set.
2871 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2873 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2874 for vectors, as a partial revert of r254296.
2875 * rtl.h (const_vec_p): Delete.
2876 (const_vec_duplicate_p): Don't test for vector CONSTs.
2877 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2878 * expmed.c (make_tree): Likewise.
2880 Revert:
2881 * common.md (E, F): Use CONSTANT_P instead of checking for
2882 CONST_VECTOR.
2883 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2884 checking for CONST_VECTOR.
2886 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2888 PR middle-end/83575
2889 * predict.c (force_edge_cold): Handle in more sane way edges
2890 with no prediction.
2892 2018-01-09 Carl Love <cel@us.ibm.com>
2894 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2895 V4SI, V4SF types.
2896 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2897 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2898 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2899 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2900 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2901 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2902 * config/rs6000/rs6000-protos.h: Add extern defition for
2903 rs6000_generate_float2_double_code.
2904 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2905 function.
2906 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2907 (float2_v2df): Add define_expand.
2909 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2911 PR target/83628
2912 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2913 op_mode in the force_to_mode call.
2915 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2917 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2918 instead of checking each element individually.
2919 (aarch64_evpc_uzp): Likewise.
2920 (aarch64_evpc_zip): Likewise.
2921 (aarch64_evpc_ext): Likewise.
2922 (aarch64_evpc_rev): Likewise.
2923 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2924 instead of checking each element individually. Return true without
2925 generating rtl if
2926 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2927 whether all selected elements come from the same input, instead of
2928 checking each element individually. Remove calls to gen_rtx_REG,
2929 start_sequence and end_sequence and instead assert that no rtl is
2930 generated.
2932 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2934 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2935 order of HIGH and CONST checks.
2937 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2939 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2940 if the destination isn't an SSA_NAME.
2942 2018-01-09 Richard Biener <rguenther@suse.de>
2944 PR tree-optimization/83668
2945 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2946 move prologue...
2947 (canonicalize_loop_form): ... here, renamed from ...
2948 (canonicalize_loop_closed_ssa_form): ... this and amended to
2949 swap successor edges for loop exit blocks to make us use
2950 the RPO order we need for initial schedule generation.
2952 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2954 PR tree-optimization/64811
2955 * match.pd: When optimizing comparisons with Inf, avoid
2956 introducing or losing exceptions from comparisons with NaN.
2958 2018-01-09 Martin Liska <mliska@suse.cz>
2960 PR sanitizer/82517
2961 * asan.c (shadow_mem_size): Add gcc_assert.
2963 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2965 Don't save registers in main().
2967 PR target/83738
2968 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2969 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2970 * config/avr/avr.c (avr_set_current_function): Don't error if
2971 naked, OS_task or OS_main are specified at the same time.
2972 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2973 OS_main.
2974 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2975 attribute.
2976 * common/config/avr/avr-common.c (avr_option_optimization_table):
2977 Switch on -mmain-is-OS_task for optimizing compilations.
2979 2018-01-09 Richard Biener <rguenther@suse.de>
2981 PR tree-optimization/83572
2982 * graphite.c: Include cfganal.h.
2983 (graphite_transform_loops): Connect infinite loops to exit
2984 and remove fake edges at the end.
2986 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2988 * ipa-inline.c (edge_badness): Revert accidental checkin.
2990 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2992 PR ipa/80763
2993 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2994 symbols; not inline clones.
2996 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2998 PR target/83507
2999 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3000 hard registers. Formatting fixes.
3002 PR preprocessor/83722
3003 * gcc.c (try_generate_repro): Pass
3004 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3005 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3006 do_report_bug.
3008 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
3009 Kito Cheng <kito.cheng@gmail.com>
3011 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3012 (riscv_leaf_function_p): Delete.
3013 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3015 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3017 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3018 function.
3019 (do_ifelse): New function.
3020 (do_isel): New function.
3021 (do_sub3): New function.
3022 (do_add3): New function.
3023 (do_load_mask_compare): New function.
3024 (do_overlap_load_compare): New function.
3025 (expand_compare_loop): New function.
3026 (expand_block_compare): Call expand_compare_loop() when appropriate.
3027 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3028 option description.
3029 (-mblock-compare-inline-loop-limit): New option.
3031 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3033 PR target/83677
3034 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3035 Reverse order of second and third operands in first alternative.
3036 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3037 of first and second elements in UNSPEC_VPERMR vector.
3038 (altivec_expand_vec_perm_le): Likewise.
3040 2017-01-08 Jeff Law <law@redhat.com>
3042 PR rtl-optimizatin/81308
3043 * tree-switch-conversion.c (cfg_altered): New file scoped static.
3044 (process_switch): If group_case_labels makes a change, then set
3045 cfg_altered.
3046 (pass_convert_switch::execute): If a switch is converted, then
3047 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
3049 PR rtl-optimization/81308
3050 * recog.c (split_all_insns): Conditionally cleanup the CFG after
3051 splitting insns.
3053 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
3055 PR target/83663 - Revert r255946
3056 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
3057 generation for cases where splatting a value is not useful.
3058 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
3059 across a vec_duplicate and a paradoxical subreg forming a vector
3060 mode to a vec_concat.
3062 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3064 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
3065 -march=armv8.3-a variants.
3066 * config/arm/t-multilib: Likewise.
3067 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
3069 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3071 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
3072 to generate rtl.
3073 (cceq_ior_compare_complement): Give it a name so I can use it, and
3074 change boolean_or_operator predicate to boolean_operator so it can
3075 be used to generate a crand.
3076 (eqne): New code iterator.
3077 (bd/bd_neg): New code_attrs.
3078 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
3079 a single define_insn.
3080 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
3081 decrement (bdnzt/bdnzf/bdzt/bdzf).
3082 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
3083 with the new names of the branch decrement patterns, and added the
3084 names of the branch decrement conditional patterns.
3086 2018-01-08 Richard Biener <rguenther@suse.de>
3088 PR tree-optimization/83563
3089 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
3090 cache.
3092 2018-01-08 Richard Biener <rguenther@suse.de>
3094 PR middle-end/83713
3095 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
3097 2018-01-08 Richard Biener <rguenther@suse.de>
3099 PR tree-optimization/83685
3100 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3101 references to abnormals.
3103 2018-01-08 Richard Biener <rguenther@suse.de>
3105 PR lto/83719
3106 * dwarf2out.c (output_indirect_strings): Handle empty
3107 skeleton_debug_str_hash.
3108 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3110 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3112 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3113 (emit_store_direct): Likewise.
3114 (arc_trampoline_adjust_address): Likewise.
3115 (arc_asm_trampoline_template): New function.
3116 (arc_initialize_trampoline): Use asm_trampoline_template.
3117 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3118 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3119 * config/arc/arc.md (flush_icache): Delete pattern.
3121 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3123 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3124 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3125 munaligned-access.
3127 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3129 PR target/83681
3130 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3131 by not USED_FOR_TARGET.
3132 (make_pass_resolve_sw_modes): Likewise.
3134 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3136 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3137 USED_FOR_TARGET.
3139 2018-01-08 Richard Biener <rguenther@suse.de>
3141 PR middle-end/83580
3142 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3144 2018-01-08 Richard Biener <rguenther@suse.de>
3146 PR middle-end/83517
3147 * match.pd ((t * 2) / 2) -> t): Add missing :c.
3149 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
3151 PR middle-end/81897
3152 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3153 basic blocks with a small number of successors.
3154 (convert_control_dep_chain_into_preds): Improve handling of
3155 forwarder blocks.
3156 (dump_predicates): Split apart into...
3157 (dump_pred_chain): ...here...
3158 (dump_pred_info): ...and here.
3159 (can_one_predicate_be_invalidated_p): Add debugging printfs.
3160 (can_chain_union_be_invalidated_p): Improve check for invalidation
3161 of paths.
3162 (uninit_uses_cannot_happen): Avoid unnecessary if
3163 convert_control_dep_chain_into_preds yielded nothing.
3165 2018-01-06 Martin Sebor <msebor@redhat.com>
3167 PR tree-optimization/83640
3168 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3169 subtracting negative offset from size.
3170 (builtin_access::overlap): Adjust offset bounds of the access to fall
3171 within the size of the object if possible.
3173 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3175 PR rtl-optimization/83699
3176 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3177 extract_bit_field_as_subreg to cases in which the extracted
3178 value is also a vector.
3180 * lra-constraints.c (process_alt_operands): Test for the equivalence
3181 substitutions when detecting a possible reload cycle.
3183 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3185 PR debug/83480
3186 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3187 by default if flag_selective_schedling{,2}. Formatting fixes.
3189 PR rtl-optimization/83682
3190 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3191 if it has non-VECTOR_MODE element mode.
3192 (vec_duplicate_p): Likewise.
3194 PR middle-end/83694
3195 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3196 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3198 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3200 PR target/83604
3201 * config/i386/i386-builtin.def
3202 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3203 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3204 Require also OPTION_MASK_ISA_AVX512F in addition to
3205 OPTION_MASK_ISA_GFNI.
3206 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3207 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3208 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3209 to OPTION_MASK_ISA_GFNI.
3210 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3211 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3212 OPTION_MASK_ISA_AVX512BW.
3213 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3214 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3215 addition to OPTION_MASK_ISA_GFNI.
3216 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3217 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3218 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3219 to OPTION_MASK_ISA_GFNI.
3220 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3221 a requirement for all ISAs rather than any of them with a few
3222 exceptions.
3223 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3224 processing.
3225 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3226 bitmasks to be enabled with 3 exceptions, instead of requiring any
3227 enabled ISA with lots of exceptions.
3228 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3229 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3230 Change avx512bw in isa attribute to avx512f.
3231 * config/i386/sgxintrin.h: Add license boilerplate.
3232 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3233 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3234 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3235 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3236 defined.
3237 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3238 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3239 temporarily sse2 rather than sse if not enabled already.
3241 PR target/83604
3242 * config/i386/sse.md (VI248_VLBW): Rename to ...
3243 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3244 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3245 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3246 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3247 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3248 mode iterator instead of VI248_VLBW.
3250 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3252 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3253 (record_modified): Skip clobbers; add debug output.
3254 (param_change_prob): Use sreal frequencies.
3256 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3258 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3259 punt for user-aligned variables.
3261 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3263 * tree-chrec.c (chrec_contains_symbols): Return true for
3264 POLY_INT_CST.
3266 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3268 PR target/82439
3269 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3270 of (x|y) == x for BICS pattern.
3272 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3274 PR tree-optimization/83605
3275 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3276 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3277 can throw.
3279 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3281 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3282 * config/epiphany/rtems.h: New file.
3284 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3285 Uros Bizjak <ubizjak@gmail.com>
3287 PR target/83554
3288 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3289 QIreg_operand instead of register_operand predicate.
3290 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3291 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3292 comments instead of -fmitigate[-_]rop.
3294 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3296 PR bootstrap/81926
3297 * cgraphunit.c (symbol_table::compile): Switch to text_section
3298 before calling assembly_start debug hook.
3299 * run-rtl-passes.c (run_rtl_passes): Likewise.
3300 Include output.h.
3302 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3304 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3305 range_int_cst_p rather than !symbolic_range_p before calling
3306 extract_range_from_multiplicative_op_1.
3308 2017-01-04 Jeff Law <law@redhat.com>
3310 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3311 redundant test in assertion.
3313 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3315 * doc/rtl.texi: Document machine_mode wrapper classes.
3317 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3319 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3320 using tree_to_uhwi.
3322 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3324 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3325 the VEC_PERM_EXPR fold to fail.
3327 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3329 PR debug/83585
3330 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3331 to switched_sections.
3333 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3335 PR target/83680
3336 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3337 test for d.testing.
3339 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3341 PR target/83387
3342 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3343 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3345 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3347 PR debug/83666
3348 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3349 is BLKmode and bitpos not zero or mode change is needed.
3351 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3353 PR target/83675
3354 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3355 TARGET_VIS2.
3357 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3359 PR target/83628
3360 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3361 instead of MULT rtx. Update all corresponding splitters.
3362 (*saddl_se): Ditto.
3363 (*ssub<modesuffix>): Ditto.
3364 (*ssubl_se): Ditto.
3365 (*cmp_sadd_di): Update split patterns.
3366 (*cmp_sadd_si): Ditto.
3367 (*cmp_sadd_sidi): Ditto.
3368 (*cmp_ssub_di): Ditto.
3369 (*cmp_ssub_si): Ditto.
3370 (*cmp_ssub_sidi): Ditto.
3371 * config/alpha/predicates.md (const23_operand): New predicate.
3372 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3373 Look for ASHIFT, not MULT inner operand.
3374 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3376 2018-01-04 Martin Liska <mliska@suse.cz>
3378 PR gcov-profile/83669
3379 * gcov.c (output_intermediate_file): Add version to intermediate
3380 gcov file.
3381 * doc/gcov.texi: Document new field 'version' in intermediate
3382 file format. Fix location of '-k' option of gcov command.
3384 2018-01-04 Martin Liska <mliska@suse.cz>
3386 PR ipa/82352
3387 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3389 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3391 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3393 2018-01-03 Martin Sebor <msebor@redhat.com>
3395 PR tree-optimization/83655
3396 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3397 checking calls with invalid arguments.
3399 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3401 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3402 (vectorizable_mask_load_store): Delete.
3403 (vectorizable_call): Return false for masked loads and stores.
3404 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3405 instead of gimple_assign_rhs1.
3406 (vectorizable_load): Handle IFN_MASK_LOAD.
3407 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3409 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3411 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3412 split out from..,
3413 (vectorizable_mask_load_store): ...here.
3414 (vectorizable_load): ...and here.
3416 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3418 * tree-vect-stmts.c (vect_build_all_ones_mask)
3419 (vect_build_zero_merge_argument): New functions, split out from...
3420 (vectorizable_load): ...here.
3422 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3424 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3425 split out from...
3426 (vectorizable_mask_load_store): ...here.
3427 (vectorizable_store): ...and here.
3429 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3431 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3432 split out from...
3433 (vectorizable_mask_load_store): ...here.
3435 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3437 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3438 (vect_model_store_cost): Take a vec_load_store_type instead of a
3439 vect_def_type.
3440 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3441 (vect_model_store_cost): Take a vec_load_store_type instead of a
3442 vect_def_type.
3443 (vectorizable_mask_load_store): Update accordingly.
3444 (vectorizable_store): Likewise.
3445 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3447 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3449 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3450 IFN_MASK_LOAD calls here rather than...
3451 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3453 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3454 Alan Hayward <alan.hayward@arm.com>
3455 David Sherwood <david.sherwood@arm.com>
3457 * expmed.c (extract_bit_field_1): For vector extracts,
3458 fall back to extract_bit_field_as_subreg if vec_extract
3459 isn't available.
3461 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3462 Alan Hayward <alan.hayward@arm.com>
3463 David Sherwood <david.sherwood@arm.com>
3465 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3466 they are variable or constant sized.
3467 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3468 slots for constant-sized data.
3470 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3471 Alan Hayward <alan.hayward@arm.com>
3472 David Sherwood <david.sherwood@arm.com>
3474 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3475 handling COND_EXPRs with boolean comparisons, try to find a better
3476 basis for the mask type than the boolean itself.
3478 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3480 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3481 is calculated and how it can be overridden.
3482 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3483 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3484 if defined.
3485 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3486 if nonzero.
3488 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3489 Alan Hayward <alan.hayward@arm.com>
3490 David Sherwood <david.sherwood@arm.com>
3492 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3493 Remove the mode argument.
3494 (aarch64_simd_valid_immediate): Remove the mode and inverse
3495 arguments.
3496 * config/aarch64/iterators.md (bitsize): New iterator.
3497 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3498 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3499 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3500 aarch64_simd_valid_immediate.
3501 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3502 (aarch64_reg_or_bic_imm): Likewise.
3503 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3504 with an insn_type enum and msl with a modifier_type enum.
3505 Replace element_width with a scalar_mode. Change the shift
3506 to unsigned int. Add constructors for scalar_float_mode and
3507 scalar_int_mode elements.
3508 (aarch64_vect_float_const_representable_p): Delete.
3509 (aarch64_can_const_movi_rtx_p)
3510 (aarch64_simd_scalar_immediate_valid_for_move)
3511 (aarch64_simd_make_constant): Update call to
3512 aarch64_simd_valid_immediate.
3513 (aarch64_advsimd_valid_immediate_hs): New function.
3514 (aarch64_advsimd_valid_immediate): Likewise.
3515 (aarch64_simd_valid_immediate): Remove mode and inverse
3516 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3517 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3518 and aarch64_float_const_representable_p on the result.
3519 (aarch64_output_simd_mov_immediate): Remove mode argument.
3520 Update call to aarch64_simd_valid_immediate and use of
3521 simd_immediate_info.
3522 (aarch64_output_scalar_simd_mov_immediate): Update call
3523 accordingly.
3525 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3526 Alan Hayward <alan.hayward@arm.com>
3527 David Sherwood <david.sherwood@arm.com>
3529 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3530 (mode_nunits): Likewise CONST_MODE_NUNITS.
3531 * machmode.def (ADJUST_NUNITS): Document.
3532 * genmodes.c (mode_data::need_nunits_adj): New field.
3533 (blank_mode): Update accordingly.
3534 (adj_nunits): New variable.
3535 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3536 parameter.
3537 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3538 listed in adj_nunits.
3539 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3540 listed in adj_nunits. Don't emit case statements for such modes.
3541 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3542 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3543 nothing if adj_nunits is nonnull.
3544 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3545 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3546 (emit_mode_fbit): Update use of print_maybe_const_decl.
3547 (emit_move_size): Likewise. Treat the array as non-const
3548 if adj_nunits.
3549 (emit_mode_adjustments): Handle adj_nunits.
3551 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3553 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3554 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3555 (VECTOR_MODES): Use it.
3556 (make_vector_modes): Take the prefix as an argument.
3558 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3559 Alan Hayward <alan.hayward@arm.com>
3560 David Sherwood <david.sherwood@arm.com>
3562 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3563 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3564 for MODE_VECTOR_BOOL.
3565 * machmode.def (VECTOR_BOOL_MODE): Document.
3566 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3567 (make_vector_bool_mode): New function.
3568 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3569 MODE_VECTOR_BOOL.
3570 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3571 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3572 Likewise.
3573 * stor-layout.c (int_mode_for_mode): Likewise.
3574 * tree.c (build_vector_type_for_mode): Likewise.
3575 * varasm.c (output_constant_pool_2): Likewise.
3576 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3577 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3578 for MODE_VECTOR_BOOL.
3579 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3580 of mode class checks.
3581 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3582 instead of a list of mode class checks.
3583 (expand_vector_scalar_condition): Likewise.
3584 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3586 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3587 Alan Hayward <alan.hayward@arm.com>
3588 David Sherwood <david.sherwood@arm.com>
3590 * machmode.h (mode_size): Change from unsigned short to
3591 poly_uint16_pod.
3592 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3593 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3594 or if measurement_type is not polynomial.
3595 (fixed_size_mode::includes_p): Check for constant-sized modes.
3596 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3597 return a poly_uint16 rather than an unsigned short.
3598 (emit_mode_size): Change the type of mode_size from unsigned short
3599 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3600 (emit_mode_adjustments): Cope with polynomial vector sizes.
3601 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3602 for GET_MODE_SIZE.
3603 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3604 for GET_MODE_SIZE.
3605 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3606 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3607 * caller-save.c (setup_save_areas): Likewise.
3608 (replace_reg_with_saved_mem): Likewise.
3609 * calls.c (emit_library_call_value_1): Likewise.
3610 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3611 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3612 (gen_lowpart_for_combine): Likewise.
3613 * convert.c (convert_to_integer_1): Likewise.
3614 * cse.c (equiv_constant, cse_insn): Likewise.
3615 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3616 (cselib_subst_to_values): Likewise.
3617 * dce.c (word_dce_process_block): Likewise.
3618 * df-problems.c (df_word_lr_mark_ref): Likewise.
3619 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3620 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3621 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3622 (rtl_for_decl_location): Likewise.
3623 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3624 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3625 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3626 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3627 (expand_expr_real_1): Likewise.
3628 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3629 (pad_below): Likewise.
3630 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3631 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3632 * ira.c (get_subreg_tracking_sizes): Likewise.
3633 * ira-build.c (ira_create_allocno_objects): Likewise.
3634 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3635 (ira_sort_regnos_for_alter_reg): Likewise.
3636 * ira-costs.c (record_operand_costs): Likewise.
3637 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3638 (resolve_simple_move): Likewise.
3639 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3640 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3641 (lra_constraints): Likewise.
3642 (CONST_POOL_OK_P): Reject variable-sized modes.
3643 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3644 (add_pseudo_to_slot, lra_spill): Likewise.
3645 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3646 * optabs-query.c (get_best_extraction_insn): Likewise.
3647 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3648 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3649 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3650 * recog.c (offsettable_address_addr_space_p): Likewise.
3651 * regcprop.c (maybe_mode_change): Likewise.
3652 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3653 * regrename.c (build_def_use): Likewise.
3654 * regstat.c (dump_reg_info): Likewise.
3655 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3656 (find_reloads, find_reloads_subreg_address): Likewise.
3657 * reload1.c (eliminate_regs_1): Likewise.
3658 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3659 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3660 (simplify_binary_operation_1, simplify_subreg): Likewise.
3661 * targhooks.c (default_function_arg_padding): Likewise.
3662 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3663 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3664 (verify_gimple_assign_ternary): Likewise.
3665 * tree-inline.c (estimate_move_cost): Likewise.
3666 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3667 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3668 (get_address_cost_ainc): Likewise.
3669 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3670 (vect_supportable_dr_alignment): Likewise.
3671 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3672 (vectorizable_reduction): Likewise.
3673 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3674 (vectorizable_operation, vectorizable_load): Likewise.
3675 * tree.c (build_same_sized_truth_vector_type): Likewise.
3676 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3677 * var-tracking.c (emit_note_insn_var_location): Likewise.
3678 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3679 (ADDR_VEC_ALIGN): Likewise.
3681 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3682 Alan Hayward <alan.hayward@arm.com>
3683 David Sherwood <david.sherwood@arm.com>
3685 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3686 unsigned short.
3687 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3688 or if measurement_type is polynomial.
3689 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3690 * combine.c (make_extraction): Likewise.
3691 * dse.c (find_shift_sequence): Likewise.
3692 * dwarf2out.c (mem_loc_descriptor): Likewise.
3693 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3694 (extract_bit_field, extract_low_bits): Likewise.
3695 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3696 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3697 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3698 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3699 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3700 * reload.c (find_reloads): Likewise.
3701 * reload1.c (alter_reg): Likewise.
3702 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3703 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3704 * tree-if-conv.c (predicate_mem_writes): Likewise.
3705 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3706 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3707 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3708 * valtrack.c (dead_debug_insert_temp): Likewise.
3709 * varasm.c (mergeable_constant_section): Likewise.
3710 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3712 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3713 Alan Hayward <alan.hayward@arm.com>
3714 David Sherwood <david.sherwood@arm.com>
3716 * expr.c (expand_assignment): Cope with polynomial mode sizes
3717 when assigning to a CONCAT.
3719 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3720 Alan Hayward <alan.hayward@arm.com>
3721 David Sherwood <david.sherwood@arm.com>
3723 * machmode.h (mode_precision): Change from unsigned short to
3724 poly_uint16_pod.
3725 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3726 short.
3727 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3728 or if measurement_type is not polynomial.
3729 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3730 in which the mode is already known to be a scalar_int_mode.
3731 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3732 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3733 initializer.
3734 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3735 for GET_MODE_PRECISION.
3736 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3737 for GET_MODE_PRECISION.
3738 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3739 as polynomial.
3740 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3741 (expand_field_assignment, make_extraction): Likewise.
3742 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3743 (get_last_value): Likewise.
3744 * convert.c (convert_to_integer_1): Likewise.
3745 * cse.c (cse_insn): Likewise.
3746 * expr.c (expand_expr_real_1): Likewise.
3747 * lra-constraints.c (simplify_operand_subreg): Likewise.
3748 * optabs-query.c (can_atomic_load_p): Likewise.
3749 * optabs.c (expand_atomic_load): Likewise.
3750 (expand_atomic_store): Likewise.
3751 * ree.c (combine_reaching_defs): Likewise.
3752 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3753 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3754 * tree.h (type_has_mode_precision_p): Likewise.
3755 * ubsan.c (instrument_si_overflow): Likewise.
3757 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3758 Alan Hayward <alan.hayward@arm.com>
3759 David Sherwood <david.sherwood@arm.com>
3761 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3762 polynomial numbers of units.
3763 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3764 (valid_vector_subparts_p): New function.
3765 (build_vector_type): Remove temporary shim and take the number
3766 of units as a poly_uint64 rather than an int.
3767 (build_opaque_vector_type): Take the number of units as a
3768 poly_uint64 rather than an int.
3769 * tree.c (build_vector_from_ctor): Handle polynomial
3770 TYPE_VECTOR_SUBPARTS.
3771 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3772 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3773 (build_vector_from_val): If the number of units is variable,
3774 use build_vec_duplicate_cst for constant operands and
3775 VEC_DUPLICATE_EXPR otherwise.
3776 (make_vector_type): Remove temporary is_constant ().
3777 (build_vector_type, build_opaque_vector_type): Take the number of
3778 units as a poly_uint64 rather than an int.
3779 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3780 VECTOR_CST_NELTS.
3781 * cfgexpand.c (expand_debug_expr): Likewise.
3782 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3783 (store_constructor, expand_expr_real_1): Likewise.
3784 (const_scalar_mask_from_tree): Likewise.
3785 * fold-const-call.c (fold_const_reduction): Likewise.
3786 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3787 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3788 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3789 (fold_relational_const): Likewise.
3790 (native_interpret_vector): Likewise. Change the size from an
3791 int to an unsigned int.
3792 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3793 TYPE_VECTOR_SUBPARTS.
3794 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3795 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3796 duplicating a non-constant operand into a variable-length vector.
3797 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3798 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3799 * ipa-icf.c (sem_variable::equals): Likewise.
3800 * match.pd: Likewise.
3801 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3802 * print-tree.c (print_node): Likewise.
3803 * stor-layout.c (layout_type): Likewise.
3804 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3805 * tree-cfg.c (verify_gimple_comparison): Likewise.
3806 (verify_gimple_assign_binary): Likewise.
3807 (verify_gimple_assign_ternary): Likewise.
3808 (verify_gimple_assign_single): Likewise.
3809 * tree-pretty-print.c (dump_generic_node): Likewise.
3810 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3811 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3812 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3813 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3814 (vect_shift_permute_load_chain): Likewise.
3815 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3816 (expand_vector_condition, optimize_vector_constructor): Likewise.
3817 (lower_vec_perm, get_compute_type): Likewise.
3818 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3819 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3820 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3821 (vect_recog_mask_conversion_pattern): Likewise.
3822 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3823 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3824 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3825 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3826 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3827 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3828 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3829 (supportable_widening_operation): Likewise.
3830 (supportable_narrowing_operation): Likewise.
3831 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3832 Likewise.
3833 * varasm.c (output_constant): Likewise.
3835 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3836 Alan Hayward <alan.hayward@arm.com>
3837 David Sherwood <david.sherwood@arm.com>
3839 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3840 so that both the length == 3 and length != 3 cases set up their
3841 own permute vectors. Add comments explaining why we know the
3842 number of elements is constant.
3843 (vect_permute_load_chain): Likewise.
3845 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3846 Alan Hayward <alan.hayward@arm.com>
3847 David Sherwood <david.sherwood@arm.com>
3849 * machmode.h (mode_nunits): Change from unsigned char to
3850 poly_uint16_pod.
3851 (ONLY_FIXED_SIZE_MODES): New macro.
3852 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3853 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3854 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3855 New typedefs.
3856 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3857 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3858 or if measurement_type is not polynomial.
3859 * genmodes.c (ZERO_COEFFS): New macro.
3860 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3861 poly_uint16.
3862 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3863 Use ZERO_COEFFS when emitting initializers.
3864 * data-streamer.h (bp_pack_poly_value): New function.
3865 (bp_unpack_poly_value): Likewise.
3866 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3867 for GET_MODE_NUNITS.
3868 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3869 for GET_MODE_NUNITS.
3870 * tree.c (make_vector_type): Remove temporary shim and make
3871 the real function take the number of units as a poly_uint64
3872 rather than an int.
3873 (build_vector_type_for_mode): Handle polynomial nunits.
3874 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3875 * emit-rtl.c (const_vec_series_p_1): Likewise.
3876 (gen_rtx_CONST_VECTOR): Likewise.
3877 * fold-const.c (test_vec_duplicate_folding): Likewise.
3878 * genrecog.c (validate_pattern): Likewise.
3879 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3880 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3881 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3882 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3883 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3884 * rtlanal.c (subreg_get_info): Likewise.
3885 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3886 (vect_grouped_load_supported): Likewise.
3887 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3888 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3889 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3890 (simplify_const_unary_operation, simplify_binary_operation_1)
3891 (simplify_const_binary_operation, simplify_ternary_operation)
3892 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3893 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3894 instead of CONST_VECTOR_NUNITS.
3895 * varasm.c (output_constant_pool_2): Likewise.
3896 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3897 explicit-encoded elements in the XVEC for variable-length vectors.
3899 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3901 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3903 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3904 Alan Hayward <alan.hayward@arm.com>
3905 David Sherwood <david.sherwood@arm.com>
3907 * coretypes.h (fixed_size_mode): Declare.
3908 (fixed_size_mode_pod): New typedef.
3909 * builtins.h (target_builtins::x_apply_args_mode)
3910 (target_builtins::x_apply_result_mode): Change type to
3911 fixed_size_mode_pod.
3912 * builtins.c (apply_args_size, apply_result_size, result_vector)
3913 (expand_builtin_apply_args_1, expand_builtin_apply)
3914 (expand_builtin_return): Update accordingly.
3916 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3918 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3919 * cselib.c (cselib_hash_rtx): Likewise.
3920 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3921 CONST_VECTOR encoding.
3923 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3924 Jeff Law <law@redhat.com>
3926 PR target/83641
3927 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3928 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3929 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3930 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3932 PR target/83641
3933 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3934 explicitly probe *sp in a noreturn function if there were any callee
3935 register saves or frame pointer is needed.
3937 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3939 PR debug/83621
3940 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3941 BLKmode for ternary, binary or unary expressions.
3943 PR debug/83645
3944 * var-tracking.c (delete_vta_debug_insn): New inline function.
3945 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3946 insns from get_insns () to NULL instead of each bb separately.
3947 Use delete_vta_debug_insn. No longer static.
3948 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3949 delete_vta_debug_insns callers.
3950 * rtl.h (delete_vta_debug_insns): Declare.
3951 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3952 instead of variable_tracking_main.
3954 2018-01-03 Martin Sebor <msebor@redhat.com>
3956 PR tree-optimization/83603
3957 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3958 arguments past the endof the argument list in functions declared
3959 without a prototype.
3960 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3961 Avoid checking when arguments are null.
3963 2018-01-03 Martin Sebor <msebor@redhat.com>
3965 PR c/83559
3966 * doc/extend.texi (attribute const): Fix a typo.
3967 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3968 issuing -Wsuggest-attribute for void functions.
3970 2018-01-03 Martin Sebor <msebor@redhat.com>
3972 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3973 offset_int::from instead of wide_int::to_shwi.
3974 (maybe_diag_overlap): Remove assertion.
3975 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3976 * gimple-ssa-sprintf.c (format_directive): Same.
3977 (parse_directive): Same.
3978 (sprintf_dom_walker::compute_format_length): Same.
3979 (try_substitute_return_value): Same.
3981 2017-01-03 Jeff Law <law@redhat.com>
3983 PR middle-end/83654
3984 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3985 non-constant residual for zero at runtime and avoid probing in
3986 that case. Reorganize code for trailing problem to mirror handling
3987 of the residual.
3989 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3991 PR tree-optimization/83501
3992 * tree-ssa-strlen.c (get_string_cst): New.
3993 (handle_char_store): Call get_string_cst.
3995 2018-01-03 Martin Liska <mliska@suse.cz>
3997 PR tree-optimization/83593
3998 * tree-ssa-strlen.c: Include tree-cfg.h.
3999 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4000 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4001 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4002 to false.
4003 (strlen_dom_walker::before_dom_children): Call
4004 gimple_purge_dead_eh_edges. Dump tranformation with details
4005 dump flags.
4006 (strlen_dom_walker::before_dom_children): Update call by adding
4007 new argument cleanup_eh.
4008 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4010 2018-01-03 Martin Liska <mliska@suse.cz>
4012 PR ipa/83549
4013 * cif-code.def (VARIADIC_THUNK): New enum value.
4014 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4015 thunks.
4017 2018-01-03 Jan Beulich <jbeulich@suse.com>
4019 * sse.md (mov<mode>_internal): Tighten condition for when to use
4020 vmovdqu<ssescalarsize> for TI and OI modes.
4022 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4024 Update copyright years.
4026 2018-01-03 Martin Liska <mliska@suse.cz>
4028 PR ipa/83594
4029 * ipa-visibility.c (function_and_variable_visibility): Skip
4030 functions with noipa attribure.
4032 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4034 * gcc.c (process_command): Update copyright notice dates.
4035 * gcov-dump.c (print_version): Ditto.
4036 * gcov.c (print_version): Ditto.
4037 * gcov-tool.c (print_version): Ditto.
4038 * gengtype.c (create_file): Ditto.
4039 * doc/cpp.texi: Bump @copying's copyright year.
4040 * doc/cppinternals.texi: Ditto.
4041 * doc/gcc.texi: Ditto.
4042 * doc/gccint.texi: Ditto.
4043 * doc/gcov.texi: Ditto.
4044 * doc/install.texi: Ditto.
4045 * doc/invoke.texi: Ditto.
4047 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4049 * vector-builder.h (vector_builder::m_full_nelts): Change from
4050 unsigned int to poly_uint64.
4051 (vector_builder::full_nelts): Update prototype accordingly.
4052 (vector_builder::new_vector): Likewise.
4053 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
4054 (vector_builder::operator ==): Likewise.
4055 (vector_builder::finalize): Likewise.
4056 * int-vector-builder.h (int_vector_builder::int_vector_builder):
4057 Take the number of elements as a poly_uint64 rather than an
4058 unsigned int.
4059 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
4060 from unsigned int to poly_uint64.
4061 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
4062 (vec_perm_indices::new_vector): Likewise.
4063 (vec_perm_indices::length): Likewise.
4064 (vec_perm_indices::nelts_per_input): Likewise.
4065 (vec_perm_indices::input_nelts): Likewise.
4066 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
4067 number of elements per input as a poly_uint64 rather than an
4068 unsigned int. Use the original encoding for variable-length
4069 vectors, rather than clamping each individual element.
4070 For the second and subsequent elements in each pattern,
4071 clamp the step and base before clamping their sum.
4072 (vec_perm_indices::series_p): Handle polynomial element counts.
4073 (vec_perm_indices::all_in_range_p): Likewise.
4074 (vec_perm_indices_to_tree): Likewise.
4075 (vec_perm_indices_to_rtx): Likewise.
4076 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
4077 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
4078 (tree_vector_builder::new_binary_operation): Handle polynomial
4079 element counts. Return false if we need to know the number
4080 of elements at compile time.
4081 * fold-const.c (fold_vec_perm): Punt if the number of elements
4082 isn't known at compile time.
4084 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4086 * vec-perm-indices.h (vec_perm_builder): Change element type
4087 from HOST_WIDE_INT to poly_int64.
4088 (vec_perm_indices::element_type): Update accordingly.
4089 (vec_perm_indices::clamp): Handle polynomial element_types.
4090 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4091 (vec_perm_indices::all_in_range_p): Likewise.
4092 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
4093 than shwi trees.
4094 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
4095 polynomial vec_perm_indices element types.
4096 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
4097 * fold-const.c (fold_vec_perm): Likewise.
4098 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4099 * tree-vect-generic.c (lower_vec_perm): Likewise.
4100 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4101 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4102 element type to HOST_WIDE_INT.
4104 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4105 Alan Hayward <alan.hayward@arm.com>
4106 David Sherwood <david.sherwood@arm.com>
4108 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4109 rather than an int. Use plus_constant.
4110 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4111 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4113 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4114 Alan Hayward <alan.hayward@arm.com>
4115 David Sherwood <david.sherwood@arm.com>
4117 * calls.c (emit_call_1, expand_call): Change struct_value_size from
4118 a HOST_WIDE_INT to a poly_int64.
4120 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4121 Alan Hayward <alan.hayward@arm.com>
4122 David Sherwood <david.sherwood@arm.com>
4124 * calls.c (load_register_parameters): Cope with polynomial
4125 mode sizes. Require a constant size for BLKmode parameters
4126 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
4127 forces a parameter to be padded at the lsb end in order to
4128 fill a complete number of words, require the parameter size
4129 to be ordered wrt UNITS_PER_WORD.
4131 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4132 Alan Hayward <alan.hayward@arm.com>
4133 David Sherwood <david.sherwood@arm.com>
4135 * reload1.c (spill_stack_slot_width): Change element type
4136 from unsigned int to poly_uint64_pod.
4137 (alter_reg): Treat mode sizes as polynomial.
4139 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4140 Alan Hayward <alan.hayward@arm.com>
4141 David Sherwood <david.sherwood@arm.com>
4143 * reload.c (complex_word_subreg_p): New function.
4144 (reload_inner_reg_of_subreg, push_reload): Use it.
4146 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4147 Alan Hayward <alan.hayward@arm.com>
4148 David Sherwood <david.sherwood@arm.com>
4150 * lra-constraints.c (process_alt_operands): Reject matched
4151 operands whose sizes aren't ordered.
4152 (match_reload): Refer to this check here.
4154 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4155 Alan Hayward <alan.hayward@arm.com>
4156 David Sherwood <david.sherwood@arm.com>
4158 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4159 that the mode size is in the set {1, 2, 4, 8, 16}.
4161 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4162 Alan Hayward <alan.hayward@arm.com>
4163 David Sherwood <david.sherwood@arm.com>
4165 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4166 Use plus_constant instead of gen_rtx_PLUS.
4168 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4169 Alan Hayward <alan.hayward@arm.com>
4170 David Sherwood <david.sherwood@arm.com>
4172 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4173 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4174 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4175 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4176 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4177 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4178 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4179 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4180 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4181 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4182 a poly_int64.
4183 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4184 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4185 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4186 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4187 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4188 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4189 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4190 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4191 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4192 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4193 function.
4194 * expr.c (emit_move_resolve_push): Treat the input and result
4195 of PUSH_ROUNDING as a poly_int64.
4196 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4197 (emit_push_insn): Likewise.
4198 * lra-eliminations.c (mark_not_eliminable): Likewise.
4199 * recog.c (push_operand): Likewise.
4200 * reload1.c (elimination_effects): Likewise.
4201 * rtlanal.c (nonzero_bits1): Likewise.
4202 * calls.c (store_one_arg): Likewise. Require the padding to be
4203 known at compile time.
4205 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4206 Alan Hayward <alan.hayward@arm.com>
4207 David Sherwood <david.sherwood@arm.com>
4209 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4210 Use plus_constant instead of gen_rtx_PLUS.
4212 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4213 Alan Hayward <alan.hayward@arm.com>
4214 David Sherwood <david.sherwood@arm.com>
4216 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4217 rather than an int.
4219 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4220 Alan Hayward <alan.hayward@arm.com>
4221 David Sherwood <david.sherwood@arm.com>
4223 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4224 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4225 via stack temporaries. Treat the mode size as polynomial too.
4227 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4228 Alan Hayward <alan.hayward@arm.com>
4229 David Sherwood <david.sherwood@arm.com>
4231 * expr.c (expand_expr_real_2): When handling conversions involving
4232 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4233 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4234 as a poly_uint64 too.
4236 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4237 Alan Hayward <alan.hayward@arm.com>
4238 David Sherwood <david.sherwood@arm.com>
4240 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4242 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4243 Alan Hayward <alan.hayward@arm.com>
4244 David Sherwood <david.sherwood@arm.com>
4246 * combine.c (can_change_dest_mode): Handle polynomial
4247 REGMODE_NATURAL_SIZE.
4248 * expmed.c (store_bit_field_1): Likewise.
4249 * expr.c (store_constructor): Likewise.
4250 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4251 and polynomial REGMODE_NATURAL_SIZE.
4252 (gen_lowpart_common): Likewise.
4253 * reginfo.c (record_subregs_of_mode): Likewise.
4254 * rtlanal.c (read_modify_subreg_p): Likewise.
4256 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4257 Alan Hayward <alan.hayward@arm.com>
4258 David Sherwood <david.sherwood@arm.com>
4260 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4261 numbers of elements.
4263 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4264 Alan Hayward <alan.hayward@arm.com>
4265 David Sherwood <david.sherwood@arm.com>
4267 * match.pd: Cope with polynomial numbers of vector elements.
4269 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4270 Alan Hayward <alan.hayward@arm.com>
4271 David Sherwood <david.sherwood@arm.com>
4273 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4274 in a POINTER_PLUS_EXPR.
4276 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4277 Alan Hayward <alan.hayward@arm.com>
4278 David Sherwood <david.sherwood@arm.com>
4280 * omp-simd-clone.c (simd_clone_subparts): New function.
4281 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4282 (ipa_simd_modify_function_body): Likewise.
4284 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4285 Alan Hayward <alan.hayward@arm.com>
4286 David Sherwood <david.sherwood@arm.com>
4288 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4289 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4290 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4291 (expand_vector_condition, vector_element): Likewise.
4292 (subparts_gt): New function.
4293 (get_compute_type): Use subparts_gt.
4294 (count_type_subparts): Delete.
4295 (expand_vector_operations_1): Use subparts_gt instead of
4296 count_type_subparts.
4298 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4299 Alan Hayward <alan.hayward@arm.com>
4300 David Sherwood <david.sherwood@arm.com>
4302 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4303 (vect_compile_time_alias): ...this new function. Do the calculation
4304 on poly_ints rather than trees.
4305 (vect_prune_runtime_alias_test_list): Update call accordingly.
4307 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4308 Alan Hayward <alan.hayward@arm.com>
4309 David Sherwood <david.sherwood@arm.com>
4311 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4312 numbers of units.
4313 (vect_schedule_slp_instance): Likewise.
4315 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4316 Alan Hayward <alan.hayward@arm.com>
4317 David Sherwood <david.sherwood@arm.com>
4319 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4320 constant and extern definitions for variable-length vectors.
4321 (vect_get_constant_vectors): Note that the number of units
4322 is known to be constant.
4324 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4325 Alan Hayward <alan.hayward@arm.com>
4326 David Sherwood <david.sherwood@arm.com>
4328 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4329 of units as polynomial. Choose between WIDE and NARROW based
4330 on multiple_p.
4332 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4333 Alan Hayward <alan.hayward@arm.com>
4334 David Sherwood <david.sherwood@arm.com>
4336 * tree-vect-stmts.c (simd_clone_subparts): New function.
4337 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4339 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4340 Alan Hayward <alan.hayward@arm.com>
4341 David Sherwood <david.sherwood@arm.com>
4343 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4344 vectors as polynomial. Use build_index_vector for
4345 IFN_GOMP_SIMD_LANE.
4347 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4348 Alan Hayward <alan.hayward@arm.com>
4349 David Sherwood <david.sherwood@arm.com>
4351 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4352 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4353 for variable-length vectors.
4354 (vectorizable_mask_load_store): Treat the number of units as
4355 polynomial, asserting that it is constant if the condition has
4356 already been enforced.
4357 (vectorizable_store, vectorizable_load): Likewise.
4359 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4360 Alan Hayward <alan.hayward@arm.com>
4361 David Sherwood <david.sherwood@arm.com>
4363 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4364 of units as polynomial. Punt if we can't tell at compile time
4365 which vector contains the final result.
4367 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4368 Alan Hayward <alan.hayward@arm.com>
4369 David Sherwood <david.sherwood@arm.com>
4371 * tree-vect-loop.c (vectorizable_induction): Treat the number
4372 of units as polynomial. Punt on SLP inductions. Use an integer
4373 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4374 cast of such a series for variable-length floating-point
4375 reductions.
4377 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4378 Alan Hayward <alan.hayward@arm.com>
4379 David Sherwood <david.sherwood@arm.com>
4381 * tree.h (build_index_vector): Declare.
4382 * tree.c (build_index_vector): New function.
4383 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4384 of units as polynomial, forcibly converting it to a constant if
4385 vectorizable_reduction has already enforced the condition.
4386 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4387 to create a {1,2,3,...} vector.
4388 (vectorizable_reduction): Treat the number of units as polynomial.
4389 Choose vectype_in based on the largest scalar element size rather
4390 than the smallest number of units. Enforce the restrictions
4391 relied on above.
4393 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4394 Alan Hayward <alan.hayward@arm.com>
4395 David Sherwood <david.sherwood@arm.com>
4397 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4398 number of units as polynomial.
4400 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4401 Alan Hayward <alan.hayward@arm.com>
4402 David Sherwood <david.sherwood@arm.com>
4404 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4405 * target.def (autovectorize_vector_sizes): Return the vector sizes
4406 by pointer, using vector_sizes rather than a bitmask.
4407 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4408 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4409 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4410 Likewise.
4411 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4412 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4413 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4414 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4415 * omp-general.c (omp_max_vf): Likewise.
4416 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4417 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4418 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4419 * tree-vect-slp.c (vect_slp_bb): Likewise.
4420 * doc/tm.texi: Regenerate.
4421 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4422 to a poly_uint64.
4423 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4424 the vector size as a poly_uint64 rather than an unsigned int.
4425 (current_vector_size): Change from an unsigned int to a poly_uint64.
4426 (get_vectype_for_scalar_type): Update accordingly.
4427 * tree.h (build_truth_vector_type): Take the size and number of
4428 units as a poly_uint64 rather than an unsigned int.
4429 (build_vector_type): Add a temporary overload that takes
4430 the number of units as a poly_uint64 rather than an unsigned int.
4431 * tree.c (make_vector_type): Likewise.
4432 (build_truth_vector_type): Take the number of units as a poly_uint64
4433 rather than an unsigned int.
4435 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4436 Alan Hayward <alan.hayward@arm.com>
4437 David Sherwood <david.sherwood@arm.com>
4439 * target.def (get_mask_mode): Take the number of units and length
4440 as poly_uint64s rather than unsigned ints.
4441 * targhooks.h (default_get_mask_mode): Update accordingly.
4442 * targhooks.c (default_get_mask_mode): Likewise.
4443 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4444 * doc/tm.texi: Regenerate.
4446 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4447 Alan Hayward <alan.hayward@arm.com>
4448 David Sherwood <david.sherwood@arm.com>
4450 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4451 * omp-general.c (omp_max_vf): Likewise.
4452 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4453 (expand_omp_simd): Handle polynomial safelen.
4454 * omp-low.c (omplow_simd_context): Add a default constructor.
4455 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4456 (lower_rec_simd_input_clauses): Update accordingly.
4457 (lower_rec_input_clauses): Likewise.
4459 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4460 Alan Hayward <alan.hayward@arm.com>
4461 David Sherwood <david.sherwood@arm.com>
4463 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4464 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4465 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4466 (vect_analyze_slp_cost): Likewise.
4467 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4468 (vect_model_load_cost): Likewise.
4470 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4471 Alan Hayward <alan.hayward@arm.com>
4472 David Sherwood <david.sherwood@arm.com>
4474 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4475 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4476 from an unsigned int * to a poly_uint64_pod *.
4477 (calculate_unrolling_factor): New function.
4478 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4480 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4481 Alan Hayward <alan.hayward@arm.com>
4482 David Sherwood <david.sherwood@arm.com>
4484 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4485 from an unsigned int to a poly_uint64.
4486 (_loop_vec_info::slp_unrolling_factor): Likewise.
4487 (_loop_vec_info::vectorization_factor): Change from an int
4488 to a poly_uint64.
4489 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4490 (vect_get_num_vectors): New function.
4491 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4492 (vect_get_num_copies): Use vect_get_num_vectors.
4493 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4494 to an unsigned int *.
4495 (vect_analyze_data_refs): Change min_vf from an int * to a
4496 poly_uint64 *.
4497 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4498 than an unsigned HOST_WIDE_INT.
4499 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4500 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4501 to an unsigned int *.
4502 (vect_analyze_data_ref_dependences): Likewise.
4503 (vect_compute_data_ref_alignment): Handle polynomial vf.
4504 (vect_enhance_data_refs_alignment): Likewise.
4505 (vect_prune_runtime_alias_test_list): Likewise.
4506 (vect_shift_permute_load_chain): Likewise.
4507 (vect_supportable_dr_alignment): Likewise.
4508 (dependence_distance_ge_vf): Take the vectorization factor as a
4509 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4510 (vect_analyze_data_refs): Change min_vf from an int * to a
4511 poly_uint64 *.
4512 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4513 vfm1 as a poly_uint64 rather than an int. Make the same change
4514 for the returned bound_scalar.
4515 (vect_gen_vector_loop_niters): Handle polynomial vf.
4516 (vect_do_peeling): Likewise. Update call to
4517 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4518 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4519 be constant.
4520 * tree-vect-loop.c (vect_determine_vectorization_factor)
4521 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4522 (vect_get_known_peeling_cost): Likewise.
4523 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4524 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4525 (vect_transform_loop): Likewise. Use the lowest possible VF when
4526 updating the upper bounds of the loop.
4527 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4528 rather than an int.
4529 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4530 polynomial unroll factors.
4531 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4532 (vect_make_slp_decision): Likewise.
4533 (vect_supported_load_permutation_p): Likewise, and polynomial
4534 vf too.
4535 (vect_analyze_slp_cost): Handle polynomial vf.
4536 (vect_slp_analyze_node_operations): Likewise.
4537 (vect_slp_analyze_bb_1): Likewise.
4538 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4539 than an unsigned HOST_WIDE_INT.
4540 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4541 (vectorizable_load): Handle polynomial vf.
4542 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4543 a poly_uint64.
4544 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4546 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4547 Alan Hayward <alan.hayward@arm.com>
4548 David Sherwood <david.sherwood@arm.com>
4550 * match.pd: Handle bit operations involving three constants
4551 and try to fold one pair.
4553 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4555 * tree-vect-loop-manip.c: Include gimple-fold.h.
4556 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4557 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4558 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4559 Add a path that uses a step of VF instead of 1, but disable it
4560 for now.
4561 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4562 and niters_no_overflow parameters. Update calls to
4563 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4564 Create a new SSA name if the latter choses to use a ste other
4565 than zero, and return it via niters_vector_mult_vf_var.
4566 * tree-vect-loop.c (vect_transform_loop): Update calls to
4567 vect_do_peeling, vect_gen_vector_loop_niters and
4568 slpeel_make_loop_iterate_ntimes.
4569 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4570 (vect_gen_vector_loop_niters): Update declarations after above changes.
4572 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4574 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4575 128-bit round to integer instructions.
4576 (ceil<mode>2): Likewise.
4577 (btrunc<mode>2): Likewise.
4578 (round<mode>2): Likewise.
4580 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4582 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4583 unaligned VSX load/store on P8/P9.
4584 (expand_block_clear): Allow the use of unaligned VSX
4585 load/store on P8/P9.
4587 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4589 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4590 New function.
4591 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4592 swap associated with both a load and a store.
4594 2018-01-02 Andrew Waterman <andrew@sifive.com>
4596 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4597 * config/riscv/riscv.md (clear_cache): Use it.
4599 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4601 * web.c: Remove out-of-date comment.
4603 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4605 * expr.c (fixup_args_size_notes): Check that any existing
4606 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4607 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4608 (emit_single_push_insn): ...here.
4610 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4612 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4613 (const_vector_encoded_nelts): New function.
4614 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4615 (const_vector_int_elt, const_vector_elt): Declare.
4616 * emit-rtl.c (const_vector_int_elt_1): New function.
4617 (const_vector_elt): Likewise.
4618 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4619 of CONST_VECTOR_ELT.
4621 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4623 * expr.c: Include rtx-vector-builder.h.
4624 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4625 directly on the tree encoding.
4626 (const_vector_from_tree): Likewise.
4627 * optabs.c: Include rtx-vector-builder.h.
4628 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4629 sequence of "u" values.
4630 * vec-perm-indices.c: Include rtx-vector-builder.h.
4631 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4632 directly on the vec_perm_indices encoding.
4634 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4636 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4637 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4638 * rtx-vector-builder.h: New file.
4639 * rtx-vector-builder.c: Likewise.
4640 * rtl.h (rtx_def::u2): Add a const_vector field.
4641 (CONST_VECTOR_NPATTERNS): New macro.
4642 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4643 (CONST_VECTOR_DUPLICATE_P): Likewise.
4644 (CONST_VECTOR_STEPPED_P): Likewise.
4645 (CONST_VECTOR_ENCODED_ELT): Likewise.
4646 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4647 (unwrap_const_vec_duplicate): Likewise.
4648 (const_vec_series_p): Check for a non-duplicated vector encoding.
4649 Say that the function only returns true for integer vectors.
4650 * emit-rtl.c: Include rtx-vector-builder.h.
4651 (gen_const_vec_duplicate_1): Delete.
4652 (gen_const_vector): Call gen_const_vec_duplicate instead of
4653 gen_const_vec_duplicate_1.
4654 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4655 (gen_const_vec_duplicate): Use rtx_vector_builder.
4656 (gen_const_vec_series): Likewise.
4657 (gen_rtx_CONST_VECTOR): Likewise.
4658 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4659 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4660 Build a new vector rather than modifying a CONST_VECTOR in-place.
4661 (handle_special_swappables): Update call accordingly.
4662 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4663 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4664 Build a new vector rather than modifying a CONST_VECTOR in-place.
4665 (handle_special_swappables): Update call accordingly.
4667 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4669 * simplify-rtx.c (simplify_const_binary_operation): Use
4670 CONST_VECTOR_ELT instead of XVECEXP.
4672 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4674 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4675 the selector elements to be different from the data elements
4676 if the selector is a VECTOR_CST.
4677 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4678 ssizetype for the selector.
4680 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4682 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4683 before testing each element individually.
4684 * tree-vect-generic.c (lower_vec_perm): Likewise.
4686 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4688 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4689 * selftest-run-tests.c (selftest::run_tests): Call it.
4690 * vector-builder.h (vector_builder::operator ==): New function.
4691 (vector_builder::operator !=): Likewise.
4692 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4693 (vec_perm_indices::all_from_input_p): New function.
4694 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4695 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4696 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4697 instead of reading the VECTOR_CST directly. Detect whether both
4698 vector inputs are the same before constructing the vec_perm_indices,
4699 and update the number of inputs argument accordingly. Use the
4700 utility functions added above. Only construct sel2 if we need to.
4702 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4704 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4705 the broadcast of the low byte.
4706 (expand_mult_highpart): Use an explicit encoding for the permutes.
4707 * optabs-query.c (can_mult_highpart_p): Likewise.
4708 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4709 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4710 (vectorizable_bswap): Likewise.
4711 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4712 explicit encoding for the power-of-2 permutes.
4713 (vect_permute_store_chain): Likewise.
4714 (vect_grouped_load_supported): Likewise.
4715 (vect_permute_load_chain): Likewise.
4717 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4719 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4720 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4721 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4722 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4723 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4724 (vect_gen_perm_mask_any): Likewise.
4726 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4728 * int-vector-builder.h: New file.
4729 * vec-perm-indices.h: Include int-vector-builder.h.
4730 (vec_perm_indices): Redefine as an int_vector_builder.
4731 (auto_vec_perm_indices): Delete.
4732 (vec_perm_builder): Redefine as a stand-alone class.
4733 (vec_perm_indices::vec_perm_indices): New function.
4734 (vec_perm_indices::clamp): Likewise.
4735 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4736 (vec_perm_indices::new_vector): New function.
4737 (vec_perm_indices::new_expanded_vector): Update for new
4738 vec_perm_indices class.
4739 (vec_perm_indices::rotate_inputs): New function.
4740 (vec_perm_indices::all_in_range_p): Operate directly on the
4741 encoded form, without computing elided elements.
4742 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4743 encoding. Update for new vec_perm_indices class.
4744 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4745 the given vec_perm_builder.
4746 (expand_vec_perm_var): Update vec_perm_builder constructor.
4747 (expand_mult_highpart): Use vec_perm_builder instead of
4748 auto_vec_perm_indices.
4749 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4750 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4751 or double series encoding as appropriate.
4752 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4753 vec_perm_indices instead of auto_vec_perm_indices.
4754 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4755 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4756 (vect_permute_store_chain): Likewise.
4757 (vect_grouped_load_supported): Likewise.
4758 (vect_permute_load_chain): Likewise.
4759 (vect_shift_permute_load_chain): Likewise.
4760 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4761 (vect_transform_slp_perm_load): Likewise.
4762 (vect_schedule_slp_instance): Likewise.
4763 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4764 (vectorizable_mask_load_store): Likewise.
4765 (vectorizable_bswap): Likewise.
4766 (vectorizable_store): Likewise.
4767 (vectorizable_load): Likewise.
4768 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4769 vec_perm_indices instead of auto_vec_perm_indices. Use
4770 tree_to_vec_perm_builder to read the vector from a tree.
4771 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4772 vec_perm_builder instead of a vec_perm_indices.
4773 (have_whole_vector_shift): Use vec_perm_builder and
4774 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4775 truncation to calc_vec_perm_mask_for_shift.
4776 (vect_create_epilog_for_reduction): Likewise.
4777 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4778 from auto_vec_perm_indices to vec_perm_indices.
4779 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4780 instead of changing individual elements.
4781 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4782 the vector in d.perm.
4783 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4784 from auto_vec_perm_indices to vec_perm_indices.
4785 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4786 instead of changing individual elements.
4787 (arm_vectorize_vec_perm_const): Use new_vector to install
4788 the vector in d.perm.
4789 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4790 Update vec_perm_builder constructor.
4791 (rs6000_expand_interleave): Likewise.
4792 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4793 (rs6000_expand_interleave): Likewise.
4795 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4797 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4798 to qimode could truncate the indices.
4799 * optabs.c (expand_vec_perm_var): Likewise.
4801 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4803 * Makefile.in (OBJS): Add vec-perm-indices.o.
4804 * vec-perm-indices.h: New file.
4805 * vec-perm-indices.c: Likewise.
4806 * target.h (vec_perm_indices): Replace with a forward class
4807 declaration.
4808 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4809 * optabs.h: Include vec-perm-indices.h.
4810 (expand_vec_perm): Delete.
4811 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4812 (expand_vec_perm_const): Declare.
4813 * target.def (vec_perm_const_ok): Replace with...
4814 (vec_perm_const): ...this new hook.
4815 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4816 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4817 * doc/tm.texi: Regenerate.
4818 * optabs.def (vec_perm_const): Delete.
4819 * doc/md.texi (vec_perm_const): Likewise.
4820 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4821 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4822 expand_vec_perm for constant permutation vectors. Assert that
4823 the mode of variable permutation vectors is the integer equivalent
4824 of the mode that is being permuted.
4825 * optabs-query.h (selector_fits_mode_p): Declare.
4826 * optabs-query.c: Include vec-perm-indices.h.
4827 (selector_fits_mode_p): New function.
4828 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4829 is defined, instead of checking whether the vec_perm_const_optab
4830 exists. Use targetm.vectorize.vec_perm_const instead of
4831 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4832 fit in the vector mode before using a variable permute.
4833 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4834 vec_perm_indices instead of an rtx.
4835 (expand_vec_perm): Replace with...
4836 (expand_vec_perm_const): ...this new function. Take the selector
4837 as a vec_perm_indices rather than an rtx. Also take the mode of
4838 the selector. Update call to shift_amt_for_vec_perm_mask.
4839 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4840 Use vec_perm_indices::new_expanded_vector to expand the original
4841 selector into bytes. Check whether the indices fit in the vector
4842 mode before using a variable permute.
4843 (expand_vec_perm_var): Make global.
4844 (expand_mult_highpart): Use expand_vec_perm_const.
4845 * fold-const.c: Includes vec-perm-indices.h.
4846 * tree-ssa-forwprop.c: Likewise.
4847 * tree-vect-data-refs.c: Likewise.
4848 * tree-vect-generic.c: Likewise.
4849 * tree-vect-loop.c: Likewise.
4850 * tree-vect-slp.c: Likewise.
4851 * tree-vect-stmts.c: Likewise.
4852 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4853 Delete.
4854 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4855 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4856 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4857 (aarch64_vectorize_vec_perm_const): ...this new function.
4858 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4859 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4860 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4861 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4862 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4863 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4864 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4865 into...
4866 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4867 check for NEON modes.
4868 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4869 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4870 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4871 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4872 into...
4873 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4874 the old VEC_PERM_CONST conditions.
4875 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4876 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4877 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4878 (ia64_vectorize_vec_perm_const_ok): Merge into...
4879 (ia64_vectorize_vec_perm_const): ...this new function.
4880 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4881 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4882 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4883 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4884 * config/mips/mips.c (mips_expand_vec_perm_const)
4885 (mips_vectorize_vec_perm_const_ok): Merge into...
4886 (mips_vectorize_vec_perm_const): ...this new function.
4887 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4888 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4889 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4890 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4891 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4892 (rs6000_expand_vec_perm_const): Delete.
4893 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4894 Delete.
4895 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4896 (altivec_expand_vec_perm_const_le): Take each operand individually.
4897 Operate on constant selectors rather than rtxes.
4898 (altivec_expand_vec_perm_const): Likewise. Update call to
4899 altivec_expand_vec_perm_const_le.
4900 (rs6000_expand_vec_perm_const): Delete.
4901 (rs6000_vectorize_vec_perm_const_ok): Delete.
4902 (rs6000_vectorize_vec_perm_const): New function.
4903 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4904 an element count and rtx array.
4905 (rs6000_expand_extract_even): Update call accordingly.
4906 (rs6000_expand_interleave): Likewise.
4907 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4908 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4909 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4910 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4911 (rs6000_expand_vec_perm_const): Delete.
4912 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4913 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4914 (altivec_expand_vec_perm_const_le): Take each operand individually.
4915 Operate on constant selectors rather than rtxes.
4916 (altivec_expand_vec_perm_const): Likewise. Update call to
4917 altivec_expand_vec_perm_const_le.
4918 (rs6000_expand_vec_perm_const): Delete.
4919 (rs6000_vectorize_vec_perm_const_ok): Delete.
4920 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4921 reference to the SPE evmerge intructions.
4922 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4923 an element count and rtx array.
4924 (rs6000_expand_extract_even): Update call accordingly.
4925 (rs6000_expand_interleave): Likewise.
4926 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4927 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4928 new function.
4929 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4931 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4933 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4934 vector mode and that that mode matches the mode of the data
4935 being permuted.
4936 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4937 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4938 directly using expand_vec_perm_1 when forcing selectors into
4939 registers.
4940 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4942 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4944 * optabs-query.h (can_vec_perm_p): Delete.
4945 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4946 * optabs-query.c (can_vec_perm_p): Split into...
4947 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4948 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4949 particular selector is valid.
4950 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4951 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4952 (vect_grouped_load_supported): Likewise.
4953 (vect_shift_permute_load_chain): Likewise.
4954 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4955 (vect_transform_slp_perm_load): Likewise.
4956 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4957 (vectorizable_bswap): Likewise.
4958 (vect_gen_perm_mask_checked): Likewise.
4959 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4960 implementations of variable permutation vectors into account
4961 when deciding which selector to use.
4962 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4963 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4964 with a false third argument.
4965 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4966 to test whether the constant selector is valid and can_vec_perm_var_p
4967 to test whether a variable selector is valid.
4969 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4971 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4972 * optabs-query.c (can_vec_perm_p): Likewise.
4973 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4974 instead of vec_perm_indices.
4975 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4976 (vect_gen_perm_mask_checked): Likewise,
4977 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4978 (vect_gen_perm_mask_checked): Likewise,
4980 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4982 * optabs-query.h (qimode_for_vec_perm): Declare.
4983 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4984 (qimode_for_vec_perm): ...this new function.
4985 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4987 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4989 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4990 does not have a conditional at the top.
4992 2018-01-02 Richard Biener <rguenther@suse.de>
4994 * ipa-inline.c (big_speedup_p): Fix expression.
4996 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4998 PR target/81616
4999 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5000 for generic 4->6.
5002 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
5004 PR target/81616
5005 Generic tuning.
5006 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5007 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5008 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5009 cond_taken_branch_cost 3->4.
5011 2018-01-01 Jakub Jelinek <jakub@redhat.com>
5013 PR tree-optimization/83581
5014 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5015 TODO_cleanup_cfg if any changes have been made.
5017 PR middle-end/83608
5018 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5019 convert_modes if target mode has the right side, but different mode
5020 class.
5022 PR middle-end/83609
5023 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5024 last argument when extracting from CONCAT. If either from_real or
5025 from_imag is NULL, use expansion through memory. If result is not
5026 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5027 the parts directly to inner mode, if even that fails, use expansion
5028 through memory.
5030 PR middle-end/83623
5031 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5032 check for bswap in mode rather than HImode and use that in expand_unop
5033 too.
5034 \f
5035 Copyright (C) 2018 Free Software Foundation, Inc.
5037 Copying and distribution of this file, with or without modification,
5038 are permitted in any medium without royalty provided the copyright
5039 notice and this notice are preserved.