| blob | d7b73e8f3a0b0ed6898a747139ba0462fb4792b5 |
1 /* Definitions of target machine for GNU compiler.
2 Renesas H8/300 (generic)
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999,
4 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 Contributed by Steve Chamberlain (sac@cygnus.com),
6 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 #ifndef GCC_H8300_H
26 #define GCC_H8300_H
28 /* Which CPU to compile for.
29 We use int for CPU_TYPE to avoid lots of casts. */
32 #endif
35 /* Various globals defined in h8300.c. */
40 /* Target CPU builtins. */
41 #define TARGET_CPU_CPP_BUILTINS() \
42 do \
43 { \
44 if (TARGET_H8300H) \
45 { \
49 if (TARGET_NORMAL_MODE) \
50 { \
52 } \
53 } \
54 else if (TARGET_H8300SX) \
55 { \
57 if (TARGET_NORMAL_MODE) \
58 { \
60 } \
61 } \
62 else if (TARGET_H8300S) \
63 { \
67 if (TARGET_NORMAL_MODE) \
68 { \
70 } \
71 } \
72 else \
73 { \
77 } \
78 } \
79 while (0)
81 #define LINK_SPEC "%{mh:%{mn:-m h8300hn}} %{mh:%{!mn:-m h8300h}} %{ms:%{mn:-m h8300sn}} %{ms:%{!mn:-m h8300s}}"
85 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
86 do \
87 { \
88 /* Basic block reordering is only beneficial on targets with cache \
89 and/or variable-cycle branches where (cycle count taken != \
91 flag_reorder_blocks = 0; \
92 } \
93 while (0)
95 /* Print subsidiary information on the compiler version in use. */
99 /* Run-time compilation parameters selecting different hardware subsets. */
103 /* Masks for the -m switches. */
104 #define MASK_H8300S 0x00000001
105 #define MASK_MAC 0x00000002
106 #define MASK_INT32 0x00000008
107 #define MASK_ADDRESSES 0x00000040
108 #define MASK_QUICKCALL 0x00000080
109 #define MASK_SLOWBYTE 0x00000100
110 #define MASK_NORMAL_MODE 0x00000200
111 #define MASK_RELAX 0x00000400
112 #define MASK_H8300H 0x00001000
113 #define MASK_ALIGN_300 0x00002000
114 #define MASK_H8300SX 0x00004000
116 /* Macros used in the machine description to test the flags. */
118 /* Make int's 32 bits. */
119 #define TARGET_INT32 (target_flags & MASK_INT32)
121 /* Dump recorded insn lengths into the output file. This helps debug the
122 md file. */
123 #define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES)
125 /* Pass the first few arguments in registers. */
126 #define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL)
128 /* Pretend byte accesses are slow. */
129 #define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE)
131 /* Select between the H8/300 and H8/300H CPUs. */
132 #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S)
133 #define TARGET_H8300H (target_flags & MASK_H8300H)
134 #define TARGET_H8300S (target_flags & (MASK_H8300S | MASK_H8300SX))
135 #define TARGET_H8300SX (target_flags & MASK_H8300SX)
136 /* Some multiply instructions are not available in all H8SX variants.
137 Use this macro instead of TARGET_H8300SX to indicate this, even
138 though we don't actually generate different code for now. */
139 #define TARGET_H8300SXMUL TARGET_H8300SX
140 #define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE)
142 /* mac register and relevant instructions are available. */
143 #define TARGET_MAC (target_flags & MASK_MAC)
145 /* Align all values on the H8/300H the same way as the H8/300. Specifically,
146 32 bit and larger values are aligned on 16 bit boundaries.
147 This is all the hardware requires, but the default is 32 bits for the H8/300H.
148 ??? Now watch someone add hardware floating point requiring 32 bit
149 alignment. */
150 #define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300)
152 /* Macro to define tables used to set the flags.
153 This is a list in braces of pairs in braces,
154 each pair being { "NAME", VALUE }
155 where VALUE is the bits to set or minus the bits to clear.
156 An empty string NAME is used to identify the default VALUE. */
158 #define TARGET_SWITCHES \
180 #ifdef IN_LIBGCC2
181 #undef TARGET_H8300H
182 #undef TARGET_H8300S
183 #undef TARGET_NORMAL_MODE
184 /* If compiling libgcc2, make these compile time constants based on what
185 flags are we actually compiling with. */
186 #ifdef __H8300H__
187 #define TARGET_H8300H 1
188 #else
189 #define TARGET_H8300H 0
190 #endif
191 #ifdef __H8300S__
192 #define TARGET_H8300S 1
193 #else
194 #define TARGET_H8300S 0
195 #endif
196 #ifdef __NORMAL_MODE__
197 #define TARGET_NORMAL_MODE 1
198 #else
199 #define TARGET_NORMAL_MODE 0
200 #endif
203 /* Do things that must be done once at start up. */
205 #define OVERRIDE_OPTIONS \
206 do \
207 { \
208 h8300_init_once (); \
209 } \
210 while (0)
212 /* Default target_flags if no switches specified. */
214 #ifndef TARGET_DEFAULT
215 #define TARGET_DEFAULT (MASK_QUICKCALL)
216 #endif
218 /* Show we can debug even without a frame pointer. */
219 /* #define CAN_DEBUG_WITHOUT_FP */
221 /* Define this if addresses of constant functions
222 shouldn't be put through pseudo regs where they can be cse'd.
223 Desirable on machines where ordinary constants are expensive
224 but a CALL with constant address is cheap.
226 Calls through a register are cheaper than calls to named
227 functions; however, the register pressure this causes makes
228 CSEing of function addresses generally a lose. */
229 #define NO_FUNCTION_CSE
230 \f
231 /* Target machine storage layout */
233 /* Define this if most significant bit is lowest numbered
234 in instructions that operate on numbered bit-fields.
235 This is not true on the H8/300. */
236 #define BITS_BIG_ENDIAN 0
238 /* Define this if most significant byte of a word is the lowest numbered. */
239 /* That is true on the H8/300. */
240 #define BYTES_BIG_ENDIAN 1
242 /* Define this if most significant word of a multiword number is lowest
243 numbered. */
244 #define WORDS_BIG_ENDIAN 1
246 #define MAX_BITS_PER_WORD 32
248 /* Width of a word, in units (bytes). */
249 #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
250 #define MIN_UNITS_PER_WORD 2
252 #define SHORT_TYPE_SIZE 16
253 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
254 #define LONG_TYPE_SIZE 32
255 #define LONG_LONG_TYPE_SIZE 64
256 #define FLOAT_TYPE_SIZE 32
257 #define DOUBLE_TYPE_SIZE 32
258 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
260 #define MAX_FIXED_MODE_SIZE 32
262 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
263 #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
265 /* Allocation boundary (in *bits*) for the code of a function. */
266 #define FUNCTION_BOUNDARY 16
268 /* Alignment of field after `int : 0' in a structure. */
269 /* One can argue this should be 32 for -mint32, but since 32 bit ints only
270 need 16 bit alignment, this is left as is so that -mint32 doesn't change
271 structure layouts. */
272 #define EMPTY_FIELD_BOUNDARY 16
274 /* No data type wants to be aligned rounder than this.
275 32 bit values are aligned as such on the H8/300H and H8S for speed. */
276 #define BIGGEST_ALIGNMENT \
277 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
279 /* The stack goes in 16/32 bit lumps. */
280 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32)
282 /* Define this if move instructions will actually fail to work
283 when given unaligned data. */
284 /* On the H8/300, longs can be aligned on halfword boundaries, but not
285 byte boundaries. */
286 #define STRICT_ALIGNMENT 1
287 \f
288 /* Standard register usage. */
290 /* Number of actual hardware registers.
291 The hardware registers are assigned numbers for the compiler
292 from 0 to just below FIRST_PSEUDO_REGISTER.
294 All registers that the compiler knows about must be given numbers,
295 even those that are not normally considered general registers.
297 Reg 9 does not correspond to any hardware register, but instead
298 appears in the RTL as an argument pointer prior to reload, and is
299 eliminated during reloading in favor of either the stack or frame
300 pointer. */
302 #define FIRST_PSEUDO_REGISTER 12
304 /* 1 for registers that have pervasive standard uses
305 and are not available for the register allocator. */
307 #define FIXED_REGISTERS \
309 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1 }
311 /* 1 for registers not available across function calls.
312 These must include the FIXED_REGISTERS and also any
313 registers that can be used without being saved.
314 The latter must include the registers where values are returned
315 and the register where structure-value addresses are passed.
316 Aside from that, you can include as many other registers as you
317 like.
319 H8 destroys r0,r1,r2,r3. */
321 #define CALL_USED_REGISTERS \
323 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1 }
325 #define REG_ALLOC_ORDER \
327 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10, 11 }
329 #define CONDITIONAL_REGISTER_USAGE \
330 { \
331 if (!TARGET_MAC) \
332 fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1; \
333 }
335 #define HARD_REGNO_NREGS(REGNO, MODE) \
336 h8300_hard_regno_nregs ((REGNO), (MODE))
338 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
339 h8300_hard_regno_mode_ok ((REGNO), (MODE))
341 /* Value is 1 if it is a good idea to tie two pseudo registers
342 when one has mode MODE1 and one has mode MODE2.
343 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
344 for any hard reg, then this must be 0 for correct output. */
345 #define MODES_TIEABLE_P(MODE1, MODE2) \
346 ((MODE1) == (MODE2) \
347 || (((MODE1) == QImode || (MODE1) == HImode \
348 || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \
349 && ((MODE2) == QImode || (MODE2) == HImode \
350 || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode))))
352 /* A C expression that is nonzero if hard register NEW_REG can be
353 considered for use as a rename register for OLD_REG register */
355 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
356 h8300_hard_regno_rename_ok (OLD_REG, NEW_REG)
358 /* Specify the registers used for certain standard purposes.
359 The values of these macros are register numbers. */
361 /* H8/300 pc is not overloaded on a register. */
363 /*#define PC_REGNUM 15*/
365 /* Register to use for pushing function arguments. */
366 #define STACK_POINTER_REGNUM SP_REG
368 /* Base register for access to local variables of the function. */
369 #define HARD_FRAME_POINTER_REGNUM HFP_REG
371 /* Base register for access to local variables of the function. */
372 #define FRAME_POINTER_REGNUM FP_REG
374 /* Value should be nonzero if functions must have frame pointers.
375 Zero means the frame pointer need not be set up (and parms
376 may be accessed via the stack pointer) in functions that seem suitable.
377 This is computed in `reload', in reload1.c. */
378 #define FRAME_POINTER_REQUIRED 0
380 /* Base register for access to arguments of the function. */
381 #define ARG_POINTER_REGNUM AP_REG
383 /* Register in which static-chain is passed to a function. */
384 #define STATIC_CHAIN_REGNUM SC_REG
386 /* Fake register that holds the address on the stack of the
387 current function's return address. */
388 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG
390 /* A C expression whose value is RTL representing the value of the return
391 address for the frame COUNT steps up from the current frame.
392 FRAMEADDR is already the frame pointer of the COUNT frame, assuming
393 a stack layout with the frame pointer as the first saved register. */
394 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME))
395 \f
396 /* Define the classes of registers for register constraints in the
397 machine description. Also define ranges of constants.
399 One of the classes must always be named ALL_REGS and include all hard regs.
400 If there is more than one class, another class must be named NO_REGS
401 and contain no registers.
403 The name GENERAL_REGS must be the name of a class (or an alias for
404 another name such as ALL_REGS). This is the class of registers
405 that is allowed by "g" or "r" in a register constraint.
406 Also, registers outside this class are allocated only when
407 instructions express preferences for them.
409 The classes must be numbered in nondecreasing order; that is,
410 a larger-numbered class must never be contained completely
411 in a smaller-numbered class.
413 For any two classes, it is very desirable that there be another
414 class that represents their union. */
419 };
421 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
423 /* Give names of register classes as strings for dump file. */
425 #define REG_CLASS_NAMES \
429 /* Define which registers fit in which classes.
430 This is an initializer for a vector of HARD_REG_SET
431 of length N_REG_CLASSES. */
433 #define REG_CLASS_CONTENTS \
441 }
443 /* The same information, inverted:
444 Return the class number of the smallest class containing
445 reg number REGNO. This could be a conditional expression
446 or could index an array. */
448 #define REGNO_REG_CLASS(REGNO) \
449 ((REGNO) == MAC_REG ? MAC_REGS \
450 : (REGNO) == COUNTER_REG ? COUNTER_REGS \
451 : (REGNO) == SOURCE_REG ? SOURCE_REGS \
452 : (REGNO) == DESTINATION_REG ? DESTINATION_REGS \
453 : GENERAL_REGS)
455 /* The class value for index registers, and the one for base regs. */
457 #define INDEX_REG_CLASS (TARGET_H8300SX ? GENERAL_REGS : NO_REGS)
458 #define BASE_REG_CLASS GENERAL_REGS
460 /* Get reg_class from a letter such as appears in the machine description.
462 'a' is the MAC register. */
464 #define REG_CLASS_FROM_LETTER(C) (h8300_reg_class_from_letter (C))
466 /* The letters I, J, K, L, M, N, O, P in a register constraint string
467 can be used to stand for particular ranges of immediate operands.
468 This macro defines what the ranges are.
469 C is the letter, and VALUE is a constant value.
470 Return 1 if VALUE is in the range specified by C. */
472 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
473 #define CONST_OK_FOR_J(VALUE) (((VALUE) & 0xff) == 0)
474 #define CONST_OK_FOR_L(VALUE) \
475 (TARGET_H8300H || TARGET_H8300S \
476 ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
477 : (VALUE) == 1 || (VALUE) == 2)
478 #define CONST_OK_FOR_M(VALUE) \
479 ((VALUE) == 1 || (VALUE) == 2)
480 #define CONST_OK_FOR_N(VALUE) \
481 (TARGET_H8300H || TARGET_H8300S \
482 ? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
483 : (VALUE) == -1 || (VALUE) == -2)
484 #define CONST_OK_FOR_O(VALUE) \
485 ((VALUE) == -1 || (VALUE) == -2)
487 /* Multi-letter constraints for constant are always started with P
488 (just because it was the only letter in the range left. New
489 constraints for constants should be added here. */
490 #define CONST_OK_FOR_Ppositive(VALUE, NBITS) \
491 ((VALUE) > 0 && (VALUE) < (1 << (NBITS)))
492 #define CONST_OK_FOR_Pnegative(VALUE, NBITS) \
493 ((VALUE) < 0 && (VALUE) > -(1 << (NBITS)))
494 #define CONST_OK_FOR_P(VALUE, STR) \
501 : 0)
502 #define CONSTRAINT_LEN_FOR_P(STR) \
506 : 0)
508 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR) \
510 : CONST_OK_FOR_LETTER_P ((VALUE), (C)))
512 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
519 0)
521 /* Similar, but for floating constants, and defining letters G and H.
522 Here VALUE is the CONST_DOUBLE rtx itself.
524 `G' is a floating-point zero. */
526 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
528 : 0)
530 /* Given an rtx X being reloaded into a reg required to be
531 in class CLASS, return the class of reg to actually use.
532 In general this is just CLASS; but on some machines
533 in some cases it is preferable to use a more restrictive class. */
535 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
537 /* Return the maximum number of consecutive registers
538 needed to represent mode MODE in a register of class CLASS. */
540 /* On the H8, this is the size of MODE in words. */
542 #define CLASS_MAX_NREGS(CLASS, MODE) \
543 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
545 /* Any SI register-to-register move may need to be reloaded,
546 so define REGISTER_MOVE_COST to be > 2 so that reload never
547 shortcuts. */
549 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
550 (CLASS1 == MAC_REGS || CLASS2 == MAC_REGS ? 6 : 3)
551 \f
552 /* Stack layout; function entry, exit and calling. */
554 /* Define this if pushing a word on the stack
555 makes the stack pointer a smaller address. */
557 #define STACK_GROWS_DOWNWARD
559 /* Define this if the nominal address of the stack frame
560 is at the high-address end of the local variables;
561 that is, each additional local variable allocated
562 goes at a more negative offset in the frame. */
564 #define FRAME_GROWS_DOWNWARD
566 /* Offset within stack frame to start allocating local variables at.
567 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
568 first local allocated. Otherwise, it is the offset to the BEGINNING
569 of the first local allocated. */
571 #define STARTING_FRAME_OFFSET 0
573 /* If we generate an insn to push BYTES bytes,
574 this says how many the stack pointer really advances by.
576 On the H8/300, @-sp really pushes a byte if you ask it to - but that's
577 dangerous, so we claim that it always pushes a word, then we catch
578 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output.
580 On the H8/300H, we simplify TARGET_QUICKCALL by setting this to 4
581 and doing a similar thing. */
583 #define PUSH_ROUNDING(BYTES) \
584 (((BYTES) + PARM_BOUNDARY / 8 - 1) & -PARM_BOUNDARY / 8)
586 /* Offset of first parameter from the argument pointer register value. */
587 /* Is equal to the size of the saved fp + pc, even if an fp isn't
588 saved since the value is used before we know. */
590 #define FIRST_PARM_OFFSET(FNDECL) 0
592 /* Value is the number of bytes of arguments automatically
593 popped when returning from a subroutine call.
594 FUNDECL is the declaration node of the function (as a tree),
595 FUNTYPE is the data type of the function (as a tree),
596 or for a library call it is an identifier node for the subroutine name.
597 SIZE is the number of bytes of arguments passed on the stack.
599 On the H8 the return does not pop anything. */
601 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
603 /* Definitions for register eliminations.
605 This is an array of structures. Each structure initializes one pair
606 of eliminable registers. The "from" register number is given first,
607 followed by "to". Eliminations of the same "from" register are listed
608 in order of preference.
610 We have three registers that can be eliminated on the h8300.
611 First, the frame pointer register can often be eliminated in favor
612 of the stack pointer register. Secondly, the argument pointer
613 register and the return address pointer register are always
614 eliminated; they are replaced with either the stack or frame
615 pointer. */
617 #define ELIMINABLE_REGS \
618 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
619 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
620 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
621 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
622 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
623 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
625 /* Given FROM and TO register numbers, say whether this elimination is allowed.
626 Frame pointer elimination is automatically handled.
628 For the h8300, if frame pointer elimination is being done, we would like to
629 convert ap and rp into sp, not fp.
631 All other eliminations are valid. */
633 #define CAN_ELIMINATE(FROM, TO) \
634 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
636 /* Define the offset between two registers, one to be eliminated, and the other
637 its replacement, at the start of a routine. */
639 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
640 ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO)))
642 /* Define how to find the value returned by a function.
643 VALTYPE is the data type of the value (as a tree).
644 If the precise function being called is known, FUNC is its FUNCTION_DECL;
645 otherwise, FUNC is 0.
647 On the H8 the return value is in R0/R1. */
649 #define FUNCTION_VALUE(VALTYPE, FUNC) \
650 gen_rtx_REG (TYPE_MODE (VALTYPE), R0_REG)
652 /* Define how to find the value returned by a library function
653 assuming the value has mode MODE. */
655 /* On the H8 the return value is in R0/R1. */
657 #define LIBCALL_VALUE(MODE) \
658 gen_rtx_REG (MODE, R0_REG)
660 /* 1 if N is a possible register number for a function value.
661 On the H8, R0 is the only register thus used. */
663 #define FUNCTION_VALUE_REGNO_P(N) ((N) == R0_REG)
665 /* Define this if PCC uses the nonreentrant convention for returning
666 structure and union values. */
668 /*#define PCC_STATIC_STRUCT_RETURN*/
670 /* 1 if N is a possible register number for function argument passing.
671 On the H8, no registers are used in this way. */
673 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0)
675 /* When defined, the compiler allows registers explicitly used in the
676 rtl to be used as spill registers but prevents the compiler from
677 extending the lifetime of these registers. */
679 #define SMALL_REGISTER_CLASSES 1
680 \f
681 /* Define a data type for recording info about an argument list
682 during the scan of that argument list. This data type should
683 hold all necessary information about the function itself
684 and about the args processed so far, enough to enable macros
685 such as FUNCTION_ARG to determine where the next arg should go.
687 On the H8/300, this is a two item struct, the first is the number
688 of bytes scanned so far and the second is the rtx of the called
689 library function if any. */
691 #define CUMULATIVE_ARGS struct cum_arg
692 struct cum_arg
693 {
696 };
698 /* Initialize a variable CUM of type CUMULATIVE_ARGS
699 for a call to a function whose data type is FNTYPE.
700 For a library call, FNTYPE is 0.
702 On the H8/300, the offset starts at 0. */
704 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
705 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
707 /* Update the data in CUM to advance over an argument
708 of mode MODE and data type TYPE.
709 (TYPE is null for libcalls where that information may not be available.) */
711 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
712 ((CUM).nbytes += ((MODE) != BLKmode \
713 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
714 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
716 /* Define where to put the arguments to a function.
717 Value is zero to push the argument on the stack,
718 or a hard register in which to store the argument.
720 MODE is the argument's machine mode.
721 TYPE is the data type of the argument (as a tree).
722 This is null for libcalls where that information may
723 not be available.
724 CUM is a variable of type CUMULATIVE_ARGS which gives info about
725 the preceding args and about the function being called.
726 NAMED is nonzero if this argument is a named parameter
727 (otherwise it is an extra parameter matching an ellipsis). */
729 /* On the H8/300 all normal args are pushed, unless -mquickcall in which
730 case the first 3 arguments are passed in registers.
731 See function `function_arg'. */
733 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
734 function_arg (&CUM, MODE, TYPE, NAMED)
736 /* Output assembler code to FILE to increment profiler label # LABELNO
737 for profiling a function entry. */
739 #define FUNCTION_PROFILER(FILE, LABELNO) \
741 h8_mov_op, (LABELNO), h8_reg_names[0]);
743 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
744 the stack pointer does not matter. The value is tested only in
745 functions that have frame pointers.
746 No definition is equivalent to always zero. */
748 #define EXIT_IGNORE_STACK 0
750 /* We emit the entire trampoline with INITIALIZE_TRAMPOLINE.
751 Depending on the pointer size, we use a different trampoline.
753 Pmode == HImode
754 vvvv context
755 1 0000 7903xxxx mov.w #0x1234,r3
756 2 0004 5A00xxxx jmp @0x1234
757 ^^^^ function
759 Pmode == SImode
760 vvvvvvvv context
761 2 0000 7A03xxxxxxxx mov.l #0x12345678,er3
762 3 0006 5Axxxxxx jmp @0x123456
763 ^^^^^^ function
764 */
766 /* Length in units of the trampoline for entering a nested function. */
768 #define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12)
770 /* Emit RTL insns to build a trampoline.
771 FNADDR is an RTX for the address of the function's pure code.
772 CXT is an RTX for the static chain value for the function. */
774 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
775 do \
776 { \
777 if (Pmode == HImode) \
778 { \
779 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7903)); \
780 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \
781 (CXT)); \
782 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 4)), \
783 GEN_INT (0x5a00)); \
784 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \
785 (FNADDR)); \
786 } \
787 else \
788 { \
789 rtx tem = gen_reg_rtx (Pmode); \
790 \
791 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7a03)); \
792 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \
793 (CXT)); \
794 emit_move_insn (tem, (FNADDR)); \
795 emit_insn (gen_andsi3 (tem, tem, GEN_INT (0x00ffffff))); \
796 emit_insn (gen_iorsi3 (tem, tem, GEN_INT (0x5a000000))); \
797 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \
798 tem); \
799 } \
800 } \
801 while (0)
802 \f
803 /* Addressing modes, and classification of registers for them. */
805 #define HAVE_POST_INCREMENT 1
806 #define HAVE_PRE_DECREMENT 1
807 #define HAVE_POST_DECREMENT TARGET_H8300SX
808 #define HAVE_PRE_INCREMENT TARGET_H8300SX
810 /* Macros to check register numbers against specific register classes. */
812 /* These assume that REGNO is a hard or pseudo reg number.
813 They give nonzero only if REGNO is a hard reg of the suitable class
814 or a pseudo reg currently allocated to a suitable hard reg.
815 Since they use reg_renumber, they are safe only once reg_renumber
816 has been allocated, which happens in local-alloc.c. */
818 #define REGNO_OK_FOR_INDEX_P(regno) 0
820 #define REGNO_OK_FOR_BASE_P(regno) \
821 (((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \
822 || reg_renumber[regno] >= 0)
823 \f
824 /* Maximum number of registers that can appear in a valid memory address. */
826 #define MAX_REGS_PER_ADDRESS 1
828 /* 1 if X is an rtx for a constant that is a valid address. */
830 #define CONSTANT_ADDRESS_P(X) \
831 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
832 || (GET_CODE (X) == CONST_INT \
834 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \
835 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \
836 || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST))
838 /* Nonzero if the constant value X is a legitimate general operand.
839 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
841 #define LEGITIMATE_CONSTANT_P(X) (h8300_legitimate_constant_p (X))
843 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
844 and check its validity for a certain class.
845 We have two alternate definitions for each of them.
846 The usual definition accepts all pseudo regs; the other rejects
847 them unless they have been allocated suitable hard regs.
848 The symbol REG_OK_STRICT causes the latter definition to be used.
850 Most source files want to accept pseudo regs in the hope that
851 they will get allocated to the class that the insn wants them to be in.
852 Source files for reload pass need to be strict.
853 After reload, it makes no difference, since pseudo regs have
854 been eliminated by then. */
856 /* Non-strict versions. */
857 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) 0
858 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */
859 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
860 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != MAC_REG)
862 /* Strict versions. */
863 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
864 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
866 #ifndef REG_OK_STRICT
868 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
869 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X)
871 #else
873 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X)
874 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
876 #endif
878 /* Extra constraints. */
880 #define OK_FOR_Q(OP) \
881 (TARGET_H8300SX && memory_operand ((OP), VOIDmode))
883 #define OK_FOR_R(OP) \
884 (GET_CODE (OP) == CONST_INT \
885 ? !h8300_shift_needs_scratch_p (INTVAL (OP), QImode) \
886 : 0)
888 #define OK_FOR_S(OP) \
889 (GET_CODE (OP) == CONST_INT \
890 ? !h8300_shift_needs_scratch_p (INTVAL (OP), HImode) \
891 : 0)
893 #define OK_FOR_T(OP) \
894 (GET_CODE (OP) == CONST_INT \
895 ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \
896 : 0)
898 /* 'U' if valid for a bset destination;
899 i.e. a register, register indirect, or the eightbit memory region
900 (a SYMBOL_REF with an SYMBOL_REF_FLAG set).
902 On the H8S 'U' can also be a 16bit or 32bit absolute. */
903 #define OK_FOR_U(OP) \
904 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
905 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
906 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
907 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
908 && TARGET_H8300S) \
909 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \
910 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
911 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \
912 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT \
913 && (TARGET_H8300S \
914 || SYMBOL_REF_FLAG (XEXP (XEXP (XEXP (OP, 0), 0), 0)))) \
915 || (GET_CODE (OP) == MEM \
916 && h8300_eightbit_constant_address_p (XEXP (OP, 0))) \
917 || (GET_CODE (OP) == MEM && TARGET_H8300S \
918 && GET_CODE (XEXP (OP, 0)) == CONST_INT))
920 /* Multi-letter constraints starting with W are to be used for
921 operands that require a memory operand, i.e,. that are never used
922 along with register constraints (see EXTRA_MEMORY_CONSTRAINTS).
923 For operands that require a memory operand (or not) but that always
924 accept a register, a multi-letter constraint starting with Y should
925 be used instead. */
927 #define OK_FOR_WU(OP) \
928 (GET_CODE (OP) == MEM && OK_FOR_U (OP))
930 #define OK_FOR_W(OP, STR) \
932 : 0)
934 #define CONSTRAINT_LEN_FOR_W(STR) \
936 : 0)
938 /* We don't have any constraint starting with Y yet, but before
939 someone uses it for a one-letter constraint and we're left without
940 any upper-case constraints left, we reserve it for extensions
941 here. */
942 #define OK_FOR_Y(OP, STR) \
943 (0)
945 #define CONSTRAINT_LEN_FOR_Y(STR) \
946 (0)
948 #define OK_FOR_Z(OP) \
949 (TARGET_H8300SX \
950 && GET_CODE (OP) == MEM \
951 && CONSTANT_P (XEXP ((OP), 0)))
953 #define EXTRA_CONSTRAINT_STR(OP, C, STR) \
962 0)
964 #define CONSTRAINT_LEN(C, STR) \
968 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
970 /* Experiments suggest that it's better not add 'Q' or 'U' here. No
971 patterns need it for correctness (no patterns use 'Q' and 'U'
972 without also providing a register alternative). And defining it
973 will mean that a spilled pseudo could be replaced by its frame
974 location in several consecutive insns.
976 Instead, it seems to be better to force pseudos to be reloaded
977 into registers and then use peepholes to recombine insns when
978 beneficial.
980 Unfortunately, for WU (unlike plain U, that matches regs as well),
981 we must require a memory address. In fact, all multi-letter
982 constraints started with W are supposed to have this property, so
983 we just test for W here. */
984 #define EXTRA_MEMORY_CONSTRAINT(C, STR) \
987 \f
988 #ifndef REG_OK_STRICT
989 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
990 do \
991 { \
992 if (h8300_legitimate_address_p ((MODE), (X), 0)) \
993 goto ADDR; \
994 } \
995 while (0)
996 #else
997 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
998 do \
999 { \
1000 if (h8300_legitimate_address_p ((MODE), (X), 1)) \
1001 goto ADDR; \
1002 } \
1003 while (0)
1004 #endif
1005 \f
1006 /* Go to LABEL if ADDR (a legitimate address expression)
1007 has an effect that depends on the machine mode it is used for.
1009 On the H8/300, the predecrement and postincrement address depend thus
1010 (the amount of decrement or increment being the length of the operand). */
1012 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1013 if (GET_CODE (ADDR) == POST_INC \
1014 || GET_CODE (ADDR) == POST_DEC \
1015 || GET_CODE (ADDR) == PRE_INC \
1016 || GET_CODE (ADDR) == PRE_DEC) \
1017 goto LABEL; \
1018 if (GET_CODE (ADDR) == PLUS \
1019 && h8300_get_index (XEXP (ADDR, 0), VOIDmode, 0) != XEXP (ADDR, 0)) \
1020 goto LABEL;
1021 \f
1022 /* Specify the machine mode that this machine uses
1023 for the index in the tablejump instruction. */
1024 #define CASE_VECTOR_MODE Pmode
1026 /* Define this as 1 if `char' should by default be signed; else as 0.
1028 On the H8/300, sign extension is expensive, so we'll say that chars
1029 are unsigned. */
1030 #define DEFAULT_SIGNED_CHAR 0
1032 /* This flag, if defined, says the same insns that convert to a signed fixnum
1033 also convert validly to an unsigned one. */
1034 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1036 /* Max number of bytes we can move from memory to memory
1037 in one reasonably fast instruction. */
1038 #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
1039 #define MAX_MOVE_MAX 4
1041 /* Nonzero if access to memory by bytes is slow and undesirable. */
1042 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
1044 /* Define if shifts truncate the shift count
1045 which implies one can omit a sign-extension or zero-extension
1046 of a shift count. */
1047 /* #define SHIFT_COUNT_TRUNCATED */
1049 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1050 is done just by pretending it is already truncated. */
1051 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1053 /* Specify the machine mode that pointers have.
1054 After generation of rtl, the compiler makes no further distinction
1055 between pointers and any other objects of this machine mode. */
1056 #define Pmode \
1057 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode)
1059 /* ANSI C types.
1060 We use longs for the H8/300H and the H8S because ints can be 16 or 32.
1061 GCC requires SIZE_TYPE to be the same size as pointers. */
1062 #define SIZE_TYPE \
1063 (TARGET_H8300 || TARGET_NORMAL_MODE ? TARGET_INT32 ? "short unsigned int" : "unsigned int" : "long unsigned int")
1064 #define PTRDIFF_TYPE \
1067 #define POINTER_SIZE \
1068 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16)
1071 #define WCHAR_TYPE_SIZE 16
1073 /* A function address in a call instruction
1074 is a byte address (for indexing purposes)
1075 so give the MEM rtx a byte's mode. */
1076 #define FUNCTION_MODE QImode
1078 /* Return the length of JUMP's delay slot insn (0 if it has none).
1079 If JUMP is a delayed branch, NEXT_INSN (PREV_INSN (JUMP)) will
1080 be the containing SEQUENCE, not JUMP itself. */
1081 #define DELAY_SLOT_LENGTH(JUMP) \
1082 (NEXT_INSN (PREV_INSN (JUMP)) == JUMP ? 0 : 2)
1084 #define BRANCH_COST 0
1086 /* Tell final.c how to eliminate redundant test instructions. */
1088 /* Here we define machine-dependent flags and fields in cc_status
1089 (see `conditions.h'). No extra ones are needed for the h8300. */
1091 /* Store in cc_status the expressions
1092 that the condition codes will describe
1093 after execution of an instruction whose pattern is EXP.
1094 Do not alter them if the instruction would not alter the cc's. */
1096 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN)
1098 /* The add insns don't set overflow in a usable way. */
1099 #define CC_OVERFLOW_UNUSABLE 01000
1100 /* The mov,and,or,xor insns don't set carry. That's OK though as the
1101 Z bit is all we need when doing unsigned comparisons on the result of
1102 these insns (since they're always with 0). However, conditions.h has
1103 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
1104 understandable. */
1105 #define CC_NO_CARRY CC_NO_OVERFLOW
1106 \f
1107 /* Control the assembler format that we output. */
1109 /* Output to assembler file text saying following lines
1110 may contain character constants, extra white space, comments, etc. */
1114 /* Output to assembler file text saying following lines
1115 no longer contain unusual constructs. */
1121 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */
1122 #define ASM_WORD_OP \
1129 #undef DO_GLOBAL_CTORS_BODY
1130 #define DO_GLOBAL_CTORS_BODY \
1131 { \
1132 extern func_ptr __ctors[]; \
1133 extern func_ptr __ctors_end[]; \
1134 func_ptr *p; \
1135 for (p = __ctors_end; p > __ctors; ) \
1136 { \
1137 (*--p)(); \
1138 } \
1139 }
1141 #undef DO_GLOBAL_DTORS_BODY
1142 #define DO_GLOBAL_DTORS_BODY \
1143 { \
1144 extern func_ptr __dtors[]; \
1145 extern func_ptr __dtors_end[]; \
1146 func_ptr *p; \
1147 for (p = __dtors; p < __dtors_end; p++) \
1148 { \
1149 (*p)(); \
1150 } \
1151 }
1153 /* How to refer to registers in assembler output.
1154 This sequence is indexed by compiler's hard-register-number (see above). */
1156 #define REGISTER_NAMES \
1159 #define ADDITIONAL_REGISTER_NAMES \
1163 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)
1165 /* Globalizing directive for a label. */
1168 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1169 ASM_OUTPUT_LABEL (FILE, NAME)
1171 /* The prefix to add to user-visible assembler symbols. */
1175 /* This is how to store into the string LABEL
1176 the symbol_ref name of an internal numbered label where
1177 PREFIX is the class of label and NUM is the number within the class.
1178 This is suitable for output with `assemble_name'.
1180 N.B.: The h8300.md branch_true and branch_false patterns also know
1181 how to generate internal labels. */
1182 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1185 /* This is how to output an insn to push a register on the stack.
1186 It need not be very fast code. */
1188 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1191 /* This is how to output an insn to pop a register from the stack.
1192 It need not be very fast code. */
1194 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1197 /* This is how to output an element of a case-vector that is absolute. */
1199 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1202 /* This is how to output an element of a case-vector that is relative. */
1204 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1207 /* This is how to output an assembler line
1208 that says to advance the location counter
1209 to a multiple of 2**LOG bytes. */
1211 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1212 if ((LOG) != 0) \
1215 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1218 /* This says how to output an assembler line
1219 to define a global common symbol. */
1221 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1223 assemble_name ((FILE), (NAME)), \
1226 /* This says how to output the assembler to define a global
1227 uninitialized but not common symbol.
1228 Try to use asm_output_bss to implement this macro. */
1230 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
1231 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
1233 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1234 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
1236 /* This says how to output an assembler line
1237 to define a local common symbol. */
1239 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1241 assemble_name ((FILE), (NAME)), \
1246 /* Print an instruction operand X on file FILE.
1247 Look in h8300.c for details. */
1249 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1252 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1254 /* Print a memory operand whose address is X, on file FILE.
1255 This uses a function in h8300.c. */
1257 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1259 /* H8300 specific pragmas. */
1260 #define REGISTER_TARGET_PRAGMAS() \
1261 do \
1262 { \
1265 } \
1266 while (0)
1268 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
1269 final_prescan_insn (insn, operand, nop)
1271 #define MOVE_RATIO 3
1273 #undef MOVE_RATIO
1274 #define MOVE_RATIO h8300_move_ratio
1276 /* Define the codes that are matched by predicates in h8300.c. */
1278 #define PREDICATE_CODES \
1280 LABEL_REF, SUBREG, REG, MEM}}, \
1283 LABEL_REF, SUBREG, REG, MEM}}, \
1290 ASHIFTRT, LSHIFTRT, ROTATE}}, \