gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c

   1 /* Test the `v[min|max]{nm}{q}_f*' AArch64 SIMD intrinsic.  */
   2
   3 /* { dg-do run } */
   4 /* { dg-options "-O2" } */
   5
   6 #include "arm_neon.h"
   7
   8 extern void abort ();
   9
  10 #define CHECK(R, E) \
  11   {\
  12     if (__builtin_memcmp (&R, &E, sizeof (R)) != 0)\
  13       abort ();\
  14   }
  15
  16 int
  17 main (int argc, char **argv)
  18 {
  19   /* v{min|max}nm_f32 normal.  */
  20   float32x2_t f32x2_input1 = vdup_n_f32 (-1.0);
  21   float32x2_t f32x2_input2 = vdup_n_f32 (0.0);
  22   float32x2_t f32x2_exp_minnm  = vdup_n_f32 (-1.0);
  23   float32x2_t f32x2_exp_maxnm  = vdup_n_f32 (0.0);
  24   float32x2_t f32x2_ret_minnm  = vminnm_f32 (f32x2_input1, f32x2_input2);
  25   float32x2_t f32x2_ret_maxnm  = vmaxnm_f32 (f32x2_input1, f32x2_input2);
  26
  27   CHECK (f32x2_ret_minnm, f32x2_exp_minnm);
  28   CHECK (f32x2_ret_maxnm, f32x2_exp_maxnm);
  29
  30   /* v{min|max}nm_f32 NaN.  */
  31   f32x2_input1 = vdup_n_f32 (__builtin_nanf (""));
  32   f32x2_input2 = vdup_n_f32 (1.0);
  33   f32x2_exp_minnm  = vdup_n_f32 (1.0);
  34   f32x2_exp_maxnm  = vdup_n_f32 (1.0);
  35   f32x2_ret_minnm  = vminnm_f32 (f32x2_input1, f32x2_input2);
  36   f32x2_ret_maxnm  = vmaxnm_f32 (f32x2_input1, f32x2_input2);
  37
  38   CHECK (f32x2_ret_minnm, f32x2_exp_minnm);
  39   CHECK (f32x2_ret_maxnm, f32x2_exp_maxnm);
  40
  41   /* v{min|max}nmq_f32 normal.  */
  42   float32x4_t f32x4_input1 = vdupq_n_f32 (-1024.0);
  43   float32x4_t f32x4_input2 = vdupq_n_f32 (77.0);
  44   float32x4_t f32x4_exp_minnm  = vdupq_n_f32 (-1024.0);
  45   float32x4_t f32x4_exp_maxnm  = vdupq_n_f32 (77.0);
  46   float32x4_t f32x4_ret_minnm  = vminnmq_f32 (f32x4_input1, f32x4_input2);
  47   float32x4_t f32x4_ret_maxnm  = vmaxnmq_f32 (f32x4_input1, f32x4_input2);
  48
  49   CHECK (f32x4_ret_minnm, f32x4_exp_minnm);
  50   CHECK (f32x4_ret_maxnm, f32x4_exp_maxnm);
  51
  52   /* v{min|max}nmq_f32 NaN.  */
  53   f32x4_input1 = vdupq_n_f32 (-__builtin_nanf (""));
  54   f32x4_input2 = vdupq_n_f32 (-1.0);
  55   f32x4_exp_minnm  = vdupq_n_f32 (-1.0);
  56   f32x4_exp_maxnm  = vdupq_n_f32 (-1.0);
  57   f32x4_ret_minnm  = vminnmq_f32 (f32x4_input1, f32x4_input2);
  58   f32x4_ret_maxnm  = vmaxnmq_f32 (f32x4_input1, f32x4_input2);
  59
  60   CHECK (f32x4_ret_minnm, f32x4_exp_minnm);
  61   CHECK (f32x4_ret_maxnm, f32x4_exp_maxnm);
  62
  63   /* v{min|max}nm_f64 normal.  */
  64   float64x1_t f64x1_input1 = vdup_n_f64 (1.23);
  65   float64x1_t f64x1_input2 = vdup_n_f64 (4.56);
  66   float64x1_t f64x1_exp_minnm  = vdup_n_f64 (1.23);
  67   float64x1_t f64x1_exp_maxnm  = vdup_n_f64 (4.56);
  68   float64x1_t f64x1_ret_minnm  = vminnm_f64 (f64x1_input1, f64x1_input2);
  69   float64x1_t f64x1_ret_maxnm  = vmaxnm_f64 (f64x1_input1, f64x1_input2);
  70   CHECK (f64x1_ret_minnm, f64x1_exp_minnm);
  71   CHECK (f64x1_ret_maxnm, f64x1_exp_maxnm);
  72
  73   /* v{min|max}_f64 normal.  */
  74   float64x1_t f64x1_exp_min  = vdup_n_f64 (1.23);
  75   float64x1_t f64x1_exp_max  = vdup_n_f64 (4.56);
  76   float64x1_t f64x1_ret_min  = vmin_f64 (f64x1_input1, f64x1_input2);
  77   float64x1_t f64x1_ret_max  = vmax_f64 (f64x1_input1, f64x1_input2);
  78   CHECK (f64x1_ret_min, f64x1_exp_min);
  79   CHECK (f64x1_ret_max, f64x1_exp_max);
  80
  81   /* v{min|max}nmq_f64 normal.  */
  82   float64x2_t f64x2_input1 = vdupq_n_f64 (1.23);
  83   float64x2_t f64x2_input2 = vdupq_n_f64 (4.56);
  84   float64x2_t f64x2_exp_minnm  = vdupq_n_f64 (1.23);
  85   float64x2_t f64x2_exp_maxnm  = vdupq_n_f64 (4.56);
  86   float64x2_t f64x2_ret_minnm  = vminnmq_f64 (f64x2_input1, f64x2_input2);
  87   float64x2_t f64x2_ret_maxnm  = vmaxnmq_f64 (f64x2_input1, f64x2_input2);
  88   CHECK (f64x2_ret_minnm, f64x2_exp_minnm);
  89   CHECK (f64x2_ret_maxnm, f64x2_exp_maxnm);
  90
  91   /* v{min|max}nm_f64 NaN.  */
  92   f64x1_input1 = vdup_n_f64 (-__builtin_nanf (""));
  93   f64x1_input2 = vdup_n_f64 (1.0);
  94   f64x1_exp_minnm  = vdup_n_f64 (1.0);
  95   f64x1_exp_maxnm  = vdup_n_f64 (1.0);
  96   f64x1_ret_minnm  = vminnm_f64 (f64x1_input1, f64x1_input2);
  97   f64x1_ret_maxnm  = vmaxnm_f64 (f64x1_input1, f64x1_input2);
  98
  99   CHECK (f64x1_ret_minnm, f64x1_exp_minnm);
 100   CHECK (f64x1_ret_maxnm, f64x1_exp_maxnm);
 101
 102   /* v{min|max}_f64 NaN.  */
 103   f64x1_input1 = vdup_n_f64 (-__builtin_nanf (""));
 104   f64x1_input2 = vdup_n_f64 (1.0);
 105   f64x1_exp_minnm  = vdup_n_f64 (-__builtin_nanf (""));
 106   f64x1_exp_maxnm  = vdup_n_f64 (-__builtin_nanf (""));
 107   f64x1_ret_minnm  = vmin_f64 (f64x1_input1, f64x1_input2);
 108   f64x1_ret_maxnm  = vmax_f64 (f64x1_input1, f64x1_input2);
 109
 110   CHECK (f64x1_ret_minnm, f64x1_exp_minnm);
 111   CHECK (f64x1_ret_maxnm, f64x1_exp_maxnm);
 112
 113   /* v{min|max}nmq_f64 NaN.  */
 114   f64x2_input1 = vdupq_n_f64 (-__builtin_nan (""));
 115   f64x2_input2 = vdupq_n_f64 (1.0);
 116   f64x2_exp_minnm  = vdupq_n_f64 (1.0);
 117   f64x2_exp_maxnm  = vdupq_n_f64 (1.0);
 118   f64x2_ret_minnm  = vminnmq_f64 (f64x2_input1, f64x2_input2);
 119   f64x2_ret_maxnm  = vmaxnmq_f64 (f64x2_input1, f64x2_input2);
 120
 121   CHECK (f64x2_ret_minnm, f64x2_exp_minnm);
 122   CHECK (f64x2_ret_maxnm, f64x2_exp_maxnm);
 123
 124   return 0;
 125 }