2015-10-18 Paul Thomas <pault@gcc.gnu.org>
[official-gcc.git] / gcc / lra-int.h
blob5e78604e1abee085bbde00516de646794e7d32e6
1 /* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010-2015 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #ifndef GCC_LRA_INT_H
22 #define GCC_LRA_INT_H
24 #define lra_assert(c) gcc_checking_assert (c)
26 /* The parameter used to prevent infinite reloading for an insn. Each
27 insn operands might require a reload and, if it is a memory, its
28 base and index registers might require a reload too. */
29 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
31 typedef struct lra_live_range *lra_live_range_t;
33 /* The structure describes program points where a given pseudo lives.
34 The live ranges can be used to find conflicts with other pseudos.
35 If the live ranges of two pseudos are intersected, the pseudos are
36 in conflict. */
37 struct lra_live_range
39 /* Pseudo regno whose live range is described by given
40 structure. */
41 int regno;
42 /* Program point range. */
43 int start, finish;
44 /* Next structure describing program points where the pseudo
45 lives. */
46 lra_live_range_t next;
47 /* Pointer to structures with the same start. */
48 lra_live_range_t start_next;
51 typedef struct lra_copy *lra_copy_t;
53 /* Copy between pseudos which affects assigning hard registers. */
54 struct lra_copy
56 /* True if regno1 is the destination of the copy. */
57 bool regno1_dest_p;
58 /* Execution frequency of the copy. */
59 int freq;
60 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
61 int regno1, regno2;
62 /* Next copy with correspondingly REGNO1 and REGNO2. */
63 lra_copy_t regno1_next, regno2_next;
66 /* Common info about a register (pseudo or hard register). */
67 struct lra_reg
69 /* Bitmap of UIDs of insns (including debug insns) referring the
70 reg. */
71 bitmap_head insn_bitmap;
72 /* The following fields are defined only for pseudos. */
73 /* Hard registers with which the pseudo conflicts. */
74 HARD_REG_SET conflict_hard_regs;
75 /* Call used registers with which the pseudo conflicts, taking into account
76 the registers used by functions called from calls which cross the
77 pseudo. */
78 HARD_REG_SET actual_call_used_reg_set;
79 /* We assign hard registers to reload pseudos which can occur in few
80 places. So two hard register preferences are enough for them.
81 The following fields define the preferred hard registers. If
82 there are no such hard registers the first field value is
83 negative. If there is only one preferred hard register, the 2nd
84 field is negative. */
85 int preferred_hard_regno1, preferred_hard_regno2;
86 /* Profits to use the corresponding preferred hard registers. If
87 the both hard registers defined, the first hard register has not
88 less profit than the second one. */
89 int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
90 #ifdef STACK_REGS
91 /* True if the pseudo should not be assigned to a stack register. */
92 bool no_stack_p;
93 #endif
94 #ifdef ENABLE_CHECKING
95 /* True if the pseudo crosses a call. It is setup in lra-lives.c
96 and used to check that the pseudo crossing a call did not get a
97 call used hard register. */
98 bool call_p;
99 #endif
100 /* Number of references and execution frequencies of the register in
101 *non-debug* insns. */
102 int nrefs, freq;
103 int last_reload;
104 /* Regno used to undo the inheritance. It can be non-zero only
105 between couple of inheritance and undo inheritance passes. */
106 int restore_regno;
107 /* Value holding by register. If the pseudos have the same value
108 they do not conflict. */
109 int val;
110 /* Offset from relative eliminate register to pesudo reg. */
111 int offset;
112 /* These members are set up in lra-lives.c and updated in
113 lra-coalesce.c. */
114 /* The biggest size mode in which each pseudo reg is referred in
115 whole function (possibly via subreg). */
116 machine_mode biggest_mode;
117 /* Live ranges of the pseudo. */
118 lra_live_range_t live_ranges;
119 /* This member is set up in lra-lives.c for subsequent
120 assignments. */
121 lra_copy_t copies;
124 /* References to the common info about each register. */
125 extern struct lra_reg *lra_reg_info;
127 /* Static info about each insn operand (common for all insns with the
128 same ICODE). Warning: if the structure definition is changed, the
129 initializer for debug_operand_data in lra.c should be changed
130 too. */
131 struct lra_operand_data
133 /* The machine description constraint string of the operand. */
134 const char *constraint;
135 /* It is taken only from machine description (which is different
136 from recog_data.operand_mode) and can be of VOIDmode. */
137 ENUM_BITFIELD(machine_mode) mode : 16;
138 /* The type of the operand (in/out/inout). */
139 ENUM_BITFIELD (op_type) type : 8;
140 /* Through if accessed through STRICT_LOW. */
141 unsigned int strict_low : 1;
142 /* True if the operand is an operator. */
143 unsigned int is_operator : 1;
144 /* True if there is an early clobber alternative for this operand.
145 This field is set up every time when corresponding
146 operand_alternative in lra_static_insn_data is set up. */
147 unsigned int early_clobber : 1;
148 /* True if the operand is an address. */
149 unsigned int is_address : 1;
152 /* Info about register occurrence in an insn. */
153 struct lra_insn_reg
155 /* The biggest mode through which the insn refers to the register
156 occurrence (remember the register can be accessed through a
157 subreg in the insn). */
158 ENUM_BITFIELD(machine_mode) biggest_mode : 16;
159 /* The type of the corresponding operand which is the register. */
160 ENUM_BITFIELD (op_type) type : 8;
161 /* True if the reg is accessed through a subreg and the subreg is
162 just a part of the register. */
163 unsigned int subreg_p : 1;
164 /* True if there is an early clobber alternative for this
165 operand. */
166 unsigned int early_clobber : 1;
167 /* The corresponding regno of the register. */
168 int regno;
169 /* Next reg info of the same insn. */
170 struct lra_insn_reg *next;
173 /* Static part (common info for insns with the same ICODE) of LRA
174 internal insn info. It exists in at most one exemplar for each
175 non-negative ICODE. There is only one exception. Each asm insn has
176 own structure. Warning: if the structure definition is changed,
177 the initializer for debug_insn_static_data in lra.c should be
178 changed too. */
179 struct lra_static_insn_data
181 /* Static info about each insn operand. */
182 struct lra_operand_data *operand;
183 /* Each duplication refers to the number of the corresponding
184 operand which is duplicated. */
185 int *dup_num;
186 /* The number of an operand marked as commutative, -1 otherwise. */
187 int commutative;
188 /* Number of operands, duplications, and alternatives of the
189 insn. */
190 char n_operands;
191 char n_dups;
192 char n_alternatives;
193 /* Insns in machine description (or clobbers in asm) may contain
194 explicit hard regs which are not operands. The following list
195 describes such hard registers. */
196 struct lra_insn_reg *hard_regs;
197 /* Array [n_alternatives][n_operand] of static constraint info for
198 given operand in given alternative. This info can be changed if
199 the target reg info is changed. */
200 const struct operand_alternative *operand_alternative;
203 /* LRA internal info about an insn (LRA internal insn
204 representation). */
205 struct lra_insn_recog_data
207 /* The insn code. */
208 int icode;
209 /* The alternative should be used for the insn, -1 if invalid, or we
210 should try to use any alternative, or the insn is a debug
211 insn. */
212 int used_insn_alternative;
213 /* SP offset before the insn relative to one at the func start. */
214 HOST_WIDE_INT sp_offset;
215 /* The insn itself. */
216 rtx_insn *insn;
217 /* Common data for insns with the same ICODE. Asm insns (their
218 ICODE is negative) do not share such structures. */
219 struct lra_static_insn_data *insn_static_data;
220 /* Two arrays of size correspondingly equal to the operand and the
221 duplication numbers: */
222 rtx **operand_loc; /* The operand locations, NULL if no operands. */
223 rtx **dup_loc; /* The dup locations, NULL if no dups. */
224 /* Number of hard registers implicitly used/clobbered in given call
225 insn. The value can be NULL or points to array of the hard
226 register numbers ending with a negative value. To differ
227 clobbered and used hard regs, clobbered hard regs are incremented
228 by FIRST_PSEUDO_REGISTER. */
229 int *arg_hard_regs;
230 /* Cached value of get_preferred_alternatives. */
231 alternative_mask preferred_alternatives;
232 /* The following member value is always NULL for a debug insn. */
233 struct lra_insn_reg *regs;
236 typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
238 /* Whether the clobber is used temporary in LRA. */
239 #define LRA_TEMP_CLOBBER_P(x) \
240 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
242 /* Cost factor for each additional reload and maximal cost reject for
243 insn reloads. One might ask about such strange numbers. Their
244 values occurred historically from former reload pass. */
245 #define LRA_LOSER_COST_FACTOR 6
246 #define LRA_MAX_REJECT 600
248 /* Maximum allowed number of assignment pass iterations after the
249 latest spill pass when any former reload pseudo was spilled. It is
250 for preventing LRA cycling in a bug case. */
251 #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
253 /* The maximal number of inheritance/split passes in LRA. It should
254 be more 1 in order to perform caller saves transformations and much
255 less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
256 as permitted constraint passes in some complicated cases. The
257 first inheritance/split pass has a biggest impact on generated code
258 quality. Each subsequent affects generated code in less degree.
259 For example, the 3rd pass does not change generated SPEC2000 code
260 at all on x86-64. */
261 #define LRA_MAX_INHERITANCE_PASSES 2
263 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
264 || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
265 #error wrong LRA_MAX_INHERITANCE_PASSES value
266 #endif
268 /* Analogous macro to the above one but for rematerialization. */
269 #define LRA_MAX_REMATERIALIZATION_PASSES 2
271 #if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
272 || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
273 #error wrong LRA_MAX_REMATERIALIZATION_PASSES value
274 #endif
276 /* lra.c: */
278 extern FILE *lra_dump_file;
280 extern bool lra_reg_spill_p;
282 extern HARD_REG_SET lra_no_alloc_regs;
284 extern int lra_insn_recog_data_len;
285 extern lra_insn_recog_data_t *lra_insn_recog_data;
287 extern int lra_curr_reload_num;
289 extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
290 extern void lra_push_insn (rtx_insn *);
291 extern void lra_push_insn_by_uid (unsigned int);
292 extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
293 extern rtx_insn *lra_pop_insn (void);
294 extern unsigned int lra_insn_stack_length (void);
296 extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
297 enum reg_class, const char *);
298 extern void lra_set_regno_unique_value (int);
299 extern void lra_invalidate_insn_data (rtx_insn *);
300 extern void lra_set_insn_deleted (rtx_insn *);
301 extern void lra_delete_dead_insn (rtx_insn *);
302 extern void lra_emit_add (rtx, rtx, rtx);
303 extern void lra_emit_move (rtx, rtx);
304 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
306 extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
307 const char *);
309 extern bool lra_substitute_pseudo (rtx *, int, rtx, bool);
310 extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool);
312 extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
313 extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
314 extern void lra_set_used_insn_alternative (rtx_insn *, int);
315 extern void lra_set_used_insn_alternative_by_uid (int, int);
317 extern void lra_invalidate_insn_regno_info (rtx_insn *);
318 extern void lra_update_insn_regno_info (rtx_insn *);
319 extern struct lra_insn_reg *lra_get_insn_regs (int);
321 extern void lra_free_copies (void);
322 extern void lra_create_copy (int, int, int);
323 extern lra_copy_t lra_get_copy (int);
324 extern bool lra_former_scratch_p (int);
325 extern bool lra_former_scratch_operand_p (rtx_insn *, int);
326 extern void lra_register_new_scratch_op (rtx_insn *, int);
328 extern int lra_new_regno_start;
329 extern int lra_constraint_new_regno_start;
330 extern int lra_bad_spill_regno_start;
331 extern bitmap_head lra_inheritance_pseudos;
332 extern bitmap_head lra_split_regs;
333 extern bitmap_head lra_subreg_reload_pseudos;
334 extern bitmap_head lra_optional_reload_pseudos;
336 /* lra-constraints.c: */
338 extern void lra_init_equiv (void);
339 extern int lra_constraint_offset (int, machine_mode);
341 extern int lra_constraint_iter;
342 extern bool lra_risky_transformations_p;
343 extern int lra_inheritance_iter;
344 extern int lra_undo_inheritance_iter;
345 extern bool lra_constrain_insn (rtx_insn *);
346 extern bool lra_constraints (bool);
347 extern void lra_constraints_init (void);
348 extern void lra_constraints_finish (void);
349 extern void lra_inheritance (void);
350 extern bool lra_undo_inheritance (void);
352 /* lra-lives.c: */
354 extern int lra_live_max_point;
355 extern int *lra_point_freq;
357 extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
359 extern int lra_live_range_iter;
360 extern void lra_create_live_ranges (bool, bool);
361 extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
362 extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
363 lra_live_range_t);
364 extern bool lra_intersected_live_ranges_p (lra_live_range_t,
365 lra_live_range_t);
366 extern void lra_print_live_range_list (FILE *, lra_live_range_t);
367 extern void debug (lra_live_range &ref);
368 extern void debug (lra_live_range *ptr);
369 extern void lra_debug_live_range_list (lra_live_range_t);
370 extern void lra_debug_pseudo_live_ranges (int);
371 extern void lra_debug_live_ranges (void);
372 extern void lra_clear_live_ranges (void);
373 extern void lra_live_ranges_init (void);
374 extern void lra_live_ranges_finish (void);
375 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
377 /* lra-assigns.c: */
379 extern int lra_assignment_iter;
380 extern int lra_assignment_iter_after_spill;
381 extern void lra_setup_reg_renumber (int, int, bool);
382 extern bool lra_assign (void);
385 /* lra-coalesce.c: */
387 extern int lra_coalesce_iter;
388 extern bool lra_coalesce (void);
390 /* lra-spills.c: */
392 extern bool lra_need_for_spills_p (void);
393 extern void lra_spill (void);
394 extern void lra_final_code_change (void);
396 /* lra-remat.c: */
398 extern int lra_rematerialization_iter;
399 extern bool lra_remat (void);
401 /* lra-elimination.c: */
403 extern void lra_debug_elim_table (void);
404 extern int lra_get_elimination_hard_regno (int);
405 extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
406 bool, bool, HOST_WIDE_INT, bool);
407 extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, HOST_WIDE_INT);
408 extern void lra_eliminate (bool, bool);
410 extern void lra_eliminate_reg_if_possible (rtx *);
414 /* Return the hard register which given pseudo REGNO assigned to.
415 Negative value means that the register got memory or we don't know
416 allocation yet. */
417 static inline int
418 lra_get_regno_hard_regno (int regno)
420 resize_reg_info ();
421 return reg_renumber[regno];
424 /* Change class of pseudo REGNO to NEW_CLASS. Print info about it
425 using TITLE. Output a new line if NL_P. */
426 static void inline
427 lra_change_class (int regno, enum reg_class new_class,
428 const char *title, bool nl_p)
430 lra_assert (regno >= FIRST_PSEUDO_REGISTER);
431 if (lra_dump_file != NULL)
432 fprintf (lra_dump_file, "%s class %s for r%d",
433 title, reg_class_names[new_class], regno);
434 setup_reg_classes (regno, new_class, NO_REGS, new_class);
435 if (lra_dump_file != NULL && nl_p)
436 fprintf (lra_dump_file, "\n");
439 /* Update insn operands which are duplication of NOP operand. The
440 insn is represented by its LRA internal representation ID. */
441 static inline void
442 lra_update_dup (lra_insn_recog_data_t id, int nop)
444 int i;
445 struct lra_static_insn_data *static_id = id->insn_static_data;
447 for (i = 0; i < static_id->n_dups; i++)
448 if (static_id->dup_num[i] == nop)
449 *id->dup_loc[i] = *id->operand_loc[nop];
452 /* Process operator duplications in insn with ID. We do it after the
453 operands processing. Generally speaking, we could do this probably
454 simultaneously with operands processing because a common practice
455 is to enumerate the operators after their operands. */
456 static inline void
457 lra_update_operator_dups (lra_insn_recog_data_t id)
459 int i;
460 struct lra_static_insn_data *static_id = id->insn_static_data;
462 for (i = 0; i < static_id->n_dups; i++)
464 int ndup = static_id->dup_num[i];
466 if (static_id->operand[ndup].is_operator)
467 *id->dup_loc[i] = *id->operand_loc[ndup];
471 /* Return info about INSN. Set up the info if it is not done yet. */
472 static inline lra_insn_recog_data_t
473 lra_get_insn_recog_data (rtx_insn *insn)
475 lra_insn_recog_data_t data;
476 unsigned int uid = INSN_UID (insn);
478 if (lra_insn_recog_data_len > (int) uid
479 && (data = lra_insn_recog_data[uid]) != NULL)
481 /* Check that we did not change insn without updating the insn
482 info. */
483 lra_assert (data->insn == insn
484 && (INSN_CODE (insn) < 0
485 || data->icode == INSN_CODE (insn)));
486 return data;
488 return lra_set_insn_recog_data (insn);
491 /* Update offset from pseudos with VAL by INCR. */
492 static inline void
493 lra_update_reg_val_offset (int val, int incr)
495 int i;
497 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
499 if (lra_reg_info[i].val == val)
500 lra_reg_info[i].offset += incr;
504 /* Return true if register content is equal to VAL with OFFSET. */
505 static inline bool
506 lra_reg_val_equal_p (int regno, int val, int offset)
508 if (lra_reg_info[regno].val == val
509 && lra_reg_info[regno].offset == offset)
510 return true;
512 return false;
515 /* Assign value of register FROM to TO. */
516 static inline void
517 lra_assign_reg_val (int from, int to)
519 lra_reg_info[to].val = lra_reg_info[from].val;
520 lra_reg_info[to].offset = lra_reg_info[from].offset;
523 #endif /* GCC_LRA_INT_H */