gcc/config/i386/pmmintrin.h

   1 /* Copyright (C) 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
   2
   3    This file is part of GCC.
   4
   5    GCC is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 2, or (at your option)
   8    any later version.
   9
  10    GCC is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with GCC; see the file COPYING.  If not, write to
  17    the Free Software Foundation, 51 Franklin Street, Fifth Floor,
  18    Boston, MA 02110-1301, USA.  */
  19
  20 /* As a special exception, if you include this header file into source
  21    files compiled by GCC, this header file does not by itself cause
  22    the resulting executable to be covered by the GNU General Public
  23    License.  This exception does not however invalidate any other
  24    reasons why the executable file might be covered by the GNU General
  25    Public License.  */
  26
  27 /* Implemented from the specification included in the Intel C++ Compiler
  28    User Guide and Reference, version 9.0.  */
  29
  30 #ifndef _PMMINTRIN_H_INCLUDED
  31 #define _PMMINTRIN_H_INCLUDED
  32
  33 #ifndef __SSE3__
  34 # error "SSE3 instruction set not enabled"
  35 #else
  36
  37 /* We need definitions from the SSE2 and SSE header files*/
  38 #include <emmintrin.h>
  39
  40 /* Additional bits in the MXCSR.  */
  41 #define _MM_DENORMALS_ZERO_MASK         0x0040
  42 #define _MM_DENORMALS_ZERO_ON           0x0040
  43 #define _MM_DENORMALS_ZERO_OFF          0x0000
  44
  45 #define _MM_SET_DENORMALS_ZERO_MODE(mode) \
  46   _mm_setcsr ((_mm_getcsr () & ~_MM_DENORMALS_ZERO_MASK) | (mode))
  47 #define _MM_GET_DENORMALS_ZERO_MODE() \
  48   (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
  49
  50 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  51 _mm_addsub_ps (__m128 __X, __m128 __Y)
  52 {
  53   return (__m128) __builtin_ia32_addsubps ((__v4sf)__X, (__v4sf)__Y);
  54 }
  55
  56 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  57 _mm_hadd_ps (__m128 __X, __m128 __Y)
  58 {
  59   return (__m128) __builtin_ia32_haddps ((__v4sf)__X, (__v4sf)__Y);
  60 }
  61
  62 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  63 _mm_hsub_ps (__m128 __X, __m128 __Y)
  64 {
  65   return (__m128) __builtin_ia32_hsubps ((__v4sf)__X, (__v4sf)__Y);
  66 }
  67
  68 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  69 _mm_movehdup_ps (__m128 __X)
  70 {
  71   return (__m128) __builtin_ia32_movshdup ((__v4sf)__X);
  72 }
  73
  74 extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  75 _mm_moveldup_ps (__m128 __X)
  76 {
  77   return (__m128) __builtin_ia32_movsldup ((__v4sf)__X);
  78 }
  79
  80 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  81 _mm_addsub_pd (__m128d __X, __m128d __Y)
  82 {
  83   return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
  84 }
  85
  86 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  87 _mm_hadd_pd (__m128d __X, __m128d __Y)
  88 {
  89   return (__m128d) __builtin_ia32_haddpd ((__v2df)__X, (__v2df)__Y);
  90 }
  91
  92 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  93 _mm_hsub_pd (__m128d __X, __m128d __Y)
  94 {
  95   return (__m128d) __builtin_ia32_hsubpd ((__v2df)__X, (__v2df)__Y);
  96 }
  97
  98 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  99 _mm_loaddup_pd (double const *__P)
 100 {
 101   return _mm_load1_pd (__P);
 102 }
 103
 104 extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 105 _mm_movedup_pd (__m128d __X)
 106 {
 107   return _mm_shuffle_pd (__X, __X, _MM_SHUFFLE2 (0,0));
 108 }
 109
 110 extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 111 _mm_lddqu_si128 (__m128i const *__P)
 112 {
 113   return (__m128i) __builtin_ia32_lddqu ((char const *)__P);
 114 }
 115
 116 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 117 _mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
 118 {
 119   __builtin_ia32_monitor (__P, __E, __H);
 120 }
 121
 122 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 123 _mm_mwait (unsigned int __E, unsigned int __H)
 124 {
 125   __builtin_ia32_mwait (__E, __H);
 126 }
 127
 128 #endif /* __SSE3__ */
 129
 130 #endif /* _PMMINTRIN_H_INCLUDED */