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1 /* Definitions of target machine for GNU compiler. AT&T DSP1600.
2 Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001
3 Free Software Foundation, Inc.
4 Contributed by Michael Collison (collison@isisinc.net).
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
58 /* RUN-TIME TARGET SPECIFICATION */
59 #define DSP16XX 1
61 /* Name of the AT&T assembler */
65 /* Name of the AT&T linker */
69 /* Define which switches take word arguments */
70 #define WORD_SWITCH_TAKES_ARG(STR) \
72 0)
74 #ifdef CC1_SPEC
75 #undef CC1_SPEC
76 #endif
81 /* Define this as a spec to call the AT&T assembler */
85 /* Define this as a spec to call the AT&T linker */
88 %{r} %{s} %{t} %{u*} %{x}\
89 %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\
90 %{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\
93 /* Nothing complicated here, just link with libc.a under normal
94 circumstances */
97 /* Specify the startup file to link with. */
99 %{mmap2:m2_crt0.o%s} \
100 %{mmap3:m3_crt0.o%s} \
101 %{mmap4:m4_crt0.o%s} \
102 %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \
103 %ea -ifile option requires a -map option}}"
105 /* Specify the end file to link with */
108 %{mmap2:m2_crtn.o%s} \
109 %{mmap3:m3_crtn.o%s} \
110 %{mmap4:m4_crtn.o%s} \
111 %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \
112 %ea -ifile option requires a -map option}}"
115 /* Tell gcc where to look for the startfile */
116 /*#define STANDARD_STARTFILE_PREFIX "/d1600/lib"*/
118 /* Tell gcc where to look for it's executables */
119 /*#define STANDARD_EXEC_PREFIX "/d1600/bin"*/
121 /* Command line options to the AT&T assembler */
124 /* Command line options for the AT&T linker */
127 %{!ifile*:%{mmap1:m1_deflt.if%s} \
128 %{mmap2:m2_deflt.if%s} \
129 %{mmap3:m3_deflt.if%s} \
130 %{mmap4:m4_deflt.if%s} \
131 %{!mmap*:m4_deflt.if%s}} \
132 %{ifile*:%*} %{r}"
134 /* Include path is determined from the environment variable */
135 #define INCLUDE_DEFAULTS \
136 { \
137 { 0, 0, 0 } \
138 }
140 /* Names to predefine in the preprocessor for this target machine. */
141 #ifdef __MSDOS__
143 #else
145 #endif
147 /* Run-time compilation parameters selecting different hardware subsets. */
151 /* Macros used in the machine description to test the flags. */
163 initialize data at startup */
168 /* Compile passing first two args in regs 0 and 1.
169 This exists only to test compiler features that will
170 be needed for RISC chips. It is not usable
171 and is not intended to be usable on this cpu. */
172 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
174 /* The call is on the same 4k page, so instead of loading
175 the 'pt' register and branching, we can branch directly */
177 #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
179 /* The jump is on the same 4k page, so instead of loading
180 the 'pt' register and branching, we can branch directly */
182 #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
184 /* Generate shift instructions to use the 1610 Bit Manipulation
185 Unit. */
186 #define TARGET_BMU (target_flags & MASK_BMU)
188 #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
190 /* Direct the linker to output extra info for initialized data */
191 #define TARGET_MASK_INIT (target_flags & MASK_INIT)
193 #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
195 /* Reserve the ybase registers *(0) - *(31) */
196 #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
198 /* We turn this option on internally after seeing "-g" */
199 #define TARGET_DEBUG (target_flags & MASK_DEBUG)
201 /* We turn this option on internally after seeing "-save-temps */
202 #define TARGET_SAVE_TEMPS (target_flags & MASK_SAVE_TEMPS)
205 /* Macro to define tables used to set the flags.
206 This is a list in braces of pairs in braces,
207 each pair being { "NAME", VALUE }
208 where VALUE is the bits to set or minus the bits to clear.
209 An empty string NAME is used to identify the default VALUE. */
212 #define TARGET_SWITCHES \
213 { \
247 }
249 /* Default target_flags if no switches are specified */
250 #ifndef TARGET_DEFAULT
251 #define TARGET_DEFAULT MASK_REGPARM|MASK_YBASE_HIGH
252 #endif
254 /* This macro is similar to `TARGET_SWITCHES' but defines names of
255 command options that have values. Its definition is an
256 initializer with a subgrouping for each command option.
258 Each subgrouping contains a string constant, that defines the
259 fixed part of the option name, and the address of a variable.
260 The variable, type `char *', is set to the variable part of the
261 given option if the fixed part matches. The actual option name
262 is made by appending `-m' to the specified name.
264 Here is an example which defines `-mshort-data-NUMBER'. If the
265 given option is `-mshort-data-512', the variable `m88k_short_data'
266 will be set to the string `"512"'.
268 extern char *m88k_short_data;
269 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
271 #define TARGET_OPTIONS \
272 { \
283 }
285 /* Sometimes certain combinations of command options do not make sense
286 on a particular target machine. You can define a macro
287 `OVERRIDE_OPTIONS' to take account of this. This macro, if
288 defined, is executed once just after all the command options have
289 been parsed.
291 Don't use this macro to turn on various extra optimizations for
292 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
294 #define OVERRIDE_OPTIONS override_options ()
296 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
297 { \
298 flag_gnu_linker = FALSE; \
299 \
300 if (LEVEL >= 2) \
301 { \
302 /* The dsp16xx family has so few registers \
303 * that running the first instruction \
304 * scheduling is bad for reg. allocation \
305 * since it increases lifetimes of pseudos. \
306 * So turn of first scheduling pass. \
308 flag_schedule_insns = FALSE; \
309 } \
310 }
311 \f
312 /* STORAGE LAYOUT */
314 /* Define if you don't want extended real, but do want to use the
315 software floating point emulator for REAL_ARITHMETIC and
316 decimal <-> binary conversion. */
317 #define REAL_ARITHMETIC
319 /* Define this if most significant bit is lowest numbered
320 in instructions that operate on numbered bit-fields.
321 */
322 #define BITS_BIG_ENDIAN 0
324 /* Define this if most significant byte of a word is the lowest numbered.
325 We define big-endian, but since the 1600 series cannot address bytes
326 it does not matter. */
327 #define BYTES_BIG_ENDIAN 1
329 /* Define this if most significant word of a multiword number is numbered.
330 For the 1600 we can decide arbitrarily since there are no machine instructions for them. */
331 #define WORDS_BIG_ENDIAN 1
333 /* number of bits in an addressable storage unit */
334 #define BITS_PER_UNIT 16
336 /* Width in bits of a "word", which is the contents of a machine register.
337 Note that this is not necessarily the width of data type `int';
338 if using 16-bit ints on a 68000, this would still be 32.
339 But on a machine with 16-bit registers, this would be 16. */
340 #define BITS_PER_WORD 16
342 /* Maximum number of bits in a word. */
343 #define MAX_BITS_PER_WORD 16
345 /* Width of a word, in units (bytes). */
346 #define UNITS_PER_WORD 1
348 /* Width in bits of a pointer.
349 See also the macro `Pmode' defined below. */
350 #define POINTER_SIZE 16
352 /* Allocation boundary (in *bits*) for storing pointers in memory. */
353 #define POINTER_BOUNDARY 16
355 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
356 #define PARM_BOUNDARY 16
358 /* Boundary (in *bits*) on which stack pointer should be aligned. */
359 #define STACK_BOUNDARY 16
361 /* Allocation boundary (in *bits*) for the code of a function. */
362 #define FUNCTION_BOUNDARY 16
364 /* Biggest alignment that any data type can require on this machine, in bits. */
365 #define BIGGEST_ALIGNMENT 16
367 /* Biggest alignment that any structure field can require on this machine, in bits */
368 #define BIGGEST_FIELD_ALIGNMENT 16
370 /* Alignment of field after `int : 0' in a structure. */
371 #define EMPTY_FIELD_BOUNDARY 16
373 /* Number of bits which any structure or union's size must be a multiple of. Each structure
374 or union's size is rounded up to a multiple of this */
375 #define STRUCTURE_SIZE_BOUNDARY 16
377 /* Define this if move instructions will actually fail to work
378 when given unaligned data. */
379 #define STRICT_ALIGNMENT 1
381 /* An integer expression for the size in bits of the largest integer machine mode that
382 should actually be used. All integer machine modes of this size or smaller can be
383 used for structures and unions with the appropriate sizes. */
384 #define MAX_FIXED_MODE_SIZE 32
385 \f
386 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
388 #define CHAR_TYPE_SIZE 16
389 #define SHORT_TYPE_SIZE 16
390 #define INT_TYPE_SIZE 16
391 #define LONG_TYPE_SIZE 32
392 #define LONG_LONG_TYPE_SIZE 32
393 #define FLOAT_TYPE_SIZE 32
394 #define DOUBLE_TYPE_SIZE 32
395 #define LONG_DOUBLE_TYPE_SIZE 32
397 /* An expression whose value is 1 or 0, according to whether the type char should be
398 signed or unsigned by default. */
400 #define DEFAULT_SIGNED_CHAR 1
402 /* A C expression to determine whether to give an enum type only as many bytes
403 as it takes to represent the range of possible values of that type. A nonzero
404 value means to do that; a zero value means all enum types should be allocated
405 like int. */
407 #define DEFAULT_SHORT_ENUMS 0
409 /* A C expression for a string describing the name of the data type to use for
410 size values. */
414 /* A C expression for a string describing the name of the data type to use for the
415 result of subtracting two pointers */
419 \f
420 /* REGISTER USAGE. */
422 #define ALL_16_BIT_REGISTERS 1
424 /* Number of actual hardware registers.
425 The hardware registers are assigned numbers for the compiler
426 from 0 to FIRST_PSEUDO_REGISTER-1 */
428 #define FIRST_PSEUDO_REGISTER (REG_YBASE31 + 1)
430 /* 1 for registers that have pervasive standard uses
431 and are not available for the register allocator.
433 The registers are laid out as follows:
435 {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
436 {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
437 {pt} - X Space Address Arithmetic Unit
438 {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
439 {pr} - Return Address Register
441 We reserve r2 for the Stack Pointer.
442 We specify r3 for the Frame Pointer but allow the compiler
443 to omit it when possible since we have so few pointer registers. */
445 #define REG_A0 0
446 #define REG_A0L 1
447 #define REG_A1 2
448 #define REG_A1L 3
449 #define REG_X 4
450 #define REG_Y 5
451 #define REG_YL 6
452 #define REG_PROD 7
453 #define REG_PRODL 8
454 #define REG_R0 9
455 #define REG_R1 10
456 #define REG_R2 11
457 #define REG_R3 12
458 #define REG_J 13
459 #define REG_K 14
460 #define REG_YBASE 15
461 #define REG_PT 16
462 #define REG_AR0 17
463 #define REG_AR1 18
464 #define REG_AR2 19
465 #define REG_AR3 20
466 #define REG_C0 21
467 #define REG_C1 22
468 #define REG_C2 23
469 #define REG_PR 24
470 #define REG_RB 25
471 #define REG_YBASE0 26
472 #define REG_YBASE1 27
473 #define REG_YBASE2 28
474 #define REG_YBASE3 29
475 #define REG_YBASE4 30
476 #define REG_YBASE5 31
477 #define REG_YBASE6 32
478 #define REG_YBASE7 33
479 #define REG_YBASE8 34
480 #define REG_YBASE9 35
481 #define REG_YBASE10 36
482 #define REG_YBASE11 37
483 #define REG_YBASE12 38
484 #define REG_YBASE13 39
485 #define REG_YBASE14 40
486 #define REG_YBASE15 41
487 #define REG_YBASE16 42
488 #define REG_YBASE17 43
489 #define REG_YBASE18 44
490 #define REG_YBASE19 45
491 #define REG_YBASE20 46
492 #define REG_YBASE21 47
493 #define REG_YBASE22 48
494 #define REG_YBASE23 49
495 #define REG_YBASE24 50
496 #define REG_YBASE25 51
497 #define REG_YBASE26 52
498 #define REG_YBASE27 53
499 #define REG_YBASE28 54
500 #define REG_YBASE29 55
501 #define REG_YBASE30 56
502 #define REG_YBASE31 57
504 /* Do we have a accumulator register? */
505 #define IS_ACCUM_REG(REGNO) IN_RANGE ((REGNO), REG_A0, REG_A1L)
506 #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
508 /* Do we have a virtual ybase register */
509 #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
511 #define IS_YBASE_ELIGIBLE_REG(REGNO) (IS_ACCUM_REG (REGNO) || IS_ADDRESS_REGISTER(REGNO) \
512 || REGNO == REG_X || REGNO == REG_Y || REGNO == REG_YL \
513 || REGNO == REG_PROD || REGNO == REG_PRODL)
515 #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
517 #define FIXED_REGISTERS \
518 {0, 0, 0, 0, 0, 0, 0, 0, 0, \
519 0, 0, 0, 1, 0, 0, 1, \
520 1, \
521 0, 0, 0, 0, \
522 1, 1, 1, \
523 1, 0, \
524 0, 0, 0, 0, 0, 0, 0, 0, \
525 0, 0, 0, 0, 0, 0, 0, 0, \
526 0, 0, 0, 0, 0, 0, 0, 0, \
527 0, 0, 0, 0, 0, 0, 0, 0}
529 /* 1 for registers not available across function calls.
530 These must include the FIXED_REGISTERS and also any
531 registers that can be used without being saved.
532 The latter must include the registers where values are returned
533 and the register where structure-value addresses are passed.
534 On the 1610 'a0' holds return values from functions. 'r0' holds
535 structure-value addresses.
537 In addition we don't save either j, k, ybase or any of the
538 bit manipulation registers. */
541 #define CALL_USED_REGISTERS \
553 /* List the order in which to allocate registers. Each register must be
554 listed once, even those in FIXED_REGISTERS.
556 We allocate in the following order:
557 */
559 #if 0
560 #define REG_ALLOC_ORDER \
561 { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \
562 REG_PRODL, REG_YL, REG_AR0, REG_AR1, \
563 REG_RB, REG_A0, REG_A1, REG_A0L, \
564 REG_A1L, REG_AR2, REG_AR3, \
565 REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \
566 REG_C1, REG_C2, REG_R3, \
567 REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
568 REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
569 REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
570 REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
571 REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
572 REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
573 REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
574 REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
575 #else
576 #define REG_ALLOC_ORDER \
577 { \
578 REG_A0, REG_A0L, REG_A1, REG_A1L, REG_Y, REG_YL, \
579 REG_PROD, \
580 REG_PRODL, REG_R0, REG_J, REG_K, REG_AR2, REG_AR3, \
581 REG_X, REG_R1, REG_R2, REG_RB, REG_AR0, REG_AR1, \
582 REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
583 REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
584 REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
585 REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
586 REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
587 REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
588 REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
589 REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31, \
590 REG_R3, REG_YBASE, REG_PT, REG_C0, REG_C1, REG_C2, \
591 REG_PR }
592 #endif
593 /* Zero or more C statements that may conditionally modify two
594 variables `fixed_regs' and `call_used_regs' (both of type `char
595 []') after they have been initialized from the two preceding
596 macros.
598 This is necessary in case the fixed or call-clobbered registers
599 depend on target flags.
601 You need not define this macro if it has no work to do.
603 If the usage of an entire class of registers depends on the target
604 flags, you may indicate this to GCC by using this macro to modify
605 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
606 the classes which should not be used by GCC. Also define the macro
607 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
608 letter for a class that shouldn't be used.
610 (However, if this class is not included in `GENERAL_REGS' and all
611 of the insn patterns whose constraints permit this class are
612 controlled by target switches, then GCC will automatically avoid
613 using these registers when the target switches are opposed to
614 them.) If the user tells us there is no BMU, we can't use
615 ar0-ar3 for register allocation */
617 #define CONDITIONAL_REGISTER_USAGE \
618 do \
619 { \
620 if (!TARGET_BMU) \
621 { \
622 int regno; \
623 \
624 for (regno = REG_AR0; regno <= REG_AR3; regno++) \
625 fixed_regs[regno] = call_used_regs[regno] = 1; \
626 } \
627 if (TARGET_RESERVE_YBASE) \
628 { \
629 int regno; \
630 \
631 for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \
632 fixed_regs[regno] = call_used_regs[regno] = 1; \
633 } \
634 } \
635 while (0)
637 /* Determine which register classes are very likely used by spill registers.
638 local-alloc.c won't allocate pseudos that have these classes as their
639 preferred class unless they are "preferred or nothing". */
641 #define CLASS_LIKELY_SPILLED_P(CLASS) \
642 ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
644 /* Return number of consecutive hard regs needed starting at reg REGNO
645 to hold something of mode MODE.
646 This is ordinarily the length in words of a value of mode MODE
647 but can be less for certain modes in special long registers. */
649 #define HARD_REGNO_NREGS(REGNO, MODE) \
650 (GET_MODE_SIZE(MODE))
652 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
654 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
656 /* Value is 1 if it is a good idea to tie two pseudo registers
657 when one has mode MODE1 and one has mode MODE2.
658 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
659 for any hard reg, then this must be 0 for correct output. */
660 #define MODES_TIEABLE_P(MODE1, MODE2) \
661 (((MODE1) == (MODE2)) || \
662 (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \
663 == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
665 /* Specify the registers used for certain standard purposes.
666 The values of these macros are register numbers. */
668 /* DSP1600 pc isn't overloaded on a register. */
669 /* #define PC_REGNUM */
671 /* Register to use for pushing function arguments.
672 This is r3 in our case */
673 #define STACK_POINTER_REGNUM REG_R3
675 /* Base register for access to local variables of the function.
676 This is r2 in our case */
677 #define FRAME_POINTER_REGNUM REG_R2
679 /* We can debug without the frame pointer */
680 #define CAN_DEBUG_WITHOUT_FP 1
682 /* The 1610 saves the return address in this register */
683 #define RETURN_ADDRESS_REGNUM REG_PR
685 /* Base register for access to arguments of the function. */
686 #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
688 /* Register in which static-chain is passed to a function. */
690 #define STATIC_CHAIN_REGNUM 4
692 /* Register in which address to store a structure value
693 is passed to a function. This is 'r0' in our case */
694 #define STRUCT_VALUE_REGNUM REG_R0
695 \f
696 /* Define the classes of registers for register constraints in the
697 machine description. Also define ranges of constants.
699 One of the classes must always be named ALL_REGS and include all hard regs.
700 If there is more than one class, another class must be named NO_REGS
701 and contain no registers.
703 The name GENERAL_REGS must be the name of a class (or an alias for
704 another name such as ALL_REGS). This is the class of registers
705 that is allowed by "g" or "r" in a register constraint.
706 Also, registers outside this class are allocated only when
707 instructions express preferences for them.
709 The classes must be numbered in nondecreasing order; that is,
710 a larger-numbered class must never be contained completely
711 in a smaller-numbered class.
713 For any two classes, it is very desirable that there be another
714 class that represents their union. */
717 enum reg_class
718 {
719 NO_REGS,
720 A0H_REG,
721 A0L_REG,
722 A0_REG,
723 A1H_REG,
724 ACCUM_HIGH_REGS,
725 A1L_REG,
726 ACCUM_LOW_REGS,
727 A1_REG,
728 ACCUM_REGS,
729 X_REG,
730 X_OR_ACCUM_LOW_REGS,
731 X_OR_ACCUM_REGS,
732 YH_REG,
733 YH_OR_ACCUM_HIGH_REGS,
734 X_OR_YH_REGS,
735 YL_REG,
736 YL_OR_ACCUM_LOW_REGS,
737 X_OR_YL_REGS,
738 X_OR_Y_REGS,
739 Y_REG,
740 ACCUM_OR_Y_REGS,
741 PH_REG,
742 X_OR_PH_REGS,
743 PL_REG,
744 PL_OR_ACCUM_LOW_REGS,
745 X_OR_PL_REGS,
746 YL_OR_PL_OR_ACCUM_LOW_REGS,
747 P_REG,
748 ACCUM_OR_P_REGS,
749 YL_OR_P_REGS,
750 ACCUM_LOW_OR_YL_OR_P_REGS,
751 Y_OR_P_REGS,
752 ACCUM_Y_OR_P_REGS,
753 NO_FRAME_Y_ADDR_REGS,
754 Y_ADDR_REGS,
755 ACCUM_LOW_OR_Y_ADDR_REGS,
756 ACCUM_OR_Y_ADDR_REGS,
757 X_OR_Y_ADDR_REGS,
758 Y_OR_Y_ADDR_REGS,
759 P_OR_Y_ADDR_REGS,
760 NON_HIGH_YBASE_ELIGIBLE_REGS,
761 YBASE_ELIGIBLE_REGS,
762 J_REG,
763 J_OR_DAU_16_BIT_REGS,
764 BMU_REGS,
765 NOHIGH_NON_ADDR_REGS,
766 NON_ADDR_REGS,
767 SLOW_MEM_LOAD_REGS,
768 NOHIGH_NON_YBASE_REGS,
769 NO_ACCUM_NON_YBASE_REGS,
770 NON_YBASE_REGS,
771 YBASE_VIRT_REGS,
772 ACCUM_LOW_OR_YBASE_REGS,
773 ACCUM_OR_YBASE_REGS,
774 X_OR_YBASE_REGS,
775 Y_OR_YBASE_REGS,
776 ACCUM_LOW_YL_PL_OR_YBASE_REGS,
777 P_OR_YBASE_REGS,
778 ACCUM_Y_P_OR_YBASE_REGS,
779 Y_ADDR_OR_YBASE_REGS,
780 YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
781 YBASE_OR_YBASE_ELIGIBLE_REGS,
782 NO_HIGH_ALL_REGS,
783 ALL_REGS,
784 LIM_REG_CLASSES
785 };
787 /* GENERAL_REGS must be the name of a register class */
788 #define GENERAL_REGS ALL_REGS
790 #define N_REG_CLASSES (int) LIM_REG_CLASSES
792 /* Give names of register classes as strings for dump file. */
794 #define REG_CLASS_NAMES \
795 { \
861 }
863 /* Define which registers fit in which classes.
864 This is an initializer for a vector of HARD_REG_SET
865 of length N_REG_CLASSES. */
867 #define REG_CLASS_CONTENTS \
868 { \
934 }
937 /* The same information, inverted:
938 Return the class number of the smallest class containing
939 reg number REGNO. This could be a conditional expression
940 or could index an array. */
942 #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
944 /* The class value for index registers, and the one for base regs. */
946 #define INDEX_REG_CLASS NO_REGS
947 #define BASE_REG_CLASS Y_ADDR_REGS
949 /* Get reg_class from a letter such as appears in the machine description. */
951 #define REG_CLASS_FROM_LETTER(C) \
952 dsp16xx_reg_class_from_letter(C)
954 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
955 secondary_reload_class(CLASS, MODE, X)
957 /* When defined, the compiler allows registers explicitly used in the
958 rtl to be used as spill registers but prevents the compiler from
959 extending the lifetime of these registers. */
961 #define SMALL_REGISTER_CLASSES 1
963 /* Macros to check register numbers against specific register classes. */
965 /* These assume that REGNO is a hard or pseudo reg number.
966 They give nonzero only if REGNO is a hard reg of the suitable class
967 or a pseudo reg currently allocated to a suitable hard reg.
968 Since they use reg_renumber, they are safe only once reg_renumber
969 has been allocated, which happens in local-alloc.c. */
971 /* A C expression which is nonzero if register REGNO is suitable for use
972 as a base register in operand addresses. It may be either a suitable
973 hard register or a pseudo register that has been allocated such a
974 hard register.
976 On the 1610 the Y address pointers can be used as a base registers */
977 #define REGNO_OK_FOR_BASE_P(REGNO) \
978 (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \
979 && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
981 #define REGNO_OK_FOR_YBASE_P(REGNO) \
982 (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
984 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
986 #ifdef ALL_16_BIT_REGISTERS
987 #define IS_32_BIT_REG(REGNO) 0
988 #else
989 #define IS_32_BIT_REG(REGNO) \
990 ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
991 #endif
993 /* Given an rtx X being reloaded into a reg required to be
994 in class CLASS, return the class of reg to actually use.
995 In general this is just CLASS; but on some machines
996 in some cases it is preferable to use a more restrictive class.
997 Also, we must ensure that a PLUS is reloaded either
998 into an accumulator or an address register. */
1000 #define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS)
1002 /* A C expression that places additional restrictions on the register
1003 class to use when it is necessary to be able to hold a value of
1004 mode MODE in a reload register for which class CLASS would
1005 ordinarily be used.
1007 Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
1008 there are certain modes that simply can't go in certain reload
1009 classes.
1011 The value is a register class; perhaps CLASS, or perhaps another,
1012 smaller class.
1014 Don't define this macro unless the target machine has limitations
1015 which require the macro to do something nontrivial. */
1017 #if 0
1018 #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
1019 #endif
1021 /* A C expression for the maximum number of consecutive registers of class CLASS
1022 needed to hold a value of mode MODE */
1023 #define CLASS_MAX_NREGS(CLASS, MODE) \
1024 class_max_nregs(CLASS, MODE)
1026 /* The letters 'I' through 'P' in a register constraint string
1027 can be used to stand for particular ranges of immediate operands.
1028 This macro defines what the ranges are.
1029 C is the letter, and VALUE is a constant value.
1030 Return 1 if VALUE is in the range specified by C.
1032 For the 16xx, the following constraints are used:
1033 'I' requires a non-negative 16-bit value.
1034 'J' requires a non-negative 9-bit value
1035 'K' requires a constant 0 operand.
1036 'L' constant for use in add or sub from low 16-bits
1037 'M' 32-bit value -- low 16-bits zero
1038 'N' constant for use incrementing or decrementing a address register
1039 'O' constant for use with and'ing only high 16-bit
1040 'P' constant for use with and'ing only low 16-bit
1041 */
1043 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
1044 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
1045 #define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X)))
1046 #define SHORT_INTVAL(I) ((unsigned) (I) < 0x100)
1047 #define ADD_LOW_16(I) ((I) >= 0 && (I) <= 32767)
1048 #define ADD_HIGH_16(I) (((I) & 0x0000ffff) == 0)
1049 #define AND_LOW_16(I) ((I) >= 0 && (I) <= 32767)
1050 #define AND_HIGH_16(I) (((I) & 0x0000ffff) == 0)
1052 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1059 || (VALUE) == -2 || (VALUE) == 2) \
1062 : 0)
1064 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
1066 /* Optional extra constraints for this machine */
1067 #define EXTRA_CONSTRAINT(OP,C) \
1069 : 0)
1070 \f
1071 /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
1073 /* Define this if pushing a word on the stack
1074 makes the stack pointer a smaller address. */
1075 /* #define STACK_GROWS_DOWNWARD */
1077 /* Define this if the nominal address of the stack frame
1078 is at the high-address end of the local variables;
1079 that is, each additional local variable allocated
1080 goes at a more negative offset in the frame. */
1081 /* #define FRAME_GROWS_DOWNWARD */
1083 #define ARGS_GROW_DOWNWARD
1085 /* We use post decrement on the 1600 because there isn't
1086 a pre-decrement addressing mode. This means that we
1087 assume the stack pointer always points at the next
1088 FREE location on the stack. */
1089 #define STACK_PUSH_CODE POST_INC
1091 /* Offset within stack frame to start allocating local variables at.
1092 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1093 first local allocated. Otherwise, it is the offset to the BEGINNING
1094 of the first local allocated. */
1095 #define STARTING_FRAME_OFFSET 0
1097 /* Offset from the stack pointer register to the first
1098 location at which outgoing arguments are placed. */
1099 #define STACK_POINTER_OFFSET (0)
1101 struct dsp16xx_frame_info
1102 {
1114 };
1118 #define RETURN_ADDR_OFF current_frame_info.pr_save_offset
1120 /* If we generate an insn to push BYTES bytes,
1121 this says how many the stack pointer really advances by. */
1122 /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
1124 /* If defined, the maximum amount of space required for outgoing
1125 arguments will be computed and placed into the variable
1126 'current_function_outgoing_args_size'. No space will be pushed
1127 onto the stack for each call; instead, the function prologue should
1128 increase the stack frame size by this amount.
1130 It is not proper to define both 'PUSH_ROUNDING' and
1131 'ACCUMULATE_OUTGOING_ARGS'. */
1132 #define ACCUMULATE_OUTGOING_ARGS 1
1134 /* Offset of first parameter from the argument pointer
1135 register value. */
1137 #define FIRST_PARM_OFFSET(FNDECL) (0)
1139 /* Value is 1 if returning from a function call automatically
1140 pops the arguments described by the number-of-args field in the call.
1141 FUNDECL is the declaration node of the function (as a tree),
1142 FUNTYPE is the data type of the function (as a tree),
1143 or for a library call it is an identifier node for the subroutine name. */
1145 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1147 /* Define how to find the value returned by a function.
1148 VALTYPE is the data type of the value (as a tree).
1149 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1150 otherwise, FUNC is 0. On the 1610 all function return their values
1151 in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
1152 entire register is significant. */
1154 #define VALUE_REGNO(MODE) (REG_Y)
1156 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1157 gen_rtx_REG (TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
1159 /* Define how to find the value returned by a library function
1160 assuming the value has mode MODE. */
1161 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE))
1163 /* 1 if N is a possible register number for a function value. */
1164 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
1165 \f
1167 /* Define where to put the arguments to a function.
1168 Value is zero to push the argument on the stack,
1169 or a hard register in which to store the argument.
1171 MODE is the argument's machine mode.
1172 TYPE is the data type of the argument (as a tree).
1173 This is null for libcalls where that information may
1174 not be available.
1175 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1176 the preceding args and about the function being called.
1177 NAMED is nonzero if this argument is a named parameter
1178 (otherwise it is an extra parameter matching an ellipsis). */
1180 /* On the 1610 all args are pushed, except if -mregparm is specified
1181 then the first two words of arguments are passed in a0, a1. */
1182 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1183 dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
1185 /* Define the first register to be used for argument passing */
1186 #define FIRST_REG_FOR_FUNCTION_ARG REG_Y
1188 /* Define the profitability of saving registers around calls.
1189 NOTE: For now we turn this off because of a bug in the
1190 caller-saves code and also because i'm not sure it is helpful
1191 on the 1610. */
1193 #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
1195 /* This indicates that an argument is to be passed with an invisible reference
1196 (i.e., a pointer to the object is passed).
1198 On the dsp16xx, we do this if it must be passed on the stack. */
1200 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1201 (MUST_PASS_IN_STACK (MODE, TYPE))
1203 /* For an arg passed partly in registers and partly in memory,
1204 this is the number of registers used.
1205 For args passed entirely in registers or entirely in memory, zero. */
1207 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1209 /* Define a data type for recording info about an argument list
1210 during the scan of that argument list. This data type should
1211 hold all necessary information about the function itself
1212 and about the args processed so far, enough to enable macros
1213 such as FUNCTION_ARG to determine where the next arg should go. */
1214 #define CUMULATIVE_ARGS int
1216 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1217 for a call to a function whose data type is FNTYPE.
1218 For a library call, FNTYPE is 0. */
1219 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
1221 /* Update the data in CUM to advance over an argument
1222 of mode MODE and data type TYPE.
1223 (TYPE is null for libcalls where that information may not be available.) */
1225 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1226 dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
1228 /* 1 if N is a possible register number for function argument passing. */
1229 #define FUNCTION_ARG_REGNO_P(N) \
1230 ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
1232 /* Output assembler code to FILE to increment profiler label # LABELNO
1233 for profiling a function entry. */
1235 #define FUNCTION_PROFILER(FILE, LABELNO) \
1238 /* Output assembler code to FILE to initialize this source file's
1239 basic block profiling info, if that has not already been done. */
1240 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1243 /* Output assembler code to FILE to increment the entry-count for
1244 the BLOCKNO'th basic block in this source file. */
1245 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1249 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1250 the stack pointer does not matter. The value is tested only in
1251 functions that have frame pointers.
1252 No definition is equivalent to always zero. */
1254 #define EXIT_IGNORE_STACK (0)
1256 #define TRAMPOLINE_TEMPLATE(FILE) \
1259 /* Length in units of the trampoline for entering a nested function.
1260 This is a dummy value */
1262 #define TRAMPOLINE_SIZE 20
1264 /* Emit RTL insns to initialize the variable parts of a trampoline.
1265 FNADDR is an RTX for the address of the function's pure code.
1266 CXT is an RTX for the static chain value for the function. */
1268 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1271 /* A C expression which is nonzero if a function must have and use a
1272 frame pointer. If its value is nonzero the functions will have a
1273 frame pointer. */
1274 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1276 /* A C statement to store in the variable 'DEPTH' the difference
1277 between the frame pointer and the stack pointer values immediately
1278 after the function prologue. */
1279 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1280 { (DEPTH) = initial_frame_pointer_offset(); \
1281 }
1282 \f
1283 /* IMPLICIT CALLS TO LIBRARY ROUTINES */
1309 /* Define this macro if calls to the ANSI C library functions memcpy and
1310 memset should be generated instead of the BSD function bcopy & bzero. */
1311 #define TARGET_MEM_FUNCTIONS
1313 \f
1314 /* ADDRESSING MODES */
1316 /* The 1610 has post-increment and decrement, but no pre-modify */
1317 #define HAVE_POST_INCREMENT 1
1318 #define HAVE_POST_DECREMENT 1
1320 /* #define HAVE_PRE_DECREMENT 0 */
1321 /* #define HAVE_PRE_INCREMENT 0 */
1323 /* Recognize any constant value that is a valid address. */
1324 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1326 /* Maximum number of registers that can appear in a valid memory address. */
1327 #define MAX_REGS_PER_ADDRESS 1
1329 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1330 and check its validity for a certain class.
1331 We have two alternate definitions for each of them.
1332 The usual definition accepts all pseudo regs; the other rejects
1333 them unless they have been allocated suitable hard regs.
1334 The symbol REG_OK_STRICT causes the latter definition to be used.
1336 Most source files want to accept pseudo regs in the hope that
1337 they will get allocated to the class that the insn wants them to be in.
1338 Source files for reload pass need to be strict.
1339 After reload, it makes no difference, since pseudo regs have
1340 been eliminated by then. */
1342 #ifndef REG_OK_STRICT
1344 /* Nonzero if X is a hard reg that can be used as an index
1345 or if it is a pseudo reg. */
1346 #define REG_OK_FOR_INDEX_P(X) 0
1348 /* Nonzero if X is a hard reg that can be used as a base reg
1349 or if it is a pseudo reg. */
1350 #define REG_OK_FOR_BASE_P(X) \
1351 ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \
1352 || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1354 /* Nonzero if X is the 'ybase' register */
1355 #define REG_OK_FOR_YBASE_P(X) \
1356 (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1357 #else
1359 /* Nonzero if X is a hard reg that can be used as an index. */
1360 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1362 /* Nonzero if X is a hard reg that can be used as a base reg. */
1363 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1365 /* Nonzero if X is the 'ybase' register */
1366 #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
1368 #endif
1369 \f
1370 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1371 that is a valid memory address for an instruction.
1372 The MODE argument is the machine mode for the MEM expression
1373 that wants to use this address.
1375 On the 1610, the actual legitimate addresses must be N (N must fit in
1376 5 bits), *rn (register indirect), *rn++, or *rn-- */
1378 #define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20)
1379 #define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000)
1380 #define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0)
1381 #define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
1383 #define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
1384 #define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
1385 #define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31)
1387 #define INDIRECTABLE_ADDRESS_P(X) \
1388 ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \
1389 || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \
1390 && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \
1391 || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
1394 #define INDEXABLE_ADDRESS_P(X,MODE) \
1395 ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \
1396 XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \
1397 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \
1398 (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
1399 XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \
1400 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
1402 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1403 { \
1404 if (INDIRECTABLE_ADDRESS_P(X)) \
1405 goto ADDR; \
1406 }
1408 \f
1409 /* Try machine-dependent ways of modifying an illegitimate address
1410 to be legitimate. If we find one, return the new, valid address.
1411 This macro is used in only one place: `memory_address' in explow.c.
1413 OLDX is the address as it was before break_out_memory_refs was called.
1414 In some cases it is useful to look at this to decide what needs to be done.
1416 MODE and WIN are passed so that this macro can use
1417 GO_IF_LEGITIMATE_ADDRESS.
1419 It is always safe for this macro to do nothing. It exists to recognize
1420 opportunities to optimize the output.
1422 For the 1610, we need not do anything. However, if we don't,
1423 `memory_address' will try lots of things to get a valid address, most of
1424 which will result in dead code and extra pseudos. So we make the address
1425 valid here.
1427 This is easy: The only valid addresses are an offset from a register
1428 and we know the address isn't valid. So just call either `force_operand'
1429 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1431 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1432 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1433 X = XEXP (x, 0); \
1434 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1435 X = force_operand (X, 0); \
1436 else \
1437 X = force_reg (Pmode, X); \
1438 goto WIN; \
1439 }
1441 /* Go to LABEL if ADDR (a legitimate address expression)
1442 has an effect that depends on the machine mode it is used for.
1443 On the 1610, only postdecrement and postincrement address depend thus
1444 (the amount of decrement or increment being the length of the operand). */
1446 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1447 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1449 /* Nonzero if the constant value X is a legitimate general operand.
1450 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1451 #define LEGITIMATE_CONSTANT_P(X) (1)
1453 \f
1454 /* CONDITION CODE INFORMATION */
1456 /* Store in cc_status the expressions
1457 that the condition codes will describe
1458 after execution of an instruction whose pattern is EXP.
1459 Do not alter them if the instruction would not alter the cc's. */
1461 #define NOTICE_UPDATE_CC(EXP, INSN) \
1462 notice_update_cc( (EXP) )
1463 \f
1464 /* DESCRIBING RELATIVE COSTS OF OPERATIONS */
1466 /* Compute the cost of computing a constant rtl expression RTX
1467 whose rtx-code is CODE. The body of this macro is a portion
1468 of a switch statement. If the code is computed here,
1469 return it with a return statement. */
1470 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1471 case CONST_INT: \
1472 return (unsigned) INTVAL (RTX) < 65536 ? 0 : 2; \
1473 case LABEL_REF: \
1474 case SYMBOL_REF: \
1475 case CONST: \
1476 return COSTS_N_INSNS (1); \
1477 \
1478 case CONST_DOUBLE: \
1479 return COSTS_N_INSNS (2);
1481 /* Like CONST_COSTS but applies to nonconstant RTL expressions.
1482 This can be used, for example to indicate how costly a multiply
1483 instruction is. */
1484 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1485 case MEM: \
1486 return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) : \
1487 COSTS_N_INSNS (4); \
1488 case DIV: \
1489 case MOD: \
1490 return COSTS_N_INSNS (38); \
1491 case MULT: \
1492 if (GET_MODE (X) == QImode) \
1493 return COSTS_N_INSNS (2); \
1494 else \
1495 return COSTS_N_INSNS (38); \
1496 case PLUS: \
1497 case MINUS: \
1498 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1499 { \
1500 return (1 + \
1501 rtx_cost (XEXP (X, 0), CODE) + \
1502 rtx_cost (XEXP (X, 1), CODE)); \
1503 } \
1504 else \
1505 return COSTS_N_INSNS (38); \
1506 \
1507 case AND: case IOR: case XOR: \
1508 return (1 + \
1509 rtx_cost (XEXP (X, 0), CODE) + \
1510 rtx_cost (XEXP (X, 1), CODE)); \
1511 \
1512 case NEG: case NOT: \
1513 return COSTS_N_INSNS (1); \
1514 case ASHIFT: \
1515 case ASHIFTRT: \
1516 case LSHIFTRT: \
1517 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1518 { \
1519 int number = INTVAL(XEXP (X,1)); \
1520 if (number == 1 || number == 4 || number == 8 || \
1521 number == 16) \
1522 return COSTS_N_INSNS (1); \
1523 else \
1524 { \
1525 if (TARGET_BMU) \
1526 return COSTS_N_INSNS (2); \
1527 else \
1528 return COSTS_N_INSNS (num_1600_core_shifts(number)); \
1529 } \
1530 } \
1531 if (TARGET_BMU) \
1532 return COSTS_N_INSNS (1); \
1533 else \
1534 return COSTS_N_INSNS (15);
1536 /* An expression giving the cost of an addressing mode that contains
1537 address. */
1538 #define ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR)
1540 /* A c expression for the cost of moving data from a register in
1541 class FROM to one in class TO. The classes are expressed using
1542 the enumeration values such as GENERAL_REGS. A value of 2 is
1543 the default. */
1544 #define REGISTER_MOVE_COST(MODE,FROM,TO) dsp16xx_register_move_cost (FROM, TO)
1546 /* A C expression for the cost of moving data of mode MODE between
1547 a register and memory. A value of 2 is the default. */
1548 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
1549 (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \
1550 : 16)
1552 /* A C expression for the cost of a branch instruction. A value of
1553 1 is the default; */
1554 #define BRANCH_COST 1
1555 \f
1557 /* Define this because otherwise gcc will try to put the function address
1558 in any old pseudo register. We can only use pt. */
1559 #define NO_FUNCTION_CSE
1561 /* Define this macro as a C expression which is nonzero if accessing less
1562 than a word of memory (i.e a char or short) is no faster than accessing
1563 a word of memory, i.e if such access require more than one instruction
1564 or if ther is no difference in cost between byte and (aligned) word
1565 loads. */
1566 #define SLOW_BYTE_ACCESS 1
1568 /* Define this macro if zero-extension (of a char or short to an int) can
1569 be done faster if the destination is a register that is know to be zero. */
1570 /* #define SLOW_ZERO_EXTEND */
1572 /* Define this macro if unaligned accesses have a cost many times greater than
1573 aligned accesses, for example if they are emulated in a trap handler */
1574 /* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
1576 /* Define this macro to inhibit strength reduction of memory addresses */
1577 /* #define DONT_REDUCE_ADDR */
1579 \f
1580 /* DIVIDING THE OUTPUT IN SECTIONS */
1581 /* Output before read-only data. */
1584 #define TEXT_SECTION_ASM_OP rsect_text
1586 /* Output before constants and strings */
1588 #define READONLY_SECTION_ASM_OP rsect_const
1589 #define READONLY_DATA_SECTION const_section
1591 /* Output before writable data. */
1593 #define DATA_SECTION_ASM_OP rsect_data
1596 #define BSS_SECTION_ASM_OP rsect_bss
1598 /* We will default to using 1610 if the user doesn't
1599 specify it. */
1602 /* A list of names for sections other than the standard ones, which are
1603 'in_text' and 'in_data' (and .bss if BSS_SECTION_ASM_OP is defined). */
1604 #define EXTRA_SECTIONS in_const
1606 #define EXTRA_SECTION_FUNCTIONS \
1607 extern void const_section PARAMS ((void)); \
1608 void \
1609 const_section () \
1610 { \
1611 if (in_section != in_const) \
1612 { \
1614 in_section = in_const; \
1615 } \
1616 }
1617 \f
1618 /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
1620 /* Output at beginning of assembler file. */
1621 #define ASM_FILE_START(FILE) coff_dsp16xx_file_start (FILE)
1623 /* Prevent output of .gcc_compiled */
1624 #define ASM_IDENTIFY_GCC(FILE)
1626 /* A C string constant describing how to begin a comment in the target
1627 assembler language. */
1631 /* Output to assembler file text saying following lines
1632 may contain character constants, extra white space, comments, etc. */
1635 /* Output to assembler file text saying following lines
1636 no longer contain unusual constructs. */
1638 \f
1639 /* OUTPUT OF DATA */
1641 /* This is how to output an assembler line defining a `double' constant. */
1642 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) asm_output_float (FILE,VALUE)
1644 /* This is how to output an assembler line defining a `float' constant. */
1645 #define ASM_OUTPUT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1647 /* This is how to output an assembler line defining a 'float' constant of
1648 size HFmode. */
1649 #define ASM_OUTPUT_SHORT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1651 /* This is how to output an assembler line defining an `char' constant. */
1652 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1654 output_addr_const (FILE, (VALUE)), \
1657 /* This is how to output an assembler line defining an `short' constant. */
1658 #define ASM_OUTPUT_SHORT(FILE,EXP) asm_output_long(FILE,INTVAL(EXP))
1660 /* This is how to output an assembler line defining a 'int' constant. */
1661 #define ASM_OUTPUT_INT(FILE, EXP) asm_output_long(FILE,INTVAL(EXP))
1663 /* This is how to output an assembler line for a numeric constant byte. */
1664 #define ASM_OUTPUT_BYTE(FILE,VALUE) ASM_OUTPUT_CHAR(FILE,GEN_INT(VALUE))
1666 /* This is how we output a 'c' character string. For the 16xx
1667 assembler we have to do it one letter at a time */
1669 #define ASCII_LENGTH 10
1671 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1672 do { \
1673 FILE *_hide_asm_out_file = (MYFILE); \
1674 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1675 int _hide_thissize = (MYLENGTH); \
1676 { \
1677 FILE *asm_out_file = _hide_asm_out_file; \
1678 const unsigned char *p = _hide_p; \
1679 int thissize = _hide_thissize; \
1680 int i; \
1681 \
1682 for (i = 0; i < thissize; i++) \
1683 { \
1684 register int c = p[i]; \
1685 \
1686 if (i % ASCII_LENGTH == 0) \
1688 \
1690 { \
1692 putc (c, asm_out_file); \
1694 } \
1695 else \
1696 { \
1698 /* After an octal-escape, if a digit follows, \
1699 terminate one string constant and start another. \
1700 The Vax assembler fails to stop reading the escape \
1701 after three digits, so this is the only way we \
1702 can get it to parse the data properly. \
1703 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1704 fprintf (asm_out_file, "\'\n\tint \'"); \
1706 } \
1707 /* if: \
1708 we are not at the last char (i != thissize -1) \
1709 and (we are not at a line break multiple \
1710 but i == 0) (it will be the very first time) \
1711 then put out a comma to extend. \
1713 if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \
1715 if (!((i + 1) % ASCII_LENGTH)) \
1717 } \
1719 } \
1720 } \
1721 while (0)
1723 /* Store in OUTPUT a string (made with alloca) containing
1724 an assembler-name for a local static variable or function
1725 named NAME. LABELNO is an integer which is different for
1726 each call. */
1728 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1729 do { \
1730 int len = strlen (NAME); \
1731 char *temp = (char *) alloca (len + 3); \
1733 strcpy (&temp[1], (NAME)); \
1735 temp[len + 2] = 0; \
1736 (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \
1737 ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \
1738 } while (0)
1739 \f
1740 /* OUTPUT OF UNINITIALIZED VARIABLES */
1742 /* This says how to output an assembler line
1743 to define a global common symbol. */
1745 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1746 asm_output_common (FILE, NAME, SIZE, ROUNDED);
1748 /* This says how to output an assembler line
1749 to define a local common symbol. */
1751 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1752 asm_output_local (FILE, NAME, SIZE, ROUNDED);
1753 \f
1754 /* OUTPUT AND GENERATION OF LABELS */
1756 /* This is how to output the definition of a user-level label named NAME,
1757 such as the label on a static function or variable NAME. */
1758 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1761 /* This is how to output a command to make the user-level label named NAME
1762 defined for reference from other files. */
1764 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1767 /* A C statement to output to the stdio stream any text necessary
1768 for declaring the name of an external symbol named name which
1769 is referenced in this compilation but not defined. */
1771 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1772 { \
1774 assemble_name (FILE, NAME); \
1776 }
1777 /* A C statement to output on stream an assembler pseudo-op to
1778 declare a library function named external. */
1780 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1781 { \
1783 assemble_name (FILE, XSTR (FUN, 0)); \
1785 }
1787 /* The prefix to add to user-visible assembler symbols. */
1791 /* This is how to output an internal numbered label where
1792 PREFIX is the class of label and NUM is the number within the class. */
1793 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1796 /* This is how to store into the string LABEL
1797 the symbol_ref name of an internal numbered label where
1798 PREFIX is the class of label and NUM is the number within the class.
1799 This is suitable for output with `assemble_name'. */
1800 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1803 \f
1804 /* OUTPUT OF ASSEMBLER INSTRUCTIONS */
1806 /* How to refer to registers in assembler output.
1807 This sequence is indexed by compiler's hard-register-number (see above). */
1809 #define REGISTER_NAMES \
1821 #define HIMODE_REGISTER_NAMES \
1833 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1835 /* Print operand X (an rtx) in assembler syntax to file FILE.
1836 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1837 For `%' followed by punctuation, CODE is the punctuation and X is null.
1839 DSP1610 extensions for operand codes:
1841 %H - print lower 16 bits of constant
1842 %U - print upper 16 bits of constant
1843 %w - print low half of register (e.g 'a0l')
1844 %u - print upper half of register (e.g 'a0')
1845 %b - print high half of accumulator for F3 ALU instructions
1846 %h - print constant in decimal */
1848 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1851 /* Print a memory address as an operand to reference that memory location. */
1853 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1855 /* This is how to output an insn to push a register on the stack.
1856 It need not be very fast code since it is used only for profiling */
1857 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1860 /* This is how to output an insn to pop a register from the stack.
1861 It need not be very fast code since it is used only for profiling */
1862 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1864 \f
1865 /* OUTPUT OF DISPATCH TABLES */
1867 /* This macro should be provided on machines where the addresses in a dispatch
1868 table are relative to the table's own address. */
1869 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1872 /* This macro should be provided on machines where the addresses in a dispatch
1873 table are absolute. */
1874 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1877 /* ASSEMBLER COMMANDS FOR ALIGNMENT */
1879 /* This is how to output an assembler line that says to advance
1880 the location counter to a multiple of 2**LOG bytes. We should
1881 not have to do any alignment since the 1610 is a word machine. */
1882 #define ASM_OUTPUT_ALIGN(FILE,LOG)
1884 /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
1885 because it fails to put zero1 in the bytes that are skipped. */
1886 #define ASM_NO_SKIP_IN_TEXT 1
1888 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1891 /* CONTROLLING DEBUGGING INFORMATION FORMAT */
1893 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
1895 #define ASM_OUTPUT_DEF(asm_out_file, LABEL1, LABEL2) \
1896 do { \
1898 ASM_OUTPUT_LABELREF(asm_out_file, LABEL1); \
1900 ASM_OUTPUT_LABELREF(asm_out_file, LABEL2); \
1902 } while (0)
1904 \f
1905 /* MISCELLANEOUS PARAMETERS */
1907 /* Specify the machine mode that this machine uses
1908 for the index in the tablejump instruction. */
1909 #define CASE_VECTOR_MODE QImode
1911 /* Define as C expression which evaluates to nonzero if the tablejump
1912 instruction expects the table to contain offsets from the address of the
1913 table.
1914 Do not define this if the table should contain absolute addresses. */
1915 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1917 /* Specify the tree operation to be used to convert reals to integers. */
1918 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1920 /* This is the kind of divide that is easiest to do in the general case. */
1921 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1923 /* Max number of bytes we can move from memory to memory
1924 in one reasonably fast instruction. */
1925 #define MOVE_MAX 1
1927 /* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
1928 or bitwise 'and' instruction that truncates the count of a shift operation
1929 to a width equal to the number of bits needed to represent the size of the
1930 object being shifted. Do not define this macro unless the truncation applies
1931 to both shift operations and bit-field operations (if any). */
1932 /* #define SHIFT_COUNT_TRUNCATED */
1934 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1935 is done just by pretending it is already truncated. */
1936 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1938 /* When a prototype says `char' or `short', really pass an `int'. */
1939 #define PROMOTE_PROTOTYPES 1
1941 /* An alias for the machine mode used for pointers */
1942 #define Pmode QImode
1944 /* A function address in a call instruction
1945 is a byte address (for indexing purposes)
1946 so give the MEM rtx a byte's mode. */
1947 #define FUNCTION_MODE QImode
1949 #if !defined(__DATE__)
1951 #else
1953 #endif
1958 /* Define this as 1 if `char' should by default be signed; else as 0. */
1959 #define DEFAULT_SIGNED_CHAR 1
1961 /* Define this so gcc does not output a call to __main, since we
1962 are not currently supporting c++. */
1963 #define INIT_SECTION_ASM_OP 1