Handle peeling for alignment with masking
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / peel_ind_4_run.c
blob7834a6298083cb1f1b03070ce33e0e9ed1279257
1 /* { dg-do run { target aarch64_sve_hw } } */
2 /* { dg-options "-Ofast -mtune=thunderx" } */
3 /* { dg-options "-Ofast -mtune=thunderx -mtune=thunderx" { target aarch64_sve256_hw } } */
5 #include "peel_ind_4.c"
7 int __attribute__ ((optimize (1)))
8 main (void)
10 double x[END + 1];
11 for (int i = 0; i < END + 1; ++i)
13 x[i] = i;
14 asm volatile ("" ::: "memory");
16 foo (x);
17 for (int i = 0; i < END + 1; ++i)
19 double expected;
20 if (i < START || i >= END)
21 expected = i;
22 else
23 expected = 10 + (i - START) * 5;
24 if (x[i] != expected)
25 __builtin_abort ();
26 asm volatile ("" ::: "memory");
28 return 0;