1 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2 Alan Hayward <alan.hayward@arm.com>
3 David Sherwood <david.sherwood@arm.com>
5 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
6 * internal-fn.def (VEC_SHL_INSERT): New internal function.
7 * optabs.def (vec_shl_insert_optab): New optab.
8 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
9 (duplicate_and_interleave): Likewise.
10 * tree-vect-loop.c: Include internal-fn.h.
11 (neutral_op_for_slp_reduction): New function, split out from
12 get_initial_defs_for_reduction.
13 (get_initial_def_for_reduction): Handle option 2 for variable-length
14 vectors by loading the neutral value into a vector and then shifting
15 the initial value into element 0.
16 (get_initial_defs_for_reduction): Replace the code argument with
17 the neutral value calculated by neutral_op_for_slp_reduction.
18 Use gimple_build_vector for constant-length vectors.
19 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
20 but the first group_size elements have a neutral value.
21 Use duplicate_and_interleave otherwise.
22 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
23 Update call to get_initial_defs_for_reduction. Handle SLP
24 reductions for variable-length vectors by creating one vector
25 result for each scalar result, with the elements associated
26 with other scalar results stubbed out with the neutral value.
27 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
28 Require IFN_VEC_SHL_INSERT for double reductions on
29 variable-length vectors, or SLP reductions that have
30 a neutral value. Require can_duplicate_and_interleave_p
31 support for variable-length unchained SLP reductions if there
32 is no neutral value, such as for MIN/MAX reductions. Also require
33 the number of vector elements to be a multiple of the number of
34 SLP statements when doing variable-length unchained SLP reductions.
35 Update call to vect_create_epilog_for_reduction.
36 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
37 and remove initial values.
38 (duplicate_and_interleave): Make public.
39 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
40 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
42 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
43 Alan Hayward <alan.hayward@arm.com>
44 David Sherwood <david.sherwood@arm.com>
46 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
47 (can_duplicate_and_interleave_p): New function.
48 (vect_get_and_check_slp_defs): Take the vector of statements
49 rather than just the current one. Remove excess parentheses.
50 Restriction rejectinon of vect_constant_def and vect_external_def
51 for variable-length vectors to boolean types, or types for which
52 can_duplicate_and_interleave_p is false.
53 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
54 (duplicate_and_interleave): New function.
55 (vect_get_constant_vectors): Use gimple_build_vector for
56 constant-length vectors and suitable variable-length constant
57 vectors. Use duplicate_and_interleave for other variable-length
58 vectors. Don't defer the update when inserting new statements.
60 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
61 Alan Hayward <alan.hayward@arm.com>
62 David Sherwood <david.sherwood@arm.com>
64 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
65 min_profitable_iters doesn't go negative.
67 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
68 Alan Hayward <alan.hayward@arm.com>
69 David Sherwood <david.sherwood@arm.com>
71 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
72 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
73 * optabs.def (vec_mask_load_lanes_optab): New optab.
74 (vec_mask_store_lanes_optab): Likewise.
75 * internal-fn.def (MASK_LOAD_LANES): New internal function.
76 (MASK_STORE_LANES): Likewise.
77 * internal-fn.c (mask_load_lanes_direct): New macro.
78 (mask_store_lanes_direct): Likewise.
79 (expand_mask_load_optab_fn): Handle masked operations.
80 (expand_mask_load_lanes_optab_fn): New macro.
81 (expand_mask_store_optab_fn): Handle masked operations.
82 (expand_mask_store_lanes_optab_fn): New macro.
83 (direct_mask_load_lanes_optab_supported_p): Likewise.
84 (direct_mask_store_lanes_optab_supported_p): Likewise.
85 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
87 (vect_load_lanes_supported): Likewise.
88 * tree-vect-data-refs.c (strip_conversion): New function.
89 (can_group_stmts_p): Likewise.
90 (vect_analyze_data_ref_accesses): Use it instead of checking
91 for a pair of assignments.
92 (vect_store_lanes_supported): Take a masked_p parameter.
93 (vect_load_lanes_supported): Likewise.
94 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
95 vect_store_lanes_supported and vect_load_lanes_supported.
96 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
97 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
98 parameter. Don't allow gaps for masked accesses.
99 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
100 and vect_load_lanes_supported.
101 (get_load_store_type): Take a masked_p parameter and update
102 call to get_group_load_store_type.
103 (vectorizable_store): Update call to get_load_store_type.
104 Handle IFN_MASK_STORE_LANES.
105 (vectorizable_load): Update call to get_load_store_type.
106 Handle IFN_MASK_LOAD_LANES.
108 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
109 Alan Hayward <alan.hayward@arm.com>
110 David Sherwood <david.sherwood@arm.com>
112 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
114 * config/aarch64/aarch64-protos.h
115 (aarch64_sve_struct_memory_operand_p): Declare.
116 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
117 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
118 (VPRED, vpred): Handle SVE structure modes.
119 * config/aarch64/constraints.md (Utx): New constraint.
120 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
121 (aarch64_sve_struct_nonimmediate_operand): New predicates.
122 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
123 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
124 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
125 structure modes. Split into pieces after RA.
126 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
127 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
129 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
131 (aarch64_classify_address): Likewise.
132 (sizetochar): Move earlier in file.
133 (aarch64_print_operand): Handle SVE register lists.
134 (aarch64_array_mode): New function.
135 (aarch64_sve_struct_memory_operand_p): Likewise.
136 (TARGET_ARRAY_MODE): Redefine.
138 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
139 Alan Hayward <alan.hayward@arm.com>
140 David Sherwood <david.sherwood@arm.com>
142 * target.def (array_mode): New target hook.
143 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
144 * doc/tm.texi: Regenerate.
145 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
146 * hooks.c (hook_optmode_mode_uhwi_none): New function.
147 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
149 * stor-layout.c (mode_for_array): Likewise. Support polynomial
152 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
153 Alan Hayward <alan.hayward@arm.com>
154 David Sherwood <david.sherwood@arm.com>
156 * fold-const.c (fold_binary_loc): Check the argument types
157 rather than the result type when testing for a vector operation.
159 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
161 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
162 * doc/tm.texi: Regenerate.
164 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
165 Alan Hayward <alan.hayward@arm.com>
166 David Sherwood <david.sherwood@arm.com>
168 * doc/invoke.texi (-msve-vector-bits=): Document new option.
169 (sve): Document new AArch64 extension.
170 * doc/md.texi (w): Extend the description of the AArch64
171 constraint to include SVE vectors.
172 (Upl, Upa): Document new AArch64 predicate constraints.
173 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
175 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
176 (msve-vector-bits=): New option.
177 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
178 SVE when these are disabled.
179 (sve): New extension.
180 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
181 modes. Adjust their number of units based on aarch64_sve_vg.
182 (MAX_BITSIZE_MODE_ANY_MODE): Define.
183 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
184 aarch64_addr_query_type.
185 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
186 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
187 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
188 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
189 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
190 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
191 (aarch64_simd_imm_zero_p): Delete.
192 (aarch64_check_zero_based_sve_index_immediate): Declare.
193 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
194 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
195 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
196 (aarch64_sve_float_mul_immediate_p): Likewise.
197 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
199 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
200 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
201 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
202 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
203 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
204 (aarch64_regmode_natural_size): Likewise.
205 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
206 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
208 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
209 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
210 for VG and the SVE predicate registers.
211 (V_ALIASES): Add a "z"-prefixed alias.
212 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
213 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
214 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
215 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
216 (REG_CLASS_NAMES): Add entries for them.
217 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
218 and the predicate registers.
219 (aarch64_sve_vg): Declare.
220 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
221 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
222 (REGMODE_NATURAL_SIZE): Define.
223 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
225 * config/aarch64/aarch64.c: Include cfgrtl.h.
226 (simd_immediate_info): Add a constructor for series vectors,
227 and an associated step field.
228 (aarch64_sve_vg): New variable.
229 (aarch64_dbx_register_number): Handle VG and the predicate registers.
230 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
231 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
232 (VEC_ANY_DATA, VEC_STRUCT): New constants.
233 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
234 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
235 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
236 (aarch64_get_mask_mode): New functions.
237 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
238 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
239 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
240 predicate modes and predicate registers. Explicitly restrict
241 GPRs to modes of 16 bytes or smaller. Only allow FP registers
242 to store a vector mode if it is recognized by
243 aarch64_classify_vector_mode.
244 (aarch64_regmode_natural_size): New function.
245 (aarch64_hard_regno_caller_save_mode): Return the original mode
247 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
248 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
249 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
250 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
252 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
253 does not overlap dest if the function is frame-related. Handle
255 (aarch64_split_add_offset): New function.
256 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
257 them aarch64_add_offset.
258 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
259 and update call to aarch64_sub_sp.
260 (aarch64_add_cfa_expression): New function.
261 (aarch64_expand_prologue): Pass extra temporary registers to the
262 functions above. Handle the case in which we need to emit new
263 DW_CFA_expressions for registers that were originally saved
264 relative to the stack pointer, but now have to be expressed
265 relative to the frame pointer.
266 (aarch64_output_mi_thunk): Pass extra temporary registers to the
268 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
269 IP0 and IP1 values for SVE frames.
270 (aarch64_expand_vec_series): New function.
271 (aarch64_expand_sve_widened_duplicate): Likewise.
272 (aarch64_expand_sve_const_vector): Likewise.
273 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
274 Handle SVE constants. Use emit_move_insn to move a force_const_mem
275 into the register, rather than emitting a SET directly.
276 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
277 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
278 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
279 (offset_9bit_signed_scaled_p): New functions.
280 (aarch64_replicate_bitmask_imm): New function.
281 (aarch64_bitmask_imm): Use it.
282 (aarch64_cannot_force_const_mem): Reject expressions involving
283 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
284 (aarch64_classify_index): Handle SVE indices, by requiring
285 a plain register index with a scale that matches the element size.
286 (aarch64_classify_address): Handle SVE addresses. Assert that
287 the mode of the address is VOIDmode or an integer mode.
288 Update call to aarch64_classify_symbol.
289 (aarch64_classify_symbolic_expression): Update call to
290 aarch64_classify_symbol.
291 (aarch64_const_vec_all_in_range_p): New function.
292 (aarch64_print_vector_float_operand): Likewise.
293 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
294 "vN" for FP registers with SVE modes. Handle (const ...) vectors
295 and the FP immediates 1.0 and 0.5.
296 (aarch64_print_address_internal): Handle SVE addresses.
297 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
298 (aarch64_regno_regclass): Handle predicate registers.
299 (aarch64_secondary_reload): Handle big-endian reloads of SVE
301 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
302 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
303 (aarch64_convert_sve_vector_bits): New function.
304 (aarch64_override_options): Use it to handle -msve-vector-bits=.
305 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
307 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
308 Handle SVE vector and predicate modes. Accept VL-based constants
309 that need only one temporary register, and VL offsets that require
310 no temporary registers.
311 (aarch64_conditional_register_usage): Mark the predicate registers
312 as fixed if SVE isn't available.
313 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
314 Return true for SVE vector and predicate modes.
315 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
316 rather than an unsigned int. Handle SVE modes.
317 (aarch64_preferred_simd_mode): Update call accordingly. Handle
319 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
321 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
322 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
323 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
324 (aarch64_sve_float_mul_immediate_p): New functions.
325 (aarch64_sve_valid_immediate): New function.
326 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
327 Explicitly reject structure modes. Check for INDEX constants.
328 Handle PTRUE and PFALSE constants.
329 (aarch64_check_zero_based_sve_index_immediate): New function.
330 (aarch64_simd_imm_zero_p): Delete.
331 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
332 vector modes. Accept constants in the range of CNT[BHWD].
333 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
334 ask for an Advanced SIMD mode.
335 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
336 (aarch64_simd_vector_alignment): Handle SVE predicates.
337 (aarch64_vectorize_preferred_vector_alignment): New function.
338 (aarch64_simd_vector_alignment_reachable): Use it instead of
340 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
341 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
343 (MAX_VECT_LEN): Delete.
344 (expand_vec_perm_d): Add a vec_flags field.
345 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
346 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
347 (aarch64_evpc_ext): Don't apply a big-endian lane correction
349 (aarch64_evpc_rev): Rename to...
350 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
351 (aarch64_evpc_rev_global): New function.
352 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
353 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
355 (aarch64_evpc_sve_tbl): New function.
356 (aarch64_expand_vec_perm_const_1): Update after rename of
357 aarch64_evpc_rev. Handle SVE permutes too, trying
358 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
359 than aarch64_evpc_tbl.
360 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
361 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
362 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
363 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
364 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
365 (aarch64_expand_sve_vcond): New functions.
366 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
367 of aarch64_vector_mode_p.
368 (aarch64_dwarf_poly_indeterminate_value): New function.
369 (aarch64_compute_pressure_classes): Likewise.
370 (aarch64_can_change_mode_class): Likewise.
371 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
372 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
373 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
374 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
375 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
376 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
377 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
378 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
380 (Dn, Dl, Dr): Accept const as well as const_vector.
381 (Dz): Likewise. Compare against CONST0_RTX.
382 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
383 of "vector" where appropriate.
384 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
385 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
386 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
387 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
388 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
389 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
390 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
391 (v_int_equiv): Extend to SVE modes.
392 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
394 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
395 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
396 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
397 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
398 (SVE_COND_FP_CMP): New int iterators.
399 (perm_hilo): Handle the new unpack unspecs.
400 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
402 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
403 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
404 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
405 (aarch64_equality_operator, aarch64_constant_vector_operand)
406 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
407 (aarch64_sve_nonimmediate_operand): Likewise.
408 (aarch64_sve_general_operand): Likewise.
409 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
410 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
411 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
412 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
413 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
414 (aarch64_sve_float_arith_immediate): Likewise.
415 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
416 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
417 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
418 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
419 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
420 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
421 (aarch64_sve_float_arith_operand): Likewise.
422 (aarch64_sve_float_arith_with_sub_operand): Likewise.
423 (aarch64_sve_float_mul_operand): Likewise.
424 (aarch64_sve_vec_perm_operand): Likewise.
425 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
426 (aarch64_mov_operand): Accept const_poly_int and const_vector.
427 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
428 as well as const_vector.
429 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
430 in file. Use CONST0_RTX and CONSTM1_RTX.
431 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
432 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
433 Use aarch64_simd_imm_zero.
434 * config/aarch64/aarch64-sve.md: New file.
435 * config/aarch64/aarch64.md: Include it.
436 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
437 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
438 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
439 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
440 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
441 (sve): New attribute.
442 (enabled): Disable instructions with the sve attribute unless
444 (movqi, movhi): Pass CONST_POLY_INT operaneds through
445 aarch64_expand_mov_immediate.
446 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
447 CNT[BHSD] immediates.
448 (movti): Split CONST_POLY_INT moves into two halves.
449 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
450 Split additions that need a temporary here if the destination
451 is the stack pointer.
452 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
453 (*add<mode>3_poly_1): New instruction.
454 (set_clobber_cc): New expander.
456 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
458 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
459 parameter and use it instead of GET_MODE_SIZE (innermode). Use
460 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
461 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
462 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
463 Change innermode from fixed_mode_size to machine_mode.
464 (simplify_subreg): Update call accordingly. Handle a constant-sized
465 subreg of a variable-length CONST_VECTOR.
467 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
468 Alan Hayward <alan.hayward@arm.com>
469 David Sherwood <david.sherwood@arm.com>
471 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
472 (add_offset_to_base): New function, split out from...
473 (create_mem_ref): ...here. When handling a scale other than 1,
474 check first whether the address is valid without the offset.
475 Add it into the base if so, leaving the index and scale as-is.
477 2018-01-12 Jakub Jelinek <jakub@redhat.com>
480 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
481 fold_for_warn before checking if arg2 is INTEGER_CST.
483 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
485 * config/rs6000/predicates.md (load_multiple_operation): Delete.
486 (store_multiple_operation): Delete.
487 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
488 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
489 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
490 guarded by TARGET_STRING.
491 (rs6000_output_load_multiple): Delete.
492 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
493 OPTION_MASK_STRING / TARGET_STRING handling.
494 (print_operand) <'N', 'O'>: Add comment that these are unused now.
495 (const rs6000_opt_masks) <"string">: Change mask to 0.
496 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
497 (MASK_STRING): Delete.
498 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
500 (load_multiple): Delete.
507 (store_multiple): Delete.
514 (movmemsi_8reg): Delete.
515 (corresponding unnamed define_insn): Delete.
516 (movmemsi_6reg): Delete.
517 (corresponding unnamed define_insn): Delete.
518 (movmemsi_4reg): Delete.
519 (corresponding unnamed define_insn): Delete.
520 (movmemsi_2reg): Delete.
521 (corresponding unnamed define_insn): Delete.
522 (movmemsi_1reg): Delete.
523 (corresponding unnamed define_insn): Delete.
524 * config/rs6000/rs6000.opt (mno-string): New.
525 (mstring): Replace by deprecation warning stub.
526 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
528 2018-01-12 Jakub Jelinek <jakub@redhat.com>
530 * regrename.c (regrename_do_replace): If replacing the same
531 reg multiple times, try to reuse last created gen_raw_REG.
534 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
535 main to workaround a bug in GDB.
537 2018-01-12 Tom de Vries <tom@codesourcery.com>
540 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
542 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
544 PR rtl-optimization/80481
545 * ira-color.c (get_cap_member): New function.
546 (allocnos_conflict_by_live_ranges_p): Use it.
547 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
548 (setup_slot_coalesced_allocno_live_ranges): Ditto.
550 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
553 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
554 (*saddl_se_1): Ditto.
556 (*saddl_se_1): Ditto.
558 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
560 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
561 rather than wi::to_widest for DR_INITs.
562 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
563 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
564 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
566 (vect_analyze_group_access_1): Note that here.
568 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
570 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
571 polynomial type sizes.
573 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
575 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
576 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
577 (gimple_add_tmp_var): Likewise.
579 2018-01-12 Martin Liska <mliska@suse.cz>
581 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
582 (gimple_alloc_sizes): Likewise.
583 (dump_gimple_statistics): Use PRIu64 in printf format.
584 * gimple.h: Change uint64_t to int.
586 2018-01-12 Martin Liska <mliska@suse.cz>
588 * tree-core.h: Use uint64_t instead of int.
589 * tree.c (tree_node_counts): Likewise.
590 (tree_node_sizes): Likewise.
591 (dump_tree_statistics): Use PRIu64 in printf format.
593 2018-01-12 Martin Liska <mliska@suse.cz>
595 * Makefile.in: As qsort_chk is implemented in vec.c, add
596 vec.o to linkage of gencfn-macros.
597 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
598 passing the info to record_node_allocation_statistics.
599 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
601 * ggc-common.c (struct ggc_usage): Add operator== and use
602 it in operator< and compare function.
603 * mem-stats.h (struct mem_usage): Likewise.
604 * vec.c (struct vec_usage): Remove operator< and compare
605 function. Can be simply inherited.
607 2018-01-12 Martin Jambor <mjambor@suse.cz>
610 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
611 * tree-ssa-math-opts.c: Include domwalk.h.
612 (convert_mult_to_fma_1): New function.
613 (fma_transformation_info): New type.
614 (fma_deferring_state): Likewise.
615 (cancel_fma_deferring): New function.
616 (result_of_phi): Likewise.
617 (last_fma_candidate_feeds_initial_phi): Likewise.
618 (convert_mult_to_fma): Added deferring logic, split actual
619 transformation to convert_mult_to_fma_1.
620 (math_opts_dom_walker): New type.
621 (math_opts_dom_walker::after_dom_children): New method, body moved
622 here from pass_optimize_widening_mul::execute, added deferring logic
624 (pass_optimize_widening_mul::execute): Moved most of code to
625 math_opts_dom_walker::after_dom_children.
626 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
627 * config/i386/i386.c (ix86_option_override_internal): Added
628 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
630 2018-01-12 Richard Biener <rguenther@suse.de>
633 * dwarf2out.c (gen_variable_die): Do not reset old_die for
634 inline instance vars.
636 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
639 * config/rx/rx.c (rx_is_restricted_memory_address):
642 2018-01-12 Richard Biener <rguenther@suse.de>
644 PR tree-optimization/80846
645 * target.def (split_reduction): New target hook.
646 * targhooks.c (default_split_reduction): New function.
647 * targhooks.h (default_split_reduction): Declare.
648 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
649 target requests first reduce vectors by combining low and high
651 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
652 (get_vectype_for_scalar_type_and_size): Export.
653 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
654 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
655 * doc/tm.texi: Regenerate.
656 * config/i386/i386.c (ix86_split_reduction): Implement
657 TARGET_VECTORIZE_SPLIT_REDUCTION.
659 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
662 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
663 in PIC mode except for TARGET_VXWORKS_RTP.
664 * config/sparc/sparc.c: Include cfgrtl.h.
665 (TARGET_INIT_PIC_REG): Define.
666 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
667 (sparc_pic_register_p): New predicate.
668 (sparc_legitimate_address_p): Use it.
669 (sparc_legitimize_pic_address): Likewise.
670 (sparc_delegitimize_address): Likewise.
671 (sparc_mode_dependent_address_p): Likewise.
672 (gen_load_pcrel_sym): Remove 4th parameter.
673 (load_got_register): Adjust call to above. Remove obsolete stuff.
674 (sparc_expand_prologue): Do not call load_got_register here.
675 (sparc_flat_expand_prologue): Likewise.
676 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
677 (sparc_use_pseudo_pic_reg): New function.
678 (sparc_init_pic_reg): Likewise.
679 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
680 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
682 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
684 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
685 Add item for branch_cost.
687 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
689 PR rtl-optimization/83565
690 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
691 not extend the result to a larger mode for rotate operations.
692 (num_sign_bit_copies1): Likewise.
694 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
697 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
699 Use values-Xc.o for -pedantic.
700 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
702 2018-01-12 Martin Liska <mliska@suse.cz>
705 * ipa-devirt.c (final_warning_record::grow_type_warnings):
707 (possible_polymorphic_call_targets): Use it.
708 (ipa_devirt): Likewise.
710 2018-01-12 Martin Liska <mliska@suse.cz>
712 * profile-count.h (enum profile_quality): Use 0 as invalid
713 enum value of profile_quality.
715 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
717 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
718 -mext-string options.
720 2018-01-12 Richard Biener <rguenther@suse.de>
722 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
723 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
724 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
726 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
728 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
730 * configure.ac (--with-long-double-format): Add support for the
731 configuration option to change the default long double format on
733 * config.gcc (powerpc*-linux*-*): Likewise.
734 * configure: Regenerate.
735 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
736 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
737 used without modification.
739 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
741 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
742 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
743 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
744 MISC_BUILTIN_SPEC_BARRIER.
745 (rs6000_init_builtins): Likewise.
746 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
748 (speculation_barrier): New define_insn.
749 * doc/extend.texi: Document __builtin_speculation_barrier.
751 2018-01-11 Jakub Jelinek <jakub@redhat.com>
754 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
755 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
756 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
758 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
759 integral modes instead of "ss" and "sd".
760 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
761 vectors with 32-bit and 64-bit elements.
762 (vecdupssescalarmodesuffix): New mode attribute.
763 (vec_dup<mode>): Use it.
765 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
768 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
769 frame if argument is passed on stack.
771 2018-01-11 Jakub Jelinek <jakub@redhat.com>
774 * ree.c (combine_reaching_defs): Optimize also
775 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
776 reg2=any_extend(exp); reg1=reg2;, formatting fix.
778 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
781 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
783 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
786 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
787 after they are computed.
789 2018-01-11 Bin Cheng <bin.cheng@arm.com>
791 PR tree-optimization/83695
792 * gimple-loop-linterchange.cc
793 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
794 reset cached scev information after interchange.
795 (pass_linterchange::execute): Remove call to scev_reset_htab.
797 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
799 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
800 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
801 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
802 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
803 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
804 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
805 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
806 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
807 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
808 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
809 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
810 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
811 (V_lane_reg): Likewise.
812 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
814 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
815 (vfmal_lane_low<mode>_intrinsic,
816 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
817 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
818 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
819 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
820 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
821 vfmsl_lane_high<mode>_intrinsic): New define_insns.
823 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
825 * config/arm/arm-cpus.in (fp16fml): New feature.
826 (ALL_SIMD): Add fp16fml.
827 (armv8.2-a): Add fp16fml as an option.
828 (armv8.3-a): Likewise.
829 (armv8.4-a): Add fp16fml as part of fp16.
830 * config/arm/arm.h (TARGET_FP16FML): Define.
831 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
833 * config/arm/arm-modes.def (V2HF): Define.
834 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
835 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
836 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
837 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
838 vfmsl_low, vfmsl_high): New set of builtins.
839 * config/arm/iterators.md (PLUSMINUS): New code iterator.
840 (vfml_op): New code attribute.
841 (VFMLHALVES): New int iterator.
842 (VFML, VFMLSEL): New mode attributes.
843 (V_reg): Define mapping for V2HF.
844 (V_hi, V_lo): New mode attributes.
845 (VF_constraint): Likewise.
846 (vfml_half, vfml_half_selector): New int attributes.
847 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
849 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
850 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
852 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
853 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
854 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
855 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
857 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
858 Document new effective target and option set.
860 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
862 * config/arm/arm-cpus.in (armv8_4): New feature.
863 (ARMv8_4a): New fgroup.
864 (armv8.4-a): New arch.
865 * config/arm/arm-tables.opt: Regenerate.
866 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
867 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
868 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
869 Add matching rules for -march=armv8.4-a and extensions.
870 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
872 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
875 * config/rx/rx.md (BW): New mode attribute.
876 (sync_lock_test_and_setsi): Add mode suffix to insn output.
878 2018-01-11 Richard Biener <rguenther@suse.de>
880 PR tree-optimization/83435
881 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
882 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
883 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
885 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
886 Alan Hayward <alan.hayward@arm.com>
887 David Sherwood <david.sherwood@arm.com>
889 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
891 (aarch64_classify_address): Initialize it. Track polynomial offsets.
892 (aarch64_print_address_internal): Use it to check for a zero offset.
894 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
895 Alan Hayward <alan.hayward@arm.com>
896 David Sherwood <david.sherwood@arm.com>
898 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
899 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
900 Return a poly_int64 rather than a HOST_WIDE_INT.
901 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
902 rather than a HOST_WIDE_INT.
903 * config/aarch64/aarch64.h (aarch64_frame): Protect with
904 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
905 hard_fp_offset, frame_size, initial_adjust, callee_offset and
906 final_offset from HOST_WIDE_INT to poly_int64.
907 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
908 to_constant when getting the number of units in an Advanced SIMD
910 (aarch64_builtin_vectorized_function): Check for a constant number
912 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
914 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
915 attribute instead of GET_MODE_NUNITS.
916 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
917 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
918 GET_MODE_SIZE for fixed-size registers.
919 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
920 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
921 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
922 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
923 (aarch64_print_operand, aarch64_print_address_internal)
924 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
925 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
926 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
927 Handle polynomial GET_MODE_SIZE.
928 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
929 wider than SImode without modification.
930 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
931 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
932 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
933 passing and returning SVE modes.
934 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
936 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
937 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
938 (aarch64_allocate_and_probe_stack_space): Likewise.
939 (aarch64_layout_frame): Cope with polynomial offsets.
940 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
941 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
943 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
944 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
945 poly_int64 rather than a HOST_WIDE_INT.
946 (aarch64_get_separate_components, aarch64_process_components)
947 (aarch64_expand_prologue, aarch64_expand_epilogue)
948 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
949 (aarch64_anchor_offset): New function, split out from...
950 (aarch64_legitimize_address): ...here.
951 (aarch64_builtin_vectorization_cost): Handle polynomial
952 TYPE_VECTOR_SUBPARTS.
953 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
955 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
956 number of elements from the PARALLEL rather than the mode.
957 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
958 rather than GET_MODE_BITSIZE.
959 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
960 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
961 (aarch64_expand_vec_perm_const_1): Handle polynomial
962 d->perm.length () and d->perm elements.
963 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
964 Apply to_constant to d->perm elements.
965 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
966 polynomial CONST_VECTOR_NUNITS.
967 (aarch64_move_pointer): Take amount as a poly_int64 rather
969 (aarch64_progress_pointer): Avoid temporary variable.
970 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
971 the mode attribute instead of GET_MODE.
973 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
974 Alan Hayward <alan.hayward@arm.com>
975 David Sherwood <david.sherwood@arm.com>
977 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
978 x exists before using it.
979 (aarch64_add_constant_internal): Rename to...
980 (aarch64_add_offset_1): ...this. Replace regnum with separate
981 src and dest rtxes. Handle the case in which they're different,
982 including when the offset is zero. Replace scratchreg with an rtx.
983 Use 2 additions if there is no spare register into which we can
984 move a 16-bit constant.
985 (aarch64_add_constant): Delete.
986 (aarch64_add_offset): Replace reg with separate src and dest
987 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
988 Use aarch64_add_offset_1.
989 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
990 an rtx rather than an int. Take the delta as a poly_int64
991 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
992 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
993 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
994 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
995 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
997 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
998 aarch64_add_constant.
1000 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1002 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1003 Use scalar_float_mode.
1005 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1007 * config/aarch64/aarch64-simd.md
1008 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1009 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1010 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1011 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1012 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1013 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1014 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1015 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1016 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1017 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1019 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1022 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1023 targ_options->x_arm_arch_string is non NULL.
1025 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1027 * config/aarch64/aarch64.h
1028 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1030 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1033 * expmed.c (emit_store_flag_force): Swap if const op0
1034 and change VOIDmode to mode of op0.
1036 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1038 PR rtl-optimization/83761
1039 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1040 than bytes to mode_for_size.
1042 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1045 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1046 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1049 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1052 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1053 when in layout mode.
1054 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1055 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1058 2018-01-10 Michael Collison <michael.collison@arm.com>
1060 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1061 * config/aarch64/aarch64-option-extension.def: Add
1062 AARCH64_OPT_EXTENSION of 'fp16fml'.
1063 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1064 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1065 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1066 * config/aarch64/constraints.md (Ui7): New constraint.
1067 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1068 (VFMLA_SEL_W): Ditto.
1071 (VFMLA16_LOW): New int iterator.
1072 (VFMLA16_HIGH): Ditto.
1073 (UNSPEC_FMLAL): New unspec.
1074 (UNSPEC_FMLSL): Ditto.
1075 (UNSPEC_FMLAL2): Ditto.
1076 (UNSPEC_FMLSL2): Ditto.
1077 (f16mac): New code attribute.
1078 * config/aarch64/aarch64-simd-builtins.def
1079 (aarch64_fmlal_lowv2sf): Ditto.
1080 (aarch64_fmlsl_lowv2sf): Ditto.
1081 (aarch64_fmlalq_lowv4sf): Ditto.
1082 (aarch64_fmlslq_lowv4sf): Ditto.
1083 (aarch64_fmlal_highv2sf): Ditto.
1084 (aarch64_fmlsl_highv2sf): Ditto.
1085 (aarch64_fmlalq_highv4sf): Ditto.
1086 (aarch64_fmlslq_highv4sf): Ditto.
1087 (aarch64_fmlal_lane_lowv2sf): Ditto.
1088 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1089 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1090 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1091 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1092 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1093 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1094 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1095 (aarch64_fmlal_lane_highv2sf): Ditto.
1096 (aarch64_fmlsl_lane_highv2sf): Ditto.
1097 (aarch64_fmlal_laneq_highv2sf): Ditto.
1098 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1099 (aarch64_fmlalq_lane_highv4sf): Ditto.
1100 (aarch64_fmlsl_lane_highv4sf): Ditto.
1101 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1102 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1103 * config/aarch64/aarch64-simd.md:
1104 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1105 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1106 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1107 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1108 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1109 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1110 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1111 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1112 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1113 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1114 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1115 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1116 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1117 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1118 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1119 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1120 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1121 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1122 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1123 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1124 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1125 (vfmlsl_low_u32): Ditto.
1126 (vfmlalq_low_u32): Ditto.
1127 (vfmlslq_low_u32): Ditto.
1128 (vfmlal_high_u32): Ditto.
1129 (vfmlsl_high_u32): Ditto.
1130 (vfmlalq_high_u32): Ditto.
1131 (vfmlslq_high_u32): Ditto.
1132 (vfmlal_lane_low_u32): Ditto.
1133 (vfmlsl_lane_low_u32): Ditto.
1134 (vfmlal_laneq_low_u32): Ditto.
1135 (vfmlsl_laneq_low_u32): Ditto.
1136 (vfmlalq_lane_low_u32): Ditto.
1137 (vfmlslq_lane_low_u32): Ditto.
1138 (vfmlalq_laneq_low_u32): Ditto.
1139 (vfmlslq_laneq_low_u32): Ditto.
1140 (vfmlal_lane_high_u32): Ditto.
1141 (vfmlsl_lane_high_u32): Ditto.
1142 (vfmlal_laneq_high_u32): Ditto.
1143 (vfmlsl_laneq_high_u32): Ditto.
1144 (vfmlalq_lane_high_u32): Ditto.
1145 (vfmlslq_lane_high_u32): Ditto.
1146 (vfmlalq_laneq_high_u32): Ditto.
1147 (vfmlslq_laneq_high_u32): Ditto.
1148 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1149 (AARCH64_FL_FOR_ARCH8_4): New.
1150 (AARCH64_ISA_F16FML): New ISA flag.
1151 (TARGET_F16FML): New feature flag for fp16fml.
1152 (doc/invoke.texi): Document new fp16fml option.
1154 2018-01-10 Michael Collison <michael.collison@arm.com>
1156 * config/aarch64/aarch64-builtins.c:
1157 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1158 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1159 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1160 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1161 (AARCH64_ISA_SHA3): New ISA flag.
1162 (TARGET_SHA3): New feature flag for sha3.
1163 * config/aarch64/iterators.md (sha512_op): New int attribute.
1164 (CRYPTO_SHA512): New int iterator.
1165 (UNSPEC_SHA512H): New unspec.
1166 (UNSPEC_SHA512H2): Ditto.
1167 (UNSPEC_SHA512SU0): Ditto.
1168 (UNSPEC_SHA512SU1): Ditto.
1169 * config/aarch64/aarch64-simd-builtins.def
1170 (aarch64_crypto_sha512hqv2di): New builtin.
1171 (aarch64_crypto_sha512h2qv2di): Ditto.
1172 (aarch64_crypto_sha512su0qv2di): Ditto.
1173 (aarch64_crypto_sha512su1qv2di): Ditto.
1174 (aarch64_eor3qv8hi): Ditto.
1175 (aarch64_rax1qv2di): Ditto.
1176 (aarch64_xarqv2di): Ditto.
1177 (aarch64_bcaxqv8hi): Ditto.
1178 * config/aarch64/aarch64-simd.md:
1179 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1180 (aarch64_crypto_sha512su0qv2di): Ditto.
1181 (aarch64_crypto_sha512su1qv2di): Ditto.
1182 (aarch64_eor3qv8hi): Ditto.
1183 (aarch64_rax1qv2di): Ditto.
1184 (aarch64_xarqv2di): Ditto.
1185 (aarch64_bcaxqv8hi): Ditto.
1186 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1187 (vsha512h2q_u64): Ditto.
1188 (vsha512su0q_u64): Ditto.
1189 (vsha512su1q_u64): Ditto.
1190 (veor3q_u16): Ditto.
1191 (vrax1q_u64): Ditto.
1193 (vbcaxq_u16): Ditto.
1194 * config/arm/types.md (crypto_sha512): New type attribute.
1195 (crypto_sha3): Ditto.
1196 (doc/invoke.texi): Document new sha3 option.
1198 2018-01-10 Michael Collison <michael.collison@arm.com>
1200 * config/aarch64/aarch64-builtins.c:
1201 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1202 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1203 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1204 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1205 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1206 (AARCH64_ISA_SM4): New ISA flag.
1207 (TARGET_SM4): New feature flag for sm4.
1208 * config/aarch64/aarch64-simd-builtins.def
1209 (aarch64_sm3ss1qv4si): Ditto.
1210 (aarch64_sm3tt1aq4si): Ditto.
1211 (aarch64_sm3tt1bq4si): Ditto.
1212 (aarch64_sm3tt2aq4si): Ditto.
1213 (aarch64_sm3tt2bq4si): Ditto.
1214 (aarch64_sm3partw1qv4si): Ditto.
1215 (aarch64_sm3partw2qv4si): Ditto.
1216 (aarch64_sm4eqv4si): Ditto.
1217 (aarch64_sm4ekeyqv4si): Ditto.
1218 * config/aarch64/aarch64-simd.md:
1219 (aarch64_sm3ss1qv4si): Ditto.
1220 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1221 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1222 (aarch64_sm4eqv4si): Ditto.
1223 (aarch64_sm4ekeyqv4si): Ditto.
1224 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1225 (sm3part_op): Ditto.
1226 (CRYPTO_SM3TT): Ditto.
1227 (CRYPTO_SM3PART): Ditto.
1228 (UNSPEC_SM3SS1): New unspec.
1229 (UNSPEC_SM3TT1A): Ditto.
1230 (UNSPEC_SM3TT1B): Ditto.
1231 (UNSPEC_SM3TT2A): Ditto.
1232 (UNSPEC_SM3TT2B): Ditto.
1233 (UNSPEC_SM3PARTW1): Ditto.
1234 (UNSPEC_SM3PARTW2): Ditto.
1235 (UNSPEC_SM4E): Ditto.
1236 (UNSPEC_SM4EKEY): Ditto.
1237 * config/aarch64/constraints.md (Ui2): New constraint.
1238 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1239 * config/arm/types.md (crypto_sm3): New type attribute.
1240 (crypto_sm4): Ditto.
1241 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1242 (vsm3tt1aq_u32): Ditto.
1243 (vsm3tt1bq_u32): Ditto.
1244 (vsm3tt2aq_u32): Ditto.
1245 (vsm3tt2bq_u32): Ditto.
1246 (vsm3partw1q_u32): Ditto.
1247 (vsm3partw2q_u32): Ditto.
1248 (vsm4eq_u32): Ditto.
1249 (vsm4ekeyq_u32): Ditto.
1250 (doc/invoke.texi): Document new sm4 option.
1252 2018-01-10 Michael Collison <michael.collison@arm.com>
1254 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1255 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1256 (AARCH64_FL_FOR_ARCH8_4): New.
1257 (AARCH64_FL_V8_4): New flag.
1258 (doc/invoke.texi): Document new armv8.4-a option.
1260 2018-01-10 Michael Collison <michael.collison@arm.com>
1262 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1263 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1264 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1265 * config/aarch64/aarch64-option-extension.def: Add
1266 AARCH64_OPT_EXTENSION of 'sha2'.
1267 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1268 (crypto): Disable sha2 and aes if crypto disabled.
1269 (crypto): Enable aes and sha2 if enabled.
1270 (simd): Disable sha2 and aes if simd disabled.
1271 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1273 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1274 (TARGET_SHA2): New feature flag for sha2.
1275 (TARGET_AES): New feature flag for aes.
1276 * config/aarch64/aarch64-simd.md:
1277 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1278 conditional on TARGET_AES.
1279 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1280 (aarch64_crypto_sha1hsi): Make pattern conditional
1282 (aarch64_crypto_sha1hv4si): Ditto.
1283 (aarch64_be_crypto_sha1hv4si): Ditto.
1284 (aarch64_crypto_sha1su1v4si): Ditto.
1285 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1286 (aarch64_crypto_sha1su0v4si): Ditto.
1287 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1288 (aarch64_crypto_sha256su0v4si): Ditto.
1289 (aarch64_crypto_sha256su1v4si): Ditto.
1290 (doc/invoke.texi): Document new aes and sha2 options.
1292 2018-01-10 Martin Sebor <msebor@redhat.com>
1294 PR tree-optimization/83781
1295 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1298 2018-01-11 Martin Sebor <msebor@gmail.com>
1299 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1301 PR tree-optimization/83501
1302 PR tree-optimization/81703
1304 * tree-ssa-strlen.c (get_string_cst): Rename...
1305 (get_string_len): ...to this. Handle global constants.
1306 (handle_char_store): Adjust.
1308 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
1309 Jim Wilson <jimw@sifive.com>
1311 * config/riscv/riscv-protos.h (riscv_output_return): New.
1312 * config/riscv/riscv.c (struct machine_function): New naked_p field.
1313 (riscv_attribute_table, riscv_output_return),
1314 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1315 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1316 (riscv_compute_frame_info): Only compute frame->mask if not a naked
1318 (riscv_expand_prologue): Add early return for naked function.
1319 (riscv_expand_epilogue): Likewise.
1320 (riscv_function_ok_for_sibcall): Return false for naked function.
1321 (riscv_set_current_function): New.
1322 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1323 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1324 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1325 * doc/extend.texi (RISC-V Function Attributes): New.
1327 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
1329 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1330 check for 128-bit long double before checking TCmode.
1331 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1332 128-bit long doubles before checking TFmode or TCmode.
1333 (FLOAT128_IBM_P): Likewise.
1335 2018-01-10 Martin Sebor <msebor@redhat.com>
1337 PR tree-optimization/83671
1338 * builtins.c (c_strlen): Unconditionally return zero for the empty
1340 Use -Warray-bounds for warnings.
1341 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1342 for non-constant array indices with COMPONENT_REF, arrays of
1343 arrays, and pointers to arrays.
1344 (gimple_fold_builtin_strlen): Determine and set length range for
1345 non-constant character arrays.
1347 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
1350 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1353 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
1355 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1357 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1360 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1361 VECTOR_MEM_ALTIVEC_OR_VSX_P.
1362 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1363 indexed_or_indirect_operand predicate.
1364 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1365 (*vsx_le_perm_load_v8hi): Likewise.
1366 (*vsx_le_perm_load_v16qi): Likewise.
1367 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1368 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1369 (*vsx_le_perm_store_v8hi): Likewise.
1370 (*vsx_le_perm_store_v16qi): Likewise.
1371 (eight unnamed splitters): Likewise.
1373 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1375 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1376 * config/rs6000/emmintrin.h: Likewise.
1377 * config/rs6000/mmintrin.h: Likewise.
1378 * config/rs6000/xmmintrin.h: Likewise.
1380 2018-01-10 David Malcolm <dmalcolm@redhat.com>
1383 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1385 * tree.c (tree_nop_conversion): Return true for location wrapper
1387 (maybe_wrap_with_location): New function.
1388 (selftest::check_strip_nops): New function.
1389 (selftest::test_location_wrappers): New function.
1390 (selftest::tree_c_tests): Call it.
1391 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1392 (maybe_wrap_with_location): New decl.
1393 (EXPR_LOCATION_WRAPPER_P): New macro.
1394 (location_wrapper_p): New inline function.
1395 (tree_strip_any_location_wrapper): New inline function.
1397 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
1400 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1401 stack_realign_offset for the largest alignment of stack slot
1403 (ix86_find_max_used_stack_alignment): New function.
1404 (ix86_finalize_stack_frame_flags): Use it. Set
1405 max_used_stack_alignment if we don't realign stack.
1406 * config/i386/i386.h (machine_function): Add
1407 max_used_stack_alignment.
1409 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
1411 * config/arm/arm.opt (-mbranch-cost): New option.
1412 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
1415 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
1418 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
1419 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
1421 2018-01-10 Richard Biener <rguenther@suse.de>
1424 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
1425 early out so it also covers the case where we have a non-NULL
1428 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1430 PR tree-optimization/83753
1431 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
1432 for non-strided grouped accesses if the number of elements is 1.
1434 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1437 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
1438 * i386.h (TARGET_USE_GATHER): Define.
1439 * x86-tune.def (X86_TUNE_USE_GATHER): New.
1441 2018-01-10 Martin Liska <mliska@suse.cz>
1444 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
1445 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
1447 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
1448 CLEANUP_NO_PARTITIONING is not set.
1450 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1452 * doc/rtl.texi: Remove documentation of (const ...) wrappers
1453 for vectors, as a partial revert of r254296.
1454 * rtl.h (const_vec_p): Delete.
1455 (const_vec_duplicate_p): Don't test for vector CONSTs.
1456 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
1457 * expmed.c (make_tree): Likewise.
1460 * common.md (E, F): Use CONSTANT_P instead of checking for
1462 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
1463 checking for CONST_VECTOR.
1465 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1468 * predict.c (force_edge_cold): Handle in more sane way edges
1471 2018-01-09 Carl Love <cel@us.ibm.com>
1473 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
1475 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
1476 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
1477 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
1478 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
1479 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
1480 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
1481 * config/rs6000/rs6000-protos.h: Add extern defition for
1482 rs6000_generate_float2_double_code.
1483 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
1485 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
1486 (float2_v2df): Add define_expand.
1488 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
1491 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
1492 op_mode in the force_to_mode call.
1494 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1496 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
1497 instead of checking each element individually.
1498 (aarch64_evpc_uzp): Likewise.
1499 (aarch64_evpc_zip): Likewise.
1500 (aarch64_evpc_ext): Likewise.
1501 (aarch64_evpc_rev): Likewise.
1502 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
1503 instead of checking each element individually. Return true without
1505 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
1506 whether all selected elements come from the same input, instead of
1507 checking each element individually. Remove calls to gen_rtx_REG,
1508 start_sequence and end_sequence and instead assert that no rtl is
1511 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1513 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
1514 order of HIGH and CONST checks.
1516 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1518 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
1519 if the destination isn't an SSA_NAME.
1521 2018-01-09 Richard Biener <rguenther@suse.de>
1523 PR tree-optimization/83668
1524 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
1526 (canonicalize_loop_form): ... here, renamed from ...
1527 (canonicalize_loop_closed_ssa_form): ... this and amended to
1528 swap successor edges for loop exit blocks to make us use
1529 the RPO order we need for initial schedule generation.
1531 2018-01-09 Joseph Myers <joseph@codesourcery.com>
1533 PR tree-optimization/64811
1534 * match.pd: When optimizing comparisons with Inf, avoid
1535 introducing or losing exceptions from comparisons with NaN.
1537 2018-01-09 Martin Liska <mliska@suse.cz>
1540 * asan.c (shadow_mem_size): Add gcc_assert.
1542 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
1544 Don't save registers in main().
1547 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
1548 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
1549 * config/avr/avr.c (avr_set_current_function): Don't error if
1550 naked, OS_task or OS_main are specified at the same time.
1551 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
1553 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
1555 * common/config/avr/avr-common.c (avr_option_optimization_table):
1556 Switch on -mmain-is-OS_task for optimizing compilations.
1558 2018-01-09 Richard Biener <rguenther@suse.de>
1560 PR tree-optimization/83572
1561 * graphite.c: Include cfganal.h.
1562 (graphite_transform_loops): Connect infinite loops to exit
1563 and remove fake edges at the end.
1565 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1567 * ipa-inline.c (edge_badness): Revert accidental checkin.
1569 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1572 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
1573 symbols; not inline clones.
1575 2018-01-09 Jakub Jelinek <jakub@redhat.com>
1578 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
1579 hard registers. Formatting fixes.
1581 PR preprocessor/83722
1582 * gcc.c (try_generate_repro): Pass
1583 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
1584 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
1587 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
1588 Kito Cheng <kito.cheng@gmail.com>
1590 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
1591 (riscv_leaf_function_p): Delete.
1592 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
1594 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1596 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
1598 (do_ifelse): New function.
1599 (do_isel): New function.
1600 (do_sub3): New function.
1601 (do_add3): New function.
1602 (do_load_mask_compare): New function.
1603 (do_overlap_load_compare): New function.
1604 (expand_compare_loop): New function.
1605 (expand_block_compare): Call expand_compare_loop() when appropriate.
1606 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
1608 (-mblock-compare-inline-loop-limit): New option.
1610 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1613 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
1614 Reverse order of second and third operands in first alternative.
1615 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
1616 of first and second elements in UNSPEC_VPERMR vector.
1617 (altivec_expand_vec_perm_le): Likewise.
1619 2017-01-08 Jeff Law <law@redhat.com>
1621 PR rtl-optimizatin/81308
1622 * tree-switch-conversion.c (cfg_altered): New file scoped static.
1623 (process_switch): If group_case_labels makes a change, then set
1625 (pass_convert_switch::execute): If a switch is converted, then
1626 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
1628 PR rtl-optimization/81308
1629 * recog.c (split_all_insns): Conditionally cleanup the CFG after
1632 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
1634 PR target/83663 - Revert r255946
1635 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
1636 generation for cases where splatting a value is not useful.
1637 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
1638 across a vec_duplicate and a paradoxical subreg forming a vector
1639 mode to a vec_concat.
1641 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1643 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
1644 -march=armv8.3-a variants.
1645 * config/arm/t-multilib: Likewise.
1646 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
1648 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1650 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
1652 (cceq_ior_compare_complement): Give it a name so I can use it, and
1653 change boolean_or_operator predicate to boolean_operator so it can
1654 be used to generate a crand.
1655 (eqne): New code iterator.
1656 (bd/bd_neg): New code_attrs.
1657 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
1658 a single define_insn.
1659 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
1660 decrement (bdnzt/bdnzf/bdzt/bdzf).
1661 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
1662 with the new names of the branch decrement patterns, and added the
1663 names of the branch decrement conditional patterns.
1665 2018-01-08 Richard Biener <rguenther@suse.de>
1667 PR tree-optimization/83563
1668 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
1671 2018-01-08 Richard Biener <rguenther@suse.de>
1674 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
1676 2018-01-08 Richard Biener <rguenther@suse.de>
1678 PR tree-optimization/83685
1679 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
1680 references to abnormals.
1682 2018-01-08 Richard Biener <rguenther@suse.de>
1685 * dwarf2out.c (output_indirect_strings): Handle empty
1686 skeleton_debug_str_hash.
1687 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
1689 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1691 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
1692 (emit_store_direct): Likewise.
1693 (arc_trampoline_adjust_address): Likewise.
1694 (arc_asm_trampoline_template): New function.
1695 (arc_initialize_trampoline): Use asm_trampoline_template.
1696 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
1697 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
1698 * config/arc/arc.md (flush_icache): Delete pattern.
1700 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1702 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
1703 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
1706 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1709 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
1710 by not USED_FOR_TARGET.
1711 (make_pass_resolve_sw_modes): Likewise.
1713 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1715 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
1718 2018-01-08 Richard Biener <rguenther@suse.de>
1721 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
1723 2018-01-08 Richard Biener <rguenther@suse.de>
1726 * match.pd ((t * 2) / 2) -> t): Add missing :c.
1728 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
1731 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
1732 basic blocks with a small number of successors.
1733 (convert_control_dep_chain_into_preds): Improve handling of
1735 (dump_predicates): Split apart into...
1736 (dump_pred_chain): ...here...
1737 (dump_pred_info): ...and here.
1738 (can_one_predicate_be_invalidated_p): Add debugging printfs.
1739 (can_chain_union_be_invalidated_p): Improve check for invalidation
1741 (uninit_uses_cannot_happen): Avoid unnecessary if
1742 convert_control_dep_chain_into_preds yielded nothing.
1744 2018-01-06 Martin Sebor <msebor@redhat.com>
1746 PR tree-optimization/83640
1747 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
1748 subtracting negative offset from size.
1749 (builtin_access::overlap): Adjust offset bounds of the access to fall
1750 within the size of the object if possible.
1752 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
1754 PR rtl-optimization/83699
1755 * expmed.c (extract_bit_field_1): Restrict the vector usage of
1756 extract_bit_field_as_subreg to cases in which the extracted
1757 value is also a vector.
1759 * lra-constraints.c (process_alt_operands): Test for the equivalence
1760 substitutions when detecting a possible reload cycle.
1762 2018-01-06 Jakub Jelinek <jakub@redhat.com>
1765 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
1766 by default if flag_selective_schedling{,2}. Formatting fixes.
1768 PR rtl-optimization/83682
1769 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
1770 if it has non-VECTOR_MODE element mode.
1771 (vec_duplicate_p): Likewise.
1774 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
1775 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
1777 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1780 * config/i386/i386-builtin.def
1781 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
1782 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
1783 Require also OPTION_MASK_ISA_AVX512F in addition to
1784 OPTION_MASK_ISA_GFNI.
1785 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
1786 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
1787 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
1788 to OPTION_MASK_ISA_GFNI.
1789 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
1790 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
1791 OPTION_MASK_ISA_AVX512BW.
1792 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
1793 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
1794 addition to OPTION_MASK_ISA_GFNI.
1795 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
1796 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
1797 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
1798 to OPTION_MASK_ISA_GFNI.
1799 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
1800 a requirement for all ISAs rather than any of them with a few
1802 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
1804 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
1805 bitmasks to be enabled with 3 exceptions, instead of requiring any
1806 enabled ISA with lots of exceptions.
1807 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
1808 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
1809 Change avx512bw in isa attribute to avx512f.
1810 * config/i386/sgxintrin.h: Add license boilerplate.
1811 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
1812 to __AVX512F__ and __AVX512VL to __AVX512VL__.
1813 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
1814 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
1816 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
1817 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
1818 temporarily sse2 rather than sse if not enabled already.
1821 * config/i386/sse.md (VI248_VLBW): Rename to ...
1822 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
1823 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
1824 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
1825 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
1826 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
1827 mode iterator instead of VI248_VLBW.
1829 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
1831 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
1832 (record_modified): Skip clobbers; add debug output.
1833 (param_change_prob): Use sreal frequencies.
1835 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1837 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
1838 punt for user-aligned variables.
1840 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1842 * tree-chrec.c (chrec_contains_symbols): Return true for
1845 2018-01-05 Sudakshina Das <sudi.das@arm.com>
1848 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
1849 of (x|y) == x for BICS pattern.
1851 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1853 PR tree-optimization/83605
1854 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
1855 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
1858 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
1860 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
1861 * config/epiphany/rtems.h: New file.
1863 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1864 Uros Bizjak <ubizjak@gmail.com>
1867 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
1868 QIreg_operand instead of register_operand predicate.
1869 * config/i386/i386.c (ix86_rop_should_change_byte_p,
1870 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
1871 comments instead of -fmitigate[-_]rop.
1873 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1876 * cgraphunit.c (symbol_table::compile): Switch to text_section
1877 before calling assembly_start debug hook.
1878 * run-rtl-passes.c (run_rtl_passes): Likewise.
1881 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1883 * tree-vrp.c (extract_range_from_binary_expr_1): Check
1884 range_int_cst_p rather than !symbolic_range_p before calling
1885 extract_range_from_multiplicative_op_1.
1887 2017-01-04 Jeff Law <law@redhat.com>
1889 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
1890 redundant test in assertion.
1892 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1894 * doc/rtl.texi: Document machine_mode wrapper classes.
1896 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1898 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
1901 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1903 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
1904 the VEC_PERM_EXPR fold to fail.
1906 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1909 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
1910 to switched_sections.
1912 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1915 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
1918 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
1921 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
1922 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
1924 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1927 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
1928 is BLKmode and bitpos not zero or mode change is needed.
1930 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1933 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
1936 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
1939 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
1940 instead of MULT rtx. Update all corresponding splitters.
1942 (*ssub<modesuffix>): Ditto.
1944 (*cmp_sadd_di): Update split patterns.
1945 (*cmp_sadd_si): Ditto.
1946 (*cmp_sadd_sidi): Ditto.
1947 (*cmp_ssub_di): Ditto.
1948 (*cmp_ssub_si): Ditto.
1949 (*cmp_ssub_sidi): Ditto.
1950 * config/alpha/predicates.md (const23_operand): New predicate.
1951 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
1952 Look for ASHIFT, not MULT inner operand.
1953 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
1955 2018-01-04 Martin Liska <mliska@suse.cz>
1957 PR gcov-profile/83669
1958 * gcov.c (output_intermediate_file): Add version to intermediate
1960 * doc/gcov.texi: Document new field 'version' in intermediate
1961 file format. Fix location of '-k' option of gcov command.
1963 2018-01-04 Martin Liska <mliska@suse.cz>
1966 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
1968 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1970 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
1972 2018-01-03 Martin Sebor <msebor@redhat.com>
1974 PR tree-optimization/83655
1975 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
1976 checking calls with invalid arguments.
1978 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1980 * tree-vect-stmts.c (vect_get_store_rhs): New function.
1981 (vectorizable_mask_load_store): Delete.
1982 (vectorizable_call): Return false for masked loads and stores.
1983 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
1984 instead of gimple_assign_rhs1.
1985 (vectorizable_load): Handle IFN_MASK_LOAD.
1986 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
1988 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1990 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
1992 (vectorizable_mask_load_store): ...here.
1993 (vectorizable_load): ...and here.
1995 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1997 * tree-vect-stmts.c (vect_build_all_ones_mask)
1998 (vect_build_zero_merge_argument): New functions, split out from...
1999 (vectorizable_load): ...here.
2001 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2003 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2005 (vectorizable_mask_load_store): ...here.
2006 (vectorizable_store): ...and here.
2008 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2010 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2012 (vectorizable_mask_load_store): ...here.
2014 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2016 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2017 (vect_model_store_cost): Take a vec_load_store_type instead of a
2019 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2020 (vect_model_store_cost): Take a vec_load_store_type instead of a
2022 (vectorizable_mask_load_store): Update accordingly.
2023 (vectorizable_store): Likewise.
2024 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2026 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2028 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2029 IFN_MASK_LOAD calls here rather than...
2030 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2032 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2033 Alan Hayward <alan.hayward@arm.com>
2034 David Sherwood <david.sherwood@arm.com>
2036 * expmed.c (extract_bit_field_1): For vector extracts,
2037 fall back to extract_bit_field_as_subreg if vec_extract
2040 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2041 Alan Hayward <alan.hayward@arm.com>
2042 David Sherwood <david.sherwood@arm.com>
2044 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2045 they are variable or constant sized.
2046 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2047 slots for constant-sized data.
2049 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2050 Alan Hayward <alan.hayward@arm.com>
2051 David Sherwood <david.sherwood@arm.com>
2053 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2054 handling COND_EXPRs with boolean comparisons, try to find a better
2055 basis for the mask type than the boolean itself.
2057 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2059 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2060 is calculated and how it can be overridden.
2061 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2062 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2064 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2067 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2068 Alan Hayward <alan.hayward@arm.com>
2069 David Sherwood <david.sherwood@arm.com>
2071 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2072 Remove the mode argument.
2073 (aarch64_simd_valid_immediate): Remove the mode and inverse
2075 * config/aarch64/iterators.md (bitsize): New iterator.
2076 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2077 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2078 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2079 aarch64_simd_valid_immediate.
2080 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2081 (aarch64_reg_or_bic_imm): Likewise.
2082 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2083 with an insn_type enum and msl with a modifier_type enum.
2084 Replace element_width with a scalar_mode. Change the shift
2085 to unsigned int. Add constructors for scalar_float_mode and
2086 scalar_int_mode elements.
2087 (aarch64_vect_float_const_representable_p): Delete.
2088 (aarch64_can_const_movi_rtx_p)
2089 (aarch64_simd_scalar_immediate_valid_for_move)
2090 (aarch64_simd_make_constant): Update call to
2091 aarch64_simd_valid_immediate.
2092 (aarch64_advsimd_valid_immediate_hs): New function.
2093 (aarch64_advsimd_valid_immediate): Likewise.
2094 (aarch64_simd_valid_immediate): Remove mode and inverse
2095 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2096 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2097 and aarch64_float_const_representable_p on the result.
2098 (aarch64_output_simd_mov_immediate): Remove mode argument.
2099 Update call to aarch64_simd_valid_immediate and use of
2100 simd_immediate_info.
2101 (aarch64_output_scalar_simd_mov_immediate): Update call
2104 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2105 Alan Hayward <alan.hayward@arm.com>
2106 David Sherwood <david.sherwood@arm.com>
2108 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2109 (mode_nunits): Likewise CONST_MODE_NUNITS.
2110 * machmode.def (ADJUST_NUNITS): Document.
2111 * genmodes.c (mode_data::need_nunits_adj): New field.
2112 (blank_mode): Update accordingly.
2113 (adj_nunits): New variable.
2114 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2116 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2117 listed in adj_nunits.
2118 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2119 listed in adj_nunits. Don't emit case statements for such modes.
2120 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2121 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2122 nothing if adj_nunits is nonnull.
2123 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2124 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2125 (emit_mode_fbit): Update use of print_maybe_const_decl.
2126 (emit_move_size): Likewise. Treat the array as non-const
2128 (emit_mode_adjustments): Handle adj_nunits.
2130 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2132 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2133 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2134 (VECTOR_MODES): Use it.
2135 (make_vector_modes): Take the prefix as an argument.
2137 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2138 Alan Hayward <alan.hayward@arm.com>
2139 David Sherwood <david.sherwood@arm.com>
2141 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2142 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2143 for MODE_VECTOR_BOOL.
2144 * machmode.def (VECTOR_BOOL_MODE): Document.
2145 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2146 (make_vector_bool_mode): New function.
2147 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2149 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2150 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2152 * stor-layout.c (int_mode_for_mode): Likewise.
2153 * tree.c (build_vector_type_for_mode): Likewise.
2154 * varasm.c (output_constant_pool_2): Likewise.
2155 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2156 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2157 for MODE_VECTOR_BOOL.
2158 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2159 of mode class checks.
2160 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2161 instead of a list of mode class checks.
2162 (expand_vector_scalar_condition): Likewise.
2163 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2165 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2166 Alan Hayward <alan.hayward@arm.com>
2167 David Sherwood <david.sherwood@arm.com>
2169 * machmode.h (mode_size): Change from unsigned short to
2171 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2172 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2173 or if measurement_type is not polynomial.
2174 (fixed_size_mode::includes_p): Check for constant-sized modes.
2175 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2176 return a poly_uint16 rather than an unsigned short.
2177 (emit_mode_size): Change the type of mode_size from unsigned short
2178 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2179 (emit_mode_adjustments): Cope with polynomial vector sizes.
2180 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2182 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2184 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2185 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2186 * caller-save.c (setup_save_areas): Likewise.
2187 (replace_reg_with_saved_mem): Likewise.
2188 * calls.c (emit_library_call_value_1): Likewise.
2189 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2190 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2191 (gen_lowpart_for_combine): Likewise.
2192 * convert.c (convert_to_integer_1): Likewise.
2193 * cse.c (equiv_constant, cse_insn): Likewise.
2194 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2195 (cselib_subst_to_values): Likewise.
2196 * dce.c (word_dce_process_block): Likewise.
2197 * df-problems.c (df_word_lr_mark_ref): Likewise.
2198 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2199 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2200 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2201 (rtl_for_decl_location): Likewise.
2202 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2203 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2204 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2205 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2206 (expand_expr_real_1): Likewise.
2207 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2208 (pad_below): Likewise.
2209 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2210 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2211 * ira.c (get_subreg_tracking_sizes): Likewise.
2212 * ira-build.c (ira_create_allocno_objects): Likewise.
2213 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2214 (ira_sort_regnos_for_alter_reg): Likewise.
2215 * ira-costs.c (record_operand_costs): Likewise.
2216 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2217 (resolve_simple_move): Likewise.
2218 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2219 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2220 (lra_constraints): Likewise.
2221 (CONST_POOL_OK_P): Reject variable-sized modes.
2222 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2223 (add_pseudo_to_slot, lra_spill): Likewise.
2224 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2225 * optabs-query.c (get_best_extraction_insn): Likewise.
2226 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2227 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2228 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2229 * recog.c (offsettable_address_addr_space_p): Likewise.
2230 * regcprop.c (maybe_mode_change): Likewise.
2231 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2232 * regrename.c (build_def_use): Likewise.
2233 * regstat.c (dump_reg_info): Likewise.
2234 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2235 (find_reloads, find_reloads_subreg_address): Likewise.
2236 * reload1.c (eliminate_regs_1): Likewise.
2237 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2238 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2239 (simplify_binary_operation_1, simplify_subreg): Likewise.
2240 * targhooks.c (default_function_arg_padding): Likewise.
2241 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2242 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2243 (verify_gimple_assign_ternary): Likewise.
2244 * tree-inline.c (estimate_move_cost): Likewise.
2245 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2246 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2247 (get_address_cost_ainc): Likewise.
2248 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2249 (vect_supportable_dr_alignment): Likewise.
2250 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2251 (vectorizable_reduction): Likewise.
2252 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2253 (vectorizable_operation, vectorizable_load): Likewise.
2254 * tree.c (build_same_sized_truth_vector_type): Likewise.
2255 * valtrack.c (cleanup_auto_inc_dec): Likewise.
2256 * var-tracking.c (emit_note_insn_var_location): Likewise.
2257 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2258 (ADDR_VEC_ALIGN): Likewise.
2260 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2261 Alan Hayward <alan.hayward@arm.com>
2262 David Sherwood <david.sherwood@arm.com>
2264 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2266 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2267 or if measurement_type is polynomial.
2268 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2269 * combine.c (make_extraction): Likewise.
2270 * dse.c (find_shift_sequence): Likewise.
2271 * dwarf2out.c (mem_loc_descriptor): Likewise.
2272 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2273 (extract_bit_field, extract_low_bits): Likewise.
2274 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2275 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2276 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2277 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2278 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2279 * reload.c (find_reloads): Likewise.
2280 * reload1.c (alter_reg): Likewise.
2281 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2282 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2283 * tree-if-conv.c (predicate_mem_writes): Likewise.
2284 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2285 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2286 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2287 * valtrack.c (dead_debug_insert_temp): Likewise.
2288 * varasm.c (mergeable_constant_section): Likewise.
2289 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2291 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2292 Alan Hayward <alan.hayward@arm.com>
2293 David Sherwood <david.sherwood@arm.com>
2295 * expr.c (expand_assignment): Cope with polynomial mode sizes
2296 when assigning to a CONCAT.
2298 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2299 Alan Hayward <alan.hayward@arm.com>
2300 David Sherwood <david.sherwood@arm.com>
2302 * machmode.h (mode_precision): Change from unsigned short to
2304 (mode_to_precision): Return a poly_uint16 rather than an unsigned
2306 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2307 or if measurement_type is not polynomial.
2308 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
2309 in which the mode is already known to be a scalar_int_mode.
2310 * genmodes.c (emit_mode_precision): Change the type of mode_precision
2311 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
2313 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2314 for GET_MODE_PRECISION.
2315 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2316 for GET_MODE_PRECISION.
2317 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2319 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2320 (expand_field_assignment, make_extraction): Likewise.
2321 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2322 (get_last_value): Likewise.
2323 * convert.c (convert_to_integer_1): Likewise.
2324 * cse.c (cse_insn): Likewise.
2325 * expr.c (expand_expr_real_1): Likewise.
2326 * lra-constraints.c (simplify_operand_subreg): Likewise.
2327 * optabs-query.c (can_atomic_load_p): Likewise.
2328 * optabs.c (expand_atomic_load): Likewise.
2329 (expand_atomic_store): Likewise.
2330 * ree.c (combine_reaching_defs): Likewise.
2331 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2332 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2333 * tree.h (type_has_mode_precision_p): Likewise.
2334 * ubsan.c (instrument_si_overflow): Likewise.
2336 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2337 Alan Hayward <alan.hayward@arm.com>
2338 David Sherwood <david.sherwood@arm.com>
2340 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2341 polynomial numbers of units.
2342 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2343 (valid_vector_subparts_p): New function.
2344 (build_vector_type): Remove temporary shim and take the number
2345 of units as a poly_uint64 rather than an int.
2346 (build_opaque_vector_type): Take the number of units as a
2347 poly_uint64 rather than an int.
2348 * tree.c (build_vector_from_ctor): Handle polynomial
2349 TYPE_VECTOR_SUBPARTS.
2350 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2351 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2352 (build_vector_from_val): If the number of units is variable,
2353 use build_vec_duplicate_cst for constant operands and
2354 VEC_DUPLICATE_EXPR otherwise.
2355 (make_vector_type): Remove temporary is_constant ().
2356 (build_vector_type, build_opaque_vector_type): Take the number of
2357 units as a poly_uint64 rather than an int.
2358 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2360 * cfgexpand.c (expand_debug_expr): Likewise.
2361 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2362 (store_constructor, expand_expr_real_1): Likewise.
2363 (const_scalar_mask_from_tree): Likewise.
2364 * fold-const-call.c (fold_const_reduction): Likewise.
2365 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2366 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2367 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2368 (fold_relational_const): Likewise.
2369 (native_interpret_vector): Likewise. Change the size from an
2370 int to an unsigned int.
2371 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2372 TYPE_VECTOR_SUBPARTS.
2373 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2374 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2375 duplicating a non-constant operand into a variable-length vector.
2376 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2377 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2378 * ipa-icf.c (sem_variable::equals): Likewise.
2379 * match.pd: Likewise.
2380 * omp-simd-clone.c (simd_clone_subparts): Likewise.
2381 * print-tree.c (print_node): Likewise.
2382 * stor-layout.c (layout_type): Likewise.
2383 * targhooks.c (default_builtin_vectorization_cost): Likewise.
2384 * tree-cfg.c (verify_gimple_comparison): Likewise.
2385 (verify_gimple_assign_binary): Likewise.
2386 (verify_gimple_assign_ternary): Likewise.
2387 (verify_gimple_assign_single): Likewise.
2388 * tree-pretty-print.c (dump_generic_node): Likewise.
2389 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2390 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2391 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2392 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2393 (vect_shift_permute_load_chain): Likewise.
2394 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2395 (expand_vector_condition, optimize_vector_constructor): Likewise.
2396 (lower_vec_perm, get_compute_type): Likewise.
2397 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2398 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2399 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2400 (vect_recog_mask_conversion_pattern): Likewise.
2401 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2402 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2403 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2404 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2405 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2406 (vectorizable_shift, vectorizable_operation, vectorizable_store)
2407 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2408 (supportable_widening_operation): Likewise.
2409 (supportable_narrowing_operation): Likewise.
2410 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2412 * varasm.c (output_constant): Likewise.
2414 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2415 Alan Hayward <alan.hayward@arm.com>
2416 David Sherwood <david.sherwood@arm.com>
2418 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
2419 so that both the length == 3 and length != 3 cases set up their
2420 own permute vectors. Add comments explaining why we know the
2421 number of elements is constant.
2422 (vect_permute_load_chain): Likewise.
2424 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2425 Alan Hayward <alan.hayward@arm.com>
2426 David Sherwood <david.sherwood@arm.com>
2428 * machmode.h (mode_nunits): Change from unsigned char to
2430 (ONLY_FIXED_SIZE_MODES): New macro.
2431 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
2432 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
2433 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
2435 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
2436 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
2437 or if measurement_type is not polynomial.
2438 * genmodes.c (ZERO_COEFFS): New macro.
2439 (emit_mode_nunits_inline): Make mode_nunits_inline return a
2441 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
2442 Use ZERO_COEFFS when emitting initializers.
2443 * data-streamer.h (bp_pack_poly_value): New function.
2444 (bp_unpack_poly_value): Likewise.
2445 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2446 for GET_MODE_NUNITS.
2447 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2448 for GET_MODE_NUNITS.
2449 * tree.c (make_vector_type): Remove temporary shim and make
2450 the real function take the number of units as a poly_uint64
2452 (build_vector_type_for_mode): Handle polynomial nunits.
2453 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
2454 * emit-rtl.c (const_vec_series_p_1): Likewise.
2455 (gen_rtx_CONST_VECTOR): Likewise.
2456 * fold-const.c (test_vec_duplicate_folding): Likewise.
2457 * genrecog.c (validate_pattern): Likewise.
2458 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
2459 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2460 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
2461 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
2462 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
2463 * rtlanal.c (subreg_get_info): Likewise.
2464 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2465 (vect_grouped_load_supported): Likewise.
2466 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
2467 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
2468 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
2469 (simplify_const_unary_operation, simplify_binary_operation_1)
2470 (simplify_const_binary_operation, simplify_ternary_operation)
2471 (test_vector_ops_duplicate, test_vector_ops): Likewise.
2472 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
2473 instead of CONST_VECTOR_NUNITS.
2474 * varasm.c (output_constant_pool_2): Likewise.
2475 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
2476 explicit-encoded elements in the XVEC for variable-length vectors.
2478 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2480 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
2482 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2483 Alan Hayward <alan.hayward@arm.com>
2484 David Sherwood <david.sherwood@arm.com>
2486 * coretypes.h (fixed_size_mode): Declare.
2487 (fixed_size_mode_pod): New typedef.
2488 * builtins.h (target_builtins::x_apply_args_mode)
2489 (target_builtins::x_apply_result_mode): Change type to
2490 fixed_size_mode_pod.
2491 * builtins.c (apply_args_size, apply_result_size, result_vector)
2492 (expand_builtin_apply_args_1, expand_builtin_apply)
2493 (expand_builtin_return): Update accordingly.
2495 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2497 * cse.c (hash_rtx_cb): Hash only the encoded elements.
2498 * cselib.c (cselib_hash_rtx): Likewise.
2499 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
2500 CONST_VECTOR encoding.
2502 2017-01-03 Jakub Jelinek <jakub@redhat.com>
2503 Jeff Law <law@redhat.com>
2506 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
2507 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
2508 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
2509 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
2512 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
2513 explicitly probe *sp in a noreturn function if there were any callee
2514 register saves or frame pointer is needed.
2516 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2519 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
2520 BLKmode for ternary, binary or unary expressions.
2523 * var-tracking.c (delete_vta_debug_insn): New inline function.
2524 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
2525 insns from get_insns () to NULL instead of each bb separately.
2526 Use delete_vta_debug_insn. No longer static.
2527 (vt_debug_insns_local, variable_tracking_main_1): Adjust
2528 delete_vta_debug_insns callers.
2529 * rtl.h (delete_vta_debug_insns): Declare.
2530 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
2531 instead of variable_tracking_main.
2533 2018-01-03 Martin Sebor <msebor@redhat.com>
2535 PR tree-optimization/83603
2536 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
2537 arguments past the endof the argument list in functions declared
2538 without a prototype.
2539 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
2540 Avoid checking when arguments are null.
2542 2018-01-03 Martin Sebor <msebor@redhat.com>
2545 * doc/extend.texi (attribute const): Fix a typo.
2546 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
2547 issuing -Wsuggest-attribute for void functions.
2549 2018-01-03 Martin Sebor <msebor@redhat.com>
2551 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
2552 offset_int::from instead of wide_int::to_shwi.
2553 (maybe_diag_overlap): Remove assertion.
2554 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
2555 * gimple-ssa-sprintf.c (format_directive): Same.
2556 (parse_directive): Same.
2557 (sprintf_dom_walker::compute_format_length): Same.
2558 (try_substitute_return_value): Same.
2560 2017-01-03 Jeff Law <law@redhat.com>
2563 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
2564 non-constant residual for zero at runtime and avoid probing in
2565 that case. Reorganize code for trailing problem to mirror handling
2568 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2570 PR tree-optimization/83501
2571 * tree-ssa-strlen.c (get_string_cst): New.
2572 (handle_char_store): Call get_string_cst.
2574 2018-01-03 Martin Liska <mliska@suse.cz>
2576 PR tree-optimization/83593
2577 * tree-ssa-strlen.c: Include tree-cfg.h.
2578 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
2579 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
2580 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
2582 (strlen_dom_walker::before_dom_children): Call
2583 gimple_purge_dead_eh_edges. Dump tranformation with details
2585 (strlen_dom_walker::before_dom_children): Update call by adding
2586 new argument cleanup_eh.
2587 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
2589 2018-01-03 Martin Liska <mliska@suse.cz>
2592 * cif-code.def (VARIADIC_THUNK): New enum value.
2593 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
2596 2018-01-03 Jan Beulich <jbeulich@suse.com>
2598 * sse.md (mov<mode>_internal): Tighten condition for when to use
2599 vmovdqu<ssescalarsize> for TI and OI modes.
2601 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2603 Update copyright years.
2605 2018-01-03 Martin Liska <mliska@suse.cz>
2608 * ipa-visibility.c (function_and_variable_visibility): Skip
2609 functions with noipa attribure.
2611 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2613 * gcc.c (process_command): Update copyright notice dates.
2614 * gcov-dump.c (print_version): Ditto.
2615 * gcov.c (print_version): Ditto.
2616 * gcov-tool.c (print_version): Ditto.
2617 * gengtype.c (create_file): Ditto.
2618 * doc/cpp.texi: Bump @copying's copyright year.
2619 * doc/cppinternals.texi: Ditto.
2620 * doc/gcc.texi: Ditto.
2621 * doc/gccint.texi: Ditto.
2622 * doc/gcov.texi: Ditto.
2623 * doc/install.texi: Ditto.
2624 * doc/invoke.texi: Ditto.
2626 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2628 * vector-builder.h (vector_builder::m_full_nelts): Change from
2629 unsigned int to poly_uint64.
2630 (vector_builder::full_nelts): Update prototype accordingly.
2631 (vector_builder::new_vector): Likewise.
2632 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
2633 (vector_builder::operator ==): Likewise.
2634 (vector_builder::finalize): Likewise.
2635 * int-vector-builder.h (int_vector_builder::int_vector_builder):
2636 Take the number of elements as a poly_uint64 rather than an
2638 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
2639 from unsigned int to poly_uint64.
2640 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
2641 (vec_perm_indices::new_vector): Likewise.
2642 (vec_perm_indices::length): Likewise.
2643 (vec_perm_indices::nelts_per_input): Likewise.
2644 (vec_perm_indices::input_nelts): Likewise.
2645 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
2646 number of elements per input as a poly_uint64 rather than an
2647 unsigned int. Use the original encoding for variable-length
2648 vectors, rather than clamping each individual element.
2649 For the second and subsequent elements in each pattern,
2650 clamp the step and base before clamping their sum.
2651 (vec_perm_indices::series_p): Handle polynomial element counts.
2652 (vec_perm_indices::all_in_range_p): Likewise.
2653 (vec_perm_indices_to_tree): Likewise.
2654 (vec_perm_indices_to_rtx): Likewise.
2655 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
2656 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
2657 (tree_vector_builder::new_binary_operation): Handle polynomial
2658 element counts. Return false if we need to know the number
2659 of elements at compile time.
2660 * fold-const.c (fold_vec_perm): Punt if the number of elements
2661 isn't known at compile time.
2663 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2665 * vec-perm-indices.h (vec_perm_builder): Change element type
2666 from HOST_WIDE_INT to poly_int64.
2667 (vec_perm_indices::element_type): Update accordingly.
2668 (vec_perm_indices::clamp): Handle polynomial element_types.
2669 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
2670 (vec_perm_indices::all_in_range_p): Likewise.
2671 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
2673 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
2674 polynomial vec_perm_indices element types.
2675 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
2676 * fold-const.c (fold_vec_perm): Likewise.
2677 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
2678 * tree-vect-generic.c (lower_vec_perm): Likewise.
2679 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
2680 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
2681 element type to HOST_WIDE_INT.
2683 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2684 Alan Hayward <alan.hayward@arm.com>
2685 David Sherwood <david.sherwood@arm.com>
2687 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
2688 rather than an int. Use plus_constant.
2689 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
2690 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
2692 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2693 Alan Hayward <alan.hayward@arm.com>
2694 David Sherwood <david.sherwood@arm.com>
2696 * calls.c (emit_call_1, expand_call): Change struct_value_size from
2697 a HOST_WIDE_INT to a poly_int64.
2699 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2700 Alan Hayward <alan.hayward@arm.com>
2701 David Sherwood <david.sherwood@arm.com>
2703 * calls.c (load_register_parameters): Cope with polynomial
2704 mode sizes. Require a constant size for BLKmode parameters
2705 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
2706 forces a parameter to be padded at the lsb end in order to
2707 fill a complete number of words, require the parameter size
2708 to be ordered wrt UNITS_PER_WORD.
2710 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2711 Alan Hayward <alan.hayward@arm.com>
2712 David Sherwood <david.sherwood@arm.com>
2714 * reload1.c (spill_stack_slot_width): Change element type
2715 from unsigned int to poly_uint64_pod.
2716 (alter_reg): Treat mode sizes as polynomial.
2718 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2719 Alan Hayward <alan.hayward@arm.com>
2720 David Sherwood <david.sherwood@arm.com>
2722 * reload.c (complex_word_subreg_p): New function.
2723 (reload_inner_reg_of_subreg, push_reload): Use it.
2725 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2726 Alan Hayward <alan.hayward@arm.com>
2727 David Sherwood <david.sherwood@arm.com>
2729 * lra-constraints.c (process_alt_operands): Reject matched
2730 operands whose sizes aren't ordered.
2731 (match_reload): Refer to this check here.
2733 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2734 Alan Hayward <alan.hayward@arm.com>
2735 David Sherwood <david.sherwood@arm.com>
2737 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
2738 that the mode size is in the set {1, 2, 4, 8, 16}.
2740 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2741 Alan Hayward <alan.hayward@arm.com>
2742 David Sherwood <david.sherwood@arm.com>
2744 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
2745 Use plus_constant instead of gen_rtx_PLUS.
2747 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2748 Alan Hayward <alan.hayward@arm.com>
2749 David Sherwood <david.sherwood@arm.com>
2751 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
2752 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
2753 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
2754 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
2755 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
2756 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
2757 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
2758 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
2759 * config/i386/i386.c (ix86_push_rounding): ...this new function.
2760 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
2762 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
2763 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
2764 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
2765 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
2766 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
2767 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
2768 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
2769 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
2770 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
2771 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
2773 * expr.c (emit_move_resolve_push): Treat the input and result
2774 of PUSH_ROUNDING as a poly_int64.
2775 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
2776 (emit_push_insn): Likewise.
2777 * lra-eliminations.c (mark_not_eliminable): Likewise.
2778 * recog.c (push_operand): Likewise.
2779 * reload1.c (elimination_effects): Likewise.
2780 * rtlanal.c (nonzero_bits1): Likewise.
2781 * calls.c (store_one_arg): Likewise. Require the padding to be
2782 known at compile time.
2784 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2785 Alan Hayward <alan.hayward@arm.com>
2786 David Sherwood <david.sherwood@arm.com>
2788 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
2789 Use plus_constant instead of gen_rtx_PLUS.
2791 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2792 Alan Hayward <alan.hayward@arm.com>
2793 David Sherwood <david.sherwood@arm.com>
2795 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
2798 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2799 Alan Hayward <alan.hayward@arm.com>
2800 David Sherwood <david.sherwood@arm.com>
2802 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
2803 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
2804 via stack temporaries. Treat the mode size as polynomial too.
2806 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2807 Alan Hayward <alan.hayward@arm.com>
2808 David Sherwood <david.sherwood@arm.com>
2810 * expr.c (expand_expr_real_2): When handling conversions involving
2811 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
2812 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
2813 as a poly_uint64 too.
2815 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2816 Alan Hayward <alan.hayward@arm.com>
2817 David Sherwood <david.sherwood@arm.com>
2819 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
2821 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2822 Alan Hayward <alan.hayward@arm.com>
2823 David Sherwood <david.sherwood@arm.com>
2825 * combine.c (can_change_dest_mode): Handle polynomial
2826 REGMODE_NATURAL_SIZE.
2827 * expmed.c (store_bit_field_1): Likewise.
2828 * expr.c (store_constructor): Likewise.
2829 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
2830 and polynomial REGMODE_NATURAL_SIZE.
2831 (gen_lowpart_common): Likewise.
2832 * reginfo.c (record_subregs_of_mode): Likewise.
2833 * rtlanal.c (read_modify_subreg_p): Likewise.
2835 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2836 Alan Hayward <alan.hayward@arm.com>
2837 David Sherwood <david.sherwood@arm.com>
2839 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
2840 numbers of elements.
2842 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2843 Alan Hayward <alan.hayward@arm.com>
2844 David Sherwood <david.sherwood@arm.com>
2846 * match.pd: Cope with polynomial numbers of vector elements.
2848 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2849 Alan Hayward <alan.hayward@arm.com>
2850 David Sherwood <david.sherwood@arm.com>
2852 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
2853 in a POINTER_PLUS_EXPR.
2855 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2856 Alan Hayward <alan.hayward@arm.com>
2857 David Sherwood <david.sherwood@arm.com>
2859 * omp-simd-clone.c (simd_clone_subparts): New function.
2860 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
2861 (ipa_simd_modify_function_body): Likewise.
2863 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2864 Alan Hayward <alan.hayward@arm.com>
2865 David Sherwood <david.sherwood@arm.com>
2867 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
2868 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
2869 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
2870 (expand_vector_condition, vector_element): Likewise.
2871 (subparts_gt): New function.
2872 (get_compute_type): Use subparts_gt.
2873 (count_type_subparts): Delete.
2874 (expand_vector_operations_1): Use subparts_gt instead of
2875 count_type_subparts.
2877 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2878 Alan Hayward <alan.hayward@arm.com>
2879 David Sherwood <david.sherwood@arm.com>
2881 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
2882 (vect_compile_time_alias): ...this new function. Do the calculation
2883 on poly_ints rather than trees.
2884 (vect_prune_runtime_alias_test_list): Update call accordingly.
2886 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2887 Alan Hayward <alan.hayward@arm.com>
2888 David Sherwood <david.sherwood@arm.com>
2890 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
2892 (vect_schedule_slp_instance): Likewise.
2894 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2895 Alan Hayward <alan.hayward@arm.com>
2896 David Sherwood <david.sherwood@arm.com>
2898 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
2899 constant and extern definitions for variable-length vectors.
2900 (vect_get_constant_vectors): Note that the number of units
2901 is known to be constant.
2903 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2904 Alan Hayward <alan.hayward@arm.com>
2905 David Sherwood <david.sherwood@arm.com>
2907 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
2908 of units as polynomial. Choose between WIDE and NARROW based
2911 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2912 Alan Hayward <alan.hayward@arm.com>
2913 David Sherwood <david.sherwood@arm.com>
2915 * tree-vect-stmts.c (simd_clone_subparts): New function.
2916 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
2918 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2919 Alan Hayward <alan.hayward@arm.com>
2920 David Sherwood <david.sherwood@arm.com>
2922 * tree-vect-stmts.c (vectorizable_call): Treat the number of
2923 vectors as polynomial. Use build_index_vector for
2926 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2927 Alan Hayward <alan.hayward@arm.com>
2928 David Sherwood <david.sherwood@arm.com>
2930 * tree-vect-stmts.c (get_load_store_type): Treat the number of
2931 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
2932 for variable-length vectors.
2933 (vectorizable_mask_load_store): Treat the number of units as
2934 polynomial, asserting that it is constant if the condition has
2935 already been enforced.
2936 (vectorizable_store, vectorizable_load): Likewise.
2938 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2939 Alan Hayward <alan.hayward@arm.com>
2940 David Sherwood <david.sherwood@arm.com>
2942 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
2943 of units as polynomial. Punt if we can't tell at compile time
2944 which vector contains the final result.
2946 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2947 Alan Hayward <alan.hayward@arm.com>
2948 David Sherwood <david.sherwood@arm.com>
2950 * tree-vect-loop.c (vectorizable_induction): Treat the number
2951 of units as polynomial. Punt on SLP inductions. Use an integer
2952 VEC_SERIES_EXPR for variable-length integer reductions. Use a
2953 cast of such a series for variable-length floating-point
2956 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2957 Alan Hayward <alan.hayward@arm.com>
2958 David Sherwood <david.sherwood@arm.com>
2960 * tree.h (build_index_vector): Declare.
2961 * tree.c (build_index_vector): New function.
2962 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
2963 of units as polynomial, forcibly converting it to a constant if
2964 vectorizable_reduction has already enforced the condition.
2965 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
2966 to create a {1,2,3,...} vector.
2967 (vectorizable_reduction): Treat the number of units as polynomial.
2968 Choose vectype_in based on the largest scalar element size rather
2969 than the smallest number of units. Enforce the restrictions
2972 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2973 Alan Hayward <alan.hayward@arm.com>
2974 David Sherwood <david.sherwood@arm.com>
2976 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
2977 number of units as polynomial.
2979 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2980 Alan Hayward <alan.hayward@arm.com>
2981 David Sherwood <david.sherwood@arm.com>
2983 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
2984 * target.def (autovectorize_vector_sizes): Return the vector sizes
2985 by pointer, using vector_sizes rather than a bitmask.
2986 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
2987 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
2988 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
2990 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
2991 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
2992 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
2993 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
2994 * omp-general.c (omp_max_vf): Likewise.
2995 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2996 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
2997 * tree-vect-loop.c (vect_analyze_loop): Likewise.
2998 * tree-vect-slp.c (vect_slp_bb): Likewise.
2999 * doc/tm.texi: Regenerate.
3000 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3002 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3003 the vector size as a poly_uint64 rather than an unsigned int.
3004 (current_vector_size): Change from an unsigned int to a poly_uint64.
3005 (get_vectype_for_scalar_type): Update accordingly.
3006 * tree.h (build_truth_vector_type): Take the size and number of
3007 units as a poly_uint64 rather than an unsigned int.
3008 (build_vector_type): Add a temporary overload that takes
3009 the number of units as a poly_uint64 rather than an unsigned int.
3010 * tree.c (make_vector_type): Likewise.
3011 (build_truth_vector_type): Take the number of units as a poly_uint64
3012 rather than an unsigned int.
3014 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3015 Alan Hayward <alan.hayward@arm.com>
3016 David Sherwood <david.sherwood@arm.com>
3018 * target.def (get_mask_mode): Take the number of units and length
3019 as poly_uint64s rather than unsigned ints.
3020 * targhooks.h (default_get_mask_mode): Update accordingly.
3021 * targhooks.c (default_get_mask_mode): Likewise.
3022 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3023 * doc/tm.texi: Regenerate.
3025 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3026 Alan Hayward <alan.hayward@arm.com>
3027 David Sherwood <david.sherwood@arm.com>
3029 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3030 * omp-general.c (omp_max_vf): Likewise.
3031 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3032 (expand_omp_simd): Handle polynomial safelen.
3033 * omp-low.c (omplow_simd_context): Add a default constructor.
3034 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3035 (lower_rec_simd_input_clauses): Update accordingly.
3036 (lower_rec_input_clauses): Likewise.
3038 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3039 Alan Hayward <alan.hayward@arm.com>
3040 David Sherwood <david.sherwood@arm.com>
3042 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3043 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3044 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3045 (vect_analyze_slp_cost): Likewise.
3046 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3047 (vect_model_load_cost): Likewise.
3049 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3050 Alan Hayward <alan.hayward@arm.com>
3051 David Sherwood <david.sherwood@arm.com>
3053 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3054 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3055 from an unsigned int * to a poly_uint64_pod *.
3056 (calculate_unrolling_factor): New function.
3057 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3059 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3060 Alan Hayward <alan.hayward@arm.com>
3061 David Sherwood <david.sherwood@arm.com>
3063 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3064 from an unsigned int to a poly_uint64.
3065 (_loop_vec_info::slp_unrolling_factor): Likewise.
3066 (_loop_vec_info::vectorization_factor): Change from an int
3068 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3069 (vect_get_num_vectors): New function.
3070 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3071 (vect_get_num_copies): Use vect_get_num_vectors.
3072 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3073 to an unsigned int *.
3074 (vect_analyze_data_refs): Change min_vf from an int * to a
3076 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3077 than an unsigned HOST_WIDE_INT.
3078 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3079 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3080 to an unsigned int *.
3081 (vect_analyze_data_ref_dependences): Likewise.
3082 (vect_compute_data_ref_alignment): Handle polynomial vf.
3083 (vect_enhance_data_refs_alignment): Likewise.
3084 (vect_prune_runtime_alias_test_list): Likewise.
3085 (vect_shift_permute_load_chain): Likewise.
3086 (vect_supportable_dr_alignment): Likewise.
3087 (dependence_distance_ge_vf): Take the vectorization factor as a
3088 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3089 (vect_analyze_data_refs): Change min_vf from an int * to a
3091 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3092 vfm1 as a poly_uint64 rather than an int. Make the same change
3093 for the returned bound_scalar.
3094 (vect_gen_vector_loop_niters): Handle polynomial vf.
3095 (vect_do_peeling): Likewise. Update call to
3096 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3097 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3099 * tree-vect-loop.c (vect_determine_vectorization_factor)
3100 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3101 (vect_get_known_peeling_cost): Likewise.
3102 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3103 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3104 (vect_transform_loop): Likewise. Use the lowest possible VF when
3105 updating the upper bounds of the loop.
3106 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3108 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3109 polynomial unroll factors.
3110 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3111 (vect_make_slp_decision): Likewise.
3112 (vect_supported_load_permutation_p): Likewise, and polynomial
3114 (vect_analyze_slp_cost): Handle polynomial vf.
3115 (vect_slp_analyze_node_operations): Likewise.
3116 (vect_slp_analyze_bb_1): Likewise.
3117 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3118 than an unsigned HOST_WIDE_INT.
3119 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3120 (vectorizable_load): Handle polynomial vf.
3121 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3123 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3125 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3126 Alan Hayward <alan.hayward@arm.com>
3127 David Sherwood <david.sherwood@arm.com>
3129 * match.pd: Handle bit operations involving three constants
3130 and try to fold one pair.
3132 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3134 * tree-vect-loop-manip.c: Include gimple-fold.h.
3135 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3136 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3137 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3138 Add a path that uses a step of VF instead of 1, but disable it
3140 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3141 and niters_no_overflow parameters. Update calls to
3142 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3143 Create a new SSA name if the latter choses to use a ste other
3144 than zero, and return it via niters_vector_mult_vf_var.
3145 * tree-vect-loop.c (vect_transform_loop): Update calls to
3146 vect_do_peeling, vect_gen_vector_loop_niters and
3147 slpeel_make_loop_iterate_ntimes.
3148 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3149 (vect_gen_vector_loop_niters): Update declarations after above changes.
3151 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3153 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3154 128-bit round to integer instructions.
3155 (ceil<mode>2): Likewise.
3156 (btrunc<mode>2): Likewise.
3157 (round<mode>2): Likewise.
3159 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3161 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3162 unaligned VSX load/store on P8/P9.
3163 (expand_block_clear): Allow the use of unaligned VSX
3164 load/store on P8/P9.
3166 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3168 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3170 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3171 swap associated with both a load and a store.
3173 2018-01-02 Andrew Waterman <andrew@sifive.com>
3175 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3176 * config/riscv/riscv.md (clear_cache): Use it.
3178 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3180 * web.c: Remove out-of-date comment.
3182 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3184 * expr.c (fixup_args_size_notes): Check that any existing
3185 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3186 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3187 (emit_single_push_insn): ...here.
3189 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3191 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3192 (const_vector_encoded_nelts): New function.
3193 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3194 (const_vector_int_elt, const_vector_elt): Declare.
3195 * emit-rtl.c (const_vector_int_elt_1): New function.
3196 (const_vector_elt): Likewise.
3197 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3198 of CONST_VECTOR_ELT.
3200 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3202 * expr.c: Include rtx-vector-builder.h.
3203 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3204 directly on the tree encoding.
3205 (const_vector_from_tree): Likewise.
3206 * optabs.c: Include rtx-vector-builder.h.
3207 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3208 sequence of "u" values.
3209 * vec-perm-indices.c: Include rtx-vector-builder.h.
3210 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3211 directly on the vec_perm_indices encoding.
3213 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3215 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3216 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3217 * rtx-vector-builder.h: New file.
3218 * rtx-vector-builder.c: Likewise.
3219 * rtl.h (rtx_def::u2): Add a const_vector field.
3220 (CONST_VECTOR_NPATTERNS): New macro.
3221 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3222 (CONST_VECTOR_DUPLICATE_P): Likewise.
3223 (CONST_VECTOR_STEPPED_P): Likewise.
3224 (CONST_VECTOR_ENCODED_ELT): Likewise.
3225 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3226 (unwrap_const_vec_duplicate): Likewise.
3227 (const_vec_series_p): Check for a non-duplicated vector encoding.
3228 Say that the function only returns true for integer vectors.
3229 * emit-rtl.c: Include rtx-vector-builder.h.
3230 (gen_const_vec_duplicate_1): Delete.
3231 (gen_const_vector): Call gen_const_vec_duplicate instead of
3232 gen_const_vec_duplicate_1.
3233 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3234 (gen_const_vec_duplicate): Use rtx_vector_builder.
3235 (gen_const_vec_series): Likewise.
3236 (gen_rtx_CONST_VECTOR): Likewise.
3237 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3238 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3239 Build a new vector rather than modifying a CONST_VECTOR in-place.
3240 (handle_special_swappables): Update call accordingly.
3241 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3242 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3243 Build a new vector rather than modifying a CONST_VECTOR in-place.
3244 (handle_special_swappables): Update call accordingly.
3246 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3248 * simplify-rtx.c (simplify_const_binary_operation): Use
3249 CONST_VECTOR_ELT instead of XVECEXP.
3251 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3253 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3254 the selector elements to be different from the data elements
3255 if the selector is a VECTOR_CST.
3256 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3257 ssizetype for the selector.
3259 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3261 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3262 before testing each element individually.
3263 * tree-vect-generic.c (lower_vec_perm): Likewise.
3265 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3267 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3268 * selftest-run-tests.c (selftest::run_tests): Call it.
3269 * vector-builder.h (vector_builder::operator ==): New function.
3270 (vector_builder::operator !=): Likewise.
3271 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3272 (vec_perm_indices::all_from_input_p): New function.
3273 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3274 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3275 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3276 instead of reading the VECTOR_CST directly. Detect whether both
3277 vector inputs are the same before constructing the vec_perm_indices,
3278 and update the number of inputs argument accordingly. Use the
3279 utility functions added above. Only construct sel2 if we need to.
3281 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3283 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3284 the broadcast of the low byte.
3285 (expand_mult_highpart): Use an explicit encoding for the permutes.
3286 * optabs-query.c (can_mult_highpart_p): Likewise.
3287 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3288 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3289 (vectorizable_bswap): Likewise.
3290 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3291 explicit encoding for the power-of-2 permutes.
3292 (vect_permute_store_chain): Likewise.
3293 (vect_grouped_load_supported): Likewise.
3294 (vect_permute_load_chain): Likewise.
3296 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3298 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3299 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3300 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3301 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3302 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3303 (vect_gen_perm_mask_any): Likewise.
3305 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3307 * int-vector-builder.h: New file.
3308 * vec-perm-indices.h: Include int-vector-builder.h.
3309 (vec_perm_indices): Redefine as an int_vector_builder.
3310 (auto_vec_perm_indices): Delete.
3311 (vec_perm_builder): Redefine as a stand-alone class.
3312 (vec_perm_indices::vec_perm_indices): New function.
3313 (vec_perm_indices::clamp): Likewise.
3314 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3315 (vec_perm_indices::new_vector): New function.
3316 (vec_perm_indices::new_expanded_vector): Update for new
3317 vec_perm_indices class.
3318 (vec_perm_indices::rotate_inputs): New function.
3319 (vec_perm_indices::all_in_range_p): Operate directly on the
3320 encoded form, without computing elided elements.
3321 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3322 encoding. Update for new vec_perm_indices class.
3323 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3324 the given vec_perm_builder.
3325 (expand_vec_perm_var): Update vec_perm_builder constructor.
3326 (expand_mult_highpart): Use vec_perm_builder instead of
3327 auto_vec_perm_indices.
3328 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3329 vec_perm_indices instead of auto_vec_perm_indices. Use a single
3330 or double series encoding as appropriate.
3331 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3332 vec_perm_indices instead of auto_vec_perm_indices.
3333 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3334 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3335 (vect_permute_store_chain): Likewise.
3336 (vect_grouped_load_supported): Likewise.
3337 (vect_permute_load_chain): Likewise.
3338 (vect_shift_permute_load_chain): Likewise.
3339 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3340 (vect_transform_slp_perm_load): Likewise.
3341 (vect_schedule_slp_instance): Likewise.
3342 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3343 (vectorizable_mask_load_store): Likewise.
3344 (vectorizable_bswap): Likewise.
3345 (vectorizable_store): Likewise.
3346 (vectorizable_load): Likewise.
3347 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3348 vec_perm_indices instead of auto_vec_perm_indices. Use
3349 tree_to_vec_perm_builder to read the vector from a tree.
3350 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3351 vec_perm_builder instead of a vec_perm_indices.
3352 (have_whole_vector_shift): Use vec_perm_builder and
3353 vec_perm_indices instead of auto_vec_perm_indices. Leave the
3354 truncation to calc_vec_perm_mask_for_shift.
3355 (vect_create_epilog_for_reduction): Likewise.
3356 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3357 from auto_vec_perm_indices to vec_perm_indices.
3358 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3359 instead of changing individual elements.
3360 (aarch64_vectorize_vec_perm_const): Use new_vector to install
3361 the vector in d.perm.
3362 * config/arm/arm.c (expand_vec_perm_d::perm): Change
3363 from auto_vec_perm_indices to vec_perm_indices.
3364 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3365 instead of changing individual elements.
3366 (arm_vectorize_vec_perm_const): Use new_vector to install
3367 the vector in d.perm.
3368 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3369 Update vec_perm_builder constructor.
3370 (rs6000_expand_interleave): Likewise.
3371 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3372 (rs6000_expand_interleave): Likewise.
3374 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3376 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3377 to qimode could truncate the indices.
3378 * optabs.c (expand_vec_perm_var): Likewise.
3380 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3382 * Makefile.in (OBJS): Add vec-perm-indices.o.
3383 * vec-perm-indices.h: New file.
3384 * vec-perm-indices.c: Likewise.
3385 * target.h (vec_perm_indices): Replace with a forward class
3387 (auto_vec_perm_indices): Move to vec-perm-indices.h.
3388 * optabs.h: Include vec-perm-indices.h.
3389 (expand_vec_perm): Delete.
3390 (selector_fits_mode_p, expand_vec_perm_var): Declare.
3391 (expand_vec_perm_const): Declare.
3392 * target.def (vec_perm_const_ok): Replace with...
3393 (vec_perm_const): ...this new hook.
3394 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3395 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3396 * doc/tm.texi: Regenerate.
3397 * optabs.def (vec_perm_const): Delete.
3398 * doc/md.texi (vec_perm_const): Likewise.
3399 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3400 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3401 expand_vec_perm for constant permutation vectors. Assert that
3402 the mode of variable permutation vectors is the integer equivalent
3403 of the mode that is being permuted.
3404 * optabs-query.h (selector_fits_mode_p): Declare.
3405 * optabs-query.c: Include vec-perm-indices.h.
3406 (selector_fits_mode_p): New function.
3407 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3408 is defined, instead of checking whether the vec_perm_const_optab
3409 exists. Use targetm.vectorize.vec_perm_const instead of
3410 targetm.vectorize.vec_perm_const_ok. Check whether the indices
3411 fit in the vector mode before using a variable permute.
3412 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3413 vec_perm_indices instead of an rtx.
3414 (expand_vec_perm): Replace with...
3415 (expand_vec_perm_const): ...this new function. Take the selector
3416 as a vec_perm_indices rather than an rtx. Also take the mode of
3417 the selector. Update call to shift_amt_for_vec_perm_mask.
3418 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
3419 Use vec_perm_indices::new_expanded_vector to expand the original
3420 selector into bytes. Check whether the indices fit in the vector
3421 mode before using a variable permute.
3422 (expand_vec_perm_var): Make global.
3423 (expand_mult_highpart): Use expand_vec_perm_const.
3424 * fold-const.c: Includes vec-perm-indices.h.
3425 * tree-ssa-forwprop.c: Likewise.
3426 * tree-vect-data-refs.c: Likewise.
3427 * tree-vect-generic.c: Likewise.
3428 * tree-vect-loop.c: Likewise.
3429 * tree-vect-slp.c: Likewise.
3430 * tree-vect-stmts.c: Likewise.
3431 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
3433 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
3434 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
3435 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
3436 (aarch64_vectorize_vec_perm_const): ...this new function.
3437 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3438 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3439 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
3440 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
3441 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3442 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3443 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
3445 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
3446 check for NEON modes.
3447 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
3448 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
3449 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
3450 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
3452 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
3453 the old VEC_PERM_CONST conditions.
3454 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
3455 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
3456 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
3457 (ia64_vectorize_vec_perm_const_ok): Merge into...
3458 (ia64_vectorize_vec_perm_const): ...this new function.
3459 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
3460 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
3461 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
3462 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
3463 * config/mips/mips.c (mips_expand_vec_perm_const)
3464 (mips_vectorize_vec_perm_const_ok): Merge into...
3465 (mips_vectorize_vec_perm_const): ...this new function.
3466 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
3467 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
3468 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
3469 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
3470 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
3471 (rs6000_expand_vec_perm_const): Delete.
3472 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
3474 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3475 (altivec_expand_vec_perm_const_le): Take each operand individually.
3476 Operate on constant selectors rather than rtxes.
3477 (altivec_expand_vec_perm_const): Likewise. Update call to
3478 altivec_expand_vec_perm_const_le.
3479 (rs6000_expand_vec_perm_const): Delete.
3480 (rs6000_vectorize_vec_perm_const_ok): Delete.
3481 (rs6000_vectorize_vec_perm_const): New function.
3482 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3483 an element count and rtx array.
3484 (rs6000_expand_extract_even): Update call accordingly.
3485 (rs6000_expand_interleave): Likewise.
3486 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
3487 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
3488 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
3489 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
3490 (rs6000_expand_vec_perm_const): Delete.
3491 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3492 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3493 (altivec_expand_vec_perm_const_le): Take each operand individually.
3494 Operate on constant selectors rather than rtxes.
3495 (altivec_expand_vec_perm_const): Likewise. Update call to
3496 altivec_expand_vec_perm_const_le.
3497 (rs6000_expand_vec_perm_const): Delete.
3498 (rs6000_vectorize_vec_perm_const_ok): Delete.
3499 (rs6000_vectorize_vec_perm_const): New function. Remove stray
3500 reference to the SPE evmerge intructions.
3501 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3502 an element count and rtx array.
3503 (rs6000_expand_extract_even): Update call accordingly.
3504 (rs6000_expand_interleave): Likewise.
3505 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
3506 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
3508 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3510 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3512 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
3513 vector mode and that that mode matches the mode of the data
3515 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
3516 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
3517 directly using expand_vec_perm_1 when forcing selectors into
3519 (expand_vec_perm_var): New function, split out from expand_vec_perm.
3521 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3523 * optabs-query.h (can_vec_perm_p): Delete.
3524 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
3525 * optabs-query.c (can_vec_perm_p): Split into...
3526 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
3527 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
3528 particular selector is valid.
3529 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3530 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3531 (vect_grouped_load_supported): Likewise.
3532 (vect_shift_permute_load_chain): Likewise.
3533 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3534 (vect_transform_slp_perm_load): Likewise.
3535 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3536 (vectorizable_bswap): Likewise.
3537 (vect_gen_perm_mask_checked): Likewise.
3538 * fold-const.c (fold_ternary_loc): Likewise. Don't take
3539 implementations of variable permutation vectors into account
3540 when deciding which selector to use.
3541 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
3542 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
3543 with a false third argument.
3544 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
3545 to test whether the constant selector is valid and can_vec_perm_var_p
3546 to test whether a variable selector is valid.
3548 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3550 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
3551 * optabs-query.c (can_vec_perm_p): Likewise.
3552 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
3553 instead of vec_perm_indices.
3554 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
3555 (vect_gen_perm_mask_checked): Likewise,
3556 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
3557 (vect_gen_perm_mask_checked): Likewise,
3559 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3561 * optabs-query.h (qimode_for_vec_perm): Declare.
3562 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
3563 (qimode_for_vec_perm): ...this new function.
3564 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
3566 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3568 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
3569 does not have a conditional at the top.
3571 2018-01-02 Richard Biener <rguenther@suse.de>
3573 * ipa-inline.c (big_speedup_p): Fix expression.
3575 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3578 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
3581 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3585 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
3586 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
3587 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
3588 cond_taken_branch_cost 3->4.
3590 2018-01-01 Jakub Jelinek <jakub@redhat.com>
3592 PR tree-optimization/83581
3593 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
3594 TODO_cleanup_cfg if any changes have been made.
3597 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
3598 convert_modes if target mode has the right side, but different mode
3602 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
3603 last argument when extracting from CONCAT. If either from_real or
3604 from_imag is NULL, use expansion through memory. If result is not
3605 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
3606 the parts directly to inner mode, if even that fails, use expansion
3610 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
3611 check for bswap in mode rather than HImode and use that in expand_unop
3614 Copyright (C) 2018 Free Software Foundation, Inc.
3616 Copying and distribution of this file, with or without modification,
3617 are permitted in any medium without royalty provided the copyright
3618 notice and this notice are preserved.