gcc/testsuite/gcc.target/aarch64/var_shift_mask_2.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2" } */
   3
   4 long long
   5 f1 (long long x, int i)
   6 {
   7
   8   return x >> (64 - i);
   9 }
  10
  11 unsigned long long
  12 f2 (unsigned long long x, unsigned int i)
  13 {
  14
  15   return x >> (64 - i);
  16 }
  17
  18 int
  19 f3 (int x, int i)
  20 {
  21
  22   return x >> (32 - i);
  23 }
  24
  25 unsigned int
  26 f4 (unsigned int x, unsigned int i)
  27 {
  28
  29   return x >> (32 - i);
  30 }
  31
  32 int
  33 f5 (int x, int i)
  34 {
  35   return x << (32 - i);
  36 }
  37
  38 long long
  39 f6 (long long x, int i)
  40 {
  41   return x << (64 - i);
  42 }
  43
  44 /* { dg-final { scan-assembler "lsl\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */
  45 /* { dg-final { scan-assembler "lsl\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */
  46 /* { dg-final { scan-assembler "lsr\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */
  47 /* { dg-final { scan-assembler "lsr\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */
  48 /* { dg-final { scan-assembler "asr\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */
  49 /* { dg-final { scan-assembler "asr\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" } } */
  50 /* { dg-final { scan-assembler-times "neg\tw\[0-9\]+, w\[0-9\]+" 6 } } */
  51 /* { dg-final { scan-assembler-not "sub\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */