[PR81647][AARCH64] Fix handling of Unordered Comparisons in aarch64-simd.md
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / construct_lane_zero_1.c
blobd87f32908280cf7f6ad89d129f0005510ba7cced
1 /* { dg-do compile } */
2 /* { dg-options "-O2" } */
4 typedef long long v2di __attribute__ ((vector_size (16)));
5 typedef double v2df __attribute__ ((vector_size (16)));
7 v2di
8 construct_lanedi (long long *y)
10 v2di x =
11 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
12 { 0, y[0] }
13 #else
14 { y[0], 0 }
15 #endif
17 return x;
20 v2df
21 construct_lanedf (double *y)
23 v2df x =
24 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
25 { 0.0, y[0] }
26 #else
27 { y[0], 0.0 }
28 #endif
30 return x;
33 /* Check that creating V2DI and V2DF vectors from a lane with a zero
34 makes use of the D-reg LDR rather than doing explicit lane inserts. */
36 /* { dg-final { scan-assembler-times "ldr\td\[0-9\]+" 2 } } */
37 /* { dg-final { scan-assembler-not "ins\t" } } */