[PR81647][AARCH64] Fix handling of Unordered Comparisons in aarch64-simd.md
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / bics_1.c
blob682962c72eb9b2b354f08808e3626ef007f78282
1 /* { dg-do run } */
2 /* { dg-options "-O2 --save-temps -fno-inline" } */
4 extern void abort (void);
6 int
7 bics_si_test1 (int a, int b, int c)
9 int d = a & ~b;
11 /* { dg-final { scan-assembler-times "bics\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 2 } } */
12 if (d == 0)
13 return a + c;
14 else
15 return d;
18 int
19 bics_si_test2 (int a, int b, int c)
21 int d = a & ~(b << 3);
23 /* { dg-final { scan-assembler "bics\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+, lsl 3" } } */
24 if (d == 0)
25 return a + c;
26 else
27 return d;
30 typedef long long s64;
32 s64
33 bics_di_test1 (s64 a, s64 b, s64 c)
35 s64 d = a & ~b;
37 /* { dg-final { scan-assembler-times "bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 2 } } */
38 if (d == 0)
39 return a + c;
40 else
41 return d;
44 s64
45 bics_di_test2 (s64 a, s64 b, s64 c)
47 s64 d = a & ~(b << 3);
49 /* { dg-final { scan-assembler "bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3" } } */
50 if (d == 0)
51 return a + c;
52 else
53 return d;
56 int
57 main ()
59 int x;
60 s64 y;
62 x = bics_si_test1 (29, ~4, 5);
63 if (x != (29 & 4))
64 abort ();
66 x = bics_si_test1 (5, ~2, 20);
67 if (x != 25)
68 abort ();
70 x = bics_si_test2 (35, ~4, 5);
71 if (x != (35 & ~(~4 << 3)))
72 abort ();
74 x = bics_si_test2 (96, ~2, 20);
75 if (x != 116)
76 abort ();
78 y = bics_di_test1 (0x130000029ll,
79 ~0x320000004ll,
80 0x505050505ll);
82 if (y != (0x130000029ll & 0x320000004ll))
83 abort ();
85 y = bics_di_test1 (0x5000500050005ll,
86 ~0x2111211121112ll,
87 0x0000000002020ll);
88 if (y != 0x5000500052025ll)
89 abort ();
91 y = bics_di_test2 (0x130000029ll,
92 ~0x064000008ll,
93 0x505050505ll);
94 if (y != (0x130000029ll & ~(~0x064000008ll << 3)))
95 abort ();
97 y = bics_di_test2 (0x130002900ll,
98 ~0x088000008ll,
99 0x505050505ll);
100 if (y != (0x130002900ll + 0x505050505ll))
101 abort ();
103 return 0;