1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
45 #include "rtlhooks-def.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `REG_QTY (N)' records what quantity register N is currently thought
86 All real quantity numbers are greater than or equal to zero.
87 If register N has not been assigned a quantity, `REG_QTY (N)' will
88 equal -N - 1, which is always negative.
90 Quantity numbers below zero do not exist and none of the `qty_table'
91 entries should be referenced with a negative index.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 `REG_TICK' and `REG_IN_TABLE', accessors for members of
176 cse_reg_info, are used to detect this case. REG_TICK (i) is
177 incremented whenever a value is stored in register i.
178 REG_IN_TABLE (i) holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value REG_TICK (i)
180 had when the references were entered. If we want to enter a
181 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
182 remove old references. Until we want to enter a new entry, the
183 mere fact that the two vectors don't match makes the entries be
184 ignored if anyone tries to match them.
186 Registers themselves are entered in the hash table as well as in
187 the equivalent-register chains. However, `REG_TICK' and
188 `REG_IN_TABLE' do not apply to expressions which are simple
189 register references. These expressions are removed from the table
190 immediately when they become invalid, and this can be done even if
191 we do not immediately search for all the expressions that refer to
194 A CLOBBER rtx in an instruction invalidates its operand for further
195 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
196 invalidates everything that resides in memory.
200 Constant expressions that differ only by an additive integer
201 are called related. When a constant expression is put in
202 the table, the related expression with no constant term
203 is also entered. These are made to point at each other
204 so that it is possible to find out if there exists any
205 register equivalent to an expression related to a given expression. */
207 /* Length of qty_table vector. We know in advance we will not need
208 a quantity number this big. */
212 /* Next quantity number to be allocated.
213 This is 1 + the largest number needed so far. */
217 /* Per-qty information tracking.
219 `first_reg' and `last_reg' track the head and tail of the
220 chain of registers which currently contain this quantity.
222 `mode' contains the machine mode of this quantity.
224 `const_rtx' holds the rtx of the constant value of this
225 quantity, if known. A summations of the frame/arg pointer
226 and a constant can also be entered here. When this holds
227 a known value, `const_insn' is the insn which stored the
230 `comparison_{code,const,qty}' are used to track when a
231 comparison between a quantity and some constant or register has
232 been passed. In such a case, we know the results of the comparison
233 in case we see it again. These members record a comparison that
234 is known to be true. `comparison_code' holds the rtx code of such
235 a comparison, else it is set to UNKNOWN and the other two
236 comparison members are undefined. `comparison_const' holds
237 the constant being compared against, or zero if the comparison
238 is not against a constant. `comparison_qty' holds the quantity
239 being compared against when the result is known. If the comparison
240 is not with a register, `comparison_qty' is -1. */
242 struct qty_table_elem
246 rtx comparison_const
;
248 unsigned int first_reg
, last_reg
;
249 /* The sizes of these fields should match the sizes of the
250 code and mode fields of struct rtx_def (see rtl.h). */
251 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
252 ENUM_BITFIELD(machine_mode
) mode
: 8;
255 /* The table of all qtys, indexed by qty number. */
256 static struct qty_table_elem
*qty_table
;
258 /* Structure used to pass arguments via for_each_rtx to function
259 cse_change_cc_mode. */
260 struct change_cc_mode_args
267 /* For machines that have a CC0, we do not record its value in the hash
268 table since its use is guaranteed to be the insn immediately following
269 its definition and any other insn is presumed to invalidate it.
271 Instead, we store below the value last assigned to CC0. If it should
272 happen to be a constant, it is stored in preference to the actual
273 assigned value. In case it is a constant, we store the mode in which
274 the constant should be interpreted. */
276 static rtx prev_insn_cc0
;
277 static enum machine_mode prev_insn_cc0_mode
;
279 /* Previous actual insn. 0 if at first insn of basic block. */
281 static rtx prev_insn
;
284 /* Insn being scanned. */
286 static rtx this_insn
;
288 /* Index by register number, gives the number of the next (or
289 previous) register in the chain of registers sharing the same
292 Or -1 if this register is at the end of the chain.
294 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
296 /* Per-register equivalence chain. */
302 /* The table of all register equivalence chains. */
303 static struct reg_eqv_elem
*reg_eqv_table
;
307 /* The timestamp at which this register is initialized. */
308 unsigned int timestamp
;
310 /* The quantity number of the register's current contents. */
313 /* The number of times the register has been altered in the current
317 /* The REG_TICK value at which rtx's containing this register are
318 valid in the hash table. If this does not equal the current
319 reg_tick value, such expressions existing in the hash table are
323 /* The SUBREG that was set when REG_TICK was last incremented. Set
324 to -1 if the last store was to the whole register, not a subreg. */
325 unsigned int subreg_ticked
;
328 /* A table of cse_reg_info indexed by register numbers. */
329 static struct cse_reg_info
*cse_reg_info_table
;
331 /* The size of the above table. */
332 static unsigned int cse_reg_info_table_size
;
334 /* The index of the first entry that has not been initialized. */
335 static unsigned int cse_reg_info_table_first_uninitialized
;
337 /* The timestamp at the beginning of the current run of
338 cse_basic_block. We increment this variable at the beginning of
339 the current run of cse_basic_block. The timestamp field of a
340 cse_reg_info entry matches the value of this variable if and only
341 if the entry has been initialized during the current run of
343 static unsigned int cse_reg_info_timestamp
;
345 /* A HARD_REG_SET containing all the hard registers for which there is
346 currently a REG expression in the hash table. Note the difference
347 from the above variables, which indicate if the REG is mentioned in some
348 expression in the table. */
350 static HARD_REG_SET hard_regs_in_table
;
352 /* CUID of insn that starts the basic block currently being cse-processed. */
354 static int cse_basic_block_start
;
356 /* CUID of insn that ends the basic block currently being cse-processed. */
358 static int cse_basic_block_end
;
360 /* Vector mapping INSN_UIDs to cuids.
361 The cuids are like uids but increase monotonically always.
362 We use them to see whether a reg is used outside a given basic block. */
364 static int *uid_cuid
;
366 /* Highest UID in UID_CUID. */
369 /* Get the cuid of an insn. */
371 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
373 /* Nonzero if this pass has made changes, and therefore it's
374 worthwhile to run the garbage collector. */
376 static int cse_altered
;
378 /* Nonzero if cse has altered conditional jump insns
379 in such a way that jump optimization should be redone. */
381 static int cse_jumps_altered
;
383 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
384 REG_LABEL, we have to rerun jump after CSE to put in the note. */
385 static int recorded_label_ref
;
387 /* canon_hash stores 1 in do_not_record
388 if it notices a reference to CC0, PC, or some other volatile
391 static int do_not_record
;
393 /* canon_hash stores 1 in hash_arg_in_memory
394 if it notices a reference to memory within the expression being hashed. */
396 static int hash_arg_in_memory
;
398 /* The hash table contains buckets which are chains of `struct table_elt's,
399 each recording one expression's information.
400 That expression is in the `exp' field.
402 The canon_exp field contains a canonical (from the point of view of
403 alias analysis) version of the `exp' field.
405 Those elements with the same hash code are chained in both directions
406 through the `next_same_hash' and `prev_same_hash' fields.
408 Each set of expressions with equivalent values
409 are on a two-way chain through the `next_same_value'
410 and `prev_same_value' fields, and all point with
411 the `first_same_value' field at the first element in
412 that chain. The chain is in order of increasing cost.
413 Each element's cost value is in its `cost' field.
415 The `in_memory' field is nonzero for elements that
416 involve any reference to memory. These elements are removed
417 whenever a write is done to an unidentified location in memory.
418 To be safe, we assume that a memory address is unidentified unless
419 the address is either a symbol constant or a constant plus
420 the frame pointer or argument pointer.
422 The `related_value' field is used to connect related expressions
423 (that differ by adding an integer).
424 The related expressions are chained in a circular fashion.
425 `related_value' is zero for expressions for which this
428 The `cost' field stores the cost of this element's expression.
429 The `regcost' field stores the value returned by approx_reg_cost for
430 this element's expression.
432 The `is_const' flag is set if the element is a constant (including
435 The `flag' field is used as a temporary during some search routines.
437 The `mode' field is usually the same as GET_MODE (`exp'), but
438 if `exp' is a CONST_INT and has no machine mode then the `mode'
439 field is the mode it was being used as. Each constant is
440 recorded separately for each mode it is used with. */
446 struct table_elt
*next_same_hash
;
447 struct table_elt
*prev_same_hash
;
448 struct table_elt
*next_same_value
;
449 struct table_elt
*prev_same_value
;
450 struct table_elt
*first_same_value
;
451 struct table_elt
*related_value
;
454 /* The size of this field should match the size
455 of the mode field of struct rtx_def (see rtl.h). */
456 ENUM_BITFIELD(machine_mode
) mode
: 8;
462 /* We don't want a lot of buckets, because we rarely have very many
463 things stored in the hash table, and a lot of buckets slows
464 down a lot of loops that happen frequently. */
466 #define HASH_SIZE (1 << HASH_SHIFT)
467 #define HASH_MASK (HASH_SIZE - 1)
469 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
470 register (hard registers may require `do_not_record' to be set). */
473 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
474 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
475 : canon_hash (X, M)) & HASH_MASK)
477 /* Like HASH, but without side-effects. */
478 #define SAFE_HASH(X, M) \
479 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
480 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
481 : safe_hash (X, M)) & HASH_MASK)
483 /* Determine whether register number N is considered a fixed register for the
484 purpose of approximating register costs.
485 It is desirable to replace other regs with fixed regs, to reduce need for
487 A reg wins if it is either the frame pointer or designated as fixed. */
488 #define FIXED_REGNO_P(N) \
489 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
490 || fixed_regs[N] || global_regs[N])
492 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
493 hard registers and pointers into the frame are the cheapest with a cost
494 of 0. Next come pseudos with a cost of one and other hard registers with
495 a cost of 2. Aside from these special cases, call `rtx_cost'. */
497 #define CHEAP_REGNO(N) \
498 (REGNO_PTR_FRAME_P(N) \
499 || (HARD_REGISTER_NUM_P (N) \
500 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
502 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
503 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
505 /* Get the number of times this register has been updated in this
508 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
510 /* Get the point at which REG was recorded in the table. */
512 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
514 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
517 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
519 /* Get the quantity number for REG. */
521 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
523 /* Determine if the quantity number for register X represents a valid index
524 into the qty_table. */
526 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
528 static struct table_elt
*table
[HASH_SIZE
];
530 /* Chain of `struct table_elt's made so far for this function
531 but currently removed from the table. */
533 static struct table_elt
*free_element_chain
;
535 /* Set to the cost of a constant pool reference if one was found for a
536 symbolic constant. If this was found, it means we should try to
537 convert constants into constant pool entries if they don't fit in
540 static int constant_pool_entries_cost
;
541 static int constant_pool_entries_regcost
;
543 /* This data describes a block that will be processed by cse_basic_block. */
545 struct cse_basic_block_data
547 /* Lowest CUID value of insns in block. */
549 /* Highest CUID value of insns in block. */
551 /* Total number of SETs in block. */
553 /* Last insn in the block. */
555 /* Size of current branch path, if any. */
557 /* Current branch path, indicating which branches will be taken. */
560 /* The branch insn. */
562 /* Whether it should be taken or not. AROUND is the same as taken
563 except that it is used when the destination label is not preceded
565 enum taken
{PATH_TAKEN
, PATH_NOT_TAKEN
, PATH_AROUND
} status
;
569 static bool fixed_base_plus_p (rtx x
);
570 static int notreg_cost (rtx
, enum rtx_code
);
571 static int approx_reg_cost_1 (rtx
*, void *);
572 static int approx_reg_cost (rtx
);
573 static int preferable (int, int, int, int);
574 static void new_basic_block (void);
575 static void make_new_qty (unsigned int, enum machine_mode
);
576 static void make_regs_eqv (unsigned int, unsigned int);
577 static void delete_reg_equiv (unsigned int);
578 static int mention_regs (rtx
);
579 static int insert_regs (rtx
, struct table_elt
*, int);
580 static void remove_from_table (struct table_elt
*, unsigned);
581 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
582 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
583 static rtx
lookup_as_function (rtx
, enum rtx_code
);
584 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
586 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
587 static void invalidate (rtx
, enum machine_mode
);
588 static int cse_rtx_varies_p (rtx
, int);
589 static void remove_invalid_refs (unsigned int);
590 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
592 static void rehash_using_reg (rtx
);
593 static void invalidate_memory (void);
594 static void invalidate_for_call (void);
595 static rtx
use_related_value (rtx
, struct table_elt
*);
597 static inline unsigned canon_hash (rtx
, enum machine_mode
);
598 static inline unsigned safe_hash (rtx
, enum machine_mode
);
599 static unsigned hash_rtx_string (const char *);
601 static rtx
canon_reg (rtx
, rtx
);
602 static void find_best_addr (rtx
, rtx
*, enum machine_mode
);
603 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
605 enum machine_mode
*);
606 static rtx
fold_rtx (rtx
, rtx
);
607 static rtx
equiv_constant (rtx
);
608 static void record_jump_equiv (rtx
, int);
609 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
611 static void cse_insn (rtx
, rtx
);
612 static void cse_end_of_basic_block (rtx
, struct cse_basic_block_data
*,
614 static int addr_affects_sp_p (rtx
);
615 static void invalidate_from_clobbers (rtx
);
616 static rtx
cse_process_notes (rtx
, rtx
);
617 static void invalidate_skipped_set (rtx
, rtx
, void *);
618 static void invalidate_skipped_block (rtx
);
619 static rtx
cse_basic_block (rtx
, rtx
, struct branch_path
*);
620 static void count_reg_usage (rtx
, int *, int);
621 static int check_for_label_ref (rtx
*, void *);
622 extern void dump_class (struct table_elt
*);
623 static void get_cse_reg_info_1 (unsigned int regno
);
624 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
625 static int check_dependence (rtx
*, void *);
627 static void flush_hash_table (void);
628 static bool insn_live_p (rtx
, int *);
629 static bool set_live_p (rtx
, rtx
, int *);
630 static bool dead_libcall_p (rtx
, int *);
631 static int cse_change_cc_mode (rtx
*, void *);
632 static void cse_change_cc_mode_insn (rtx
, rtx
);
633 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
634 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
637 #undef RTL_HOOKS_GEN_LOWPART
638 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
640 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
642 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
643 virtual regs here because the simplify_*_operation routines are called
644 by integrate.c, which is called before virtual register instantiation. */
647 fixed_base_plus_p (rtx x
)
649 switch (GET_CODE (x
))
652 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
654 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
656 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
657 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
662 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
664 return fixed_base_plus_p (XEXP (x
, 0));
671 /* Dump the expressions in the equivalence class indicated by CLASSP.
672 This function is used only for debugging. */
674 dump_class (struct table_elt
*classp
)
676 struct table_elt
*elt
;
678 fprintf (stderr
, "Equivalence chain for ");
679 print_rtl (stderr
, classp
->exp
);
680 fprintf (stderr
, ": \n");
682 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
684 print_rtl (stderr
, elt
->exp
);
685 fprintf (stderr
, "\n");
689 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
692 approx_reg_cost_1 (rtx
*xp
, void *data
)
699 unsigned int regno
= REGNO (x
);
701 if (! CHEAP_REGNO (regno
))
703 if (regno
< FIRST_PSEUDO_REGISTER
)
705 if (SMALL_REGISTER_CLASSES
)
717 /* Return an estimate of the cost of the registers used in an rtx.
718 This is mostly the number of different REG expressions in the rtx;
719 however for some exceptions like fixed registers we use a cost of
720 0. If any other hard register reference occurs, return MAX_COST. */
723 approx_reg_cost (rtx x
)
727 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
733 /* Returns a canonical version of X for the address, from the point of view,
734 that all multiplications are represented as MULT instead of the multiply
735 by a power of 2 being represented as ASHIFT. */
738 canon_for_address (rtx x
)
741 enum machine_mode mode
;
755 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
756 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (mode
)
757 && INTVAL (XEXP (x
, 1)) >= 0)
759 new = canon_for_address (XEXP (x
, 0));
760 new = gen_rtx_MULT (mode
, new,
761 gen_int_mode ((HOST_WIDE_INT
) 1
762 << INTVAL (XEXP (x
, 1)),
773 /* Now recursively process each operand of this operation. */
774 fmt
= GET_RTX_FORMAT (code
);
775 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
778 new = canon_for_address (XEXP (x
, i
));
784 /* Return a negative value if an rtx A, whose costs are given by COST_A
785 and REGCOST_A, is more desirable than an rtx B.
786 Return a positive value if A is less desirable, or 0 if the two are
789 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
791 /* First, get rid of cases involving expressions that are entirely
793 if (cost_a
!= cost_b
)
795 if (cost_a
== MAX_COST
)
797 if (cost_b
== MAX_COST
)
801 /* Avoid extending lifetimes of hardregs. */
802 if (regcost_a
!= regcost_b
)
804 if (regcost_a
== MAX_COST
)
806 if (regcost_b
== MAX_COST
)
810 /* Normal operation costs take precedence. */
811 if (cost_a
!= cost_b
)
812 return cost_a
- cost_b
;
813 /* Only if these are identical consider effects on register pressure. */
814 if (regcost_a
!= regcost_b
)
815 return regcost_a
- regcost_b
;
819 /* Internal function, to compute cost when X is not a register; called
820 from COST macro to keep it simple. */
823 notreg_cost (rtx x
, enum rtx_code outer
)
825 return ((GET_CODE (x
) == SUBREG
826 && REG_P (SUBREG_REG (x
))
827 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
828 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
829 && (GET_MODE_SIZE (GET_MODE (x
))
830 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
831 && subreg_lowpart_p (x
)
832 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
833 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
835 : rtx_cost (x
, outer
) * 2);
839 /* Initialize CSE_REG_INFO_TABLE. */
842 init_cse_reg_info (unsigned int nregs
)
844 /* Do we need to grow the table? */
845 if (nregs
> cse_reg_info_table_size
)
847 unsigned int new_size
;
849 if (cse_reg_info_table_size
< 2048)
851 /* Compute a new size that is a power of 2 and no smaller
852 than the large of NREGS and 64. */
853 new_size
= (cse_reg_info_table_size
854 ? cse_reg_info_table_size
: 64);
856 while (new_size
< nregs
)
861 /* If we need a big table, allocate just enough to hold
866 /* Reallocate the table with NEW_SIZE entries. */
867 if (cse_reg_info_table
)
868 free (cse_reg_info_table
);
869 cse_reg_info_table
= xmalloc (sizeof (struct cse_reg_info
)
871 cse_reg_info_table_size
= new_size
;
872 cse_reg_info_table_first_uninitialized
= 0;
875 /* Do we have all of the first NREGS entries initialized? */
876 if (cse_reg_info_table_first_uninitialized
< nregs
)
878 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
881 /* Put the old timestamp on newly allocated entries so that they
882 will all be considered out of date. We do not touch those
883 entries beyond the first NREGS entries to be nice to the
885 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
886 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
888 cse_reg_info_table_first_uninitialized
= nregs
;
892 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
895 get_cse_reg_info_1 (unsigned int regno
)
897 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
898 entry will be considered to have been initialized. */
899 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
901 /* Initialize the rest of the entry. */
902 cse_reg_info_table
[regno
].reg_tick
= 1;
903 cse_reg_info_table
[regno
].reg_in_table
= -1;
904 cse_reg_info_table
[regno
].subreg_ticked
= -1;
905 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
908 /* Find a cse_reg_info entry for REGNO. */
910 static inline struct cse_reg_info
*
911 get_cse_reg_info (unsigned int regno
)
913 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
915 /* If this entry has not been initialized, go ahead and initialize
917 if (p
->timestamp
!= cse_reg_info_timestamp
)
918 get_cse_reg_info_1 (regno
);
923 /* Clear the hash table and initialize each register with its own quantity,
924 for a new basic block. */
927 new_basic_block (void)
933 /* Invalidate cse_reg_info_table. */
934 cse_reg_info_timestamp
++;
936 /* Clear out hash table state for this pass. */
937 CLEAR_HARD_REG_SET (hard_regs_in_table
);
939 /* The per-quantity values used to be initialized here, but it is
940 much faster to initialize each as it is made in `make_new_qty'. */
942 for (i
= 0; i
< HASH_SIZE
; i
++)
944 struct table_elt
*first
;
949 struct table_elt
*last
= first
;
953 while (last
->next_same_hash
!= NULL
)
954 last
= last
->next_same_hash
;
956 /* Now relink this hash entire chain into
957 the free element list. */
959 last
->next_same_hash
= free_element_chain
;
960 free_element_chain
= first
;
970 /* Say that register REG contains a quantity in mode MODE not in any
971 register before and initialize that quantity. */
974 make_new_qty (unsigned int reg
, enum machine_mode mode
)
977 struct qty_table_elem
*ent
;
978 struct reg_eqv_elem
*eqv
;
980 gcc_assert (next_qty
< max_qty
);
982 q
= REG_QTY (reg
) = next_qty
++;
984 ent
->first_reg
= reg
;
987 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
988 ent
->comparison_code
= UNKNOWN
;
990 eqv
= ®_eqv_table
[reg
];
991 eqv
->next
= eqv
->prev
= -1;
994 /* Make reg NEW equivalent to reg OLD.
995 OLD is not changing; NEW is. */
998 make_regs_eqv (unsigned int new, unsigned int old
)
1000 unsigned int lastr
, firstr
;
1001 int q
= REG_QTY (old
);
1002 struct qty_table_elem
*ent
;
1004 ent
= &qty_table
[q
];
1006 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1007 gcc_assert (REGNO_QTY_VALID_P (old
));
1010 firstr
= ent
->first_reg
;
1011 lastr
= ent
->last_reg
;
1013 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1014 hard regs. Among pseudos, if NEW will live longer than any other reg
1015 of the same qty, and that is beyond the current basic block,
1016 make it the new canonical replacement for this qty. */
1017 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
1018 /* Certain fixed registers might be of the class NO_REGS. This means
1019 that not only can they not be allocated by the compiler, but
1020 they cannot be used in substitutions or canonicalizations
1022 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
1023 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
1024 || (new >= FIRST_PSEUDO_REGISTER
1025 && (firstr
< FIRST_PSEUDO_REGISTER
1026 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
1027 || (uid_cuid
[REGNO_FIRST_UID (new)]
1028 < cse_basic_block_start
))
1029 && (uid_cuid
[REGNO_LAST_UID (new)]
1030 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
1032 reg_eqv_table
[firstr
].prev
= new;
1033 reg_eqv_table
[new].next
= firstr
;
1034 reg_eqv_table
[new].prev
= -1;
1035 ent
->first_reg
= new;
1039 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1040 Otherwise, insert before any non-fixed hard regs that are at the
1041 end. Registers of class NO_REGS cannot be used as an
1042 equivalent for anything. */
1043 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
1044 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
1045 && new >= FIRST_PSEUDO_REGISTER
)
1046 lastr
= reg_eqv_table
[lastr
].prev
;
1047 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
1048 if (reg_eqv_table
[lastr
].next
>= 0)
1049 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
1051 qty_table
[q
].last_reg
= new;
1052 reg_eqv_table
[lastr
].next
= new;
1053 reg_eqv_table
[new].prev
= lastr
;
1057 /* Remove REG from its equivalence class. */
1060 delete_reg_equiv (unsigned int reg
)
1062 struct qty_table_elem
*ent
;
1063 int q
= REG_QTY (reg
);
1066 /* If invalid, do nothing. */
1067 if (! REGNO_QTY_VALID_P (reg
))
1070 ent
= &qty_table
[q
];
1072 p
= reg_eqv_table
[reg
].prev
;
1073 n
= reg_eqv_table
[reg
].next
;
1076 reg_eqv_table
[n
].prev
= p
;
1080 reg_eqv_table
[p
].next
= n
;
1084 REG_QTY (reg
) = -reg
- 1;
1087 /* Remove any invalid expressions from the hash table
1088 that refer to any of the registers contained in expression X.
1090 Make sure that newly inserted references to those registers
1091 as subexpressions will be considered valid.
1093 mention_regs is not called when a register itself
1094 is being stored in the table.
1096 Return 1 if we have done something that may have changed the hash code
1100 mention_regs (rtx x
)
1110 code
= GET_CODE (x
);
1113 unsigned int regno
= REGNO (x
);
1114 unsigned int endregno
1115 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1116 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
1119 for (i
= regno
; i
< endregno
; i
++)
1121 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1122 remove_invalid_refs (i
);
1124 REG_IN_TABLE (i
) = REG_TICK (i
);
1125 SUBREG_TICKED (i
) = -1;
1131 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1132 pseudo if they don't use overlapping words. We handle only pseudos
1133 here for simplicity. */
1134 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1135 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1137 unsigned int i
= REGNO (SUBREG_REG (x
));
1139 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1141 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1142 the last store to this register really stored into this
1143 subreg, then remove the memory of this subreg.
1144 Otherwise, remove any memory of the entire register and
1145 all its subregs from the table. */
1146 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1147 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1148 remove_invalid_refs (i
);
1150 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1153 REG_IN_TABLE (i
) = REG_TICK (i
);
1154 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1158 /* If X is a comparison or a COMPARE and either operand is a register
1159 that does not have a quantity, give it one. This is so that a later
1160 call to record_jump_equiv won't cause X to be assigned a different
1161 hash code and not found in the table after that call.
1163 It is not necessary to do this here, since rehash_using_reg can
1164 fix up the table later, but doing this here eliminates the need to
1165 call that expensive function in the most common case where the only
1166 use of the register is in the comparison. */
1168 if (code
== COMPARE
|| COMPARISON_P (x
))
1170 if (REG_P (XEXP (x
, 0))
1171 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1172 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1174 rehash_using_reg (XEXP (x
, 0));
1178 if (REG_P (XEXP (x
, 1))
1179 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1180 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1182 rehash_using_reg (XEXP (x
, 1));
1187 fmt
= GET_RTX_FORMAT (code
);
1188 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1190 changed
|= mention_regs (XEXP (x
, i
));
1191 else if (fmt
[i
] == 'E')
1192 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1193 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1198 /* Update the register quantities for inserting X into the hash table
1199 with a value equivalent to CLASSP.
1200 (If the class does not contain a REG, it is irrelevant.)
1201 If MODIFIED is nonzero, X is a destination; it is being modified.
1202 Note that delete_reg_equiv should be called on a register
1203 before insert_regs is done on that register with MODIFIED != 0.
1205 Nonzero value means that elements of reg_qty have changed
1206 so X's hash code may be different. */
1209 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1213 unsigned int regno
= REGNO (x
);
1216 /* If REGNO is in the equivalence table already but is of the
1217 wrong mode for that equivalence, don't do anything here. */
1219 qty_valid
= REGNO_QTY_VALID_P (regno
);
1222 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1224 if (ent
->mode
!= GET_MODE (x
))
1228 if (modified
|| ! qty_valid
)
1231 for (classp
= classp
->first_same_value
;
1233 classp
= classp
->next_same_value
)
1234 if (REG_P (classp
->exp
)
1235 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1237 unsigned c_regno
= REGNO (classp
->exp
);
1239 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1241 /* Suppose that 5 is hard reg and 100 and 101 are
1244 (set (reg:si 100) (reg:si 5))
1245 (set (reg:si 5) (reg:si 100))
1246 (set (reg:di 101) (reg:di 5))
1248 We would now set REG_QTY (101) = REG_QTY (5), but the
1249 entry for 5 is in SImode. When we use this later in
1250 copy propagation, we get the register in wrong mode. */
1251 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1254 make_regs_eqv (regno
, c_regno
);
1258 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1259 than REG_IN_TABLE to find out if there was only a single preceding
1260 invalidation - for the SUBREG - or another one, which would be
1261 for the full register. However, if we find here that REG_TICK
1262 indicates that the register is invalid, it means that it has
1263 been invalidated in a separate operation. The SUBREG might be used
1264 now (then this is a recursive call), or we might use the full REG
1265 now and a SUBREG of it later. So bump up REG_TICK so that
1266 mention_regs will do the right thing. */
1268 && REG_IN_TABLE (regno
) >= 0
1269 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1271 make_new_qty (regno
, GET_MODE (x
));
1278 /* If X is a SUBREG, we will likely be inserting the inner register in the
1279 table. If that register doesn't have an assigned quantity number at
1280 this point but does later, the insertion that we will be doing now will
1281 not be accessible because its hash code will have changed. So assign
1282 a quantity number now. */
1284 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1285 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1287 insert_regs (SUBREG_REG (x
), NULL
, 0);
1292 return mention_regs (x
);
1295 /* Look in or update the hash table. */
1297 /* Remove table element ELT from use in the table.
1298 HASH is its hash code, made using the HASH macro.
1299 It's an argument because often that is known in advance
1300 and we save much time not recomputing it. */
1303 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1308 /* Mark this element as removed. See cse_insn. */
1309 elt
->first_same_value
= 0;
1311 /* Remove the table element from its equivalence class. */
1314 struct table_elt
*prev
= elt
->prev_same_value
;
1315 struct table_elt
*next
= elt
->next_same_value
;
1318 next
->prev_same_value
= prev
;
1321 prev
->next_same_value
= next
;
1324 struct table_elt
*newfirst
= next
;
1327 next
->first_same_value
= newfirst
;
1328 next
= next
->next_same_value
;
1333 /* Remove the table element from its hash bucket. */
1336 struct table_elt
*prev
= elt
->prev_same_hash
;
1337 struct table_elt
*next
= elt
->next_same_hash
;
1340 next
->prev_same_hash
= prev
;
1343 prev
->next_same_hash
= next
;
1344 else if (table
[hash
] == elt
)
1348 /* This entry is not in the proper hash bucket. This can happen
1349 when two classes were merged by `merge_equiv_classes'. Search
1350 for the hash bucket that it heads. This happens only very
1351 rarely, so the cost is acceptable. */
1352 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1353 if (table
[hash
] == elt
)
1358 /* Remove the table element from its related-value circular chain. */
1360 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1362 struct table_elt
*p
= elt
->related_value
;
1364 while (p
->related_value
!= elt
)
1365 p
= p
->related_value
;
1366 p
->related_value
= elt
->related_value
;
1367 if (p
->related_value
== p
)
1368 p
->related_value
= 0;
1371 /* Now add it to the free element chain. */
1372 elt
->next_same_hash
= free_element_chain
;
1373 free_element_chain
= elt
;
1376 /* Look up X in the hash table and return its table element,
1377 or 0 if X is not in the table.
1379 MODE is the machine-mode of X, or if X is an integer constant
1380 with VOIDmode then MODE is the mode with which X will be used.
1382 Here we are satisfied to find an expression whose tree structure
1385 static struct table_elt
*
1386 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1388 struct table_elt
*p
;
1390 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1391 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1392 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1398 /* Like `lookup' but don't care whether the table element uses invalid regs.
1399 Also ignore discrepancies in the machine mode of a register. */
1401 static struct table_elt
*
1402 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1404 struct table_elt
*p
;
1408 unsigned int regno
= REGNO (x
);
1410 /* Don't check the machine mode when comparing registers;
1411 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1412 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1414 && REGNO (p
->exp
) == regno
)
1419 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1421 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1428 /* Look for an expression equivalent to X and with code CODE.
1429 If one is found, return that expression. */
1432 lookup_as_function (rtx x
, enum rtx_code code
)
1435 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1437 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1438 long as we are narrowing. So if we looked in vain for a mode narrower
1439 than word_mode before, look for word_mode now. */
1440 if (p
== 0 && code
== CONST_INT
1441 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1444 PUT_MODE (x
, word_mode
);
1445 p
= lookup (x
, SAFE_HASH (x
, VOIDmode
), word_mode
);
1451 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1452 if (GET_CODE (p
->exp
) == code
1453 /* Make sure this is a valid entry in the table. */
1454 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1460 /* Insert X in the hash table, assuming HASH is its hash code
1461 and CLASSP is an element of the class it should go in
1462 (or 0 if a new class should be made).
1463 It is inserted at the proper position to keep the class in
1464 the order cheapest first.
1466 MODE is the machine-mode of X, or if X is an integer constant
1467 with VOIDmode then MODE is the mode with which X will be used.
1469 For elements of equal cheapness, the most recent one
1470 goes in front, except that the first element in the list
1471 remains first unless a cheaper element is added. The order of
1472 pseudo-registers does not matter, as canon_reg will be called to
1473 find the cheapest when a register is retrieved from the table.
1475 The in_memory field in the hash table element is set to 0.
1476 The caller must set it nonzero if appropriate.
1478 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1479 and if insert_regs returns a nonzero value
1480 you must then recompute its hash code before calling here.
1482 If necessary, update table showing constant values of quantities. */
1484 #define CHEAPER(X, Y) \
1485 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1487 static struct table_elt
*
1488 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1490 struct table_elt
*elt
;
1492 /* If X is a register and we haven't made a quantity for it,
1493 something is wrong. */
1494 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1496 /* If X is a hard register, show it is being put in the table. */
1497 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1499 unsigned int regno
= REGNO (x
);
1500 unsigned int endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1503 for (i
= regno
; i
< endregno
; i
++)
1504 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1507 /* Put an element for X into the right hash bucket. */
1509 elt
= free_element_chain
;
1511 free_element_chain
= elt
->next_same_hash
;
1513 elt
= xmalloc (sizeof (struct table_elt
));
1516 elt
->canon_exp
= NULL_RTX
;
1517 elt
->cost
= COST (x
);
1518 elt
->regcost
= approx_reg_cost (x
);
1519 elt
->next_same_value
= 0;
1520 elt
->prev_same_value
= 0;
1521 elt
->next_same_hash
= table
[hash
];
1522 elt
->prev_same_hash
= 0;
1523 elt
->related_value
= 0;
1526 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1529 table
[hash
]->prev_same_hash
= elt
;
1532 /* Put it into the proper value-class. */
1535 classp
= classp
->first_same_value
;
1536 if (CHEAPER (elt
, classp
))
1537 /* Insert at the head of the class. */
1539 struct table_elt
*p
;
1540 elt
->next_same_value
= classp
;
1541 classp
->prev_same_value
= elt
;
1542 elt
->first_same_value
= elt
;
1544 for (p
= classp
; p
; p
= p
->next_same_value
)
1545 p
->first_same_value
= elt
;
1549 /* Insert not at head of the class. */
1550 /* Put it after the last element cheaper than X. */
1551 struct table_elt
*p
, *next
;
1553 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1556 /* Put it after P and before NEXT. */
1557 elt
->next_same_value
= next
;
1559 next
->prev_same_value
= elt
;
1561 elt
->prev_same_value
= p
;
1562 p
->next_same_value
= elt
;
1563 elt
->first_same_value
= classp
;
1567 elt
->first_same_value
= elt
;
1569 /* If this is a constant being set equivalent to a register or a register
1570 being set equivalent to a constant, note the constant equivalence.
1572 If this is a constant, it cannot be equivalent to a different constant,
1573 and a constant is the only thing that can be cheaper than a register. So
1574 we know the register is the head of the class (before the constant was
1577 If this is a register that is not already known equivalent to a
1578 constant, we must check the entire class.
1580 If this is a register that is already known equivalent to an insn,
1581 update the qtys `const_insn' to show that `this_insn' is the latest
1582 insn making that quantity equivalent to the constant. */
1584 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1587 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1588 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1590 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1591 exp_ent
->const_insn
= this_insn
;
1596 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1599 struct table_elt
*p
;
1601 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1603 if (p
->is_const
&& !REG_P (p
->exp
))
1605 int x_q
= REG_QTY (REGNO (x
));
1606 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1609 = gen_lowpart (GET_MODE (x
), p
->exp
);
1610 x_ent
->const_insn
= this_insn
;
1617 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1618 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1619 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1621 /* If this is a constant with symbolic value,
1622 and it has a term with an explicit integer value,
1623 link it up with related expressions. */
1624 if (GET_CODE (x
) == CONST
)
1626 rtx subexp
= get_related_value (x
);
1628 struct table_elt
*subelt
, *subelt_prev
;
1632 /* Get the integer-free subexpression in the hash table. */
1633 subhash
= SAFE_HASH (subexp
, mode
);
1634 subelt
= lookup (subexp
, subhash
, mode
);
1636 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1637 /* Initialize SUBELT's circular chain if it has none. */
1638 if (subelt
->related_value
== 0)
1639 subelt
->related_value
= subelt
;
1640 /* Find the element in the circular chain that precedes SUBELT. */
1641 subelt_prev
= subelt
;
1642 while (subelt_prev
->related_value
!= subelt
)
1643 subelt_prev
= subelt_prev
->related_value
;
1644 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1645 This way the element that follows SUBELT is the oldest one. */
1646 elt
->related_value
= subelt_prev
->related_value
;
1647 subelt_prev
->related_value
= elt
;
1654 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1655 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1656 the two classes equivalent.
1658 CLASS1 will be the surviving class; CLASS2 should not be used after this
1661 Any invalid entries in CLASS2 will not be copied. */
1664 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1666 struct table_elt
*elt
, *next
, *new;
1668 /* Ensure we start with the head of the classes. */
1669 class1
= class1
->first_same_value
;
1670 class2
= class2
->first_same_value
;
1672 /* If they were already equal, forget it. */
1673 if (class1
== class2
)
1676 for (elt
= class2
; elt
; elt
= next
)
1680 enum machine_mode mode
= elt
->mode
;
1682 next
= elt
->next_same_value
;
1684 /* Remove old entry, make a new one in CLASS1's class.
1685 Don't do this for invalid entries as we cannot find their
1686 hash code (it also isn't necessary). */
1687 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1689 bool need_rehash
= false;
1691 hash_arg_in_memory
= 0;
1692 hash
= HASH (exp
, mode
);
1696 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1697 delete_reg_equiv (REGNO (exp
));
1700 remove_from_table (elt
, hash
);
1702 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1704 rehash_using_reg (exp
);
1705 hash
= HASH (exp
, mode
);
1707 new = insert (exp
, class1
, hash
, mode
);
1708 new->in_memory
= hash_arg_in_memory
;
1713 /* Flush the entire hash table. */
1716 flush_hash_table (void)
1719 struct table_elt
*p
;
1721 for (i
= 0; i
< HASH_SIZE
; i
++)
1722 for (p
= table
[i
]; p
; p
= table
[i
])
1724 /* Note that invalidate can remove elements
1725 after P in the current hash chain. */
1727 invalidate (p
->exp
, p
->mode
);
1729 remove_from_table (p
, i
);
1733 /* Function called for each rtx to check whether true dependence exist. */
1734 struct check_dependence_data
1736 enum machine_mode mode
;
1742 check_dependence (rtx
*x
, void *data
)
1744 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1745 if (*x
&& MEM_P (*x
))
1746 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1752 /* Remove from the hash table, or mark as invalid, all expressions whose
1753 values could be altered by storing in X. X is a register, a subreg, or
1754 a memory reference with nonvarying address (because, when a memory
1755 reference with a varying address is stored in, all memory references are
1756 removed by invalidate_memory so specific invalidation is superfluous).
1757 FULL_MODE, if not VOIDmode, indicates that this much should be
1758 invalidated instead of just the amount indicated by the mode of X. This
1759 is only used for bitfield stores into memory.
1761 A nonvarying address may be just a register or just a symbol reference,
1762 or it may be either of those plus a numeric offset. */
1765 invalidate (rtx x
, enum machine_mode full_mode
)
1768 struct table_elt
*p
;
1771 switch (GET_CODE (x
))
1775 /* If X is a register, dependencies on its contents are recorded
1776 through the qty number mechanism. Just change the qty number of
1777 the register, mark it as invalid for expressions that refer to it,
1778 and remove it itself. */
1779 unsigned int regno
= REGNO (x
);
1780 unsigned int hash
= HASH (x
, GET_MODE (x
));
1782 /* Remove REGNO from any quantity list it might be on and indicate
1783 that its value might have changed. If it is a pseudo, remove its
1784 entry from the hash table.
1786 For a hard register, we do the first two actions above for any
1787 additional hard registers corresponding to X. Then, if any of these
1788 registers are in the table, we must remove any REG entries that
1789 overlap these registers. */
1791 delete_reg_equiv (regno
);
1793 SUBREG_TICKED (regno
) = -1;
1795 if (regno
>= FIRST_PSEUDO_REGISTER
)
1797 /* Because a register can be referenced in more than one mode,
1798 we might have to remove more than one table entry. */
1799 struct table_elt
*elt
;
1801 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1802 remove_from_table (elt
, hash
);
1806 HOST_WIDE_INT in_table
1807 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1808 unsigned int endregno
1809 = regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1810 unsigned int tregno
, tendregno
, rn
;
1811 struct table_elt
*p
, *next
;
1813 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1815 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1817 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1818 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1819 delete_reg_equiv (rn
);
1821 SUBREG_TICKED (rn
) = -1;
1825 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1826 for (p
= table
[hash
]; p
; p
= next
)
1828 next
= p
->next_same_hash
;
1831 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1834 tregno
= REGNO (p
->exp
);
1836 = tregno
+ hard_regno_nregs
[tregno
][GET_MODE (p
->exp
)];
1837 if (tendregno
> regno
&& tregno
< endregno
)
1838 remove_from_table (p
, hash
);
1845 invalidate (SUBREG_REG (x
), VOIDmode
);
1849 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1850 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1854 /* This is part of a disjoint return value; extract the location in
1855 question ignoring the offset. */
1856 invalidate (XEXP (x
, 0), VOIDmode
);
1860 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1861 /* Calculate the canonical version of X here so that
1862 true_dependence doesn't generate new RTL for X on each call. */
1865 /* Remove all hash table elements that refer to overlapping pieces of
1867 if (full_mode
== VOIDmode
)
1868 full_mode
= GET_MODE (x
);
1870 for (i
= 0; i
< HASH_SIZE
; i
++)
1872 struct table_elt
*next
;
1874 for (p
= table
[i
]; p
; p
= next
)
1876 next
= p
->next_same_hash
;
1879 struct check_dependence_data d
;
1881 /* Just canonicalize the expression once;
1882 otherwise each time we call invalidate
1883 true_dependence will canonicalize the
1884 expression again. */
1886 p
->canon_exp
= canon_rtx (p
->exp
);
1890 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1891 remove_from_table (p
, i
);
1902 /* Remove all expressions that refer to register REGNO,
1903 since they are already invalid, and we are about to
1904 mark that register valid again and don't want the old
1905 expressions to reappear as valid. */
1908 remove_invalid_refs (unsigned int regno
)
1911 struct table_elt
*p
, *next
;
1913 for (i
= 0; i
< HASH_SIZE
; i
++)
1914 for (p
= table
[i
]; p
; p
= next
)
1916 next
= p
->next_same_hash
;
1918 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1919 remove_from_table (p
, i
);
1923 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1926 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1927 enum machine_mode mode
)
1930 struct table_elt
*p
, *next
;
1931 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1933 for (i
= 0; i
< HASH_SIZE
; i
++)
1934 for (p
= table
[i
]; p
; p
= next
)
1937 next
= p
->next_same_hash
;
1940 && (GET_CODE (exp
) != SUBREG
1941 || !REG_P (SUBREG_REG (exp
))
1942 || REGNO (SUBREG_REG (exp
)) != regno
1943 || (((SUBREG_BYTE (exp
)
1944 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1945 && SUBREG_BYTE (exp
) <= end
))
1946 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1947 remove_from_table (p
, i
);
1951 /* Recompute the hash codes of any valid entries in the hash table that
1952 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1954 This is called when we make a jump equivalence. */
1957 rehash_using_reg (rtx x
)
1960 struct table_elt
*p
, *next
;
1963 if (GET_CODE (x
) == SUBREG
)
1966 /* If X is not a register or if the register is known not to be in any
1967 valid entries in the table, we have no work to do. */
1970 || REG_IN_TABLE (REGNO (x
)) < 0
1971 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1974 /* Scan all hash chains looking for valid entries that mention X.
1975 If we find one and it is in the wrong hash chain, move it. */
1977 for (i
= 0; i
< HASH_SIZE
; i
++)
1978 for (p
= table
[i
]; p
; p
= next
)
1980 next
= p
->next_same_hash
;
1981 if (reg_mentioned_p (x
, p
->exp
)
1982 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
1983 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
1985 if (p
->next_same_hash
)
1986 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1988 if (p
->prev_same_hash
)
1989 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1991 table
[i
] = p
->next_same_hash
;
1993 p
->next_same_hash
= table
[hash
];
1994 p
->prev_same_hash
= 0;
1996 table
[hash
]->prev_same_hash
= p
;
2002 /* Remove from the hash table any expression that is a call-clobbered
2003 register. Also update their TICK values. */
2006 invalidate_for_call (void)
2008 unsigned int regno
, endregno
;
2011 struct table_elt
*p
, *next
;
2014 /* Go through all the hard registers. For each that is clobbered in
2015 a CALL_INSN, remove the register from quantity chains and update
2016 reg_tick if defined. Also see if any of these registers is currently
2019 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2020 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2022 delete_reg_equiv (regno
);
2023 if (REG_TICK (regno
) >= 0)
2026 SUBREG_TICKED (regno
) = -1;
2029 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2032 /* In the case where we have no call-clobbered hard registers in the
2033 table, we are done. Otherwise, scan the table and remove any
2034 entry that overlaps a call-clobbered register. */
2037 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2038 for (p
= table
[hash
]; p
; p
= next
)
2040 next
= p
->next_same_hash
;
2043 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2046 regno
= REGNO (p
->exp
);
2047 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (p
->exp
)];
2049 for (i
= regno
; i
< endregno
; i
++)
2050 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2052 remove_from_table (p
, hash
);
2058 /* Given an expression X of type CONST,
2059 and ELT which is its table entry (or 0 if it
2060 is not in the hash table),
2061 return an alternate expression for X as a register plus integer.
2062 If none can be found, return 0. */
2065 use_related_value (rtx x
, struct table_elt
*elt
)
2067 struct table_elt
*relt
= 0;
2068 struct table_elt
*p
, *q
;
2069 HOST_WIDE_INT offset
;
2071 /* First, is there anything related known?
2072 If we have a table element, we can tell from that.
2073 Otherwise, must look it up. */
2075 if (elt
!= 0 && elt
->related_value
!= 0)
2077 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2079 rtx subexp
= get_related_value (x
);
2081 relt
= lookup (subexp
,
2082 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2089 /* Search all related table entries for one that has an
2090 equivalent register. */
2095 /* This loop is strange in that it is executed in two different cases.
2096 The first is when X is already in the table. Then it is searching
2097 the RELATED_VALUE list of X's class (RELT). The second case is when
2098 X is not in the table. Then RELT points to a class for the related
2101 Ensure that, whatever case we are in, that we ignore classes that have
2102 the same value as X. */
2104 if (rtx_equal_p (x
, p
->exp
))
2107 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2114 p
= p
->related_value
;
2116 /* We went all the way around, so there is nothing to be found.
2117 Alternatively, perhaps RELT was in the table for some other reason
2118 and it has no related values recorded. */
2119 if (p
== relt
|| p
== 0)
2126 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2127 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2128 return plus_constant (q
->exp
, offset
);
2131 /* Hash a string. Just add its bytes up. */
2132 static inline unsigned
2133 hash_rtx_string (const char *ps
)
2136 const unsigned char *p
= (const unsigned char *) ps
;
2145 /* Hash an rtx. We are careful to make sure the value is never negative.
2146 Equivalent registers hash identically.
2147 MODE is used in hashing for CONST_INTs only;
2148 otherwise the mode of X is used.
2150 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2152 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2153 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2155 Note that cse_insn knows that the hash code of a MEM expression
2156 is just (int) MEM plus the hash code of the address. */
2159 hash_rtx (rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2160 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2167 /* Used to turn recursion into iteration. We can't rely on GCC's
2168 tail-recursion elimination since we need to keep accumulating values
2174 code
= GET_CODE (x
);
2179 unsigned int regno
= REGNO (x
);
2181 if (!reload_completed
)
2183 /* On some machines, we can't record any non-fixed hard register,
2184 because extending its life will cause reload problems. We
2185 consider ap, fp, sp, gp to be fixed for this purpose.
2187 We also consider CCmode registers to be fixed for this purpose;
2188 failure to do so leads to failure to simplify 0<100 type of
2191 On all machines, we can't record any global registers.
2192 Nor should we record any register that is in a small
2193 class, as defined by CLASS_LIKELY_SPILLED_P. */
2196 if (regno
>= FIRST_PSEUDO_REGISTER
)
2198 else if (x
== frame_pointer_rtx
2199 || x
== hard_frame_pointer_rtx
2200 || x
== arg_pointer_rtx
2201 || x
== stack_pointer_rtx
2202 || x
== pic_offset_table_rtx
)
2204 else if (global_regs
[regno
])
2206 else if (fixed_regs
[regno
])
2208 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2210 else if (SMALL_REGISTER_CLASSES
)
2212 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2219 *do_not_record_p
= 1;
2224 hash
+= ((unsigned int) REG
<< 7);
2225 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2229 /* We handle SUBREG of a REG specially because the underlying
2230 reg changes its hash value with every value change; we don't
2231 want to have to forget unrelated subregs when one subreg changes. */
2234 if (REG_P (SUBREG_REG (x
)))
2236 hash
+= (((unsigned int) SUBREG
<< 7)
2237 + REGNO (SUBREG_REG (x
))
2238 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2245 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2246 + (unsigned int) INTVAL (x
));
2250 /* This is like the general case, except that it only counts
2251 the integers representing the constant. */
2252 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2253 if (GET_MODE (x
) != VOIDmode
)
2254 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2256 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2257 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2265 units
= CONST_VECTOR_NUNITS (x
);
2267 for (i
= 0; i
< units
; ++i
)
2269 elt
= CONST_VECTOR_ELT (x
, i
);
2270 hash
+= hash_rtx (elt
, GET_MODE (elt
), do_not_record_p
,
2271 hash_arg_in_memory_p
, have_reg_qty
);
2277 /* Assume there is only one rtx object for any given label. */
2279 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2280 differences and differences between each stage's debugging dumps. */
2281 hash
+= (((unsigned int) LABEL_REF
<< 7)
2282 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2287 /* Don't hash on the symbol's address to avoid bootstrap differences.
2288 Different hash values may cause expressions to be recorded in
2289 different orders and thus different registers to be used in the
2290 final assembler. This also avoids differences in the dump files
2291 between various stages. */
2293 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2296 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2298 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2303 /* We don't record if marked volatile or if BLKmode since we don't
2304 know the size of the move. */
2305 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2307 *do_not_record_p
= 1;
2310 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2311 *hash_arg_in_memory_p
= 1;
2313 /* Now that we have already found this special case,
2314 might as well speed it up as much as possible. */
2315 hash
+= (unsigned) MEM
;
2320 /* A USE that mentions non-volatile memory needs special
2321 handling since the MEM may be BLKmode which normally
2322 prevents an entry from being made. Pure calls are
2323 marked by a USE which mentions BLKmode memory.
2324 See calls.c:emit_call_1. */
2325 if (MEM_P (XEXP (x
, 0))
2326 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2328 hash
+= (unsigned) USE
;
2331 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2332 *hash_arg_in_memory_p
= 1;
2334 /* Now that we have already found this special case,
2335 might as well speed it up as much as possible. */
2336 hash
+= (unsigned) MEM
;
2351 case UNSPEC_VOLATILE
:
2352 *do_not_record_p
= 1;
2356 if (MEM_VOLATILE_P (x
))
2358 *do_not_record_p
= 1;
2363 /* We don't want to take the filename and line into account. */
2364 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2365 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2366 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2367 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2369 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2371 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2373 hash
+= (hash_rtx (ASM_OPERANDS_INPUT (x
, i
),
2374 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2375 do_not_record_p
, hash_arg_in_memory_p
,
2378 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2381 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2382 x
= ASM_OPERANDS_INPUT (x
, 0);
2383 mode
= GET_MODE (x
);
2395 i
= GET_RTX_LENGTH (code
) - 1;
2396 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2397 fmt
= GET_RTX_FORMAT (code
);
2403 /* If we are about to do the last recursive call
2404 needed at this level, change it into iteration.
2405 This function is called enough to be worth it. */
2412 hash
+= hash_rtx (XEXP (x
, i
), 0, do_not_record_p
,
2413 hash_arg_in_memory_p
, have_reg_qty
);
2417 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2418 hash
+= hash_rtx (XVECEXP (x
, i
, j
), 0, do_not_record_p
,
2419 hash_arg_in_memory_p
, have_reg_qty
);
2423 hash
+= hash_rtx_string (XSTR (x
, i
));
2427 hash
+= (unsigned int) XINT (x
, i
);
2442 /* Hash an rtx X for cse via hash_rtx.
2443 Stores 1 in do_not_record if any subexpression is volatile.
2444 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2445 does not have the RTX_UNCHANGING_P bit set. */
2447 static inline unsigned
2448 canon_hash (rtx x
, enum machine_mode mode
)
2450 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2453 /* Like canon_hash but with no side effects, i.e. do_not_record
2454 and hash_arg_in_memory are not changed. */
2456 static inline unsigned
2457 safe_hash (rtx x
, enum machine_mode mode
)
2459 int dummy_do_not_record
;
2460 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2463 /* Return 1 iff X and Y would canonicalize into the same thing,
2464 without actually constructing the canonicalization of either one.
2465 If VALIDATE is nonzero,
2466 we assume X is an expression being processed from the rtl
2467 and Y was found in the hash table. We check register refs
2468 in Y for being marked as valid.
2470 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2473 exp_equiv_p (rtx x
, rtx y
, int validate
, bool for_gcse
)
2479 /* Note: it is incorrect to assume an expression is equivalent to itself
2480 if VALIDATE is nonzero. */
2481 if (x
== y
&& !validate
)
2484 if (x
== 0 || y
== 0)
2487 code
= GET_CODE (x
);
2488 if (code
!= GET_CODE (y
))
2491 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2492 if (GET_MODE (x
) != GET_MODE (y
))
2503 return XEXP (x
, 0) == XEXP (y
, 0);
2506 return XSTR (x
, 0) == XSTR (y
, 0);
2510 return REGNO (x
) == REGNO (y
);
2513 unsigned int regno
= REGNO (y
);
2515 unsigned int endregno
2516 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2517 : hard_regno_nregs
[regno
][GET_MODE (y
)]);
2519 /* If the quantities are not the same, the expressions are not
2520 equivalent. If there are and we are not to validate, they
2521 are equivalent. Otherwise, ensure all regs are up-to-date. */
2523 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2529 for (i
= regno
; i
< endregno
; i
++)
2530 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2539 /* Can't merge two expressions in different alias sets, since we
2540 can decide that the expression is transparent in a block when
2541 it isn't, due to it being set with the different alias set. */
2542 if (MEM_ALIAS_SET (x
) != MEM_ALIAS_SET (y
))
2545 /* A volatile mem should not be considered equivalent to any
2547 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2552 /* For commutative operations, check both orders. */
2560 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2562 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2563 validate
, for_gcse
))
2564 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2566 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2567 validate
, for_gcse
)));
2570 /* We don't use the generic code below because we want to
2571 disregard filename and line numbers. */
2573 /* A volatile asm isn't equivalent to any other. */
2574 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2577 if (GET_MODE (x
) != GET_MODE (y
)
2578 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2579 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2580 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2581 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2582 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2585 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2587 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2588 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2589 ASM_OPERANDS_INPUT (y
, i
),
2591 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2592 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2602 /* Compare the elements. If any pair of corresponding elements
2603 fail to match, return 0 for the whole thing. */
2605 fmt
= GET_RTX_FORMAT (code
);
2606 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2611 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2612 validate
, for_gcse
))
2617 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2619 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2620 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2621 validate
, for_gcse
))
2626 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2631 if (XINT (x
, i
) != XINT (y
, i
))
2636 if (XWINT (x
, i
) != XWINT (y
, i
))
2652 /* Return 1 if X has a value that can vary even between two
2653 executions of the program. 0 means X can be compared reliably
2654 against certain constants or near-constants. */
2657 cse_rtx_varies_p (rtx x
, int from_alias
)
2659 /* We need not check for X and the equivalence class being of the same
2660 mode because if X is equivalent to a constant in some mode, it
2661 doesn't vary in any mode. */
2664 && REGNO_QTY_VALID_P (REGNO (x
)))
2666 int x_q
= REG_QTY (REGNO (x
));
2667 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2669 if (GET_MODE (x
) == x_ent
->mode
2670 && x_ent
->const_rtx
!= NULL_RTX
)
2674 if (GET_CODE (x
) == PLUS
2675 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2676 && REG_P (XEXP (x
, 0))
2677 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2679 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2680 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2682 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2683 && x0_ent
->const_rtx
!= NULL_RTX
)
2687 /* This can happen as the result of virtual register instantiation, if
2688 the initial constant is too large to be a valid address. This gives
2689 us a three instruction sequence, load large offset into a register,
2690 load fp minus a constant into a register, then a MEM which is the
2691 sum of the two `constant' registers. */
2692 if (GET_CODE (x
) == PLUS
2693 && REG_P (XEXP (x
, 0))
2694 && REG_P (XEXP (x
, 1))
2695 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2696 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2698 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2699 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2700 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2701 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2703 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2704 && x0_ent
->const_rtx
!= NULL_RTX
2705 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2706 && x1_ent
->const_rtx
!= NULL_RTX
)
2710 return rtx_varies_p (x
, from_alias
);
2713 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2714 the result if necessary. INSN is as for canon_reg. */
2717 validate_canon_reg (rtx
*xloc
, rtx insn
)
2719 rtx
new = canon_reg (*xloc
, insn
);
2722 /* If replacing pseudo with hard reg or vice versa, ensure the
2723 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2724 if (insn
!= 0 && new != 0
2725 && REG_P (new) && REG_P (*xloc
)
2726 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2727 != (REGNO (*xloc
) < FIRST_PSEUDO_REGISTER
))
2728 || GET_MODE (new) != GET_MODE (*xloc
)
2729 || (insn_code
= recog_memoized (insn
)) < 0
2730 || insn_data
[insn_code
].n_dups
> 0))
2731 validate_change (insn
, xloc
, new, 1);
2736 /* Canonicalize an expression:
2737 replace each register reference inside it
2738 with the "oldest" equivalent register.
2740 If INSN is nonzero and we are replacing a pseudo with a hard register
2741 or vice versa, validate_change is used to ensure that INSN remains valid
2742 after we make our substitution. The calls are made with IN_GROUP nonzero
2743 so apply_change_group must be called upon the outermost return from this
2744 function (unless INSN is zero). The result of apply_change_group can
2745 generally be discarded since the changes we are making are optional. */
2748 canon_reg (rtx x
, rtx insn
)
2757 code
= GET_CODE (x
);
2776 struct qty_table_elem
*ent
;
2778 /* Never replace a hard reg, because hard regs can appear
2779 in more than one machine mode, and we must preserve the mode
2780 of each occurrence. Also, some hard regs appear in
2781 MEMs that are shared and mustn't be altered. Don't try to
2782 replace any reg that maps to a reg of class NO_REGS. */
2783 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2784 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2787 q
= REG_QTY (REGNO (x
));
2788 ent
= &qty_table
[q
];
2789 first
= ent
->first_reg
;
2790 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2791 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2792 : gen_rtx_REG (ent
->mode
, first
));
2799 fmt
= GET_RTX_FORMAT (code
);
2800 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2805 validate_canon_reg (&XEXP (x
, i
), insn
);
2806 else if (fmt
[i
] == 'E')
2807 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2808 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2814 /* LOC is a location within INSN that is an operand address (the contents of
2815 a MEM). Find the best equivalent address to use that is valid for this
2818 On most CISC machines, complicated address modes are costly, and rtx_cost
2819 is a good approximation for that cost. However, most RISC machines have
2820 only a few (usually only one) memory reference formats. If an address is
2821 valid at all, it is often just as cheap as any other address. Hence, for
2822 RISC machines, we use `address_cost' to compare the costs of various
2823 addresses. For two addresses of equal cost, choose the one with the
2824 highest `rtx_cost' value as that has the potential of eliminating the
2825 most insns. For equal costs, we choose the first in the equivalence
2826 class. Note that we ignore the fact that pseudo registers are cheaper than
2827 hard registers here because we would also prefer the pseudo registers. */
2830 find_best_addr (rtx insn
, rtx
*loc
, enum machine_mode mode
)
2832 struct table_elt
*elt
;
2834 struct table_elt
*p
;
2835 int found_better
= 1;
2836 int save_do_not_record
= do_not_record
;
2837 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2842 /* Do not try to replace constant addresses or addresses of local and
2843 argument slots. These MEM expressions are made only once and inserted
2844 in many instructions, as well as being used to control symbol table
2845 output. It is not safe to clobber them.
2847 There are some uncommon cases where the address is already in a register
2848 for some reason, but we cannot take advantage of that because we have
2849 no easy way to unshare the MEM. In addition, looking up all stack
2850 addresses is costly. */
2851 if ((GET_CODE (addr
) == PLUS
2852 && REG_P (XEXP (addr
, 0))
2853 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2854 && (regno
= REGNO (XEXP (addr
, 0)),
2855 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2856 || regno
== ARG_POINTER_REGNUM
))
2858 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2859 || regno
== HARD_FRAME_POINTER_REGNUM
2860 || regno
== ARG_POINTER_REGNUM
))
2861 || CONSTANT_ADDRESS_P (addr
))
2864 /* If this address is not simply a register, try to fold it. This will
2865 sometimes simplify the expression. Many simplifications
2866 will not be valid, but some, usually applying the associative rule, will
2867 be valid and produce better code. */
2870 rtx folded
= canon_for_address (fold_rtx (addr
, NULL_RTX
));
2874 int addr_folded_cost
= address_cost (folded
, mode
);
2875 int addr_cost
= address_cost (addr
, mode
);
2877 if ((addr_folded_cost
< addr_cost
2878 || (addr_folded_cost
== addr_cost
2879 /* ??? The rtx_cost comparison is left over from an older
2880 version of this code. It is probably no longer helpful.*/
2881 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2882 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2883 && validate_change (insn
, loc
, folded
, 0))
2888 /* If this address is not in the hash table, we can't look for equivalences
2889 of the whole address. Also, ignore if volatile. */
2892 hash
= HASH (addr
, Pmode
);
2893 addr_volatile
= do_not_record
;
2894 do_not_record
= save_do_not_record
;
2895 hash_arg_in_memory
= save_hash_arg_in_memory
;
2900 elt
= lookup (addr
, hash
, Pmode
);
2904 /* We need to find the best (under the criteria documented above) entry
2905 in the class that is valid. We use the `flag' field to indicate
2906 choices that were invalid and iterate until we can't find a better
2907 one that hasn't already been tried. */
2909 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2912 while (found_better
)
2914 int best_addr_cost
= address_cost (*loc
, mode
);
2915 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2917 struct table_elt
*best_elt
= elt
;
2920 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2924 || exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2925 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2926 || (exp_cost
== best_addr_cost
2927 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2930 best_addr_cost
= exp_cost
;
2931 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2938 if (validate_change (insn
, loc
,
2939 canon_reg (copy_rtx (best_elt
->exp
),
2948 /* If the address is a binary operation with the first operand a register
2949 and the second a constant, do the same as above, but looking for
2950 equivalences of the register. Then try to simplify before checking for
2951 the best address to use. This catches a few cases: First is when we
2952 have REG+const and the register is another REG+const. We can often merge
2953 the constants and eliminate one insn and one register. It may also be
2954 that a machine has a cheap REG+REG+const. Finally, this improves the
2955 code on the Alpha for unaligned byte stores. */
2957 if (flag_expensive_optimizations
2958 && ARITHMETIC_P (*loc
)
2959 && REG_P (XEXP (*loc
, 0)))
2961 rtx op1
= XEXP (*loc
, 1);
2964 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2965 do_not_record
= save_do_not_record
;
2966 hash_arg_in_memory
= save_hash_arg_in_memory
;
2968 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2972 /* We need to find the best (under the criteria documented above) entry
2973 in the class that is valid. We use the `flag' field to indicate
2974 choices that were invalid and iterate until we can't find a better
2975 one that hasn't already been tried. */
2977 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2980 while (found_better
)
2982 int best_addr_cost
= address_cost (*loc
, mode
);
2983 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2984 struct table_elt
*best_elt
= elt
;
2985 rtx best_rtx
= *loc
;
2988 /* This is at worst case an O(n^2) algorithm, so limit our search
2989 to the first 32 elements on the list. This avoids trouble
2990 compiling code with very long basic blocks that can easily
2991 call simplify_gen_binary so many times that we run out of
2995 for (p
= elt
->first_same_value
, count
= 0;
2997 p
= p
->next_same_value
, count
++)
3000 || exp_equiv_p (p
->exp
, p
->exp
, 1, false)))
3002 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
3006 /* Get the canonical version of the address so we can accept
3008 new = canon_for_address (new);
3010 new_cost
= address_cost (new, mode
);
3012 if (new_cost
< best_addr_cost
3013 || (new_cost
== best_addr_cost
3014 && (COST (new) + 1) >> 1 > best_rtx_cost
))
3017 best_addr_cost
= new_cost
;
3018 best_rtx_cost
= (COST (new) + 1) >> 1;
3026 if (validate_change (insn
, loc
,
3027 canon_reg (copy_rtx (best_rtx
),
3037 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3038 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3039 what values are being compared.
3041 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3042 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3043 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3044 compared to produce cc0.
3046 The return value is the comparison operator and is either the code of
3047 A or the code corresponding to the inverse of the comparison. */
3049 static enum rtx_code
3050 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
3051 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
3055 arg1
= *parg1
, arg2
= *parg2
;
3057 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3059 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
3061 /* Set nonzero when we find something of interest. */
3063 int reverse_code
= 0;
3064 struct table_elt
*p
= 0;
3066 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3067 On machines with CC0, this is the only case that can occur, since
3068 fold_rtx will return the COMPARE or item being compared with zero
3071 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
3074 /* If ARG1 is a comparison operator and CODE is testing for
3075 STORE_FLAG_VALUE, get the inner arguments. */
3077 else if (COMPARISON_P (arg1
))
3079 #ifdef FLOAT_STORE_FLAG_VALUE
3080 REAL_VALUE_TYPE fsfv
;
3084 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3085 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3086 #ifdef FLOAT_STORE_FLAG_VALUE
3087 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3088 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3089 REAL_VALUE_NEGATIVE (fsfv
)))
3094 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3095 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3096 #ifdef FLOAT_STORE_FLAG_VALUE
3097 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3098 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3099 REAL_VALUE_NEGATIVE (fsfv
)))
3102 x
= arg1
, reverse_code
= 1;
3105 /* ??? We could also check for
3107 (ne (and (eq (...) (const_int 1))) (const_int 0))
3109 and related forms, but let's wait until we see them occurring. */
3112 /* Look up ARG1 in the hash table and see if it has an equivalence
3113 that lets us see what is being compared. */
3114 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3117 p
= p
->first_same_value
;
3119 /* If what we compare is already known to be constant, that is as
3121 We need to break the loop in this case, because otherwise we
3122 can have an infinite loop when looking at a reg that is known
3123 to be a constant which is the same as a comparison of a reg
3124 against zero which appears later in the insn stream, which in
3125 turn is constant and the same as the comparison of the first reg
3131 for (; p
; p
= p
->next_same_value
)
3133 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3134 #ifdef FLOAT_STORE_FLAG_VALUE
3135 REAL_VALUE_TYPE fsfv
;
3138 /* If the entry isn't valid, skip it. */
3139 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3142 if (GET_CODE (p
->exp
) == COMPARE
3143 /* Another possibility is that this machine has a compare insn
3144 that includes the comparison code. In that case, ARG1 would
3145 be equivalent to a comparison operation that would set ARG1 to
3146 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3147 ORIG_CODE is the actual comparison being done; if it is an EQ,
3148 we must reverse ORIG_CODE. On machine with a negative value
3149 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3152 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3153 && (GET_MODE_BITSIZE (inner_mode
)
3154 <= HOST_BITS_PER_WIDE_INT
)
3155 && (STORE_FLAG_VALUE
3156 & ((HOST_WIDE_INT
) 1
3157 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3158 #ifdef FLOAT_STORE_FLAG_VALUE
3160 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3161 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3162 REAL_VALUE_NEGATIVE (fsfv
)))
3165 && COMPARISON_P (p
->exp
)))
3170 else if ((code
== EQ
3172 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3173 && (GET_MODE_BITSIZE (inner_mode
)
3174 <= HOST_BITS_PER_WIDE_INT
)
3175 && (STORE_FLAG_VALUE
3176 & ((HOST_WIDE_INT
) 1
3177 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3178 #ifdef FLOAT_STORE_FLAG_VALUE
3180 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3181 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3182 REAL_VALUE_NEGATIVE (fsfv
)))
3185 && COMPARISON_P (p
->exp
))
3192 /* If this non-trapping address, e.g. fp + constant, the
3193 equivalent is a better operand since it may let us predict
3194 the value of the comparison. */
3195 else if (!rtx_addr_can_trap_p (p
->exp
))
3202 /* If we didn't find a useful equivalence for ARG1, we are done.
3203 Otherwise, set up for the next iteration. */
3207 /* If we need to reverse the comparison, make sure that that is
3208 possible -- we can't necessarily infer the value of GE from LT
3209 with floating-point operands. */
3212 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3213 if (reversed
== UNKNOWN
)
3218 else if (COMPARISON_P (x
))
3219 code
= GET_CODE (x
);
3220 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3223 /* Return our results. Return the modes from before fold_rtx
3224 because fold_rtx might produce const_int, and then it's too late. */
3225 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3226 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3234 fold_rtx_subreg (rtx x
, rtx insn
)
3236 enum machine_mode mode
= GET_MODE (x
);
3241 /* See if we previously assigned a constant value to this SUBREG. */
3242 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3243 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3246 /* If this is a paradoxical SUBREG, we have no idea what value the
3247 extra bits would have. However, if the operand is equivalent to
3248 a SUBREG whose operand is the same as our mode, and all the modes
3249 are within a word, we can just use the inner operand because
3250 these SUBREGs just say how to treat the register.
3252 Similarly if we find an integer constant. */
3254 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3256 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3257 struct table_elt
*elt
;
3259 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3260 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3261 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3263 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3265 if (CONSTANT_P (elt
->exp
)
3266 && GET_MODE (elt
->exp
) == VOIDmode
)
3269 if (GET_CODE (elt
->exp
) == SUBREG
3270 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3271 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3272 return copy_rtx (SUBREG_REG (elt
->exp
));
3278 /* Fold SUBREG_REG. If it changed, see if we can simplify the
3279 SUBREG. We might be able to if the SUBREG is extracting a single
3280 word in an integral mode or extracting the low part. */
3282 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3283 const_arg0
= equiv_constant (folded_arg0
);
3285 folded_arg0
= const_arg0
;
3287 if (folded_arg0
!= SUBREG_REG (x
))
3289 new = simplify_subreg (mode
, folded_arg0
,
3290 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3295 if (REG_P (folded_arg0
)
3296 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
3298 struct table_elt
*elt
;
3300 elt
= lookup (folded_arg0
,
3301 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3302 GET_MODE (folded_arg0
));
3305 elt
= elt
->first_same_value
;
3307 if (subreg_lowpart_p (x
))
3308 /* If this is a narrowing SUBREG and our operand is a REG, see
3309 if we can find an equivalence for REG that is an arithmetic
3310 operation in a wider mode where both operands are
3311 paradoxical SUBREGs from objects of our result mode. In
3312 that case, we couldn-t report an equivalent value for that
3313 operation, since we don't know what the extra bits will be.
3314 But we can find an equivalence for this SUBREG by folding
3315 that operation in the narrow mode. This allows us to fold
3316 arithmetic in narrow modes when the machine only supports
3317 word-sized arithmetic.
3319 Also look for a case where we have a SUBREG whose operand
3320 is the same as our result. If both modes are smaller than
3321 a word, we are simply interpreting a register in different
3322 modes and we can use the inner value. */
3324 for (; elt
; elt
= elt
->next_same_value
)
3326 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3328 /* Just check for unary and binary operations. */
3329 if (UNARY_P (elt
->exp
)
3330 && eltcode
!= SIGN_EXTEND
3331 && eltcode
!= ZERO_EXTEND
3332 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3333 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3334 && (GET_MODE_CLASS (mode
)
3335 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3337 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3339 if (!REG_P (op0
) && ! CONSTANT_P (op0
))
3340 op0
= fold_rtx (op0
, NULL_RTX
);
3342 op0
= equiv_constant (op0
);
3344 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3347 else if (ARITHMETIC_P (elt
->exp
)
3348 && eltcode
!= DIV
&& eltcode
!= MOD
3349 && eltcode
!= UDIV
&& eltcode
!= UMOD
3350 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3351 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3352 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3353 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3355 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3356 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3357 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3359 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3361 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3362 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3364 if (op0
&& !REG_P (op0
) && ! CONSTANT_P (op0
))
3365 op0
= fold_rtx (op0
, NULL_RTX
);
3368 op0
= equiv_constant (op0
);
3370 if (op1
&& !REG_P (op1
) && ! CONSTANT_P (op1
))
3371 op1
= fold_rtx (op1
, NULL_RTX
);
3374 op1
= equiv_constant (op1
);
3376 /* If we are looking for the low SImode part of
3377 (ashift:DI c (const_int 32)), it doesn't work to
3378 compute that in SImode, because a 32-bit shift in
3379 SImode is unpredictable. We know the value is
3382 && GET_CODE (elt
->exp
) == ASHIFT
3383 && GET_CODE (op1
) == CONST_INT
3384 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3387 < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3388 /* If the count fits in the inner mode's width,
3389 but exceeds the outer mode's width, the value
3390 will get truncated to 0 by the subreg. */
3391 new = CONST0_RTX (mode
);
3393 /* If the count exceeds even the inner mode's width,
3394 don't fold this expression. */
3397 else if (op0
&& op1
)
3398 new = simplify_binary_operation (GET_CODE (elt
->exp
),
3402 else if (GET_CODE (elt
->exp
) == SUBREG
3403 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3404 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3406 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3407 new = copy_rtx (SUBREG_REG (elt
->exp
));
3413 /* A SUBREG resulting from a zero extension may fold to zero
3414 if it extracts higher bits than the ZERO_EXTEND's source
3415 bits. FIXME: if combine tried to, er, combine these
3416 instructions, this transformation may be moved to
3418 for (; elt
; elt
= elt
->next_same_value
)
3420 if (GET_CODE (elt
->exp
) == ZERO_EXTEND
3422 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt
->exp
, 0))))
3423 return CONST0_RTX (mode
);
3433 fold_rtx_mem (rtx x
, rtx insn
)
3435 enum machine_mode mode
= GET_MODE (x
);
3438 /* If we are not actually processing an insn, don't try to find the
3439 best address. Not only don't we care, but we could modify the
3440 MEM in an invalid way since we have no insn to validate
3443 find_best_addr (insn
, &XEXP (x
, 0), mode
);
3446 /* Even if we don't fold in the insn itself, we can safely do so
3447 here, in hopes of getting a constant. */
3448 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3450 HOST_WIDE_INT offset
= 0;
3453 && REGNO_QTY_VALID_P (REGNO (addr
)))
3455 int addr_q
= REG_QTY (REGNO (addr
));
3456 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3458 if (GET_MODE (addr
) == addr_ent
->mode
3459 && addr_ent
->const_rtx
!= NULL_RTX
)
3460 addr
= addr_ent
->const_rtx
;
3463 /* If address is constant, split it into a base and integer
3465 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3467 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3468 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3470 base
= XEXP (XEXP (addr
, 0), 0);
3471 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3473 else if (GET_CODE (addr
) == LO_SUM
3474 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3475 base
= XEXP (addr
, 1);
3477 /* If this is a constant pool reference, we can fold it into its
3478 constant to allow better value tracking. */
3479 if (base
&& GET_CODE (base
) == SYMBOL_REF
3480 && CONSTANT_POOL_ADDRESS_P (base
))
3482 rtx constant
= get_pool_constant (base
);
3483 enum machine_mode const_mode
= get_pool_mode (base
);
3486 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3488 constant_pool_entries_cost
= COST (constant
);
3489 constant_pool_entries_regcost
= approx_reg_cost (constant
);
3492 /* If we are loading the full constant, we have an
3494 if (offset
== 0 && mode
== const_mode
)
3497 /* If this actually isn't a constant (weird!), we can't do
3498 anything. Otherwise, handle the two most common cases:
3499 extracting a word from a multi-word constant, and
3500 extracting the low-order bits. Other cases don't seem
3501 common enough to worry about. */
3502 if (! CONSTANT_P (constant
))
3505 if (GET_MODE_CLASS (mode
) == MODE_INT
3506 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3507 && offset
% UNITS_PER_WORD
== 0
3508 && (new = operand_subword (constant
,
3509 offset
/ UNITS_PER_WORD
,
3510 0, const_mode
)) != 0)
3513 if (((BYTES_BIG_ENDIAN
3514 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3515 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3516 && (new = gen_lowpart (mode
, constant
)) != 0)
3520 /* If this is a reference to a label at a known position in a jump
3521 table, we also know its value. */
3522 if (base
&& GET_CODE (base
) == LABEL_REF
)
3524 rtx label
= XEXP (base
, 0);
3525 rtx table_insn
= NEXT_INSN (label
);
3527 if (table_insn
&& JUMP_P (table_insn
)
3528 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3530 rtx table
= PATTERN (table_insn
);
3533 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3534 < XVECLEN (table
, 0)))
3537 (table
, 0, offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3540 /* If we have an insn that loads the label from the
3541 jumptable into a reg, we don't want to set the reg
3542 to the label, because this may cause a reference to
3543 the label to remain after the label is removed in
3544 some very obscure cases (PR middle-end/18628). */
3548 set
= single_set (insn
);
3550 if (! set
|| SET_SRC (set
) != x
)
3553 /* If it's a jump, it's safe to reference the label. */
3554 if (SET_DEST (set
) == pc_rtx
)
3560 if (table_insn
&& JUMP_P (table_insn
)
3561 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3563 rtx table
= PATTERN (table_insn
);
3566 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3567 < XVECLEN (table
, 1)))
3569 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3570 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3573 if (GET_MODE (table
) != Pmode
)
3574 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3576 /* Indicate this is a constant. This isn't a valid
3577 form of CONST, but it will only be used to fold the
3578 next insns and then discarded, so it should be
3581 Note this expression must be explicitly discarded,
3582 by cse_insn, else it may end up in a REG_EQUAL note
3583 and "escape" to cause problems elsewhere. */
3584 return gen_rtx_CONST (GET_MODE (new), new);
3593 /* If X is a nontrivial arithmetic operation on an argument
3594 for which a constant value can be determined, return
3595 the result of operating on that value, as a constant.
3596 Otherwise, return X, possibly with one or more operands
3597 modified by recursive calls to this function.
3599 If X is a register whose contents are known, we do NOT
3600 return those contents here. equiv_constant is called to
3603 INSN is the insn that we may be modifying. If it is 0, make a copy
3604 of X before modifying it. */
3607 fold_rtx (rtx x
, rtx insn
)
3610 enum machine_mode mode
;
3617 /* Folded equivalents of first two operands of X. */
3621 /* Constant equivalents of first three operands of X;
3622 0 when no such equivalent is known. */
3627 /* The mode of the first operand of X. We need this for sign and zero
3629 enum machine_mode mode_arg0
;
3634 mode
= GET_MODE (x
);
3635 code
= GET_CODE (x
);
3646 /* No use simplifying an EXPR_LIST
3647 since they are used only for lists of args
3648 in a function call's REG_EQUAL note. */
3654 return prev_insn_cc0
;
3658 return fold_rtx_subreg (x
, insn
);
3662 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3663 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3664 new = lookup_as_function (XEXP (x
, 0), code
);
3666 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3670 return fold_rtx_mem (x
, insn
);
3672 #ifdef NO_FUNCTION_CSE
3674 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3682 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3683 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3684 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3695 mode_arg0
= VOIDmode
;
3697 /* Try folding our operands.
3698 Then see which ones have constant values known. */
3700 fmt
= GET_RTX_FORMAT (code
);
3701 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3704 rtx arg
= XEXP (x
, i
);
3705 rtx folded_arg
= arg
, const_arg
= 0;
3706 enum machine_mode mode_arg
= GET_MODE (arg
);
3707 rtx cheap_arg
, expensive_arg
;
3708 rtx replacements
[2];
3710 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3712 /* Most arguments are cheap, so handle them specially. */
3713 switch (GET_CODE (arg
))
3716 /* This is the same as calling equiv_constant; it is duplicated
3718 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3720 int arg_q
= REG_QTY (REGNO (arg
));
3721 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3723 if (arg_ent
->const_rtx
!= NULL_RTX
3724 && !REG_P (arg_ent
->const_rtx
)
3725 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3727 = gen_lowpart (GET_MODE (arg
),
3728 arg_ent
->const_rtx
);
3743 folded_arg
= prev_insn_cc0
;
3744 mode_arg
= prev_insn_cc0_mode
;
3745 const_arg
= equiv_constant (folded_arg
);
3750 folded_arg
= fold_rtx (arg
, insn
);
3751 const_arg
= equiv_constant (folded_arg
);
3754 /* For the first three operands, see if the operand
3755 is constant or equivalent to a constant. */
3759 folded_arg0
= folded_arg
;
3760 const_arg0
= const_arg
;
3761 mode_arg0
= mode_arg
;
3764 folded_arg1
= folded_arg
;
3765 const_arg1
= const_arg
;
3768 const_arg2
= const_arg
;
3772 /* Pick the least expensive of the folded argument and an
3773 equivalent constant argument. */
3774 if (const_arg
== 0 || const_arg
== folded_arg
3775 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3776 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3778 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3780 /* Try to replace the operand with the cheapest of the two
3781 possibilities. If it doesn't work and this is either of the first
3782 two operands of a commutative operation, try swapping them.
3783 If THAT fails, try the more expensive, provided it is cheaper
3784 than what is already there. */
3786 if (cheap_arg
== XEXP (x
, i
))
3789 if (insn
== 0 && ! copied
)
3795 /* Order the replacements from cheapest to most expensive. */
3796 replacements
[0] = cheap_arg
;
3797 replacements
[1] = expensive_arg
;
3799 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3801 int new_cost
= COST_IN (replacements
[j
], code
);
3803 /* Stop if what existed before was cheaper. Prefer constants
3804 in the case of a tie. */
3805 if (new_cost
> old_cost
3806 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3809 /* It's not safe to substitute the operand of a conversion
3810 operator with a constant, as the conversion's identity
3811 depends upon the mode of it's operand. This optimization
3812 is handled by the call to simplify_unary_operation. */
3813 if (GET_RTX_CLASS (code
) == RTX_UNARY
3814 && GET_MODE (replacements
[j
]) != mode_arg0
3815 && (code
== ZERO_EXTEND
3816 || code
== SIGN_EXTEND
3818 || code
== FLOAT_TRUNCATE
3819 || code
== FLOAT_EXTEND
3822 || code
== UNSIGNED_FLOAT
3823 || code
== UNSIGNED_FIX
))
3826 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3829 if (GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
3830 || GET_RTX_CLASS (code
) == RTX_COMM_ARITH
)
3832 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3833 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3835 if (apply_change_group ())
3837 /* Swap them back to be invalid so that this loop can
3838 continue and flag them to be swapped back later. */
3841 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3853 /* Don't try to fold inside of a vector of expressions.
3854 Doing nothing is harmless. */
3858 /* If a commutative operation, place a constant integer as the second
3859 operand unless the first operand is also a constant integer. Otherwise,
3860 place any constant second unless the first operand is also a constant. */
3862 if (COMMUTATIVE_P (x
))
3865 || swap_commutative_operands_p (const_arg0
? const_arg0
3867 const_arg1
? const_arg1
3870 rtx tem
= XEXP (x
, 0);
3872 if (insn
== 0 && ! copied
)
3878 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3879 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3880 if (apply_change_group ())
3882 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3883 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3888 /* If X is an arithmetic operation, see if we can simplify it. */
3890 switch (GET_RTX_CLASS (code
))
3896 /* We can't simplify extension ops unless we know the
3898 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3899 && mode_arg0
== VOIDmode
)
3902 /* If we had a CONST, strip it off and put it back later if we
3904 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3905 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3907 new = simplify_unary_operation (code
, mode
,
3908 const_arg0
? const_arg0
: folded_arg0
,
3910 /* NEG of PLUS could be converted into MINUS, but that causes
3911 expressions of the form
3912 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3913 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3914 FIXME: those ports should be fixed. */
3915 if (new != 0 && is_const
3916 && GET_CODE (new) == PLUS
3917 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3918 || GET_CODE (XEXP (new, 0)) == LABEL_REF
)
3919 && GET_CODE (XEXP (new, 1)) == CONST_INT
)
3920 new = gen_rtx_CONST (mode
, new);
3925 case RTX_COMM_COMPARE
:
3926 /* See what items are actually being compared and set FOLDED_ARG[01]
3927 to those values and CODE to the actual comparison code. If any are
3928 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3929 do anything if both operands are already known to be constant. */
3931 /* ??? Vector mode comparisons are not supported yet. */
3932 if (VECTOR_MODE_P (mode
))
3935 if (const_arg0
== 0 || const_arg1
== 0)
3937 struct table_elt
*p0
, *p1
;
3938 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3939 enum machine_mode mode_arg1
;
3941 #ifdef FLOAT_STORE_FLAG_VALUE
3942 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3944 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3945 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3946 false_rtx
= CONST0_RTX (mode
);
3950 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3951 &mode_arg0
, &mode_arg1
);
3953 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3954 what kinds of things are being compared, so we can't do
3955 anything with this comparison. */
3957 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3960 const_arg0
= equiv_constant (folded_arg0
);
3961 const_arg1
= equiv_constant (folded_arg1
);
3963 /* If we do not now have two constants being compared, see
3964 if we can nevertheless deduce some things about the
3966 if (const_arg0
== 0 || const_arg1
== 0)
3968 /* Some addresses are known to be nonzero. We don't know
3969 their sign, but equality comparisons are known. */
3970 if (const_arg1
== const0_rtx
3971 && nonzero_address_p (folded_arg0
))
3975 else if (code
== NE
)
3979 /* See if the two operands are the same. */
3981 if (folded_arg0
== folded_arg1
3982 || (REG_P (folded_arg0
)
3983 && REG_P (folded_arg1
)
3984 && (REG_QTY (REGNO (folded_arg0
))
3985 == REG_QTY (REGNO (folded_arg1
))))
3986 || ((p0
= lookup (folded_arg0
,
3987 SAFE_HASH (folded_arg0
, mode_arg0
),
3989 && (p1
= lookup (folded_arg1
,
3990 SAFE_HASH (folded_arg1
, mode_arg0
),
3992 && p0
->first_same_value
== p1
->first_same_value
))
3994 /* Sadly two equal NaNs are not equivalent. */
3995 if (!HONOR_NANS (mode_arg0
))
3996 return ((code
== EQ
|| code
== LE
|| code
== GE
3997 || code
== LEU
|| code
== GEU
|| code
== UNEQ
3998 || code
== UNLE
|| code
== UNGE
4000 ? true_rtx
: false_rtx
);
4001 /* Take care for the FP compares we can resolve. */
4002 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
4004 if (code
== LTGT
|| code
== LT
|| code
== GT
)
4008 /* If FOLDED_ARG0 is a register, see if the comparison we are
4009 doing now is either the same as we did before or the reverse
4010 (we only check the reverse if not floating-point). */
4011 else if (REG_P (folded_arg0
))
4013 int qty
= REG_QTY (REGNO (folded_arg0
));
4015 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
4017 struct qty_table_elem
*ent
= &qty_table
[qty
];
4019 if ((comparison_dominates_p (ent
->comparison_code
, code
)
4020 || (! FLOAT_MODE_P (mode_arg0
)
4021 && comparison_dominates_p (ent
->comparison_code
,
4022 reverse_condition (code
))))
4023 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
4025 && rtx_equal_p (ent
->comparison_const
,
4027 || (REG_P (folded_arg1
)
4028 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
4029 return (comparison_dominates_p (ent
->comparison_code
, code
)
4030 ? true_rtx
: false_rtx
);
4036 /* If we are comparing against zero, see if the first operand is
4037 equivalent to an IOR with a constant. If so, we may be able to
4038 determine the result of this comparison. */
4040 if (const_arg1
== const0_rtx
)
4042 rtx y
= lookup_as_function (folded_arg0
, IOR
);
4046 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
4047 && GET_CODE (inner_const
) == CONST_INT
4048 && INTVAL (inner_const
) != 0)
4050 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
4051 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
4052 && (INTVAL (inner_const
)
4053 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
4054 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
4056 #ifdef FLOAT_STORE_FLAG_VALUE
4057 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4059 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
4060 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
4061 false_rtx
= CONST0_RTX (mode
);
4086 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
4087 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
4088 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
4093 case RTX_COMM_ARITH
:
4097 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4098 with that LABEL_REF as its second operand. If so, the result is
4099 the first operand of that MINUS. This handles switches with an
4100 ADDR_DIFF_VEC table. */
4101 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
4104 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
4105 : lookup_as_function (folded_arg0
, MINUS
);
4107 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4108 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
4111 /* Now try for a CONST of a MINUS like the above. */
4112 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
4113 : lookup_as_function (folded_arg0
, CONST
))) != 0
4114 && GET_CODE (XEXP (y
, 0)) == MINUS
4115 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4116 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
4117 return XEXP (XEXP (y
, 0), 0);
4120 /* Likewise if the operands are in the other order. */
4121 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
4124 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
4125 : lookup_as_function (folded_arg1
, MINUS
);
4127 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4128 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
4131 /* Now try for a CONST of a MINUS like the above. */
4132 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
4133 : lookup_as_function (folded_arg1
, CONST
))) != 0
4134 && GET_CODE (XEXP (y
, 0)) == MINUS
4135 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4136 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
4137 return XEXP (XEXP (y
, 0), 0);
4140 /* If second operand is a register equivalent to a negative
4141 CONST_INT, see if we can find a register equivalent to the
4142 positive constant. Make a MINUS if so. Don't do this for
4143 a non-negative constant since we might then alternate between
4144 choosing positive and negative constants. Having the positive
4145 constant previously-used is the more common case. Be sure
4146 the resulting constant is non-negative; if const_arg1 were
4147 the smallest negative number this would overflow: depending
4148 on the mode, this would either just be the same value (and
4149 hence not save anything) or be incorrect. */
4150 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4151 && INTVAL (const_arg1
) < 0
4152 /* This used to test
4154 -INTVAL (const_arg1) >= 0
4156 But The Sun V5.0 compilers mis-compiled that test. So
4157 instead we test for the problematic value in a more direct
4158 manner and hope the Sun compilers get it correct. */
4159 && INTVAL (const_arg1
) !=
4160 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4161 && REG_P (folded_arg1
))
4163 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4165 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
4168 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4170 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4171 canon_reg (p
->exp
, NULL_RTX
));
4176 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4177 If so, produce (PLUS Z C2-C). */
4178 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4180 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4181 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4182 return fold_rtx (plus_constant (copy_rtx (y
),
4183 -INTVAL (const_arg1
)),
4190 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4191 case IOR
: case AND
: case XOR
:
4193 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4194 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4195 is known to be of similar form, we may be able to replace the
4196 operation with a combined operation. This may eliminate the
4197 intermediate operation if every use is simplified in this way.
4198 Note that the similar optimization done by combine.c only works
4199 if the intermediate operation's result has only one reference. */
4201 if (REG_P (folded_arg0
)
4202 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4205 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4206 rtx y
= lookup_as_function (folded_arg0
, code
);
4208 enum rtx_code associate_code
;
4212 || 0 == (inner_const
4213 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4214 || GET_CODE (inner_const
) != CONST_INT
4215 /* If we have compiled a statement like
4216 "if (x == (x & mask1))", and now are looking at
4217 "x & mask2", we will have a case where the first operand
4218 of Y is the same as our first operand. Unless we detect
4219 this case, an infinite loop will result. */
4220 || XEXP (y
, 0) == folded_arg0
)
4223 /* Don't associate these operations if they are a PLUS with the
4224 same constant and it is a power of two. These might be doable
4225 with a pre- or post-increment. Similarly for two subtracts of
4226 identical powers of two with post decrement. */
4228 if (code
== PLUS
&& const_arg1
== inner_const
4229 && ((HAVE_PRE_INCREMENT
4230 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4231 || (HAVE_POST_INCREMENT
4232 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4233 || (HAVE_PRE_DECREMENT
4234 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4235 || (HAVE_POST_DECREMENT
4236 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4239 /* Compute the code used to compose the constants. For example,
4240 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4242 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
4244 new_const
= simplify_binary_operation (associate_code
, mode
,
4245 const_arg1
, inner_const
);
4250 /* If we are associating shift operations, don't let this
4251 produce a shift of the size of the object or larger.
4252 This could occur when we follow a sign-extend by a right
4253 shift on a machine that does a sign-extend as a pair
4256 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4257 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4259 /* As an exception, we can turn an ASHIFTRT of this
4260 form into a shift of the number of bits - 1. */
4261 if (code
== ASHIFTRT
)
4262 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4267 y
= copy_rtx (XEXP (y
, 0));
4269 /* If Y contains our first operand (the most common way this
4270 can happen is if Y is a MEM), we would do into an infinite
4271 loop if we tried to fold it. So don't in that case. */
4273 if (! reg_mentioned_p (folded_arg0
, y
))
4274 y
= fold_rtx (y
, insn
);
4276 return simplify_gen_binary (code
, mode
, y
, new_const
);
4280 case DIV
: case UDIV
:
4281 /* ??? The associative optimization performed immediately above is
4282 also possible for DIV and UDIV using associate_code of MULT.
4283 However, we would need extra code to verify that the
4284 multiplication does not overflow, that is, there is no overflow
4285 in the calculation of new_const. */
4292 new = simplify_binary_operation (code
, mode
,
4293 const_arg0
? const_arg0
: folded_arg0
,
4294 const_arg1
? const_arg1
: folded_arg1
);
4298 /* (lo_sum (high X) X) is simply X. */
4299 if (code
== LO_SUM
&& const_arg0
!= 0
4300 && GET_CODE (const_arg0
) == HIGH
4301 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4306 case RTX_BITFIELD_OPS
:
4307 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4308 const_arg0
? const_arg0
: folded_arg0
,
4309 const_arg1
? const_arg1
: folded_arg1
,
4310 const_arg2
? const_arg2
: XEXP (x
, 2));
4317 return new ? new : x
;
4320 /* Return a constant value currently equivalent to X.
4321 Return 0 if we don't know one. */
4324 equiv_constant (rtx x
)
4327 && REGNO_QTY_VALID_P (REGNO (x
)))
4329 int x_q
= REG_QTY (REGNO (x
));
4330 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4332 if (x_ent
->const_rtx
)
4333 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
4336 if (x
== 0 || CONSTANT_P (x
))
4339 /* If X is a MEM, try to fold it outside the context of any insn to see if
4340 it might be equivalent to a constant. That handles the case where it
4341 is a constant-pool reference. Then try to look it up in the hash table
4342 in case it is something whose value we have seen before. */
4346 struct table_elt
*elt
;
4348 x
= fold_rtx (x
, NULL_RTX
);
4352 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
4356 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4357 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4364 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4365 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4366 least-significant part of X.
4367 MODE specifies how big a part of X to return.
4369 If the requested operation cannot be done, 0 is returned.
4371 This is similar to gen_lowpart_general in emit-rtl.c. */
4374 gen_lowpart_if_possible (enum machine_mode mode
, rtx x
)
4376 rtx result
= gen_lowpart_common (mode
, x
);
4382 /* This is the only other case we handle. */
4386 if (WORDS_BIG_ENDIAN
)
4387 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4388 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4389 if (BYTES_BIG_ENDIAN
)
4390 /* Adjust the address so that the address-after-the-data is
4392 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4393 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4395 new = adjust_address_nv (x
, mode
, offset
);
4396 if (! memory_address_p (mode
, XEXP (new, 0)))
4405 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4406 branch. It will be zero if not.
4408 In certain cases, this can cause us to add an equivalence. For example,
4409 if we are following the taken case of
4411 we can add the fact that `i' and '2' are now equivalent.
4413 In any case, we can record that this comparison was passed. If the same
4414 comparison is seen later, we will know its value. */
4417 record_jump_equiv (rtx insn
, int taken
)
4419 int cond_known_true
;
4422 enum machine_mode mode
, mode0
, mode1
;
4423 int reversed_nonequality
= 0;
4426 /* Ensure this is the right kind of insn. */
4427 if (! any_condjump_p (insn
))
4429 set
= pc_set (insn
);
4431 /* See if this jump condition is known true or false. */
4433 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4435 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4437 /* Get the type of comparison being done and the operands being compared.
4438 If we had to reverse a non-equality condition, record that fact so we
4439 know that it isn't valid for floating-point. */
4440 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4441 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4442 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4444 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4445 if (! cond_known_true
)
4447 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4449 /* Don't remember if we can't find the inverse. */
4450 if (code
== UNKNOWN
)
4454 /* The mode is the mode of the non-constant. */
4456 if (mode1
!= VOIDmode
)
4459 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4462 /* Yet another form of subreg creation. In this case, we want something in
4463 MODE, and we should assume OP has MODE iff it is naturally modeless. */
4466 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
4468 enum machine_mode op_mode
= GET_MODE (op
);
4469 if (op_mode
== mode
|| op_mode
== VOIDmode
)
4471 return lowpart_subreg (mode
, op
, op_mode
);
4474 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4475 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4476 Make any useful entries we can with that information. Called from
4477 above function and called recursively. */
4480 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
4481 rtx op1
, int reversed_nonequality
)
4483 unsigned op0_hash
, op1_hash
;
4484 int op0_in_memory
, op1_in_memory
;
4485 struct table_elt
*op0_elt
, *op1_elt
;
4487 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4488 we know that they are also equal in the smaller mode (this is also
4489 true for all smaller modes whether or not there is a SUBREG, but
4490 is not worth testing for with no SUBREG). */
4492 /* Note that GET_MODE (op0) may not equal MODE. */
4493 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4494 && (GET_MODE_SIZE (GET_MODE (op0
))
4495 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4497 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4498 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4500 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4501 reversed_nonequality
);
4504 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4505 && (GET_MODE_SIZE (GET_MODE (op1
))
4506 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4508 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4509 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4511 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4512 reversed_nonequality
);
4515 /* Similarly, if this is an NE comparison, and either is a SUBREG
4516 making a smaller mode, we know the whole thing is also NE. */
4518 /* Note that GET_MODE (op0) may not equal MODE;
4519 if we test MODE instead, we can get an infinite recursion
4520 alternating between two modes each wider than MODE. */
4522 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4523 && subreg_lowpart_p (op0
)
4524 && (GET_MODE_SIZE (GET_MODE (op0
))
4525 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4527 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4528 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4530 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4531 reversed_nonequality
);
4534 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4535 && subreg_lowpart_p (op1
)
4536 && (GET_MODE_SIZE (GET_MODE (op1
))
4537 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4539 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4540 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4542 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4543 reversed_nonequality
);
4546 /* Hash both operands. */
4549 hash_arg_in_memory
= 0;
4550 op0_hash
= HASH (op0
, mode
);
4551 op0_in_memory
= hash_arg_in_memory
;
4557 hash_arg_in_memory
= 0;
4558 op1_hash
= HASH (op1
, mode
);
4559 op1_in_memory
= hash_arg_in_memory
;
4564 /* Look up both operands. */
4565 op0_elt
= lookup (op0
, op0_hash
, mode
);
4566 op1_elt
= lookup (op1
, op1_hash
, mode
);
4568 /* If both operands are already equivalent or if they are not in the
4569 table but are identical, do nothing. */
4570 if ((op0_elt
!= 0 && op1_elt
!= 0
4571 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4572 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4575 /* If we aren't setting two things equal all we can do is save this
4576 comparison. Similarly if this is floating-point. In the latter
4577 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4578 If we record the equality, we might inadvertently delete code
4579 whose intent was to change -0 to +0. */
4581 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4583 struct qty_table_elem
*ent
;
4586 /* If we reversed a floating-point comparison, if OP0 is not a
4587 register, or if OP1 is neither a register or constant, we can't
4591 op1
= equiv_constant (op1
);
4593 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4594 || !REG_P (op0
) || op1
== 0)
4597 /* Put OP0 in the hash table if it isn't already. This gives it a
4598 new quantity number. */
4601 if (insert_regs (op0
, NULL
, 0))
4603 rehash_using_reg (op0
);
4604 op0_hash
= HASH (op0
, mode
);
4606 /* If OP0 is contained in OP1, this changes its hash code
4607 as well. Faster to rehash than to check, except
4608 for the simple case of a constant. */
4609 if (! CONSTANT_P (op1
))
4610 op1_hash
= HASH (op1
,mode
);
4613 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4614 op0_elt
->in_memory
= op0_in_memory
;
4617 qty
= REG_QTY (REGNO (op0
));
4618 ent
= &qty_table
[qty
];
4620 ent
->comparison_code
= code
;
4623 /* Look it up again--in case op0 and op1 are the same. */
4624 op1_elt
= lookup (op1
, op1_hash
, mode
);
4626 /* Put OP1 in the hash table so it gets a new quantity number. */
4629 if (insert_regs (op1
, NULL
, 0))
4631 rehash_using_reg (op1
);
4632 op1_hash
= HASH (op1
, mode
);
4635 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4636 op1_elt
->in_memory
= op1_in_memory
;
4639 ent
->comparison_const
= NULL_RTX
;
4640 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4644 ent
->comparison_const
= op1
;
4645 ent
->comparison_qty
= -1;
4651 /* If either side is still missing an equivalence, make it now,
4652 then merge the equivalences. */
4656 if (insert_regs (op0
, NULL
, 0))
4658 rehash_using_reg (op0
);
4659 op0_hash
= HASH (op0
, mode
);
4662 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4663 op0_elt
->in_memory
= op0_in_memory
;
4668 if (insert_regs (op1
, NULL
, 0))
4670 rehash_using_reg (op1
);
4671 op1_hash
= HASH (op1
, mode
);
4674 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4675 op1_elt
->in_memory
= op1_in_memory
;
4678 merge_equiv_classes (op0_elt
, op1_elt
);
4681 /* CSE processing for one instruction.
4682 First simplify sources and addresses of all assignments
4683 in the instruction, using previously-computed equivalents values.
4684 Then install the new sources and destinations in the table
4685 of available values.
4687 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4688 the insn. It means that INSN is inside libcall block. In this
4689 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4691 /* Data on one SET contained in the instruction. */
4695 /* The SET rtx itself. */
4697 /* The SET_SRC of the rtx (the original value, if it is changing). */
4699 /* The hash-table element for the SET_SRC of the SET. */
4700 struct table_elt
*src_elt
;
4701 /* Hash value for the SET_SRC. */
4703 /* Hash value for the SET_DEST. */
4705 /* The SET_DEST, with SUBREG, etc., stripped. */
4707 /* Nonzero if the SET_SRC is in memory. */
4709 /* Nonzero if the SET_SRC contains something
4710 whose value cannot be predicted and understood. */
4712 /* Original machine mode, in case it becomes a CONST_INT.
4713 The size of this field should match the size of the mode
4714 field of struct rtx_def (see rtl.h). */
4715 ENUM_BITFIELD(machine_mode
) mode
: 8;
4716 /* A constant equivalent for SET_SRC, if any. */
4718 /* Original SET_SRC value used for libcall notes. */
4720 /* Hash value of constant equivalent for SET_SRC. */
4721 unsigned src_const_hash
;
4722 /* Table entry for constant equivalent for SET_SRC, if any. */
4723 struct table_elt
*src_const_elt
;
4727 cse_insn (rtx insn
, rtx libcall_insn
)
4729 rtx x
= PATTERN (insn
);
4735 /* Records what this insn does to set CC0. */
4736 rtx this_insn_cc0
= 0;
4737 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4741 struct table_elt
*src_eqv_elt
= 0;
4742 int src_eqv_volatile
= 0;
4743 int src_eqv_in_memory
= 0;
4744 unsigned src_eqv_hash
= 0;
4746 struct set
*sets
= (struct set
*) 0;
4750 /* Find all the SETs and CLOBBERs in this instruction.
4751 Record all the SETs in the array `set' and count them.
4752 Also determine whether there is a CLOBBER that invalidates
4753 all memory references, or all references at varying addresses. */
4757 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4759 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4760 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4761 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4765 if (GET_CODE (x
) == SET
)
4767 sets
= alloca (sizeof (struct set
));
4770 /* Ignore SETs that are unconditional jumps.
4771 They never need cse processing, so this does not hurt.
4772 The reason is not efficiency but rather
4773 so that we can test at the end for instructions
4774 that have been simplified to unconditional jumps
4775 and not be misled by unchanged instructions
4776 that were unconditional jumps to begin with. */
4777 if (SET_DEST (x
) == pc_rtx
4778 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4781 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4782 The hard function value register is used only once, to copy to
4783 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4784 Ensure we invalidate the destination register. On the 80386 no
4785 other code would invalidate it since it is a fixed_reg.
4786 We need not check the return of apply_change_group; see canon_reg. */
4788 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4790 canon_reg (SET_SRC (x
), insn
);
4791 apply_change_group ();
4792 fold_rtx (SET_SRC (x
), insn
);
4793 invalidate (SET_DEST (x
), VOIDmode
);
4798 else if (GET_CODE (x
) == PARALLEL
)
4800 int lim
= XVECLEN (x
, 0);
4802 sets
= alloca (lim
* sizeof (struct set
));
4804 /* Find all regs explicitly clobbered in this insn,
4805 and ensure they are not replaced with any other regs
4806 elsewhere in this insn.
4807 When a reg that is clobbered is also used for input,
4808 we should presume that that is for a reason,
4809 and we should not substitute some other register
4810 which is not supposed to be clobbered.
4811 Therefore, this loop cannot be merged into the one below
4812 because a CALL may precede a CLOBBER and refer to the
4813 value clobbered. We must not let a canonicalization do
4814 anything in that case. */
4815 for (i
= 0; i
< lim
; i
++)
4817 rtx y
= XVECEXP (x
, 0, i
);
4818 if (GET_CODE (y
) == CLOBBER
)
4820 rtx clobbered
= XEXP (y
, 0);
4822 if (REG_P (clobbered
)
4823 || GET_CODE (clobbered
) == SUBREG
)
4824 invalidate (clobbered
, VOIDmode
);
4825 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4826 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4827 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4831 for (i
= 0; i
< lim
; i
++)
4833 rtx y
= XVECEXP (x
, 0, i
);
4834 if (GET_CODE (y
) == SET
)
4836 /* As above, we ignore unconditional jumps and call-insns and
4837 ignore the result of apply_change_group. */
4838 if (GET_CODE (SET_SRC (y
)) == CALL
)
4840 canon_reg (SET_SRC (y
), insn
);
4841 apply_change_group ();
4842 fold_rtx (SET_SRC (y
), insn
);
4843 invalidate (SET_DEST (y
), VOIDmode
);
4845 else if (SET_DEST (y
) == pc_rtx
4846 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4849 sets
[n_sets
++].rtl
= y
;
4851 else if (GET_CODE (y
) == CLOBBER
)
4853 /* If we clobber memory, canon the address.
4854 This does nothing when a register is clobbered
4855 because we have already invalidated the reg. */
4856 if (MEM_P (XEXP (y
, 0)))
4857 canon_reg (XEXP (y
, 0), NULL_RTX
);
4859 else if (GET_CODE (y
) == USE
4860 && ! (REG_P (XEXP (y
, 0))
4861 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4862 canon_reg (y
, NULL_RTX
);
4863 else if (GET_CODE (y
) == CALL
)
4865 /* The result of apply_change_group can be ignored; see
4867 canon_reg (y
, insn
);
4868 apply_change_group ();
4873 else if (GET_CODE (x
) == CLOBBER
)
4875 if (MEM_P (XEXP (x
, 0)))
4876 canon_reg (XEXP (x
, 0), NULL_RTX
);
4879 /* Canonicalize a USE of a pseudo register or memory location. */
4880 else if (GET_CODE (x
) == USE
4881 && ! (REG_P (XEXP (x
, 0))
4882 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4883 canon_reg (XEXP (x
, 0), NULL_RTX
);
4884 else if (GET_CODE (x
) == CALL
)
4886 /* The result of apply_change_group can be ignored; see canon_reg. */
4887 canon_reg (x
, insn
);
4888 apply_change_group ();
4892 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4893 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4894 is handled specially for this case, and if it isn't set, then there will
4895 be no equivalence for the destination. */
4896 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4897 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4898 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4899 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4901 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
4902 XEXP (tem
, 0) = src_eqv
;
4905 /* Canonicalize sources and addresses of destinations.
4906 We do this in a separate pass to avoid problems when a MATCH_DUP is
4907 present in the insn pattern. In that case, we want to ensure that
4908 we don't break the duplicate nature of the pattern. So we will replace
4909 both operands at the same time. Otherwise, we would fail to find an
4910 equivalent substitution in the loop calling validate_change below.
4912 We used to suppress canonicalization of DEST if it appears in SRC,
4913 but we don't do this any more. */
4915 for (i
= 0; i
< n_sets
; i
++)
4917 rtx dest
= SET_DEST (sets
[i
].rtl
);
4918 rtx src
= SET_SRC (sets
[i
].rtl
);
4919 rtx
new = canon_reg (src
, insn
);
4922 sets
[i
].orig_src
= src
;
4923 if ((REG_P (new) && REG_P (src
)
4924 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
4925 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
4926 || (insn_code
= recog_memoized (insn
)) < 0
4927 || insn_data
[insn_code
].n_dups
> 0)
4928 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4930 SET_SRC (sets
[i
].rtl
) = new;
4932 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4934 validate_change (insn
, &XEXP (dest
, 1),
4935 canon_reg (XEXP (dest
, 1), insn
), 1);
4936 validate_change (insn
, &XEXP (dest
, 2),
4937 canon_reg (XEXP (dest
, 2), insn
), 1);
4940 while (GET_CODE (dest
) == SUBREG
4941 || GET_CODE (dest
) == ZERO_EXTRACT
4942 || GET_CODE (dest
) == STRICT_LOW_PART
)
4943 dest
= XEXP (dest
, 0);
4946 canon_reg (dest
, insn
);
4949 /* Now that we have done all the replacements, we can apply the change
4950 group and see if they all work. Note that this will cause some
4951 canonicalizations that would have worked individually not to be applied
4952 because some other canonicalization didn't work, but this should not
4955 The result of apply_change_group can be ignored; see canon_reg. */
4957 apply_change_group ();
4959 /* Set sets[i].src_elt to the class each source belongs to.
4960 Detect assignments from or to volatile things
4961 and set set[i] to zero so they will be ignored
4962 in the rest of this function.
4964 Nothing in this loop changes the hash table or the register chains. */
4966 for (i
= 0; i
< n_sets
; i
++)
4970 struct table_elt
*elt
= 0, *p
;
4971 enum machine_mode mode
;
4974 rtx src_related
= 0;
4975 struct table_elt
*src_const_elt
= 0;
4976 int src_cost
= MAX_COST
;
4977 int src_eqv_cost
= MAX_COST
;
4978 int src_folded_cost
= MAX_COST
;
4979 int src_related_cost
= MAX_COST
;
4980 int src_elt_cost
= MAX_COST
;
4981 int src_regcost
= MAX_COST
;
4982 int src_eqv_regcost
= MAX_COST
;
4983 int src_folded_regcost
= MAX_COST
;
4984 int src_related_regcost
= MAX_COST
;
4985 int src_elt_regcost
= MAX_COST
;
4986 /* Set nonzero if we need to call force_const_mem on with the
4987 contents of src_folded before using it. */
4988 int src_folded_force_flag
= 0;
4990 dest
= SET_DEST (sets
[i
].rtl
);
4991 src
= SET_SRC (sets
[i
].rtl
);
4993 /* If SRC is a constant that has no machine mode,
4994 hash it with the destination's machine mode.
4995 This way we can keep different modes separate. */
4997 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4998 sets
[i
].mode
= mode
;
5002 enum machine_mode eqvmode
= mode
;
5003 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5004 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5006 hash_arg_in_memory
= 0;
5007 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5009 /* Find the equivalence class for the equivalent expression. */
5012 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
5014 src_eqv_volatile
= do_not_record
;
5015 src_eqv_in_memory
= hash_arg_in_memory
;
5018 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5019 value of the INNER register, not the destination. So it is not
5020 a valid substitution for the source. But save it for later. */
5021 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5024 src_eqv_here
= src_eqv
;
5026 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5027 simplified result, which may not necessarily be valid. */
5028 src_folded
= fold_rtx (src
, insn
);
5031 /* ??? This caused bad code to be generated for the m68k port with -O2.
5032 Suppose src is (CONST_INT -1), and that after truncation src_folded
5033 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5034 At the end we will add src and src_const to the same equivalence
5035 class. We now have 3 and -1 on the same equivalence class. This
5036 causes later instructions to be mis-optimized. */
5037 /* If storing a constant in a bitfield, pre-truncate the constant
5038 so we will be able to record it later. */
5039 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5041 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5043 if (GET_CODE (src
) == CONST_INT
5044 && GET_CODE (width
) == CONST_INT
5045 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5046 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5048 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
5049 << INTVAL (width
)) - 1));
5053 /* Compute SRC's hash code, and also notice if it
5054 should not be recorded at all. In that case,
5055 prevent any further processing of this assignment. */
5057 hash_arg_in_memory
= 0;
5060 sets
[i
].src_hash
= HASH (src
, mode
);
5061 sets
[i
].src_volatile
= do_not_record
;
5062 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5064 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5065 a pseudo, do not record SRC. Using SRC as a replacement for
5066 anything else will be incorrect in that situation. Note that
5067 this usually occurs only for stack slots, in which case all the
5068 RTL would be referring to SRC, so we don't lose any optimization
5069 opportunities by not having SRC in the hash table. */
5072 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
5074 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
5075 sets
[i
].src_volatile
= 1;
5078 /* It is no longer clear why we used to do this, but it doesn't
5079 appear to still be needed. So let's try without it since this
5080 code hurts cse'ing widened ops. */
5081 /* If source is a paradoxical subreg (such as QI treated as an SI),
5082 treat it as volatile. It may do the work of an SI in one context
5083 where the extra bits are not being used, but cannot replace an SI
5085 if (GET_CODE (src
) == SUBREG
5086 && (GET_MODE_SIZE (GET_MODE (src
))
5087 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5088 sets
[i
].src_volatile
= 1;
5091 /* Locate all possible equivalent forms for SRC. Try to replace
5092 SRC in the insn with each cheaper equivalent.
5094 We have the following types of equivalents: SRC itself, a folded
5095 version, a value given in a REG_EQUAL note, or a value related
5098 Each of these equivalents may be part of an additional class
5099 of equivalents (if more than one is in the table, they must be in
5100 the same class; we check for this).
5102 If the source is volatile, we don't do any table lookups.
5104 We note any constant equivalent for possible later use in a
5107 if (!sets
[i
].src_volatile
)
5108 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5110 sets
[i
].src_elt
= elt
;
5112 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5114 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5116 /* The REG_EQUAL is indicating that two formerly distinct
5117 classes are now equivalent. So merge them. */
5118 merge_equiv_classes (elt
, src_eqv_elt
);
5119 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
5120 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
5126 else if (src_eqv_elt
)
5129 /* Try to find a constant somewhere and record it in `src_const'.
5130 Record its table element, if any, in `src_const_elt'. Look in
5131 any known equivalences first. (If the constant is not in the
5132 table, also set `sets[i].src_const_hash'). */
5134 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5138 src_const_elt
= elt
;
5143 && (CONSTANT_P (src_folded
)
5144 /* Consider (minus (label_ref L1) (label_ref L2)) as
5145 "constant" here so we will record it. This allows us
5146 to fold switch statements when an ADDR_DIFF_VEC is used. */
5147 || (GET_CODE (src_folded
) == MINUS
5148 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5149 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5150 src_const
= src_folded
, src_const_elt
= elt
;
5151 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5152 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5154 /* If we don't know if the constant is in the table, get its
5155 hash code and look it up. */
5156 if (src_const
&& src_const_elt
== 0)
5158 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5159 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5162 sets
[i
].src_const
= src_const
;
5163 sets
[i
].src_const_elt
= src_const_elt
;
5165 /* If the constant and our source are both in the table, mark them as
5166 equivalent. Otherwise, if a constant is in the table but the source
5167 isn't, set ELT to it. */
5168 if (src_const_elt
&& elt
5169 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5170 merge_equiv_classes (elt
, src_const_elt
);
5171 else if (src_const_elt
&& elt
== 0)
5172 elt
= src_const_elt
;
5174 /* See if there is a register linearly related to a constant
5175 equivalent of SRC. */
5177 && (GET_CODE (src_const
) == CONST
5178 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5180 src_related
= use_related_value (src_const
, src_const_elt
);
5183 struct table_elt
*src_related_elt
5184 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5185 if (src_related_elt
&& elt
)
5187 if (elt
->first_same_value
5188 != src_related_elt
->first_same_value
)
5189 /* This can occur when we previously saw a CONST
5190 involving a SYMBOL_REF and then see the SYMBOL_REF
5191 twice. Merge the involved classes. */
5192 merge_equiv_classes (elt
, src_related_elt
);
5195 src_related_elt
= 0;
5197 else if (src_related_elt
&& elt
== 0)
5198 elt
= src_related_elt
;
5202 /* See if we have a CONST_INT that is already in a register in a
5205 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5206 && GET_MODE_CLASS (mode
) == MODE_INT
5207 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5209 enum machine_mode wider_mode
;
5211 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5212 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5213 && src_related
== 0;
5214 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5216 struct table_elt
*const_elt
5217 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5222 for (const_elt
= const_elt
->first_same_value
;
5223 const_elt
; const_elt
= const_elt
->next_same_value
)
5224 if (REG_P (const_elt
->exp
))
5226 src_related
= gen_lowpart (mode
,
5233 /* Another possibility is that we have an AND with a constant in
5234 a mode narrower than a word. If so, it might have been generated
5235 as part of an "if" which would narrow the AND. If we already
5236 have done the AND in a wider mode, we can use a SUBREG of that
5239 if (flag_expensive_optimizations
&& ! src_related
5240 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5241 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5243 enum machine_mode tmode
;
5244 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5246 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5247 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5248 tmode
= GET_MODE_WIDER_MODE (tmode
))
5250 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
5251 struct table_elt
*larger_elt
;
5255 PUT_MODE (new_and
, tmode
);
5256 XEXP (new_and
, 0) = inner
;
5257 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5258 if (larger_elt
== 0)
5261 for (larger_elt
= larger_elt
->first_same_value
;
5262 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5263 if (REG_P (larger_elt
->exp
))
5266 = gen_lowpart (mode
, larger_elt
->exp
);
5276 #ifdef LOAD_EXTEND_OP
5277 /* See if a MEM has already been loaded with a widening operation;
5278 if it has, we can use a subreg of that. Many CISC machines
5279 also have such operations, but this is only likely to be
5280 beneficial on these machines. */
5282 if (flag_expensive_optimizations
&& src_related
== 0
5283 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5284 && GET_MODE_CLASS (mode
) == MODE_INT
5285 && MEM_P (src
) && ! do_not_record
5286 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
5288 struct rtx_def memory_extend_buf
;
5289 rtx memory_extend_rtx
= &memory_extend_buf
;
5290 enum machine_mode tmode
;
5292 /* Set what we are trying to extend and the operation it might
5293 have been extended with. */
5294 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
5295 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5296 XEXP (memory_extend_rtx
, 0) = src
;
5298 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5299 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5300 tmode
= GET_MODE_WIDER_MODE (tmode
))
5302 struct table_elt
*larger_elt
;
5304 PUT_MODE (memory_extend_rtx
, tmode
);
5305 larger_elt
= lookup (memory_extend_rtx
,
5306 HASH (memory_extend_rtx
, tmode
), tmode
);
5307 if (larger_elt
== 0)
5310 for (larger_elt
= larger_elt
->first_same_value
;
5311 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5312 if (REG_P (larger_elt
->exp
))
5314 src_related
= gen_lowpart (mode
,
5323 #endif /* LOAD_EXTEND_OP */
5325 if (src
== src_folded
)
5328 /* At this point, ELT, if nonzero, points to a class of expressions
5329 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5330 and SRC_RELATED, if nonzero, each contain additional equivalent
5331 expressions. Prune these latter expressions by deleting expressions
5332 already in the equivalence class.
5334 Check for an equivalent identical to the destination. If found,
5335 this is the preferred equivalent since it will likely lead to
5336 elimination of the insn. Indicate this by placing it in
5340 elt
= elt
->first_same_value
;
5341 for (p
= elt
; p
; p
= p
->next_same_value
)
5343 enum rtx_code code
= GET_CODE (p
->exp
);
5345 /* If the expression is not valid, ignore it. Then we do not
5346 have to check for validity below. In most cases, we can use
5347 `rtx_equal_p', since canonicalization has already been done. */
5348 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5351 /* Also skip paradoxical subregs, unless that's what we're
5354 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5355 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5357 && GET_CODE (src
) == SUBREG
5358 && GET_MODE (src
) == GET_MODE (p
->exp
)
5359 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5360 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5363 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5365 else if (src_folded
&& GET_CODE (src_folded
) == code
5366 && rtx_equal_p (src_folded
, p
->exp
))
5368 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5369 && rtx_equal_p (src_eqv_here
, p
->exp
))
5371 else if (src_related
&& GET_CODE (src_related
) == code
5372 && rtx_equal_p (src_related
, p
->exp
))
5375 /* This is the same as the destination of the insns, we want
5376 to prefer it. Copy it to src_related. The code below will
5377 then give it a negative cost. */
5378 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5382 /* Find the cheapest valid equivalent, trying all the available
5383 possibilities. Prefer items not in the hash table to ones
5384 that are when they are equal cost. Note that we can never
5385 worsen an insn as the current contents will also succeed.
5386 If we find an equivalent identical to the destination, use it as best,
5387 since this insn will probably be eliminated in that case. */
5390 if (rtx_equal_p (src
, dest
))
5391 src_cost
= src_regcost
= -1;
5394 src_cost
= COST (src
);
5395 src_regcost
= approx_reg_cost (src
);
5401 if (rtx_equal_p (src_eqv_here
, dest
))
5402 src_eqv_cost
= src_eqv_regcost
= -1;
5405 src_eqv_cost
= COST (src_eqv_here
);
5406 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5412 if (rtx_equal_p (src_folded
, dest
))
5413 src_folded_cost
= src_folded_regcost
= -1;
5416 src_folded_cost
= COST (src_folded
);
5417 src_folded_regcost
= approx_reg_cost (src_folded
);
5423 if (rtx_equal_p (src_related
, dest
))
5424 src_related_cost
= src_related_regcost
= -1;
5427 src_related_cost
= COST (src_related
);
5428 src_related_regcost
= approx_reg_cost (src_related
);
5432 /* If this was an indirect jump insn, a known label will really be
5433 cheaper even though it looks more expensive. */
5434 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5435 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5437 /* Terminate loop when replacement made. This must terminate since
5438 the current contents will be tested and will always be valid. */
5443 /* Skip invalid entries. */
5444 while (elt
&& !REG_P (elt
->exp
)
5445 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5446 elt
= elt
->next_same_value
;
5448 /* A paradoxical subreg would be bad here: it'll be the right
5449 size, but later may be adjusted so that the upper bits aren't
5450 what we want. So reject it. */
5452 && GET_CODE (elt
->exp
) == SUBREG
5453 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5454 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5455 /* It is okay, though, if the rtx we're trying to match
5456 will ignore any of the bits we can't predict. */
5458 && GET_CODE (src
) == SUBREG
5459 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5460 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5461 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5463 elt
= elt
->next_same_value
;
5469 src_elt_cost
= elt
->cost
;
5470 src_elt_regcost
= elt
->regcost
;
5473 /* Find cheapest and skip it for the next time. For items
5474 of equal cost, use this order:
5475 src_folded, src, src_eqv, src_related and hash table entry. */
5477 && preferable (src_folded_cost
, src_folded_regcost
,
5478 src_cost
, src_regcost
) <= 0
5479 && preferable (src_folded_cost
, src_folded_regcost
,
5480 src_eqv_cost
, src_eqv_regcost
) <= 0
5481 && preferable (src_folded_cost
, src_folded_regcost
,
5482 src_related_cost
, src_related_regcost
) <= 0
5483 && preferable (src_folded_cost
, src_folded_regcost
,
5484 src_elt_cost
, src_elt_regcost
) <= 0)
5486 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5487 if (src_folded_force_flag
)
5489 rtx forced
= force_const_mem (mode
, trial
);
5495 && preferable (src_cost
, src_regcost
,
5496 src_eqv_cost
, src_eqv_regcost
) <= 0
5497 && preferable (src_cost
, src_regcost
,
5498 src_related_cost
, src_related_regcost
) <= 0
5499 && preferable (src_cost
, src_regcost
,
5500 src_elt_cost
, src_elt_regcost
) <= 0)
5501 trial
= src
, src_cost
= MAX_COST
;
5502 else if (src_eqv_here
5503 && preferable (src_eqv_cost
, src_eqv_regcost
,
5504 src_related_cost
, src_related_regcost
) <= 0
5505 && preferable (src_eqv_cost
, src_eqv_regcost
,
5506 src_elt_cost
, src_elt_regcost
) <= 0)
5507 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5508 else if (src_related
5509 && preferable (src_related_cost
, src_related_regcost
,
5510 src_elt_cost
, src_elt_regcost
) <= 0)
5511 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5514 trial
= copy_rtx (elt
->exp
);
5515 elt
= elt
->next_same_value
;
5516 src_elt_cost
= MAX_COST
;
5519 /* We don't normally have an insn matching (set (pc) (pc)), so
5520 check for this separately here. We will delete such an
5523 For other cases such as a table jump or conditional jump
5524 where we know the ultimate target, go ahead and replace the
5525 operand. While that may not make a valid insn, we will
5526 reemit the jump below (and also insert any necessary
5528 if (n_sets
== 1 && dest
== pc_rtx
5530 || (GET_CODE (trial
) == LABEL_REF
5531 && ! condjump_p (insn
))))
5533 /* Don't substitute non-local labels, this confuses CFG. */
5534 if (GET_CODE (trial
) == LABEL_REF
5535 && LABEL_REF_NONLOCAL_P (trial
))
5538 SET_SRC (sets
[i
].rtl
) = trial
;
5539 cse_jumps_altered
= 1;
5543 /* Look for a substitution that makes a valid insn. */
5544 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5546 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5548 /* If we just made a substitution inside a libcall, then we
5549 need to make the same substitution in any notes attached
5550 to the RETVAL insn. */
5552 && (REG_P (sets
[i
].orig_src
)
5553 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5554 || MEM_P (sets
[i
].orig_src
)))
5556 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
5558 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
5563 /* The result of apply_change_group can be ignored; see
5566 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5567 apply_change_group ();
5571 /* If we previously found constant pool entries for
5572 constants and this is a constant, try making a
5573 pool entry. Put it in src_folded unless we already have done
5574 this since that is where it likely came from. */
5576 else if (constant_pool_entries_cost
5577 && CONSTANT_P (trial
)
5578 /* Reject cases that will abort in decode_rtx_const.
5579 On the alpha when simplifying a switch, we get
5580 (const (truncate (minus (label_ref) (label_ref)))). */
5581 && ! (GET_CODE (trial
) == CONST
5582 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
5583 /* Likewise on IA-64, except without the truncate. */
5584 && ! (GET_CODE (trial
) == CONST
5585 && GET_CODE (XEXP (trial
, 0)) == MINUS
5586 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5587 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)
5589 || (!MEM_P (src_folded
)
5590 && ! src_folded_force_flag
))
5591 && GET_MODE_CLASS (mode
) != MODE_CC
5592 && mode
!= VOIDmode
)
5594 src_folded_force_flag
= 1;
5596 src_folded_cost
= constant_pool_entries_cost
;
5597 src_folded_regcost
= constant_pool_entries_regcost
;
5601 src
= SET_SRC (sets
[i
].rtl
);
5603 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5604 However, there is an important exception: If both are registers
5605 that are not the head of their equivalence class, replace SET_SRC
5606 with the head of the class. If we do not do this, we will have
5607 both registers live over a portion of the basic block. This way,
5608 their lifetimes will likely abut instead of overlapping. */
5610 && REGNO_QTY_VALID_P (REGNO (dest
)))
5612 int dest_q
= REG_QTY (REGNO (dest
));
5613 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5615 if (dest_ent
->mode
== GET_MODE (dest
)
5616 && dest_ent
->first_reg
!= REGNO (dest
)
5617 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5618 /* Don't do this if the original insn had a hard reg as
5619 SET_SRC or SET_DEST. */
5620 && (!REG_P (sets
[i
].src
)
5621 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5622 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5623 /* We can't call canon_reg here because it won't do anything if
5624 SRC is a hard register. */
5626 int src_q
= REG_QTY (REGNO (src
));
5627 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5628 int first
= src_ent
->first_reg
;
5630 = (first
>= FIRST_PSEUDO_REGISTER
5631 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5633 /* We must use validate-change even for this, because this
5634 might be a special no-op instruction, suitable only to
5636 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5639 /* If we had a constant that is cheaper than what we are now
5640 setting SRC to, use that constant. We ignored it when we
5641 thought we could make this into a no-op. */
5642 if (src_const
&& COST (src_const
) < COST (src
)
5643 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5650 /* If we made a change, recompute SRC values. */
5651 if (src
!= sets
[i
].src
)
5655 hash_arg_in_memory
= 0;
5657 sets
[i
].src_hash
= HASH (src
, mode
);
5658 sets
[i
].src_volatile
= do_not_record
;
5659 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5660 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5663 /* If this is a single SET, we are setting a register, and we have an
5664 equivalent constant, we want to add a REG_NOTE. We don't want
5665 to write a REG_EQUAL note for a constant pseudo since verifying that
5666 that pseudo hasn't been eliminated is a pain. Such a note also
5667 won't help anything.
5669 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5670 which can be created for a reference to a compile time computable
5671 entry in a jump table. */
5673 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5674 && !REG_P (src_const
)
5675 && ! (GET_CODE (src_const
) == CONST
5676 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5677 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5678 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5680 /* We only want a REG_EQUAL note if src_const != src. */
5681 if (! rtx_equal_p (src
, src_const
))
5683 /* Make sure that the rtx is not shared. */
5684 src_const
= copy_rtx (src_const
);
5686 /* Record the actual constant value in a REG_EQUAL note,
5687 making a new one if one does not already exist. */
5688 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5692 /* Now deal with the destination. */
5695 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5696 while (GET_CODE (dest
) == SUBREG
5697 || GET_CODE (dest
) == ZERO_EXTRACT
5698 || GET_CODE (dest
) == STRICT_LOW_PART
)
5699 dest
= XEXP (dest
, 0);
5701 sets
[i
].inner_dest
= dest
;
5705 #ifdef PUSH_ROUNDING
5706 /* Stack pushes invalidate the stack pointer. */
5707 rtx addr
= XEXP (dest
, 0);
5708 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5709 && XEXP (addr
, 0) == stack_pointer_rtx
)
5710 invalidate (stack_pointer_rtx
, Pmode
);
5712 dest
= fold_rtx (dest
, insn
);
5715 /* Compute the hash code of the destination now,
5716 before the effects of this instruction are recorded,
5717 since the register values used in the address computation
5718 are those before this instruction. */
5719 sets
[i
].dest_hash
= HASH (dest
, mode
);
5721 /* Don't enter a bit-field in the hash table
5722 because the value in it after the store
5723 may not equal what was stored, due to truncation. */
5725 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5727 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5729 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5730 && GET_CODE (width
) == CONST_INT
5731 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5732 && ! (INTVAL (src_const
)
5733 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5734 /* Exception: if the value is constant,
5735 and it won't be truncated, record it. */
5739 /* This is chosen so that the destination will be invalidated
5740 but no new value will be recorded.
5741 We must invalidate because sometimes constant
5742 values can be recorded for bitfields. */
5743 sets
[i
].src_elt
= 0;
5744 sets
[i
].src_volatile
= 1;
5750 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5752 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5754 /* One less use of the label this insn used to jump to. */
5756 cse_jumps_altered
= 1;
5757 /* No more processing for this set. */
5761 /* If this SET is now setting PC to a label, we know it used to
5762 be a conditional or computed branch. */
5763 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5764 && !LABEL_REF_NONLOCAL_P (src
))
5766 /* Now emit a BARRIER after the unconditional jump. */
5767 if (NEXT_INSN (insn
) == 0
5768 || !BARRIER_P (NEXT_INSN (insn
)))
5769 emit_barrier_after (insn
);
5771 /* We reemit the jump in as many cases as possible just in
5772 case the form of an unconditional jump is significantly
5773 different than a computed jump or conditional jump.
5775 If this insn has multiple sets, then reemitting the
5776 jump is nontrivial. So instead we just force rerecognition
5777 and hope for the best. */
5782 new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5783 JUMP_LABEL (new) = XEXP (src
, 0);
5784 LABEL_NUSES (XEXP (src
, 0))++;
5786 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5787 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5790 XEXP (note
, 1) = NULL_RTX
;
5791 REG_NOTES (new) = note
;
5797 /* Now emit a BARRIER after the unconditional jump. */
5798 if (NEXT_INSN (insn
) == 0
5799 || !BARRIER_P (NEXT_INSN (insn
)))
5800 emit_barrier_after (insn
);
5803 INSN_CODE (insn
) = -1;
5805 /* Do not bother deleting any unreachable code,
5806 let jump/flow do that. */
5808 cse_jumps_altered
= 1;
5812 /* If destination is volatile, invalidate it and then do no further
5813 processing for this assignment. */
5815 else if (do_not_record
)
5817 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5818 invalidate (dest
, VOIDmode
);
5819 else if (MEM_P (dest
))
5820 invalidate (dest
, VOIDmode
);
5821 else if (GET_CODE (dest
) == STRICT_LOW_PART
5822 || GET_CODE (dest
) == ZERO_EXTRACT
)
5823 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5827 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5828 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5831 /* If setting CC0, record what it was set to, or a constant, if it
5832 is equivalent to a constant. If it is being set to a floating-point
5833 value, make a COMPARE with the appropriate constant of 0. If we
5834 don't do this, later code can interpret this as a test against
5835 const0_rtx, which can cause problems if we try to put it into an
5836 insn as a floating-point operand. */
5837 if (dest
== cc0_rtx
)
5839 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5840 this_insn_cc0_mode
= mode
;
5841 if (FLOAT_MODE_P (mode
))
5842 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5848 /* Now enter all non-volatile source expressions in the hash table
5849 if they are not already present.
5850 Record their equivalence classes in src_elt.
5851 This way we can insert the corresponding destinations into
5852 the same classes even if the actual sources are no longer in them
5853 (having been invalidated). */
5855 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5856 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5858 struct table_elt
*elt
;
5859 struct table_elt
*classp
= sets
[0].src_elt
;
5860 rtx dest
= SET_DEST (sets
[0].rtl
);
5861 enum machine_mode eqvmode
= GET_MODE (dest
);
5863 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5865 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5868 if (insert_regs (src_eqv
, classp
, 0))
5870 rehash_using_reg (src_eqv
);
5871 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5873 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5874 elt
->in_memory
= src_eqv_in_memory
;
5877 /* Check to see if src_eqv_elt is the same as a set source which
5878 does not yet have an elt, and if so set the elt of the set source
5880 for (i
= 0; i
< n_sets
; i
++)
5881 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5882 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5883 sets
[i
].src_elt
= src_eqv_elt
;
5886 for (i
= 0; i
< n_sets
; i
++)
5887 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5888 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5890 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5892 /* REG_EQUAL in setting a STRICT_LOW_PART
5893 gives an equivalent for the entire destination register,
5894 not just for the subreg being stored in now.
5895 This is a more interesting equivalence, so we arrange later
5896 to treat the entire reg as the destination. */
5897 sets
[i
].src_elt
= src_eqv_elt
;
5898 sets
[i
].src_hash
= src_eqv_hash
;
5902 /* Insert source and constant equivalent into hash table, if not
5904 struct table_elt
*classp
= src_eqv_elt
;
5905 rtx src
= sets
[i
].src
;
5906 rtx dest
= SET_DEST (sets
[i
].rtl
);
5907 enum machine_mode mode
5908 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5910 /* It's possible that we have a source value known to be
5911 constant but don't have a REG_EQUAL note on the insn.
5912 Lack of a note will mean src_eqv_elt will be NULL. This
5913 can happen where we've generated a SUBREG to access a
5914 CONST_INT that is already in a register in a wider mode.
5915 Ensure that the source expression is put in the proper
5918 classp
= sets
[i
].src_const_elt
;
5920 if (sets
[i
].src_elt
== 0)
5922 /* Don't put a hard register source into the table if this is
5923 the last insn of a libcall. In this case, we only need
5924 to put src_eqv_elt in src_elt. */
5925 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5927 struct table_elt
*elt
;
5929 /* Note that these insert_regs calls cannot remove
5930 any of the src_elt's, because they would have failed to
5931 match if not still valid. */
5932 if (insert_regs (src
, classp
, 0))
5934 rehash_using_reg (src
);
5935 sets
[i
].src_hash
= HASH (src
, mode
);
5937 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5938 elt
->in_memory
= sets
[i
].src_in_memory
;
5939 sets
[i
].src_elt
= classp
= elt
;
5942 sets
[i
].src_elt
= classp
;
5944 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5945 && src
!= sets
[i
].src_const
5946 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5947 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5948 sets
[i
].src_const_hash
, mode
);
5951 else if (sets
[i
].src_elt
== 0)
5952 /* If we did not insert the source into the hash table (e.g., it was
5953 volatile), note the equivalence class for the REG_EQUAL value, if any,
5954 so that the destination goes into that class. */
5955 sets
[i
].src_elt
= src_eqv_elt
;
5957 invalidate_from_clobbers (x
);
5959 /* Some registers are invalidated by subroutine calls. Memory is
5960 invalidated by non-constant calls. */
5964 if (! CONST_OR_PURE_CALL_P (insn
))
5965 invalidate_memory ();
5966 invalidate_for_call ();
5969 /* Now invalidate everything set by this instruction.
5970 If a SUBREG or other funny destination is being set,
5971 sets[i].rtl is still nonzero, so here we invalidate the reg
5972 a part of which is being set. */
5974 for (i
= 0; i
< n_sets
; i
++)
5977 /* We can't use the inner dest, because the mode associated with
5978 a ZERO_EXTRACT is significant. */
5979 rtx dest
= SET_DEST (sets
[i
].rtl
);
5981 /* Needed for registers to remove the register from its
5982 previous quantity's chain.
5983 Needed for memory if this is a nonvarying address, unless
5984 we have just done an invalidate_memory that covers even those. */
5985 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5986 invalidate (dest
, VOIDmode
);
5987 else if (MEM_P (dest
))
5988 invalidate (dest
, VOIDmode
);
5989 else if (GET_CODE (dest
) == STRICT_LOW_PART
5990 || GET_CODE (dest
) == ZERO_EXTRACT
)
5991 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5994 /* A volatile ASM invalidates everything. */
5995 if (NONJUMP_INSN_P (insn
)
5996 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5997 && MEM_VOLATILE_P (PATTERN (insn
)))
5998 flush_hash_table ();
6000 /* Make sure registers mentioned in destinations
6001 are safe for use in an expression to be inserted.
6002 This removes from the hash table
6003 any invalid entry that refers to one of these registers.
6005 We don't care about the return value from mention_regs because
6006 we are going to hash the SET_DEST values unconditionally. */
6008 for (i
= 0; i
< n_sets
; i
++)
6012 rtx x
= SET_DEST (sets
[i
].rtl
);
6018 /* We used to rely on all references to a register becoming
6019 inaccessible when a register changes to a new quantity,
6020 since that changes the hash code. However, that is not
6021 safe, since after HASH_SIZE new quantities we get a
6022 hash 'collision' of a register with its own invalid
6023 entries. And since SUBREGs have been changed not to
6024 change their hash code with the hash code of the register,
6025 it wouldn't work any longer at all. So we have to check
6026 for any invalid references lying around now.
6027 This code is similar to the REG case in mention_regs,
6028 but it knows that reg_tick has been incremented, and
6029 it leaves reg_in_table as -1 . */
6030 unsigned int regno
= REGNO (x
);
6031 unsigned int endregno
6032 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
6033 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
6036 for (i
= regno
; i
< endregno
; i
++)
6038 if (REG_IN_TABLE (i
) >= 0)
6040 remove_invalid_refs (i
);
6041 REG_IN_TABLE (i
) = -1;
6048 /* We may have just removed some of the src_elt's from the hash table.
6049 So replace each one with the current head of the same class. */
6051 for (i
= 0; i
< n_sets
; i
++)
6054 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6055 /* If elt was removed, find current head of same class,
6056 or 0 if nothing remains of that class. */
6058 struct table_elt
*elt
= sets
[i
].src_elt
;
6060 while (elt
&& elt
->prev_same_value
)
6061 elt
= elt
->prev_same_value
;
6063 while (elt
&& elt
->first_same_value
== 0)
6064 elt
= elt
->next_same_value
;
6065 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6069 /* Now insert the destinations into their equivalence classes. */
6071 for (i
= 0; i
< n_sets
; i
++)
6074 rtx dest
= SET_DEST (sets
[i
].rtl
);
6075 struct table_elt
*elt
;
6077 /* Don't record value if we are not supposed to risk allocating
6078 floating-point values in registers that might be wider than
6080 if ((flag_float_store
6082 && FLOAT_MODE_P (GET_MODE (dest
)))
6083 /* Don't record BLKmode values, because we don't know the
6084 size of it, and can't be sure that other BLKmode values
6085 have the same or smaller size. */
6086 || GET_MODE (dest
) == BLKmode
6087 /* Don't record values of destinations set inside a libcall block
6088 since we might delete the libcall. Things should have been set
6089 up so we won't want to reuse such a value, but we play it safe
6092 /* If we didn't put a REG_EQUAL value or a source into the hash
6093 table, there is no point is recording DEST. */
6094 || sets
[i
].src_elt
== 0
6095 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6096 or SIGN_EXTEND, don't record DEST since it can cause
6097 some tracking to be wrong.
6099 ??? Think about this more later. */
6100 || (GET_CODE (dest
) == SUBREG
6101 && (GET_MODE_SIZE (GET_MODE (dest
))
6102 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6103 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
6104 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
6107 /* STRICT_LOW_PART isn't part of the value BEING set,
6108 and neither is the SUBREG inside it.
6109 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6110 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6111 dest
= SUBREG_REG (XEXP (dest
, 0));
6113 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
6114 /* Registers must also be inserted into chains for quantities. */
6115 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6117 /* If `insert_regs' changes something, the hash code must be
6119 rehash_using_reg (dest
);
6120 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
6123 elt
= insert (dest
, sets
[i
].src_elt
,
6124 sets
[i
].dest_hash
, GET_MODE (dest
));
6126 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
6127 && !MEM_READONLY_P (sets
[i
].inner_dest
));
6129 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6130 narrower than M2, and both M1 and M2 are the same number of words,
6131 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6132 make that equivalence as well.
6134 However, BAR may have equivalences for which gen_lowpart
6135 will produce a simpler value than gen_lowpart applied to
6136 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6137 BAR's equivalences. If we don't get a simplified form, make
6138 the SUBREG. It will not be used in an equivalence, but will
6139 cause two similar assignments to be detected.
6141 Note the loop below will find SUBREG_REG (DEST) since we have
6142 already entered SRC and DEST of the SET in the table. */
6144 if (GET_CODE (dest
) == SUBREG
6145 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
6147 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6148 && (GET_MODE_SIZE (GET_MODE (dest
))
6149 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6150 && sets
[i
].src_elt
!= 0)
6152 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6153 struct table_elt
*elt
, *classp
= 0;
6155 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6156 elt
= elt
->next_same_value
)
6160 struct table_elt
*src_elt
;
6163 /* Ignore invalid entries. */
6164 if (!REG_P (elt
->exp
)
6165 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6168 /* We may have already been playing subreg games. If the
6169 mode is already correct for the destination, use it. */
6170 if (GET_MODE (elt
->exp
) == new_mode
)
6174 /* Calculate big endian correction for the SUBREG_BYTE.
6175 We have already checked that M1 (GET_MODE (dest))
6176 is not narrower than M2 (new_mode). */
6177 if (BYTES_BIG_ENDIAN
)
6178 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6179 - GET_MODE_SIZE (new_mode
));
6181 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6182 GET_MODE (dest
), byte
);
6185 /* The call to simplify_gen_subreg fails if the value
6186 is VOIDmode, yet we can't do any simplification, e.g.
6187 for EXPR_LISTs denoting function call results.
6188 It is invalid to construct a SUBREG with a VOIDmode
6189 SUBREG_REG, hence a zero new_src means we can't do
6190 this substitution. */
6194 src_hash
= HASH (new_src
, new_mode
);
6195 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6197 /* Put the new source in the hash table is if isn't
6201 if (insert_regs (new_src
, classp
, 0))
6203 rehash_using_reg (new_src
);
6204 src_hash
= HASH (new_src
, new_mode
);
6206 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6207 src_elt
->in_memory
= elt
->in_memory
;
6209 else if (classp
&& classp
!= src_elt
->first_same_value
)
6210 /* Show that two things that we've seen before are
6211 actually the same. */
6212 merge_equiv_classes (src_elt
, classp
);
6214 classp
= src_elt
->first_same_value
;
6215 /* Ignore invalid entries. */
6217 && !REG_P (classp
->exp
)
6218 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6219 classp
= classp
->next_same_value
;
6224 /* Special handling for (set REG0 REG1) where REG0 is the
6225 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6226 be used in the sequel, so (if easily done) change this insn to
6227 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6228 that computed their value. Then REG1 will become a dead store
6229 and won't cloud the situation for later optimizations.
6231 Do not make this change if REG1 is a hard register, because it will
6232 then be used in the sequel and we may be changing a two-operand insn
6233 into a three-operand insn.
6235 Also do not do this if we are operating on a copy of INSN.
6237 Also don't do this if INSN ends a libcall; this would cause an unrelated
6238 register to be set in the middle of a libcall, and we then get bad code
6239 if the libcall is deleted. */
6241 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
6242 && NEXT_INSN (PREV_INSN (insn
)) == insn
6243 && REG_P (SET_SRC (sets
[0].rtl
))
6244 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6245 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6247 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6248 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6250 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6251 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6254 /* Scan for the previous nonnote insn, but stop at a basic
6258 prev
= PREV_INSN (prev
);
6260 while (prev
&& NOTE_P (prev
)
6261 && NOTE_LINE_NUMBER (prev
) != NOTE_INSN_BASIC_BLOCK
);
6263 /* Do not swap the registers around if the previous instruction
6264 attaches a REG_EQUIV note to REG1.
6266 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6267 from the pseudo that originally shadowed an incoming argument
6268 to another register. Some uses of REG_EQUIV might rely on it
6269 being attached to REG1 rather than REG2.
6271 This section previously turned the REG_EQUIV into a REG_EQUAL
6272 note. We cannot do that because REG_EQUIV may provide an
6273 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6275 if (prev
!= 0 && NONJUMP_INSN_P (prev
)
6276 && GET_CODE (PATTERN (prev
)) == SET
6277 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6278 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6280 rtx dest
= SET_DEST (sets
[0].rtl
);
6281 rtx src
= SET_SRC (sets
[0].rtl
);
6284 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6285 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6286 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6287 apply_change_group ();
6289 /* If INSN has a REG_EQUAL note, and this note mentions
6290 REG0, then we must delete it, because the value in
6291 REG0 has changed. If the note's value is REG1, we must
6292 also delete it because that is now this insn's dest. */
6293 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6295 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6296 || rtx_equal_p (src
, XEXP (note
, 0))))
6297 remove_note (insn
, note
);
6302 /* If this is a conditional jump insn, record any known equivalences due to
6303 the condition being tested. */
6306 && n_sets
== 1 && GET_CODE (x
) == SET
6307 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6308 record_jump_equiv (insn
, 0);
6311 /* If the previous insn set CC0 and this insn no longer references CC0,
6312 delete the previous insn. Here we use the fact that nothing expects CC0
6313 to be valid over an insn, which is true until the final pass. */
6314 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6315 && (tem
= single_set (prev_insn
)) != 0
6316 && SET_DEST (tem
) == cc0_rtx
6317 && ! reg_mentioned_p (cc0_rtx
, x
))
6318 delete_insn (prev_insn
);
6320 prev_insn_cc0
= this_insn_cc0
;
6321 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6326 /* Remove from the hash table all expressions that reference memory. */
6329 invalidate_memory (void)
6332 struct table_elt
*p
, *next
;
6334 for (i
= 0; i
< HASH_SIZE
; i
++)
6335 for (p
= table
[i
]; p
; p
= next
)
6337 next
= p
->next_same_hash
;
6339 remove_from_table (p
, i
);
6343 /* If ADDR is an address that implicitly affects the stack pointer, return
6344 1 and update the register tables to show the effect. Else, return 0. */
6347 addr_affects_sp_p (rtx addr
)
6349 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
6350 && REG_P (XEXP (addr
, 0))
6351 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6353 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6355 REG_TICK (STACK_POINTER_REGNUM
)++;
6356 /* Is it possible to use a subreg of SP? */
6357 SUBREG_TICKED (STACK_POINTER_REGNUM
) = -1;
6360 /* This should be *very* rare. */
6361 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6362 invalidate (stack_pointer_rtx
, VOIDmode
);
6370 /* Perform invalidation on the basis of everything about an insn
6371 except for invalidating the actual places that are SET in it.
6372 This includes the places CLOBBERed, and anything that might
6373 alias with something that is SET or CLOBBERed.
6375 X is the pattern of the insn. */
6378 invalidate_from_clobbers (rtx x
)
6380 if (GET_CODE (x
) == CLOBBER
)
6382 rtx ref
= XEXP (x
, 0);
6385 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6387 invalidate (ref
, VOIDmode
);
6388 else if (GET_CODE (ref
) == STRICT_LOW_PART
6389 || GET_CODE (ref
) == ZERO_EXTRACT
)
6390 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6393 else if (GET_CODE (x
) == PARALLEL
)
6396 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6398 rtx y
= XVECEXP (x
, 0, i
);
6399 if (GET_CODE (y
) == CLOBBER
)
6401 rtx ref
= XEXP (y
, 0);
6402 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6404 invalidate (ref
, VOIDmode
);
6405 else if (GET_CODE (ref
) == STRICT_LOW_PART
6406 || GET_CODE (ref
) == ZERO_EXTRACT
)
6407 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6413 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6414 and replace any registers in them with either an equivalent constant
6415 or the canonical form of the register. If we are inside an address,
6416 only do this if the address remains valid.
6418 OBJECT is 0 except when within a MEM in which case it is the MEM.
6420 Return the replacement for X. */
6423 cse_process_notes (rtx x
, rtx object
)
6425 enum rtx_code code
= GET_CODE (x
);
6426 const char *fmt
= GET_RTX_FORMAT (code
);
6443 validate_change (x
, &XEXP (x
, 0),
6444 cse_process_notes (XEXP (x
, 0), x
), 0);
6449 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6450 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6452 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6459 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6460 /* We don't substitute VOIDmode constants into these rtx,
6461 since they would impede folding. */
6462 if (GET_MODE (new) != VOIDmode
)
6463 validate_change (object
, &XEXP (x
, 0), new, 0);
6468 i
= REG_QTY (REGNO (x
));
6470 /* Return a constant or a constant register. */
6471 if (REGNO_QTY_VALID_P (REGNO (x
)))
6473 struct qty_table_elem
*ent
= &qty_table
[i
];
6475 if (ent
->const_rtx
!= NULL_RTX
6476 && (CONSTANT_P (ent
->const_rtx
)
6477 || REG_P (ent
->const_rtx
)))
6479 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6485 /* Otherwise, canonicalize this register. */
6486 return canon_reg (x
, NULL_RTX
);
6492 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6494 validate_change (object
, &XEXP (x
, i
),
6495 cse_process_notes (XEXP (x
, i
), object
), 0);
6500 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6501 since they are done elsewhere. This function is called via note_stores. */
6504 invalidate_skipped_set (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
6506 enum rtx_code code
= GET_CODE (dest
);
6509 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6510 /* There are times when an address can appear varying and be a PLUS
6511 during this scan when it would be a fixed address were we to know
6512 the proper equivalences. So invalidate all memory if there is
6513 a BLKmode or nonscalar memory reference or a reference to a
6514 variable address. */
6515 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6516 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6518 invalidate_memory ();
6522 if (GET_CODE (set
) == CLOBBER
6527 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6528 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6529 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6530 invalidate (dest
, VOIDmode
);
6533 /* Invalidate all insns from START up to the end of the function or the
6534 next label. This called when we wish to CSE around a block that is
6535 conditionally executed. */
6538 invalidate_skipped_block (rtx start
)
6542 for (insn
= start
; insn
&& !LABEL_P (insn
);
6543 insn
= NEXT_INSN (insn
))
6545 if (! INSN_P (insn
))
6550 if (! CONST_OR_PURE_CALL_P (insn
))
6551 invalidate_memory ();
6552 invalidate_for_call ();
6555 invalidate_from_clobbers (PATTERN (insn
));
6556 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6560 /* Find the end of INSN's basic block and return its range,
6561 the total number of SETs in all the insns of the block, the last insn of the
6562 block, and the branch path.
6564 The branch path indicates which branches should be followed. If a nonzero
6565 path size is specified, the block should be rescanned and a different set
6566 of branches will be taken. The branch path is only used if
6567 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6569 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6570 used to describe the block. It is filled in with the information about
6571 the current block. The incoming structure's branch path, if any, is used
6572 to construct the output branch path. */
6575 cse_end_of_basic_block (rtx insn
, struct cse_basic_block_data
*data
,
6576 int follow_jumps
, int skip_blocks
)
6580 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6581 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6582 int path_size
= data
->path_size
;
6586 /* Update the previous branch path, if any. If the last branch was
6587 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6588 If it was previously PATH_NOT_TAKEN,
6589 shorten the path by one and look at the previous branch. We know that
6590 at least one branch must have been taken if PATH_SIZE is nonzero. */
6591 while (path_size
> 0)
6593 if (data
->path
[path_size
- 1].status
!= PATH_NOT_TAKEN
)
6595 data
->path
[path_size
- 1].status
= PATH_NOT_TAKEN
;
6602 /* If the first instruction is marked with QImode, that means we've
6603 already processed this block. Our caller will look at DATA->LAST
6604 to figure out where to go next. We want to return the next block
6605 in the instruction stream, not some branched-to block somewhere
6606 else. We accomplish this by pretending our called forbid us to
6607 follow jumps, or skip blocks. */
6608 if (GET_MODE (insn
) == QImode
)
6609 follow_jumps
= skip_blocks
= 0;
6611 /* Scan to end of this basic block. */
6612 while (p
&& !LABEL_P (p
))
6614 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6615 the regs restored by the longjmp come from
6616 a later time than the setjmp. */
6617 if (PREV_INSN (p
) && CALL_P (PREV_INSN (p
))
6618 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6621 /* A PARALLEL can have lots of SETs in it,
6622 especially if it is really an ASM_OPERANDS. */
6623 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6624 nsets
+= XVECLEN (PATTERN (p
), 0);
6625 else if (!NOTE_P (p
))
6628 /* Ignore insns made by CSE; they cannot affect the boundaries of
6631 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6632 high_cuid
= INSN_CUID (p
);
6633 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6634 low_cuid
= INSN_CUID (p
);
6636 /* See if this insn is in our branch path. If it is and we are to
6638 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6640 if (data
->path
[path_entry
].status
!= PATH_NOT_TAKEN
)
6643 /* Point to next entry in path, if any. */
6647 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6648 was specified, we haven't reached our maximum path length, there are
6649 insns following the target of the jump, this is the only use of the
6650 jump label, and the target label is preceded by a BARRIER.
6652 Alternatively, we can follow the jump if it branches around a
6653 block of code and there are no other branches into the block.
6654 In this case invalidate_skipped_block will be called to invalidate any
6655 registers set in the block when following the jump. */
6657 else if ((follow_jumps
|| skip_blocks
) && path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
) - 1
6659 && GET_CODE (PATTERN (p
)) == SET
6660 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6661 && JUMP_LABEL (p
) != 0
6662 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6663 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6665 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6667 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
6668 || (PREV_INSN (q
) && CALL_P (PREV_INSN (q
))
6669 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6670 && (!LABEL_P (q
) || LABEL_NUSES (q
) != 0))
6673 /* If we ran into a BARRIER, this code is an extension of the
6674 basic block when the branch is taken. */
6675 if (follow_jumps
&& q
!= 0 && BARRIER_P (q
))
6677 /* Don't allow ourself to keep walking around an
6678 always-executed loop. */
6679 if (next_real_insn (q
) == next
)
6685 /* Similarly, don't put a branch in our path more than once. */
6686 for (i
= 0; i
< path_entry
; i
++)
6687 if (data
->path
[i
].branch
== p
)
6690 if (i
!= path_entry
)
6693 data
->path
[path_entry
].branch
= p
;
6694 data
->path
[path_entry
++].status
= PATH_TAKEN
;
6696 /* This branch now ends our path. It was possible that we
6697 didn't see this branch the last time around (when the
6698 insn in front of the target was a JUMP_INSN that was
6699 turned into a no-op). */
6700 path_size
= path_entry
;
6703 /* Mark block so we won't scan it again later. */
6704 PUT_MODE (NEXT_INSN (p
), QImode
);
6706 /* Detect a branch around a block of code. */
6707 else if (skip_blocks
&& q
!= 0 && !LABEL_P (q
))
6711 if (next_real_insn (q
) == next
)
6717 for (i
= 0; i
< path_entry
; i
++)
6718 if (data
->path
[i
].branch
== p
)
6721 if (i
!= path_entry
)
6724 /* This is no_labels_between_p (p, q) with an added check for
6725 reaching the end of a function (in case Q precedes P). */
6726 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
6732 data
->path
[path_entry
].branch
= p
;
6733 data
->path
[path_entry
++].status
= PATH_AROUND
;
6735 path_size
= path_entry
;
6738 /* Mark block so we won't scan it again later. */
6739 PUT_MODE (NEXT_INSN (p
), QImode
);
6746 data
->low_cuid
= low_cuid
;
6747 data
->high_cuid
= high_cuid
;
6748 data
->nsets
= nsets
;
6751 /* If all jumps in the path are not taken, set our path length to zero
6752 so a rescan won't be done. */
6753 for (i
= path_size
- 1; i
>= 0; i
--)
6754 if (data
->path
[i
].status
!= PATH_NOT_TAKEN
)
6758 data
->path_size
= 0;
6760 data
->path_size
= path_size
;
6762 /* End the current branch path. */
6763 data
->path
[path_size
].branch
= 0;
6766 /* Perform cse on the instructions of a function.
6767 F is the first instruction.
6768 NREGS is one plus the highest pseudo-reg number used in the instruction.
6770 Returns 1 if jump_optimize should be redone due to simplifications
6771 in conditional jump instructions. */
6774 cse_main (rtx f
, int nregs
, FILE *file
)
6776 struct cse_basic_block_data val
;
6780 init_cse_reg_info (nregs
);
6782 val
.path
= xmalloc (sizeof (struct branch_path
)
6783 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6785 cse_jumps_altered
= 0;
6786 recorded_label_ref
= 0;
6787 constant_pool_entries_cost
= 0;
6788 constant_pool_entries_regcost
= 0;
6790 rtl_hooks
= cse_rtl_hooks
;
6793 init_alias_analysis ();
6795 reg_eqv_table
= xmalloc (nregs
* sizeof (struct reg_eqv_elem
));
6797 /* Find the largest uid. */
6799 max_uid
= get_max_uid ();
6800 uid_cuid
= xcalloc (max_uid
+ 1, sizeof (int));
6802 /* Compute the mapping from uids to cuids.
6803 CUIDs are numbers assigned to insns, like uids,
6804 except that cuids increase monotonically through the code.
6805 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6806 between two insns is not affected by -g. */
6808 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
6811 || NOTE_LINE_NUMBER (insn
) < 0)
6812 INSN_CUID (insn
) = ++i
;
6814 /* Give a line number note the same cuid as preceding insn. */
6815 INSN_CUID (insn
) = i
;
6818 /* Loop over basic blocks.
6819 Compute the maximum number of qty's needed for each basic block
6820 (which is 2 for each SET). */
6825 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
,
6826 flag_cse_skip_blocks
);
6828 /* If this basic block was already processed or has no sets, skip it. */
6829 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
6831 PUT_MODE (insn
, VOIDmode
);
6832 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
6837 cse_basic_block_start
= val
.low_cuid
;
6838 cse_basic_block_end
= val
.high_cuid
;
6839 max_qty
= val
.nsets
* 2;
6842 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
6843 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
6846 /* Make MAX_QTY bigger to give us room to optimize
6847 past the end of this basic block, if that should prove useful. */
6851 /* If this basic block is being extended by following certain jumps,
6852 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6853 Otherwise, we start after this basic block. */
6854 if (val
.path_size
> 0)
6855 cse_basic_block (insn
, val
.last
, val
.path
);
6858 int old_cse_jumps_altered
= cse_jumps_altered
;
6861 /* When cse changes a conditional jump to an unconditional
6862 jump, we want to reprocess the block, since it will give
6863 us a new branch path to investigate. */
6864 cse_jumps_altered
= 0;
6865 temp
= cse_basic_block (insn
, val
.last
, val
.path
);
6866 if (cse_jumps_altered
== 0
6867 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
6870 cse_jumps_altered
|= old_cse_jumps_altered
;
6882 end_alias_analysis ();
6884 free (reg_eqv_table
);
6886 rtl_hooks
= general_rtl_hooks
;
6888 return cse_jumps_altered
|| recorded_label_ref
;
6891 /* Process a single basic block. FROM and TO and the limits of the basic
6892 block. NEXT_BRANCH points to the branch path when following jumps or
6893 a null path when not following jumps. */
6896 cse_basic_block (rtx from
, rtx to
, struct branch_path
*next_branch
)
6900 rtx libcall_insn
= NULL_RTX
;
6902 int no_conflict
= 0;
6904 /* Allocate the space needed by qty_table. */
6905 qty_table
= xmalloc (max_qty
* sizeof (struct qty_table_elem
));
6909 /* TO might be a label. If so, protect it from being deleted. */
6910 if (to
!= 0 && LABEL_P (to
))
6913 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
6915 enum rtx_code code
= GET_CODE (insn
);
6917 /* If we have processed 1,000 insns, flush the hash table to
6918 avoid extreme quadratic behavior. We must not include NOTEs
6919 in the count since there may be more of them when generating
6920 debugging information. If we clear the table at different
6921 times, code generated with -g -O might be different than code
6922 generated with -O but not -g.
6924 ??? This is a real kludge and needs to be done some other way.
6926 if (code
!= NOTE
&& num_insns
++ > 1000)
6928 flush_hash_table ();
6932 /* See if this is a branch that is part of the path. If so, and it is
6933 to be taken, do so. */
6934 if (next_branch
->branch
== insn
)
6936 enum taken status
= next_branch
++->status
;
6937 if (status
!= PATH_NOT_TAKEN
)
6939 if (status
== PATH_TAKEN
)
6940 record_jump_equiv (insn
, 1);
6942 invalidate_skipped_block (NEXT_INSN (insn
));
6944 /* Set the last insn as the jump insn; it doesn't affect cc0.
6945 Then follow this branch. */
6950 insn
= JUMP_LABEL (insn
);
6955 if (GET_MODE (insn
) == QImode
)
6956 PUT_MODE (insn
, VOIDmode
);
6958 if (GET_RTX_CLASS (code
) == RTX_INSN
)
6962 /* Process notes first so we have all notes in canonical forms when
6963 looking for duplicate operations. */
6965 if (REG_NOTES (insn
))
6966 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
6968 /* Track when we are inside in LIBCALL block. Inside such a block,
6969 we do not want to record destinations. The last insn of a
6970 LIBCALL block is not considered to be part of the block, since
6971 its destination is the result of the block and hence should be
6974 if (REG_NOTES (insn
) != 0)
6976 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
6977 libcall_insn
= XEXP (p
, 0);
6978 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6980 /* Keep libcall_insn for the last SET insn of a no-conflict
6981 block to prevent changing the destination. */
6987 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
6991 cse_insn (insn
, libcall_insn
);
6993 if (no_conflict
== -1)
6999 /* If we haven't already found an insn where we added a LABEL_REF,
7001 if (NONJUMP_INSN_P (insn
) && ! recorded_label_ref
7002 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
7004 recorded_label_ref
= 1;
7007 /* If INSN is now an unconditional jump, skip to the end of our
7008 basic block by pretending that we just did the last insn in the
7009 basic block. If we are jumping to the end of our block, show
7010 that we can have one usage of TO. */
7012 if (any_uncondjump_p (insn
))
7020 if (JUMP_LABEL (insn
) == to
)
7023 /* Maybe TO was deleted because the jump is unconditional.
7024 If so, there is nothing left in this basic block. */
7025 /* ??? Perhaps it would be smarter to set TO
7026 to whatever follows this insn,
7027 and pretend the basic block had always ended here. */
7028 if (INSN_DELETED_P (to
))
7031 insn
= PREV_INSN (to
);
7034 /* See if it is ok to keep on going past the label
7035 which used to end our basic block. Remember that we incremented
7036 the count of that label, so we decrement it here. If we made
7037 a jump unconditional, TO_USAGE will be one; in that case, we don't
7038 want to count the use in that jump. */
7040 if (to
!= 0 && NEXT_INSN (insn
) == to
7041 && LABEL_P (to
) && --LABEL_NUSES (to
) == to_usage
)
7043 struct cse_basic_block_data val
;
7046 insn
= NEXT_INSN (to
);
7048 /* If TO was the last insn in the function, we are done. */
7055 /* If TO was preceded by a BARRIER we are done with this block
7056 because it has no continuation. */
7057 prev
= prev_nonnote_insn (to
);
7058 if (prev
&& BARRIER_P (prev
))
7064 /* Find the end of the following block. Note that we won't be
7065 following branches in this case. */
7068 val
.path
= xmalloc (sizeof (struct branch_path
)
7069 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
7070 cse_end_of_basic_block (insn
, &val
, 0, 0);
7073 /* If the tables we allocated have enough space left
7074 to handle all the SETs in the next basic block,
7075 continue through it. Otherwise, return,
7076 and that block will be scanned individually. */
7077 if (val
.nsets
* 2 + next_qty
> max_qty
)
7080 cse_basic_block_start
= val
.low_cuid
;
7081 cse_basic_block_end
= val
.high_cuid
;
7084 /* Prevent TO from being deleted if it is a label. */
7085 if (to
!= 0 && LABEL_P (to
))
7088 /* Back up so we process the first insn in the extension. */
7089 insn
= PREV_INSN (insn
);
7093 gcc_assert (next_qty
<= max_qty
);
7097 return to
? NEXT_INSN (to
) : 0;
7100 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7101 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7104 check_for_label_ref (rtx
*rtl
, void *data
)
7106 rtx insn
= (rtx
) data
;
7108 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7109 we must rerun jump since it needs to place the note. If this is a
7110 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7111 since no REG_LABEL will be added. */
7112 return (GET_CODE (*rtl
) == LABEL_REF
7113 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7114 && LABEL_P (XEXP (*rtl
, 0))
7115 && INSN_UID (XEXP (*rtl
, 0)) != 0
7116 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7119 /* Count the number of times registers are used (not set) in X.
7120 COUNTS is an array in which we accumulate the count, INCR is how much
7121 we count each register usage. */
7124 count_reg_usage (rtx x
, int *counts
, int incr
)
7134 switch (code
= GET_CODE (x
))
7137 counts
[REGNO (x
)] += incr
;
7151 /* If we are clobbering a MEM, mark any registers inside the address
7153 if (MEM_P (XEXP (x
, 0)))
7154 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, incr
);
7158 /* Unless we are setting a REG, count everything in SET_DEST. */
7159 if (!REG_P (SET_DEST (x
)))
7160 count_reg_usage (SET_DEST (x
), counts
, incr
);
7161 count_reg_usage (SET_SRC (x
), counts
, incr
);
7165 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, incr
);
7170 count_reg_usage (PATTERN (x
), counts
, incr
);
7172 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7175 note
= find_reg_equal_equiv_note (x
);
7178 rtx eqv
= XEXP (note
, 0);
7180 if (GET_CODE (eqv
) == EXPR_LIST
)
7181 /* This REG_EQUAL note describes the result of a function call.
7182 Process all the arguments. */
7185 count_reg_usage (XEXP (eqv
, 0), counts
, incr
);
7186 eqv
= XEXP (eqv
, 1);
7188 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
7190 count_reg_usage (eqv
, counts
, incr
);
7195 if (REG_NOTE_KIND (x
) == REG_EQUAL
7196 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
7197 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7198 involving registers in the address. */
7199 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
7200 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7202 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7206 /* Iterate over just the inputs, not the constraints as well. */
7207 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
7208 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, incr
);
7218 fmt
= GET_RTX_FORMAT (code
);
7219 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7222 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7223 else if (fmt
[i
] == 'E')
7224 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7225 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7229 /* Return true if set is live. */
7231 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7238 if (set_noop_p (set
))
7242 else if (GET_CODE (SET_DEST (set
)) == CC0
7243 && !side_effects_p (SET_SRC (set
))
7244 && ((tem
= next_nonnote_insn (insn
)) == 0
7246 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7249 else if (!REG_P (SET_DEST (set
))
7250 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7251 || counts
[REGNO (SET_DEST (set
))] != 0
7252 || side_effects_p (SET_SRC (set
)))
7257 /* Return true if insn is live. */
7260 insn_live_p (rtx insn
, int *counts
)
7263 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
7265 else if (GET_CODE (PATTERN (insn
)) == SET
)
7266 return set_live_p (PATTERN (insn
), insn
, counts
);
7267 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7269 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7271 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7273 if (GET_CODE (elt
) == SET
)
7275 if (set_live_p (elt
, insn
, counts
))
7278 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7287 /* Return true if libcall is dead as a whole. */
7290 dead_libcall_p (rtx insn
, int *counts
)
7294 /* See if there's a REG_EQUAL note on this insn and try to
7295 replace the source with the REG_EQUAL expression.
7297 We assume that insns with REG_RETVALs can only be reg->reg
7298 copies at this point. */
7299 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7303 set
= single_set (insn
);
7307 new = simplify_rtx (XEXP (note
, 0));
7309 new = XEXP (note
, 0);
7311 /* While changing insn, we must update the counts accordingly. */
7312 count_reg_usage (insn
, counts
, -1);
7314 if (validate_change (insn
, &SET_SRC (set
), new, 0))
7316 count_reg_usage (insn
, counts
, 1);
7317 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7318 remove_note (insn
, note
);
7322 if (CONSTANT_P (new))
7324 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
7325 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
7327 count_reg_usage (insn
, counts
, 1);
7328 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7329 remove_note (insn
, note
);
7334 count_reg_usage (insn
, counts
, 1);
7338 /* Scan all the insns and delete any that are dead; i.e., they store a register
7339 that is never used or they copy a register to itself.
7341 This is used to remove insns made obviously dead by cse, loop or other
7342 optimizations. It improves the heuristics in loop since it won't try to
7343 move dead invariants out of loops or make givs for dead quantities. The
7344 remaining passes of the compilation are also sped up. */
7347 delete_trivially_dead_insns (rtx insns
, int nreg
)
7351 int in_libcall
= 0, dead_libcall
= 0;
7354 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7355 /* First count the number of times each register is used. */
7356 counts
= xcalloc (nreg
, sizeof (int));
7357 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7359 count_reg_usage (insn
, counts
, 1);
7361 /* Go from the last insn to the first and delete insns that only set unused
7362 registers or copy a register to itself. As we delete an insn, remove
7363 usage counts for registers it uses.
7365 The first jump optimization pass may leave a real insn as the last
7366 insn in the function. We must not skip that insn or we may end
7367 up deleting code that is not really dead. */
7368 for (insn
= get_last_insn (); insn
; insn
= prev
)
7372 prev
= PREV_INSN (insn
);
7376 /* Don't delete any insns that are part of a libcall block unless
7377 we can delete the whole libcall block.
7379 Flow or loop might get confused if we did that. Remember
7380 that we are scanning backwards. */
7381 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7385 dead_libcall
= dead_libcall_p (insn
, counts
);
7387 else if (in_libcall
)
7388 live_insn
= ! dead_libcall
;
7390 live_insn
= insn_live_p (insn
, counts
);
7392 /* If this is a dead insn, delete it and show registers in it aren't
7397 count_reg_usage (insn
, counts
, -1);
7398 delete_insn_and_edges (insn
);
7402 if (in_libcall
&& find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7409 if (dump_file
&& ndead
)
7410 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7414 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7418 /* This function is called via for_each_rtx. The argument, NEWREG, is
7419 a condition code register with the desired mode. If we are looking
7420 at the same register in a different mode, replace it with
7424 cse_change_cc_mode (rtx
*loc
, void *data
)
7426 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
7430 && REGNO (*loc
) == REGNO (args
->newreg
)
7431 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
7433 validate_change (args
->insn
, loc
, args
->newreg
, 1);
7440 /* Change the mode of any reference to the register REGNO (NEWREG) to
7441 GET_MODE (NEWREG) in INSN. */
7444 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
7446 struct change_cc_mode_args args
;
7453 args
.newreg
= newreg
;
7455 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
7456 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
7458 /* If the following assertion was triggered, there is most probably
7459 something wrong with the cc_modes_compatible back end function.
7460 CC modes only can be considered compatible if the insn - with the mode
7461 replaced by any of the compatible modes - can still be recognized. */
7462 success
= apply_change_group ();
7463 gcc_assert (success
);
7466 /* Change the mode of any reference to the register REGNO (NEWREG) to
7467 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7468 any instruction which modifies NEWREG. */
7471 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7475 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7477 if (! INSN_P (insn
))
7480 if (reg_set_p (newreg
, insn
))
7483 cse_change_cc_mode_insn (insn
, newreg
);
7487 /* BB is a basic block which finishes with CC_REG as a condition code
7488 register which is set to CC_SRC. Look through the successors of BB
7489 to find blocks which have a single predecessor (i.e., this one),
7490 and look through those blocks for an assignment to CC_REG which is
7491 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7492 permitted to change the mode of CC_SRC to a compatible mode. This
7493 returns VOIDmode if no equivalent assignments were found.
7494 Otherwise it returns the mode which CC_SRC should wind up with.
7496 The main complexity in this function is handling the mode issues.
7497 We may have more than one duplicate which we can eliminate, and we
7498 try to find a mode which will work for multiple duplicates. */
7500 static enum machine_mode
7501 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
7504 enum machine_mode mode
;
7505 unsigned int insn_count
;
7508 enum machine_mode modes
[2];
7514 /* We expect to have two successors. Look at both before picking
7515 the final mode for the comparison. If we have more successors
7516 (i.e., some sort of table jump, although that seems unlikely),
7517 then we require all beyond the first two to use the same
7520 found_equiv
= false;
7521 mode
= GET_MODE (cc_src
);
7523 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7528 if (e
->flags
& EDGE_COMPLEX
)
7531 if (EDGE_COUNT (e
->dest
->preds
) != 1
7532 || e
->dest
== EXIT_BLOCK_PTR
)
7535 end
= NEXT_INSN (BB_END (e
->dest
));
7536 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7540 if (! INSN_P (insn
))
7543 /* If CC_SRC is modified, we have to stop looking for
7544 something which uses it. */
7545 if (modified_in_p (cc_src
, insn
))
7548 /* Check whether INSN sets CC_REG to CC_SRC. */
7549 set
= single_set (insn
);
7551 && REG_P (SET_DEST (set
))
7552 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7555 enum machine_mode set_mode
;
7556 enum machine_mode comp_mode
;
7559 set_mode
= GET_MODE (SET_SRC (set
));
7560 comp_mode
= set_mode
;
7561 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7563 else if (GET_CODE (cc_src
) == COMPARE
7564 && GET_CODE (SET_SRC (set
)) == COMPARE
7566 && rtx_equal_p (XEXP (cc_src
, 0),
7567 XEXP (SET_SRC (set
), 0))
7568 && rtx_equal_p (XEXP (cc_src
, 1),
7569 XEXP (SET_SRC (set
), 1)))
7572 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7573 if (comp_mode
!= VOIDmode
7574 && (can_change_mode
|| comp_mode
== mode
))
7581 if (insn_count
< ARRAY_SIZE (insns
))
7583 insns
[insn_count
] = insn
;
7584 modes
[insn_count
] = set_mode
;
7585 last_insns
[insn_count
] = end
;
7588 if (mode
!= comp_mode
)
7590 gcc_assert (can_change_mode
);
7593 /* The modified insn will be re-recognized later. */
7594 PUT_MODE (cc_src
, mode
);
7599 if (set_mode
!= mode
)
7601 /* We found a matching expression in the
7602 wrong mode, but we don't have room to
7603 store it in the array. Punt. This case
7607 /* INSN sets CC_REG to a value equal to CC_SRC
7608 with the right mode. We can simply delete
7613 /* We found an instruction to delete. Keep looking,
7614 in the hopes of finding a three-way jump. */
7618 /* We found an instruction which sets the condition
7619 code, so don't look any farther. */
7623 /* If INSN sets CC_REG in some other way, don't look any
7625 if (reg_set_p (cc_reg
, insn
))
7629 /* If we fell off the bottom of the block, we can keep looking
7630 through successors. We pass CAN_CHANGE_MODE as false because
7631 we aren't prepared to handle compatibility between the
7632 further blocks and this block. */
7635 enum machine_mode submode
;
7637 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
7638 if (submode
!= VOIDmode
)
7640 gcc_assert (submode
== mode
);
7642 can_change_mode
= false;
7650 /* Now INSN_COUNT is the number of instructions we found which set
7651 CC_REG to a value equivalent to CC_SRC. The instructions are in
7652 INSNS. The modes used by those instructions are in MODES. */
7655 for (i
= 0; i
< insn_count
; ++i
)
7657 if (modes
[i
] != mode
)
7659 /* We need to change the mode of CC_REG in INSNS[i] and
7660 subsequent instructions. */
7663 if (GET_MODE (cc_reg
) == mode
)
7666 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7668 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7672 delete_insn (insns
[i
]);
7678 /* If we have a fixed condition code register (or two), walk through
7679 the instructions and try to eliminate duplicate assignments. */
7682 cse_condition_code_reg (void)
7684 unsigned int cc_regno_1
;
7685 unsigned int cc_regno_2
;
7690 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7693 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7694 if (cc_regno_2
!= INVALID_REGNUM
)
7695 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7697 cc_reg_2
= NULL_RTX
;
7706 enum machine_mode mode
;
7707 enum machine_mode orig_mode
;
7709 /* Look for blocks which end with a conditional jump based on a
7710 condition code register. Then look for the instruction which
7711 sets the condition code register. Then look through the
7712 successor blocks for instructions which set the condition
7713 code register to the same value. There are other possible
7714 uses of the condition code register, but these are by far the
7715 most common and the ones which we are most likely to be able
7718 last_insn
= BB_END (bb
);
7719 if (!JUMP_P (last_insn
))
7722 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7724 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7729 cc_src_insn
= NULL_RTX
;
7731 for (insn
= PREV_INSN (last_insn
);
7732 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7733 insn
= PREV_INSN (insn
))
7737 if (! INSN_P (insn
))
7739 set
= single_set (insn
);
7741 && REG_P (SET_DEST (set
))
7742 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7745 cc_src
= SET_SRC (set
);
7748 else if (reg_set_p (cc_reg
, insn
))
7755 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7758 /* Now CC_REG is a condition code register used for a
7759 conditional jump at the end of the block, and CC_SRC, in
7760 CC_SRC_INSN, is the value to which that condition code
7761 register is set, and CC_SRC is still meaningful at the end of
7764 orig_mode
= GET_MODE (cc_src
);
7765 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
7766 if (mode
!= VOIDmode
)
7768 gcc_assert (mode
== GET_MODE (cc_src
));
7769 if (mode
!= orig_mode
)
7771 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7773 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7775 /* Do the same in the following insns that use the
7776 current value of CC_REG within BB. */
7777 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7778 NEXT_INSN (last_insn
),