gcc/config/sh/linux-unwind.h

   1 /* DWARF2 EH unwinding support for SH Linux.
   2    Copyright (C) 2004, 2005 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2, or (at your option)
   9 any later version.
  10
  11 In addition to the permissions in the GNU General Public License, the
  12 Free Software Foundation gives you unlimited permission to link the
  13 compiled version of this file with other programs, and to distribute
  14 those programs without any restriction coming from the use of this
  15 file.  (The General Public License restrictions do apply in other
  16 respects; for example, they cover modification of the file, and
  17 distribution when not linked into another program.)
  18
  19 GCC is distributed in the hope that it will be useful,
  20 but WITHOUT ANY WARRANTY; without even the implied warranty of
  21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22 GNU General Public License for more details.
  23
  24 You should have received a copy of the GNU General Public License
  25 along with this program; see the file COPYING.  If not, write to
  26 the Free Software Foundation, 59 Temple Place - Suite 330,
  27 Boston, MA 02111-1307, USA.  */
  28
  29 /* Do code reading to identify a signal frame, and set the frame
  30    state data appropriately.  See unwind-dw2.c for the structs.  */
  31
  32 #include <signal.h>
  33 #include <sys/ucontext.h>
  34 #include "insn-constants.h"
  35
  36 # if defined (__SH5__)
  37 #define SH_DWARF_FRAME_GP0      0
  38 #define SH_DWARF_FRAME_FP0      77
  39 #define SH_DWARF_FRAME_BT0      68
  40 #define SH_DWARF_FRAME_PR_MEDIA 18
  41 #define SH_DWARF_FRAME_SR       65
  42 #define SH_DWARF_FRAME_FPSCR    76
  43 #else
  44 #define SH_DWARF_FRAME_GP0      0
  45 #define SH_DWARF_FRAME_FP0      25
  46 #define SH_DWARF_FRAME_XD0      87
  47 #define SH_DWARF_FRAME_PR       17
  48 #define SH_DWARF_FRAME_GBR      19
  49 #define SH_DWARF_FRAME_MACH     20
  50 #define SH_DWARF_FRAME_MACL     21
  51 #define SH_DWARF_FRAME_PC       16
  52 #define SH_DWARF_FRAME_SR       22
  53 #define SH_DWARF_FRAME_FPUL     23
  54 #define SH_DWARF_FRAME_FPSCR    24
  55 #endif /* defined (__SH5__) */
  56
  57 #if defined (__SH5__)
  58
  59 #define MD_FALLBACK_FRAME_STATE_FOR shmedia_fallback_frame_state
  60
  61 static _Unwind_Reason_Code
  62 shmedia_fallback_frame_state (struct _Unwind_Context *context,
  63                               _Unwind_FrameState *fs)
  64 {
  65   unsigned char *pc = context->ra;
  66   struct sigcontext *sc;
  67   long new_cfa;
  68   int i, r;
  69
  70   /* movi 0x10,r9; shori 0x77,r9; trapa r9; nop (sigreturn)  */
  71   /* movi 0x10,r9; shori 0xad,r9; trapa r9; nop (rt_sigreturn)  */
  72   if ((*(unsigned long *) (pc-1)  == 0xcc004090)
  73       && (*(unsigned long *) (pc+3)  == 0xc801dc90)
  74       && (*(unsigned long *) (pc+7)  == 0x6c91fff0)
  75       && (*(unsigned long *) (pc+11)  == 0x6ff0fff0))
  76     sc = context->cfa;
  77   else if ((*(unsigned long *) (pc-1)  == 0xcc004090)
  78            && (*(unsigned long *) (pc+3)  == 0xc802b490)
  79            && (*(unsigned long *) (pc+7)  == 0x6c91fff0)
  80            && (*(unsigned long *) (pc+11)  == 0x6ff0fff0))
  81     {
  82       struct rt_sigframe {
  83         struct siginfo *pinfo;
  84         void *puc;
  85         struct siginfo info;
  86         struct ucontext uc;
  87       } *rt_ = context->cfa;
  88       sc = (struct sigcontext *) &rt_->uc.uc_mcontext;
  89     }
  90   else
  91     return _URC_END_OF_STACK;
  92
  93   new_cfa = sc->sc_regs[15];
  94   fs->cfa_how = CFA_REG_OFFSET;
  95   fs->cfa_reg = 15;
  96   fs->cfa_offset = new_cfa - (long) context->cfa;
  97
  98   for (i = 0; i < 63; i++)
  99     {
 100       if (i == 15)
 101         continue;
 102
 103       fs->regs.reg[i].how = REG_SAVED_OFFSET;
 104       fs->regs.reg[i].loc.offset
 105         = (long)&(sc->sc_regs[i]) - new_cfa;
 106     }
 107
 108   fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
 109   fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
 110     = (long)&(sc->sc_sr) - new_cfa;
 111
 112   r = SH_DWARF_FRAME_BT0;
 113   for (i = 0; i < 8; i++)
 114     {
 115       fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
 116       fs->regs.reg[r+i].loc.offset
 117         = (long)&(sc->sc_tregs[i]) - new_cfa;
 118     }
 119
 120   r = SH_DWARF_FRAME_FP0;
 121   for (i = 0; i < 32; i++)
 122     {
 123       fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
 124       fs->regs.reg[r+i].loc.offset
 125         = (long)&(sc->sc_fpregs[i]) - new_cfa;
 126     }
 127
 128   fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
 129   fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
 130     = (long)&(sc->sc_fpscr) - new_cfa;
 131
 132   /* We use the slot for the zero register to save return address.  */
 133   fs->regs.reg[63].how = REG_SAVED_OFFSET;
 134   fs->regs.reg[63].loc.offset
 135     = (long)&(sc->sc_pc) - new_cfa;
 136   fs->retaddr_column = 63;
 137   return _URC_NO_REASON;
 138 }
 139
 140 #else /* defined (__SH5__) */
 141
 142 #define MD_FALLBACK_FRAME_STATE_FOR sh_fallback_frame_state
 143
 144 static _Unwind_Reason_Code
 145 sh_fallback_frame_state (struct _Unwind_Context *context,
 146                          _Unwind_FrameState *fs)
 147 {
 148   unsigned char *pc = context->ra;
 149   struct sigcontext *sc;
 150   long new_cfa;
 151   int i;
 152 #if defined (__SH3E__) || defined (__SH4__)
 153   int r;
 154 #endif
 155
 156   /* mov.w 1f,r3; trapa #0x10; 1: .short 0x77  (sigreturn)  */
 157   /* mov.w 1f,r3; trapa #0x10; 1: .short 0xad  (rt_sigreturn)  */
 158   /* Newer kernel uses pad instructions to avoid an SH-4 core bug.  */
 159   /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
 160      or r0,r0; 1: .short 0x77  (sigreturn)  */
 161   /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
 162      or r0,r0; 1: .short 0xad  (rt_sigreturn)  */
 163   if (((*(unsigned short *) (pc+0)  == 0x9300)
 164        && (*(unsigned short *) (pc+2)  == 0xc310)
 165        && (*(unsigned short *) (pc+4)  == 0x0077))
 166       || (((*(unsigned short *) (pc+0)  == 0x9305)
 167            && (*(unsigned short *) (pc+2)  == 0xc310)
 168            && (*(unsigned short *) (pc+14)  == 0x0077))))
 169     sc = context->cfa;
 170   else if (((*(unsigned short *) (pc+0) == 0x9300)
 171             && (*(unsigned short *) (pc+2)  == 0xc310)
 172             && (*(unsigned short *) (pc+4)  == 0x00ad))
 173            || (((*(unsigned short *) (pc+0) == 0x9305)
 174                 && (*(unsigned short *) (pc+2)  == 0xc310)
 175                 && (*(unsigned short *) (pc+14)  == 0x00ad))))
 176     {
 177       struct rt_sigframe {
 178         struct siginfo info;
 179         struct ucontext uc;
 180       } *rt_ = context->cfa;
 181       sc = (struct sigcontext *) &rt_->uc.uc_mcontext;
 182     }
 183   else
 184     return _URC_END_OF_STACK;
 185
 186   new_cfa = sc->sc_regs[15];
 187   fs->cfa_how = CFA_REG_OFFSET;
 188   fs->cfa_reg = 15;
 189   fs->cfa_offset = new_cfa - (long) context->cfa;
 190
 191   for (i = 0; i < 15; i++)
 192     {
 193       fs->regs.reg[i].how = REG_SAVED_OFFSET;
 194       fs->regs.reg[i].loc.offset
 195         = (long)&(sc->sc_regs[i]) - new_cfa;
 196     }
 197
 198   fs->regs.reg[SH_DWARF_FRAME_PR].how = REG_SAVED_OFFSET;
 199   fs->regs.reg[SH_DWARF_FRAME_PR].loc.offset
 200     = (long)&(sc->sc_pr) - new_cfa;
 201   fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
 202   fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
 203     = (long)&(sc->sc_sr) - new_cfa;
 204   fs->regs.reg[SH_DWARF_FRAME_GBR].how = REG_SAVED_OFFSET;
 205   fs->regs.reg[SH_DWARF_FRAME_GBR].loc.offset
 206     = (long)&(sc->sc_gbr) - new_cfa;
 207   fs->regs.reg[SH_DWARF_FRAME_MACH].how = REG_SAVED_OFFSET;
 208   fs->regs.reg[SH_DWARF_FRAME_MACH].loc.offset
 209     = (long)&(sc->sc_mach) - new_cfa;
 210   fs->regs.reg[SH_DWARF_FRAME_MACL].how = REG_SAVED_OFFSET;
 211   fs->regs.reg[SH_DWARF_FRAME_MACL].loc.offset
 212     = (long)&(sc->sc_macl) - new_cfa;
 213
 214 #if defined (__SH3E__) || defined (__SH4__)
 215   r = SH_DWARF_FRAME_FP0;
 216   for (i = 0; i < 16; i++)
 217     {
 218       fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
 219       fs->regs.reg[r+i].loc.offset
 220         = (long)&(sc->sc_fpregs[i]) - new_cfa;
 221     }
 222
 223   r = SH_DWARF_FRAME_XD0;
 224   for (i = 0; i < 8; i++)
 225     {
 226       fs->regs.reg[i].how = REG_SAVED_OFFSET;
 227       fs->regs.reg[i].loc.offset
 228         = (long)&(sc->sc_xfpregs[2*i]) - new_cfa;
 229     }
 230
 231   fs->regs.reg[SH_DWARF_FRAME_FPUL].how = REG_SAVED_OFFSET;
 232   fs->regs.reg[SH_DWARF_FRAME_FPUL].loc.offset
 233     = (long)&(sc->sc_fpul) - new_cfa;
 234   fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
 235   fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
 236     = (long)&(sc->sc_fpscr) - new_cfa;
 237 #endif
 238
 239   fs->regs.reg[SH_DWARF_FRAME_PC].how = REG_SAVED_OFFSET;
 240   fs->regs.reg[SH_DWARF_FRAME_PC].loc.offset
 241     = (long)&(sc->sc_pc) - new_cfa;
 242   fs->retaddr_column = SH_DWARF_FRAME_PC;
 243   return _URC_NO_REASON;
 244 }
 245 #endif /* defined (__SH5__) */