| blob | c31072a6e18123b139cd69176bef4c3f678df5f7 |
1 /* Definitions for the Blackfin port.
2 Copyright (C) 2005 Free Software Foundation, Inc.
3 Contributed by Analog Devices.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 2, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #ifndef _BFIN_CONFIG
23 #define _BFIN_CONFIG
25 #define OBJECT_FORMAT_ELF
27 #define BRT 1
28 #define BRF 0
30 /* Print subsidiary information on the compiler version in use. */
33 /* Run-time compilation parameters selecting different hardware subsets. */
37 /* Predefinition in the preprocessor for this target machine */
38 #ifndef TARGET_CPU_CPP_BUILTINS
39 #define TARGET_CPU_CPP_BUILTINS() \
40 do \
41 { \
44 } \
45 while (0)
46 #endif
48 /* Generate DSP instructions, like DSP halfword loads */
49 #define TARGET_DSP (1)
51 #define TARGET_DEFAULT MASK_CSYNC
53 /* Maximum number of library ids we permit */
54 #define MAX_LIBRARY_ID 255
58 /* Sometimes certain combinations of command options do not make
59 sense on a particular target machine. You can define a macro
60 `OVERRIDE_OPTIONS' to take account of this. This macro, if
61 defined, is executed once just after all the command options have
62 been parsed.
64 Don't use this macro to turn on various extra optimizations for
65 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
67 #define OVERRIDE_OPTIONS override_options ()
69 #define FUNCTION_MODE SImode
70 #define Pmode SImode
72 /* store-condition-codes instructions store 0 for false
73 This is the value stored for true. */
74 #define STORE_FLAG_VALUE 1
76 /* Define this if pushing a word on the stack
77 makes the stack pointer a smaller address. */
78 #define STACK_GROWS_DOWNWARD
80 #define STACK_PUSH_CODE PRE_DEC
82 /* Define this if the nominal address of the stack frame
83 is at the high-address end of the local variables;
84 that is, each additional local variable allocated
85 goes at a more negative offset in the frame. */
86 #define FRAME_GROWS_DOWNWARD
88 /* We define a dummy ARGP register; the parameters start at offset 0 from
89 it. */
90 #define FIRST_PARM_OFFSET(DECL) 0
92 /* Offset within stack frame to start allocating local variables at.
93 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
94 first local allocated. Otherwise, it is the offset to the BEGINNING
95 of the first local allocated. */
96 #define STARTING_FRAME_OFFSET 0
98 /* Register to use for pushing function arguments. */
99 #define STACK_POINTER_REGNUM REG_P6
101 /* Base register for access to local variables of the function. */
102 #define FRAME_POINTER_REGNUM REG_P7
104 /* A dummy register that will be eliminated to either FP or SP. */
105 #define ARG_POINTER_REGNUM REG_ARGP
107 /* `PIC_OFFSET_TABLE_REGNUM'
108 The register number of the register used to address a table of
109 static data addresses in memory. In some cases this register is
110 defined by a processor's "application binary interface" (ABI).
111 When this macro is defined, RTL is generated for this register
112 once, as with the stack pointer and frame pointer registers. If
113 this macro is not defined, it is up to the machine-dependent files
114 to allocate such a register (if necessary). */
115 #define PIC_OFFSET_TABLE_REGNUM (REG_P5)
117 /* A static chain register for nested functions. We need to use a
118 call-clobbered register for this. */
119 #define STATIC_CHAIN_REGNUM REG_P2
121 /* Define this if functions should assume that stack space has been
122 allocated for arguments even when their values are passed in
123 registers.
125 The value of this macro is the size, in bytes, of the area reserved for
126 arguments passed in registers.
128 This space can either be allocated by the caller or be a part of the
129 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
130 says which. */
131 #define FIXED_STACK_AREA 12
132 #define REG_PARM_STACK_SPACE(FNDECL) FIXED_STACK_AREA
134 /* Define this if the above stack space is to be considered part of the
135 * space allocated by the caller. */
136 #define OUTGOING_REG_PARM_STACK_SPACE
138 /* Define this if the maximum size of all the outgoing args is to be
139 accumulated and pushed during the prologue. The amount can be
140 found in the variable current_function_outgoing_args_size. */
141 #define ACCUMULATE_OUTGOING_ARGS 1
143 /* Value should be nonzero if functions must have frame pointers.
144 Zero means the frame pointer need not be set up (and parms
145 may be accessed via the stack pointer) in functions that seem suitable.
146 This is computed in `reload', in reload1.c.
147 */
148 #define FRAME_POINTER_REQUIRED (bfin_frame_pointer_required ())
150 #define PARM_BOUNDRY 32
152 #define STACK_BOUNDRY 32
154 /*#define DATA_ALIGNMENT(TYPE, BASIC-ALIGN) for arrays.. */
156 /* Make strings word-aligned so strcpy from constants will be faster. */
157 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
158 (TREE_CODE (EXP) == STRING_CST \
159 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
161 #define TRAMPOLINE_SIZE 18
162 #define TRAMPOLINE_TEMPLATE(FILE) \
169 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
170 initialize_trampoline (TRAMP, FNADDR, CXT)
171 \f
172 /* Definitions for register eliminations.
174 This is an array of structures. Each structure initializes one pair
175 of eliminable registers. The "from" register number is given first,
176 followed by "to". Eliminations of the same "from" register are listed
177 in order of preference.
179 There are two registers that can always be eliminated on the i386.
180 The frame pointer and the arg pointer can be replaced by either the
181 hard frame pointer or to the stack pointer, depending upon the
182 circumstances. The hard frame pointer is not used before reload and
183 so it is not eligible for elimination. */
185 #define ELIMINABLE_REGS \
186 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
187 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
188 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} \
190 /* Given FROM and TO register numbers, say whether this elimination is
191 allowed. Frame pointer elimination is automatically handled.
193 All other eliminations are valid. */
195 #define CAN_ELIMINATE(FROM, TO) \
196 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
198 /* Define the offset between two registers, one to be eliminated, and the other
199 its replacement, at the start of a routine. */
201 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
202 ((OFFSET) = bfin_initial_elimination_offset ((FROM), (TO)))
203 \f
204 /* This processor has
205 8 data register for doing arithmetic
206 8 pointer register for doing addressing, including
207 1 stack pointer P6
208 1 frame pointer P7
209 4 sets of indexing registers (I0-3, B0-3, L0-3, M0-3)
210 1 condition code flag register CC
211 5 return address registers RETS/I/X/N/E
212 1 arithmetic status register (ASTAT). */
214 #define FIRST_PSEUDO_REGISTER 44
216 #define PREG_P(X) (REG_P (X) && REGNO (X) >= REG_P0 && REGNO (X) <= REG_P7)
217 #define ADDRESS_REGNO_P(X) ((X) >= REG_P0 && (X) <= REG_M3)
218 #define D_REGNO_P(X) ((X) <= REG_R7)
220 #define REGISTER_NAMES { \
229 }
231 #define SHORT_REGISTER_NAMES { \
237 #define HIGH_REGISTER_NAMES { \
243 #define DREGS_PAIR_NAMES { \
246 #define BYTE_REGISTER_NAMES { \
250 /* 1 for registers that have pervasive standard uses
251 and are not available for the register allocator. */
253 #define FIXED_REGISTERS \
255 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
257 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, \
259 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
260 }
262 /* 1 for registers not available across function calls.
263 These must include the FIXED_REGISTERS and also any
264 registers that can be used without being saved.
265 The latter must include the registers where values are returned
266 and the register where structure-value addresses are passed.
267 Aside from that, you can include as many other registers as you like. */
269 #define CALL_USED_REGISTERS \
271 { 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 1, 0, \
273 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
275 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
276 }
278 /* Order in which to allocate registers. Each register must be
279 listed once, even those in FIXED_REGISTERS. List frame pointer
280 late and fixed registers last. Note that, in general, we prefer
281 registers listed in CALL_USED_REGISTERS, keeping the others
282 available for storage of persistent values. */
284 #define REG_ALLOC_ORDER \
285 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
286 REG_P2, REG_P1, REG_P0, REG_P5, REG_P4, REG_P3, REG_P6, REG_P7, \
287 REG_A0, REG_A1, \
288 REG_I0, REG_B0, REG_L0, REG_I1, REG_B1, REG_L1, REG_I2, REG_B2, \
289 REG_L2, REG_I3, REG_B3, REG_L3, REG_M0, REG_M1, REG_M2, REG_M3, \
290 REG_RETS, REG_RETI, REG_RETX, REG_RETN, REG_RETE, \
291 REG_ASTAT, REG_SEQSTAT, REG_USP, \
292 REG_CC, REG_ARGP \
293 }
295 /* Macro to conditionally modify fixed_regs/call_used_regs. */
296 #define CONDITIONAL_REGISTER_USAGE \
297 { \
298 conditional_register_usage(); \
299 if (flag_pic) \
300 { \
301 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
302 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
303 } \
304 }
306 /* Define the classes of registers for register constraints in the
307 machine description. Also define ranges of constants.
309 One of the classes must always be named ALL_REGS and include all hard regs.
310 If there is more than one class, another class must be named NO_REGS
311 and contain no registers.
313 The name GENERAL_REGS must be the name of a class (or an alias for
314 another name such as ALL_REGS). This is the class of registers
315 that is allowed by "g" or "r" in a register constraint.
316 Also, registers outside this class are allocated only when
317 instructions express preferences for them.
319 The classes must be numbered in nondecreasing order; that is,
320 a larger-numbered class must never be contained completely
321 in a smaller-numbered class.
323 For any two classes, it is very desirable that there be another
324 class that represents their union. */
327 enum reg_class
328 {
329 NO_REGS,
330 IREGS,
331 BREGS,
332 LREGS,
333 MREGS,
334 CIRCREGS, /* Circular buffering registers, Ix, Bx, Lx together form. See Automatic Circular Buffering. */
335 DAGREGS,
336 EVEN_AREGS,
337 ODD_AREGS,
338 AREGS,
339 CCREGS,
340 EVEN_DREGS,
341 ODD_DREGS,
342 DREGS,
343 PREGS_CLOBBERED,
344 PREGS,
345 DPREGS,
346 MOST_REGS,
347 PROLOGUE_REGS,
348 NON_A_CC_REGS,
349 ALL_REGS, LIM_REG_CLASSES
350 };
352 #define N_REG_CLASSES ((int)LIM_REG_CLASSES)
354 #define GENERAL_REGS DPREGS
356 /* Give names of register classes as strings for dump file. */
358 #define REG_CLASS_NAMES \
381 /* An initializer containing the contents of the register classes, as integers
382 which are bit masks. The Nth integer specifies the contents of class N.
383 The way the integer MASK is interpreted is that register R is in the class
384 if `MASK & (1 << R)' is 1.
386 When the machine has more than 32 registers, an integer does not suffice.
387 Then the integers are replaced by sub-initializers, braced groupings
388 containing several integers. Each sub-initializer must be suitable as an
389 initializer for the type `HARD_REG_SET' which is defined in
390 `hard-reg-set.h'. */
392 /* NOTE: DSP registers, IREGS - AREGS, are not GENERAL_REGS. We use
393 MOST_REGS as the union of DPREGS and DAGREGS. */
395 #define REG_CLASS_CONTENTS \
419 #define BASE_REG_CLASS PREGS
420 #define INDEX_REG_CLASS PREGS
422 #define REGNO_OK_FOR_BASE_STRICT_P(X) (REGNO_REG_CLASS (X) == BASE_REG_CLASS)
423 #define REGNO_OK_FOR_BASE_NONSTRICT_P(X) \
424 (((X) >= FIRST_PSEUDO_REGISTER) || REGNO_REG_CLASS (X) == BASE_REG_CLASS)
426 #ifdef REG_OK_STRICT
427 #define REGNO_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_STRICT_P (X)
428 #else
429 #define REGNO_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_NONSTRICT_P (X)
430 #endif
432 #define REG_OK_FOR_BASE_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
433 #define REG_OK_FOR_INDEX_P(X) 0
434 #define REGNO_OK_FOR_INDEX_P(X) 0
436 /* Get reg_class from a letter such as appears in the machine description. */
438 #define REG_CLASS_FROM_LETTER(LETTER) \
455 NO_REGS)
457 /* The same information, inverted:
458 Return the class number of the smallest class containing
459 reg number REGNO. This could be a conditional expression
460 or could index an array. */
462 #define REGNO_REG_CLASS(REGNO) \
463 ((REGNO) < REG_P0 ? DREGS \
464 : (REGNO) < REG_I0 ? PREGS \
465 : (REGNO) == REG_ARGP ? BASE_REG_CLASS \
466 : (REGNO) >= REG_I0 && (REGNO) <= REG_I3 ? IREGS \
467 : (REGNO) >= REG_L0 && (REGNO) <= REG_L3 ? LREGS \
468 : (REGNO) >= REG_B0 && (REGNO) <= REG_B3 ? BREGS \
469 : (REGNO) >= REG_M0 && (REGNO) <= REG_M3 ? MREGS \
470 : (REGNO) == REG_A0 || (REGNO) == REG_A1 ? AREGS \
471 : (REGNO) == REG_CC ? CCREGS \
472 : (REGNO) >= REG_RETS ? PROLOGUE_REGS \
473 : NO_REGS)
475 /* When defined, the compiler allows registers explicitly used in the
476 rtl to be used as spill registers but prevents the compiler from
477 extending the lifetime of these registers. */
478 #define SMALL_REGISTER_CLASSES 1
480 #define CLASS_LIKELY_SPILLED_P(CLASS) \
481 ((CLASS) == PREGS_CLOBBERED \
482 || (CLASS) == PROLOGUE_REGS \
483 || (CLASS) == CCREGS)
485 /* Do not allow to store a value in REG_CC for any mode */
486 /* Do not allow to store value in pregs if mode is not SI*/
487 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok((REGNO), (MODE))
489 /* Return the maximum number of consecutive registers
490 needed to represent mode MODE in a register of class CLASS. */
491 #define CLASS_MAX_NREGS(CLASS, MODE) \
492 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
494 #define HARD_REGNO_NREGS(REGNO, MODE) \
495 ((MODE) == PDImode && ((REGNO) == REG_A0 || (REGNO) == REG_A1) \
496 ? 1 : CLASS_MAX_NREGS (GENERAL_REGS, MODE))
498 /* A C expression that is nonzero if hard register TO can be
499 considered for use as a rename register for FROM register */
500 #define HARD_REGNO_RENAME_OK(FROM, TO) bfin_hard_regno_rename_ok (FROM, TO)
502 /* A C expression that is nonzero if it is desirable to choose
503 register allocation so as to avoid move instructions between a
504 value of mode MODE1 and a value of mode MODE2.
506 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
507 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
508 MODE2)' must be zero. */
509 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
511 /* `PREFERRED_RELOAD_CLASS (X, CLASS)'
512 A C expression that places additional restrictions on the register
513 class to use when it is necessary to copy value X into a register
514 in class CLASS. The value is a register class; perhaps CLASS, or
515 perhaps another, smaller class. */
516 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
518 #define SECONDARY_OUTPUT_RELOAD_CLASS(class,mode,x) \
519 secondary_output_reload_class(class,mode,x)
520 #define SECONDARY_INPUT_RELOAD_CLASS(class,mode,x) \
521 secondary_input_reload_class(class,mode,x)
523 /* Function Calling Conventions. */
525 /* The type of the current function; normal functions are of type
526 SUBROUTINE. */
531 #define FUNCTION_ARG_REGISTERS { REG_R0, REG_R1, REG_R2, -1 }
539 /* Define where to put the arguments to a function.
540 Value is zero to push the argument on the stack,
541 or a hard register in which to store the argument.
543 MODE is the argument's machine mode.
544 TYPE is the data type of the argument (as a tree).
545 This is null for libcalls where that information may
546 not be available.
547 CUM is a variable of type CUMULATIVE_ARGS which gives info about
548 the preceding args and about the function being called.
549 NAMED is nonzero if this argument is a named parameter
550 (otherwise it is an extra parameter matching an ellipsis). */
552 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
553 (function_arg (&CUM, MODE, TYPE, NAMED))
555 #define FUNCTION_ARG_REGNO_P(REGNO) function_arg_regno_p (REGNO)
558 /* Initialize a variable CUM of type CUMULATIVE_ARGS
559 for a call to a function whose data type is FNTYPE.
560 For a library call, FNTYPE is 0. */
561 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT, N_NAMED_ARGS) \
562 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
564 /* Update the data in CUM to advance over an argument
565 of mode MODE and data type TYPE.
566 (TYPE is null for libcalls where that information may not be available.) */
567 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
568 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
570 #define RETURN_POPS_ARGS(FDECL, FUNTYPE, STKSIZE) 0
572 /* Define how to find the value returned by a function.
573 VALTYPE is the data type of the value (as a tree).
574 If the precise function being called is known, FUNC is its FUNCTION_DECL;
575 otherwise, FUNC is 0.
576 */
578 #define VALUE_REGNO(MODE) (REG_R0)
580 #define FUNCTION_VALUE(VALTYPE, FUNC) \
581 gen_rtx_REG (TYPE_MODE (VALTYPE), \
582 VALUE_REGNO(TYPE_MODE(VALTYPE)))
584 /* Define how to find the value returned by a library function
585 assuming the value has mode MODE. */
587 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE))
589 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_R0)
591 #define DEFAULT_PCC_STRUCT_RETURN 0
592 #define RETURN_IN_MEMORY(TYPE) bfin_return_in_memory(TYPE)
594 /* Before the prologue, the return address is in the RETS register. */
595 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, REG_RETS)
597 #define RETURN_ADDR_RTX(COUNT, FRAME) bfin_return_addr_rtx (COUNT)
599 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (REG_RETS)
601 /* Call instructions don't modify the stack pointer on the Blackfin. */
602 #define INCOMING_FRAME_SP_OFFSET 0
604 /* Describe how we implement __builtin_eh_return. */
605 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM)
606 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, REG_P2)
607 #define EH_RETURN_HANDLER_RTX \
608 gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, UNITS_PER_WORD))
610 /* Addressing Modes */
612 /* Recognize any constant value that is a valid address. */
613 #define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X))
615 /* Nonzero if the constant value X is a legitimate general operand.
616 symbol_ref are not legitimate and will be put into constant pool.
617 See force_const_mem().
618 If -mno-pool, all constants are legitimate.
619 */
620 #define LEGITIMATE_CONSTANT_P(x) 1
622 /* A number, the maximum number of registers that can appear in a
623 valid memory address. Note that it is up to you to specify a
624 value equal to the maximum number that `GO_IF_LEGITIMATE_ADDRESS'
625 would ever accept. */
626 #define MAX_REGS_PER_ADDRESS 1
628 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
629 that is a valid memory address for an instruction.
630 The MODE argument is the machine mode for the MEM expression
631 that wants to use this address.
633 Blackfin addressing modes are as follows:
635 [preg]
636 [preg + imm16]
638 B [ Preg + uimm15 ]
639 W [ Preg + uimm16m2 ]
640 [ Preg + uimm17m4 ]
642 [preg++]
643 [preg--]
644 [--sp]
645 */
647 #define LEGITIMATE_MODE_FOR_AUTOINC_P(MODE) \
648 (GET_MODE_SIZE (MODE) <= 4 || (MODE) == PDImode)
650 #ifdef REG_OK_STRICT
651 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
652 do { \
653 if (bfin_legitimate_address_p (MODE, X, 1)) \
654 goto WIN; \
655 } while (0);
656 #else
657 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
658 do { \
659 if (bfin_legitimate_address_p (MODE, X, 0)) \
660 goto WIN; \
661 } while (0);
662 #endif
664 /* Try machine-dependent ways of modifying an illegitimate address
665 to be legitimate. If we find one, return the new, valid address.
666 This macro is used in only one place: `memory_address' in explow.c.
668 OLDX is the address as it was before break_out_memory_refs was called.
669 In some cases it is useful to look at this to decide what needs to be done.
671 MODE and WIN are passed so that this macro can use
672 GO_IF_LEGITIMATE_ADDRESS.
674 It is always safe for this macro to do nothing. It exists to recognize
675 opportunities to optimize the output.
676 */
677 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
678 do { \
679 rtx _q = legitimize_address(X, OLDX, MODE); \
680 if (_q) { X = _q; goto WIN; } \
681 } while (0)
683 #define HAVE_POST_INCREMENT 1
684 #define HAVE_POST_DECREMENT 1
685 #define HAVE_PRE_DECREMENT 1
687 /* `LEGITIMATE_PIC_OPERAND_P (X)'
688 A C expression that is nonzero if X is a legitimate immediate
689 operand on the target machine when generating position independent
690 code. You can assume that X satisfies `CONSTANT_P', so you need
691 not check this. You can also assume FLAG_PIC is true, so you need
692 not check it either. You need not define this macro if all
693 constants (including `SYMBOL_REF') can be immediate operands when
694 generating position independent code. */
695 #define LEGITIMATE_PIC_OPERAND_P(X) ! SYMBOLIC_CONST (X)
697 #define SYMBOLIC_CONST(X) \
698 (GET_CODE (X) == SYMBOL_REF \
699 || GET_CODE (X) == LABEL_REF \
700 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
702 /*
703 A C statement or compound statement with a conditional `goto
704 LABEL;' executed if memory address X (an RTX) can have different
705 meanings depending on the machine mode of the memory reference it
706 is used for or if the address is valid for some modes but not
707 others.
709 Autoincrement and autodecrement addresses typically have
710 mode-dependent effects because the amount of the increment or
711 decrement is the size of the operand being addressed. Some
712 machines have other mode-dependent addresses. Many RISC machines
713 have no mode-dependent addresses.
715 You may assume that ADDR is a valid address for the machine.
716 */
717 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
718 do { \
719 if (GET_CODE (ADDR) == POST_INC \
720 || GET_CODE (ADDR) == POST_DEC \
721 || GET_CODE (ADDR) == PRE_DEC) \
722 goto LABEL; \
723 } while (0)
725 #define NOTICE_UPDATE_CC(EXPR, INSN) 0
727 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
728 is done just by pretending it is already truncated. */
729 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
731 /* Max number of bytes we can move from memory to memory
732 in one reasonably fast instruction. */
733 #define MOVE_MAX UNITS_PER_WORD
736 /* STORAGE LAYOUT: target machine storage layout
737 Define this macro as a C expression which is nonzero if accessing
738 less than a word of memory (i.e. a `char' or a `short') is no
739 faster than accessing a word of memory, i.e., if such access
740 require more than one instruction or if there is no difference in
741 cost between byte and (aligned) word loads.
743 When this macro is not defined, the compiler will access a field by
744 finding the smallest containing object; when it is defined, a
745 fullword load will be used if alignment permits. Unless bytes
746 accesses are faster than word accesses, using word accesses is
747 preferable since it may eliminate subsequent memory access if
748 subsequent accesses occur to other fields in the same word of the
749 structure, but to different bytes. */
750 #define SLOW_BYTE_ACCESS 0
751 #define SLOW_SHORT_ACCESS 0
753 /* Define this if most significant bit is lowest numbered
754 in instructions that operate on numbered bit-fields. */
755 #define BITS_BIG_ENDIAN 0
757 /* Define this if most significant byte of a word is the lowest numbered.
758 We can't access bytes but if we could we would in the Big Endian order. */
759 #define BYTES_BIG_ENDIAN 0
761 /* Define this if most significant word of a multiword number is numbered. */
762 #define WORDS_BIG_ENDIAN 0
764 /* number of bits in an addressable storage unit */
765 #define BITS_PER_UNIT 8
767 /* Width in bits of a "word", which is the contents of a machine register.
768 Note that this is not necessarily the width of data type `int';
769 if using 16-bit ints on a 68000, this would still be 32.
770 But on a machine with 16-bit registers, this would be 16. */
771 #define BITS_PER_WORD 32
773 /* Width of a word, in units (bytes). */
774 #define UNITS_PER_WORD 4
776 /* Width in bits of a pointer.
777 See also the macro `Pmode1' defined below. */
778 #define POINTER_SIZE 32
780 /* Allocation boundary (in *bits*) for storing pointers in memory. */
781 #define POINTER_BOUNDARY 32
783 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
784 #define PARM_BOUNDARY 32
786 /* Boundary (in *bits*) on which stack pointer should be aligned. */
787 #define STACK_BOUNDARY 32
789 /* Allocation boundary (in *bits*) for the code of a function. */
790 #define FUNCTION_BOUNDARY 32
792 /* Alignment of field after `int : 0' in a structure. */
793 #define EMPTY_FIELD_BOUNDARY BITS_PER_WORD
795 /* No data type wants to be aligned rounder than this. */
796 #define BIGGEST_ALIGNMENT 32
798 /* Define this if move instructions will actually fail to work
799 when given unaligned data. */
800 #define STRICT_ALIGNMENT 1
802 /* (shell-command "rm c-decl.o stor-layout.o")
803 * never define PCC_BITFIELD_TYPE_MATTERS
804 * really cause some alignment problem
805 */
807 #define UNITS_PER_FLOAT ((FLOAT_TYPE_SIZE + BITS_PER_UNIT - 1) / \
808 BITS_PER_UNIT)
810 #define UNITS_PER_DOUBLE ((DOUBLE_TYPE_SIZE + BITS_PER_UNIT - 1) / \
811 BITS_PER_UNIT)
814 /* what is the 'type' of size_t */
817 /* Define this as 1 if `char' should by default be signed; else as 0. */
818 #define DEFAULT_SIGNED_CHAR 1
819 #define FLOAT_TYPE_SIZE BITS_PER_WORD
820 #define SHORT_TYPE_SIZE 16
821 #define CHAR_TYPE_SIZE 8
822 #define INT_TYPE_SIZE 32
823 #define LONG_TYPE_SIZE 32
824 #define LONG_LONG_TYPE_SIZE 64
826 /* Note: Fix this to depend on target switch. -- lev */
828 /* Note: Try to implement double and force long double. -- tonyko
829 * #define __DOUBLES_ARE_FLOATS__
830 * #define DOUBLE_TYPE_SIZE FLOAT_TYPE_SIZE
831 * #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
832 * #define DOUBLES_ARE_FLOATS 1
833 */
835 #define DOUBLE_TYPE_SIZE 64
836 #define LONG_DOUBLE_TYPE_SIZE 64
838 /* `PROMOTE_MODE (M, UNSIGNEDP, TYPE)'
839 A macro to update M and UNSIGNEDP when an object whose type is
840 TYPE and which has the specified mode and signedness is to be
841 stored in a register. This macro is only called when TYPE is a
842 scalar type.
844 On most RISC machines, which only have operations that operate on
845 a full register, define this macro to set M to `word_mode' if M is
846 an integer mode narrower than `BITS_PER_WORD'. In most cases,
847 only integer modes should be widened because wider-precision
848 floating-point operations are usually more expensive than their
849 narrower counterparts.
851 For most machines, the macro definition does not change UNSIGNEDP.
852 However, some machines, have instructions that preferentially
853 handle either signed or unsigned quantities of certain modes. For
854 example, on the DEC Alpha, 32-bit loads from memory and 32-bit add
855 instructions sign-extend the result to 64 bits. On such machines,
856 set UNSIGNEDP according to which kind of extension is more
857 efficient.
859 Do not define this macro if it would never modify M.*/
861 #define BFIN_PROMOTE_MODE_P(MODE) \
862 (!TARGET_DSP && GET_MODE_CLASS (MODE) == MODE_INT \
863 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)
865 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
866 if (BFIN_PROMOTE_MODE_P(MODE)) \
867 { \
868 if (MODE == QImode) \
869 UNSIGNEDP = 1; \
870 else if (MODE == HImode) \
871 UNSIGNEDP = 0; \
872 (MODE) = SImode; \
873 }
875 /* Describing Relative Costs of Operations */
877 /* Do not put function addr into constant pool */
878 #define NO_FUNCTION_CSE 1
880 /* A C expression for the cost of moving data from a register in class FROM to
881 one in class TO. The classes are expressed using the enumeration values
882 such as `GENERAL_REGS'. A value of 2 is the default; other values are
883 interpreted relative to that.
885 It is not required that the cost always equal 2 when FROM is the same as TO;
886 on some machines it is expensive to move between registers if they are not
887 general registers. */
889 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
890 bfin_register_move_cost ((MODE), (CLASS1), (CLASS2))
892 /* A C expression for the cost of moving data of mode M between a
893 register and memory. A value of 2 is the default; this cost is
894 relative to those in `REGISTER_MOVE_COST'.
896 If moving between registers and memory is more expensive than
897 between two registers, you should define this macro to express the
898 relative cost. */
900 #define MEMORY_MOVE_COST(MODE, CLASS, IN) \
901 bfin_memory_move_cost ((MODE), (CLASS), (IN))
903 /* Specify the machine mode that this machine uses
904 for the index in the tablejump instruction. */
905 #define CASE_VECTOR_MODE SImode
907 #define JUMP_TABLES_IN_TEXT_SECTION flag_pic
909 /* Define if operations between registers always perform the operation
910 on the full register even if a narrower mode is specified.
911 #define WORD_REGISTER_OPERATIONS
912 */
914 #define CONST_18UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 262140)
915 #define CONST_16BIT_IMM_P(VALUE) ((VALUE) >= -32768 && (VALUE) <= 32767)
916 #define CONST_16UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 65535)
917 #define CONST_7BIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 63)
918 #define CONST_7NBIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 0)
919 #define CONST_5UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 31)
920 #define CONST_4BIT_IMM_P(VALUE) ((VALUE) >= -8 && (VALUE) <= 7)
921 #define CONST_4UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 15)
922 #define CONST_3BIT_IMM_P(VALUE) ((VALUE) >= -4 && (VALUE) <= 3)
923 #define CONST_3UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 7)
925 #define CONSTRAINT_LEN(C, STR) \
928 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
930 #define CONST_OK_FOR_P(VALUE, STR) \
936 : 0)
938 #define CONST_OK_FOR_K(VALUE, STR) \
944 : 0) \
950 : 0) \
953 : 0) \
954 : 0)
956 #define CONST_OK_FOR_M(VALUE, STR) \
959 : 0)
961 /* The letters I, J, K, L and M in a register constraint string
962 can be used to stand for particular ranges of immediate operands.
963 This macro defines what the ranges are.
964 C is the letter, and VALUE is a constant value.
965 Return 1 if VALUE is in the range specified by C.
967 bfin constant operands are as follows
969 J 2**N 5bit imm scaled
970 Ks7 -64 .. 63 signed 7bit imm
971 Ku5 0..31 unsigned 5bit imm
972 Ks4 -8 .. 7 signed 4bit imm
973 Ks3 -4 .. 3 signed 3bit imm
974 Ku3 0 .. 7 unsigned 3bit imm
975 Pn 0, 1, 2 constants 0, 1 or 2, corresponding to n
976 */
977 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR) \
983 : 0)
985 /*Constant Output Formats */
986 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
989 #define EXTRA_CONSTRAINT(VALUE, D) \
992 /* `FINALIZE_PIC'
993 By generating position-independent code, when two different
994 programs (A and B) share a common library (libC.a), the text of
995 the library can be shared whether or not the library is linked at
996 the same address for both programs. In some of these
997 environments, position-independent code requires not only the use
998 of different addressing modes, but also special code to enable the
999 use of these addressing modes.
1001 The `FINALIZE_PIC' macro serves as a hook to emit these special
1002 codes once the function is being compiled into assembly code, but
1003 not before. (It is not done before, because in the case of
1004 compiling an inline function, it would lead to multiple PIC
1005 prologues being included in functions which used inline functions
1006 and were compiled to assembly language.) */
1007 #define FINALIZE_PIC do {} while (0)
1009 /* Switch into a generic section. */
1010 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
1012 #define PRINT_OPERAND(FILE, RTX, CODE) print_operand (FILE, RTX, CODE)
1013 #define PRINT_OPERAND_ADDRESS(FILE, RTX) print_address_operand (FILE, RTX)
1016 CODE_DIR,
1017 DATA_DIR,
1018 LAST_SECT_NM
1022 LONG_CONST_DIR,
1023 SHORT_CONST_DIR,
1024 BYTE_CONST_DIR,
1025 SPACE_DIR,
1026 INIT_DIR,
1027 LAST_DIR_NM
1036 #define ASM_GLOBALIZE_LABEL1(FILE, NAME) \
1038 assemble_name (FILE, NAME); \
1041 } while (0)
1043 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1044 do { \
1046 assemble_name (FILE, NAME); \
1050 ASM_OUTPUT_LABEL(FILE, NAME); \
1051 } while (0)
1053 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1054 do { assemble_name (FILE, NAME); \
1056 } while (0)
1058 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1060 } while (0)
1062 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1063 do { \
1064 int len = strlen (NAME); \
1065 char *temp = (char *) alloca (len + 4); \
1068 strcpy (&temp[2], (NAME)); \
1070 temp[len + 3] = 0; \
1071 (OUTPUT) = (char *) alloca (strlen (NAME) + 13); \
1073 } while (0)
1075 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1076 do { char __buf[256]; \
1079 assemble_name (FILE, __buf); \
1082 } while (0)
1084 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1085 MY_ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)
1087 #define MY_ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1088 do { \
1089 char __buf[256]; \
1092 assemble_name (FILE, __buf); \
1095 assemble_name (FILE, __buf); \
1098 } while (0)
1100 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1101 do { \
1102 if ((LOG) != 0) \
1104 } while (0)
1106 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1107 do { \
1108 asm_output_skip (FILE, SIZE); \
1109 } while (0)
1111 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1112 do { \
1113 data_section(); \
1114 if ((SIZE) >= (unsigned int) 4 ) ASM_OUTPUT_ALIGN(FILE,2); \
1115 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
1116 ASM_OUTPUT_LABEL (FILE, NAME); \
1118 (ROUNDED) > (unsigned int) 1 ? (ROUNDED) : 1); \
1119 } while (0)
1121 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1122 do { \
1123 ASM_GLOBALIZE_LABEL1(FILE,NAME); \
1124 ASM_OUTPUT_LOCAL (FILE, NAME, SIZE, ROUNDED); } while(0)
1128 #define FUNCTION_PROFILER(FILE, LABELNO) \
1129 do {\
1131 LABELNO, LABELNO);\
1132 } while(0)
1140 /* This works for GAS and some other assemblers. */
1143 /* Don't know how to order these. UNALIGNED_WORD_ASM_OP is in
1144 dwarf2.out. */
1147 /* DBX register number for a given compiler register number */
1148 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)