Add support for ARM Cortex-M23 processor
[official-gcc.git] / gcc / config / arm / bpabi.h
blob302302f0d2d522fe282bb1d12687b53de72cae25
1 /* Configuration file for ARM BPABI targets.
2 Copyright (C) 2004-2016 Free Software Foundation, Inc.
3 Contributed by CodeSourcery, LLC
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
26 /* Use the AAPCS ABI by default. */
27 #define ARM_DEFAULT_ABI ARM_ABI_AAPCS
29 /* Assume that AAPCS ABIs should adhere to the full BPABI. */
30 #define TARGET_BPABI (TARGET_AAPCS_BASED)
32 /* BPABI targets use EABI frame unwinding tables. */
33 #undef ARM_UNWIND_INFO
34 #define ARM_UNWIND_INFO 1
36 /* Section 4.1 of the AAPCS requires the use of VFP format. */
37 #undef FPUTYPE_DEFAULT
38 #define FPUTYPE_DEFAULT "vfp"
40 /* TARGET_BIG_ENDIAN_DEFAULT is set in
41 config.gcc for big endian configurations. */
42 #if TARGET_BIG_ENDIAN_DEFAULT
43 #define TARGET_ENDIAN_DEFAULT MASK_BIG_END
44 #else
45 #define TARGET_ENDIAN_DEFAULT 0
46 #endif
48 /* EABI targets should enable interworking by default. */
49 #undef TARGET_DEFAULT
50 #define TARGET_DEFAULT (MASK_INTERWORK | TARGET_ENDIAN_DEFAULT)
52 /* The ARM BPABI functions return a boolean; they use no special
53 calling convention. */
54 #define FLOAT_LIB_COMPARE_RETURNS_BOOL(MODE, COMPARISON) TARGET_BPABI
56 /* The BPABI integer comparison routines return { -1, 0, 1 }. */
57 #define TARGET_LIB_INT_CMP_BIASED !TARGET_BPABI
59 #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*"\
60 "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}"
62 #if TARGET_BIG_ENDIAN_DEFAULT
63 #define BE8_LINK_SPEC \
64 " %{!mlittle-endian:%{march=armv7-a|mcpu=cortex-a5 \
65 |mcpu=cortex-a7 \
66 |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
67 |mcpu=cortex-a12|mcpu=cortex-a17 \
68 |mcpu=cortex-a15.cortex-a7 \
69 |mcpu=cortex-a17.cortex-a7 \
70 |mcpu=marvell-pj4 \
71 |mcpu=cortex-a32 \
72 |mcpu=cortex-a35 \
73 |mcpu=cortex-a53 \
74 |mcpu=cortex-a57 \
75 |mcpu=cortex-a57.cortex-a53 \
76 |mcpu=cortex-a72 \
77 |mcpu=cortex-a72.cortex-a53 \
78 |mcpu=cortex-a73 \
79 |mcpu=cortex-a73.cortex-a35 \
80 |mcpu=cortex-a73.cortex-a53 \
81 |mcpu=exynos-m1 \
82 |mcpu=qdf24xx \
83 |mcpu=xgene1 \
84 |mcpu=cortex-m1.small-multiply \
85 |mcpu=cortex-m0.small-multiply \
86 |mcpu=cortex-m0plus.small-multiply \
87 |mcpu=generic-armv7-a \
88 |march=armv7ve \
89 |march=armv7-m|mcpu=cortex-m3 \
90 |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
91 |march=armv6-m|mcpu=cortex-m0 \
92 |march=armv8-a \
93 |march=armv8-a+crc \
94 |march=armv8.1-a \
95 |march=armv8.1-a+crc \
96 |march=armv8.2-a \
97 |march=armv8.2-a+fp16 \
98 |march=armv8-m.base|mcpu=cortex-m23 \
99 |march=armv8-m.main \
100 |march=armv8-m.main+dsp \
101 :%{!r:--be8}}}"
102 #else
103 #define BE8_LINK_SPEC \
104 " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5 \
105 |mcpu=cortex-a7 \
106 |mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15 \
107 |mcpu=cortex-a12|mcpu=cortex-a17 \
108 |mcpu=cortex-a15.cortex-a7 \
109 |mcpu=cortex-a17.cortex-a7 \
110 |mcpu=cortex-a35 \
111 |mcpu=cortex-a53 \
112 |mcpu=cortex-a57 \
113 |mcpu=cortex-a57.cortex-a53 \
114 |mcpu=cortex-a72 \
115 |mcpu=cortex-a72.cortex-a53 \
116 |mcpu=cortex-a73 \
117 |mcpu=cortex-a73.cortex-a35 \
118 |mcpu=cortex-a73.cortex-a53 \
119 |mcpu=exynos-m1 \
120 |mcpu=qdf24xx \
121 |mcpu=xgene1 \
122 |mcpu=cortex-m1.small-multiply \
123 |mcpu=cortex-m0.small-multiply \
124 |mcpu=cortex-m0plus.small-multiply \
125 |mcpu=marvell-pj4 \
126 |mcpu=generic-armv7-a \
127 |march=armv7ve \
128 |march=armv7-m|mcpu=cortex-m3 \
129 |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
130 |march=armv6-m|mcpu=cortex-m0 \
131 |march=armv8-a \
132 |march=armv8-a+crc \
133 |march=armv8.1-a \
134 |march=armv8.1-a+crc \
135 |march=armv8.2-a \
136 |march=armv8.2-a+fp16 \
137 |march=armv8-m.base|mcpu=cortex-m23 \
138 |march=armv8-m.main \
139 |march=armv8-m.main+dsp \
140 :%{!r:--be8}}}"
141 #endif
143 /* Tell the assembler to build BPABI binaries. */
144 #undef SUBTARGET_EXTRA_ASM_SPEC
145 #define SUBTARGET_EXTRA_ASM_SPEC \
146 "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
148 #ifndef SUBTARGET_EXTRA_LINK_SPEC
149 #define SUBTARGET_EXTRA_LINK_SPEC ""
150 #endif
152 /* Split out the EABI common values so other targets can use it. */
153 #define EABI_LINK_SPEC \
154 TARGET_FIX_V4BX_SPEC BE8_LINK_SPEC
156 /* The generic link spec in elf.h does not support shared libraries. */
157 #define BPABI_LINK_SPEC \
158 "%{mbig-endian:-EB} %{mlittle-endian:-EL} " \
159 "%{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic} " \
160 "-X" SUBTARGET_EXTRA_LINK_SPEC EABI_LINK_SPEC
162 #undef LINK_SPEC
163 #define LINK_SPEC BPABI_LINK_SPEC
165 /* The BPABI requires that we always use an out-of-line implementation
166 of RTTI comparison, even if the target supports weak symbols,
167 because the same object file might be used on a target that does
168 not support merging symbols across DLL boundaries. This macro is
169 broken out separately so that it can be used within
170 TARGET_OS_CPP_BUILTINS in configuration files for systems based on
171 the BPABI. */
172 #define TARGET_BPABI_CPP_BUILTINS() \
173 do \
175 builtin_define ("__GXX_TYPEINFO_EQUALITY_INLINE=0"); \
177 while (false)
179 #undef TARGET_OS_CPP_BUILTINS
180 #define TARGET_OS_CPP_BUILTINS() \
181 TARGET_BPABI_CPP_BUILTINS()
183 /* The BPABI specifies the use of .{init,fini}_array. Therefore, we
184 do not want GCC to put anything into the .{init,fini} sections. */
185 #undef INIT_SECTION_ASM_OP
186 #undef FINI_SECTION_ASM_OP
187 #define INIT_ARRAY_SECTION_ASM_OP ARM_EABI_CTORS_SECTION_OP
188 #define FINI_ARRAY_SECTION_ASM_OP ARM_EABI_DTORS_SECTION_OP
190 /* The legacy _mcount implementation assumes r11 points to a
191 4-word APCS frame. This is generally not true for EABI targets,
192 particularly not in Thumb mode. We assume the mcount
193 implementation does not require a counter variable (No Counter).
194 Note that __gnu_mcount_nc will be entered with a misaligned stack.
195 This is OK because it uses a special calling convention anyway. */
197 #undef NO_PROFILE_COUNTERS
198 #define NO_PROFILE_COUNTERS 1
199 #undef ARM_FUNCTION_PROFILER
200 #define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \
202 fprintf (STREAM, "\tpush\t{lr}\n"); \
203 fprintf (STREAM, "\tbl\t__gnu_mcount_nc\n"); \
206 #undef SUBTARGET_FRAME_POINTER_REQUIRED
207 #define SUBTARGET_FRAME_POINTER_REQUIRED 0
209 /* __gnu_mcount_nc restores the original LR value before returning. Ensure
210 that there is no unnecessary hook set up. */
211 #undef PROFILE_HOOK