PR target/65871
[official-gcc.git] / gcc / reorg.c
bloba0674e4e0ad04c10df81827a08a1ab512e072791
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "symtab.h"
111 #include "hashtab.h"
112 #include "hash-set.h"
113 #include "vec.h"
114 #include "machmode.h"
115 #include "hard-reg-set.h"
116 #include "input.h"
117 #include "function.h"
118 #include "flags.h"
119 #include "statistics.h"
120 #include "double-int.h"
121 #include "real.h"
122 #include "fixed-value.h"
123 #include "alias.h"
124 #include "wide-int.h"
125 #include "inchash.h"
126 #include "tree.h"
127 #include "insn-config.h"
128 #include "expmed.h"
129 #include "dojump.h"
130 #include "explow.h"
131 #include "calls.h"
132 #include "emit-rtl.h"
133 #include "varasm.h"
134 #include "stmt.h"
135 #include "expr.h"
136 #include "conditions.h"
137 #include "predict.h"
138 #include "dominance.h"
139 #include "cfg.h"
140 #include "basic-block.h"
141 #include "regs.h"
142 #include "recog.h"
143 #include "obstack.h"
144 #include "insn-attr.h"
145 #include "resource.h"
146 #include "except.h"
147 #include "params.h"
148 #include "target.h"
149 #include "tree-pass.h"
151 #ifdef DELAY_SLOTS
153 #ifndef ANNUL_IFTRUE_SLOTS
154 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
155 #endif
156 #ifndef ANNUL_IFFALSE_SLOTS
157 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
158 #endif
161 /* First, some functions that were used before GCC got a control flow graph.
162 These functions are now only used here in reorg.c, and have therefore
163 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
165 /* Return the last label to mark the same position as LABEL. Return LABEL
166 itself if it is null or any return rtx. */
168 static rtx
169 skip_consecutive_labels (rtx label_or_return)
171 rtx_insn *insn;
173 if (label_or_return && ANY_RETURN_P (label_or_return))
174 return label_or_return;
176 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
178 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
179 if (LABEL_P (insn))
180 label = insn;
182 return label;
185 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
186 and REG_CC_USER notes so we can find it. */
188 static void
189 link_cc0_insns (rtx insn)
191 rtx user = next_nonnote_insn (insn);
193 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
194 user = XVECEXP (PATTERN (user), 0, 0);
196 add_reg_note (user, REG_CC_SETTER, insn);
197 add_reg_note (insn, REG_CC_USER, user);
200 /* Insns which have delay slots that have not yet been filled. */
202 static struct obstack unfilled_slots_obstack;
203 static rtx *unfilled_firstobj;
205 /* Define macros to refer to the first and last slot containing unfilled
206 insns. These are used because the list may move and its address
207 should be recomputed at each use. */
209 #define unfilled_slots_base \
210 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
212 #define unfilled_slots_next \
213 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
215 /* Points to the label before the end of the function, or before a
216 return insn. */
217 static rtx_code_label *function_return_label;
218 /* Likewise for a simple_return. */
219 static rtx_code_label *function_simple_return_label;
221 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
222 not always monotonically increase. */
223 static int *uid_to_ruid;
225 /* Highest valid index in `uid_to_ruid'. */
226 static int max_uid;
228 static int stop_search_p (rtx, int);
229 static int resource_conflicts_p (struct resources *, struct resources *);
230 static int insn_references_resource_p (rtx, struct resources *, bool);
231 static int insn_sets_resource_p (rtx, struct resources *, bool);
232 static rtx_code_label *find_end_label (rtx);
233 static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
234 static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
235 static rtx_insn *delete_from_delay_slot (rtx_insn *);
236 static void delete_scheduled_jump (rtx_insn *);
237 static void note_delay_statistics (int, int);
238 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
239 static rtx_insn_list *optimize_skip (rtx_insn *);
240 #endif
241 static int get_jump_flags (const rtx_insn *, rtx);
242 static int mostly_true_jump (rtx);
243 static rtx get_branch_condition (const rtx_insn *, rtx);
244 static int condition_dominates_p (rtx, const rtx_insn *);
245 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
246 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *);
247 static int check_annul_list_true_false (int, rtx);
248 static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx,
249 rtx_sequence *,
250 rtx_insn_list *,
251 struct resources *,
252 struct resources *,
253 struct resources *,
254 int, int *, int *,
255 rtx *);
256 static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
257 rtx_sequence *,
258 rtx_insn_list *,
259 struct resources *,
260 struct resources *,
261 struct resources *,
262 int, int *, int *);
263 static void try_merge_delay_insns (rtx, rtx_insn *);
264 static rtx redundant_insn (rtx, rtx_insn *, rtx);
265 static int own_thread_p (rtx, rtx, int);
266 static void update_block (rtx_insn *, rtx);
267 static int reorg_redirect_jump (rtx_insn *, rtx);
268 static void update_reg_dead_notes (rtx, rtx);
269 static void fix_reg_dead_note (rtx, rtx);
270 static void update_reg_unused_notes (rtx, rtx);
271 static void fill_simple_delay_slots (int);
272 static rtx_insn_list *fill_slots_from_thread (rtx_insn *, rtx, rtx, rtx,
273 int, int, int, int,
274 int *, rtx_insn_list *);
275 static void fill_eager_delay_slots (void);
276 static void relax_delay_slots (rtx_insn *);
277 static void make_return_insns (rtx_insn *);
279 /* A wrapper around next_active_insn which takes care to return ret_rtx
280 unchanged. */
282 static rtx
283 first_active_target_insn (rtx insn)
285 if (ANY_RETURN_P (insn))
286 return insn;
287 return next_active_insn (as_a <rtx_insn *> (insn));
290 /* Return true iff INSN is a simplejump, or any kind of return insn. */
292 static bool
293 simplejump_or_return_p (rtx insn)
295 return (JUMP_P (insn)
296 && (simplejump_p (as_a <rtx_insn *> (insn))
297 || ANY_RETURN_P (PATTERN (insn))));
300 /* Return TRUE if this insn should stop the search for insn to fill delay
301 slots. LABELS_P indicates that labels should terminate the search.
302 In all cases, jumps terminate the search. */
304 static int
305 stop_search_p (rtx insn, int labels_p)
307 if (insn == 0)
308 return 1;
310 /* If the insn can throw an exception that is caught within the function,
311 it may effectively perform a jump from the viewpoint of the function.
312 Therefore act like for a jump. */
313 if (can_throw_internal (insn))
314 return 1;
316 switch (GET_CODE (insn))
318 case NOTE:
319 case CALL_INSN:
320 return 0;
322 case CODE_LABEL:
323 return labels_p;
325 case JUMP_INSN:
326 case BARRIER:
327 return 1;
329 case INSN:
330 /* OK unless it contains a delay slot or is an `asm' insn of some type.
331 We don't know anything about these. */
332 return (GET_CODE (PATTERN (insn)) == SEQUENCE
333 || GET_CODE (PATTERN (insn)) == ASM_INPUT
334 || asm_noperands (PATTERN (insn)) >= 0);
336 default:
337 gcc_unreachable ();
341 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
342 resource set contains a volatile memory reference. Otherwise, return FALSE. */
344 static int
345 resource_conflicts_p (struct resources *res1, struct resources *res2)
347 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
348 || res1->volatil || res2->volatil)
349 return 1;
351 return hard_reg_set_intersect_p (res1->regs, res2->regs);
354 /* Return TRUE if any resource marked in RES, a `struct resources', is
355 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
356 routine is using those resources.
358 We compute this by computing all the resources referenced by INSN and
359 seeing if this conflicts with RES. It might be faster to directly check
360 ourselves, and this is the way it used to work, but it means duplicating
361 a large block of complex code. */
363 static int
364 insn_references_resource_p (rtx insn, struct resources *res,
365 bool include_delayed_effects)
367 struct resources insn_res;
369 CLEAR_RESOURCE (&insn_res);
370 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
371 return resource_conflicts_p (&insn_res, res);
374 /* Return TRUE if INSN modifies resources that are marked in RES.
375 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
376 included. CC0 is only modified if it is explicitly set; see comments
377 in front of mark_set_resources for details. */
379 static int
380 insn_sets_resource_p (rtx insn, struct resources *res,
381 bool include_delayed_effects)
383 struct resources insn_sets;
385 CLEAR_RESOURCE (&insn_sets);
386 mark_set_resources (insn, &insn_sets, 0,
387 (include_delayed_effects
388 ? MARK_SRC_DEST_CALL
389 : MARK_SRC_DEST));
390 return resource_conflicts_p (&insn_sets, res);
393 /* Find a label at the end of the function or before a RETURN. If there
394 is none, try to make one. If that fails, returns 0.
396 The property of such a label is that it is placed just before the
397 epilogue or a bare RETURN insn, so that another bare RETURN can be
398 turned into a jump to the label unconditionally. In particular, the
399 label cannot be placed before a RETURN insn with a filled delay slot.
401 ??? There may be a problem with the current implementation. Suppose
402 we start with a bare RETURN insn and call find_end_label. It may set
403 function_return_label just before the RETURN. Suppose the machinery
404 is able to fill the delay slot of the RETURN insn afterwards. Then
405 function_return_label is no longer valid according to the property
406 described above and find_end_label will still return it unmodified.
407 Note that this is probably mitigated by the following observation:
408 once function_return_label is made, it is very likely the target of
409 a jump, so filling the delay slot of the RETURN will be much more
410 difficult.
411 KIND is either simple_return_rtx or ret_rtx, indicating which type of
412 return we're looking for. */
414 static rtx_code_label *
415 find_end_label (rtx kind)
417 rtx_insn *insn;
418 rtx_code_label **plabel;
420 if (kind == ret_rtx)
421 plabel = &function_return_label;
422 else
424 gcc_assert (kind == simple_return_rtx);
425 plabel = &function_simple_return_label;
428 /* If we found one previously, return it. */
429 if (*plabel)
430 return *plabel;
432 /* Otherwise, see if there is a label at the end of the function. If there
433 is, it must be that RETURN insns aren't needed, so that is our return
434 label and we don't have to do anything else. */
436 insn = get_last_insn ();
437 while (NOTE_P (insn)
438 || (NONJUMP_INSN_P (insn)
439 && (GET_CODE (PATTERN (insn)) == USE
440 || GET_CODE (PATTERN (insn)) == CLOBBER)))
441 insn = PREV_INSN (insn);
443 /* When a target threads its epilogue we might already have a
444 suitable return insn. If so put a label before it for the
445 function_return_label. */
446 if (BARRIER_P (insn)
447 && JUMP_P (PREV_INSN (insn))
448 && PATTERN (PREV_INSN (insn)) == kind)
450 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
451 rtx_code_label *label = gen_label_rtx ();
452 LABEL_NUSES (label) = 0;
454 /* Put the label before any USE insns that may precede the RETURN
455 insn. */
456 while (GET_CODE (temp) == USE)
457 temp = PREV_INSN (temp);
459 emit_label_after (label, temp);
460 *plabel = label;
463 else if (LABEL_P (insn))
464 *plabel = as_a <rtx_code_label *> (insn);
465 else
467 rtx_code_label *label = gen_label_rtx ();
468 LABEL_NUSES (label) = 0;
469 /* If the basic block reorder pass moves the return insn to
470 some other place try to locate it again and put our
471 function_return_label there. */
472 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
473 insn = PREV_INSN (insn);
474 if (insn)
476 insn = PREV_INSN (insn);
478 /* Put the label before any USE insns that may precede the
479 RETURN insn. */
480 while (GET_CODE (insn) == USE)
481 insn = PREV_INSN (insn);
483 emit_label_after (label, insn);
485 else
487 if (HAVE_epilogue && ! HAVE_return)
488 /* The RETURN insn has its delay slot filled so we cannot
489 emit the label just before it. Since we already have
490 an epilogue and cannot emit a new RETURN, we cannot
491 emit the label at all. */
492 return NULL;
494 /* Otherwise, make a new label and emit a RETURN and BARRIER,
495 if needed. */
496 emit_label (label);
497 if (HAVE_return)
499 /* The return we make may have delay slots too. */
500 rtx pat = gen_return ();
501 rtx_insn *insn = emit_jump_insn (pat);
502 set_return_jump_label (insn);
503 emit_barrier ();
504 if (num_delay_slots (insn) > 0)
505 obstack_ptr_grow (&unfilled_slots_obstack, insn);
508 *plabel = label;
511 /* Show one additional use for this label so it won't go away until
512 we are done. */
513 ++LABEL_NUSES (*plabel);
515 return *plabel;
518 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
519 the pattern of INSN with the SEQUENCE.
521 Returns the insn containing the SEQUENCE that replaces INSN. */
523 static rtx_insn *
524 emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
526 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
527 rtvec seqv = rtvec_alloc (length + 1);
528 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
529 rtx_insn *seq_insn = make_insn_raw (seq);
531 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
532 not have a location, but one of the delayed insns does, we pick up a
533 location from there later. */
534 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
536 /* Unlink INSN from the insn chain, so that we can put it into
537 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
538 rtx_insn *after = PREV_INSN (insn);
539 remove_insn (insn);
540 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
542 /* Build our SEQUENCE and rebuild the insn chain. */
543 int i = 1;
544 start_sequence ();
545 XVECEXP (seq, 0, 0) = emit_insn (insn);
546 for (rtx_insn_list *li = list; li; li = li->next (), i++)
548 rtx_insn *tem = li->insn ();
549 rtx note, next;
551 /* Show that this copy of the insn isn't deleted. */
552 tem->set_undeleted ();
554 /* Unlink insn from its original place, and re-emit it into
555 the sequence. */
556 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
557 XVECEXP (seq, 0, i) = emit_insn (tem);
559 /* SPARC assembler, for instance, emit warning when debug info is output
560 into the delay slot. */
561 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
562 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
563 INSN_LOCATION (tem) = 0;
565 for (note = REG_NOTES (tem); note; note = next)
567 next = XEXP (note, 1);
568 switch (REG_NOTE_KIND (note))
570 case REG_DEAD:
571 /* Remove any REG_DEAD notes because we can't rely on them now
572 that the insn has been moved. */
573 remove_note (tem, note);
574 break;
576 case REG_LABEL_OPERAND:
577 case REG_LABEL_TARGET:
578 /* Keep the label reference count up to date. */
579 if (LABEL_P (XEXP (note, 0)))
580 LABEL_NUSES (XEXP (note, 0)) ++;
581 break;
583 default:
584 break;
588 end_sequence ();
589 gcc_assert (i == length + 1);
591 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
592 add_insn_after (seq_insn, after, NULL);
594 return seq_insn;
597 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
598 be in the order in which the insns are to be executed. */
600 static rtx_insn_list *
601 add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list)
603 /* If we have an empty list, just make a new list element. If
604 INSN has its block number recorded, clear it since we may
605 be moving the insn to a new block. */
607 if (delay_list == 0)
609 clear_hashed_info_for_insn (insn);
610 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
613 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
614 list. */
615 XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ());
617 return delay_list;
620 /* Delete INSN from the delay slot of the insn that it is in, which may
621 produce an insn with no delay slots. Return the new insn. */
623 static rtx_insn *
624 delete_from_delay_slot (rtx_insn *insn)
626 rtx_insn *trial, *seq_insn, *prev;
627 rtx_sequence *seq;
628 rtx_insn_list *delay_list = 0;
629 int i;
630 int had_barrier = 0;
632 /* We first must find the insn containing the SEQUENCE with INSN in its
633 delay slot. Do this by finding an insn, TRIAL, where
634 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
636 for (trial = insn;
637 PREV_INSN (NEXT_INSN (trial)) == trial;
638 trial = NEXT_INSN (trial))
641 seq_insn = PREV_INSN (NEXT_INSN (trial));
642 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
644 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
645 had_barrier = 1;
647 /* Create a delay list consisting of all the insns other than the one
648 we are deleting (unless we were the only one). */
649 if (seq->len () > 2)
650 for (i = 1; i < seq->len (); i++)
651 if (seq->insn (i) != insn)
652 delay_list = add_to_delay_list (seq->insn (i), delay_list);
654 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
655 list, and rebuild the delay list if non-empty. */
656 prev = PREV_INSN (seq_insn);
657 trial = seq->insn (0);
658 delete_related_insns (seq_insn);
659 add_insn_after (trial, prev, NULL);
661 /* If there was a barrier after the old SEQUENCE, remit it. */
662 if (had_barrier)
663 emit_barrier_after (trial);
665 /* If there are any delay insns, remit them. Otherwise clear the
666 annul flag. */
667 if (delay_list)
668 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
669 else if (JUMP_P (trial))
670 INSN_ANNULLED_BRANCH_P (trial) = 0;
672 INSN_FROM_TARGET_P (insn) = 0;
674 /* Show we need to fill this insn again. */
675 obstack_ptr_grow (&unfilled_slots_obstack, trial);
677 return trial;
680 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
681 the insn that sets CC0 for it and delete it too. */
683 static void
684 delete_scheduled_jump (rtx_insn *insn)
686 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
687 delete the insn that sets the condition code, but it is hard to find it.
688 Since this case is rare anyway, don't bother trying; there would likely
689 be other insns that became dead anyway, which we wouldn't know to
690 delete. */
692 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, insn))
694 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
696 /* If a reg-note was found, it points to an insn to set CC0. This
697 insn is in the delay list of some other insn. So delete it from
698 the delay list it was in. */
699 if (note)
701 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
702 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
703 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
705 else
707 /* The insn setting CC0 is our previous insn, but it may be in
708 a delay slot. It will be the last insn in the delay slot, if
709 it is. */
710 rtx_insn *trial = previous_insn (insn);
711 if (NOTE_P (trial))
712 trial = prev_nonnote_insn (trial);
713 if (sets_cc0_p (PATTERN (trial)) != 1
714 || FIND_REG_INC_NOTE (trial, NULL_RTX))
715 return;
716 if (PREV_INSN (NEXT_INSN (trial)) == trial)
717 delete_related_insns (trial);
718 else
719 delete_from_delay_slot (trial);
723 delete_related_insns (insn);
726 /* Counters for delay-slot filling. */
728 #define NUM_REORG_FUNCTIONS 2
729 #define MAX_DELAY_HISTOGRAM 3
730 #define MAX_REORG_PASSES 2
732 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
734 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
736 static int reorg_pass_number;
738 static void
739 note_delay_statistics (int slots_filled, int index)
741 num_insns_needing_delays[index][reorg_pass_number]++;
742 if (slots_filled > MAX_DELAY_HISTOGRAM)
743 slots_filled = MAX_DELAY_HISTOGRAM;
744 num_filled_delays[index][slots_filled][reorg_pass_number]++;
747 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
749 /* Optimize the following cases:
751 1. When a conditional branch skips over only one instruction,
752 use an annulling branch and put that insn in the delay slot.
753 Use either a branch that annuls when the condition if true or
754 invert the test with a branch that annuls when the condition is
755 false. This saves insns, since otherwise we must copy an insn
756 from the L1 target.
758 (orig) (skip) (otherwise)
759 Bcc.n L1 Bcc',a L1 Bcc,a L1'
760 insn insn insn2
761 L1: L1: L1:
762 insn2 insn2 insn2
763 insn3 insn3 L1':
764 insn3
766 2. When a conditional branch skips over only one instruction,
767 and after that, it unconditionally branches somewhere else,
768 perform the similar optimization. This saves executing the
769 second branch in the case where the inverted condition is true.
771 Bcc.n L1 Bcc',a L2
772 insn insn
773 L1: L1:
774 Bra L2 Bra L2
776 INSN is a JUMP_INSN.
778 This should be expanded to skip over N insns, where N is the number
779 of delay slots required. */
781 static rtx_insn_list *
782 optimize_skip (rtx_insn *insn)
784 rtx_insn *trial = next_nonnote_insn (insn);
785 rtx_insn *next_trial = next_active_insn (trial);
786 rtx_insn_list *delay_list = 0;
787 int flags;
789 flags = get_jump_flags (insn, JUMP_LABEL (insn));
791 if (trial == 0
792 || !NONJUMP_INSN_P (trial)
793 || GET_CODE (PATTERN (trial)) == SEQUENCE
794 || recog_memoized (trial) < 0
795 || (! eligible_for_annul_false (insn, 0, trial, flags)
796 && ! eligible_for_annul_true (insn, 0, trial, flags))
797 || can_throw_internal (trial))
798 return 0;
800 /* There are two cases where we are just executing one insn (we assume
801 here that a branch requires only one insn; this should be generalized
802 at some point): Where the branch goes around a single insn or where
803 we have one insn followed by a branch to the same label we branch to.
804 In both of these cases, inverting the jump and annulling the delay
805 slot give the same effect in fewer insns. */
806 if (next_trial == next_active_insn (JUMP_LABEL (insn))
807 || (next_trial != 0
808 && simplejump_or_return_p (next_trial)
809 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
811 if (eligible_for_annul_false (insn, 0, trial, flags))
813 if (invert_jump (insn, JUMP_LABEL (insn), 1))
814 INSN_FROM_TARGET_P (trial) = 1;
815 else if (! eligible_for_annul_true (insn, 0, trial, flags))
816 return 0;
819 delay_list = add_to_delay_list (trial, NULL);
820 next_trial = next_active_insn (trial);
821 update_block (trial, trial);
822 delete_related_insns (trial);
824 /* Also, if we are targeting an unconditional
825 branch, thread our jump to the target of that branch. Don't
826 change this into a RETURN here, because it may not accept what
827 we have in the delay slot. We'll fix this up later. */
828 if (next_trial && simplejump_or_return_p (next_trial))
830 rtx target_label = JUMP_LABEL (next_trial);
831 if (ANY_RETURN_P (target_label))
832 target_label = find_end_label (target_label);
834 if (target_label)
836 /* Recompute the flags based on TARGET_LABEL since threading
837 the jump to TARGET_LABEL may change the direction of the
838 jump (which may change the circumstances in which the
839 delay slot is nullified). */
840 flags = get_jump_flags (insn, target_label);
841 if (eligible_for_annul_true (insn, 0, trial, flags))
842 reorg_redirect_jump (insn, target_label);
846 INSN_ANNULLED_BRANCH_P (insn) = 1;
849 return delay_list;
851 #endif
853 /* Encode and return branch direction and prediction information for
854 INSN assuming it will jump to LABEL.
856 Non conditional branches return no direction information and
857 are predicted as very likely taken. */
859 static int
860 get_jump_flags (const rtx_insn *insn, rtx label)
862 int flags;
864 /* get_jump_flags can be passed any insn with delay slots, these may
865 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
866 direction information, and only if they are conditional jumps.
868 If LABEL is a return, then there is no way to determine the branch
869 direction. */
870 if (JUMP_P (insn)
871 && (condjump_p (insn) || condjump_in_parallel_p (insn))
872 && !ANY_RETURN_P (label)
873 && INSN_UID (insn) <= max_uid
874 && INSN_UID (label) <= max_uid)
875 flags
876 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
877 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
878 /* No valid direction information. */
879 else
880 flags = 0;
882 return flags;
885 /* Return truth value of the statement that this branch
886 is mostly taken. If we think that the branch is extremely likely
887 to be taken, we return 2. If the branch is slightly more likely to be
888 taken, return 1. If the branch is slightly less likely to be taken,
889 return 0 and if the branch is highly unlikely to be taken, return -1. */
891 static int
892 mostly_true_jump (rtx jump_insn)
894 /* If branch probabilities are available, then use that number since it
895 always gives a correct answer. */
896 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
897 if (note)
899 int prob = XINT (note, 0);
901 if (prob >= REG_BR_PROB_BASE * 9 / 10)
902 return 2;
903 else if (prob >= REG_BR_PROB_BASE / 2)
904 return 1;
905 else if (prob >= REG_BR_PROB_BASE / 10)
906 return 0;
907 else
908 return -1;
911 /* If there is no note, assume branches are not taken.
912 This should be rare. */
913 return 0;
916 /* Return the condition under which INSN will branch to TARGET. If TARGET
917 is zero, return the condition under which INSN will return. If INSN is
918 an unconditional branch, return const_true_rtx. If INSN isn't a simple
919 type of jump, or it doesn't go to TARGET, return 0. */
921 static rtx
922 get_branch_condition (const rtx_insn *insn, rtx target)
924 rtx pat = PATTERN (insn);
925 rtx src;
927 if (condjump_in_parallel_p (insn))
928 pat = XVECEXP (pat, 0, 0);
930 if (ANY_RETURN_P (pat) && pat == target)
931 return const_true_rtx;
933 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
934 return 0;
936 src = SET_SRC (pat);
937 if (GET_CODE (src) == LABEL_REF && LABEL_REF_LABEL (src) == target)
938 return const_true_rtx;
940 else if (GET_CODE (src) == IF_THEN_ELSE
941 && XEXP (src, 2) == pc_rtx
942 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
943 && LABEL_REF_LABEL (XEXP (src, 1)) == target)
944 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
945 return XEXP (src, 0);
947 else if (GET_CODE (src) == IF_THEN_ELSE
948 && XEXP (src, 1) == pc_rtx
949 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
950 && LABEL_REF_LABEL (XEXP (src, 2)) == target)
951 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
953 enum rtx_code rev;
954 rev = reversed_comparison_code (XEXP (src, 0), insn);
955 if (rev != UNKNOWN)
956 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
957 XEXP (XEXP (src, 0), 0),
958 XEXP (XEXP (src, 0), 1));
961 return 0;
964 /* Return nonzero if CONDITION is more strict than the condition of
965 INSN, i.e., if INSN will always branch if CONDITION is true. */
967 static int
968 condition_dominates_p (rtx condition, const rtx_insn *insn)
970 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
971 enum rtx_code code = GET_CODE (condition);
972 enum rtx_code other_code;
974 if (rtx_equal_p (condition, other_condition)
975 || other_condition == const_true_rtx)
976 return 1;
978 else if (condition == const_true_rtx || other_condition == 0)
979 return 0;
981 other_code = GET_CODE (other_condition);
982 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
983 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
984 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
985 return 0;
987 return comparison_dominates_p (code, other_code);
990 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
991 any insns already in the delay slot of JUMP. */
993 static int
994 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
996 int flags, i;
997 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
999 /* Make sure all the delay slots of this jump would still
1000 be valid after threading the jump. If they are still
1001 valid, then return nonzero. */
1003 flags = get_jump_flags (jump, newlabel);
1004 for (i = 1; i < pat->len (); i++)
1005 if (! (
1006 #ifdef ANNUL_IFFALSE_SLOTS
1007 (INSN_ANNULLED_BRANCH_P (jump)
1008 && INSN_FROM_TARGET_P (pat->insn (i)))
1009 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
1010 #endif
1011 #ifdef ANNUL_IFTRUE_SLOTS
1012 (INSN_ANNULLED_BRANCH_P (jump)
1013 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1014 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
1015 #endif
1016 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
1017 break;
1019 return (i == pat->len ());
1022 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1023 any insns we wish to place in the delay slot of JUMP. */
1025 static int
1026 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
1027 rtx_insn_list *delay_list)
1029 int flags, i;
1030 rtx_insn_list *li;
1032 /* Make sure all the insns in DELAY_LIST would still be
1033 valid after threading the jump. If they are still
1034 valid, then return nonzero. */
1036 flags = get_jump_flags (jump, newlabel);
1037 for (li = delay_list, i = 0; li; li = li->next (), i++)
1038 if (! (
1039 #ifdef ANNUL_IFFALSE_SLOTS
1040 (INSN_ANNULLED_BRANCH_P (jump)
1041 && INSN_FROM_TARGET_P (li->insn ()))
1042 ? eligible_for_annul_false (jump, i, li->insn (), flags) :
1043 #endif
1044 #ifdef ANNUL_IFTRUE_SLOTS
1045 (INSN_ANNULLED_BRANCH_P (jump)
1046 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1047 ? eligible_for_annul_true (jump, i, li->insn (), flags) :
1048 #endif
1049 eligible_for_delay (jump, i, li->insn (), flags)))
1050 break;
1052 return (li == NULL);
1055 /* DELAY_LIST is a list of insns that have already been placed into delay
1056 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1057 If not, return 0; otherwise return 1. */
1059 static int
1060 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1062 rtx temp;
1064 if (delay_list)
1066 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1068 rtx trial = XEXP (temp, 0);
1070 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1071 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1072 return 0;
1076 return 1;
1079 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1080 the condition tested by INSN is CONDITION and the resources shown in
1081 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1082 from SEQ's delay list, in addition to whatever insns it may execute
1083 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1084 needed while searching for delay slot insns. Return the concatenated
1085 delay list if possible, otherwise, return 0.
1087 SLOTS_TO_FILL is the total number of slots required by INSN, and
1088 PSLOTS_FILLED points to the number filled so far (also the number of
1089 insns in DELAY_LIST). It is updated with the number that have been
1090 filled from the SEQUENCE, if any.
1092 PANNUL_P points to a nonzero value if we already know that we need
1093 to annul INSN. If this routine determines that annulling is needed,
1094 it may set that value nonzero.
1096 PNEW_THREAD points to a location that is to receive the place at which
1097 execution should continue. */
1099 static rtx_insn_list *
1100 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1101 rtx_insn_list *delay_list, struct resources *sets,
1102 struct resources *needed,
1103 struct resources *other_needed,
1104 int slots_to_fill, int *pslots_filled,
1105 int *pannul_p, rtx *pnew_thread)
1107 int slots_remaining = slots_to_fill - *pslots_filled;
1108 int total_slots_filled = *pslots_filled;
1109 rtx_insn_list *new_delay_list = 0;
1110 int must_annul = *pannul_p;
1111 int used_annul = 0;
1112 int i;
1113 struct resources cc_set;
1114 bool *redundant;
1116 /* We can't do anything if there are more delay slots in SEQ than we
1117 can handle, or if we don't know that it will be a taken branch.
1118 We know that it will be a taken branch if it is either an unconditional
1119 branch or a conditional branch with a stricter branch condition.
1121 Also, exit if the branch has more than one set, since then it is computing
1122 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1123 ??? It may be possible to move other sets into INSN in addition to
1124 moving the instructions in the delay slots.
1126 We can not steal the delay list if one of the instructions in the
1127 current delay_list modifies the condition codes and the jump in the
1128 sequence is a conditional jump. We can not do this because we can
1129 not change the direction of the jump because the condition codes
1130 will effect the direction of the jump in the sequence. */
1132 CLEAR_RESOURCE (&cc_set);
1133 for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ())
1135 rtx_insn *trial = temp->insn ();
1137 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1138 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1139 return delay_list;
1142 if (XVECLEN (seq, 0) - 1 > slots_remaining
1143 || ! condition_dominates_p (condition, seq->insn (0))
1144 || ! single_set (seq->insn (0)))
1145 return delay_list;
1147 /* On some targets, branches with delay slots can have a limited
1148 displacement. Give the back end a chance to tell us we can't do
1149 this. */
1150 if (! targetm.can_follow_jump (insn, seq->insn (0)))
1151 return delay_list;
1153 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1154 for (i = 1; i < seq->len (); i++)
1156 rtx_insn *trial = seq->insn (i);
1157 int flags;
1159 if (insn_references_resource_p (trial, sets, false)
1160 || insn_sets_resource_p (trial, needed, false)
1161 || insn_sets_resource_p (trial, sets, false)
1162 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1163 delay list. */
1164 || (HAVE_cc0 && find_reg_note (trial, REG_CC_USER, NULL_RTX))
1165 /* If TRIAL is from the fallthrough code of an annulled branch insn
1166 in SEQ, we cannot use it. */
1167 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1168 && ! INSN_FROM_TARGET_P (trial)))
1169 return delay_list;
1171 /* If this insn was already done (usually in a previous delay slot),
1172 pretend we put it in our delay slot. */
1173 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1174 if (redundant[i])
1175 continue;
1177 /* We will end up re-vectoring this branch, so compute flags
1178 based on jumping to the new label. */
1179 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1181 if (! must_annul
1182 && ((condition == const_true_rtx
1183 || (! insn_sets_resource_p (trial, other_needed, false)
1184 && ! may_trap_or_fault_p (PATTERN (trial)))))
1185 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1186 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1187 && (must_annul = 1,
1188 check_annul_list_true_false (0, delay_list)
1189 && check_annul_list_true_false (0, new_delay_list)
1190 && eligible_for_annul_false (insn, total_slots_filled,
1191 trial, flags)))
1193 if (must_annul)
1194 used_annul = 1;
1195 rtx_insn *temp = copy_delay_slot_insn (trial);
1196 INSN_FROM_TARGET_P (temp) = 1;
1197 new_delay_list = add_to_delay_list (temp, new_delay_list);
1198 total_slots_filled++;
1200 if (--slots_remaining == 0)
1201 break;
1203 else
1204 return delay_list;
1207 /* Record the effect of the instructions that were redundant and which
1208 we therefore decided not to copy. */
1209 for (i = 1; i < seq->len (); i++)
1210 if (redundant[i])
1211 update_block (seq->insn (i), insn);
1213 /* Show the place to which we will be branching. */
1214 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1216 /* Add any new insns to the delay list and update the count of the
1217 number of slots filled. */
1218 *pslots_filled = total_slots_filled;
1219 if (used_annul)
1220 *pannul_p = 1;
1222 if (delay_list == 0)
1223 return new_delay_list;
1225 for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ())
1226 delay_list = add_to_delay_list (temp->insn (), delay_list);
1228 return delay_list;
1231 /* Similar to steal_delay_list_from_target except that SEQ is on the
1232 fallthrough path of INSN. Here we only do something if the delay insn
1233 of SEQ is an unconditional branch. In that case we steal its delay slot
1234 for INSN since unconditional branches are much easier to fill. */
1236 static rtx_insn_list *
1237 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1238 rtx_sequence *seq,
1239 rtx_insn_list *delay_list,
1240 struct resources *sets,
1241 struct resources *needed,
1242 struct resources *other_needed,
1243 int slots_to_fill, int *pslots_filled,
1244 int *pannul_p)
1246 int i;
1247 int flags;
1248 int must_annul = *pannul_p;
1249 int used_annul = 0;
1251 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1253 /* We can't do anything if SEQ's delay insn isn't an
1254 unconditional branch. */
1256 if (! simplejump_or_return_p (seq->insn (0)))
1257 return delay_list;
1259 for (i = 1; i < seq->len (); i++)
1261 rtx_insn *trial = seq->insn (i);
1263 /* If TRIAL sets CC0, stealing it will move it too far from the use
1264 of CC0. */
1265 if (insn_references_resource_p (trial, sets, false)
1266 || insn_sets_resource_p (trial, needed, false)
1267 || insn_sets_resource_p (trial, sets, false)
1268 || (HAVE_cc0 && sets_cc0_p (PATTERN (trial))))
1270 break;
1272 /* If this insn was already done, we don't need it. */
1273 if (redundant_insn (trial, insn, delay_list))
1275 update_block (trial, insn);
1276 delete_from_delay_slot (trial);
1277 continue;
1280 if (! must_annul
1281 && ((condition == const_true_rtx
1282 || (! insn_sets_resource_p (trial, other_needed, false)
1283 && ! may_trap_or_fault_p (PATTERN (trial)))))
1284 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1285 : (must_annul || delay_list == NULL) && (must_annul = 1,
1286 check_annul_list_true_false (1, delay_list)
1287 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1289 if (must_annul)
1290 used_annul = 1;
1291 delete_from_delay_slot (trial);
1292 delay_list = add_to_delay_list (trial, delay_list);
1294 if (++(*pslots_filled) == slots_to_fill)
1295 break;
1297 else
1298 break;
1301 if (used_annul)
1302 *pannul_p = 1;
1303 return delay_list;
1306 /* Try merging insns starting at THREAD which match exactly the insns in
1307 INSN's delay list.
1309 If all insns were matched and the insn was previously annulling, the
1310 annul bit will be cleared.
1312 For each insn that is merged, if the branch is or will be non-annulling,
1313 we delete the merged insn. */
1315 static void
1316 try_merge_delay_insns (rtx insn, rtx_insn *thread)
1318 rtx_insn *trial, *next_trial;
1319 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1320 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1321 int slot_number = 1;
1322 int num_slots = XVECLEN (PATTERN (insn), 0);
1323 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1324 struct resources set, needed, modified;
1325 rtx_insn_list *merged_insns = 0;
1326 int i, j;
1327 int flags;
1329 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1331 CLEAR_RESOURCE (&needed);
1332 CLEAR_RESOURCE (&set);
1334 /* If this is not an annulling branch, take into account anything needed in
1335 INSN's delay slot. This prevents two increments from being incorrectly
1336 folded into one. If we are annulling, this would be the correct
1337 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1338 will essentially disable this optimization. This method is somewhat of
1339 a kludge, but I don't see a better way.) */
1340 if (! annul_p)
1341 for (i = 1 ; i < num_slots; i++)
1342 if (XVECEXP (PATTERN (insn), 0, i))
1343 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1344 true);
1346 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1348 rtx pat = PATTERN (trial);
1349 rtx oldtrial = trial;
1351 next_trial = next_nonnote_insn (trial);
1353 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1354 if (NONJUMP_INSN_P (trial)
1355 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1356 continue;
1358 if (GET_CODE (next_to_match) == GET_CODE (trial)
1359 /* We can't share an insn that sets cc0. */
1360 && (!HAVE_cc0 || ! sets_cc0_p (pat))
1361 && ! insn_references_resource_p (trial, &set, true)
1362 && ! insn_sets_resource_p (trial, &set, true)
1363 && ! insn_sets_resource_p (trial, &needed, true)
1364 && (trial = try_split (pat, trial, 0)) != 0
1365 /* Update next_trial, in case try_split succeeded. */
1366 && (next_trial = next_nonnote_insn (trial))
1367 /* Likewise THREAD. */
1368 && (thread = oldtrial == thread ? trial : thread)
1369 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1370 /* Have to test this condition if annul condition is different
1371 from (and less restrictive than) non-annulling one. */
1372 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1375 if (! annul_p)
1377 update_block (trial, thread);
1378 if (trial == thread)
1379 thread = next_active_insn (thread);
1381 delete_related_insns (trial);
1382 INSN_FROM_TARGET_P (next_to_match) = 0;
1384 else
1385 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1387 if (++slot_number == num_slots)
1388 break;
1390 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1393 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1394 mark_referenced_resources (trial, &needed, true);
1397 /* See if we stopped on a filled insn. If we did, try to see if its
1398 delay slots match. */
1399 if (slot_number != num_slots
1400 && trial && NONJUMP_INSN_P (trial)
1401 && GET_CODE (PATTERN (trial)) == SEQUENCE
1402 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1403 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1405 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1406 rtx filled_insn = XVECEXP (pat, 0, 0);
1408 /* Account for resources set/needed by the filled insn. */
1409 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1410 mark_referenced_resources (filled_insn, &needed, true);
1412 for (i = 1; i < pat->len (); i++)
1414 rtx_insn *dtrial = pat->insn (i);
1416 CLEAR_RESOURCE (&modified);
1417 /* Account for resources set by the the insn following NEXT_TO_MATCH
1418 inside INSN's delay list. */
1419 for (j = 1; slot_number + j < num_slots; j++)
1420 mark_set_resources (XVECEXP (PATTERN (insn), 0, slot_number + j),
1421 &modified, 0, MARK_SRC_DEST_CALL);
1422 /* Account for resources set by the the insn before DTRIAL and inside
1423 TRIAL's delay list. */
1424 for (j = 1; j < i; j++)
1425 mark_set_resources (XVECEXP (pat, 0, j),
1426 &modified, 0, MARK_SRC_DEST_CALL);
1427 if (! insn_references_resource_p (dtrial, &set, true)
1428 && ! insn_sets_resource_p (dtrial, &set, true)
1429 && ! insn_sets_resource_p (dtrial, &needed, true)
1430 && (!HAVE_cc0 || ! sets_cc0_p (PATTERN (dtrial)))
1431 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1432 /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
1433 resource modified between them (only dtrial is checked because
1434 next_to_match and dtrial shall to be equal in order to hit
1435 this line) */
1436 && ! insn_references_resource_p (dtrial, &modified, true)
1437 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1439 if (! annul_p)
1441 rtx_insn *new_rtx;
1443 update_block (dtrial, thread);
1444 new_rtx = delete_from_delay_slot (dtrial);
1445 if (thread->deleted ())
1446 thread = new_rtx;
1447 INSN_FROM_TARGET_P (next_to_match) = 0;
1449 else
1450 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1451 merged_insns);
1453 if (++slot_number == num_slots)
1454 break;
1456 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1458 else
1460 /* Keep track of the set/referenced resources for the delay
1461 slots of any trial insns we encounter. */
1462 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1463 mark_referenced_resources (dtrial, &needed, true);
1468 /* If all insns in the delay slot have been matched and we were previously
1469 annulling the branch, we need not any more. In that case delete all the
1470 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1471 the delay list so that we know that it isn't only being used at the
1472 target. */
1473 if (slot_number == num_slots && annul_p)
1475 for (; merged_insns; merged_insns = merged_insns->next ())
1477 if (GET_MODE (merged_insns) == SImode)
1479 rtx_insn *new_rtx;
1481 update_block (merged_insns->insn (), thread);
1482 new_rtx = delete_from_delay_slot (merged_insns->insn ());
1483 if (thread->deleted ())
1484 thread = new_rtx;
1486 else
1488 update_block (merged_insns->insn (), thread);
1489 delete_related_insns (merged_insns->insn ());
1493 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1495 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1496 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1500 /* See if INSN is redundant with an insn in front of TARGET. Often this
1501 is called when INSN is a candidate for a delay slot of TARGET.
1502 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1503 of INSN. Often INSN will be redundant with an insn in a delay slot of
1504 some previous insn. This happens when we have a series of branches to the
1505 same label; in that case the first insn at the target might want to go
1506 into each of the delay slots.
1508 If we are not careful, this routine can take up a significant fraction
1509 of the total compilation time (4%), but only wins rarely. Hence we
1510 speed this routine up by making two passes. The first pass goes back
1511 until it hits a label and sees if it finds an insn with an identical
1512 pattern. Only in this (relatively rare) event does it check for
1513 data conflicts.
1515 We do not split insns we encounter. This could cause us not to find a
1516 redundant insn, but the cost of splitting seems greater than the possible
1517 gain in rare cases. */
1519 static rtx
1520 redundant_insn (rtx insn, rtx_insn *target, rtx delay_list)
1522 rtx target_main = target;
1523 rtx ipat = PATTERN (insn);
1524 rtx_insn *trial;
1525 rtx pat;
1526 struct resources needed, set;
1527 int i;
1528 unsigned insns_to_search;
1530 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1531 are allowed to not actually assign to such a register. */
1532 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1533 return 0;
1535 /* Scan backwards looking for a match. */
1536 for (trial = PREV_INSN (target),
1537 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1538 trial && insns_to_search > 0;
1539 trial = PREV_INSN (trial))
1541 /* (use (insn))s can come immediately after a barrier if the
1542 label that used to precede them has been deleted as dead.
1543 See delete_related_insns. */
1544 if (LABEL_P (trial) || BARRIER_P (trial))
1545 return 0;
1547 if (!INSN_P (trial))
1548 continue;
1549 --insns_to_search;
1551 pat = PATTERN (trial);
1552 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1553 continue;
1555 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1557 /* Stop for a CALL and its delay slots because it is difficult to
1558 track its resource needs correctly. */
1559 if (CALL_P (seq->element (0)))
1560 return 0;
1562 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1563 slots because it is difficult to track its resource needs
1564 correctly. */
1566 if (INSN_SETS_ARE_DELAYED (seq->insn (0)))
1567 return 0;
1569 if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0)))
1570 return 0;
1572 /* See if any of the insns in the delay slot match, updating
1573 resource requirements as we go. */
1574 for (i = seq->len () - 1; i > 0; i--)
1575 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1576 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1577 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1578 break;
1580 /* If found a match, exit this loop early. */
1581 if (i > 0)
1582 break;
1585 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1586 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1587 break;
1590 /* If we didn't find an insn that matches, return 0. */
1591 if (trial == 0)
1592 return 0;
1594 /* See what resources this insn sets and needs. If they overlap, or
1595 if this insn references CC0, it can't be redundant. */
1597 CLEAR_RESOURCE (&needed);
1598 CLEAR_RESOURCE (&set);
1599 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1600 mark_referenced_resources (insn, &needed, true);
1602 /* If TARGET is a SEQUENCE, get the main insn. */
1603 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1604 target_main = XVECEXP (PATTERN (target), 0, 0);
1606 if (resource_conflicts_p (&needed, &set)
1607 || (HAVE_cc0 && reg_mentioned_p (cc0_rtx, ipat))
1608 /* The insn requiring the delay may not set anything needed or set by
1609 INSN. */
1610 || insn_sets_resource_p (target_main, &needed, true)
1611 || insn_sets_resource_p (target_main, &set, true))
1612 return 0;
1614 /* Insns we pass may not set either NEEDED or SET, so merge them for
1615 simpler tests. */
1616 needed.memory |= set.memory;
1617 IOR_HARD_REG_SET (needed.regs, set.regs);
1619 /* This insn isn't redundant if it conflicts with an insn that either is
1620 or will be in a delay slot of TARGET. */
1622 while (delay_list)
1624 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1625 return 0;
1626 delay_list = XEXP (delay_list, 1);
1629 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1630 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1631 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1632 true))
1633 return 0;
1635 /* Scan backwards until we reach a label or an insn that uses something
1636 INSN sets or sets something insn uses or sets. */
1638 for (trial = PREV_INSN (target),
1639 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1640 trial && !LABEL_P (trial) && insns_to_search > 0;
1641 trial = PREV_INSN (trial))
1643 if (!INSN_P (trial))
1644 continue;
1645 --insns_to_search;
1647 pat = PATTERN (trial);
1648 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1649 continue;
1651 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1653 bool annul_p = false;
1654 rtx_insn *control = seq->insn (0);
1656 /* If this is a CALL_INSN and its delay slots, it is hard to track
1657 the resource needs properly, so give up. */
1658 if (CALL_P (control))
1659 return 0;
1661 /* If this is an INSN or JUMP_INSN with delayed effects, it
1662 is hard to track the resource needs properly, so give up. */
1664 if (INSN_SETS_ARE_DELAYED (control))
1665 return 0;
1667 if (INSN_REFERENCES_ARE_DELAYED (control))
1668 return 0;
1670 if (JUMP_P (control))
1671 annul_p = INSN_ANNULLED_BRANCH_P (control);
1673 /* See if any of the insns in the delay slot match, updating
1674 resource requirements as we go. */
1675 for (i = seq->len () - 1; i > 0; i--)
1677 rtx candidate = seq->element (i);
1679 /* If an insn will be annulled if the branch is false, it isn't
1680 considered as a possible duplicate insn. */
1681 if (rtx_equal_p (PATTERN (candidate), ipat)
1682 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1684 /* Show that this insn will be used in the sequel. */
1685 INSN_FROM_TARGET_P (candidate) = 0;
1686 return candidate;
1689 /* Unless this is an annulled insn from the target of a branch,
1690 we must stop if it sets anything needed or set by INSN. */
1691 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1692 && insn_sets_resource_p (candidate, &needed, true))
1693 return 0;
1696 /* If the insn requiring the delay slot conflicts with INSN, we
1697 must stop. */
1698 if (insn_sets_resource_p (control, &needed, true))
1699 return 0;
1701 else
1703 /* See if TRIAL is the same as INSN. */
1704 pat = PATTERN (trial);
1705 if (rtx_equal_p (pat, ipat))
1706 return trial;
1708 /* Can't go any further if TRIAL conflicts with INSN. */
1709 if (insn_sets_resource_p (trial, &needed, true))
1710 return 0;
1714 return 0;
1717 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1718 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1719 is nonzero, we are allowed to fall into this thread; otherwise, we are
1720 not.
1722 If LABEL is used more than one or we pass a label other than LABEL before
1723 finding an active insn, we do not own this thread. */
1725 static int
1726 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1728 rtx_insn *active_insn;
1729 rtx_insn *insn;
1731 /* We don't own the function end. */
1732 if (thread == 0 || ANY_RETURN_P (thread))
1733 return 0;
1735 /* We have a non-NULL insn. */
1736 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1738 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1739 active_insn = next_active_insn (PREV_INSN (thread_insn));
1741 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1742 if (LABEL_P (insn)
1743 && (insn != label || LABEL_NUSES (insn) != 1))
1744 return 0;
1746 if (allow_fallthrough)
1747 return 1;
1749 /* Ensure that we reach a BARRIER before any insn or label. */
1750 for (insn = prev_nonnote_insn (thread_insn);
1751 insn == 0 || !BARRIER_P (insn);
1752 insn = prev_nonnote_insn (insn))
1753 if (insn == 0
1754 || LABEL_P (insn)
1755 || (NONJUMP_INSN_P (insn)
1756 && GET_CODE (PATTERN (insn)) != USE
1757 && GET_CODE (PATTERN (insn)) != CLOBBER))
1758 return 0;
1760 return 1;
1763 /* Called when INSN is being moved from a location near the target of a jump.
1764 We leave a marker of the form (use (INSN)) immediately in front
1765 of WHERE for mark_target_live_regs. These markers will be deleted when
1766 reorg finishes.
1768 We used to try to update the live status of registers if WHERE is at
1769 the start of a basic block, but that can't work since we may remove a
1770 BARRIER in relax_delay_slots. */
1772 static void
1773 update_block (rtx_insn *insn, rtx where)
1775 /* Ignore if this was in a delay slot and it came from the target of
1776 a branch. */
1777 if (INSN_FROM_TARGET_P (insn))
1778 return;
1780 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1782 /* INSN might be making a value live in a block where it didn't use to
1783 be. So recompute liveness information for this block. */
1785 incr_ticks_for_insn (insn);
1788 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1789 the basic block containing the jump. */
1791 static int
1792 reorg_redirect_jump (rtx_insn *jump, rtx nlabel)
1794 incr_ticks_for_insn (jump);
1795 return redirect_jump (jump, nlabel, 1);
1798 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1799 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1800 that reference values used in INSN. If we find one, then we move the
1801 REG_DEAD note to INSN.
1803 This is needed to handle the case where a later insn (after INSN) has a
1804 REG_DEAD note for a register used by INSN, and this later insn subsequently
1805 gets moved before a CODE_LABEL because it is a redundant insn. In this
1806 case, mark_target_live_regs may be confused into thinking the register
1807 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1809 static void
1810 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1812 rtx link, next;
1813 rtx_insn *p;
1815 for (p = next_nonnote_insn (insn); p != delayed_insn;
1816 p = next_nonnote_insn (p))
1817 for (link = REG_NOTES (p); link; link = next)
1819 next = XEXP (link, 1);
1821 if (REG_NOTE_KIND (link) != REG_DEAD
1822 || !REG_P (XEXP (link, 0)))
1823 continue;
1825 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1827 /* Move the REG_DEAD note from P to INSN. */
1828 remove_note (p, link);
1829 XEXP (link, 1) = REG_NOTES (insn);
1830 REG_NOTES (insn) = link;
1835 /* Called when an insn redundant with start_insn is deleted. If there
1836 is a REG_DEAD note for the target of start_insn between start_insn
1837 and stop_insn, then the REG_DEAD note needs to be deleted since the
1838 value no longer dies there.
1840 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1841 confused into thinking the register is dead. */
1843 static void
1844 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1846 rtx link, next;
1847 rtx_insn *p;
1849 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1850 p = next_nonnote_insn (p))
1851 for (link = REG_NOTES (p); link; link = next)
1853 next = XEXP (link, 1);
1855 if (REG_NOTE_KIND (link) != REG_DEAD
1856 || !REG_P (XEXP (link, 0)))
1857 continue;
1859 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1861 remove_note (p, link);
1862 return;
1867 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1869 This handles the case of udivmodXi4 instructions which optimize their
1870 output depending on whether any REG_UNUSED notes are present.
1871 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1872 does. */
1874 static void
1875 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1877 rtx link, next;
1879 for (link = REG_NOTES (insn); link; link = next)
1881 next = XEXP (link, 1);
1883 if (REG_NOTE_KIND (link) != REG_UNUSED
1884 || !REG_P (XEXP (link, 0)))
1885 continue;
1887 if (! find_regno_note (redundant_insn, REG_UNUSED,
1888 REGNO (XEXP (link, 0))))
1889 remove_note (insn, link);
1893 static vec <rtx> sibling_labels;
1895 /* Return the label before INSN, or put a new label there. If SIBLING is
1896 non-zero, it is another label associated with the new label (if any),
1897 typically the former target of the jump that will be redirected to
1898 the new label. */
1900 static rtx_insn *
1901 get_label_before (rtx_insn *insn, rtx sibling)
1903 rtx_insn *label;
1905 /* Find an existing label at this point
1906 or make a new one if there is none. */
1907 label = prev_nonnote_insn (insn);
1909 if (label == 0 || !LABEL_P (label))
1911 rtx_insn *prev = PREV_INSN (insn);
1913 label = gen_label_rtx ();
1914 emit_label_after (label, prev);
1915 LABEL_NUSES (label) = 0;
1916 if (sibling)
1918 sibling_labels.safe_push (label);
1919 sibling_labels.safe_push (sibling);
1922 return label;
1925 /* Scan a function looking for insns that need a delay slot and find insns to
1926 put into the delay slot.
1928 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1929 as calls). We do these first since we don't want jump insns (that are
1930 easier to fill) to get the only insns that could be used for non-jump insns.
1931 When it is zero, only try to fill JUMP_INSNs.
1933 When slots are filled in this manner, the insns (including the
1934 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1935 it is possible to tell whether a delay slot has really been filled
1936 or not. `final' knows how to deal with this, by communicating
1937 through FINAL_SEQUENCE. */
1939 static void
1940 fill_simple_delay_slots (int non_jumps_p)
1942 rtx_insn *insn, *trial, *next_trial;
1943 rtx pat;
1944 int i;
1945 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1946 struct resources needed, set;
1947 int slots_to_fill, slots_filled;
1948 rtx_insn_list *delay_list;
1950 for (i = 0; i < num_unfilled_slots; i++)
1952 int flags;
1953 /* Get the next insn to fill. If it has already had any slots assigned,
1954 we can't do anything with it. Maybe we'll improve this later. */
1956 insn = unfilled_slots_base[i];
1957 if (insn == 0
1958 || insn->deleted ()
1959 || (NONJUMP_INSN_P (insn)
1960 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1961 || (JUMP_P (insn) && non_jumps_p)
1962 || (!JUMP_P (insn) && ! non_jumps_p))
1963 continue;
1965 /* It may have been that this insn used to need delay slots, but
1966 now doesn't; ignore in that case. This can happen, for example,
1967 on the HP PA RISC, where the number of delay slots depends on
1968 what insns are nearby. */
1969 slots_to_fill = num_delay_slots (insn);
1971 /* Some machine description have defined instructions to have
1972 delay slots only in certain circumstances which may depend on
1973 nearby insns (which change due to reorg's actions).
1975 For example, the PA port normally has delay slots for unconditional
1976 jumps.
1978 However, the PA port claims such jumps do not have a delay slot
1979 if they are immediate successors of certain CALL_INSNs. This
1980 allows the port to favor filling the delay slot of the call with
1981 the unconditional jump. */
1982 if (slots_to_fill == 0)
1983 continue;
1985 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1986 says how many. After initialization, first try optimizing
1988 call _foo call _foo
1989 nop add %o7,.-L1,%o7
1990 b,a L1
1993 If this case applies, the delay slot of the call is filled with
1994 the unconditional jump. This is done first to avoid having the
1995 delay slot of the call filled in the backward scan. Also, since
1996 the unconditional jump is likely to also have a delay slot, that
1997 insn must exist when it is subsequently scanned.
1999 This is tried on each insn with delay slots as some machines
2000 have insns which perform calls, but are not represented as
2001 CALL_INSNs. */
2003 slots_filled = 0;
2004 delay_list = 0;
2006 if (JUMP_P (insn))
2007 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2008 else
2009 flags = get_jump_flags (insn, NULL_RTX);
2011 if ((trial = next_active_insn (insn))
2012 && JUMP_P (trial)
2013 && simplejump_p (trial)
2014 && eligible_for_delay (insn, slots_filled, trial, flags)
2015 && no_labels_between_p (insn, trial)
2016 && ! can_throw_internal (trial))
2018 rtx_insn **tmp;
2019 slots_filled++;
2020 delay_list = add_to_delay_list (trial, delay_list);
2022 /* TRIAL may have had its delay slot filled, then unfilled. When
2023 the delay slot is unfilled, TRIAL is placed back on the unfilled
2024 slots obstack. Unfortunately, it is placed on the end of the
2025 obstack, not in its original location. Therefore, we must search
2026 from entry i + 1 to the end of the unfilled slots obstack to
2027 try and find TRIAL. */
2028 tmp = &unfilled_slots_base[i + 1];
2029 while (*tmp != trial && tmp != unfilled_slots_next)
2030 tmp++;
2032 /* Remove the unconditional jump from consideration for delay slot
2033 filling and unthread it. */
2034 if (*tmp == trial)
2035 *tmp = 0;
2037 rtx_insn *next = NEXT_INSN (trial);
2038 rtx_insn *prev = PREV_INSN (trial);
2039 if (prev)
2040 SET_NEXT_INSN (prev) = next;
2041 if (next)
2042 SET_PREV_INSN (next) = prev;
2046 /* Now, scan backwards from the insn to search for a potential
2047 delay-slot candidate. Stop searching when a label or jump is hit.
2049 For each candidate, if it is to go into the delay slot (moved
2050 forward in execution sequence), it must not need or set any resources
2051 that were set by later insns and must not set any resources that
2052 are needed for those insns.
2054 The delay slot insn itself sets resources unless it is a call
2055 (in which case the called routine, not the insn itself, is doing
2056 the setting). */
2058 if (slots_filled < slots_to_fill)
2060 /* If the flags register is dead after the insn, then we want to be
2061 able to accept a candidate that clobbers it. For this purpose,
2062 we need to filter the flags register during life analysis, so
2063 that it doesn't create RAW and WAW dependencies, while still
2064 creating the necessary WAR dependencies. */
2065 bool filter_flags
2066 = (slots_to_fill == 1
2067 && targetm.flags_regnum != INVALID_REGNUM
2068 && find_regno_note (insn, REG_DEAD, targetm.flags_regnum));
2069 struct resources fset;
2070 CLEAR_RESOURCE (&needed);
2071 CLEAR_RESOURCE (&set);
2072 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2073 if (filter_flags)
2075 CLEAR_RESOURCE (&fset);
2076 mark_set_resources (insn, &fset, 0, MARK_SRC_DEST);
2078 mark_referenced_resources (insn, &needed, false);
2080 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2081 trial = next_trial)
2083 next_trial = prev_nonnote_insn (trial);
2085 /* This must be an INSN or CALL_INSN. */
2086 pat = PATTERN (trial);
2088 /* Stand-alone USE and CLOBBER are just for flow. */
2089 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2090 continue;
2092 /* Check for resource conflict first, to avoid unnecessary
2093 splitting. */
2094 if (! insn_references_resource_p (trial, &set, true)
2095 && ! insn_sets_resource_p (trial,
2096 filter_flags ? &fset : &set,
2097 true)
2098 && ! insn_sets_resource_p (trial, &needed, true)
2099 /* Can't separate set of cc0 from its use. */
2100 && (!HAVE_cc0 || ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2101 && ! can_throw_internal (trial))
2103 trial = try_split (pat, trial, 1);
2104 next_trial = prev_nonnote_insn (trial);
2105 if (eligible_for_delay (insn, slots_filled, trial, flags))
2107 /* In this case, we are searching backward, so if we
2108 find insns to put on the delay list, we want
2109 to put them at the head, rather than the
2110 tail, of the list. */
2112 update_reg_dead_notes (trial, insn);
2113 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2114 trial, delay_list);
2115 update_block (trial, trial);
2116 delete_related_insns (trial);
2117 if (slots_to_fill == ++slots_filled)
2118 break;
2119 continue;
2123 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2124 if (filter_flags)
2126 mark_set_resources (trial, &fset, 0, MARK_SRC_DEST_CALL);
2127 /* If the flags register is set, then it doesn't create RAW
2128 dependencies any longer and it also doesn't create WAW
2129 dependencies since it's dead after the original insn. */
2130 if (TEST_HARD_REG_BIT (fset.regs, targetm.flags_regnum))
2132 CLEAR_HARD_REG_BIT (needed.regs, targetm.flags_regnum);
2133 CLEAR_HARD_REG_BIT (fset.regs, targetm.flags_regnum);
2136 mark_referenced_resources (trial, &needed, true);
2140 /* If all needed slots haven't been filled, we come here. */
2142 /* Try to optimize case of jumping around a single insn. */
2143 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2144 if (slots_filled != slots_to_fill
2145 && delay_list == 0
2146 && JUMP_P (insn)
2147 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2148 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2150 delay_list = optimize_skip (insn);
2151 if (delay_list)
2152 slots_filled += 1;
2154 #endif
2156 /* Try to get insns from beyond the insn needing the delay slot.
2157 These insns can neither set or reference resources set in insns being
2158 skipped, cannot set resources in the insn being skipped, and, if this
2159 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2160 call might not return).
2162 There used to be code which continued past the target label if
2163 we saw all uses of the target label. This code did not work,
2164 because it failed to account for some instructions which were
2165 both annulled and marked as from the target. This can happen as a
2166 result of optimize_skip. Since this code was redundant with
2167 fill_eager_delay_slots anyways, it was just deleted. */
2169 if (slots_filled != slots_to_fill
2170 /* If this instruction could throw an exception which is
2171 caught in the same function, then it's not safe to fill
2172 the delay slot with an instruction from beyond this
2173 point. For example, consider:
2175 int i = 2;
2177 try {
2178 f();
2179 i = 3;
2180 } catch (...) {}
2182 return i;
2184 Even though `i' is a local variable, we must be sure not
2185 to put `i = 3' in the delay slot if `f' might throw an
2186 exception.
2188 Presumably, we should also check to see if we could get
2189 back to this function via `setjmp'. */
2190 && ! can_throw_internal (insn)
2191 && !JUMP_P (insn))
2193 int maybe_never = 0;
2194 rtx pat, trial_delay;
2196 CLEAR_RESOURCE (&needed);
2197 CLEAR_RESOURCE (&set);
2198 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2199 mark_referenced_resources (insn, &needed, true);
2201 if (CALL_P (insn))
2202 maybe_never = 1;
2204 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2205 trial = next_trial)
2207 next_trial = next_nonnote_insn (trial);
2209 /* This must be an INSN or CALL_INSN. */
2210 pat = PATTERN (trial);
2212 /* Stand-alone USE and CLOBBER are just for flow. */
2213 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2214 continue;
2216 /* If this already has filled delay slots, get the insn needing
2217 the delay slots. */
2218 if (GET_CODE (pat) == SEQUENCE)
2219 trial_delay = XVECEXP (pat, 0, 0);
2220 else
2221 trial_delay = trial;
2223 /* Stop our search when seeing a jump. */
2224 if (JUMP_P (trial_delay))
2225 break;
2227 /* See if we have a resource problem before we try to split. */
2228 if (GET_CODE (pat) != SEQUENCE
2229 && ! insn_references_resource_p (trial, &set, true)
2230 && ! insn_sets_resource_p (trial, &set, true)
2231 && ! insn_sets_resource_p (trial, &needed, true)
2232 && (!HAVE_cc0 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2233 && ! (maybe_never && may_trap_or_fault_p (pat))
2234 && (trial = try_split (pat, trial, 0))
2235 && eligible_for_delay (insn, slots_filled, trial, flags)
2236 && ! can_throw_internal (trial))
2238 next_trial = next_nonnote_insn (trial);
2239 delay_list = add_to_delay_list (trial, delay_list);
2240 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2241 link_cc0_insns (trial);
2243 delete_related_insns (trial);
2244 if (slots_to_fill == ++slots_filled)
2245 break;
2246 continue;
2249 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2250 mark_referenced_resources (trial, &needed, true);
2252 /* Ensure we don't put insns between the setting of cc and the
2253 comparison by moving a setting of cc into an earlier delay
2254 slot since these insns could clobber the condition code. */
2255 set.cc = 1;
2257 /* If this is a call, we might not get here. */
2258 if (CALL_P (trial_delay))
2259 maybe_never = 1;
2262 /* If there are slots left to fill and our search was stopped by an
2263 unconditional branch, try the insn at the branch target. We can
2264 redirect the branch if it works.
2266 Don't do this if the insn at the branch target is a branch. */
2267 if (slots_to_fill != slots_filled
2268 && trial
2269 && jump_to_label_p (trial)
2270 && simplejump_p (trial)
2271 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2272 && ! (NONJUMP_INSN_P (next_trial)
2273 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2274 && !JUMP_P (next_trial)
2275 && ! insn_references_resource_p (next_trial, &set, true)
2276 && ! insn_sets_resource_p (next_trial, &set, true)
2277 && ! insn_sets_resource_p (next_trial, &needed, true)
2278 && (!HAVE_cc0 || ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial)))
2279 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2280 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2281 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2282 && ! can_throw_internal (trial))
2284 /* See comment in relax_delay_slots about necessity of using
2285 next_real_insn here. */
2286 rtx_insn *new_label = next_real_insn (next_trial);
2288 if (new_label != 0)
2289 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2290 else
2291 new_label = find_end_label (simple_return_rtx);
2293 if (new_label)
2295 delay_list
2296 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2297 delay_list);
2298 slots_filled++;
2299 reorg_redirect_jump (trial, new_label);
2304 /* If this is an unconditional jump, then try to get insns from the
2305 target of the jump. */
2306 if (JUMP_P (insn)
2307 && simplejump_p (insn)
2308 && slots_filled != slots_to_fill)
2309 delay_list
2310 = fill_slots_from_thread (insn, const_true_rtx,
2311 next_active_insn (JUMP_LABEL (insn)),
2312 NULL, 1, 1,
2313 own_thread_p (JUMP_LABEL (insn),
2314 JUMP_LABEL (insn), 0),
2315 slots_to_fill, &slots_filled,
2316 delay_list);
2318 if (delay_list)
2319 unfilled_slots_base[i]
2320 = emit_delay_sequence (insn, delay_list, slots_filled);
2322 if (slots_to_fill == slots_filled)
2323 unfilled_slots_base[i] = 0;
2325 note_delay_statistics (slots_filled, 0);
2329 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2330 return the ultimate label reached by any such chain of jumps.
2331 Return a suitable return rtx if the chain ultimately leads to a
2332 return instruction.
2333 If LABEL is not followed by a jump, return LABEL.
2334 If the chain loops or we can't find end, return LABEL,
2335 since that tells caller to avoid changing the insn.
2336 If the returned label is obtained by following a crossing jump,
2337 set *CROSSING to true, otherwise set it to false. */
2339 static rtx
2340 follow_jumps (rtx label, rtx_insn *jump, bool *crossing)
2342 rtx_insn *insn;
2343 rtx_insn *next;
2344 int depth;
2346 *crossing = false;
2347 if (ANY_RETURN_P (label))
2348 return label;
2350 rtx_insn *value = as_a <rtx_insn *> (label);
2352 for (depth = 0;
2353 (depth < 10
2354 && (insn = next_active_insn (value)) != 0
2355 && JUMP_P (insn)
2356 && JUMP_LABEL (insn) != NULL_RTX
2357 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2358 || ANY_RETURN_P (PATTERN (insn)))
2359 && (next = NEXT_INSN (insn))
2360 && BARRIER_P (next));
2361 depth++)
2363 rtx this_label_or_return = JUMP_LABEL (insn);
2365 /* If we have found a cycle, make the insn jump to itself. */
2366 if (this_label_or_return == label)
2367 return label;
2369 /* Cannot follow returns and cannot look through tablejumps. */
2370 if (ANY_RETURN_P (this_label_or_return))
2371 return this_label_or_return;
2373 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2374 if (NEXT_INSN (this_label)
2375 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2376 break;
2378 if (!targetm.can_follow_jump (jump, insn))
2379 break;
2380 if (!*crossing)
2381 *crossing = CROSSING_JUMP_P (jump);
2382 value = this_label;
2384 if (depth == 10)
2385 return label;
2386 return value;
2389 /* Try to find insns to place in delay slots.
2391 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2392 or is an unconditional branch if CONDITION is const_true_rtx.
2393 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2395 THREAD is a flow-of-control, either the insns to be executed if the
2396 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2398 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2399 to see if any potential delay slot insns set things needed there.
2401 LIKELY is nonzero if it is extremely likely that the branch will be
2402 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2403 end of a loop back up to the top.
2405 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2406 thread. I.e., it is the fallthrough code of our jump or the target of the
2407 jump when we are the only jump going there.
2409 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2410 case, we can only take insns from the head of the thread for our delay
2411 slot. We then adjust the jump to point after the insns we have taken. */
2413 static rtx_insn_list *
2414 fill_slots_from_thread (rtx_insn *insn, rtx condition, rtx thread_or_return,
2415 rtx opposite_thread, int likely,
2416 int thread_if_true,
2417 int own_thread, int slots_to_fill,
2418 int *pslots_filled, rtx_insn_list *delay_list)
2420 rtx new_thread;
2421 struct resources opposite_needed, set, needed;
2422 rtx_insn *trial;
2423 int lose = 0;
2424 int must_annul = 0;
2425 int flags;
2427 /* Validate our arguments. */
2428 gcc_assert (condition != const_true_rtx || thread_if_true);
2429 gcc_assert (own_thread || thread_if_true);
2431 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2433 /* If our thread is the end of subroutine, we can't get any delay
2434 insns from that. */
2435 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2436 return delay_list;
2438 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2440 /* If this is an unconditional branch, nothing is needed at the
2441 opposite thread. Otherwise, compute what is needed there. */
2442 if (condition == const_true_rtx)
2443 CLEAR_RESOURCE (&opposite_needed);
2444 else
2445 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2447 /* If the insn at THREAD can be split, do it here to avoid having to
2448 update THREAD and NEW_THREAD if it is done in the loop below. Also
2449 initialize NEW_THREAD. */
2451 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2453 /* Scan insns at THREAD. We are looking for an insn that can be removed
2454 from THREAD (it neither sets nor references resources that were set
2455 ahead of it and it doesn't set anything needs by the insns ahead of
2456 it) and that either can be placed in an annulling insn or aren't
2457 needed at OPPOSITE_THREAD. */
2459 CLEAR_RESOURCE (&needed);
2460 CLEAR_RESOURCE (&set);
2462 /* If we do not own this thread, we must stop as soon as we find
2463 something that we can't put in a delay slot, since all we can do
2464 is branch into THREAD at a later point. Therefore, labels stop
2465 the search if this is not the `true' thread. */
2467 for (trial = thread;
2468 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2469 trial = next_nonnote_insn (trial))
2471 rtx pat, old_trial;
2473 /* If we have passed a label, we no longer own this thread. */
2474 if (LABEL_P (trial))
2476 own_thread = 0;
2477 continue;
2480 pat = PATTERN (trial);
2481 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2482 continue;
2484 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2485 don't separate or copy insns that set and use CC0. */
2486 if (! insn_references_resource_p (trial, &set, true)
2487 && ! insn_sets_resource_p (trial, &set, true)
2488 && ! insn_sets_resource_p (trial, &needed, true)
2489 && (!HAVE_cc0 || (! (reg_mentioned_p (cc0_rtx, pat)
2490 && (! own_thread || ! sets_cc0_p (pat)))))
2491 && ! can_throw_internal (trial))
2493 rtx prior_insn;
2495 /* If TRIAL is redundant with some insn before INSN, we don't
2496 actually need to add it to the delay list; we can merely pretend
2497 we did. */
2498 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2500 fix_reg_dead_note (prior_insn, insn);
2501 if (own_thread)
2503 update_block (trial, thread);
2504 if (trial == thread)
2506 thread = next_active_insn (thread);
2507 if (new_thread == trial)
2508 new_thread = thread;
2511 delete_related_insns (trial);
2513 else
2515 update_reg_unused_notes (prior_insn, trial);
2516 new_thread = next_active_insn (trial);
2519 continue;
2522 /* There are two ways we can win: If TRIAL doesn't set anything
2523 needed at the opposite thread and can't trap, or if it can
2524 go into an annulled delay slot. But we want neither to copy
2525 nor to speculate frame-related insns. */
2526 if (!must_annul
2527 && ((condition == const_true_rtx
2528 && (own_thread || !RTX_FRAME_RELATED_P (trial)))
2529 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2530 && ! may_trap_or_fault_p (pat)
2531 && ! RTX_FRAME_RELATED_P (trial))))
2533 old_trial = trial;
2534 trial = try_split (pat, trial, 0);
2535 if (new_thread == old_trial)
2536 new_thread = trial;
2537 if (thread == old_trial)
2538 thread = trial;
2539 pat = PATTERN (trial);
2540 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2541 goto winner;
2543 else if (0
2544 #ifdef ANNUL_IFTRUE_SLOTS
2545 || ! thread_if_true
2546 #endif
2547 #ifdef ANNUL_IFFALSE_SLOTS
2548 || thread_if_true
2549 #endif
2552 old_trial = trial;
2553 trial = try_split (pat, trial, 0);
2554 if (new_thread == old_trial)
2555 new_thread = trial;
2556 if (thread == old_trial)
2557 thread = trial;
2558 pat = PATTERN (trial);
2559 if ((must_annul || delay_list == NULL) && (thread_if_true
2560 ? check_annul_list_true_false (0, delay_list)
2561 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2562 : check_annul_list_true_false (1, delay_list)
2563 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2565 rtx_insn *temp;
2567 must_annul = 1;
2568 winner:
2570 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2571 link_cc0_insns (trial);
2573 /* If we own this thread, delete the insn. If this is the
2574 destination of a branch, show that a basic block status
2575 may have been updated. In any case, mark the new
2576 starting point of this thread. */
2577 if (own_thread)
2579 rtx note;
2581 update_block (trial, thread);
2582 if (trial == thread)
2584 thread = next_active_insn (thread);
2585 if (new_thread == trial)
2586 new_thread = thread;
2589 /* We are moving this insn, not deleting it. We must
2590 temporarily increment the use count on any referenced
2591 label lest it be deleted by delete_related_insns. */
2592 for (note = REG_NOTES (trial);
2593 note != NULL_RTX;
2594 note = XEXP (note, 1))
2595 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2596 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2598 /* REG_LABEL_OPERAND could be
2599 NOTE_INSN_DELETED_LABEL too. */
2600 if (LABEL_P (XEXP (note, 0)))
2601 LABEL_NUSES (XEXP (note, 0))++;
2602 else
2603 gcc_assert (REG_NOTE_KIND (note)
2604 == REG_LABEL_OPERAND);
2606 if (jump_to_label_p (trial))
2607 LABEL_NUSES (JUMP_LABEL (trial))++;
2609 delete_related_insns (trial);
2611 for (note = REG_NOTES (trial);
2612 note != NULL_RTX;
2613 note = XEXP (note, 1))
2614 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2615 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2617 /* REG_LABEL_OPERAND could be
2618 NOTE_INSN_DELETED_LABEL too. */
2619 if (LABEL_P (XEXP (note, 0)))
2620 LABEL_NUSES (XEXP (note, 0))--;
2621 else
2622 gcc_assert (REG_NOTE_KIND (note)
2623 == REG_LABEL_OPERAND);
2625 if (jump_to_label_p (trial))
2626 LABEL_NUSES (JUMP_LABEL (trial))--;
2628 else
2629 new_thread = next_active_insn (trial);
2631 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2632 if (thread_if_true)
2633 INSN_FROM_TARGET_P (temp) = 1;
2635 delay_list = add_to_delay_list (temp, delay_list);
2637 if (slots_to_fill == ++(*pslots_filled))
2639 /* Even though we have filled all the slots, we
2640 may be branching to a location that has a
2641 redundant insn. Skip any if so. */
2642 while (new_thread && ! own_thread
2643 && ! insn_sets_resource_p (new_thread, &set, true)
2644 && ! insn_sets_resource_p (new_thread, &needed,
2645 true)
2646 && ! insn_references_resource_p (new_thread,
2647 &set, true)
2648 && (prior_insn
2649 = redundant_insn (new_thread, insn,
2650 delay_list)))
2652 /* We know we do not own the thread, so no need
2653 to call update_block and delete_insn. */
2654 fix_reg_dead_note (prior_insn, insn);
2655 update_reg_unused_notes (prior_insn, new_thread);
2656 new_thread = next_active_insn (new_thread);
2658 break;
2661 continue;
2666 /* This insn can't go into a delay slot. */
2667 lose = 1;
2668 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2669 mark_referenced_resources (trial, &needed, true);
2671 /* Ensure we don't put insns between the setting of cc and the comparison
2672 by moving a setting of cc into an earlier delay slot since these insns
2673 could clobber the condition code. */
2674 set.cc = 1;
2676 /* If this insn is a register-register copy and the next insn has
2677 a use of our destination, change it to use our source. That way,
2678 it will become a candidate for our delay slot the next time
2679 through this loop. This case occurs commonly in loops that
2680 scan a list.
2682 We could check for more complex cases than those tested below,
2683 but it doesn't seem worth it. It might also be a good idea to try
2684 to swap the two insns. That might do better.
2686 We can't do this if the next insn modifies our destination, because
2687 that would make the replacement into the insn invalid. We also can't
2688 do this if it modifies our source, because it might be an earlyclobber
2689 operand. This latter test also prevents updating the contents of
2690 a PRE_INC. We also can't do this if there's overlap of source and
2691 destination. Overlap may happen for larger-than-register-size modes. */
2693 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2694 && REG_P (SET_SRC (pat))
2695 && REG_P (SET_DEST (pat))
2696 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2698 rtx_insn *next = next_nonnote_insn (trial);
2700 if (next && NONJUMP_INSN_P (next)
2701 && GET_CODE (PATTERN (next)) != USE
2702 && ! reg_set_p (SET_DEST (pat), next)
2703 && ! reg_set_p (SET_SRC (pat), next)
2704 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2705 && ! modified_in_p (SET_DEST (pat), next))
2706 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2710 /* If we stopped on a branch insn that has delay slots, see if we can
2711 steal some of the insns in those slots. */
2712 if (trial && NONJUMP_INSN_P (trial)
2713 && GET_CODE (PATTERN (trial)) == SEQUENCE
2714 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2716 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2717 /* If this is the `true' thread, we will want to follow the jump,
2718 so we can only do this if we have taken everything up to here. */
2719 if (thread_if_true && trial == new_thread)
2721 delay_list
2722 = steal_delay_list_from_target (insn, condition, sequence,
2723 delay_list, &set, &needed,
2724 &opposite_needed, slots_to_fill,
2725 pslots_filled, &must_annul,
2726 &new_thread);
2727 /* If we owned the thread and are told that it branched
2728 elsewhere, make sure we own the thread at the new location. */
2729 if (own_thread && trial != new_thread)
2730 own_thread = own_thread_p (new_thread, new_thread, 0);
2732 else if (! thread_if_true)
2733 delay_list
2734 = steal_delay_list_from_fallthrough (insn, condition,
2735 sequence,
2736 delay_list, &set, &needed,
2737 &opposite_needed, slots_to_fill,
2738 pslots_filled, &must_annul);
2741 /* If we haven't found anything for this delay slot and it is very
2742 likely that the branch will be taken, see if the insn at our target
2743 increments or decrements a register with an increment that does not
2744 depend on the destination register. If so, try to place the opposite
2745 arithmetic insn after the jump insn and put the arithmetic insn in the
2746 delay slot. If we can't do this, return. */
2747 if (delay_list == 0 && likely
2748 && new_thread && !ANY_RETURN_P (new_thread)
2749 && NONJUMP_INSN_P (new_thread)
2750 && !RTX_FRAME_RELATED_P (new_thread)
2751 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2752 && asm_noperands (PATTERN (new_thread)) < 0)
2754 rtx pat = PATTERN (new_thread);
2755 rtx dest;
2756 rtx src;
2758 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2759 above. */
2760 trial = as_a <rtx_insn *> (new_thread);
2761 pat = PATTERN (trial);
2763 if (!NONJUMP_INSN_P (trial)
2764 || GET_CODE (pat) != SET
2765 || ! eligible_for_delay (insn, 0, trial, flags)
2766 || can_throw_internal (trial))
2767 return 0;
2769 dest = SET_DEST (pat), src = SET_SRC (pat);
2770 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2771 && rtx_equal_p (XEXP (src, 0), dest)
2772 && (!FLOAT_MODE_P (GET_MODE (src))
2773 || flag_unsafe_math_optimizations)
2774 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2775 && ! side_effects_p (pat))
2777 rtx other = XEXP (src, 1);
2778 rtx new_arith;
2779 rtx_insn *ninsn;
2781 /* If this is a constant adjustment, use the same code with
2782 the negated constant. Otherwise, reverse the sense of the
2783 arithmetic. */
2784 if (CONST_INT_P (other))
2785 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2786 negate_rtx (GET_MODE (src), other));
2787 else
2788 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2789 GET_MODE (src), dest, other);
2791 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2792 insn);
2794 if (recog_memoized (ninsn) < 0
2795 || (extract_insn (ninsn),
2796 !constrain_operands (1, get_preferred_alternatives (ninsn))))
2798 delete_related_insns (ninsn);
2799 return 0;
2802 if (own_thread)
2804 update_block (trial, thread);
2805 if (trial == thread)
2807 thread = next_active_insn (thread);
2808 if (new_thread == trial)
2809 new_thread = thread;
2811 delete_related_insns (trial);
2813 else
2814 new_thread = next_active_insn (trial);
2816 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2817 if (thread_if_true)
2818 INSN_FROM_TARGET_P (ninsn) = 1;
2820 delay_list = add_to_delay_list (ninsn, NULL);
2821 (*pslots_filled)++;
2825 if (delay_list && must_annul)
2826 INSN_ANNULLED_BRANCH_P (insn) = 1;
2828 /* If we are to branch into the middle of this thread, find an appropriate
2829 label or make a new one if none, and redirect INSN to it. If we hit the
2830 end of the function, use the end-of-function label. */
2831 if (new_thread != thread)
2833 rtx label;
2834 bool crossing = false;
2836 gcc_assert (thread_if_true);
2838 if (new_thread && simplejump_or_return_p (new_thread)
2839 && redirect_with_delay_list_safe_p (insn,
2840 JUMP_LABEL (new_thread),
2841 delay_list))
2842 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2843 &crossing);
2845 if (ANY_RETURN_P (new_thread))
2846 label = find_end_label (new_thread);
2847 else if (LABEL_P (new_thread))
2848 label = new_thread;
2849 else
2850 label = get_label_before (as_a <rtx_insn *> (new_thread),
2851 JUMP_LABEL (insn));
2853 if (label)
2855 reorg_redirect_jump (insn, label);
2856 if (crossing)
2857 CROSSING_JUMP_P (insn) = 1;
2861 return delay_list;
2864 /* Make another attempt to find insns to place in delay slots.
2866 We previously looked for insns located in front of the delay insn
2867 and, for non-jump delay insns, located behind the delay insn.
2869 Here only try to schedule jump insns and try to move insns from either
2870 the target or the following insns into the delay slot. If annulling is
2871 supported, we will be likely to do this. Otherwise, we can do this only
2872 if safe. */
2874 static void
2875 fill_eager_delay_slots (void)
2877 rtx_insn *insn;
2878 int i;
2879 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2881 for (i = 0; i < num_unfilled_slots; i++)
2883 rtx condition;
2884 rtx target_label, insn_at_target;
2885 rtx_insn *fallthrough_insn;
2886 rtx_insn_list *delay_list = 0;
2887 int own_target;
2888 int own_fallthrough;
2889 int prediction, slots_to_fill, slots_filled;
2891 insn = unfilled_slots_base[i];
2892 if (insn == 0
2893 || insn->deleted ()
2894 || !JUMP_P (insn)
2895 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2896 continue;
2898 slots_to_fill = num_delay_slots (insn);
2899 /* Some machine description have defined instructions to have
2900 delay slots only in certain circumstances which may depend on
2901 nearby insns (which change due to reorg's actions).
2903 For example, the PA port normally has delay slots for unconditional
2904 jumps.
2906 However, the PA port claims such jumps do not have a delay slot
2907 if they are immediate successors of certain CALL_INSNs. This
2908 allows the port to favor filling the delay slot of the call with
2909 the unconditional jump. */
2910 if (slots_to_fill == 0)
2911 continue;
2913 slots_filled = 0;
2914 target_label = JUMP_LABEL (insn);
2915 condition = get_branch_condition (insn, target_label);
2917 if (condition == 0)
2918 continue;
2920 /* Get the next active fallthrough and target insns and see if we own
2921 them. Then see whether the branch is likely true. We don't need
2922 to do a lot of this for unconditional branches. */
2924 insn_at_target = first_active_target_insn (target_label);
2925 own_target = own_thread_p (target_label, target_label, 0);
2927 if (condition == const_true_rtx)
2929 own_fallthrough = 0;
2930 fallthrough_insn = 0;
2931 prediction = 2;
2933 else
2935 fallthrough_insn = next_active_insn (insn);
2936 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2937 prediction = mostly_true_jump (insn);
2940 /* If this insn is expected to branch, first try to get insns from our
2941 target, then our fallthrough insns. If it is not expected to branch,
2942 try the other order. */
2944 if (prediction > 0)
2946 delay_list
2947 = fill_slots_from_thread (insn, condition, insn_at_target,
2948 fallthrough_insn, prediction == 2, 1,
2949 own_target,
2950 slots_to_fill, &slots_filled, delay_list);
2952 if (delay_list == 0 && own_fallthrough)
2954 /* Even though we didn't find anything for delay slots,
2955 we might have found a redundant insn which we deleted
2956 from the thread that was filled. So we have to recompute
2957 the next insn at the target. */
2958 target_label = JUMP_LABEL (insn);
2959 insn_at_target = first_active_target_insn (target_label);
2961 delay_list
2962 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2963 insn_at_target, 0, 0,
2964 own_fallthrough,
2965 slots_to_fill, &slots_filled,
2966 delay_list);
2969 else
2971 if (own_fallthrough)
2972 delay_list
2973 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2974 insn_at_target, 0, 0,
2975 own_fallthrough,
2976 slots_to_fill, &slots_filled,
2977 delay_list);
2979 if (delay_list == 0)
2980 delay_list
2981 = fill_slots_from_thread (insn, condition, insn_at_target,
2982 next_active_insn (insn), 0, 1,
2983 own_target,
2984 slots_to_fill, &slots_filled,
2985 delay_list);
2988 if (delay_list)
2989 unfilled_slots_base[i]
2990 = emit_delay_sequence (insn, delay_list, slots_filled);
2992 if (slots_to_fill == slots_filled)
2993 unfilled_slots_base[i] = 0;
2995 note_delay_statistics (slots_filled, 1);
2999 static void delete_computation (rtx insn);
3001 /* Recursively delete prior insns that compute the value (used only by INSN
3002 which the caller is deleting) stored in the register mentioned by NOTE
3003 which is a REG_DEAD note associated with INSN. */
3005 static void
3006 delete_prior_computation (rtx note, rtx insn)
3008 rtx our_prev;
3009 rtx reg = XEXP (note, 0);
3011 for (our_prev = prev_nonnote_insn (insn);
3012 our_prev && (NONJUMP_INSN_P (our_prev)
3013 || CALL_P (our_prev));
3014 our_prev = prev_nonnote_insn (our_prev))
3016 rtx pat = PATTERN (our_prev);
3018 /* If we reach a CALL which is not calling a const function
3019 or the callee pops the arguments, then give up. */
3020 if (CALL_P (our_prev)
3021 && (! RTL_CONST_CALL_P (our_prev)
3022 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
3023 break;
3025 /* If we reach a SEQUENCE, it is too complex to try to
3026 do anything with it, so give up. We can be run during
3027 and after reorg, so SEQUENCE rtl can legitimately show
3028 up here. */
3029 if (GET_CODE (pat) == SEQUENCE)
3030 break;
3032 if (GET_CODE (pat) == USE
3033 && NONJUMP_INSN_P (XEXP (pat, 0)))
3034 /* reorg creates USEs that look like this. We leave them
3035 alone because reorg needs them for its own purposes. */
3036 break;
3038 if (reg_set_p (reg, pat))
3040 if (side_effects_p (pat) && !CALL_P (our_prev))
3041 break;
3043 if (GET_CODE (pat) == PARALLEL)
3045 /* If we find a SET of something else, we can't
3046 delete the insn. */
3048 int i;
3050 for (i = 0; i < XVECLEN (pat, 0); i++)
3052 rtx part = XVECEXP (pat, 0, i);
3054 if (GET_CODE (part) == SET
3055 && SET_DEST (part) != reg)
3056 break;
3059 if (i == XVECLEN (pat, 0))
3060 delete_computation (our_prev);
3062 else if (GET_CODE (pat) == SET
3063 && REG_P (SET_DEST (pat)))
3065 int dest_regno = REGNO (SET_DEST (pat));
3066 int dest_endregno = END_REGNO (SET_DEST (pat));
3067 int regno = REGNO (reg);
3068 int endregno = END_REGNO (reg);
3070 if (dest_regno >= regno
3071 && dest_endregno <= endregno)
3072 delete_computation (our_prev);
3074 /* We may have a multi-word hard register and some, but not
3075 all, of the words of the register are needed in subsequent
3076 insns. Write REG_UNUSED notes for those parts that were not
3077 needed. */
3078 else if (dest_regno <= regno
3079 && dest_endregno >= endregno)
3081 int i;
3083 add_reg_note (our_prev, REG_UNUSED, reg);
3085 for (i = dest_regno; i < dest_endregno; i++)
3086 if (! find_regno_note (our_prev, REG_UNUSED, i))
3087 break;
3089 if (i == dest_endregno)
3090 delete_computation (our_prev);
3094 break;
3097 /* If PAT references the register that dies here, it is an
3098 additional use. Hence any prior SET isn't dead. However, this
3099 insn becomes the new place for the REG_DEAD note. */
3100 if (reg_overlap_mentioned_p (reg, pat))
3102 XEXP (note, 1) = REG_NOTES (our_prev);
3103 REG_NOTES (our_prev) = note;
3104 break;
3109 /* Delete INSN and recursively delete insns that compute values used only
3110 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3112 Look at all our REG_DEAD notes. If a previous insn does nothing other
3113 than set a register that dies in this insn, we can delete that insn
3114 as well.
3116 On machines with CC0, if CC0 is used in this insn, we may be able to
3117 delete the insn that set it. */
3119 static void
3120 delete_computation (rtx insn)
3122 rtx note, next;
3124 if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
3126 rtx_insn *prev = prev_nonnote_insn (insn);
3127 /* We assume that at this stage
3128 CC's are always set explicitly
3129 and always immediately before the jump that
3130 will use them. So if the previous insn
3131 exists to set the CC's, delete it
3132 (unless it performs auto-increments, etc.). */
3133 if (prev && NONJUMP_INSN_P (prev)
3134 && sets_cc0_p (PATTERN (prev)))
3136 if (sets_cc0_p (PATTERN (prev)) > 0
3137 && ! side_effects_p (PATTERN (prev)))
3138 delete_computation (prev);
3139 else
3140 /* Otherwise, show that cc0 won't be used. */
3141 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3145 for (note = REG_NOTES (insn); note; note = next)
3147 next = XEXP (note, 1);
3149 if (REG_NOTE_KIND (note) != REG_DEAD
3150 /* Verify that the REG_NOTE is legitimate. */
3151 || !REG_P (XEXP (note, 0)))
3152 continue;
3154 delete_prior_computation (note, insn);
3157 delete_related_insns (insn);
3160 /* If all INSN does is set the pc, delete it,
3161 and delete the insn that set the condition codes for it
3162 if that's what the previous thing was. */
3164 static void
3165 delete_jump (rtx_insn *insn)
3167 rtx set = single_set (insn);
3169 if (set && GET_CODE (SET_DEST (set)) == PC)
3170 delete_computation (insn);
3173 static rtx_insn *
3174 label_before_next_insn (rtx x, rtx scan_limit)
3176 rtx_insn *insn = next_active_insn (x);
3177 while (insn)
3179 insn = PREV_INSN (insn);
3180 if (insn == scan_limit || insn == NULL_RTX)
3181 return NULL;
3182 if (LABEL_P (insn))
3183 break;
3185 return insn;
3188 /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between
3189 BEG and END. */
3191 static bool
3192 switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end)
3194 const rtx_insn *p;
3195 for (p = beg; p != end; p = NEXT_INSN (p))
3196 if (NOTE_P (p) && NOTE_KIND (p) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
3197 return true;
3198 return false;
3202 /* Once we have tried two ways to fill a delay slot, make a pass over the
3203 code to try to improve the results and to do such things as more jump
3204 threading. */
3206 static void
3207 relax_delay_slots (rtx_insn *first)
3209 rtx_insn *insn, *next;
3210 rtx_sequence *pat;
3211 rtx trial;
3212 rtx_insn *delay_insn;
3213 rtx target_label;
3215 /* Look at every JUMP_INSN and see if we can improve it. */
3216 for (insn = first; insn; insn = next)
3218 rtx_insn *other;
3219 bool crossing;
3221 next = next_active_insn (insn);
3223 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3224 the next insn, or jumps to a label that is not the last of a
3225 group of consecutive labels. */
3226 if (JUMP_P (insn)
3227 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3228 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3230 target_label
3231 = skip_consecutive_labels (follow_jumps (target_label, insn,
3232 &crossing));
3233 if (ANY_RETURN_P (target_label))
3234 target_label = find_end_label (target_label);
3236 if (target_label && next_active_insn (target_label) == next
3237 && ! condjump_in_parallel_p (insn)
3238 && ! (next && switch_text_sections_between_p (insn, next)))
3240 delete_jump (insn);
3241 continue;
3244 if (target_label && target_label != JUMP_LABEL (insn))
3246 reorg_redirect_jump (insn, target_label);
3247 if (crossing)
3248 CROSSING_JUMP_P (insn) = 1;
3251 /* See if this jump conditionally branches around an unconditional
3252 jump. If so, invert this jump and point it to the target of the
3253 second jump. Check if it's possible on the target. */
3254 if (next && simplejump_or_return_p (next)
3255 && any_condjump_p (insn)
3256 && target_label
3257 && next_active_insn (target_label) == next_active_insn (next)
3258 && no_labels_between_p (insn, next)
3259 && targetm.can_follow_jump (insn, next))
3261 rtx label = JUMP_LABEL (next);
3263 /* Be careful how we do this to avoid deleting code or
3264 labels that are momentarily dead. See similar optimization
3265 in jump.c.
3267 We also need to ensure we properly handle the case when
3268 invert_jump fails. */
3270 ++LABEL_NUSES (target_label);
3271 if (!ANY_RETURN_P (label))
3272 ++LABEL_NUSES (label);
3274 if (invert_jump (insn, label, 1))
3276 delete_related_insns (next);
3277 next = insn;
3280 if (!ANY_RETURN_P (label))
3281 --LABEL_NUSES (label);
3283 if (--LABEL_NUSES (target_label) == 0)
3284 delete_related_insns (target_label);
3286 continue;
3290 /* If this is an unconditional jump and the previous insn is a
3291 conditional jump, try reversing the condition of the previous
3292 insn and swapping our targets. The next pass might be able to
3293 fill the slots.
3295 Don't do this if we expect the conditional branch to be true, because
3296 we would then be making the more common case longer. */
3298 if (simplejump_or_return_p (insn)
3299 && (other = prev_active_insn (insn)) != 0
3300 && any_condjump_p (other)
3301 && no_labels_between_p (other, insn)
3302 && 0 > mostly_true_jump (other))
3304 rtx other_target = JUMP_LABEL (other);
3305 target_label = JUMP_LABEL (insn);
3307 if (invert_jump (other, target_label, 0))
3308 reorg_redirect_jump (insn, other_target);
3311 /* Now look only at cases where we have a filled delay slot. */
3312 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3313 continue;
3315 pat = as_a <rtx_sequence *> (PATTERN (insn));
3316 delay_insn = pat->insn (0);
3318 /* See if the first insn in the delay slot is redundant with some
3319 previous insn. Remove it from the delay slot if so; then set up
3320 to reprocess this insn. */
3321 if (redundant_insn (pat->insn (1), delay_insn, 0))
3323 update_block (pat->insn (1), insn);
3324 delete_from_delay_slot (pat->insn (1));
3325 next = prev_active_insn (next);
3326 continue;
3329 /* See if we have a RETURN insn with a filled delay slot followed
3330 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3331 the first RETURN (but not its delay insn). This gives the same
3332 effect in fewer instructions.
3334 Only do so if optimizing for size since this results in slower, but
3335 smaller code. */
3336 if (optimize_function_for_size_p (cfun)
3337 && ANY_RETURN_P (PATTERN (delay_insn))
3338 && next
3339 && JUMP_P (next)
3340 && PATTERN (next) == PATTERN (delay_insn))
3342 rtx_insn *after;
3343 int i;
3345 /* Delete the RETURN and just execute the delay list insns.
3347 We do this by deleting the INSN containing the SEQUENCE, then
3348 re-emitting the insns separately, and then deleting the RETURN.
3349 This allows the count of the jump target to be properly
3350 decremented.
3352 Note that we need to change the INSN_UID of the re-emitted insns
3353 since it is used to hash the insns for mark_target_live_regs and
3354 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3356 Clear the from target bit, since these insns are no longer
3357 in delay slots. */
3358 for (i = 0; i < XVECLEN (pat, 0); i++)
3359 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3361 trial = PREV_INSN (insn);
3362 delete_related_insns (insn);
3363 gcc_assert (GET_CODE (pat) == SEQUENCE);
3364 add_insn_after (delay_insn, trial, NULL);
3365 after = delay_insn;
3366 for (i = 1; i < pat->len (); i++)
3367 after = emit_copy_of_insn_after (pat->insn (i), after);
3368 delete_scheduled_jump (delay_insn);
3369 continue;
3372 /* Now look only at the cases where we have a filled JUMP_INSN. */
3373 if (!JUMP_P (delay_insn)
3374 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3375 continue;
3377 target_label = JUMP_LABEL (delay_insn);
3378 if (target_label && ANY_RETURN_P (target_label))
3379 continue;
3381 /* If this jump goes to another unconditional jump, thread it, but
3382 don't convert a jump into a RETURN here. */
3383 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3384 &crossing));
3385 if (ANY_RETURN_P (trial))
3386 trial = find_end_label (trial);
3388 if (trial && trial != target_label
3389 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3391 reorg_redirect_jump (delay_insn, trial);
3392 target_label = trial;
3393 if (crossing)
3394 CROSSING_JUMP_P (insn) = 1;
3397 /* If the first insn at TARGET_LABEL is redundant with a previous
3398 insn, redirect the jump to the following insn and process again.
3399 We use next_real_insn instead of next_active_insn so we
3400 don't skip USE-markers, or we'll end up with incorrect
3401 liveness info. */
3402 trial = next_real_insn (target_label);
3403 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3404 && redundant_insn (trial, insn, 0)
3405 && ! can_throw_internal (trial))
3407 /* Figure out where to emit the special USE insn so we don't
3408 later incorrectly compute register live/death info. */
3409 rtx_insn *tmp = next_active_insn (trial);
3410 if (tmp == 0)
3411 tmp = find_end_label (simple_return_rtx);
3413 if (tmp)
3415 /* Insert the special USE insn and update dataflow info.
3416 We know "trial" is an insn here as it is the output of
3417 next_real_insn () above. */
3418 update_block (as_a <rtx_insn *> (trial), tmp);
3420 /* Now emit a label before the special USE insn, and
3421 redirect our jump to the new label. */
3422 target_label = get_label_before (PREV_INSN (tmp), target_label);
3423 reorg_redirect_jump (delay_insn, target_label);
3424 next = insn;
3425 continue;
3429 /* Similarly, if it is an unconditional jump with one insn in its
3430 delay list and that insn is redundant, thread the jump. */
3431 rtx_sequence *trial_seq =
3432 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3433 if (trial_seq
3434 && trial_seq->len () == 2
3435 && JUMP_P (trial_seq->insn (0))
3436 && simplejump_or_return_p (trial_seq->insn (0))
3437 && redundant_insn (trial_seq->insn (1), insn, 0))
3439 target_label = JUMP_LABEL (trial_seq->insn (0));
3440 if (ANY_RETURN_P (target_label))
3441 target_label = find_end_label (target_label);
3443 if (target_label
3444 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3445 insn))
3447 update_block (trial_seq->insn (1), insn);
3448 reorg_redirect_jump (delay_insn, target_label);
3449 next = insn;
3450 continue;
3454 /* See if we have a simple (conditional) jump that is useless. */
3455 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3456 && ! condjump_in_parallel_p (delay_insn)
3457 && prev_active_insn (target_label) == insn
3458 && ! BARRIER_P (prev_nonnote_insn (target_label))
3459 #if HAVE_cc0
3460 /* If the last insn in the delay slot sets CC0 for some insn,
3461 various code assumes that it is in a delay slot. We could
3462 put it back where it belonged and delete the register notes,
3463 but it doesn't seem worthwhile in this uncommon case. */
3464 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3465 REG_CC_USER, NULL_RTX)
3466 #endif
3469 rtx_insn *after;
3470 int i;
3472 /* All this insn does is execute its delay list and jump to the
3473 following insn. So delete the jump and just execute the delay
3474 list insns.
3476 We do this by deleting the INSN containing the SEQUENCE, then
3477 re-emitting the insns separately, and then deleting the jump.
3478 This allows the count of the jump target to be properly
3479 decremented.
3481 Note that we need to change the INSN_UID of the re-emitted insns
3482 since it is used to hash the insns for mark_target_live_regs and
3483 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3485 Clear the from target bit, since these insns are no longer
3486 in delay slots. */
3487 for (i = 0; i < XVECLEN (pat, 0); i++)
3488 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3490 trial = PREV_INSN (insn);
3491 delete_related_insns (insn);
3492 gcc_assert (GET_CODE (pat) == SEQUENCE);
3493 add_insn_after (delay_insn, trial, NULL);
3494 after = delay_insn;
3495 for (i = 1; i < pat->len (); i++)
3496 after = emit_copy_of_insn_after (pat->insn (i), after);
3497 delete_scheduled_jump (delay_insn);
3498 continue;
3501 /* See if this is an unconditional jump around a single insn which is
3502 identical to the one in its delay slot. In this case, we can just
3503 delete the branch and the insn in its delay slot. */
3504 if (next && NONJUMP_INSN_P (next)
3505 && label_before_next_insn (next, insn) == target_label
3506 && simplejump_p (insn)
3507 && XVECLEN (pat, 0) == 2
3508 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3510 delete_related_insns (insn);
3511 continue;
3514 /* See if this jump (with its delay slots) conditionally branches
3515 around an unconditional jump (without delay slots). If so, invert
3516 this jump and point it to the target of the second jump. We cannot
3517 do this for annulled jumps, though. Again, don't convert a jump to
3518 a RETURN here. */
3519 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3520 && any_condjump_p (delay_insn)
3521 && next && simplejump_or_return_p (next)
3522 && next_active_insn (target_label) == next_active_insn (next)
3523 && no_labels_between_p (insn, next))
3525 rtx label = JUMP_LABEL (next);
3526 rtx old_label = JUMP_LABEL (delay_insn);
3528 if (ANY_RETURN_P (label))
3529 label = find_end_label (label);
3531 /* find_end_label can generate a new label. Check this first. */
3532 if (label
3533 && no_labels_between_p (insn, next)
3534 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3536 /* Be careful how we do this to avoid deleting code or labels
3537 that are momentarily dead. See similar optimization in
3538 jump.c */
3539 if (old_label)
3540 ++LABEL_NUSES (old_label);
3542 if (invert_jump (delay_insn, label, 1))
3544 int i;
3546 /* Must update the INSN_FROM_TARGET_P bits now that
3547 the branch is reversed, so that mark_target_live_regs
3548 will handle the delay slot insn correctly. */
3549 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3551 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3552 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3555 delete_related_insns (next);
3556 next = insn;
3559 if (old_label && --LABEL_NUSES (old_label) == 0)
3560 delete_related_insns (old_label);
3561 continue;
3565 /* If we own the thread opposite the way this insn branches, see if we
3566 can merge its delay slots with following insns. */
3567 if (INSN_FROM_TARGET_P (pat->insn (1))
3568 && own_thread_p (NEXT_INSN (insn), 0, 1))
3569 try_merge_delay_insns (insn, next);
3570 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3571 && own_thread_p (target_label, target_label, 0))
3572 try_merge_delay_insns (insn, next_active_insn (target_label));
3574 /* If we get here, we haven't deleted INSN. But we may have deleted
3575 NEXT, so recompute it. */
3576 next = next_active_insn (insn);
3581 /* Look for filled jumps to the end of function label. We can try to convert
3582 them into RETURN insns if the insns in the delay slot are valid for the
3583 RETURN as well. */
3585 static void
3586 make_return_insns (rtx_insn *first)
3588 rtx_insn *insn;
3589 rtx_insn *jump_insn;
3590 rtx real_return_label = function_return_label;
3591 rtx real_simple_return_label = function_simple_return_label;
3592 int slots, i;
3594 /* See if there is a RETURN insn in the function other than the one we
3595 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3596 into a RETURN to jump to it. */
3597 for (insn = first; insn; insn = NEXT_INSN (insn))
3598 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3600 rtx t = get_label_before (insn, NULL_RTX);
3601 if (PATTERN (insn) == ret_rtx)
3602 real_return_label = t;
3603 else
3604 real_simple_return_label = t;
3605 break;
3608 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3609 was equal to END_OF_FUNCTION_LABEL. */
3610 if (real_return_label)
3611 LABEL_NUSES (real_return_label)++;
3612 if (real_simple_return_label)
3613 LABEL_NUSES (real_simple_return_label)++;
3615 /* Clear the list of insns to fill so we can use it. */
3616 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3618 for (insn = first; insn; insn = NEXT_INSN (insn))
3620 int flags;
3621 rtx kind, real_label;
3623 /* Only look at filled JUMP_INSNs that go to the end of function
3624 label. */
3625 if (!NONJUMP_INSN_P (insn))
3626 continue;
3628 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3629 continue;
3631 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3633 if (!jump_to_label_p (pat->insn (0)))
3634 continue;
3636 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3638 kind = ret_rtx;
3639 real_label = real_return_label;
3641 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3643 kind = simple_return_rtx;
3644 real_label = real_simple_return_label;
3646 else
3647 continue;
3649 jump_insn = pat->insn (0);
3651 /* If we can't make the jump into a RETURN, try to redirect it to the best
3652 RETURN and go on to the next insn. */
3653 if (!reorg_redirect_jump (jump_insn, kind))
3655 /* Make sure redirecting the jump will not invalidate the delay
3656 slot insns. */
3657 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3658 reorg_redirect_jump (jump_insn, real_label);
3659 continue;
3662 /* See if this RETURN can accept the insns current in its delay slot.
3663 It can if it has more or an equal number of slots and the contents
3664 of each is valid. */
3666 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3667 slots = num_delay_slots (jump_insn);
3668 if (slots >= XVECLEN (pat, 0) - 1)
3670 for (i = 1; i < XVECLEN (pat, 0); i++)
3671 if (! (
3672 #ifdef ANNUL_IFFALSE_SLOTS
3673 (INSN_ANNULLED_BRANCH_P (jump_insn)
3674 && INSN_FROM_TARGET_P (pat->insn (i)))
3675 ? eligible_for_annul_false (jump_insn, i - 1,
3676 pat->insn (i), flags) :
3677 #endif
3678 #ifdef ANNUL_IFTRUE_SLOTS
3679 (INSN_ANNULLED_BRANCH_P (jump_insn)
3680 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3681 ? eligible_for_annul_true (jump_insn, i - 1,
3682 pat->insn (i), flags) :
3683 #endif
3684 eligible_for_delay (jump_insn, i - 1,
3685 pat->insn (i), flags)))
3686 break;
3688 else
3689 i = 0;
3691 if (i == XVECLEN (pat, 0))
3692 continue;
3694 /* We have to do something with this insn. If it is an unconditional
3695 RETURN, delete the SEQUENCE and output the individual insns,
3696 followed by the RETURN. Then set things up so we try to find
3697 insns for its delay slots, if it needs some. */
3698 if (ANY_RETURN_P (PATTERN (jump_insn)))
3700 rtx_insn *prev = PREV_INSN (insn);
3702 delete_related_insns (insn);
3703 for (i = 1; i < XVECLEN (pat, 0); i++)
3704 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3706 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3707 emit_barrier_after (insn);
3709 if (slots)
3710 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3712 else
3713 /* It is probably more efficient to keep this with its current
3714 delay slot as a branch to a RETURN. */
3715 reorg_redirect_jump (jump_insn, real_label);
3718 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3719 new delay slots we have created. */
3720 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3721 delete_related_insns (real_return_label);
3722 if (real_simple_return_label != NULL_RTX
3723 && --LABEL_NUSES (real_simple_return_label) == 0)
3724 delete_related_insns (real_simple_return_label);
3726 fill_simple_delay_slots (1);
3727 fill_simple_delay_slots (0);
3730 /* Try to find insns to place in delay slots. */
3732 static void
3733 dbr_schedule (rtx_insn *first)
3735 rtx_insn *insn, *next, *epilogue_insn = 0;
3736 int i;
3737 bool need_return_insns;
3739 /* If the current function has no insns other than the prologue and
3740 epilogue, then do not try to fill any delay slots. */
3741 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3742 return;
3744 /* Find the highest INSN_UID and allocate and initialize our map from
3745 INSN_UID's to position in code. */
3746 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3748 if (INSN_UID (insn) > max_uid)
3749 max_uid = INSN_UID (insn);
3750 if (NOTE_P (insn)
3751 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3752 epilogue_insn = insn;
3755 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3756 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3757 uid_to_ruid[INSN_UID (insn)] = i;
3759 /* Initialize the list of insns that need filling. */
3760 if (unfilled_firstobj == 0)
3762 gcc_obstack_init (&unfilled_slots_obstack);
3763 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3766 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3768 rtx target;
3770 /* Skip vector tables. We can't get attributes for them. */
3771 if (JUMP_TABLE_DATA_P (insn))
3772 continue;
3774 if (JUMP_P (insn))
3775 INSN_ANNULLED_BRANCH_P (insn) = 0;
3776 INSN_FROM_TARGET_P (insn) = 0;
3778 if (num_delay_slots (insn) > 0)
3779 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3781 /* Ensure all jumps go to the last of a set of consecutive labels. */
3782 if (JUMP_P (insn)
3783 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3784 && !ANY_RETURN_P (JUMP_LABEL (insn))
3785 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3786 != JUMP_LABEL (insn)))
3787 redirect_jump (insn, target, 1);
3790 init_resource_info (epilogue_insn);
3792 /* Show we haven't computed an end-of-function label yet. */
3793 function_return_label = function_simple_return_label = NULL;
3795 /* Initialize the statistics for this function. */
3796 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3797 memset (num_filled_delays, 0, sizeof num_filled_delays);
3799 /* Now do the delay slot filling. Try everything twice in case earlier
3800 changes make more slots fillable. */
3802 for (reorg_pass_number = 0;
3803 reorg_pass_number < MAX_REORG_PASSES;
3804 reorg_pass_number++)
3806 fill_simple_delay_slots (1);
3807 fill_simple_delay_slots (0);
3808 fill_eager_delay_slots ();
3809 relax_delay_slots (first);
3812 /* If we made an end of function label, indicate that it is now
3813 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3814 If it is now unused, delete it. */
3815 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3816 delete_related_insns (function_return_label);
3817 if (function_simple_return_label
3818 && --LABEL_NUSES (function_simple_return_label) == 0)
3819 delete_related_insns (function_simple_return_label);
3821 need_return_insns = false;
3822 need_return_insns |= HAVE_return && function_return_label != 0;
3823 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3824 if (need_return_insns)
3825 make_return_insns (first);
3827 /* Delete any USE insns made by update_block; subsequent passes don't need
3828 them or know how to deal with them. */
3829 for (insn = first; insn; insn = next)
3831 next = NEXT_INSN (insn);
3833 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3834 && INSN_P (XEXP (PATTERN (insn), 0)))
3835 next = delete_related_insns (insn);
3838 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3840 /* It is not clear why the line below is needed, but it does seem to be. */
3841 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3843 if (dump_file)
3845 int i, j, need_comma;
3846 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3847 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3849 for (reorg_pass_number = 0;
3850 reorg_pass_number < MAX_REORG_PASSES;
3851 reorg_pass_number++)
3853 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3854 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3856 need_comma = 0;
3857 fprintf (dump_file, ";; Reorg function #%d\n", i);
3859 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3860 num_insns_needing_delays[i][reorg_pass_number]);
3862 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3863 if (num_filled_delays[i][j][reorg_pass_number])
3865 if (need_comma)
3866 fprintf (dump_file, ", ");
3867 need_comma = 1;
3868 fprintf (dump_file, "%d got %d delays",
3869 num_filled_delays[i][j][reorg_pass_number], j);
3871 fprintf (dump_file, "\n");
3874 memset (total_delay_slots, 0, sizeof total_delay_slots);
3875 memset (total_annul_slots, 0, sizeof total_annul_slots);
3876 for (insn = first; insn; insn = NEXT_INSN (insn))
3878 if (! insn->deleted ()
3879 && NONJUMP_INSN_P (insn)
3880 && GET_CODE (PATTERN (insn)) != USE
3881 && GET_CODE (PATTERN (insn)) != CLOBBER)
3883 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3885 rtx control;
3886 j = XVECLEN (PATTERN (insn), 0) - 1;
3887 if (j > MAX_DELAY_HISTOGRAM)
3888 j = MAX_DELAY_HISTOGRAM;
3889 control = XVECEXP (PATTERN (insn), 0, 0);
3890 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3891 total_annul_slots[j]++;
3892 else
3893 total_delay_slots[j]++;
3895 else if (num_delay_slots (insn) > 0)
3896 total_delay_slots[0]++;
3899 fprintf (dump_file, ";; Reorg totals: ");
3900 need_comma = 0;
3901 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3903 if (total_delay_slots[j])
3905 if (need_comma)
3906 fprintf (dump_file, ", ");
3907 need_comma = 1;
3908 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3911 fprintf (dump_file, "\n");
3912 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3913 fprintf (dump_file, ";; Reorg annuls: ");
3914 need_comma = 0;
3915 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3917 if (total_annul_slots[j])
3919 if (need_comma)
3920 fprintf (dump_file, ", ");
3921 need_comma = 1;
3922 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3925 fprintf (dump_file, "\n");
3926 #endif
3927 fprintf (dump_file, "\n");
3930 if (!sibling_labels.is_empty ())
3932 update_alignments (sibling_labels);
3933 sibling_labels.release ();
3936 free_resource_info ();
3937 free (uid_to_ruid);
3938 crtl->dbr_scheduled_p = true;
3940 #endif /* DELAY_SLOTS */
3942 /* Run delay slot optimization. */
3943 static unsigned int
3944 rest_of_handle_delay_slots (void)
3946 #ifdef DELAY_SLOTS
3947 dbr_schedule (get_insns ());
3948 #endif
3949 return 0;
3952 namespace {
3954 const pass_data pass_data_delay_slots =
3956 RTL_PASS, /* type */
3957 "dbr", /* name */
3958 OPTGROUP_NONE, /* optinfo_flags */
3959 TV_DBR_SCHED, /* tv_id */
3960 0, /* properties_required */
3961 0, /* properties_provided */
3962 0, /* properties_destroyed */
3963 0, /* todo_flags_start */
3964 0, /* todo_flags_finish */
3967 class pass_delay_slots : public rtl_opt_pass
3969 public:
3970 pass_delay_slots (gcc::context *ctxt)
3971 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3974 /* opt_pass methods: */
3975 virtual bool gate (function *);
3976 virtual unsigned int execute (function *)
3978 return rest_of_handle_delay_slots ();
3981 }; // class pass_delay_slots
3983 bool
3984 pass_delay_slots::gate (function *)
3986 #ifdef DELAY_SLOTS
3987 /* At -O0 dataflow info isn't updated after RA. */
3988 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3989 #else
3990 return 0;
3991 #endif
3994 } // anon namespace
3996 rtl_opt_pass *
3997 make_pass_delay_slots (gcc::context *ctxt)
3999 return new pass_delay_slots (ctxt);
4002 /* Machine dependent reorg pass. */
4004 namespace {
4006 const pass_data pass_data_machine_reorg =
4008 RTL_PASS, /* type */
4009 "mach", /* name */
4010 OPTGROUP_NONE, /* optinfo_flags */
4011 TV_MACH_DEP, /* tv_id */
4012 0, /* properties_required */
4013 0, /* properties_provided */
4014 0, /* properties_destroyed */
4015 0, /* todo_flags_start */
4016 0, /* todo_flags_finish */
4019 class pass_machine_reorg : public rtl_opt_pass
4021 public:
4022 pass_machine_reorg (gcc::context *ctxt)
4023 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
4026 /* opt_pass methods: */
4027 virtual bool gate (function *)
4029 return targetm.machine_dependent_reorg != 0;
4032 virtual unsigned int execute (function *)
4034 targetm.machine_dependent_reorg ();
4035 return 0;
4038 }; // class pass_machine_reorg
4040 } // anon namespace
4042 rtl_opt_pass *
4043 make_pass_machine_reorg (gcc::context *ctxt)
4045 return new pass_machine_reorg (ctxt);