* doc/invoke.texi: Add cpu_type power6.
[official-gcc.git] / gcc / reg-stack.c
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1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
72 * Methodology:
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
78 * asm_operands:
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
173 #include "timevar.h"
174 #include "tree-pass.h"
175 #include "target.h"
176 #include "vecprim.h"
178 #ifdef STACK_REGS
180 /* We use this array to cache info about insns, because otherwise we
181 spend too much time in stack_regs_mentioned_p.
183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
184 the insn uses stack registers, two indicates the insn does not use
185 stack registers. */
186 static VEC(char,heap) *stack_regs_mentioned_data;
188 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
190 int regstack_completed = 0;
192 /* This is the basic stack record. TOP is an index into REG[] such
193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
195 If TOP is -2, REG[] is not yet initialized. Stack initialization
196 consists of placing each live reg in array `reg' and setting `top'
197 appropriately.
199 REG_SET indicates which registers are live. */
201 typedef struct stack_def
203 int top; /* index to top stack element */
204 HARD_REG_SET reg_set; /* set of live registers */
205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
206 } *stack;
208 /* This is used to carry information about basic blocks. It is
209 attached to the AUX field of the standard CFG block. */
211 typedef struct block_info_def
213 struct stack_def stack_in; /* Input stack configuration. */
214 struct stack_def stack_out; /* Output stack configuration. */
215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
216 int done; /* True if block already converted. */
217 int predecessors; /* Number of predecessors that need
218 to be visited. */
219 } *block_info;
221 #define BLOCK_INFO(B) ((block_info) (B)->aux)
223 /* Passed to change_stack to indicate where to emit insns. */
224 enum emit_where
226 EMIT_AFTER,
227 EMIT_BEFORE
230 /* The block we're currently working on. */
231 static basic_block current_block;
233 /* In the current_block, whether we're processing the first register
234 stack or call instruction, i.e. the regstack is currently the
235 same as BLOCK_INFO(current_block)->stack_in. */
236 static bool starting_stack_p;
238 /* This is the register file for all register after conversion. */
239 static rtx
240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
242 #define FP_MODE_REG(regno,mode) \
243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
245 /* Used to initialize uninitialized registers. */
246 static rtx not_a_num;
248 /* Forward declarations */
250 static int stack_regs_mentioned_p (rtx pat);
251 static void pop_stack (stack, int);
252 static rtx *get_true_reg (rtx *);
254 static int check_asm_stack_operands (rtx);
255 static int get_asm_operand_n_inputs (rtx);
256 static rtx stack_result (tree);
257 static void replace_reg (rtx *, int);
258 static void remove_regno_note (rtx, enum reg_note, unsigned int);
259 static int get_hard_regnum (stack, rtx);
260 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
261 static void swap_to_top(rtx, stack, rtx, rtx);
262 static bool move_for_stack_reg (rtx, stack, rtx);
263 static bool move_nan_for_stack_reg (rtx, stack, rtx);
264 static int swap_rtx_condition_1 (rtx);
265 static int swap_rtx_condition (rtx);
266 static void compare_for_stack_reg (rtx, stack, rtx);
267 static bool subst_stack_regs_pat (rtx, stack, rtx);
268 static void subst_asm_stack_regs (rtx, stack);
269 static bool subst_stack_regs (rtx, stack);
270 static void change_stack (rtx, stack, stack, enum emit_where);
271 static void print_stack (FILE *, stack);
272 static rtx next_flags_user (rtx);
274 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
276 static int
277 stack_regs_mentioned_p (rtx pat)
279 const char *fmt;
280 int i;
282 if (STACK_REG_P (pat))
283 return 1;
285 fmt = GET_RTX_FORMAT (GET_CODE (pat));
286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
288 if (fmt[i] == 'E')
290 int j;
292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
294 return 1;
296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
297 return 1;
300 return 0;
303 /* Return nonzero if INSN mentions stacked registers, else return zero. */
306 stack_regs_mentioned (rtx insn)
308 unsigned int uid, max;
309 int test;
311 if (! INSN_P (insn) || !stack_regs_mentioned_data)
312 return 0;
314 uid = INSN_UID (insn);
315 max = VEC_length (char, stack_regs_mentioned_data);
316 if (uid >= max)
318 char *p;
319 unsigned int old_max = max;
321 /* Allocate some extra size to avoid too many reallocs, but
322 do not grow too quickly. */
323 max = uid + uid / 20 + 1;
324 VEC_safe_grow (char, heap, stack_regs_mentioned_data, max);
325 p = VEC_address (char, stack_regs_mentioned_data);
326 memset (&p[old_max], 0,
327 sizeof (char) * (max - old_max));
330 test = VEC_index (char, stack_regs_mentioned_data, uid);
331 if (test == 0)
333 /* This insn has yet to be examined. Do so now. */
334 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
335 VEC_replace (char, stack_regs_mentioned_data, uid, test);
338 return test == 1;
341 static rtx ix86_flags_rtx;
343 static rtx
344 next_flags_user (rtx insn)
346 /* Search forward looking for the first use of this value.
347 Stop at block boundaries. */
349 while (insn != BB_END (current_block))
351 insn = NEXT_INSN (insn);
353 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
354 return insn;
356 if (CALL_P (insn))
357 return NULL_RTX;
359 return NULL_RTX;
362 /* Reorganize the stack into ascending numbers, before this insn. */
364 static void
365 straighten_stack (rtx insn, stack regstack)
367 struct stack_def temp_stack;
368 int top;
370 /* If there is only a single register on the stack, then the stack is
371 already in increasing order and no reorganization is needed.
373 Similarly if the stack is empty. */
374 if (regstack->top <= 0)
375 return;
377 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
379 for (top = temp_stack.top = regstack->top; top >= 0; top--)
380 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
382 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
385 /* Pop a register from the stack. */
387 static void
388 pop_stack (stack regstack, int regno)
390 int top = regstack->top;
392 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
393 regstack->top--;
394 /* If regno was not at the top of stack then adjust stack. */
395 if (regstack->reg [top] != regno)
397 int i;
398 for (i = regstack->top; i >= 0; i--)
399 if (regstack->reg [i] == regno)
401 int j;
402 for (j = i; j < top; j++)
403 regstack->reg [j] = regstack->reg [j + 1];
404 break;
409 /* Return a pointer to the REG expression within PAT. If PAT is not a
410 REG, possible enclosed by a conversion rtx, return the inner part of
411 PAT that stopped the search. */
413 static rtx *
414 get_true_reg (rtx *pat)
416 for (;;)
417 switch (GET_CODE (*pat))
419 case SUBREG:
420 /* Eliminate FP subregister accesses in favor of the
421 actual FP register in use. */
423 rtx subreg;
424 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
426 int regno_off = subreg_regno_offset (REGNO (subreg),
427 GET_MODE (subreg),
428 SUBREG_BYTE (*pat),
429 GET_MODE (*pat));
430 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
431 GET_MODE (subreg));
432 default:
433 return pat;
436 case FLOAT:
437 case FIX:
438 case FLOAT_EXTEND:
439 pat = & XEXP (*pat, 0);
440 break;
442 case FLOAT_TRUNCATE:
443 if (!flag_unsafe_math_optimizations)
444 return pat;
445 pat = & XEXP (*pat, 0);
446 break;
450 /* Set if we find any malformed asms in a block. */
451 static bool any_malformed_asm;
453 /* There are many rules that an asm statement for stack-like regs must
454 follow. Those rules are explained at the top of this file: the rule
455 numbers below refer to that explanation. */
457 static int
458 check_asm_stack_operands (rtx insn)
460 int i;
461 int n_clobbers;
462 int malformed_asm = 0;
463 rtx body = PATTERN (insn);
465 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
466 char implicitly_dies[FIRST_PSEUDO_REGISTER];
467 int alt;
469 rtx *clobber_reg = 0;
470 int n_inputs, n_outputs;
472 /* Find out what the constraints require. If no constraint
473 alternative matches, this asm is malformed. */
474 extract_insn (insn);
475 constrain_operands (1);
476 alt = which_alternative;
478 preprocess_constraints ();
480 n_inputs = get_asm_operand_n_inputs (body);
481 n_outputs = recog_data.n_operands - n_inputs;
483 if (alt < 0)
485 malformed_asm = 1;
486 /* Avoid further trouble with this insn. */
487 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
488 return 0;
491 /* Strip SUBREGs here to make the following code simpler. */
492 for (i = 0; i < recog_data.n_operands; i++)
493 if (GET_CODE (recog_data.operand[i]) == SUBREG
494 && REG_P (SUBREG_REG (recog_data.operand[i])))
495 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
497 /* Set up CLOBBER_REG. */
499 n_clobbers = 0;
501 if (GET_CODE (body) == PARALLEL)
503 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
505 for (i = 0; i < XVECLEN (body, 0); i++)
506 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
508 rtx clobber = XVECEXP (body, 0, i);
509 rtx reg = XEXP (clobber, 0);
511 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
512 reg = SUBREG_REG (reg);
514 if (STACK_REG_P (reg))
516 clobber_reg[n_clobbers] = reg;
517 n_clobbers++;
522 /* Enforce rule #4: Output operands must specifically indicate which
523 reg an output appears in after an asm. "=f" is not allowed: the
524 operand constraints must select a class with a single reg.
526 Also enforce rule #5: Output operands must start at the top of
527 the reg-stack: output operands may not "skip" a reg. */
529 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
530 for (i = 0; i < n_outputs; i++)
531 if (STACK_REG_P (recog_data.operand[i]))
533 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
535 error_for_asm (insn, "output constraint %d must specify a single register", i);
536 malformed_asm = 1;
538 else
540 int j;
542 for (j = 0; j < n_clobbers; j++)
543 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
545 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
546 i, reg_names [REGNO (clobber_reg[j])]);
547 malformed_asm = 1;
548 break;
550 if (j == n_clobbers)
551 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
556 /* Search for first non-popped reg. */
557 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
558 if (! reg_used_as_output[i])
559 break;
561 /* If there are any other popped regs, that's an error. */
562 for (; i < LAST_STACK_REG + 1; i++)
563 if (reg_used_as_output[i])
564 break;
566 if (i != LAST_STACK_REG + 1)
568 error_for_asm (insn, "output regs must be grouped at top of stack");
569 malformed_asm = 1;
572 /* Enforce rule #2: All implicitly popped input regs must be closer
573 to the top of the reg-stack than any input that is not implicitly
574 popped. */
576 memset (implicitly_dies, 0, sizeof (implicitly_dies));
577 for (i = n_outputs; i < n_outputs + n_inputs; i++)
578 if (STACK_REG_P (recog_data.operand[i]))
580 /* An input reg is implicitly popped if it is tied to an
581 output, or if there is a CLOBBER for it. */
582 int j;
584 for (j = 0; j < n_clobbers; j++)
585 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
586 break;
588 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
589 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
592 /* Search for first non-popped reg. */
593 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
594 if (! implicitly_dies[i])
595 break;
597 /* If there are any other popped regs, that's an error. */
598 for (; i < LAST_STACK_REG + 1; i++)
599 if (implicitly_dies[i])
600 break;
602 if (i != LAST_STACK_REG + 1)
604 error_for_asm (insn,
605 "implicitly popped regs must be grouped at top of stack");
606 malformed_asm = 1;
609 /* Enforce rule #3: If any input operand uses the "f" constraint, all
610 output constraints must use the "&" earlyclobber.
612 ??? Detect this more deterministically by having constrain_asm_operands
613 record any earlyclobber. */
615 for (i = n_outputs; i < n_outputs + n_inputs; i++)
616 if (recog_op_alt[i][alt].matches == -1)
618 int j;
620 for (j = 0; j < n_outputs; j++)
621 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
623 error_for_asm (insn,
624 "output operand %d must use %<&%> constraint", j);
625 malformed_asm = 1;
629 if (malformed_asm)
631 /* Avoid further trouble with this insn. */
632 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
633 any_malformed_asm = true;
634 return 0;
637 return 1;
640 /* Calculate the number of inputs and outputs in BODY, an
641 asm_operands. N_OPERANDS is the total number of operands, and
642 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
643 placed. */
645 static int
646 get_asm_operand_n_inputs (rtx body)
648 switch (GET_CODE (body))
650 case SET:
651 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
652 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
654 case ASM_OPERANDS:
655 return ASM_OPERANDS_INPUT_LENGTH (body);
657 case PARALLEL:
658 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
660 default:
661 gcc_unreachable ();
665 /* If current function returns its result in an fp stack register,
666 return the REG. Otherwise, return 0. */
668 static rtx
669 stack_result (tree decl)
671 rtx result;
673 /* If the value is supposed to be returned in memory, then clearly
674 it is not returned in a stack register. */
675 if (aggregate_value_p (DECL_RESULT (decl), decl))
676 return 0;
678 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
679 if (result != 0)
680 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
681 decl, true);
683 return result != 0 && STACK_REG_P (result) ? result : 0;
688 * This section deals with stack register substitution, and forms the second
689 * pass over the RTL.
692 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
693 the desired hard REGNO. */
695 static void
696 replace_reg (rtx *reg, int regno)
698 gcc_assert (regno >= FIRST_STACK_REG);
699 gcc_assert (regno <= LAST_STACK_REG);
700 gcc_assert (STACK_REG_P (*reg));
702 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
703 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
705 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
708 /* Remove a note of type NOTE, which must be found, for register
709 number REGNO from INSN. Remove only one such note. */
711 static void
712 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
714 rtx *note_link, this;
716 note_link = &REG_NOTES (insn);
717 for (this = *note_link; this; this = XEXP (this, 1))
718 if (REG_NOTE_KIND (this) == note
719 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
721 *note_link = XEXP (this, 1);
722 return;
724 else
725 note_link = &XEXP (this, 1);
727 gcc_unreachable ();
730 /* Find the hard register number of virtual register REG in REGSTACK.
731 The hard register number is relative to the top of the stack. -1 is
732 returned if the register is not found. */
734 static int
735 get_hard_regnum (stack regstack, rtx reg)
737 int i;
739 gcc_assert (STACK_REG_P (reg));
741 for (i = regstack->top; i >= 0; i--)
742 if (regstack->reg[i] == REGNO (reg))
743 break;
745 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
748 /* Emit an insn to pop virtual register REG before or after INSN.
749 REGSTACK is the stack state after INSN and is updated to reflect this
750 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
751 is represented as a SET whose destination is the register to be popped
752 and source is the top of stack. A death note for the top of stack
753 cases the movdf pattern to pop. */
755 static rtx
756 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
758 rtx pop_insn, pop_rtx;
759 int hard_regno;
761 /* For complex types take care to pop both halves. These may survive in
762 CLOBBER and USE expressions. */
763 if (COMPLEX_MODE_P (GET_MODE (reg)))
765 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
766 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
768 pop_insn = NULL_RTX;
769 if (get_hard_regnum (regstack, reg1) >= 0)
770 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
771 if (get_hard_regnum (regstack, reg2) >= 0)
772 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
773 gcc_assert (pop_insn);
774 return pop_insn;
777 hard_regno = get_hard_regnum (regstack, reg);
779 gcc_assert (hard_regno >= FIRST_STACK_REG);
781 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
782 FP_MODE_REG (FIRST_STACK_REG, DFmode));
784 if (where == EMIT_AFTER)
785 pop_insn = emit_insn_after (pop_rtx, insn);
786 else
787 pop_insn = emit_insn_before (pop_rtx, insn);
789 REG_NOTES (pop_insn)
790 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
791 REG_NOTES (pop_insn));
793 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
794 = regstack->reg[regstack->top];
795 regstack->top -= 1;
796 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
798 return pop_insn;
801 /* Emit an insn before or after INSN to swap virtual register REG with
802 the top of stack. REGSTACK is the stack state before the swap, and
803 is updated to reflect the swap. A swap insn is represented as a
804 PARALLEL of two patterns: each pattern moves one reg to the other.
806 If REG is already at the top of the stack, no insn is emitted. */
808 static void
809 emit_swap_insn (rtx insn, stack regstack, rtx reg)
811 int hard_regno;
812 rtx swap_rtx;
813 int tmp, other_reg; /* swap regno temps */
814 rtx i1; /* the stack-reg insn prior to INSN */
815 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
817 hard_regno = get_hard_regnum (regstack, reg);
819 gcc_assert (hard_regno >= FIRST_STACK_REG);
820 if (hard_regno == FIRST_STACK_REG)
821 return;
823 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
825 tmp = regstack->reg[other_reg];
826 regstack->reg[other_reg] = regstack->reg[regstack->top];
827 regstack->reg[regstack->top] = tmp;
829 /* Find the previous insn involving stack regs, but don't pass a
830 block boundary. */
831 i1 = NULL;
832 if (current_block && insn != BB_HEAD (current_block))
834 rtx tmp = PREV_INSN (insn);
835 rtx limit = PREV_INSN (BB_HEAD (current_block));
836 while (tmp != limit)
838 if (LABEL_P (tmp)
839 || CALL_P (tmp)
840 || NOTE_INSN_BASIC_BLOCK_P (tmp)
841 || (NONJUMP_INSN_P (tmp)
842 && stack_regs_mentioned (tmp)))
844 i1 = tmp;
845 break;
847 tmp = PREV_INSN (tmp);
851 if (i1 != NULL_RTX
852 && (i1set = single_set (i1)) != NULL_RTX)
854 rtx i1src = *get_true_reg (&SET_SRC (i1set));
855 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
857 /* If the previous register stack push was from the reg we are to
858 swap with, omit the swap. */
860 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
861 && REG_P (i1src)
862 && REGNO (i1src) == (unsigned) hard_regno - 1
863 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
864 return;
866 /* If the previous insn wrote to the reg we are to swap with,
867 omit the swap. */
869 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
870 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
871 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
872 return;
875 /* Avoid emitting the swap if this is the first register stack insn
876 of the current_block. Instead update the current_block's stack_in
877 and let compensate edges take care of this for us. */
878 if (current_block && starting_stack_p)
880 BLOCK_INFO (current_block)->stack_in = *regstack;
881 starting_stack_p = false;
882 return;
885 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
886 FP_MODE_REG (FIRST_STACK_REG, XFmode));
888 if (i1)
889 emit_insn_after (swap_rtx, i1);
890 else if (current_block)
891 emit_insn_before (swap_rtx, BB_HEAD (current_block));
892 else
893 emit_insn_before (swap_rtx, insn);
896 /* Emit an insns before INSN to swap virtual register SRC1 with
897 the top of stack and virtual register SRC2 with second stack
898 slot. REGSTACK is the stack state before the swaps, and
899 is updated to reflect the swaps. A swap insn is represented as a
900 PARALLEL of two patterns: each pattern moves one reg to the other.
902 If SRC1 and/or SRC2 are already at the right place, no swap insn
903 is emitted. */
905 static void
906 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
908 struct stack_def temp_stack;
909 int regno, j, k, temp;
911 temp_stack = *regstack;
913 /* Place operand 1 at the top of stack. */
914 regno = get_hard_regnum (&temp_stack, src1);
915 gcc_assert (regno >= 0);
916 if (regno != FIRST_STACK_REG)
918 k = temp_stack.top - (regno - FIRST_STACK_REG);
919 j = temp_stack.top;
921 temp = temp_stack.reg[k];
922 temp_stack.reg[k] = temp_stack.reg[j];
923 temp_stack.reg[j] = temp;
926 /* Place operand 2 next on the stack. */
927 regno = get_hard_regnum (&temp_stack, src2);
928 gcc_assert (regno >= 0);
929 if (regno != FIRST_STACK_REG + 1)
931 k = temp_stack.top - (regno - FIRST_STACK_REG);
932 j = temp_stack.top - 1;
934 temp = temp_stack.reg[k];
935 temp_stack.reg[k] = temp_stack.reg[j];
936 temp_stack.reg[j] = temp;
939 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
942 /* Handle a move to or from a stack register in PAT, which is in INSN.
943 REGSTACK is the current stack. Return whether a control flow insn
944 was deleted in the process. */
946 static bool
947 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
949 rtx *psrc = get_true_reg (&SET_SRC (pat));
950 rtx *pdest = get_true_reg (&SET_DEST (pat));
951 rtx src, dest;
952 rtx note;
953 bool control_flow_insn_deleted = false;
955 src = *psrc; dest = *pdest;
957 if (STACK_REG_P (src) && STACK_REG_P (dest))
959 /* Write from one stack reg to another. If SRC dies here, then
960 just change the register mapping and delete the insn. */
962 note = find_regno_note (insn, REG_DEAD, REGNO (src));
963 if (note)
965 int i;
967 /* If this is a no-op move, there must not be a REG_DEAD note. */
968 gcc_assert (REGNO (src) != REGNO (dest));
970 for (i = regstack->top; i >= 0; i--)
971 if (regstack->reg[i] == REGNO (src))
972 break;
974 /* The destination must be dead, or life analysis is borked. */
975 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
977 /* If the source is not live, this is yet another case of
978 uninitialized variables. Load up a NaN instead. */
979 if (i < 0)
980 return move_nan_for_stack_reg (insn, regstack, dest);
982 /* It is possible that the dest is unused after this insn.
983 If so, just pop the src. */
985 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
986 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
987 else
989 regstack->reg[i] = REGNO (dest);
990 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
991 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
994 control_flow_insn_deleted |= control_flow_insn_p (insn);
995 delete_insn (insn);
996 return control_flow_insn_deleted;
999 /* The source reg does not die. */
1001 /* If this appears to be a no-op move, delete it, or else it
1002 will confuse the machine description output patterns. But if
1003 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1004 for REG_UNUSED will not work for deleted insns. */
1006 if (REGNO (src) == REGNO (dest))
1008 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1009 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1011 control_flow_insn_deleted |= control_flow_insn_p (insn);
1012 delete_insn (insn);
1013 return control_flow_insn_deleted;
1016 /* The destination ought to be dead. */
1017 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1019 replace_reg (psrc, get_hard_regnum (regstack, src));
1021 regstack->reg[++regstack->top] = REGNO (dest);
1022 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1023 replace_reg (pdest, FIRST_STACK_REG);
1025 else if (STACK_REG_P (src))
1027 /* Save from a stack reg to MEM, or possibly integer reg. Since
1028 only top of stack may be saved, emit an exchange first if
1029 needs be. */
1031 emit_swap_insn (insn, regstack, src);
1033 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1034 if (note)
1036 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1037 regstack->top--;
1038 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1040 else if ((GET_MODE (src) == XFmode)
1041 && regstack->top < REG_STACK_SIZE - 1)
1043 /* A 387 cannot write an XFmode value to a MEM without
1044 clobbering the source reg. The output code can handle
1045 this by reading back the value from the MEM.
1046 But it is more efficient to use a temp register if one is
1047 available. Push the source value here if the register
1048 stack is not full, and then write the value to memory via
1049 a pop. */
1050 rtx push_rtx;
1051 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1053 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1054 emit_insn_before (push_rtx, insn);
1055 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1056 REG_NOTES (insn));
1059 replace_reg (psrc, FIRST_STACK_REG);
1061 else
1063 gcc_assert (STACK_REG_P (dest));
1065 /* Load from MEM, or possibly integer REG or constant, into the
1066 stack regs. The actual target is always the top of the
1067 stack. The stack mapping is changed to reflect that DEST is
1068 now at top of stack. */
1070 /* The destination ought to be dead. */
1071 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1073 gcc_assert (regstack->top < REG_STACK_SIZE);
1075 regstack->reg[++regstack->top] = REGNO (dest);
1076 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1077 replace_reg (pdest, FIRST_STACK_REG);
1080 return control_flow_insn_deleted;
1083 /* A helper function which replaces INSN with a pattern that loads up
1084 a NaN into DEST, then invokes move_for_stack_reg. */
1086 static bool
1087 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
1089 rtx pat;
1091 dest = FP_MODE_REG (REGNO (dest), SFmode);
1092 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1093 PATTERN (insn) = pat;
1094 INSN_CODE (insn) = -1;
1096 return move_for_stack_reg (insn, regstack, pat);
1099 /* Swap the condition on a branch, if there is one. Return true if we
1100 found a condition to swap. False if the condition was not used as
1101 such. */
1103 static int
1104 swap_rtx_condition_1 (rtx pat)
1106 const char *fmt;
1107 int i, r = 0;
1109 if (COMPARISON_P (pat))
1111 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1112 r = 1;
1114 else
1116 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1117 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1119 if (fmt[i] == 'E')
1121 int j;
1123 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1124 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1126 else if (fmt[i] == 'e')
1127 r |= swap_rtx_condition_1 (XEXP (pat, i));
1131 return r;
1134 static int
1135 swap_rtx_condition (rtx insn)
1137 rtx pat = PATTERN (insn);
1139 /* We're looking for a single set to cc0 or an HImode temporary. */
1141 if (GET_CODE (pat) == SET
1142 && REG_P (SET_DEST (pat))
1143 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1145 insn = next_flags_user (insn);
1146 if (insn == NULL_RTX)
1147 return 0;
1148 pat = PATTERN (insn);
1151 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1152 with the cc value right now. We may be able to search for one
1153 though. */
1155 if (GET_CODE (pat) == SET
1156 && GET_CODE (SET_SRC (pat)) == UNSPEC
1157 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1159 rtx dest = SET_DEST (pat);
1161 /* Search forward looking for the first use of this value.
1162 Stop at block boundaries. */
1163 while (insn != BB_END (current_block))
1165 insn = NEXT_INSN (insn);
1166 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1167 break;
1168 if (CALL_P (insn))
1169 return 0;
1172 /* We haven't found it. */
1173 if (insn == BB_END (current_block))
1174 return 0;
1176 /* So we've found the insn using this value. If it is anything
1177 other than sahf or the value does not die (meaning we'd have
1178 to search further), then we must give up. */
1179 pat = PATTERN (insn);
1180 if (GET_CODE (pat) != SET
1181 || GET_CODE (SET_SRC (pat)) != UNSPEC
1182 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1183 || ! dead_or_set_p (insn, dest))
1184 return 0;
1186 /* Now we are prepared to handle this as a normal cc0 setter. */
1187 insn = next_flags_user (insn);
1188 if (insn == NULL_RTX)
1189 return 0;
1190 pat = PATTERN (insn);
1193 if (swap_rtx_condition_1 (pat))
1195 int fail = 0;
1196 INSN_CODE (insn) = -1;
1197 if (recog_memoized (insn) == -1)
1198 fail = 1;
1199 /* In case the flags don't die here, recurse to try fix
1200 following user too. */
1201 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1203 insn = next_flags_user (insn);
1204 if (!insn || !swap_rtx_condition (insn))
1205 fail = 1;
1207 if (fail)
1209 swap_rtx_condition_1 (pat);
1210 return 0;
1212 return 1;
1214 return 0;
1217 /* Handle a comparison. Special care needs to be taken to avoid
1218 causing comparisons that a 387 cannot do correctly, such as EQ.
1220 Also, a pop insn may need to be emitted. The 387 does have an
1221 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1222 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1223 set up. */
1225 static void
1226 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1228 rtx *src1, *src2;
1229 rtx src1_note, src2_note;
1231 src1 = get_true_reg (&XEXP (pat_src, 0));
1232 src2 = get_true_reg (&XEXP (pat_src, 1));
1234 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1235 registers that die in this insn - move those to stack top first. */
1236 if ((! STACK_REG_P (*src1)
1237 || (STACK_REG_P (*src2)
1238 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1239 && swap_rtx_condition (insn))
1241 rtx temp;
1242 temp = XEXP (pat_src, 0);
1243 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1244 XEXP (pat_src, 1) = temp;
1246 src1 = get_true_reg (&XEXP (pat_src, 0));
1247 src2 = get_true_reg (&XEXP (pat_src, 1));
1249 INSN_CODE (insn) = -1;
1252 /* We will fix any death note later. */
1254 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1256 if (STACK_REG_P (*src2))
1257 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1258 else
1259 src2_note = NULL_RTX;
1261 emit_swap_insn (insn, regstack, *src1);
1263 replace_reg (src1, FIRST_STACK_REG);
1265 if (STACK_REG_P (*src2))
1266 replace_reg (src2, get_hard_regnum (regstack, *src2));
1268 if (src1_note)
1270 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1271 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1274 /* If the second operand dies, handle that. But if the operands are
1275 the same stack register, don't bother, because only one death is
1276 needed, and it was just handled. */
1278 if (src2_note
1279 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1280 && REGNO (*src1) == REGNO (*src2)))
1282 /* As a special case, two regs may die in this insn if src2 is
1283 next to top of stack and the top of stack also dies. Since
1284 we have already popped src1, "next to top of stack" is really
1285 at top (FIRST_STACK_REG) now. */
1287 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1288 && src1_note)
1290 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1291 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1293 else
1295 /* The 386 can only represent death of the first operand in
1296 the case handled above. In all other cases, emit a separate
1297 pop and remove the death note from here. */
1299 /* link_cc0_insns (insn); */
1301 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1303 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1304 EMIT_AFTER);
1309 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1310 is the current register layout. Return whether a control flow insn
1311 was deleted in the process. */
1313 static bool
1314 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1316 rtx *dest, *src;
1317 bool control_flow_insn_deleted = false;
1319 switch (GET_CODE (pat))
1321 case USE:
1322 /* Deaths in USE insns can happen in non optimizing compilation.
1323 Handle them by popping the dying register. */
1324 src = get_true_reg (&XEXP (pat, 0));
1325 if (STACK_REG_P (*src)
1326 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1328 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1329 return control_flow_insn_deleted;
1331 /* ??? Uninitialized USE should not happen. */
1332 else
1333 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1334 break;
1336 case CLOBBER:
1338 rtx note;
1340 dest = get_true_reg (&XEXP (pat, 0));
1341 if (STACK_REG_P (*dest))
1343 note = find_reg_note (insn, REG_DEAD, *dest);
1345 if (pat != PATTERN (insn))
1347 /* The fix_truncdi_1 pattern wants to be able to allocate
1348 its own scratch register. It does this by clobbering
1349 an fp reg so that it is assured of an empty reg-stack
1350 register. If the register is live, kill it now.
1351 Remove the DEAD/UNUSED note so we don't try to kill it
1352 later too. */
1354 if (note)
1355 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1356 else
1358 note = find_reg_note (insn, REG_UNUSED, *dest);
1359 gcc_assert (note);
1361 remove_note (insn, note);
1362 replace_reg (dest, FIRST_STACK_REG + 1);
1364 else
1366 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1367 indicates an uninitialized value. Because reload removed
1368 all other clobbers, this must be due to a function
1369 returning without a value. Load up a NaN. */
1371 if (!note)
1373 rtx t = *dest;
1374 if (get_hard_regnum (regstack, t) == -1)
1375 control_flow_insn_deleted
1376 |= move_nan_for_stack_reg (insn, regstack, t);
1377 if (COMPLEX_MODE_P (GET_MODE (t)))
1379 t = FP_MODE_REG (REGNO (t) + 1, DFmode);
1380 if (get_hard_regnum (regstack, t) == -1)
1381 control_flow_insn_deleted
1382 |= move_nan_for_stack_reg (insn, regstack, t);
1387 break;
1390 case SET:
1392 rtx *src1 = (rtx *) 0, *src2;
1393 rtx src1_note, src2_note;
1394 rtx pat_src;
1396 dest = get_true_reg (&SET_DEST (pat));
1397 src = get_true_reg (&SET_SRC (pat));
1398 pat_src = SET_SRC (pat);
1400 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1401 if (STACK_REG_P (*src)
1402 || (STACK_REG_P (*dest)
1403 && (REG_P (*src) || MEM_P (*src)
1404 || GET_CODE (*src) == CONST_DOUBLE)))
1406 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1407 break;
1410 switch (GET_CODE (pat_src))
1412 case COMPARE:
1413 compare_for_stack_reg (insn, regstack, pat_src);
1414 break;
1416 case CALL:
1418 int count;
1419 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1420 --count >= 0;)
1422 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1423 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1426 replace_reg (dest, FIRST_STACK_REG);
1427 break;
1429 case REG:
1430 /* This is a `tstM2' case. */
1431 gcc_assert (*dest == cc0_rtx);
1432 src1 = src;
1434 /* Fall through. */
1436 case FLOAT_TRUNCATE:
1437 case SQRT:
1438 case ABS:
1439 case NEG:
1440 /* These insns only operate on the top of the stack. DEST might
1441 be cc0_rtx if we're processing a tstM pattern. Also, it's
1442 possible that the tstM case results in a REG_DEAD note on the
1443 source. */
1445 if (src1 == 0)
1446 src1 = get_true_reg (&XEXP (pat_src, 0));
1448 emit_swap_insn (insn, regstack, *src1);
1450 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1452 if (STACK_REG_P (*dest))
1453 replace_reg (dest, FIRST_STACK_REG);
1455 if (src1_note)
1457 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1458 regstack->top--;
1459 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1462 replace_reg (src1, FIRST_STACK_REG);
1463 break;
1465 case MINUS:
1466 case DIV:
1467 /* On i386, reversed forms of subM3 and divM3 exist for
1468 MODE_FLOAT, so the same code that works for addM3 and mulM3
1469 can be used. */
1470 case MULT:
1471 case PLUS:
1472 /* These insns can accept the top of stack as a destination
1473 from a stack reg or mem, or can use the top of stack as a
1474 source and some other stack register (possibly top of stack)
1475 as a destination. */
1477 src1 = get_true_reg (&XEXP (pat_src, 0));
1478 src2 = get_true_reg (&XEXP (pat_src, 1));
1480 /* We will fix any death note later. */
1482 if (STACK_REG_P (*src1))
1483 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1484 else
1485 src1_note = NULL_RTX;
1486 if (STACK_REG_P (*src2))
1487 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1488 else
1489 src2_note = NULL_RTX;
1491 /* If either operand is not a stack register, then the dest
1492 must be top of stack. */
1494 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1495 emit_swap_insn (insn, regstack, *dest);
1496 else
1498 /* Both operands are REG. If neither operand is already
1499 at the top of stack, choose to make the one that is the dest
1500 the new top of stack. */
1502 int src1_hard_regnum, src2_hard_regnum;
1504 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1505 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1506 gcc_assert (src1_hard_regnum != -1);
1507 gcc_assert (src2_hard_regnum != -1);
1509 if (src1_hard_regnum != FIRST_STACK_REG
1510 && src2_hard_regnum != FIRST_STACK_REG)
1511 emit_swap_insn (insn, regstack, *dest);
1514 if (STACK_REG_P (*src1))
1515 replace_reg (src1, get_hard_regnum (regstack, *src1));
1516 if (STACK_REG_P (*src2))
1517 replace_reg (src2, get_hard_regnum (regstack, *src2));
1519 if (src1_note)
1521 rtx src1_reg = XEXP (src1_note, 0);
1523 /* If the register that dies is at the top of stack, then
1524 the destination is somewhere else - merely substitute it.
1525 But if the reg that dies is not at top of stack, then
1526 move the top of stack to the dead reg, as though we had
1527 done the insn and then a store-with-pop. */
1529 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1531 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1532 replace_reg (dest, get_hard_regnum (regstack, *dest));
1534 else
1536 int regno = get_hard_regnum (regstack, src1_reg);
1538 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1539 replace_reg (dest, regno);
1541 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1542 = regstack->reg[regstack->top];
1545 CLEAR_HARD_REG_BIT (regstack->reg_set,
1546 REGNO (XEXP (src1_note, 0)));
1547 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1548 regstack->top--;
1550 else if (src2_note)
1552 rtx src2_reg = XEXP (src2_note, 0);
1553 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1555 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1556 replace_reg (dest, get_hard_regnum (regstack, *dest));
1558 else
1560 int regno = get_hard_regnum (regstack, src2_reg);
1562 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1563 replace_reg (dest, regno);
1565 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1566 = regstack->reg[regstack->top];
1569 CLEAR_HARD_REG_BIT (regstack->reg_set,
1570 REGNO (XEXP (src2_note, 0)));
1571 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1572 regstack->top--;
1574 else
1576 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1577 replace_reg (dest, get_hard_regnum (regstack, *dest));
1580 /* Keep operand 1 matching with destination. */
1581 if (COMMUTATIVE_ARITH_P (pat_src)
1582 && REG_P (*src1) && REG_P (*src2)
1583 && REGNO (*src1) != REGNO (*dest))
1585 int tmp = REGNO (*src1);
1586 replace_reg (src1, REGNO (*src2));
1587 replace_reg (src2, tmp);
1589 break;
1591 case UNSPEC:
1592 switch (XINT (pat_src, 1))
1594 case UNSPEC_FIST:
1596 case UNSPEC_FIST_FLOOR:
1597 case UNSPEC_FIST_CEIL:
1599 /* These insns only operate on the top of the stack. */
1601 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1602 emit_swap_insn (insn, regstack, *src1);
1604 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1606 if (STACK_REG_P (*dest))
1607 replace_reg (dest, FIRST_STACK_REG);
1609 if (src1_note)
1611 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1612 regstack->top--;
1613 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1616 replace_reg (src1, FIRST_STACK_REG);
1617 break;
1619 case UNSPEC_SIN:
1620 case UNSPEC_COS:
1621 case UNSPEC_FRNDINT:
1622 case UNSPEC_F2XM1:
1624 case UNSPEC_FRNDINT_FLOOR:
1625 case UNSPEC_FRNDINT_CEIL:
1626 case UNSPEC_FRNDINT_TRUNC:
1627 case UNSPEC_FRNDINT_MASK_PM:
1629 /* These insns only operate on the top of the stack. */
1631 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1633 emit_swap_insn (insn, regstack, *src1);
1635 /* Input should never die, it is
1636 replaced with output. */
1637 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1638 gcc_assert (!src1_note);
1640 if (STACK_REG_P (*dest))
1641 replace_reg (dest, FIRST_STACK_REG);
1643 replace_reg (src1, FIRST_STACK_REG);
1644 break;
1646 case UNSPEC_FPATAN:
1647 case UNSPEC_FYL2X:
1648 case UNSPEC_FYL2XP1:
1649 /* These insns operate on the top two stack slots. */
1651 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1652 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1654 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1655 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1657 swap_to_top (insn, regstack, *src1, *src2);
1659 replace_reg (src1, FIRST_STACK_REG);
1660 replace_reg (src2, FIRST_STACK_REG + 1);
1662 if (src1_note)
1663 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1664 if (src2_note)
1665 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1667 /* Pop both input operands from the stack. */
1668 CLEAR_HARD_REG_BIT (regstack->reg_set,
1669 regstack->reg[regstack->top]);
1670 CLEAR_HARD_REG_BIT (regstack->reg_set,
1671 regstack->reg[regstack->top - 1]);
1672 regstack->top -= 2;
1674 /* Push the result back onto the stack. */
1675 regstack->reg[++regstack->top] = REGNO (*dest);
1676 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1677 replace_reg (dest, FIRST_STACK_REG);
1678 break;
1680 case UNSPEC_FSCALE_FRACT:
1681 case UNSPEC_FPREM_F:
1682 case UNSPEC_FPREM1_F:
1683 /* These insns operate on the top two stack slots.
1684 first part of double input, double output insn. */
1686 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1687 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1689 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1690 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1692 /* Inputs should never die, they are
1693 replaced with outputs. */
1694 gcc_assert (!src1_note);
1695 gcc_assert (!src2_note);
1697 swap_to_top (insn, regstack, *src1, *src2);
1699 /* Push the result back onto stack. Empty stack slot
1700 will be filled in second part of insn. */
1701 if (STACK_REG_P (*dest)) {
1702 regstack->reg[regstack->top] = REGNO (*dest);
1703 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1704 replace_reg (dest, FIRST_STACK_REG);
1707 replace_reg (src1, FIRST_STACK_REG);
1708 replace_reg (src2, FIRST_STACK_REG + 1);
1709 break;
1711 case UNSPEC_FSCALE_EXP:
1712 case UNSPEC_FPREM_U:
1713 case UNSPEC_FPREM1_U:
1714 /* These insns operate on the top two stack slots./
1715 second part of double input, double output insn. */
1717 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1718 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1720 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1721 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1723 /* Inputs should never die, they are
1724 replaced with outputs. */
1725 gcc_assert (!src1_note);
1726 gcc_assert (!src2_note);
1728 swap_to_top (insn, regstack, *src1, *src2);
1730 /* Push the result back onto stack. Fill empty slot from
1731 first part of insn and fix top of stack pointer. */
1732 if (STACK_REG_P (*dest)) {
1733 regstack->reg[regstack->top - 1] = REGNO (*dest);
1734 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1735 replace_reg (dest, FIRST_STACK_REG + 1);
1738 replace_reg (src1, FIRST_STACK_REG);
1739 replace_reg (src2, FIRST_STACK_REG + 1);
1740 break;
1742 case UNSPEC_SINCOS_COS:
1743 case UNSPEC_TAN_ONE:
1744 case UNSPEC_XTRACT_FRACT:
1745 /* These insns operate on the top two stack slots,
1746 first part of one input, double output insn. */
1748 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1750 emit_swap_insn (insn, regstack, *src1);
1752 /* Input should never die, it is
1753 replaced with output. */
1754 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1755 gcc_assert (!src1_note);
1757 /* Push the result back onto stack. Empty stack slot
1758 will be filled in second part of insn. */
1759 if (STACK_REG_P (*dest)) {
1760 regstack->reg[regstack->top + 1] = REGNO (*dest);
1761 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1762 replace_reg (dest, FIRST_STACK_REG);
1765 replace_reg (src1, FIRST_STACK_REG);
1766 break;
1768 case UNSPEC_SINCOS_SIN:
1769 case UNSPEC_TAN_TAN:
1770 case UNSPEC_XTRACT_EXP:
1771 /* These insns operate on the top two stack slots,
1772 second part of one input, double output insn. */
1774 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1776 emit_swap_insn (insn, regstack, *src1);
1778 /* Input should never die, it is
1779 replaced with output. */
1780 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1781 gcc_assert (!src1_note);
1783 /* Push the result back onto stack. Fill empty slot from
1784 first part of insn and fix top of stack pointer. */
1785 if (STACK_REG_P (*dest)) {
1786 regstack->reg[regstack->top] = REGNO (*dest);
1787 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1788 replace_reg (dest, FIRST_STACK_REG + 1);
1790 regstack->top++;
1793 replace_reg (src1, FIRST_STACK_REG);
1794 break;
1796 case UNSPEC_SAHF:
1797 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1798 The combination matches the PPRO fcomi instruction. */
1800 pat_src = XVECEXP (pat_src, 0, 0);
1801 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1802 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1803 /* Fall through. */
1805 case UNSPEC_FNSTSW:
1806 /* Combined fcomp+fnstsw generated for doing well with
1807 CSE. When optimizing this would have been broken
1808 up before now. */
1810 pat_src = XVECEXP (pat_src, 0, 0);
1811 gcc_assert (GET_CODE (pat_src) == COMPARE);
1813 compare_for_stack_reg (insn, regstack, pat_src);
1814 break;
1816 default:
1817 gcc_unreachable ();
1819 break;
1821 case IF_THEN_ELSE:
1822 /* This insn requires the top of stack to be the destination. */
1824 src1 = get_true_reg (&XEXP (pat_src, 1));
1825 src2 = get_true_reg (&XEXP (pat_src, 2));
1827 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1828 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1830 /* If the comparison operator is an FP comparison operator,
1831 it is handled correctly by compare_for_stack_reg () who
1832 will move the destination to the top of stack. But if the
1833 comparison operator is not an FP comparison operator, we
1834 have to handle it here. */
1835 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1836 && REGNO (*dest) != regstack->reg[regstack->top])
1838 /* In case one of operands is the top of stack and the operands
1839 dies, it is safe to make it the destination operand by
1840 reversing the direction of cmove and avoid fxch. */
1841 if ((REGNO (*src1) == regstack->reg[regstack->top]
1842 && src1_note)
1843 || (REGNO (*src2) == regstack->reg[regstack->top]
1844 && src2_note))
1846 int idx1 = (get_hard_regnum (regstack, *src1)
1847 - FIRST_STACK_REG);
1848 int idx2 = (get_hard_regnum (regstack, *src2)
1849 - FIRST_STACK_REG);
1851 /* Make reg-stack believe that the operands are already
1852 swapped on the stack */
1853 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1854 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1856 /* Reverse condition to compensate the operand swap.
1857 i386 do have comparison always reversible. */
1858 PUT_CODE (XEXP (pat_src, 0),
1859 reversed_comparison_code (XEXP (pat_src, 0), insn));
1861 else
1862 emit_swap_insn (insn, regstack, *dest);
1866 rtx src_note [3];
1867 int i;
1869 src_note[0] = 0;
1870 src_note[1] = src1_note;
1871 src_note[2] = src2_note;
1873 if (STACK_REG_P (*src1))
1874 replace_reg (src1, get_hard_regnum (regstack, *src1));
1875 if (STACK_REG_P (*src2))
1876 replace_reg (src2, get_hard_regnum (regstack, *src2));
1878 for (i = 1; i <= 2; i++)
1879 if (src_note [i])
1881 int regno = REGNO (XEXP (src_note[i], 0));
1883 /* If the register that dies is not at the top of
1884 stack, then move the top of stack to the dead reg.
1885 Top of stack should never die, as it is the
1886 destination. */
1887 gcc_assert (regno != regstack->reg[regstack->top]);
1888 remove_regno_note (insn, REG_DEAD, regno);
1889 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1890 EMIT_AFTER);
1894 /* Make dest the top of stack. Add dest to regstack if
1895 not present. */
1896 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1897 regstack->reg[++regstack->top] = REGNO (*dest);
1898 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1899 replace_reg (dest, FIRST_STACK_REG);
1900 break;
1902 default:
1903 gcc_unreachable ();
1905 break;
1908 default:
1909 break;
1912 return control_flow_insn_deleted;
1915 /* Substitute hard regnums for any stack regs in INSN, which has
1916 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1917 before the insn, and is updated with changes made here.
1919 There are several requirements and assumptions about the use of
1920 stack-like regs in asm statements. These rules are enforced by
1921 record_asm_stack_regs; see comments there for details. Any
1922 asm_operands left in the RTL at this point may be assume to meet the
1923 requirements, since record_asm_stack_regs removes any problem asm. */
1925 static void
1926 subst_asm_stack_regs (rtx insn, stack regstack)
1928 rtx body = PATTERN (insn);
1929 int alt;
1931 rtx *note_reg; /* Array of note contents */
1932 rtx **note_loc; /* Address of REG field of each note */
1933 enum reg_note *note_kind; /* The type of each note */
1935 rtx *clobber_reg = 0;
1936 rtx **clobber_loc = 0;
1938 struct stack_def temp_stack;
1939 int n_notes;
1940 int n_clobbers;
1941 rtx note;
1942 int i;
1943 int n_inputs, n_outputs;
1945 if (! check_asm_stack_operands (insn))
1946 return;
1948 /* Find out what the constraints required. If no constraint
1949 alternative matches, that is a compiler bug: we should have caught
1950 such an insn in check_asm_stack_operands. */
1951 extract_insn (insn);
1952 constrain_operands (1);
1953 alt = which_alternative;
1955 preprocess_constraints ();
1957 n_inputs = get_asm_operand_n_inputs (body);
1958 n_outputs = recog_data.n_operands - n_inputs;
1960 gcc_assert (alt >= 0);
1962 /* Strip SUBREGs here to make the following code simpler. */
1963 for (i = 0; i < recog_data.n_operands; i++)
1964 if (GET_CODE (recog_data.operand[i]) == SUBREG
1965 && REG_P (SUBREG_REG (recog_data.operand[i])))
1967 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1968 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1971 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1973 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1974 i++;
1976 note_reg = alloca (i * sizeof (rtx));
1977 note_loc = alloca (i * sizeof (rtx *));
1978 note_kind = alloca (i * sizeof (enum reg_note));
1980 n_notes = 0;
1981 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1983 rtx reg = XEXP (note, 0);
1984 rtx *loc = & XEXP (note, 0);
1986 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
1988 loc = & SUBREG_REG (reg);
1989 reg = SUBREG_REG (reg);
1992 if (STACK_REG_P (reg)
1993 && (REG_NOTE_KIND (note) == REG_DEAD
1994 || REG_NOTE_KIND (note) == REG_UNUSED))
1996 note_reg[n_notes] = reg;
1997 note_loc[n_notes] = loc;
1998 note_kind[n_notes] = REG_NOTE_KIND (note);
1999 n_notes++;
2003 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2005 n_clobbers = 0;
2007 if (GET_CODE (body) == PARALLEL)
2009 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2010 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2012 for (i = 0; i < XVECLEN (body, 0); i++)
2013 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2015 rtx clobber = XVECEXP (body, 0, i);
2016 rtx reg = XEXP (clobber, 0);
2017 rtx *loc = & XEXP (clobber, 0);
2019 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2021 loc = & SUBREG_REG (reg);
2022 reg = SUBREG_REG (reg);
2025 if (STACK_REG_P (reg))
2027 clobber_reg[n_clobbers] = reg;
2028 clobber_loc[n_clobbers] = loc;
2029 n_clobbers++;
2034 temp_stack = *regstack;
2036 /* Put the input regs into the desired place in TEMP_STACK. */
2038 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2039 if (STACK_REG_P (recog_data.operand[i])
2040 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2041 FLOAT_REGS)
2042 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2044 /* If an operand needs to be in a particular reg in
2045 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2046 these constraints are for single register classes, and
2047 reload guaranteed that operand[i] is already in that class,
2048 we can just use REGNO (recog_data.operand[i]) to know which
2049 actual reg this operand needs to be in. */
2051 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2053 gcc_assert (regno >= 0);
2055 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2057 /* recog_data.operand[i] is not in the right place. Find
2058 it and swap it with whatever is already in I's place.
2059 K is where recog_data.operand[i] is now. J is where it
2060 should be. */
2061 int j, k, temp;
2063 k = temp_stack.top - (regno - FIRST_STACK_REG);
2064 j = (temp_stack.top
2065 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2067 temp = temp_stack.reg[k];
2068 temp_stack.reg[k] = temp_stack.reg[j];
2069 temp_stack.reg[j] = temp;
2073 /* Emit insns before INSN to make sure the reg-stack is in the right
2074 order. */
2076 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2078 /* Make the needed input register substitutions. Do death notes and
2079 clobbers too, because these are for inputs, not outputs. */
2081 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2082 if (STACK_REG_P (recog_data.operand[i]))
2084 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2086 gcc_assert (regnum >= 0);
2088 replace_reg (recog_data.operand_loc[i], regnum);
2091 for (i = 0; i < n_notes; i++)
2092 if (note_kind[i] == REG_DEAD)
2094 int regnum = get_hard_regnum (regstack, note_reg[i]);
2096 gcc_assert (regnum >= 0);
2098 replace_reg (note_loc[i], regnum);
2101 for (i = 0; i < n_clobbers; i++)
2103 /* It's OK for a CLOBBER to reference a reg that is not live.
2104 Don't try to replace it in that case. */
2105 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2107 if (regnum >= 0)
2109 /* Sigh - clobbers always have QImode. But replace_reg knows
2110 that these regs can't be MODE_INT and will assert. Just put
2111 the right reg there without calling replace_reg. */
2113 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2117 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2119 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2120 if (STACK_REG_P (recog_data.operand[i]))
2122 /* An input reg is implicitly popped if it is tied to an
2123 output, or if there is a CLOBBER for it. */
2124 int j;
2126 for (j = 0; j < n_clobbers; j++)
2127 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2128 break;
2130 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2132 /* recog_data.operand[i] might not be at the top of stack.
2133 But that's OK, because all we need to do is pop the
2134 right number of regs off of the top of the reg-stack.
2135 record_asm_stack_regs guaranteed that all implicitly
2136 popped regs were grouped at the top of the reg-stack. */
2138 CLEAR_HARD_REG_BIT (regstack->reg_set,
2139 regstack->reg[regstack->top]);
2140 regstack->top--;
2144 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2145 Note that there isn't any need to substitute register numbers.
2146 ??? Explain why this is true. */
2148 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2150 /* See if there is an output for this hard reg. */
2151 int j;
2153 for (j = 0; j < n_outputs; j++)
2154 if (STACK_REG_P (recog_data.operand[j])
2155 && REGNO (recog_data.operand[j]) == (unsigned) i)
2157 regstack->reg[++regstack->top] = i;
2158 SET_HARD_REG_BIT (regstack->reg_set, i);
2159 break;
2163 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2164 input that the asm didn't implicitly pop. If the asm didn't
2165 implicitly pop an input reg, that reg will still be live.
2167 Note that we can't use find_regno_note here: the register numbers
2168 in the death notes have already been substituted. */
2170 for (i = 0; i < n_outputs; i++)
2171 if (STACK_REG_P (recog_data.operand[i]))
2173 int j;
2175 for (j = 0; j < n_notes; j++)
2176 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2177 && note_kind[j] == REG_UNUSED)
2179 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2180 EMIT_AFTER);
2181 break;
2185 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2186 if (STACK_REG_P (recog_data.operand[i]))
2188 int j;
2190 for (j = 0; j < n_notes; j++)
2191 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2192 && note_kind[j] == REG_DEAD
2193 && TEST_HARD_REG_BIT (regstack->reg_set,
2194 REGNO (recog_data.operand[i])))
2196 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2197 EMIT_AFTER);
2198 break;
2203 /* Substitute stack hard reg numbers for stack virtual registers in
2204 INSN. Non-stack register numbers are not changed. REGSTACK is the
2205 current stack content. Insns may be emitted as needed to arrange the
2206 stack for the 387 based on the contents of the insn. Return whether
2207 a control flow insn was deleted in the process. */
2209 static bool
2210 subst_stack_regs (rtx insn, stack regstack)
2212 rtx *note_link, note;
2213 bool control_flow_insn_deleted = false;
2214 int i;
2216 if (CALL_P (insn))
2218 int top = regstack->top;
2220 /* If there are any floating point parameters to be passed in
2221 registers for this call, make sure they are in the right
2222 order. */
2224 if (top >= 0)
2226 straighten_stack (insn, regstack);
2228 /* Now mark the arguments as dead after the call. */
2230 while (regstack->top >= 0)
2232 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2233 regstack->top--;
2238 /* Do the actual substitution if any stack regs are mentioned.
2239 Since we only record whether entire insn mentions stack regs, and
2240 subst_stack_regs_pat only works for patterns that contain stack regs,
2241 we must check each pattern in a parallel here. A call_value_pop could
2242 fail otherwise. */
2244 if (stack_regs_mentioned (insn))
2246 int n_operands = asm_noperands (PATTERN (insn));
2247 if (n_operands >= 0)
2249 /* This insn is an `asm' with operands. Decode the operands,
2250 decide how many are inputs, and do register substitution.
2251 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2253 subst_asm_stack_regs (insn, regstack);
2254 return control_flow_insn_deleted;
2257 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2258 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2260 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2262 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2263 XVECEXP (PATTERN (insn), 0, i)
2264 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2265 control_flow_insn_deleted
2266 |= subst_stack_regs_pat (insn, regstack,
2267 XVECEXP (PATTERN (insn), 0, i));
2270 else
2271 control_flow_insn_deleted
2272 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2275 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2276 REG_UNUSED will already have been dealt with, so just return. */
2278 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2279 return control_flow_insn_deleted;
2281 /* If there is a REG_UNUSED note on a stack register on this insn,
2282 the indicated reg must be popped. The REG_UNUSED note is removed,
2283 since the form of the newly emitted pop insn references the reg,
2284 making it no longer `unset'. */
2286 note_link = &REG_NOTES (insn);
2287 for (note = *note_link; note; note = XEXP (note, 1))
2288 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2290 *note_link = XEXP (note, 1);
2291 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2293 else
2294 note_link = &XEXP (note, 1);
2296 return control_flow_insn_deleted;
2299 /* Change the organization of the stack so that it fits a new basic
2300 block. Some registers might have to be popped, but there can never be
2301 a register live in the new block that is not now live.
2303 Insert any needed insns before or after INSN, as indicated by
2304 WHERE. OLD is the original stack layout, and NEW is the desired
2305 form. OLD is updated to reflect the code emitted, i.e., it will be
2306 the same as NEW upon return.
2308 This function will not preserve block_end[]. But that information
2309 is no longer needed once this has executed. */
2311 static void
2312 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2314 int reg;
2315 int update_end = 0;
2317 /* Stack adjustments for the first insn in a block update the
2318 current_block's stack_in instead of inserting insns directly.
2319 compensate_edges will add the necessary code later. */
2320 if (current_block
2321 && starting_stack_p
2322 && where == EMIT_BEFORE)
2324 BLOCK_INFO (current_block)->stack_in = *new;
2325 starting_stack_p = false;
2326 *old = *new;
2327 return;
2330 /* We will be inserting new insns "backwards". If we are to insert
2331 after INSN, find the next insn, and insert before it. */
2333 if (where == EMIT_AFTER)
2335 if (current_block && BB_END (current_block) == insn)
2336 update_end = 1;
2337 insn = NEXT_INSN (insn);
2340 /* Pop any registers that are not needed in the new block. */
2342 /* If the destination block's stack already has a specified layout
2343 and contains two or more registers, use a more intelligent algorithm
2344 to pop registers that minimizes the number number of fxchs below. */
2345 if (new->top > 0)
2347 bool slots[REG_STACK_SIZE];
2348 int pops[REG_STACK_SIZE];
2349 int next, dest, topsrc;
2351 /* First pass to determine the free slots. */
2352 for (reg = 0; reg <= new->top; reg++)
2353 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2355 /* Second pass to allocate preferred slots. */
2356 topsrc = -1;
2357 for (reg = old->top; reg > new->top; reg--)
2358 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2360 dest = -1;
2361 for (next = 0; next <= new->top; next++)
2362 if (!slots[next] && new->reg[next] == old->reg[reg])
2364 /* If this is a preference for the new top of stack, record
2365 the fact by remembering it's old->reg in topsrc. */
2366 if (next == new->top)
2367 topsrc = reg;
2368 slots[next] = true;
2369 dest = next;
2370 break;
2372 pops[reg] = dest;
2374 else
2375 pops[reg] = reg;
2377 /* Intentionally, avoid placing the top of stack in it's correct
2378 location, if we still need to permute the stack below and we
2379 can usefully place it somewhere else. This is the case if any
2380 slot is still unallocated, in which case we should place the
2381 top of stack there. */
2382 if (topsrc != -1)
2383 for (reg = 0; reg < new->top; reg++)
2384 if (!slots[reg])
2386 pops[topsrc] = reg;
2387 slots[new->top] = false;
2388 slots[reg] = true;
2389 break;
2392 /* Third pass allocates remaining slots and emits pop insns. */
2393 next = new->top;
2394 for (reg = old->top; reg > new->top; reg--)
2396 dest = pops[reg];
2397 if (dest == -1)
2399 /* Find next free slot. */
2400 while (slots[next])
2401 next--;
2402 dest = next--;
2404 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2405 EMIT_BEFORE);
2408 else
2410 /* The following loop attempts to maximize the number of times we
2411 pop the top of the stack, as this permits the use of the faster
2412 ffreep instruction on platforms that support it. */
2413 int live, next;
2415 live = 0;
2416 for (reg = 0; reg <= old->top; reg++)
2417 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2418 live++;
2420 next = live;
2421 while (old->top >= live)
2422 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2424 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next]))
2425 next--;
2426 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2427 EMIT_BEFORE);
2429 else
2430 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2431 EMIT_BEFORE);
2434 if (new->top == -2)
2436 /* If the new block has never been processed, then it can inherit
2437 the old stack order. */
2439 new->top = old->top;
2440 memcpy (new->reg, old->reg, sizeof (new->reg));
2442 else
2444 /* This block has been entered before, and we must match the
2445 previously selected stack order. */
2447 /* By now, the only difference should be the order of the stack,
2448 not their depth or liveliness. */
2450 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2451 gcc_unreachable ();
2452 win:
2453 gcc_assert (old->top == new->top);
2455 /* If the stack is not empty (new->top != -1), loop here emitting
2456 swaps until the stack is correct.
2458 The worst case number of swaps emitted is N + 2, where N is the
2459 depth of the stack. In some cases, the reg at the top of
2460 stack may be correct, but swapped anyway in order to fix
2461 other regs. But since we never swap any other reg away from
2462 its correct slot, this algorithm will converge. */
2464 if (new->top != -1)
2467 /* Swap the reg at top of stack into the position it is
2468 supposed to be in, until the correct top of stack appears. */
2470 while (old->reg[old->top] != new->reg[new->top])
2472 for (reg = new->top; reg >= 0; reg--)
2473 if (new->reg[reg] == old->reg[old->top])
2474 break;
2476 gcc_assert (reg != -1);
2478 emit_swap_insn (insn, old,
2479 FP_MODE_REG (old->reg[reg], DFmode));
2482 /* See if any regs remain incorrect. If so, bring an
2483 incorrect reg to the top of stack, and let the while loop
2484 above fix it. */
2486 for (reg = new->top; reg >= 0; reg--)
2487 if (new->reg[reg] != old->reg[reg])
2489 emit_swap_insn (insn, old,
2490 FP_MODE_REG (old->reg[reg], DFmode));
2491 break;
2493 } while (reg >= 0);
2495 /* At this point there must be no differences. */
2497 for (reg = old->top; reg >= 0; reg--)
2498 gcc_assert (old->reg[reg] == new->reg[reg]);
2501 if (update_end)
2502 BB_END (current_block) = PREV_INSN (insn);
2505 /* Print stack configuration. */
2507 static void
2508 print_stack (FILE *file, stack s)
2510 if (! file)
2511 return;
2513 if (s->top == -2)
2514 fprintf (file, "uninitialized\n");
2515 else if (s->top == -1)
2516 fprintf (file, "empty\n");
2517 else
2519 int i;
2520 fputs ("[ ", file);
2521 for (i = 0; i <= s->top; ++i)
2522 fprintf (file, "%d ", s->reg[i]);
2523 fputs ("]\n", file);
2527 /* This function was doing life analysis. We now let the regular live
2528 code do it's job, so we only need to check some extra invariants
2529 that reg-stack expects. Primary among these being that all registers
2530 are initialized before use.
2532 The function returns true when code was emitted to CFG edges and
2533 commit_edge_insertions needs to be called. */
2535 static int
2536 convert_regs_entry (void)
2538 int inserted = 0;
2539 edge e;
2540 edge_iterator ei;
2542 /* Load something into each stack register live at function entry.
2543 Such live registers can be caused by uninitialized variables or
2544 functions not returning values on all paths. In order to keep
2545 the push/pop code happy, and to not scrog the register stack, we
2546 must put something in these registers. Use a QNaN.
2548 Note that we are inserting converted code here. This code is
2549 never seen by the convert_regs pass. */
2551 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2553 basic_block block = e->dest;
2554 block_info bi = BLOCK_INFO (block);
2555 int reg, top = -1;
2557 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2558 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2560 rtx init;
2562 bi->stack_in.reg[++top] = reg;
2564 init = gen_rtx_SET (VOIDmode,
2565 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2566 not_a_num);
2567 insert_insn_on_edge (init, e);
2568 inserted = 1;
2571 bi->stack_in.top = top;
2574 return inserted;
2577 /* Construct the desired stack for function exit. This will either
2578 be `empty', or the function return value at top-of-stack. */
2580 static void
2581 convert_regs_exit (void)
2583 int value_reg_low, value_reg_high;
2584 stack output_stack;
2585 rtx retvalue;
2587 retvalue = stack_result (current_function_decl);
2588 value_reg_low = value_reg_high = -1;
2589 if (retvalue)
2591 value_reg_low = REGNO (retvalue);
2592 value_reg_high = value_reg_low
2593 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2596 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2597 if (value_reg_low == -1)
2598 output_stack->top = -1;
2599 else
2601 int reg;
2603 output_stack->top = value_reg_high - value_reg_low;
2604 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2606 output_stack->reg[value_reg_high - reg] = reg;
2607 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2612 /* Copy the stack info from the end of edge E's source block to the
2613 start of E's destination block. */
2615 static void
2616 propagate_stack (edge e)
2618 stack src_stack = &BLOCK_INFO (e->src)->stack_out;
2619 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2620 int reg;
2622 /* Preserve the order of the original stack, but check whether
2623 any pops are needed. */
2624 dest_stack->top = -1;
2625 for (reg = 0; reg <= src_stack->top; ++reg)
2626 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2627 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2631 /* Adjust the stack of edge E's source block on exit to match the stack
2632 of it's target block upon input. The stack layouts of both blocks
2633 should have been defined by now. */
2635 static bool
2636 compensate_edge (edge e)
2638 basic_block source = e->src, target = e->dest;
2639 stack target_stack = &BLOCK_INFO (target)->stack_in;
2640 stack source_stack = &BLOCK_INFO (source)->stack_out;
2641 struct stack_def regstack;
2642 int reg;
2644 if (dump_file)
2645 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2647 gcc_assert (target_stack->top != -2);
2649 /* Check whether stacks are identical. */
2650 if (target_stack->top == source_stack->top)
2652 for (reg = target_stack->top; reg >= 0; --reg)
2653 if (target_stack->reg[reg] != source_stack->reg[reg])
2654 break;
2656 if (reg == -1)
2658 if (dump_file)
2659 fprintf (dump_file, "no changes needed\n");
2660 return false;
2664 if (dump_file)
2666 fprintf (dump_file, "correcting stack to ");
2667 print_stack (dump_file, target_stack);
2670 /* Abnormal calls may appear to have values live in st(0), but the
2671 abnormal return path will not have actually loaded the values. */
2672 if (e->flags & EDGE_ABNORMAL_CALL)
2674 /* Assert that the lifetimes are as we expect -- one value
2675 live at st(0) on the end of the source block, and no
2676 values live at the beginning of the destination block.
2677 For complex return values, we may have st(1) live as well. */
2678 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2679 gcc_assert (target_stack->top == -1);
2680 return false;
2683 /* Handle non-call EH edges specially. The normal return path have
2684 values in registers. These will be popped en masse by the unwind
2685 library. */
2686 if (e->flags & EDGE_EH)
2688 gcc_assert (target_stack->top == -1);
2689 return false;
2692 /* We don't support abnormal edges. Global takes care to
2693 avoid any live register across them, so we should never
2694 have to insert instructions on such edges. */
2695 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2697 /* Make a copy of source_stack as change_stack is destructive. */
2698 regstack = *source_stack;
2700 /* It is better to output directly to the end of the block
2701 instead of to the edge, because emit_swap can do minimal
2702 insn scheduling. We can do this when there is only one
2703 edge out, and it is not abnormal. */
2704 if (EDGE_COUNT (source->succs) == 1)
2706 current_block = source;
2707 change_stack (BB_END (source), &regstack, target_stack,
2708 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2710 else
2712 rtx seq, after;
2714 current_block = NULL;
2715 start_sequence ();
2717 /* ??? change_stack needs some point to emit insns after. */
2718 after = emit_note (NOTE_INSN_DELETED);
2720 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2722 seq = get_insns ();
2723 end_sequence ();
2725 insert_insn_on_edge (seq, e);
2726 return true;
2728 return false;
2731 /* Traverse all non-entry edges in the CFG, and emit the necessary
2732 edge compensation code to change the stack from stack_out of the
2733 source block to the stack_in of the destination block. */
2735 static bool
2736 compensate_edges (void)
2738 bool inserted = false;
2739 basic_block bb;
2741 starting_stack_p = false;
2743 FOR_EACH_BB (bb)
2744 if (bb != ENTRY_BLOCK_PTR)
2746 edge e;
2747 edge_iterator ei;
2749 FOR_EACH_EDGE (e, ei, bb->succs)
2750 inserted |= compensate_edge (e);
2752 return inserted;
2755 /* Select the better of two edges E1 and E2 to use to determine the
2756 stack layout for their shared destination basic block. This is
2757 typically the more frequently executed. The edge E1 may be NULL
2758 (in which case E2 is returned), but E2 is always non-NULL. */
2760 static edge
2761 better_edge (edge e1, edge e2)
2763 if (!e1)
2764 return e2;
2766 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2767 return e1;
2768 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2769 return e2;
2771 if (e1->count > e2->count)
2772 return e1;
2773 if (e1->count < e2->count)
2774 return e2;
2776 /* Prefer critical edges to minimize inserting compensation code on
2777 critical edges. */
2779 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2780 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2782 /* Avoid non-deterministic behavior. */
2783 return (e1->src->index < e2->src->index) ? e1 : e2;
2786 /* Convert stack register references in one block. */
2788 static void
2789 convert_regs_1 (basic_block block)
2791 struct stack_def regstack;
2792 block_info bi = BLOCK_INFO (block);
2793 int reg;
2794 rtx insn, next;
2795 bool control_flow_insn_deleted = false;
2797 any_malformed_asm = false;
2799 /* Choose an initial stack layout, if one hasn't already been chosen. */
2800 if (bi->stack_in.top == -2)
2802 edge e, beste = NULL;
2803 edge_iterator ei;
2805 /* Select the best incoming edge (typically the most frequent) to
2806 use as a template for this basic block. */
2807 FOR_EACH_EDGE (e, ei, block->preds)
2808 if (BLOCK_INFO (e->src)->done)
2809 beste = better_edge (beste, e);
2811 if (beste)
2812 propagate_stack (beste);
2813 else
2815 /* No predecessors. Create an arbitrary input stack. */
2816 bi->stack_in.top = -1;
2817 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2818 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2819 bi->stack_in.reg[++bi->stack_in.top] = reg;
2823 if (dump_file)
2825 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2826 print_stack (dump_file, &bi->stack_in);
2829 /* Process all insns in this block. Keep track of NEXT so that we
2830 don't process insns emitted while substituting in INSN. */
2831 current_block = block;
2832 next = BB_HEAD (block);
2833 regstack = bi->stack_in;
2834 starting_stack_p = true;
2838 insn = next;
2839 next = NEXT_INSN (insn);
2841 /* Ensure we have not missed a block boundary. */
2842 gcc_assert (next);
2843 if (insn == BB_END (block))
2844 next = NULL;
2846 /* Don't bother processing unless there is a stack reg
2847 mentioned or if it's a CALL_INSN. */
2848 if (stack_regs_mentioned (insn)
2849 || CALL_P (insn))
2851 if (dump_file)
2853 fprintf (dump_file, " insn %d input stack: ",
2854 INSN_UID (insn));
2855 print_stack (dump_file, &regstack);
2857 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2858 starting_stack_p = false;
2861 while (next);
2863 if (dump_file)
2865 fprintf (dump_file, "Expected live registers [");
2866 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2867 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2868 fprintf (dump_file, " %d", reg);
2869 fprintf (dump_file, " ]\nOutput stack: ");
2870 print_stack (dump_file, &regstack);
2873 insn = BB_END (block);
2874 if (JUMP_P (insn))
2875 insn = PREV_INSN (insn);
2877 /* If the function is declared to return a value, but it returns one
2878 in only some cases, some registers might come live here. Emit
2879 necessary moves for them. */
2881 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2883 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2884 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2886 rtx set;
2888 if (dump_file)
2889 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
2891 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2892 insn = emit_insn_after (set, insn);
2893 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2897 /* Amongst the insns possibly deleted during the substitution process above,
2898 might have been the only trapping insn in the block. We purge the now
2899 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2900 called at the end of convert_regs. The order in which we process the
2901 blocks ensures that we never delete an already processed edge.
2903 Note that, at this point, the CFG may have been damaged by the emission
2904 of instructions after an abnormal call, which moves the basic block end
2905 (and is the reason why we call fixup_abnormal_edges later). So we must
2906 be sure that the trapping insn has been deleted before trying to purge
2907 dead edges, otherwise we risk purging valid edges.
2909 ??? We are normally supposed not to delete trapping insns, so we pretend
2910 that the insns deleted above don't actually trap. It would have been
2911 better to detect this earlier and avoid creating the EH edge in the first
2912 place, still, but we don't have enough information at that time. */
2914 if (control_flow_insn_deleted)
2915 purge_dead_edges (block);
2917 /* Something failed if the stack lives don't match. If we had malformed
2918 asms, we zapped the instruction itself, but that didn't produce the
2919 same pattern of register kills as before. */
2920 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2921 gcc_assert (any_malformed_asm);
2922 win:
2923 bi->stack_out = regstack;
2924 bi->done = true;
2927 /* Convert registers in all blocks reachable from BLOCK. */
2929 static void
2930 convert_regs_2 (basic_block block)
2932 basic_block *stack, *sp;
2934 /* We process the blocks in a top-down manner, in a way such that one block
2935 is only processed after all its predecessors. The number of predecessors
2936 of every block has already been computed. */
2938 stack = XNEWVEC (basic_block, n_basic_blocks);
2939 sp = stack;
2941 *sp++ = block;
2945 edge e;
2946 edge_iterator ei;
2948 block = *--sp;
2950 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2951 some dead EH outgoing edge after the deletion of the trapping
2952 insn inside the block. Since the number of predecessors of
2953 BLOCK's successors was computed based on the initial edge set,
2954 we check the necessity to process some of these successors
2955 before such an edge deletion may happen. However, there is
2956 a pitfall: if BLOCK is the only predecessor of a successor and
2957 the edge between them happens to be deleted, the successor
2958 becomes unreachable and should not be processed. The problem
2959 is that there is no way to preventively detect this case so we
2960 stack the successor in all cases and hand over the task of
2961 fixing up the discrepancy to convert_regs_1. */
2963 FOR_EACH_EDGE (e, ei, block->succs)
2964 if (! (e->flags & EDGE_DFS_BACK))
2966 BLOCK_INFO (e->dest)->predecessors--;
2967 if (!BLOCK_INFO (e->dest)->predecessors)
2968 *sp++ = e->dest;
2971 convert_regs_1 (block);
2973 while (sp != stack);
2975 free (stack);
2978 /* Traverse all basic blocks in a function, converting the register
2979 references in each insn from the "flat" register file that gcc uses,
2980 to the stack-like registers the 387 uses. */
2982 static void
2983 convert_regs (void)
2985 int inserted;
2986 basic_block b;
2987 edge e;
2988 edge_iterator ei;
2990 /* Initialize uninitialized registers on function entry. */
2991 inserted = convert_regs_entry ();
2993 /* Construct the desired stack for function exit. */
2994 convert_regs_exit ();
2995 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2997 /* ??? Future: process inner loops first, and give them arbitrary
2998 initial stacks which emit_swap_insn can modify. This ought to
2999 prevent double fxch that often appears at the head of a loop. */
3001 /* Process all blocks reachable from all entry points. */
3002 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3003 convert_regs_2 (e->dest);
3005 /* ??? Process all unreachable blocks. Though there's no excuse
3006 for keeping these even when not optimizing. */
3007 FOR_EACH_BB (b)
3009 block_info bi = BLOCK_INFO (b);
3011 if (! bi->done)
3012 convert_regs_2 (b);
3015 inserted |= compensate_edges ();
3017 clear_aux_for_blocks ();
3019 fixup_abnormal_edges ();
3020 if (inserted)
3021 commit_edge_insertions ();
3023 if (dump_file)
3024 fputc ('\n', dump_file);
3027 /* Convert register usage from "flat" register file usage to a "stack
3028 register file. FILE is the dump file, if used.
3030 Construct a CFG and run life analysis. Then convert each insn one
3031 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3032 code duplication created when the converter inserts pop insns on
3033 the edges. */
3035 static bool
3036 reg_to_stack (void)
3038 basic_block bb;
3039 int i;
3040 int max_uid;
3042 /* Clean up previous run. */
3043 if (stack_regs_mentioned_data != NULL)
3044 VEC_free (char, heap, stack_regs_mentioned_data);
3046 /* See if there is something to do. Flow analysis is quite
3047 expensive so we might save some compilation time. */
3048 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3049 if (regs_ever_live[i])
3050 break;
3051 if (i > LAST_STACK_REG)
3052 return false;
3054 /* Ok, floating point instructions exist. If not optimizing,
3055 build the CFG and run life analysis.
3056 Also need to rebuild life when superblock scheduling is done
3057 as it don't update liveness yet. */
3058 if (!optimize
3059 || ((flag_sched2_use_superblocks || flag_sched2_use_traces)
3060 && flag_schedule_insns_after_reload))
3062 count_or_remove_death_notes (NULL, 1);
3063 life_analysis (PROP_DEATH_NOTES);
3065 mark_dfs_back_edges ();
3067 /* Set up block info for each basic block. */
3068 alloc_aux_for_blocks (sizeof (struct block_info_def));
3069 FOR_EACH_BB (bb)
3071 block_info bi = BLOCK_INFO (bb);
3072 edge_iterator ei;
3073 edge e;
3074 int reg;
3076 FOR_EACH_EDGE (e, ei, bb->preds)
3077 if (!(e->flags & EDGE_DFS_BACK)
3078 && e->src != ENTRY_BLOCK_PTR)
3079 bi->predecessors++;
3081 /* Set current register status at last instruction `uninitialized'. */
3082 bi->stack_in.top = -2;
3084 /* Copy live_at_end and live_at_start into temporaries. */
3085 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3087 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg))
3088 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3089 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg))
3090 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3094 /* Create the replacement registers up front. */
3095 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3097 enum machine_mode mode;
3098 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3099 mode != VOIDmode;
3100 mode = GET_MODE_WIDER_MODE (mode))
3101 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3102 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3103 mode != VOIDmode;
3104 mode = GET_MODE_WIDER_MODE (mode))
3105 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3108 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3110 /* A QNaN for initializing uninitialized variables.
3112 ??? We can't load from constant memory in PIC mode, because
3113 we're inserting these instructions before the prologue and
3114 the PIC register hasn't been set up. In that case, fall back
3115 on zero, which we can get from `ldz'. */
3117 if (flag_pic)
3118 not_a_num = CONST0_RTX (SFmode);
3119 else
3121 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
3122 not_a_num = force_const_mem (SFmode, not_a_num);
3125 /* Allocate a cache for stack_regs_mentioned. */
3126 max_uid = get_max_uid ();
3127 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1);
3128 memset (VEC_address (char, stack_regs_mentioned_data),
3129 0, sizeof (char) * max_uid + 1);
3131 convert_regs ();
3133 free_aux_for_blocks ();
3134 return true;
3136 #endif /* STACK_REGS */
3138 static bool
3139 gate_handle_stack_regs (void)
3141 #ifdef STACK_REGS
3142 return 1;
3143 #else
3144 return 0;
3145 #endif
3148 /* Convert register usage from flat register file usage to a stack
3149 register file. */
3150 static unsigned int
3151 rest_of_handle_stack_regs (void)
3153 #ifdef STACK_REGS
3154 if (reg_to_stack () && optimize)
3156 regstack_completed = 1;
3157 if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK
3158 | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0))
3159 && (flag_reorder_blocks || flag_reorder_blocks_and_partition))
3161 reorder_basic_blocks (0);
3162 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK);
3165 else
3166 regstack_completed = 1;
3167 #endif
3168 return 0;
3171 struct tree_opt_pass pass_stack_regs =
3173 "stack", /* name */
3174 gate_handle_stack_regs, /* gate */
3175 rest_of_handle_stack_regs, /* execute */
3176 NULL, /* sub */
3177 NULL, /* next */
3178 0, /* static_pass_number */
3179 TV_REG_STACK, /* tv_id */
3180 0, /* properties_required */
3181 0, /* properties_provided */
3182 0, /* properties_destroyed */
3183 0, /* todo_flags_start */
3184 TODO_dump_func |
3185 TODO_ggc_collect, /* todo_flags_finish */
3186 'k' /* letter */