1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
70 /* This is *not* reset after each function. It gives each CODE_LABEL
71 in the entire compilation a unique label number. */
73 static GTY(()) int label_num
= 1;
75 /* Nonzero means do not generate NOTEs for source line numbers. */
77 static int no_line_numbers
;
79 /* Commonly used rtx's, so that we only need space for one copy.
80 These are initialized once for the entire compilation.
81 All of these are unique; no other rtx-object will be equal to any
84 rtx global_rtl
[GR_MAX
];
86 /* Commonly used RTL for hard registers. These objects are not necessarily
87 unique, so we allocate them separately from global_rtl. They are
88 initialized once per compilation unit, then copied into regno_reg_rtx
89 at the beginning of each function. */
90 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx. */
96 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
100 REAL_VALUE_TYPE dconst0
;
101 REAL_VALUE_TYPE dconst1
;
102 REAL_VALUE_TYPE dconst2
;
103 REAL_VALUE_TYPE dconst3
;
104 REAL_VALUE_TYPE dconst10
;
105 REAL_VALUE_TYPE dconstm1
;
106 REAL_VALUE_TYPE dconstm2
;
107 REAL_VALUE_TYPE dconsthalf
;
108 REAL_VALUE_TYPE dconstthird
;
109 REAL_VALUE_TYPE dconstsqrt2
;
110 REAL_VALUE_TYPE dconste
;
112 /* Record fixed-point constant 0 and 1. */
113 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
114 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
116 /* All references to the following fixed hard registers go through
117 these unique rtl objects. On machines where the frame-pointer and
118 arg-pointer are the same register, they use the same unique object.
120 After register allocation, other rtl objects which used to be pseudo-regs
121 may be clobbered to refer to the frame-pointer register.
122 But references that were originally to the frame-pointer can be
123 distinguished from the others because they contain frame_pointer_rtx.
125 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
126 tricky: until register elimination has taken place hard_frame_pointer_rtx
127 should be used if it is being set, and frame_pointer_rtx otherwise. After
128 register elimination hard_frame_pointer_rtx should always be used.
129 On machines where the two registers are same (most) then these are the
132 In an inline procedure, the stack and frame pointer rtxs may not be
133 used for anything else. */
134 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
135 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
136 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
138 /* This is used to implement __builtin_return_address for some machines.
139 See for instance the MIPS port. */
140 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
142 /* We make one copy of (const_int C) where C is in
143 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
144 to save space during the compilation and simplify comparisons of
147 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
149 /* A hash table storing CONST_INTs whose absolute value is greater
150 than MAX_SAVED_CONST_INT. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
153 htab_t const_int_htab
;
155 /* A hash table storing memory attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
157 htab_t mem_attrs_htab
;
159 /* A hash table storing register attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
161 htab_t reg_attrs_htab
;
163 /* A hash table storing all CONST_DOUBLEs. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
165 htab_t const_double_htab
;
167 /* A hash table storing all CONST_FIXEDs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
169 htab_t const_fixed_htab
;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx
make_call_insn_raw (rtx
);
178 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
179 static void set_used_decls (tree
);
180 static void mark_label_nuses (rtx
);
181 static hashval_t
const_int_htab_hash (const void *);
182 static int const_int_htab_eq (const void *, const void *);
183 static hashval_t
const_double_htab_hash (const void *);
184 static int const_double_htab_eq (const void *, const void *);
185 static rtx
lookup_const_double (rtx
);
186 static hashval_t
const_fixed_htab_hash (const void *);
187 static int const_fixed_htab_eq (const void *, const void *);
188 static rtx
lookup_const_fixed (rtx
);
189 static hashval_t
mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs
*get_mem_attrs (alias_set_type
, tree
, rtx
, rtx
, unsigned int,
193 static hashval_t
reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs
*get_reg_attrs (tree
, int);
196 static tree
component_ref_for_mem_expr (tree
);
197 static rtx
gen_const_vector (enum machine_mode
, int);
198 static void copy_rtx_if_shared_1 (rtx
*orig
);
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability
= -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (const void *x
)
209 return (hashval_t
) INTVAL ((const_rtx
) x
);
212 /* Returns nonzero if the value represented by X (which is really a
213 CONST_INT) is the same as that given by Y (which is really a
217 const_int_htab_eq (const void *x
, const void *y
)
219 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
222 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
224 const_double_htab_hash (const void *x
)
226 const_rtx
const value
= (const_rtx
) x
;
229 if (GET_MODE (value
) == VOIDmode
)
230 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
233 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h
^= GET_MODE (value
);
240 /* Returns nonzero if the value represented by X (really a ...)
241 is the same as that represented by Y (really a ...) */
243 const_double_htab_eq (const void *x
, const void *y
)
245 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
247 if (GET_MODE (a
) != GET_MODE (b
))
249 if (GET_MODE (a
) == VOIDmode
)
250 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
251 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
253 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
254 CONST_DOUBLE_REAL_VALUE (b
));
257 /* Returns a hash code for X (which is really a CONST_FIXED). */
260 const_fixed_htab_hash (const void *x
)
262 const_rtx
const value
= (const_rtx
) x
;
265 h
= fixed_hash (CONST_FIXED_VALUE (value
));
266 /* MODE is used in the comparison, so it should be in the hash. */
267 h
^= GET_MODE (value
);
271 /* Returns nonzero if the value represented by X (really a ...)
272 is the same as that represented by Y (really a ...). */
275 const_fixed_htab_eq (const void *x
, const void *y
)
277 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
279 if (GET_MODE (a
) != GET_MODE (b
))
281 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
284 /* Returns a hash code for X (which is a really a mem_attrs *). */
287 mem_attrs_htab_hash (const void *x
)
289 const mem_attrs
*const p
= (const mem_attrs
*) x
;
291 return (p
->alias
^ (p
->align
* 1000)
292 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
293 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
294 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
297 /* Returns nonzero if the value represented by X (which is really a
298 mem_attrs *) is the same as that given by Y (which is also really a
302 mem_attrs_htab_eq (const void *x
, const void *y
)
304 const mem_attrs
*const p
= (const mem_attrs
*) x
;
305 const mem_attrs
*const q
= (const mem_attrs
*) y
;
307 return (p
->alias
== q
->alias
&& p
->offset
== q
->offset
308 && p
->size
== q
->size
&& p
->align
== q
->align
309 && (p
->expr
== q
->expr
310 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
311 && operand_equal_p (p
->expr
, q
->expr
, 0))));
314 /* Allocate a new mem_attrs structure and insert it into the hash table if
315 one identical to it is not already in the table. We are doing this for
319 get_mem_attrs (alias_set_type alias
, tree expr
, rtx offset
, rtx size
,
320 unsigned int align
, enum machine_mode mode
)
325 /* If everything is the default, we can just return zero.
326 This must match what the corresponding MEM_* macros return when the
327 field is not present. */
328 if (alias
== 0 && expr
== 0 && offset
== 0
330 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
331 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
332 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
337 attrs
.offset
= offset
;
341 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
344 *slot
= ggc_alloc (sizeof (mem_attrs
));
345 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
351 /* Returns a hash code for X (which is a really a reg_attrs *). */
354 reg_attrs_htab_hash (const void *x
)
356 const reg_attrs
*const p
= (const reg_attrs
*) x
;
358 return ((p
->offset
* 1000) ^ (long) p
->decl
);
361 /* Returns nonzero if the value represented by X (which is really a
362 reg_attrs *) is the same as that given by Y (which is also really a
366 reg_attrs_htab_eq (const void *x
, const void *y
)
368 const reg_attrs
*const p
= (const reg_attrs
*) x
;
369 const reg_attrs
*const q
= (const reg_attrs
*) y
;
371 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
373 /* Allocate a new reg_attrs structure and insert it into the hash table if
374 one identical to it is not already in the table. We are doing this for
378 get_reg_attrs (tree decl
, int offset
)
383 /* If everything is the default, we can just return zero. */
384 if (decl
== 0 && offset
== 0)
388 attrs
.offset
= offset
;
390 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
393 *slot
= ggc_alloc (sizeof (reg_attrs
));
394 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
402 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
408 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
409 MEM_VOLATILE_P (x
) = true;
415 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
416 don't attempt to share with the various global pieces of rtl (such as
417 frame_pointer_rtx). */
420 gen_raw_REG (enum machine_mode mode
, int regno
)
422 rtx x
= gen_rtx_raw_REG (mode
, regno
);
423 ORIGINAL_REGNO (x
) = regno
;
427 /* There are some RTL codes that require special attention; the generation
428 functions do the raw handling. If you add to this list, modify
429 special_rtx in gengenrtl.c as well. */
432 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
436 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
437 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
439 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
440 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
441 return const_true_rtx
;
444 /* Look up the CONST_INT in the hash table. */
445 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
446 (hashval_t
) arg
, INSERT
);
448 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
454 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
456 return GEN_INT (trunc_int_for_mode (c
, mode
));
459 /* CONST_DOUBLEs might be created from pairs of integers, or from
460 REAL_VALUE_TYPEs. Also, their length is known only at run time,
461 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
463 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
464 hash table. If so, return its counterpart; otherwise add it
465 to the hash table and return it. */
467 lookup_const_double (rtx real
)
469 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
476 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
477 VALUE in mode MODE. */
479 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
481 rtx real
= rtx_alloc (CONST_DOUBLE
);
482 PUT_MODE (real
, mode
);
486 return lookup_const_double (real
);
489 /* Determine whether FIXED, a CONST_FIXED, already exists in the
490 hash table. If so, return its counterpart; otherwise add it
491 to the hash table and return it. */
494 lookup_const_fixed (rtx fixed
)
496 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
503 /* Return a CONST_FIXED rtx for a fixed-point value specified by
504 VALUE in mode MODE. */
507 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
509 rtx fixed
= rtx_alloc (CONST_FIXED
);
510 PUT_MODE (fixed
, mode
);
514 return lookup_const_fixed (fixed
);
517 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
518 of ints: I0 is the low-order word and I1 is the high-order word.
519 Do not use this routine for non-integer modes; convert to
520 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
523 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
528 /* There are the following cases (note that there are no modes with
529 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
531 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
533 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
534 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
535 from copies of the sign bit, and sign of i0 and i1 are the same), then
536 we return a CONST_INT for i0.
537 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
538 if (mode
!= VOIDmode
)
540 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
541 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
542 /* We can get a 0 for an error mark. */
543 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
544 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
546 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
547 return gen_int_mode (i0
, mode
);
549 gcc_assert (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
);
552 /* If this integer fits in one word, return a CONST_INT. */
553 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
556 /* We use VOIDmode for integers. */
557 value
= rtx_alloc (CONST_DOUBLE
);
558 PUT_MODE (value
, VOIDmode
);
560 CONST_DOUBLE_LOW (value
) = i0
;
561 CONST_DOUBLE_HIGH (value
) = i1
;
563 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
564 XWINT (value
, i
) = 0;
566 return lookup_const_double (value
);
570 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
572 /* In case the MD file explicitly references the frame pointer, have
573 all such references point to the same frame pointer. This is
574 used during frame pointer elimination to distinguish the explicit
575 references to these registers from pseudos that happened to be
578 If we have eliminated the frame pointer or arg pointer, we will
579 be using it as a normal register, for example as a spill
580 register. In such cases, we might be accessing it in a mode that
581 is not Pmode and therefore cannot use the pre-allocated rtx.
583 Also don't do this when we are making new REGs in reload, since
584 we don't want to get confused with the real pointers. */
586 if (mode
== Pmode
&& !reload_in_progress
)
588 if (regno
== FRAME_POINTER_REGNUM
589 && (!reload_completed
|| frame_pointer_needed
))
590 return frame_pointer_rtx
;
591 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
592 if (regno
== HARD_FRAME_POINTER_REGNUM
593 && (!reload_completed
|| frame_pointer_needed
))
594 return hard_frame_pointer_rtx
;
596 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
597 if (regno
== ARG_POINTER_REGNUM
)
598 return arg_pointer_rtx
;
600 #ifdef RETURN_ADDRESS_POINTER_REGNUM
601 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
602 return return_address_pointer_rtx
;
604 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
605 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
606 return pic_offset_table_rtx
;
607 if (regno
== STACK_POINTER_REGNUM
)
608 return stack_pointer_rtx
;
612 /* If the per-function register table has been set up, try to re-use
613 an existing entry in that table to avoid useless generation of RTL.
615 This code is disabled for now until we can fix the various backends
616 which depend on having non-shared hard registers in some cases. Long
617 term we want to re-enable this code as it can significantly cut down
618 on the amount of useless RTL that gets generated.
620 We'll also need to fix some code that runs after reload that wants to
621 set ORIGINAL_REGNO. */
626 && regno
< FIRST_PSEUDO_REGISTER
627 && reg_raw_mode
[regno
] == mode
)
628 return regno_reg_rtx
[regno
];
631 return gen_raw_REG (mode
, regno
);
635 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
637 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
639 /* This field is not cleared by the mere allocation of the rtx, so
646 /* Generate a memory referring to non-trapping constant memory. */
649 gen_const_mem (enum machine_mode mode
, rtx addr
)
651 rtx mem
= gen_rtx_MEM (mode
, addr
);
652 MEM_READONLY_P (mem
) = 1;
653 MEM_NOTRAP_P (mem
) = 1;
657 /* Generate a MEM referring to fixed portions of the frame, e.g., register
661 gen_frame_mem (enum machine_mode mode
, rtx addr
)
663 rtx mem
= gen_rtx_MEM (mode
, addr
);
664 MEM_NOTRAP_P (mem
) = 1;
665 set_mem_alias_set (mem
, get_frame_alias_set ());
669 /* Generate a MEM referring to a temporary use of the stack, not part
670 of the fixed stack frame. For example, something which is pushed
671 by a target splitter. */
673 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
675 rtx mem
= gen_rtx_MEM (mode
, addr
);
676 MEM_NOTRAP_P (mem
) = 1;
677 if (!current_function_calls_alloca
)
678 set_mem_alias_set (mem
, get_frame_alias_set ());
682 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
683 this construct would be valid, and false otherwise. */
686 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
687 const_rtx reg
, unsigned int offset
)
689 unsigned int isize
= GET_MODE_SIZE (imode
);
690 unsigned int osize
= GET_MODE_SIZE (omode
);
692 /* All subregs must be aligned. */
693 if (offset
% osize
!= 0)
696 /* The subreg offset cannot be outside the inner object. */
700 /* ??? This should not be here. Temporarily continue to allow word_mode
701 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
702 Generally, backends are doing something sketchy but it'll take time to
704 if (omode
== word_mode
)
706 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
707 is the culprit here, and not the backends. */
708 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
710 /* Allow component subregs of complex and vector. Though given the below
711 extraction rules, it's not always clear what that means. */
712 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
713 && GET_MODE_INNER (imode
) == omode
)
715 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
716 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
717 represent this. It's questionable if this ought to be represented at
718 all -- why can't this all be hidden in post-reload splitters that make
719 arbitrarily mode changes to the registers themselves. */
720 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
722 /* Subregs involving floating point modes are not allowed to
723 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
724 (subreg:SI (reg:DF) 0) isn't. */
725 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
731 /* Paradoxical subregs must have offset zero. */
735 /* This is a normal subreg. Verify that the offset is representable. */
737 /* For hard registers, we already have most of these rules collected in
738 subreg_offset_representable_p. */
739 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
741 unsigned int regno
= REGNO (reg
);
743 #ifdef CANNOT_CHANGE_MODE_CLASS
744 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
745 && GET_MODE_INNER (imode
) == omode
)
747 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
751 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
754 /* For pseudo registers, we want most of the same checks. Namely:
755 If the register no larger than a word, the subreg must be lowpart.
756 If the register is larger than a word, the subreg must be the lowpart
757 of a subword. A subreg does *not* perform arbitrary bit extraction.
758 Given that we've already checked mode/offset alignment, we only have
759 to check subword subregs here. */
760 if (osize
< UNITS_PER_WORD
)
762 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
763 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
764 if (offset
% UNITS_PER_WORD
!= low_off
)
771 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
773 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
774 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
777 /* Generate a SUBREG representing the least-significant part of REG if MODE
778 is smaller than mode of REG, otherwise paradoxical SUBREG. */
781 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
783 enum machine_mode inmode
;
785 inmode
= GET_MODE (reg
);
786 if (inmode
== VOIDmode
)
788 return gen_rtx_SUBREG (mode
, reg
,
789 subreg_lowpart_offset (mode
, inmode
));
792 /* gen_rtvec (n, [rt1, ..., rtn])
794 ** This routine creates an rtvec and stores within it the
795 ** pointers to rtx's which are its arguments.
800 gen_rtvec (int n
, ...)
809 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
811 vector
= alloca (n
* sizeof (rtx
));
813 for (i
= 0; i
< n
; i
++)
814 vector
[i
] = va_arg (p
, rtx
);
816 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
820 return gen_rtvec_v (save_n
, vector
);
824 gen_rtvec_v (int n
, rtx
*argp
)
830 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
832 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
834 for (i
= 0; i
< n
; i
++)
835 rt_val
->elem
[i
] = *argp
++;
840 /* Generate a REG rtx for a new pseudo register of mode MODE.
841 This pseudo is assigned the next sequential register number. */
844 gen_reg_rtx (enum machine_mode mode
)
846 struct function
*f
= cfun
;
849 gcc_assert (can_create_pseudo_p ());
851 if (generating_concat_p
852 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
853 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
855 /* For complex modes, don't make a single pseudo.
856 Instead, make a CONCAT of two pseudos.
857 This allows noncontiguous allocation of the real and imaginary parts,
858 which makes much better code. Besides, allocating DCmode
859 pseudos overstrains reload on some machines like the 386. */
860 rtx realpart
, imagpart
;
861 enum machine_mode partmode
= GET_MODE_INNER (mode
);
863 realpart
= gen_reg_rtx (partmode
);
864 imagpart
= gen_reg_rtx (partmode
);
865 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
868 /* Make sure regno_pointer_align, and regno_reg_rtx are large
869 enough to have an element for this pseudo reg number. */
871 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
873 int old_size
= f
->emit
->regno_pointer_align_length
;
877 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
878 memset (new + old_size
, 0, old_size
);
879 f
->emit
->regno_pointer_align
= (unsigned char *) new;
881 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
882 old_size
* 2 * sizeof (rtx
));
883 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
884 regno_reg_rtx
= new1
;
886 f
->emit
->regno_pointer_align_length
= old_size
* 2;
889 val
= gen_raw_REG (mode
, reg_rtx_no
);
890 regno_reg_rtx
[reg_rtx_no
++] = val
;
894 /* Update NEW with the same attributes as REG, but offsetted by OFFSET.
895 Do the big endian correction if needed. */
898 update_reg_offset (rtx
new, rtx reg
, int offset
)
901 HOST_WIDE_INT var_size
;
903 /* PR middle-end/14084
904 The problem appears when a variable is stored in a larger register
905 and later it is used in the original mode or some mode in between
906 or some part of variable is accessed.
908 On little endian machines there is no problem because
909 the REG_OFFSET of the start of the variable is the same when
910 accessed in any mode (it is 0).
912 However, this is not true on big endian machines.
913 The offset of the start of the variable is different when accessed
915 When we are taking a part of the REG we have to change the OFFSET
916 from offset WRT size of mode of REG to offset WRT size of variable.
918 If we would not do the big endian correction the resulting REG_OFFSET
919 would be larger than the size of the DECL.
921 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
923 REG.mode MODE DECL size old offset new offset description
924 DI SI 4 4 0 int32 in SImode
925 DI SI 1 4 0 char in SImode
926 DI QI 1 7 0 char in QImode
927 DI QI 4 5 1 1st element in QImode
929 DI HI 4 6 2 1st element in HImode
932 If the size of DECL is equal or greater than the size of REG
933 we can't do this correction because the register holds the
934 whole variable or a part of the variable and thus the REG_OFFSET
935 is already correct. */
937 decl
= REG_EXPR (reg
);
938 if ((BYTES_BIG_ENDIAN
|| WORDS_BIG_ENDIAN
)
941 && GET_MODE_SIZE (GET_MODE (reg
)) > GET_MODE_SIZE (GET_MODE (new))
942 && ((var_size
= int_size_in_bytes (TREE_TYPE (decl
))) > 0
943 && var_size
< GET_MODE_SIZE (GET_MODE (reg
))))
947 /* Convert machine endian to little endian WRT size of mode of REG. */
948 if (WORDS_BIG_ENDIAN
)
949 offset_le
= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
950 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
952 offset_le
= (offset
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
954 if (BYTES_BIG_ENDIAN
)
955 offset_le
+= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
958 offset_le
+= offset
% UNITS_PER_WORD
;
960 if (offset_le
>= var_size
)
962 /* MODE is wider than the variable so the new reg will cover
963 the whole variable so the resulting OFFSET should be 0. */
968 /* Convert little endian to machine endian WRT size of variable. */
969 if (WORDS_BIG_ENDIAN
)
970 offset
= ((var_size
- 1 - offset_le
)
971 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
973 offset
= (offset_le
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
975 if (BYTES_BIG_ENDIAN
)
976 offset
+= ((var_size
- 1 - offset_le
)
979 offset
+= offset_le
% UNITS_PER_WORD
;
983 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
984 REG_OFFSET (reg
) + offset
);
987 /* Generate a register with same attributes as REG, but offsetted by
991 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
994 rtx
new = gen_rtx_REG (mode
, regno
);
996 update_reg_offset (new, reg
, offset
);
1000 /* Generate a new pseudo-register with the same attributes as REG, but
1001 offsetted by OFFSET. */
1004 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
1006 rtx
new = gen_reg_rtx (mode
);
1008 update_reg_offset (new, reg
, offset
);
1012 /* Set the decl for MEM to DECL. */
1015 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
1017 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
1019 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
1022 /* Set the register attributes for registers contained in PARM_RTX.
1023 Use needed values from memory attributes of MEM. */
1026 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1028 if (REG_P (parm_rtx
))
1029 set_reg_attrs_from_mem (parm_rtx
, mem
);
1030 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1032 /* Check for a NULL entry in the first slot, used to indicate that the
1033 parameter goes both on the stack and in registers. */
1034 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1035 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1037 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1038 if (REG_P (XEXP (x
, 0)))
1039 REG_ATTRS (XEXP (x
, 0))
1040 = get_reg_attrs (MEM_EXPR (mem
),
1041 INTVAL (XEXP (x
, 1)));
1046 /* Assign the RTX X to declaration T. */
1048 set_decl_rtl (tree t
, rtx x
)
1050 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1054 /* For register, we maintain the reverse information too. */
1056 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
1057 else if (GET_CODE (x
) == SUBREG
)
1058 REG_ATTRS (SUBREG_REG (x
))
1059 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
1060 if (GET_CODE (x
) == CONCAT
)
1062 if (REG_P (XEXP (x
, 0)))
1063 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1064 if (REG_P (XEXP (x
, 1)))
1065 REG_ATTRS (XEXP (x
, 1))
1066 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1068 if (GET_CODE (x
) == PARALLEL
)
1071 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
1073 rtx y
= XVECEXP (x
, 0, i
);
1074 if (REG_P (XEXP (y
, 0)))
1075 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1080 /* Assign the RTX X to parameter declaration T. */
1082 set_decl_incoming_rtl (tree t
, rtx x
)
1084 DECL_INCOMING_RTL (t
) = x
;
1088 /* For register, we maintain the reverse information too. */
1090 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
1091 else if (GET_CODE (x
) == SUBREG
)
1092 REG_ATTRS (SUBREG_REG (x
))
1093 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
1094 if (GET_CODE (x
) == CONCAT
)
1096 if (REG_P (XEXP (x
, 0)))
1097 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1098 if (REG_P (XEXP (x
, 1)))
1099 REG_ATTRS (XEXP (x
, 1))
1100 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1102 if (GET_CODE (x
) == PARALLEL
)
1106 /* Check for a NULL entry, used to indicate that the parameter goes
1107 both on the stack and in registers. */
1108 if (XEXP (XVECEXP (x
, 0, 0), 0))
1113 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1115 rtx y
= XVECEXP (x
, 0, i
);
1116 if (REG_P (XEXP (y
, 0)))
1117 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1122 /* Identify REG (which may be a CONCAT) as a user register. */
1125 mark_user_reg (rtx reg
)
1127 if (GET_CODE (reg
) == CONCAT
)
1129 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1130 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1134 gcc_assert (REG_P (reg
));
1135 REG_USERVAR_P (reg
) = 1;
1139 /* Identify REG as a probable pointer register and show its alignment
1140 as ALIGN, if nonzero. */
1143 mark_reg_pointer (rtx reg
, int align
)
1145 if (! REG_POINTER (reg
))
1147 REG_POINTER (reg
) = 1;
1150 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1152 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1153 /* We can no-longer be sure just how aligned this pointer is. */
1154 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1157 /* Return 1 plus largest pseudo reg number used in the current function. */
1165 /* Return 1 + the largest label number used so far in the current function. */
1168 max_label_num (void)
1173 /* Return first label number used in this function (if any were used). */
1176 get_first_label_num (void)
1178 return first_label_num
;
1181 /* If the rtx for label was created during the expansion of a nested
1182 function, then first_label_num won't include this label number.
1183 Fix this now so that array indicies work later. */
1186 maybe_set_first_label_num (rtx x
)
1188 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1189 first_label_num
= CODE_LABEL_NUMBER (x
);
1192 /* Return a value representing some low-order bits of X, where the number
1193 of low-order bits is given by MODE. Note that no conversion is done
1194 between floating-point and fixed-point values, rather, the bit
1195 representation is returned.
1197 This function handles the cases in common between gen_lowpart, below,
1198 and two variants in cse.c and combine.c. These are the cases that can
1199 be safely handled at all points in the compilation.
1201 If this is not a case we can handle, return 0. */
1204 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1206 int msize
= GET_MODE_SIZE (mode
);
1209 enum machine_mode innermode
;
1211 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1212 so we have to make one up. Yuk. */
1213 innermode
= GET_MODE (x
);
1214 if (GET_CODE (x
) == CONST_INT
1215 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1216 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1217 else if (innermode
== VOIDmode
)
1218 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1220 xsize
= GET_MODE_SIZE (innermode
);
1222 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1224 if (innermode
== mode
)
1227 /* MODE must occupy no more words than the mode of X. */
1228 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1229 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1232 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1233 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1236 offset
= subreg_lowpart_offset (mode
, innermode
);
1238 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1239 && (GET_MODE_CLASS (mode
) == MODE_INT
1240 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1242 /* If we are getting the low-order part of something that has been
1243 sign- or zero-extended, we can either just use the object being
1244 extended or make a narrower extension. If we want an even smaller
1245 piece than the size of the object being extended, call ourselves
1248 This case is used mostly by combine and cse. */
1250 if (GET_MODE (XEXP (x
, 0)) == mode
)
1252 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1253 return gen_lowpart_common (mode
, XEXP (x
, 0));
1254 else if (msize
< xsize
)
1255 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1257 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1258 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1259 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1260 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1262 /* Otherwise, we can't do this. */
1267 gen_highpart (enum machine_mode mode
, rtx x
)
1269 unsigned int msize
= GET_MODE_SIZE (mode
);
1272 /* This case loses if X is a subreg. To catch bugs early,
1273 complain if an invalid MODE is used even in other cases. */
1274 gcc_assert (msize
<= UNITS_PER_WORD
1275 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1277 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1278 subreg_highpart_offset (mode
, GET_MODE (x
)));
1279 gcc_assert (result
);
1281 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1282 the target if we have a MEM. gen_highpart must return a valid operand,
1283 emitting code if necessary to do so. */
1286 result
= validize_mem (result
);
1287 gcc_assert (result
);
1293 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1294 be VOIDmode constant. */
1296 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1298 if (GET_MODE (exp
) != VOIDmode
)
1300 gcc_assert (GET_MODE (exp
) == innermode
);
1301 return gen_highpart (outermode
, exp
);
1303 return simplify_gen_subreg (outermode
, exp
, innermode
,
1304 subreg_highpart_offset (outermode
, innermode
));
1307 /* Return offset in bytes to get OUTERMODE low part
1308 of the value in mode INNERMODE stored in memory in target format. */
1311 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1313 unsigned int offset
= 0;
1314 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1318 if (WORDS_BIG_ENDIAN
)
1319 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1320 if (BYTES_BIG_ENDIAN
)
1321 offset
+= difference
% UNITS_PER_WORD
;
1327 /* Return offset in bytes to get OUTERMODE high part
1328 of the value in mode INNERMODE stored in memory in target format. */
1330 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1332 unsigned int offset
= 0;
1333 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1335 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1339 if (! WORDS_BIG_ENDIAN
)
1340 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1341 if (! BYTES_BIG_ENDIAN
)
1342 offset
+= difference
% UNITS_PER_WORD
;
1348 /* Return 1 iff X, assumed to be a SUBREG,
1349 refers to the least significant part of its containing reg.
1350 If X is not a SUBREG, always return 1 (it is its own low part!). */
1353 subreg_lowpart_p (const_rtx x
)
1355 if (GET_CODE (x
) != SUBREG
)
1357 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1360 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1361 == SUBREG_BYTE (x
));
1364 /* Return subword OFFSET of operand OP.
1365 The word number, OFFSET, is interpreted as the word number starting
1366 at the low-order address. OFFSET 0 is the low-order word if not
1367 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1369 If we cannot extract the required word, we return zero. Otherwise,
1370 an rtx corresponding to the requested word will be returned.
1372 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1373 reload has completed, a valid address will always be returned. After
1374 reload, if a valid address cannot be returned, we return zero.
1376 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1377 it is the responsibility of the caller.
1379 MODE is the mode of OP in case it is a CONST_INT.
1381 ??? This is still rather broken for some cases. The problem for the
1382 moment is that all callers of this thing provide no 'goal mode' to
1383 tell us to work with. This exists because all callers were written
1384 in a word based SUBREG world.
1385 Now use of this function can be deprecated by simplify_subreg in most
1390 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1392 if (mode
== VOIDmode
)
1393 mode
= GET_MODE (op
);
1395 gcc_assert (mode
!= VOIDmode
);
1397 /* If OP is narrower than a word, fail. */
1399 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1402 /* If we want a word outside OP, return zero. */
1404 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1407 /* Form a new MEM at the requested address. */
1410 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1412 if (! validate_address
)
1415 else if (reload_completed
)
1417 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1421 return replace_equiv_address (new, XEXP (new, 0));
1424 /* Rest can be handled by simplify_subreg. */
1425 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1428 /* Similar to `operand_subword', but never return 0. If we can't
1429 extract the required subword, put OP into a register and try again.
1430 The second attempt must succeed. We always validate the address in
1433 MODE is the mode of OP, in case it is CONST_INT. */
1436 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1438 rtx result
= operand_subword (op
, offset
, 1, mode
);
1443 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1445 /* If this is a register which can not be accessed by words, copy it
1446 to a pseudo register. */
1448 op
= copy_to_reg (op
);
1450 op
= force_reg (mode
, op
);
1453 result
= operand_subword (op
, offset
, 1, mode
);
1454 gcc_assert (result
);
1459 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1460 or (2) a component ref of something variable. Represent the later with
1461 a NULL expression. */
1464 component_ref_for_mem_expr (tree ref
)
1466 tree inner
= TREE_OPERAND (ref
, 0);
1468 if (TREE_CODE (inner
) == COMPONENT_REF
)
1469 inner
= component_ref_for_mem_expr (inner
);
1472 /* Now remove any conversions: they don't change what the underlying
1473 object is. Likewise for SAVE_EXPR. */
1474 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1475 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1476 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1477 || TREE_CODE (inner
) == SAVE_EXPR
)
1478 inner
= TREE_OPERAND (inner
, 0);
1480 if (! DECL_P (inner
))
1484 if (inner
== TREE_OPERAND (ref
, 0))
1487 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1488 TREE_OPERAND (ref
, 1), NULL_TREE
);
1491 /* Returns 1 if both MEM_EXPR can be considered equal
1495 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1500 if (! expr1
|| ! expr2
)
1503 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1506 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1508 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1509 TREE_OPERAND (expr2
, 0))
1510 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1511 TREE_OPERAND (expr2
, 1));
1513 if (INDIRECT_REF_P (expr1
))
1514 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1515 TREE_OPERAND (expr2
, 0));
1517 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1518 have been resolved here. */
1519 gcc_assert (DECL_P (expr1
));
1521 /* Decls with different pointers can't be equal. */
1525 /* Given REF, a MEM, and T, either the type of X or the expression
1526 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1527 if we are making a new object of this type. BITPOS is nonzero if
1528 there is an offset outstanding on T that will be applied later. */
1531 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1532 HOST_WIDE_INT bitpos
)
1534 alias_set_type alias
= MEM_ALIAS_SET (ref
);
1535 tree expr
= MEM_EXPR (ref
);
1536 rtx offset
= MEM_OFFSET (ref
);
1537 rtx size
= MEM_SIZE (ref
);
1538 unsigned int align
= MEM_ALIGN (ref
);
1539 HOST_WIDE_INT apply_bitpos
= 0;
1542 /* It can happen that type_for_mode was given a mode for which there
1543 is no language-level type. In which case it returns NULL, which
1548 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1549 if (type
== error_mark_node
)
1552 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1553 wrong answer, as it assumes that DECL_RTL already has the right alias
1554 info. Callers should not set DECL_RTL until after the call to
1555 set_mem_attributes. */
1556 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1558 /* Get the alias set from the expression or type (perhaps using a
1559 front-end routine) and use it. */
1560 alias
= get_alias_set (t
);
1562 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1563 MEM_IN_STRUCT_P (ref
)
1564 = AGGREGATE_TYPE_P (type
) || TREE_CODE (type
) == COMPLEX_TYPE
;
1565 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1567 /* If we are making an object of this type, or if this is a DECL, we know
1568 that it is a scalar if the type is not an aggregate. */
1569 if ((objectp
|| DECL_P (t
))
1570 && ! AGGREGATE_TYPE_P (type
)
1571 && TREE_CODE (type
) != COMPLEX_TYPE
)
1572 MEM_SCALAR_P (ref
) = 1;
1574 /* We can set the alignment from the type if we are making an object,
1575 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1576 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1577 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1578 || TYPE_ALIGN_OK (type
))
1579 align
= MAX (align
, TYPE_ALIGN (type
));
1581 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1583 if (integer_zerop (TREE_OPERAND (t
, 1)))
1584 /* We don't know anything about the alignment. */
1585 align
= BITS_PER_UNIT
;
1587 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1590 /* If the size is known, we can set that. */
1591 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1592 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1594 /* If T is not a type, we may be able to deduce some more information about
1600 if (TREE_THIS_VOLATILE (t
))
1601 MEM_VOLATILE_P (ref
) = 1;
1603 /* Now remove any conversions: they don't change what the underlying
1604 object is. Likewise for SAVE_EXPR. */
1605 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1606 || TREE_CODE (t
) == NON_LVALUE_EXPR
1607 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1608 || TREE_CODE (t
) == SAVE_EXPR
)
1609 t
= TREE_OPERAND (t
, 0);
1611 /* We may look through structure-like accesses for the purposes of
1612 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1614 while (TREE_CODE (base
) == COMPONENT_REF
1615 || TREE_CODE (base
) == REALPART_EXPR
1616 || TREE_CODE (base
) == IMAGPART_EXPR
1617 || TREE_CODE (base
) == BIT_FIELD_REF
)
1618 base
= TREE_OPERAND (base
, 0);
1622 if (CODE_CONTAINS_STRUCT (TREE_CODE (base
), TS_DECL_WITH_VIS
))
1623 MEM_NOTRAP_P (ref
) = !DECL_WEAK (base
);
1625 MEM_NOTRAP_P (ref
) = 1;
1628 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (base
);
1630 base
= get_base_address (base
);
1631 if (base
&& DECL_P (base
)
1632 && TREE_READONLY (base
)
1633 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1635 tree base_type
= TREE_TYPE (base
);
1636 gcc_assert (!(base_type
&& TYPE_NEEDS_CONSTRUCTING (base_type
))
1637 || DECL_ARTIFICIAL (base
));
1638 MEM_READONLY_P (ref
) = 1;
1641 /* If this expression uses it's parent's alias set, mark it such
1642 that we won't change it. */
1643 if (component_uses_parent_alias_set (t
))
1644 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1646 /* If this is a decl, set the attributes of the MEM from it. */
1650 offset
= const0_rtx
;
1651 apply_bitpos
= bitpos
;
1652 size
= (DECL_SIZE_UNIT (t
)
1653 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1654 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1655 align
= DECL_ALIGN (t
);
1658 /* If this is a constant, we know the alignment. */
1659 else if (CONSTANT_CLASS_P (t
))
1661 align
= TYPE_ALIGN (type
);
1662 #ifdef CONSTANT_ALIGNMENT
1663 align
= CONSTANT_ALIGNMENT (t
, align
);
1667 /* If this is a field reference and not a bit-field, record it. */
1668 /* ??? There is some information that can be gleened from bit-fields,
1669 such as the word offset in the structure that might be modified.
1670 But skip it for now. */
1671 else if (TREE_CODE (t
) == COMPONENT_REF
1672 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1674 expr
= component_ref_for_mem_expr (t
);
1675 offset
= const0_rtx
;
1676 apply_bitpos
= bitpos
;
1677 /* ??? Any reason the field size would be different than
1678 the size we got from the type? */
1681 /* If this is an array reference, look for an outer field reference. */
1682 else if (TREE_CODE (t
) == ARRAY_REF
)
1684 tree off_tree
= size_zero_node
;
1685 /* We can't modify t, because we use it at the end of the
1691 tree index
= TREE_OPERAND (t2
, 1);
1692 tree low_bound
= array_ref_low_bound (t2
);
1693 tree unit_size
= array_ref_element_size (t2
);
1695 /* We assume all arrays have sizes that are a multiple of a byte.
1696 First subtract the lower bound, if any, in the type of the
1697 index, then convert to sizetype and multiply by the size of
1698 the array element. */
1699 if (! integer_zerop (low_bound
))
1700 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1703 off_tree
= size_binop (PLUS_EXPR
,
1704 size_binop (MULT_EXPR
,
1705 fold_convert (sizetype
,
1709 t2
= TREE_OPERAND (t2
, 0);
1711 while (TREE_CODE (t2
) == ARRAY_REF
);
1717 if (host_integerp (off_tree
, 1))
1719 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1720 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1721 align
= DECL_ALIGN (t2
);
1722 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1724 offset
= GEN_INT (ioff
);
1725 apply_bitpos
= bitpos
;
1728 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1730 expr
= component_ref_for_mem_expr (t2
);
1731 if (host_integerp (off_tree
, 1))
1733 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1734 apply_bitpos
= bitpos
;
1736 /* ??? Any reason the field size would be different than
1737 the size we got from the type? */
1739 else if (flag_argument_noalias
> 1
1740 && (INDIRECT_REF_P (t2
))
1741 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1748 /* If this is a Fortran indirect argument reference, record the
1750 else if (flag_argument_noalias
> 1
1751 && (INDIRECT_REF_P (t
))
1752 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1759 /* If we modified OFFSET based on T, then subtract the outstanding
1760 bit position offset. Similarly, increase the size of the accessed
1761 object to contain the negative offset. */
1764 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1766 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1769 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1771 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1772 we're overlapping. */
1777 /* Now set the attributes we computed above. */
1779 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1781 /* If this is already known to be a scalar or aggregate, we are done. */
1782 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1785 /* If it is a reference into an aggregate, this is part of an aggregate.
1786 Otherwise we don't know. */
1787 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1788 || TREE_CODE (t
) == ARRAY_RANGE_REF
1789 || TREE_CODE (t
) == BIT_FIELD_REF
)
1790 MEM_IN_STRUCT_P (ref
) = 1;
1794 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1796 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1799 /* Set the decl for MEM to DECL. */
1802 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1805 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1806 GEN_INT (REG_OFFSET (reg
)),
1807 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1810 /* Set the alias set of MEM to SET. */
1813 set_mem_alias_set (rtx mem
, alias_set_type set
)
1815 #ifdef ENABLE_CHECKING
1816 /* If the new and old alias sets don't conflict, something is wrong. */
1817 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1820 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1821 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1825 /* Set the alignment of MEM to ALIGN bits. */
1828 set_mem_align (rtx mem
, unsigned int align
)
1830 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1831 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1835 /* Set the expr for MEM to EXPR. */
1838 set_mem_expr (rtx mem
, tree expr
)
1841 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1842 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1845 /* Set the offset of MEM to OFFSET. */
1848 set_mem_offset (rtx mem
, rtx offset
)
1850 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1851 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1855 /* Set the size of MEM to SIZE. */
1858 set_mem_size (rtx mem
, rtx size
)
1860 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1861 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1865 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1866 and its address changed to ADDR. (VOIDmode means don't change the mode.
1867 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1868 returned memory location is required to be valid. The memory
1869 attributes are not changed. */
1872 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1876 gcc_assert (MEM_P (memref
));
1877 if (mode
== VOIDmode
)
1878 mode
= GET_MODE (memref
);
1880 addr
= XEXP (memref
, 0);
1881 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1882 && (!validate
|| memory_address_p (mode
, addr
)))
1887 if (reload_in_progress
|| reload_completed
)
1888 gcc_assert (memory_address_p (mode
, addr
));
1890 addr
= memory_address (mode
, addr
);
1893 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1896 new = gen_rtx_MEM (mode
, addr
);
1897 MEM_COPY_ATTRIBUTES (new, memref
);
1901 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1902 way we are changing MEMREF, so we only preserve the alias set. */
1905 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1907 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1908 enum machine_mode mmode
= GET_MODE (new);
1911 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1912 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1914 /* If there are no changes, just return the original memory reference. */
1917 if (MEM_ATTRS (memref
) == 0
1918 || (MEM_EXPR (memref
) == NULL
1919 && MEM_OFFSET (memref
) == NULL
1920 && MEM_SIZE (memref
) == size
1921 && MEM_ALIGN (memref
) == align
))
1924 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1925 MEM_COPY_ATTRIBUTES (new, memref
);
1929 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1934 /* Return a memory reference like MEMREF, but with its mode changed
1935 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1936 nonzero, the memory address is forced to be valid.
1937 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1938 and caller is responsible for adjusting MEMREF base register. */
1941 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1942 int validate
, int adjust
)
1944 rtx addr
= XEXP (memref
, 0);
1946 rtx memoffset
= MEM_OFFSET (memref
);
1948 unsigned int memalign
= MEM_ALIGN (memref
);
1950 /* If there are no changes, just return the original memory reference. */
1951 if (mode
== GET_MODE (memref
) && !offset
1952 && (!validate
|| memory_address_p (mode
, addr
)))
1955 /* ??? Prefer to create garbage instead of creating shared rtl.
1956 This may happen even if offset is nonzero -- consider
1957 (plus (plus reg reg) const_int) -- so do this always. */
1958 addr
= copy_rtx (addr
);
1962 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1963 object, we can merge it into the LO_SUM. */
1964 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1966 && (unsigned HOST_WIDE_INT
) offset
1967 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1968 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1969 plus_constant (XEXP (addr
, 1), offset
));
1971 addr
= plus_constant (addr
, offset
);
1974 new = change_address_1 (memref
, mode
, addr
, validate
);
1976 /* Compute the new values of the memory attributes due to this adjustment.
1977 We add the offsets and update the alignment. */
1979 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1981 /* Compute the new alignment by taking the MIN of the alignment and the
1982 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1987 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1989 /* We can compute the size in a number of ways. */
1990 if (GET_MODE (new) != BLKmode
)
1991 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1992 else if (MEM_SIZE (memref
))
1993 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1995 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1996 memoffset
, size
, memalign
, GET_MODE (new));
1998 /* At some point, we should validate that this offset is within the object,
1999 if all the appropriate values are known. */
2003 /* Return a memory reference like MEMREF, but with its mode changed
2004 to MODE and its address changed to ADDR, which is assumed to be
2005 MEMREF offseted by OFFSET bytes. If VALIDATE is
2006 nonzero, the memory address is forced to be valid. */
2009 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2010 HOST_WIDE_INT offset
, int validate
)
2012 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2013 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2016 /* Return a memory reference like MEMREF, but whose address is changed by
2017 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2018 known to be in OFFSET (possibly 1). */
2021 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2023 rtx
new, addr
= XEXP (memref
, 0);
2025 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2027 /* At this point we don't know _why_ the address is invalid. It
2028 could have secondary memory references, multiplies or anything.
2030 However, if we did go and rearrange things, we can wind up not
2031 being able to recognize the magic around pic_offset_table_rtx.
2032 This stuff is fragile, and is yet another example of why it is
2033 bad to expose PIC machinery too early. */
2034 if (! memory_address_p (GET_MODE (memref
), new)
2035 && GET_CODE (addr
) == PLUS
2036 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2038 addr
= force_reg (GET_MODE (addr
), addr
);
2039 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2042 update_temp_slot_address (XEXP (memref
, 0), new);
2043 new = change_address_1 (memref
, VOIDmode
, new, 1);
2045 /* If there are no changes, just return the original memory reference. */
2049 /* Update the alignment to reflect the offset. Reset the offset, which
2052 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2053 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2058 /* Return a memory reference like MEMREF, but with its address changed to
2059 ADDR. The caller is asserting that the actual piece of memory pointed
2060 to is the same, just the form of the address is being changed, such as
2061 by putting something into a register. */
2064 replace_equiv_address (rtx memref
, rtx addr
)
2066 /* change_address_1 copies the memory attribute structure without change
2067 and that's exactly what we want here. */
2068 update_temp_slot_address (XEXP (memref
, 0), addr
);
2069 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2072 /* Likewise, but the reference is not required to be valid. */
2075 replace_equiv_address_nv (rtx memref
, rtx addr
)
2077 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2080 /* Return a memory reference like MEMREF, but with its mode widened to
2081 MODE and offset by OFFSET. This would be used by targets that e.g.
2082 cannot issue QImode memory operations and have to use SImode memory
2083 operations plus masking logic. */
2086 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2088 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2089 tree expr
= MEM_EXPR (new);
2090 rtx memoffset
= MEM_OFFSET (new);
2091 unsigned int size
= GET_MODE_SIZE (mode
);
2093 /* If there are no changes, just return the original memory reference. */
2097 /* If we don't know what offset we were at within the expression, then
2098 we can't know if we've overstepped the bounds. */
2104 if (TREE_CODE (expr
) == COMPONENT_REF
)
2106 tree field
= TREE_OPERAND (expr
, 1);
2107 tree offset
= component_ref_field_offset (expr
);
2109 if (! DECL_SIZE_UNIT (field
))
2115 /* Is the field at least as large as the access? If so, ok,
2116 otherwise strip back to the containing structure. */
2117 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2118 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2119 && INTVAL (memoffset
) >= 0)
2122 if (! host_integerp (offset
, 1))
2128 expr
= TREE_OPERAND (expr
, 0);
2130 = (GEN_INT (INTVAL (memoffset
)
2131 + tree_low_cst (offset
, 1)
2132 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2135 /* Similarly for the decl. */
2136 else if (DECL_P (expr
)
2137 && DECL_SIZE_UNIT (expr
)
2138 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2139 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2140 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2144 /* The widened memory access overflows the expression, which means
2145 that it could alias another expression. Zap it. */
2152 memoffset
= NULL_RTX
;
2154 /* The widened memory may alias other stuff, so zap the alias set. */
2155 /* ??? Maybe use get_alias_set on any remaining expression. */
2157 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2158 MEM_ALIGN (new), mode
);
2163 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2166 gen_label_rtx (void)
2168 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2169 NULL
, label_num
++, NULL
);
2172 /* For procedure integration. */
2174 /* Install new pointers to the first and last insns in the chain.
2175 Also, set cur_insn_uid to one higher than the last in use.
2176 Used for an inline-procedure after copying the insn chain. */
2179 set_new_first_and_last_insn (rtx first
, rtx last
)
2187 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2188 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2193 /* Go through all the RTL insn bodies and copy any invalid shared
2194 structure. This routine should only be called once. */
2197 unshare_all_rtl_1 (rtx insn
)
2199 /* Unshare just about everything else. */
2200 unshare_all_rtl_in_chain (insn
);
2202 /* Make sure the addresses of stack slots found outside the insn chain
2203 (such as, in DECL_RTL of a variable) are not shared
2204 with the insn chain.
2206 This special care is necessary when the stack slot MEM does not
2207 actually appear in the insn chain. If it does appear, its address
2208 is unshared from all else at that point. */
2209 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2212 /* Go through all the RTL insn bodies and copy any invalid shared
2213 structure, again. This is a fairly expensive thing to do so it
2214 should be done sparingly. */
2217 unshare_all_rtl_again (rtx insn
)
2222 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2225 reset_used_flags (PATTERN (p
));
2226 reset_used_flags (REG_NOTES (p
));
2229 /* Make sure that virtual stack slots are not shared. */
2230 set_used_decls (DECL_INITIAL (cfun
->decl
));
2232 /* Make sure that virtual parameters are not shared. */
2233 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2234 set_used_flags (DECL_RTL (decl
));
2236 reset_used_flags (stack_slot_list
);
2238 unshare_all_rtl_1 (insn
);
2242 unshare_all_rtl (void)
2244 unshare_all_rtl_1 (get_insns ());
2248 struct tree_opt_pass pass_unshare_all_rtl
=
2250 "unshare", /* name */
2252 unshare_all_rtl
, /* execute */
2255 0, /* static_pass_number */
2257 0, /* properties_required */
2258 0, /* properties_provided */
2259 0, /* properties_destroyed */
2260 0, /* todo_flags_start */
2261 TODO_dump_func
, /* todo_flags_finish */
2266 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2267 Recursively does the same for subexpressions. */
2270 verify_rtx_sharing (rtx orig
, rtx insn
)
2275 const char *format_ptr
;
2280 code
= GET_CODE (x
);
2282 /* These types may be freely shared. */
2298 /* SCRATCH must be shared because they represent distinct values. */
2300 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2305 if (shared_const_p (orig
))
2310 /* A MEM is allowed to be shared if its address is constant. */
2311 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2312 || reload_completed
|| reload_in_progress
)
2321 /* This rtx may not be shared. If it has already been seen,
2322 replace it with a copy of itself. */
2323 #ifdef ENABLE_CHECKING
2324 if (RTX_FLAG (x
, used
))
2326 error ("invalid rtl sharing found in the insn");
2328 error ("shared rtx");
2330 internal_error ("internal consistency failure");
2333 gcc_assert (!RTX_FLAG (x
, used
));
2335 RTX_FLAG (x
, used
) = 1;
2337 /* Now scan the subexpressions recursively. */
2339 format_ptr
= GET_RTX_FORMAT (code
);
2341 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2343 switch (*format_ptr
++)
2346 verify_rtx_sharing (XEXP (x
, i
), insn
);
2350 if (XVEC (x
, i
) != NULL
)
2353 int len
= XVECLEN (x
, i
);
2355 for (j
= 0; j
< len
; j
++)
2357 /* We allow sharing of ASM_OPERANDS inside single
2359 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2360 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2362 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2364 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2373 /* Go through all the RTL insn bodies and check that there is no unexpected
2374 sharing in between the subexpressions. */
2377 verify_rtl_sharing (void)
2381 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2384 reset_used_flags (PATTERN (p
));
2385 reset_used_flags (REG_NOTES (p
));
2386 if (GET_CODE (PATTERN (p
)) == SEQUENCE
)
2389 rtx q
, sequence
= PATTERN (p
);
2391 for (i
= 0; i
< XVECLEN (sequence
, 0); i
++)
2393 q
= XVECEXP (sequence
, 0, i
);
2394 gcc_assert (INSN_P (q
));
2395 reset_used_flags (PATTERN (q
));
2396 reset_used_flags (REG_NOTES (q
));
2401 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2404 verify_rtx_sharing (PATTERN (p
), p
);
2405 verify_rtx_sharing (REG_NOTES (p
), p
);
2409 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2410 Assumes the mark bits are cleared at entry. */
2413 unshare_all_rtl_in_chain (rtx insn
)
2415 for (; insn
; insn
= NEXT_INSN (insn
))
2418 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2419 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2423 /* Go through all virtual stack slots of a function and mark them as
2424 shared. We never replace the DECL_RTLs themselves with a copy,
2425 but expressions mentioned into a DECL_RTL cannot be shared with
2426 expressions in the instruction stream.
2428 Note that reload may convert pseudo registers into memories in-place.
2429 Pseudo registers are always shared, but MEMs never are. Thus if we
2430 reset the used flags on MEMs in the instruction stream, we must set
2431 them again on MEMs that appear in DECL_RTLs. */
2434 set_used_decls (tree blk
)
2439 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2440 if (DECL_RTL_SET_P (t
))
2441 set_used_flags (DECL_RTL (t
));
2443 /* Now process sub-blocks. */
2444 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2448 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2449 Recursively does the same for subexpressions. Uses
2450 copy_rtx_if_shared_1 to reduce stack space. */
2453 copy_rtx_if_shared (rtx orig
)
2455 copy_rtx_if_shared_1 (&orig
);
2459 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2460 use. Recursively does the same for subexpressions. */
2463 copy_rtx_if_shared_1 (rtx
*orig1
)
2469 const char *format_ptr
;
2473 /* Repeat is used to turn tail-recursion into iteration. */
2480 code
= GET_CODE (x
);
2482 /* These types may be freely shared. */
2497 /* SCRATCH must be shared because they represent distinct values. */
2500 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2505 if (shared_const_p (x
))
2514 /* The chain of insns is not being copied. */
2521 /* This rtx may not be shared. If it has already been seen,
2522 replace it with a copy of itself. */
2524 if (RTX_FLAG (x
, used
))
2526 x
= shallow_copy_rtx (x
);
2529 RTX_FLAG (x
, used
) = 1;
2531 /* Now scan the subexpressions recursively.
2532 We can store any replaced subexpressions directly into X
2533 since we know X is not shared! Any vectors in X
2534 must be copied if X was copied. */
2536 format_ptr
= GET_RTX_FORMAT (code
);
2537 length
= GET_RTX_LENGTH (code
);
2540 for (i
= 0; i
< length
; i
++)
2542 switch (*format_ptr
++)
2546 copy_rtx_if_shared_1 (last_ptr
);
2547 last_ptr
= &XEXP (x
, i
);
2551 if (XVEC (x
, i
) != NULL
)
2554 int len
= XVECLEN (x
, i
);
2556 /* Copy the vector iff I copied the rtx and the length
2558 if (copied
&& len
> 0)
2559 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2561 /* Call recursively on all inside the vector. */
2562 for (j
= 0; j
< len
; j
++)
2565 copy_rtx_if_shared_1 (last_ptr
);
2566 last_ptr
= &XVECEXP (x
, i
, j
);
2581 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2582 to look for shared sub-parts. */
2585 reset_used_flags (rtx x
)
2589 const char *format_ptr
;
2592 /* Repeat is used to turn tail-recursion into iteration. */
2597 code
= GET_CODE (x
);
2599 /* These types may be freely shared so we needn't do any resetting
2621 /* The chain of insns is not being copied. */
2628 RTX_FLAG (x
, used
) = 0;
2630 format_ptr
= GET_RTX_FORMAT (code
);
2631 length
= GET_RTX_LENGTH (code
);
2633 for (i
= 0; i
< length
; i
++)
2635 switch (*format_ptr
++)
2643 reset_used_flags (XEXP (x
, i
));
2647 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2648 reset_used_flags (XVECEXP (x
, i
, j
));
2654 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2655 to look for shared sub-parts. */
2658 set_used_flags (rtx x
)
2662 const char *format_ptr
;
2667 code
= GET_CODE (x
);
2669 /* These types may be freely shared so we needn't do any resetting
2691 /* The chain of insns is not being copied. */
2698 RTX_FLAG (x
, used
) = 1;
2700 format_ptr
= GET_RTX_FORMAT (code
);
2701 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2703 switch (*format_ptr
++)
2706 set_used_flags (XEXP (x
, i
));
2710 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2711 set_used_flags (XVECEXP (x
, i
, j
));
2717 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2718 Return X or the rtx for the pseudo reg the value of X was copied into.
2719 OTHER must be valid as a SET_DEST. */
2722 make_safe_from (rtx x
, rtx other
)
2725 switch (GET_CODE (other
))
2728 other
= SUBREG_REG (other
);
2730 case STRICT_LOW_PART
:
2733 other
= XEXP (other
, 0);
2742 && GET_CODE (x
) != SUBREG
)
2744 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2745 || reg_mentioned_p (other
, x
))))
2747 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2748 emit_move_insn (temp
, x
);
2754 /* Emission of insns (adding them to the doubly-linked list). */
2756 /* Return the first insn of the current sequence or current function. */
2764 /* Specify a new insn as the first in the chain. */
2767 set_first_insn (rtx insn
)
2769 gcc_assert (!PREV_INSN (insn
));
2773 /* Return the last insn emitted in current sequence or current function. */
2776 get_last_insn (void)
2781 /* Specify a new insn as the last in the chain. */
2784 set_last_insn (rtx insn
)
2786 gcc_assert (!NEXT_INSN (insn
));
2790 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2793 get_last_insn_anywhere (void)
2795 struct sequence_stack
*stack
;
2798 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2799 if (stack
->last
!= 0)
2804 /* Return the first nonnote insn emitted in current sequence or current
2805 function. This routine looks inside SEQUENCEs. */
2808 get_first_nonnote_insn (void)
2810 rtx insn
= first_insn
;
2815 for (insn
= next_insn (insn
);
2816 insn
&& NOTE_P (insn
);
2817 insn
= next_insn (insn
))
2821 if (NONJUMP_INSN_P (insn
)
2822 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2823 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2830 /* Return the last nonnote insn emitted in current sequence or current
2831 function. This routine looks inside SEQUENCEs. */
2834 get_last_nonnote_insn (void)
2836 rtx insn
= last_insn
;
2841 for (insn
= previous_insn (insn
);
2842 insn
&& NOTE_P (insn
);
2843 insn
= previous_insn (insn
))
2847 if (NONJUMP_INSN_P (insn
)
2848 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2849 insn
= XVECEXP (PATTERN (insn
), 0,
2850 XVECLEN (PATTERN (insn
), 0) - 1);
2857 /* Return a number larger than any instruction's uid in this function. */
2862 return cur_insn_uid
;
2865 /* Return the next insn. If it is a SEQUENCE, return the first insn
2868 #define NEXT_INSN_BODY do { \
2871 insn = NEXT_INSN (insn); \
2872 if (insn && NONJUMP_INSN_P (insn) \
2873 && GET_CODE (PATTERN (insn)) == SEQUENCE) \
2874 insn = XVECEXP (PATTERN (insn), 0, 0); \
2880 next_insn (rtx insn
)
2886 const_next_insn (const_rtx insn
)
2891 #undef NEXT_INSN_BODY
2893 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2896 #define PREVIOUS_INSN_BODY do { \
2899 insn = PREV_INSN (insn); \
2900 if (insn && NONJUMP_INSN_P (insn) \
2901 && GET_CODE (PATTERN (insn)) == SEQUENCE) \
2902 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); \
2908 previous_insn (rtx insn
)
2914 const_previous_insn (const_rtx insn
)
2919 #undef PREVIOUS_INSN_BODY
2921 /* Return the next insn after INSN that is not a NOTE. This routine does not
2922 look inside SEQUENCEs. */
2924 #define NEXT_NONNOTE_INSN_BODY do { \
2927 insn = NEXT_INSN (insn); \
2928 if (insn == 0 || !NOTE_P (insn)) \
2935 next_nonnote_insn (rtx insn
)
2937 NEXT_NONNOTE_INSN_BODY
;
2941 const_next_nonnote_insn (const_rtx insn
)
2943 NEXT_NONNOTE_INSN_BODY
;
2946 #undef NEXT_NONNOTE_INSN_BODY
2948 /* Return the previous insn before INSN that is not a NOTE. This routine does
2949 not look inside SEQUENCEs. */
2951 #define PREV_NONNOTE_INSN_BODY do { \
2954 insn = PREV_INSN (insn); \
2955 if (insn == 0 || !NOTE_P (insn)) \
2962 prev_nonnote_insn (rtx insn
)
2964 PREV_NONNOTE_INSN_BODY
;
2968 const_prev_nonnote_insn (const_rtx insn
)
2970 PREV_NONNOTE_INSN_BODY
;
2973 #undef PREV_NONNOTE_INSN_BODY
2975 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2976 or 0, if there is none. This routine does not look inside
2979 #define NEXT_REAL_INSN_BODY do { \
2982 insn = NEXT_INSN (insn); \
2983 if (insn == 0 || INSN_P (insn)) \
2990 next_real_insn (rtx insn
)
2992 NEXT_REAL_INSN_BODY
;
2996 const_next_real_insn (const_rtx insn
)
2998 NEXT_REAL_INSN_BODY
;
3001 #undef NEXT_REAL_INSN_BODY
3003 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3004 or 0, if there is none. This routine does not look inside
3007 #define PREV_REAL_INSN_BODY do { \
3010 insn = PREV_INSN (insn); \
3011 if (insn == 0 || INSN_P (insn)) \
3018 prev_real_insn (rtx insn
)
3020 PREV_REAL_INSN_BODY
;
3024 const_prev_real_insn (const_rtx insn
)
3026 PREV_REAL_INSN_BODY
;
3029 #undef PREV_REAL_INSN_BODY
3031 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3032 This routine does not look inside SEQUENCEs. */
3035 last_call_insn (void)
3039 for (insn
= get_last_insn ();
3040 insn
&& !CALL_P (insn
);
3041 insn
= PREV_INSN (insn
))
3047 /* Find the next insn after INSN that really does something. This routine
3048 does not look inside SEQUENCEs. Until reload has completed, this is the
3049 same as next_real_insn. */
3052 active_insn_p (const_rtx insn
)
3054 return (CALL_P (insn
) || JUMP_P (insn
)
3055 || (NONJUMP_INSN_P (insn
)
3056 && (! reload_completed
3057 || (GET_CODE (PATTERN (insn
)) != USE
3058 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3061 #define NEXT_ACTIVE_INSN_BODY do { \
3064 insn = NEXT_INSN (insn); \
3065 if (insn == 0 || active_insn_p (insn)) \
3072 next_active_insn (rtx insn
)
3074 NEXT_ACTIVE_INSN_BODY
;
3078 const_next_active_insn (const_rtx insn
)
3080 NEXT_ACTIVE_INSN_BODY
;
3083 #undef NEXT_ACTIVE_INSN_BODY
3085 /* Find the last insn before INSN that really does something. This routine
3086 does not look inside SEQUENCEs. Until reload has completed, this is the
3087 same as prev_real_insn. */
3089 #define PREV_ACTIVE_INSN_BODY do { \
3092 insn = PREV_INSN (insn);\
3093 if (insn == 0 || active_insn_p (insn)) \
3100 prev_active_insn (rtx insn
)
3102 PREV_ACTIVE_INSN_BODY
;
3106 const_prev_active_insn (const_rtx insn
)
3108 PREV_ACTIVE_INSN_BODY
;
3111 #undef PREV_ACTIVE_INSN_BODY
3113 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3115 #define NEXT_LABEL_BODY do { \
3118 insn = NEXT_INSN (insn); \
3119 if (insn == 0 || LABEL_P (insn)) \
3126 next_label (rtx insn
)
3132 const_next_label (const_rtx insn
)
3137 #undef NEXT_LABEL_BODY
3139 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3141 #define PREV_LABEL_BODY do { \
3144 insn = PREV_INSN (insn); \
3145 if (insn == 0 || LABEL_P (insn)) \
3152 prev_label (rtx insn
)
3158 const_prev_label (const_rtx insn
)
3163 #undef PREV_LABEL_BODY
3165 /* Return the last label to mark the same position as LABEL. Return null
3166 if LABEL itself is null. */
3169 skip_consecutive_labels (rtx label
)
3173 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
3181 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3182 and REG_CC_USER notes so we can find it. */
3185 link_cc0_insns (rtx insn
)
3187 rtx user
= next_nonnote_insn (insn
);
3189 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
3190 user
= XVECEXP (PATTERN (user
), 0, 0);
3192 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3194 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3197 /* Return the next insn that uses CC0 after INSN, which is assumed to
3198 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3199 applied to the result of this function should yield INSN).
3201 Normally, this is simply the next insn. However, if a REG_CC_USER note
3202 is present, it contains the insn that uses CC0.
3204 Return 0 if we can't find the insn. */
3207 next_cc0_user (rtx insn
)
3209 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3212 return XEXP (note
, 0);
3214 insn
= next_nonnote_insn (insn
);
3215 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3216 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3218 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3224 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3225 note, it is the previous insn. */
3228 prev_cc0_setter (rtx insn
)
3230 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3233 return XEXP (note
, 0);
3235 insn
= prev_nonnote_insn (insn
);
3236 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3243 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3246 find_auto_inc (rtx
*xp
, void *data
)
3251 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3254 switch (GET_CODE (x
))
3262 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3273 /* Increment the label uses for all labels present in rtx. */
3276 mark_label_nuses (rtx x
)
3282 code
= GET_CODE (x
);
3283 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3284 LABEL_NUSES (XEXP (x
, 0))++;
3286 fmt
= GET_RTX_FORMAT (code
);
3287 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3290 mark_label_nuses (XEXP (x
, i
));
3291 else if (fmt
[i
] == 'E')
3292 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3293 mark_label_nuses (XVECEXP (x
, i
, j
));
3298 /* Try splitting insns that can be split for better scheduling.
3299 PAT is the pattern which might split.
3300 TRIAL is the insn providing PAT.
3301 LAST is nonzero if we should return the last insn of the sequence produced.
3303 If this routine succeeds in splitting, it returns the first or last
3304 replacement insn depending on the value of LAST. Otherwise, it
3305 returns TRIAL. If the insn to be returned can be split, it will be. */
3308 try_split (rtx pat
, rtx trial
, int last
)
3310 rtx before
= PREV_INSN (trial
);
3311 rtx after
= NEXT_INSN (trial
);
3312 int has_barrier
= 0;
3313 rtx tem
, note_retval
;
3316 rtx insn_last
, insn
;
3319 if (any_condjump_p (trial
)
3320 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3321 split_branch_probability
= INTVAL (XEXP (note
, 0));
3322 probability
= split_branch_probability
;
3324 seq
= split_insns (pat
, trial
);
3326 split_branch_probability
= -1;
3328 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3329 We may need to handle this specially. */
3330 if (after
&& BARRIER_P (after
))
3333 after
= NEXT_INSN (after
);
3339 /* Avoid infinite loop if any insn of the result matches
3340 the original pattern. */
3344 if (INSN_P (insn_last
)
3345 && rtx_equal_p (PATTERN (insn_last
), pat
))
3347 if (!NEXT_INSN (insn_last
))
3349 insn_last
= NEXT_INSN (insn_last
);
3352 /* We will be adding the new sequence to the function. The splitters
3353 may have introduced invalid RTL sharing, so unshare the sequence now. */
3354 unshare_all_rtl_in_chain (seq
);
3357 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3361 mark_jump_label (PATTERN (insn
), insn
, 0);
3363 if (probability
!= -1
3364 && any_condjump_p (insn
)
3365 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3367 /* We can preserve the REG_BR_PROB notes only if exactly
3368 one jump is created, otherwise the machine description
3369 is responsible for this step using
3370 split_branch_probability variable. */
3371 gcc_assert (njumps
== 1);
3373 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3374 GEN_INT (probability
),
3380 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3381 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3384 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3387 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3390 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3391 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3395 /* Copy notes, particularly those related to the CFG. */
3396 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3398 switch (REG_NOTE_KIND (note
))
3401 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3404 || (flag_non_call_exceptions
&& INSN_P (insn
)
3405 && may_trap_p (PATTERN (insn
))))
3407 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3415 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3419 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3425 case REG_NON_LOCAL_GOTO
:
3426 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3430 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3438 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3440 rtx reg
= XEXP (note
, 0);
3441 if (!FIND_REG_INC_NOTE (insn
, reg
)
3442 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3443 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_INC
, reg
,
3450 /* Relink the insns with REG_LIBCALL note and with REG_RETVAL note
3452 REG_NOTES (insn_last
)
3453 = gen_rtx_INSN_LIST (REG_LIBCALL
,
3455 REG_NOTES (insn_last
));
3457 note_retval
= find_reg_note (XEXP (note
, 0), REG_RETVAL
, NULL
);
3458 XEXP (note_retval
, 0) = insn_last
;
3466 /* If there are LABELS inside the split insns increment the
3467 usage count so we don't delete the label. */
3468 if (NONJUMP_INSN_P (trial
))
3471 while (insn
!= NULL_RTX
)
3473 if (NONJUMP_INSN_P (insn
))
3474 mark_label_nuses (PATTERN (insn
));
3476 insn
= PREV_INSN (insn
);
3480 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3482 delete_insn (trial
);
3484 emit_barrier_after (tem
);
3486 /* Recursively call try_split for each new insn created; by the
3487 time control returns here that insn will be fully split, so
3488 set LAST and continue from the insn after the one returned.
3489 We can't use next_active_insn here since AFTER may be a note.
3490 Ignore deleted insns, which can be occur if not optimizing. */
3491 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3492 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3493 tem
= try_split (PATTERN (tem
), tem
, 1);
3495 /* Return either the first or the last insn, depending on which was
3498 ? (after
? PREV_INSN (after
) : last_insn
)
3499 : NEXT_INSN (before
);
3502 /* Make and return an INSN rtx, initializing all its slots.
3503 Store PATTERN in the pattern slots. */
3506 make_insn_raw (rtx pattern
)
3510 insn
= rtx_alloc (INSN
);
3512 INSN_UID (insn
) = cur_insn_uid
++;
3513 PATTERN (insn
) = pattern
;
3514 INSN_CODE (insn
) = -1;
3515 REG_NOTES (insn
) = NULL
;
3516 INSN_LOCATOR (insn
) = curr_insn_locator ();
3517 BLOCK_FOR_INSN (insn
) = NULL
;
3519 #ifdef ENABLE_RTL_CHECKING
3522 && (returnjump_p (insn
)
3523 || (GET_CODE (insn
) == SET
3524 && SET_DEST (insn
) == pc_rtx
)))
3526 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3534 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3537 make_jump_insn_raw (rtx pattern
)
3541 insn
= rtx_alloc (JUMP_INSN
);
3542 INSN_UID (insn
) = cur_insn_uid
++;
3544 PATTERN (insn
) = pattern
;
3545 INSN_CODE (insn
) = -1;
3546 REG_NOTES (insn
) = NULL
;
3547 JUMP_LABEL (insn
) = NULL
;
3548 INSN_LOCATOR (insn
) = curr_insn_locator ();
3549 BLOCK_FOR_INSN (insn
) = NULL
;
3554 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3557 make_call_insn_raw (rtx pattern
)
3561 insn
= rtx_alloc (CALL_INSN
);
3562 INSN_UID (insn
) = cur_insn_uid
++;
3564 PATTERN (insn
) = pattern
;
3565 INSN_CODE (insn
) = -1;
3566 REG_NOTES (insn
) = NULL
;
3567 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3568 INSN_LOCATOR (insn
) = curr_insn_locator ();
3569 BLOCK_FOR_INSN (insn
) = NULL
;
3574 /* Add INSN to the end of the doubly-linked list.
3575 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3580 PREV_INSN (insn
) = last_insn
;
3581 NEXT_INSN (insn
) = 0;
3583 if (NULL
!= last_insn
)
3584 NEXT_INSN (last_insn
) = insn
;
3586 if (NULL
== first_insn
)
3592 /* Add INSN into the doubly-linked list after insn AFTER. This and
3593 the next should be the only functions called to insert an insn once
3594 delay slots have been filled since only they know how to update a
3598 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3600 rtx next
= NEXT_INSN (after
);
3602 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3604 NEXT_INSN (insn
) = next
;
3605 PREV_INSN (insn
) = after
;
3609 PREV_INSN (next
) = insn
;
3610 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3611 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3613 else if (last_insn
== after
)
3617 struct sequence_stack
*stack
= seq_stack
;
3618 /* Scan all pending sequences too. */
3619 for (; stack
; stack
= stack
->next
)
3620 if (after
== stack
->last
)
3629 if (!BARRIER_P (after
)
3630 && !BARRIER_P (insn
)
3631 && (bb
= BLOCK_FOR_INSN (after
)))
3633 set_block_for_insn (insn
, bb
);
3635 df_insn_rescan (insn
);
3636 /* Should not happen as first in the BB is always
3637 either NOTE or LABEL. */
3638 if (BB_END (bb
) == after
3639 /* Avoid clobbering of structure when creating new BB. */
3640 && !BARRIER_P (insn
)
3641 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3645 NEXT_INSN (after
) = insn
;
3646 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3648 rtx sequence
= PATTERN (after
);
3649 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3653 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3654 the previous should be the only functions called to insert an insn
3655 once delay slots have been filled since only they know how to
3656 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3660 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
3662 rtx prev
= PREV_INSN (before
);
3664 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3666 PREV_INSN (insn
) = prev
;
3667 NEXT_INSN (insn
) = before
;
3671 NEXT_INSN (prev
) = insn
;
3672 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3674 rtx sequence
= PATTERN (prev
);
3675 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3678 else if (first_insn
== before
)
3682 struct sequence_stack
*stack
= seq_stack
;
3683 /* Scan all pending sequences too. */
3684 for (; stack
; stack
= stack
->next
)
3685 if (before
== stack
->first
)
3687 stack
->first
= insn
;
3695 && !BARRIER_P (before
)
3696 && !BARRIER_P (insn
))
3697 bb
= BLOCK_FOR_INSN (before
);
3701 set_block_for_insn (insn
, bb
);
3703 df_insn_rescan (insn
);
3704 /* Should not happen as first in the BB is always either NOTE or
3706 gcc_assert (BB_HEAD (bb
) != insn
3707 /* Avoid clobbering of structure when creating new BB. */
3709 || NOTE_INSN_BASIC_BLOCK_P (insn
));
3712 PREV_INSN (before
) = insn
;
3713 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3714 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3718 /* Replace insn with an deleted instruction note. */
3720 void set_insn_deleted (rtx insn
)
3722 df_insn_delete (BLOCK_FOR_INSN (insn
), INSN_UID (insn
));
3723 PUT_CODE (insn
, NOTE
);
3724 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
3728 /* Remove an insn from its doubly-linked list. This function knows how
3729 to handle sequences. */
3731 remove_insn (rtx insn
)
3733 rtx next
= NEXT_INSN (insn
);
3734 rtx prev
= PREV_INSN (insn
);
3737 /* Later in the code, the block will be marked dirty. */
3738 df_insn_delete (NULL
, INSN_UID (insn
));
3742 NEXT_INSN (prev
) = next
;
3743 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3745 rtx sequence
= PATTERN (prev
);
3746 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3749 else if (first_insn
== insn
)
3753 struct sequence_stack
*stack
= seq_stack
;
3754 /* Scan all pending sequences too. */
3755 for (; stack
; stack
= stack
->next
)
3756 if (insn
== stack
->first
)
3758 stack
->first
= next
;
3767 PREV_INSN (next
) = prev
;
3768 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3769 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3771 else if (last_insn
== insn
)
3775 struct sequence_stack
*stack
= seq_stack
;
3776 /* Scan all pending sequences too. */
3777 for (; stack
; stack
= stack
->next
)
3778 if (insn
== stack
->last
)
3786 if (!BARRIER_P (insn
)
3787 && (bb
= BLOCK_FOR_INSN (insn
)))
3790 df_set_bb_dirty (bb
);
3791 if (BB_HEAD (bb
) == insn
)
3793 /* Never ever delete the basic block note without deleting whole
3795 gcc_assert (!NOTE_P (insn
));
3796 BB_HEAD (bb
) = next
;
3798 if (BB_END (bb
) == insn
)
3803 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3806 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3808 gcc_assert (call_insn
&& CALL_P (call_insn
));
3810 /* Put the register usage information on the CALL. If there is already
3811 some usage information, put ours at the end. */
3812 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3816 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3817 link
= XEXP (link
, 1))
3820 XEXP (link
, 1) = call_fusage
;
3823 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3826 /* Delete all insns made since FROM.
3827 FROM becomes the new last instruction. */
3830 delete_insns_since (rtx from
)
3835 NEXT_INSN (from
) = 0;
3839 /* This function is deprecated, please use sequences instead.
3841 Move a consecutive bunch of insns to a different place in the chain.
3842 The insns to be moved are those between FROM and TO.
3843 They are moved to a new position after the insn AFTER.
3844 AFTER must not be FROM or TO or any insn in between.
3846 This function does not know about SEQUENCEs and hence should not be
3847 called after delay-slot filling has been done. */
3850 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3852 /* Splice this bunch out of where it is now. */
3853 if (PREV_INSN (from
))
3854 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3856 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3857 if (last_insn
== to
)
3858 last_insn
= PREV_INSN (from
);
3859 if (first_insn
== from
)
3860 first_insn
= NEXT_INSN (to
);
3862 /* Make the new neighbors point to it and it to them. */
3863 if (NEXT_INSN (after
))
3864 PREV_INSN (NEXT_INSN (after
)) = to
;
3866 NEXT_INSN (to
) = NEXT_INSN (after
);
3867 PREV_INSN (from
) = after
;
3868 NEXT_INSN (after
) = from
;
3869 if (after
== last_insn
)
3873 /* Same as function above, but take care to update BB boundaries. */
3875 reorder_insns (rtx from
, rtx to
, rtx after
)
3877 rtx prev
= PREV_INSN (from
);
3878 basic_block bb
, bb2
;
3880 reorder_insns_nobb (from
, to
, after
);
3882 if (!BARRIER_P (after
)
3883 && (bb
= BLOCK_FOR_INSN (after
)))
3886 df_set_bb_dirty (bb
);
3888 if (!BARRIER_P (from
)
3889 && (bb2
= BLOCK_FOR_INSN (from
)))
3891 if (BB_END (bb2
) == to
)
3892 BB_END (bb2
) = prev
;
3893 df_set_bb_dirty (bb2
);
3896 if (BB_END (bb
) == after
)
3899 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3902 set_block_for_insn (x
, bb
);
3903 df_insn_change_bb (x
);
3909 /* Emit insn(s) of given code and pattern
3910 at a specified place within the doubly-linked list.
3912 All of the emit_foo global entry points accept an object
3913 X which is either an insn list or a PATTERN of a single
3916 There are thus a few canonical ways to generate code and
3917 emit it at a specific place in the instruction stream. For
3918 example, consider the instruction named SPOT and the fact that
3919 we would like to emit some instructions before SPOT. We might
3923 ... emit the new instructions ...
3924 insns_head = get_insns ();
3927 emit_insn_before (insns_head, SPOT);
3929 It used to be common to generate SEQUENCE rtl instead, but that
3930 is a relic of the past which no longer occurs. The reason is that
3931 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3932 generated would almost certainly die right after it was created. */
3934 /* Make X be output before the instruction BEFORE. */
3937 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
3942 gcc_assert (before
);
3947 switch (GET_CODE (x
))
3958 rtx next
= NEXT_INSN (insn
);
3959 add_insn_before (insn
, before
, bb
);
3965 #ifdef ENABLE_RTL_CHECKING
3972 last
= make_insn_raw (x
);
3973 add_insn_before (last
, before
, bb
);
3980 /* Make an instruction with body X and code JUMP_INSN
3981 and output it before the instruction BEFORE. */
3984 emit_jump_insn_before_noloc (rtx x
, rtx before
)
3986 rtx insn
, last
= NULL_RTX
;
3988 gcc_assert (before
);
3990 switch (GET_CODE (x
))
4001 rtx next
= NEXT_INSN (insn
);
4002 add_insn_before (insn
, before
, NULL
);
4008 #ifdef ENABLE_RTL_CHECKING
4015 last
= make_jump_insn_raw (x
);
4016 add_insn_before (last
, before
, NULL
);
4023 /* Make an instruction with body X and code CALL_INSN
4024 and output it before the instruction BEFORE. */
4027 emit_call_insn_before_noloc (rtx x
, rtx before
)
4029 rtx last
= NULL_RTX
, insn
;
4031 gcc_assert (before
);
4033 switch (GET_CODE (x
))
4044 rtx next
= NEXT_INSN (insn
);
4045 add_insn_before (insn
, before
, NULL
);
4051 #ifdef ENABLE_RTL_CHECKING
4058 last
= make_call_insn_raw (x
);
4059 add_insn_before (last
, before
, NULL
);
4066 /* Make an insn of code BARRIER
4067 and output it before the insn BEFORE. */
4070 emit_barrier_before (rtx before
)
4072 rtx insn
= rtx_alloc (BARRIER
);
4074 INSN_UID (insn
) = cur_insn_uid
++;
4076 add_insn_before (insn
, before
, NULL
);
4080 /* Emit the label LABEL before the insn BEFORE. */
4083 emit_label_before (rtx label
, rtx before
)
4085 /* This can be called twice for the same label as a result of the
4086 confusion that follows a syntax error! So make it harmless. */
4087 if (INSN_UID (label
) == 0)
4089 INSN_UID (label
) = cur_insn_uid
++;
4090 add_insn_before (label
, before
, NULL
);
4096 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4099 emit_note_before (enum insn_note subtype
, rtx before
)
4101 rtx note
= rtx_alloc (NOTE
);
4102 INSN_UID (note
) = cur_insn_uid
++;
4103 NOTE_KIND (note
) = subtype
;
4104 BLOCK_FOR_INSN (note
) = NULL
;
4105 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4107 add_insn_before (note
, before
, NULL
);
4111 /* Helper for emit_insn_after, handles lists of instructions
4115 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4119 if (!bb
&& !BARRIER_P (after
))
4120 bb
= BLOCK_FOR_INSN (after
);
4124 df_set_bb_dirty (bb
);
4125 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4126 if (!BARRIER_P (last
))
4128 set_block_for_insn (last
, bb
);
4129 df_insn_rescan (last
);
4131 if (!BARRIER_P (last
))
4133 set_block_for_insn (last
, bb
);
4134 df_insn_rescan (last
);
4136 if (BB_END (bb
) == after
)
4140 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4143 after_after
= NEXT_INSN (after
);
4145 NEXT_INSN (after
) = first
;
4146 PREV_INSN (first
) = after
;
4147 NEXT_INSN (last
) = after_after
;
4149 PREV_INSN (after_after
) = last
;
4151 if (after
== last_insn
)
4156 /* Make X be output after the insn AFTER and set the BB of insn. If
4157 BB is NULL, an attempt is made to infer the BB from AFTER. */
4160 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4169 switch (GET_CODE (x
))
4177 last
= emit_insn_after_1 (x
, after
, bb
);
4180 #ifdef ENABLE_RTL_CHECKING
4187 last
= make_insn_raw (x
);
4188 add_insn_after (last
, after
, bb
);
4196 /* Make an insn of code JUMP_INSN with body X
4197 and output it after the insn AFTER. */
4200 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4206 switch (GET_CODE (x
))
4214 last
= emit_insn_after_1 (x
, after
, NULL
);
4217 #ifdef ENABLE_RTL_CHECKING
4224 last
= make_jump_insn_raw (x
);
4225 add_insn_after (last
, after
, NULL
);
4232 /* Make an instruction with body X and code CALL_INSN
4233 and output it after the instruction AFTER. */
4236 emit_call_insn_after_noloc (rtx x
, rtx after
)
4242 switch (GET_CODE (x
))
4250 last
= emit_insn_after_1 (x
, after
, NULL
);
4253 #ifdef ENABLE_RTL_CHECKING
4260 last
= make_call_insn_raw (x
);
4261 add_insn_after (last
, after
, NULL
);
4268 /* Make an insn of code BARRIER
4269 and output it after the insn AFTER. */
4272 emit_barrier_after (rtx after
)
4274 rtx insn
= rtx_alloc (BARRIER
);
4276 INSN_UID (insn
) = cur_insn_uid
++;
4278 add_insn_after (insn
, after
, NULL
);
4282 /* Emit the label LABEL after the insn AFTER. */
4285 emit_label_after (rtx label
, rtx after
)
4287 /* This can be called twice for the same label
4288 as a result of the confusion that follows a syntax error!
4289 So make it harmless. */
4290 if (INSN_UID (label
) == 0)
4292 INSN_UID (label
) = cur_insn_uid
++;
4293 add_insn_after (label
, after
, NULL
);
4299 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4302 emit_note_after (enum insn_note subtype
, rtx after
)
4304 rtx note
= rtx_alloc (NOTE
);
4305 INSN_UID (note
) = cur_insn_uid
++;
4306 NOTE_KIND (note
) = subtype
;
4307 BLOCK_FOR_INSN (note
) = NULL
;
4308 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4309 add_insn_after (note
, after
, NULL
);
4313 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4315 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4317 rtx last
= emit_insn_after_noloc (pattern
, after
, NULL
);
4319 if (pattern
== NULL_RTX
|| !loc
)
4322 after
= NEXT_INSN (after
);
4325 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4326 INSN_LOCATOR (after
) = loc
;
4329 after
= NEXT_INSN (after
);
4334 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4336 emit_insn_after (rtx pattern
, rtx after
)
4339 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4341 return emit_insn_after_noloc (pattern
, after
, NULL
);
4344 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4346 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4348 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4350 if (pattern
== NULL_RTX
|| !loc
)
4353 after
= NEXT_INSN (after
);
4356 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4357 INSN_LOCATOR (after
) = loc
;
4360 after
= NEXT_INSN (after
);
4365 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4367 emit_jump_insn_after (rtx pattern
, rtx after
)
4370 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4372 return emit_jump_insn_after_noloc (pattern
, after
);
4375 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4377 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4379 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4381 if (pattern
== NULL_RTX
|| !loc
)
4384 after
= NEXT_INSN (after
);
4387 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4388 INSN_LOCATOR (after
) = loc
;
4391 after
= NEXT_INSN (after
);
4396 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4398 emit_call_insn_after (rtx pattern
, rtx after
)
4401 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4403 return emit_call_insn_after_noloc (pattern
, after
);
4406 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4408 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4410 rtx first
= PREV_INSN (before
);
4411 rtx last
= emit_insn_before_noloc (pattern
, before
, NULL
);
4413 if (pattern
== NULL_RTX
|| !loc
)
4417 first
= get_insns ();
4419 first
= NEXT_INSN (first
);
4422 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4423 INSN_LOCATOR (first
) = loc
;
4426 first
= NEXT_INSN (first
);
4431 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4433 emit_insn_before (rtx pattern
, rtx before
)
4435 if (INSN_P (before
))
4436 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4438 return emit_insn_before_noloc (pattern
, before
, NULL
);
4441 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4443 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4445 rtx first
= PREV_INSN (before
);
4446 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4448 if (pattern
== NULL_RTX
)
4451 first
= NEXT_INSN (first
);
4454 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4455 INSN_LOCATOR (first
) = loc
;
4458 first
= NEXT_INSN (first
);
4463 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4465 emit_jump_insn_before (rtx pattern
, rtx before
)
4467 if (INSN_P (before
))
4468 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4470 return emit_jump_insn_before_noloc (pattern
, before
);
4473 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4475 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4477 rtx first
= PREV_INSN (before
);
4478 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4480 if (pattern
== NULL_RTX
)
4483 first
= NEXT_INSN (first
);
4486 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4487 INSN_LOCATOR (first
) = loc
;
4490 first
= NEXT_INSN (first
);
4495 /* like emit_call_insn_before_noloc,
4496 but set insn_locator according to before. */
4498 emit_call_insn_before (rtx pattern
, rtx before
)
4500 if (INSN_P (before
))
4501 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4503 return emit_call_insn_before_noloc (pattern
, before
);
4506 /* Take X and emit it at the end of the doubly-linked
4509 Returns the last insn emitted. */
4514 rtx last
= last_insn
;
4520 switch (GET_CODE (x
))
4531 rtx next
= NEXT_INSN (insn
);
4538 #ifdef ENABLE_RTL_CHECKING
4545 last
= make_insn_raw (x
);
4553 /* Make an insn of code JUMP_INSN with pattern X
4554 and add it to the end of the doubly-linked list. */
4557 emit_jump_insn (rtx x
)
4559 rtx last
= NULL_RTX
, insn
;
4561 switch (GET_CODE (x
))
4572 rtx next
= NEXT_INSN (insn
);
4579 #ifdef ENABLE_RTL_CHECKING
4586 last
= make_jump_insn_raw (x
);
4594 /* Make an insn of code CALL_INSN with pattern X
4595 and add it to the end of the doubly-linked list. */
4598 emit_call_insn (rtx x
)
4602 switch (GET_CODE (x
))
4610 insn
= emit_insn (x
);
4613 #ifdef ENABLE_RTL_CHECKING
4620 insn
= make_call_insn_raw (x
);
4628 /* Add the label LABEL to the end of the doubly-linked list. */
4631 emit_label (rtx label
)
4633 /* This can be called twice for the same label
4634 as a result of the confusion that follows a syntax error!
4635 So make it harmless. */
4636 if (INSN_UID (label
) == 0)
4638 INSN_UID (label
) = cur_insn_uid
++;
4644 /* Make an insn of code BARRIER
4645 and add it to the end of the doubly-linked list. */
4650 rtx barrier
= rtx_alloc (BARRIER
);
4651 INSN_UID (barrier
) = cur_insn_uid
++;
4656 /* Emit a copy of note ORIG. */
4659 emit_note_copy (rtx orig
)
4663 note
= rtx_alloc (NOTE
);
4665 INSN_UID (note
) = cur_insn_uid
++;
4666 NOTE_DATA (note
) = NOTE_DATA (orig
);
4667 NOTE_KIND (note
) = NOTE_KIND (orig
);
4668 BLOCK_FOR_INSN (note
) = NULL
;
4674 /* Make an insn of code NOTE or type NOTE_NO
4675 and add it to the end of the doubly-linked list. */
4678 emit_note (enum insn_note kind
)
4682 note
= rtx_alloc (NOTE
);
4683 INSN_UID (note
) = cur_insn_uid
++;
4684 NOTE_KIND (note
) = kind
;
4685 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4686 BLOCK_FOR_INSN (note
) = NULL
;
4691 /* Cause next statement to emit a line note even if the line number
4695 force_next_line_note (void)
4697 #ifdef USE_MAPPED_LOCATION
4700 last_location
.line
= -1;
4704 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4705 note of this type already exists, remove it first. */
4708 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4710 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4711 rtx new_note
= NULL
;
4717 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4718 has multiple sets (some callers assume single_set
4719 means the insn only has one set, when in fact it
4720 means the insn only has one * useful * set). */
4721 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4727 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4728 It serves no useful purpose and breaks eliminate_regs. */
4729 if (GET_CODE (datum
) == ASM_OPERANDS
)
4734 XEXP (note
, 0) = datum
;
4735 df_notes_rescan (insn
);
4743 XEXP (note
, 0) = datum
;
4749 new_note
= gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4750 REG_NOTES (insn
) = new_note
;
4756 df_notes_rescan (insn
);
4762 return REG_NOTES (insn
);
4765 /* Return an indication of which type of insn should have X as a body.
4766 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4768 static enum rtx_code
4769 classify_insn (rtx x
)
4773 if (GET_CODE (x
) == CALL
)
4775 if (GET_CODE (x
) == RETURN
)
4777 if (GET_CODE (x
) == SET
)
4779 if (SET_DEST (x
) == pc_rtx
)
4781 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4786 if (GET_CODE (x
) == PARALLEL
)
4789 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4790 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4792 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4793 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4795 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4796 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4802 /* Emit the rtl pattern X as an appropriate kind of insn.
4803 If X is a label, it is simply added into the insn chain. */
4808 enum rtx_code code
= classify_insn (x
);
4813 return emit_label (x
);
4815 return emit_insn (x
);
4818 rtx insn
= emit_jump_insn (x
);
4819 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4820 return emit_barrier ();
4824 return emit_call_insn (x
);
4830 /* Space for free sequence stack entries. */
4831 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4833 /* Begin emitting insns to a sequence. If this sequence will contain
4834 something that might cause the compiler to pop arguments to function
4835 calls (because those pops have previously been deferred; see
4836 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4837 before calling this function. That will ensure that the deferred
4838 pops are not accidentally emitted in the middle of this sequence. */
4841 start_sequence (void)
4843 struct sequence_stack
*tem
;
4845 if (free_sequence_stack
!= NULL
)
4847 tem
= free_sequence_stack
;
4848 free_sequence_stack
= tem
->next
;
4851 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4853 tem
->next
= seq_stack
;
4854 tem
->first
= first_insn
;
4855 tem
->last
= last_insn
;
4863 /* Set up the insn chain starting with FIRST as the current sequence,
4864 saving the previously current one. See the documentation for
4865 start_sequence for more information about how to use this function. */
4868 push_to_sequence (rtx first
)
4874 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4880 /* Like push_to_sequence, but take the last insn as an argument to avoid
4881 looping through the list. */
4884 push_to_sequence2 (rtx first
, rtx last
)
4892 /* Set up the outer-level insn chain
4893 as the current sequence, saving the previously current one. */
4896 push_topmost_sequence (void)
4898 struct sequence_stack
*stack
, *top
= NULL
;
4902 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4905 first_insn
= top
->first
;
4906 last_insn
= top
->last
;
4909 /* After emitting to the outer-level insn chain, update the outer-level
4910 insn chain, and restore the previous saved state. */
4913 pop_topmost_sequence (void)
4915 struct sequence_stack
*stack
, *top
= NULL
;
4917 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4920 top
->first
= first_insn
;
4921 top
->last
= last_insn
;
4926 /* After emitting to a sequence, restore previous saved state.
4928 To get the contents of the sequence just made, you must call
4929 `get_insns' *before* calling here.
4931 If the compiler might have deferred popping arguments while
4932 generating this sequence, and this sequence will not be immediately
4933 inserted into the instruction stream, use do_pending_stack_adjust
4934 before calling get_insns. That will ensure that the deferred
4935 pops are inserted into this sequence, and not into some random
4936 location in the instruction stream. See INHIBIT_DEFER_POP for more
4937 information about deferred popping of arguments. */
4942 struct sequence_stack
*tem
= seq_stack
;
4944 first_insn
= tem
->first
;
4945 last_insn
= tem
->last
;
4946 seq_stack
= tem
->next
;
4948 memset (tem
, 0, sizeof (*tem
));
4949 tem
->next
= free_sequence_stack
;
4950 free_sequence_stack
= tem
;
4953 /* Return 1 if currently emitting into a sequence. */
4956 in_sequence_p (void)
4958 return seq_stack
!= 0;
4961 /* Put the various virtual registers into REGNO_REG_RTX. */
4964 init_virtual_regs (struct emit_status
*es
)
4966 rtx
*ptr
= es
->x_regno_reg_rtx
;
4967 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4968 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4969 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4970 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4971 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4975 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4976 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4977 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4978 static int copy_insn_n_scratches
;
4980 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4981 copied an ASM_OPERANDS.
4982 In that case, it is the original input-operand vector. */
4983 static rtvec orig_asm_operands_vector
;
4985 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4986 copied an ASM_OPERANDS.
4987 In that case, it is the copied input-operand vector. */
4988 static rtvec copy_asm_operands_vector
;
4990 /* Likewise for the constraints vector. */
4991 static rtvec orig_asm_constraints_vector
;
4992 static rtvec copy_asm_constraints_vector
;
4994 /* Recursively create a new copy of an rtx for copy_insn.
4995 This function differs from copy_rtx in that it handles SCRATCHes and
4996 ASM_OPERANDs properly.
4997 Normally, this function is not used directly; use copy_insn as front end.
4998 However, you could first copy an insn pattern with copy_insn and then use
4999 this function afterwards to properly copy any REG_NOTEs containing
5003 copy_insn_1 (rtx orig
)
5008 const char *format_ptr
;
5010 code
= GET_CODE (orig
);
5025 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5030 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5031 if (copy_insn_scratch_in
[i
] == orig
)
5032 return copy_insn_scratch_out
[i
];
5036 if (shared_const_p (orig
))
5040 /* A MEM with a constant address is not sharable. The problem is that
5041 the constant address may need to be reloaded. If the mem is shared,
5042 then reloading one copy of this mem will cause all copies to appear
5043 to have been reloaded. */
5049 /* Copy the various flags, fields, and other information. We assume
5050 that all fields need copying, and then clear the fields that should
5051 not be copied. That is the sensible default behavior, and forces
5052 us to explicitly document why we are *not* copying a flag. */
5053 copy
= shallow_copy_rtx (orig
);
5055 /* We do not copy the USED flag, which is used as a mark bit during
5056 walks over the RTL. */
5057 RTX_FLAG (copy
, used
) = 0;
5059 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5062 RTX_FLAG (copy
, jump
) = 0;
5063 RTX_FLAG (copy
, call
) = 0;
5064 RTX_FLAG (copy
, frame_related
) = 0;
5067 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5069 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5070 switch (*format_ptr
++)
5073 if (XEXP (orig
, i
) != NULL
)
5074 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5079 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5080 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5081 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5082 XVEC (copy
, i
) = copy_asm_operands_vector
;
5083 else if (XVEC (orig
, i
) != NULL
)
5085 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5086 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5087 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5098 /* These are left unchanged. */
5105 if (code
== SCRATCH
)
5107 i
= copy_insn_n_scratches
++;
5108 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5109 copy_insn_scratch_in
[i
] = orig
;
5110 copy_insn_scratch_out
[i
] = copy
;
5112 else if (code
== ASM_OPERANDS
)
5114 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5115 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5116 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5117 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5123 /* Create a new copy of an rtx.
5124 This function differs from copy_rtx in that it handles SCRATCHes and
5125 ASM_OPERANDs properly.
5126 INSN doesn't really have to be a full INSN; it could be just the
5129 copy_insn (rtx insn
)
5131 copy_insn_n_scratches
= 0;
5132 orig_asm_operands_vector
= 0;
5133 orig_asm_constraints_vector
= 0;
5134 copy_asm_operands_vector
= 0;
5135 copy_asm_constraints_vector
= 0;
5136 return copy_insn_1 (insn
);
5139 /* Initialize data structures and variables in this file
5140 before generating rtl for each function. */
5145 struct function
*f
= cfun
;
5147 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5151 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5152 last_location
= UNKNOWN_LOCATION
;
5153 first_label_num
= label_num
;
5156 /* Init the tables that describe all the pseudo regs. */
5158 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5160 f
->emit
->regno_pointer_align
5161 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5162 * sizeof (unsigned char));
5165 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5167 /* Put copies of all the hard registers into regno_reg_rtx. */
5168 memcpy (regno_reg_rtx
,
5169 static_regno_reg_rtx
,
5170 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5172 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5173 init_virtual_regs (f
->emit
);
5175 /* Indicate that the virtual registers and stack locations are
5177 REG_POINTER (stack_pointer_rtx
) = 1;
5178 REG_POINTER (frame_pointer_rtx
) = 1;
5179 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5180 REG_POINTER (arg_pointer_rtx
) = 1;
5182 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5183 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5184 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5185 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5186 REG_POINTER (virtual_cfa_rtx
) = 1;
5188 #ifdef STACK_BOUNDARY
5189 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5190 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5191 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5192 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5194 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5195 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5196 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5197 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5198 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5201 #ifdef INIT_EXPANDERS
5206 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5209 gen_const_vector (enum machine_mode mode
, int constant
)
5214 enum machine_mode inner
;
5216 units
= GET_MODE_NUNITS (mode
);
5217 inner
= GET_MODE_INNER (mode
);
5219 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5221 v
= rtvec_alloc (units
);
5223 /* We need to call this function after we set the scalar const_tiny_rtx
5225 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5227 for (i
= 0; i
< units
; ++i
)
5228 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5230 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5234 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5235 all elements are zero, and the one vector when all elements are one. */
5237 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5239 enum machine_mode inner
= GET_MODE_INNER (mode
);
5240 int nunits
= GET_MODE_NUNITS (mode
);
5244 /* Check to see if all of the elements have the same value. */
5245 x
= RTVEC_ELT (v
, nunits
- 1);
5246 for (i
= nunits
- 2; i
>= 0; i
--)
5247 if (RTVEC_ELT (v
, i
) != x
)
5250 /* If the values are all the same, check to see if we can use one of the
5251 standard constant vectors. */
5254 if (x
== CONST0_RTX (inner
))
5255 return CONST0_RTX (mode
);
5256 else if (x
== CONST1_RTX (inner
))
5257 return CONST1_RTX (mode
);
5260 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5263 /* Initialise global register information required by all functions. */
5266 init_emit_regs (void)
5270 /* Reset register attributes */
5271 htab_empty (reg_attrs_htab
);
5273 /* We need reg_raw_mode, so initialize the modes now. */
5274 init_reg_modes_target ();
5276 /* Assign register numbers to the globally defined register rtx. */
5277 pc_rtx
= gen_rtx_PC (VOIDmode
);
5278 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5279 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5280 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5281 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5282 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5283 virtual_incoming_args_rtx
=
5284 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5285 virtual_stack_vars_rtx
=
5286 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5287 virtual_stack_dynamic_rtx
=
5288 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5289 virtual_outgoing_args_rtx
=
5290 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5291 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5293 /* Initialize RTL for commonly used hard registers. These are
5294 copied into regno_reg_rtx as we begin to compile each function. */
5295 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5296 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5298 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5299 return_address_pointer_rtx
5300 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5303 #ifdef STATIC_CHAIN_REGNUM
5304 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5306 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5307 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5308 static_chain_incoming_rtx
5309 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5312 static_chain_incoming_rtx
= static_chain_rtx
;
5316 static_chain_rtx
= STATIC_CHAIN
;
5318 #ifdef STATIC_CHAIN_INCOMING
5319 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5321 static_chain_incoming_rtx
= static_chain_rtx
;
5325 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5326 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5328 pic_offset_table_rtx
= NULL_RTX
;
5331 /* Create some permanent unique rtl objects shared between all functions.
5332 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5335 init_emit_once (int line_numbers
)
5338 enum machine_mode mode
;
5339 enum machine_mode double_mode
;
5341 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5343 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5344 const_int_htab_eq
, NULL
);
5346 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5347 const_double_htab_eq
, NULL
);
5349 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5350 const_fixed_htab_eq
, NULL
);
5352 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5353 mem_attrs_htab_eq
, NULL
);
5354 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5355 reg_attrs_htab_eq
, NULL
);
5357 no_line_numbers
= ! line_numbers
;
5359 /* Compute the word and byte modes. */
5361 byte_mode
= VOIDmode
;
5362 word_mode
= VOIDmode
;
5363 double_mode
= VOIDmode
;
5365 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5367 mode
= GET_MODE_WIDER_MODE (mode
))
5369 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5370 && byte_mode
== VOIDmode
)
5373 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5374 && word_mode
== VOIDmode
)
5378 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5380 mode
= GET_MODE_WIDER_MODE (mode
))
5382 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5383 && double_mode
== VOIDmode
)
5387 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5389 #ifdef INIT_EXPANDERS
5390 /* This is to initialize {init|mark|free}_machine_status before the first
5391 call to push_function_context_to. This is needed by the Chill front
5392 end which calls push_function_context_to before the first call to
5393 init_function_start. */
5397 /* Create the unique rtx's for certain rtx codes and operand values. */
5399 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5400 tries to use these variables. */
5401 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5402 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5403 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5405 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5406 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5407 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5409 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5411 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5412 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5413 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5414 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5415 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5416 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5417 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5419 dconsthalf
= dconst1
;
5420 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5422 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5424 /* Initialize mathematical constants for constant folding builtins.
5425 These constants need to be given to at least 160 bits precision. */
5426 real_from_string (&dconstsqrt2
,
5427 "1.4142135623730950488016887242096980785696718753769480731766797379907");
5428 real_from_string (&dconste
,
5429 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5431 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5433 REAL_VALUE_TYPE
*r
=
5434 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5436 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5438 mode
= GET_MODE_WIDER_MODE (mode
))
5439 const_tiny_rtx
[i
][(int) mode
] =
5440 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5442 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5444 mode
= GET_MODE_WIDER_MODE (mode
))
5445 const_tiny_rtx
[i
][(int) mode
] =
5446 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5448 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5450 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5452 mode
= GET_MODE_WIDER_MODE (mode
))
5453 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5455 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5457 mode
= GET_MODE_WIDER_MODE (mode
))
5458 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5461 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5463 mode
= GET_MODE_WIDER_MODE (mode
))
5465 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5466 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5469 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5471 mode
= GET_MODE_WIDER_MODE (mode
))
5473 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5474 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5477 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5479 mode
= GET_MODE_WIDER_MODE (mode
))
5481 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5482 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5485 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5487 mode
= GET_MODE_WIDER_MODE (mode
))
5489 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5490 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5493 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5495 mode
= GET_MODE_WIDER_MODE (mode
))
5497 FCONST0(mode
).data
.high
= 0;
5498 FCONST0(mode
).data
.low
= 0;
5499 FCONST0(mode
).mode
= mode
;
5500 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5501 FCONST0 (mode
), mode
);
5504 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5506 mode
= GET_MODE_WIDER_MODE (mode
))
5508 FCONST0(mode
).data
.high
= 0;
5509 FCONST0(mode
).data
.low
= 0;
5510 FCONST0(mode
).mode
= mode
;
5511 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5512 FCONST0 (mode
), mode
);
5515 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5517 mode
= GET_MODE_WIDER_MODE (mode
))
5519 FCONST0(mode
).data
.high
= 0;
5520 FCONST0(mode
).data
.low
= 0;
5521 FCONST0(mode
).mode
= mode
;
5522 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5523 FCONST0 (mode
), mode
);
5525 /* We store the value 1. */
5526 FCONST1(mode
).data
.high
= 0;
5527 FCONST1(mode
).data
.low
= 0;
5528 FCONST1(mode
).mode
= mode
;
5529 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5530 2 * HOST_BITS_PER_WIDE_INT
,
5531 &FCONST1(mode
).data
.low
,
5532 &FCONST1(mode
).data
.high
,
5533 SIGNED_FIXED_POINT_MODE_P (mode
));
5534 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5535 FCONST1 (mode
), mode
);
5538 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5540 mode
= GET_MODE_WIDER_MODE (mode
))
5542 FCONST0(mode
).data
.high
= 0;
5543 FCONST0(mode
).data
.low
= 0;
5544 FCONST0(mode
).mode
= mode
;
5545 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5546 FCONST0 (mode
), mode
);
5548 /* We store the value 1. */
5549 FCONST1(mode
).data
.high
= 0;
5550 FCONST1(mode
).data
.low
= 0;
5551 FCONST1(mode
).mode
= mode
;
5552 lshift_double (1, 0, GET_MODE_FBIT (mode
),
5553 2 * HOST_BITS_PER_WIDE_INT
,
5554 &FCONST1(mode
).data
.low
,
5555 &FCONST1(mode
).data
.high
,
5556 SIGNED_FIXED_POINT_MODE_P (mode
));
5557 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5558 FCONST1 (mode
), mode
);
5561 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5563 mode
= GET_MODE_WIDER_MODE (mode
))
5565 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5568 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5570 mode
= GET_MODE_WIDER_MODE (mode
))
5572 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5575 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5577 mode
= GET_MODE_WIDER_MODE (mode
))
5579 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5580 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5583 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5585 mode
= GET_MODE_WIDER_MODE (mode
))
5587 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5588 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5591 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5592 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5593 const_tiny_rtx
[0][i
] = const0_rtx
;
5595 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5596 if (STORE_FLAG_VALUE
== 1)
5597 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5600 /* Produce exact duplicate of insn INSN after AFTER.
5601 Care updating of libcall regions if present. */
5604 emit_copy_of_insn_after (rtx insn
, rtx after
)
5607 rtx note1
, note2
, link
;
5609 switch (GET_CODE (insn
))
5612 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5616 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5620 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5621 if (CALL_INSN_FUNCTION_USAGE (insn
))
5622 CALL_INSN_FUNCTION_USAGE (new)
5623 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5624 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5625 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5632 /* Update LABEL_NUSES. */
5633 mark_jump_label (PATTERN (new), new, 0);
5635 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5637 /* If the old insn is frame related, then so is the new one. This is
5638 primarily needed for IA-64 unwind info which marks epilogue insns,
5639 which may be duplicated by the basic block reordering code. */
5640 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn
);
5642 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5644 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5645 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5647 if (GET_CODE (link
) == EXPR_LIST
)
5649 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5650 copy_insn_1 (XEXP (link
, 0)), REG_NOTES (new));
5653 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5654 XEXP (link
, 0), REG_NOTES (new));
5657 /* Fix the libcall sequences. */
5658 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5661 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5663 XEXP (note1
, 0) = p
;
5664 XEXP (note2
, 0) = new;
5666 INSN_CODE (new) = INSN_CODE (insn
);
5670 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5672 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5674 if (hard_reg_clobbers
[mode
][regno
])
5675 return hard_reg_clobbers
[mode
][regno
];
5677 return (hard_reg_clobbers
[mode
][regno
] =
5678 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5681 #include "gt-emit-rtl.h"