1 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
4 * doc/install.texi (Downloading the source): Sort the list of
5 front ends and add D, Go, and Modula-2.
7 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
10 * doc/install.texi (Specific) <*-*-freebsd*>: Remove older
11 contents referencing GCC 4.x.
13 2023-11-25 Gerald Pfeifer <gerald@pfeifer.com>
15 * doc/standards.texi (Standards): Update ISO C++ reference.
17 2023-11-25 Jakub Jelinek <jakub@redhat.com>
20 * config/i386/i386.md (*jcc_bt<mode>_mask,
21 *jcc_bt<SWI48:mode>_mask_1): Add (const_int 0) as expected
22 second operand of bt_comparison_operator.
24 2023-11-25 Andrew Pinski <pinskia@gmail.com>
25 Jakub Jelinek <jakub@redhat.com>
28 * config/aarch64/aarch64-simd.md (aarch64_simd_stp<mode>): Use <vwcore>
29 rather than %<vw> for alternative with r constraint on input operand.
31 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
33 * doc/install.texi (amdgcn-*-amdhsa): Fix URL to ROCm;
34 change 'in the future' to 'in LLVM 18'.
36 2023-11-24 John David Anglin <danglin@gcc.gnu.org>
38 * config/pa/pa.cc (pa_emit_move_sequence): Use INT14_OK_STRICT
39 in a couple of places.
41 2023-11-24 Martin Jambor <mjambor@suse.cz>
44 * tree-sra.cc (passed_by_ref_in_call): New.
45 (sra_initialize): Allocate passed_by_ref_in_call.
46 (sra_deinitialize): Free passed_by_ref_in_call.
47 (create_access): Add decl pool candidates only if they are not
49 (build_access_from_expr_1): Bail out on ADDR_EXPRs.
50 (build_access_from_call_arg): New function.
51 (asm_visit_addr): Rename to scan_visit_addr, change the
52 disqualification dump message.
53 (scan_function): Check taken addresses for all non-call statements,
54 including phi nodes. Process all call arguments, including the static
55 chain, build_access_from_call_arg.
56 (maybe_add_sra_candidate): Relax need_to_live_in_memory check to allow
57 non-escaped local variables.
58 (sort_and_splice_var_accesses): Disallow smaller-than-precision
59 replacements for aggregates passed by reference to functions.
60 (sra_modify_expr): Use a separate stmt iterator for adding satements
61 before the processed statement and after it.
62 (enum out_edge_check): New type.
63 (abnormal_edge_after_stmt_p): New function.
64 (sra_modify_call_arg): New function.
65 (sra_modify_assign): Adjust calls to sra_modify_expr.
66 (sra_modify_function_body): Likewise, use sra_modify_call_arg to
67 process call arguments, including the static chain.
69 2023-11-24 Uros Bizjak <ubizjak@gmail.com>
72 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Load
73 function address to a register for ix86_cmodel == CM_LARGE.
75 2023-11-24 Tobias Burnus <tobias@codesourcery.com>
77 * doc/invoke.texi (-Wopenmp): Add.
78 * gimplify.cc (gimplify_omp_for): Add OPT_Wopenmp to warning_at.
79 * omp-expand.cc (expand_omp_ordered_sink): Likewise.
80 * omp-general.cc (omp_check_context_selector): Likewise.
81 * omp-low.cc (scan_omp_for, check_omp_nesting_restrictions,
82 lower_omp_ordered_clauses): Likewise.
83 * omp-simd-clone.cc (simd_clone_clauses_extract): Likewise.
85 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
88 * config/riscv/riscv-v.cc (preferred_simd_mode): Allow poly_int (1,1) vectors.
90 2023-11-24 Alexander Monakov <amonakov@ispras.ru>
92 * config.in: Regenerate.
93 * configure: Regenerate.
94 * configure.ac: Delete manual checks for old Valgrind headers.
95 * system.h (VALGRIND_MAKE_MEM_NOACCESS): Delete.
96 (VALGRIND_MAKE_MEM_DEFINED): Delete.
97 (VALGRIND_MAKE_MEM_UNDEFINED): Delete.
98 (VALGRIND_MALLOCLIKE_BLOCK): Delete.
99 (VALGRIND_FREELIKE_BLOCK): Delete.
101 2023-11-24 Jakub Jelinek <jakub@redhat.com>
104 * config/i386/i386-expand.cc (ix86_expand_branch): Use
105 ix86_expand_vector_logical_operator to expand vector XOR rather than
106 gen_rtx_SET on gen_rtx_XOR.
108 2023-11-24 Alex Coplan <alex.coplan@arm.com>
110 * rtl-ssa/access-utils.h (filter_accesses): New.
111 (remove_regno_access): New.
112 (check_remove_regno_access): New.
113 * rtl-ssa/accesses.cc (rtl_ssa::remove_note_accesses_base): Use
114 new filter_accesses helper.
116 2023-11-24 Alex Coplan <alex.coplan@arm.com>
118 * rtl-ssa/accesses.cc (function_info::create_set): New.
119 * rtl-ssa/accesses.h (access_info::is_temporary): New.
120 * rtl-ssa/changes.cc (move_insn): Handle new (temporary) insns.
121 (function_info::finalize_new_accesses): Handle new/temporary
122 user-created accesses.
123 (function_info::apply_changes_to_insn): Ensure m_is_temp flag
124 on new insns gets cleared.
125 (function_info::change_insns): Handle new/temporary insns.
126 (function_info::create_insn): New.
127 * rtl-ssa/changes.h (class insn_change): Make function_info a
129 * rtl-ssa/functions.h (function_info): Declare new entry points:
130 create_set, create_insn. Declare new change_alloc helper.
131 * rtl-ssa/insns.cc (insn_info::print_full): Identify temporary insns in
133 * rtl-ssa/insns.h (insn_info): Add new m_is_temp flag and accompanying
134 is_temporary accessor.
135 * rtl-ssa/internals.inl (insn_info::insn_info): Initialize m_is_temp to
137 * rtl-ssa/member-fns.inl (function_info::change_alloc): New.
138 * rtl-ssa/movement.h (restrict_movement_for_defs_ignoring): Add
139 handling for temporary defs.
141 2023-11-24 Jakub Jelinek <jakub@redhat.com>
143 PR tree-optimization/112673
144 * match.pd (bit_field_ref (vce @0) -> bit_field_ref @0): Only simplify
145 if either @0 doesn't have scalar integral type or if it has mode
148 2023-11-24 Jakub Jelinek <jakub@redhat.com>
151 * gimple-lower-bitint.cc (gimple_lower_bitint): Also stop first loop on
152 floating point SSA_NAME set in FLOAT_EXPR assignment from BITINT_TYPE
153 INTEGER_CST. Set has_large_huge for those if that BITINT_TYPE is large
154 or huge. Set kind to such FLOAT_EXPR assignment rhs1 BITINT_TYPE's kind.
156 2023-11-24 Richard Biener <rguenther@suse.de>
158 PR tree-optimization/112677
159 * tree-vect-loop.cc (vectorizable_reduction): Use alloca
160 to allocate vectype_op.
162 2023-11-24 Haochen Gui <guihaoc@gcc.gnu.org>
164 * expr.cc (by_pieces_ninsns): Include by pieces compare when
165 do the adjustment for overlap operations. Replace mov_optab
166 checks with gcc assertion.
168 2023-11-24 Jakub Jelinek <jakub@redhat.com>
171 * gimple-iterator.h (gsi_end, gsi_end_bb): New inline functions.
172 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): After
173 temporarily adding statements after m_init_gsi, update m_init_gsi
174 such that later additions after it will be after the added statements.
175 (bitint_large_huge::handle_load): Likewise. When splitting
176 gsi_bb (m_init_gsi) basic block, update m_preheader_bb if needed
177 and update saved m_gsi as well if needed.
178 (bitint_large_huge::lower_mergeable_stmt,
179 bitint_large_huge::lower_comparison_stmt,
180 bitint_large_huge::lower_mul_overflow,
181 bitint_large_huge::lower_bit_query): Use gsi_end_bb.
183 2023-11-24 Jakub Jelinek <jakub@redhat.com>
186 * tree.cc (try_catch_may_fallthru): If second operand of
187 TRY_CATCH_EXPR is not a STATEMENT_LIST, handle it as if it was a
188 STATEMENT_LIST containing a single statement.
190 2023-11-24 Richard Biener <rguenther@suse.de>
192 PR tree-optimization/112344
193 * tree-chrec.cc (chrec_apply): Only use an unsigned add
194 when the overall increment doesn't fit the signed type.
196 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
199 * config/riscv/riscv-v.cc (shuffle_extract_and_slide1up_patterns): New function.
200 (expand_vec_perm_const_1): Add new optimization.
202 2023-11-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
204 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): Disable for NUNIT < 4.
206 2023-11-24 Haochen Jiang <haochen.jiang@intel.com>
209 * config/i386/driver-i386.cc (check_avx10_avx512_features):
211 (check_avx512_features): this and remove avx10 check.
212 (host_detect_local_cpu): Never append -mno-avx10.1-{256,512} to
213 avoid emitting warnings when building GCC with native arch.
214 * config/i386/i386-builtin.def (BDESC): Add missing AVX512VL for
215 128/256 bit builtin for AVX512VP2INTERSECT.
216 * config/i386/i386-options.cc (ix86_option_override_internal):
217 Also check whether the AVX512 flags is set when trying to reset.
219 (PTA_SKYLAKE_AVX512): Add missing PTA_EVEX512.
222 2023-11-23 Georg-Johann Lay <avr@gjlay.de>
225 * config/avr/avr.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE): Define
226 to speculation_safe_value_not_needed.
228 2023-11-23 Marek Polacek <polacek@redhat.com>
230 * common.opt (Whardened, fhardened): New options.
231 * config.in: Regenerate.
232 * config/bpf/bpf.cc: Include "opts.h".
233 (bpf_option_override): If flag_stack_protector_set_by_fhardened_p, do
234 not inform that -fstack-protector does not work.
235 * config/i386/i386-options.cc (ix86_option_override_internal): When
236 -fhardened, maybe enable -fcf-protection=full.
237 * config/linux-protos.h (linux_fortify_source_default_level): Declare.
238 * config/linux.cc (linux_fortify_source_default_level): New.
239 * config/linux.h (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Redefine.
240 * configure: Regenerate.
241 * configure.ac: Check if the linker supports '-z now' and '-z relro'.
242 Check if -fhardened is supported on $target_os.
243 * doc/invoke.texi: Document -fhardened and -Whardened.
244 * doc/tm.texi: Regenerate.
245 * doc/tm.texi.in (TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL): Add.
246 * gcc.cc (driver_handle_option): Remember if any link options or -static
247 were specified on the command line.
248 (process_command): When -fhardened, maybe enable -pie and
250 * opts.cc (flag_stack_protector_set_by_fhardened_p): New global.
251 (finish_options): When -fhardened, enable
252 -ftrivial-auto-var-init=zero and -fstack-protector-strong.
253 (print_help_hardened): New.
254 (print_help): Call it.
255 * opts.h (flag_stack_protector_set_by_fhardened_p): Declare.
256 * target.def (fortify_source_default_level): New target hook.
257 * targhooks.cc (default_fortify_source_default_level): New.
258 * targhooks.h (default_fortify_source_default_level): Declare.
259 * toplev.cc (process_options): When -fhardened, enable
260 -fstack-clash-protection. If flag_stack_protector_set_by_fhardened_p,
261 do not warn that -fstack-protector not supported for this target.
262 Don't enable -fhardened when !HAVE_FHARDENED_SUPPORT.
264 2023-11-23 Christophe Lyon <christophe.lyon@linaro.org>
266 * config/arm/arm-mve-builtins-functions.h
267 (full_width_access::memory_vector_mode): Add default clause.
269 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
272 * config/i386/i386.md (parityhi2):
273 Use temporary register in the call to gen_parityhi2_cmp.
275 2023-11-23 Uros Bizjak <ubizjak@gmail.com>
278 * config/i386/i386.cc (ix86_expand_split_stack_prologue): Obtain
279 scratch regno when flag_force_indirect_call is set. On 64-bit
280 targets, call __morestack_large_model when flag_force_indirect_call
281 is set and on 32-bit targets with -fpic, manually expand PIC sequence
282 to call __morestack. Move the function address to an indirect
283 call scratch register.
285 2023-11-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
287 PR tree-optimization/112678
288 * tree-profile.cc (tree_profiling): Do not use atomic operations
289 for -fprofile-update=single.
291 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
293 * config/s390/s390-c.cc (s390_cpu_cpp_builtins): Define
294 __GCC_ASM_FLAG_OUTPUTS__.
295 * config/s390/s390.cc (s390_canonicalize_comparison): More
296 UNSPEC_CC_TO_INT cases.
297 (s390_md_asm_adjust): Implement flags output.
298 * config/s390/s390.md (ccstore4): Allow mask operands.
299 * doc/extend.texi: Document flags output.
301 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
303 * config/s390/s390.md: Split TImode loads.
305 2023-11-23 Juergen Christ <jchrist@linux.ibm.com>
307 * config/s390/vector.md: (*vec_extract) Fix.
309 2023-11-23 Di Zhao <dizhao@os.amperecomputing.com>
311 * tree-ssa-reassoc.cc (get_reassociation_width): check
312 for loop dependent FMAs.
313 (reassociate_bb): For 3 ops, refine the condition to call
314 swap_ops_for_binary_stmt.
316 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
318 * config/riscv/riscv-protos.h (emit_vec_extract): New function.
319 * config/riscv/riscv-v.cc (emit_vec_extract): Ditto.
320 * config/riscv/riscv.cc (riscv_legitimize_move): Refine codes.
322 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
326 * config/riscv/riscv-avlprop.cc (alv_can_be_propagated_p): New function.
327 (vlmax_ta_p): Disable vrgather AVL propagation.
329 2023-11-23 Jakub Jelinek <jakub@redhat.com>
332 * expr.cc (EXTEND_BITINT): Don't call reduce_to_bit_field_precision
333 if modifier is EXPAND_INITIALIZER.
335 2023-11-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
337 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Refine codes.
338 (emit_vlmax_masked_gather_mu_insn): Ditto.
339 (modulo_sel_indices): Ditto.
340 (expand_vec_perm): Ditto.
341 (shuffle_generic_patterns): Ditto.
343 2023-11-23 Jakub Jelinek <jakub@redhat.com>
345 * doc/extend.texi (__builtin_stdc_bit_ceil, __builtin_stdc_bit_floor,
346 __builtin_stdc_bit_width, __builtin_stdc_count_ones,
347 __builtin_stdc_count_zeros, __builtin_stdc_first_leading_one,
348 __builtin_stdc_first_leading_zero, __builtin_stdc_first_trailing_one,
349 __builtin_stdc_first_trailing_zero, __builtin_stdc_has_single_bit,
350 __builtin_stdc_leading_ones, __builtin_stdc_leading_zeros,
351 __builtin_stdc_trailing_ones, __builtin_stdc_trailing_zeros): Document.
353 2023-11-23 Richard Biener <rguenther@suse.de>
356 * doc/md.texi (cpymem): Document that exact overlap of source
357 and destination needs to work.
358 * doc/standards.texi (ffreestanding): Mention memcpy is required
359 to handle the exact overlap case.
361 2023-11-23 Jakub Jelinek <jakub@redhat.com>
364 * doc/invoke.texi (-Wno-c++26-extensions): Document.
366 2023-11-23 Manolis Tsamis <manolis.tsamis@vrull.eu>
368 * ifcvt.cc (noce_convert_multiple_sets_1): Remove old code.
370 2023-11-23 Pan Li <pan2.li@intel.com>
373 * dse.cc (get_stored_val): Allow vector mode if read size is
374 less than or equal to stored size.
376 2023-11-23 Costas Argyris <costas.argyris@gmail.com>
378 * configure.ac: Handle new --enable-win32-utf8-manifest
380 * config.host: allow win32 utf8 manifest to be disabled
382 * configure: Regenerate.
384 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
387 * config/pa/pa.h (MAX_FIXED_MODE_SIZE): Define.
389 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
392 * config/pa/predicates.md (integer_store_memory_operand): Return
393 true for REG+D addresses when reload_in_progress is true.
395 2023-11-22 Richard Biener <rguenther@suse.de>
397 PR tree-optimization/112344
398 * tree-chrec.cc (chrec_apply): Perform the overall increment
399 calculation and increment in an unsigned type.
401 2023-11-22 Andrew Stubbs <ams@codesourcery.com>
403 * config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a
406 2023-11-22 Vladimir N. Makarov <vmakarov@redhat.com>
408 PR rtl-optimization/112610
409 * ira-costs.cc: (find_costs_and_classes): Remove arg.
410 Use ira_dump_file for printing.
411 (print_allocno_costs, print_pseudo_costs): Ditto.
412 (ira_costs): Adjust call of find_costs_and_classes.
413 (ira_set_pseudo_classes): Set up and restore ira_dump_file.
415 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
418 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix vcompress bug.
420 2023-11-22 Tamar Christina <tamar.christina@arm.com>
422 * config/aarch64/aarch64-simd.md
423 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip,
424 aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): Split into...
425 (aarch64_uaddw<mode>_lo_zip, aarch64_uaddw<mode>_hi_zip,
426 "aarch64_usubw<mode>_lo_zip, "aarch64_usubw<mode>_hi_zip): ... This.
427 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): Remove.
428 (perm_hilo): Remove UNSPEC_ZIP1, UNSPEC_ZIP2.
430 2023-11-22 Christophe Lyon <christophe.lyon@linaro.org>
432 * config/arm/arm-mve-builtins.cc
433 (function_resolver::infer_pointer_type): Remove spurious line.
435 2023-11-22 Xi Ruoyao <xry111@xry111.site>
437 * config/loongarch/lsx.md (vec_perm<mode:LSX>): Make the
439 * config/loongarch/loongarch.cc (loongarch_expand_vec_perm):
440 Use the mode of the selector (instead of the shuffled vector)
441 for truncating it. Operate on subregs in the selector mode if
442 the shuffled vector has a different mode (i. e. it's a
443 floating-point vector).
445 2023-11-22 Hongyu Wang <hongyu.wang@intel.com>
447 * config/i386/i386.md (push2_di): Adjust operand order for AT&T
450 (push2p_di): Likewise.
451 (pop2p_di): Likewise.
453 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
456 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Adapt the priority.
457 (shuffle_generic_patterns): Fix permutation indice bug.
458 * config/riscv/vector-iterators.md: Fix VEI16 bug.
460 2023-11-22 liuhongt <hongtao.liu@intel.com>
462 * config/i386/sse.md (cbranch<mode>4): Extend to Vector
465 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
468 * config/vax/vax.cc (index_term_p): Only accept the index scaler
469 as the RHS operand to ASHIFT.
471 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
473 * config/riscv/predicates.md (order_operator): Remove predicate.
474 * config/riscv/riscv.cc (riscv_rtx_costs): Update accordingly.
475 * config/riscv/riscv.md (*branch<mode>, *mov<GPR:mode><X:mode>cc)
476 (cstore<mode>4): Likewise.
478 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
480 * config/riscv/riscv-protos.h (riscv_expand_float_scc): Add
481 `invert_ptr' parameter.
482 * config/riscv/riscv.cc (riscv_emit_float_compare): Add NE
484 (riscv_expand_float_scc): Pass `invert_ptr' through to
485 `riscv_emit_float_compare'.
486 (riscv_expand_conditional_move): Pass `&invert' to
487 `riscv_expand_float_scc'.
488 * config/riscv/riscv.md (add<mode>cc): Likewise.
490 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
492 * config/riscv/riscv.cc (riscv_emit_float_compare) <NE>: Handle
494 <EQ, LE, LT, GE, GT>: Return operands supplied as is.
495 (riscv_emit_binary): Call `riscv_emit_binary' directly rather
496 than going through a temporary register for word-mode targets.
497 (riscv_expand_conditional_branch): Canonicalize the comparison
498 if not against constant zero.
500 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
502 * config/riscv/predicates.md (ne_operator): New predicate.
503 * config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
504 floating-point condition.
505 * config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
506 (@cbranch<ANYF:mode>4): ... this. Only expand the RTX via
507 `riscv_expand_conditional_branch' for `!signed_order_operator'
508 operators, otherwise let it through.
509 (*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
512 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
514 * config/riscv/riscv.cc (riscv_expand_conditional_move): Don't
515 bail out in floating-point conditions.
517 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
519 * config/riscv/riscv.cc (riscv_expand_float_scc): Suppress the
520 use of SUBREG if the conditional-set target is word-mode.
522 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
524 * config/riscv/riscv.md (add<mode>cc): New expander.
526 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
528 * config/riscv/predicates.md (movcc_operand): New predicate.
529 * config/riscv/riscv.cc (riscv_expand_conditional_move): Handle
531 * config/riscv/riscv.md (mov<mode>cc): Likewise.
532 * config/riscv/riscv.opt (mmovcc): New option.
533 * doc/invoke.texi (Option Summary): Document it.
535 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
537 * config/riscv/riscv-protos.h (riscv_emit_unary): New prototype.
538 * config/riscv/riscv.cc (riscv_emit_unary): New function.
540 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
542 * config/riscv/riscv.cc (riscv_expand_conditional_move): Unify
543 conditional-move handling across all the relevant targets.
545 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
547 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
548 accept constants for T-Head data input operands.
550 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
552 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
553 accept constants for T-Head comparison operands.
555 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
557 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
558 the check for operand 1 being constant 0 in the Ventana/Zicond
559 case for equality comparisons.
561 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
563 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
564 invert the condition for GEU and LEU.
566 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
568 * config/riscv/riscv.cc (riscv_insn_cost): New function.
569 (riscv_max_noce_ifcvt_seq_cost): Likewise.
570 (riscv_noce_conversion_profitable_p): Likewise.
571 (TARGET_INSN_COST): New macro.
572 (TARGET_MAX_NOCE_IFCVT_SEQ_COST): New macro.
573 (TARGET_NOCE_CONVERSION_PROFITABLE_P): New macro.
575 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
577 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
578 extraneous variable for EQ vs NE operation selection.
580 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
582 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
583 `nullptr' rather than 0 to initialize a pointer.
585 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
587 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
588 `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
590 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
592 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
593 `mode' for `GET_MODE (dest)' throughout.
595 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
597 * config/riscv/riscv.cc (riscv_emit_int_compare): Bail out if
598 NEED_EQ_NE_P but the comparison is neither EQ nor NE.
600 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
602 * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
604 (*mov<GPR:mode><X:mode>cc): ... here.
606 2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
609 * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow
610 reduction index != 1.
611 (vect_transform_reduction): Handle reduction index != 1.
613 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
615 * common.md (aligned_register_operand): New predicate.
617 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
619 * ira-int.h (ira_allocno): Add a register_filters field.
620 (ALLOCNO_REGISTER_FILTERS): New macro.
621 (ALLOCNO_SET_REGISTER_FILTERS): Likewise.
622 * ira-build.cc (ira_create_allocno): Initialize register_filters.
623 (create_cap_allocno): Propagate register_filters.
624 (propagate_allocno_info): Likewise.
625 (propagate_some_info_from_allocno): Likewise.
626 * ira-lives.cc (process_register_constraint_filters): New function.
627 (process_bb_node_lives): Use it to record register filter
629 * ira-color.cc (assign_hard_reg): Check register filters.
630 (improve_allocation, fast_allocation): Likewise.
632 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
634 * lra-constraints.cc (process_alt_operands): Check register filters.
636 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
638 * recog.h (operand_alternative): Add a register_filters field.
639 (alternative_register_filters): New function.
640 * recog.cc (preprocess_constraints): Calculate the filters field.
641 (constrain_operands): Check register filters.
643 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
645 * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter
647 * doc/md.texi (define_register_constraint): Document it.
648 * doc/tm.texi.in: Reference it in discussion about aligned registers.
649 * doc/tm.texi: Regenerate.
650 * gensupport.h (register_filters, get_register_filter_id): Declare.
651 * gensupport.cc (register_filter_map, register_filters): New variables.
652 (get_register_filter_id): New function.
653 (process_define_register_constraint): Likewise.
654 (process_rtx): Pass define_register_constraints to
655 process_define_register_constraint.
656 * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS.
657 * genpreds.cc (constraint_data): Add a filter field.
658 (add_constraint): Update accordingly.
659 (process_define_register_constraint): Pass the filter operand.
660 (write_init_reg_class_start_regs): New function.
661 (write_get_register_filter): Likewise.
662 (write_get_register_filter_id): Likewise.
663 (write_tm_preds_h): Write a definition of target_constraints,
664 plus helpers to test its contents. Write the get_register_filter*
666 (write_insn_preds_c): Write init_reg_class_start_regs.
667 * reginfo.cc (init_reg_class_start_regs): Declare.
668 (init_reg_sets): Call it.
669 * target-globals.h (this_target_constraints): Declare.
670 (target_globals): Add a constraints field.
671 (restore_target_globals): Update accordingly.
672 * target-globals.cc: Include tm_p.h.
673 (default_target_globals): Initialize the constraints field.
674 (save_target_globals): Handle the constraints field.
675 (target_globals::~target_globals): Likewise.
677 2023-11-21 Richard Biener <rguenther@suse.de>
679 PR tree-optimization/112623
680 * tree-ssa-forwprop.cc (simplify_vector_constructor):
681 Check the source mode of the insn for vector pack/unpacks.
683 2023-11-21 Richard Biener <rguenther@suse.de>
685 * tree-vect-loop.cc (vect_analyze_loop_2): Move check
686 of VF against max_vf until VF is final.
688 2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
691 * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32.
693 2023-11-21 Tamar Christina <tamar.christina@arm.com>
695 * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings.
697 2023-11-21 Tamar Christina <tamar.christina@arm.com>
700 * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a,
701 armv9.3-a): Update to generic-armv9-a.
702 * config/aarch64/aarch64-cores.def (generic-armv9-a): New.
703 * config/aarch64/aarch64-tune.md: Regenerate.
704 * config/aarch64/aarch64.cc: Include generic_armv9_a.h.
705 * config/aarch64/tuning_models/generic_armv9_a.h: New file.
707 2023-11-21 Tamar Christina <tamar.christina@arm.com>
710 * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a,
711 armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a,
712 armv8.8-a): Update to generic_armv8_a.
713 * config/aarch64/aarch64-cores.def (generic-armv8-a): New.
714 * config/aarch64/aarch64-tune.md: Regenerate.
715 * config/aarch64/aarch64.cc: Include generic_armv8_a.h
716 * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to
717 TARGET_CPU_generic_armv8_a.
718 * config/aarch64/tuning_models/generic_armv8_a.h: New file.
720 2023-11-21 Tamar Christina <tamar.christina@arm.com>
723 * config/aarch64/aarch64-cores.def: Add generic.
724 * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic.
725 * config/aarch64/aarch64-tune.md: Regenerate
726 * config/aarch64/aarch64.cc (all_cores): Remove generic
727 * config/aarch64/aarch64.h (enum target_cpus): Remove
730 2023-11-21 Tamar Christina <tamar.christina@arm.com>
733 * config/aarch64/aarch64.cc (generic_addrcost_table,
734 exynosm1_addrcost_table,
735 xgene1_addrcost_table,
736 thunderx2t99_addrcost_table,
737 thunderx3t110_addrcost_table,
738 tsv110_addrcost_table,
739 qdf24xx_addrcost_table,
740 a64fx_addrcost_table,
741 neoversev1_addrcost_table,
742 neoversen2_addrcost_table,
743 neoversev2_addrcost_table,
744 generic_regmove_cost,
745 cortexa57_regmove_cost,
746 cortexa53_regmove_cost,
747 exynosm1_regmove_cost,
748 thunderx_regmove_cost,
750 qdf24xx_regmove_cost,
751 thunderx2t99_regmove_cost,
752 thunderx3t110_regmove_cost,
755 neoversen2_regmove_cost,
756 neoversev1_regmove_cost,
757 neoversev2_regmove_cost,
761 thunderx_vector_cost,
763 cortexa57_vector_cost,
764 exynosm1_vector_cost,
766 thunderx2t99_vector_cost,
767 thunderx3t110_vector_cost,
784 thunderx2t99_tunings,
785 thunderx3t110_tunings,
789 neoversev1_vector_cost,
791 neoverse512tvb_vector_cost,
792 neoverse512tvb_tunings,
793 neoversen2_vector_cost,
795 neoversev2_vector_cost,
797 a64fx_tunings): Split into own files.
798 * config/aarch64/tuning_models/a64fx.h: New file.
799 * config/aarch64/tuning_models/ampere1.h: New file.
800 * config/aarch64/tuning_models/ampere1a.h: New file.
801 * config/aarch64/tuning_models/cortexa35.h: New file.
802 * config/aarch64/tuning_models/cortexa53.h: New file.
803 * config/aarch64/tuning_models/cortexa57.h: New file.
804 * config/aarch64/tuning_models/cortexa72.h: New file.
805 * config/aarch64/tuning_models/cortexa73.h: New file.
806 * config/aarch64/tuning_models/emag.h: New file.
807 * config/aarch64/tuning_models/exynosm1.h: New file.
808 * config/aarch64/tuning_models/generic.h: New file.
809 * config/aarch64/tuning_models/neoverse512tvb.h: New file.
810 * config/aarch64/tuning_models/neoversen1.h: New file.
811 * config/aarch64/tuning_models/neoversen2.h: New file.
812 * config/aarch64/tuning_models/neoversev1.h: New file.
813 * config/aarch64/tuning_models/neoversev2.h: New file.
814 * config/aarch64/tuning_models/qdf24xx.h: New file.
815 * config/aarch64/tuning_models/saphira.h: New file.
816 * config/aarch64/tuning_models/thunderx.h: New file.
817 * config/aarch64/tuning_models/thunderx2t99.h: New file.
818 * config/aarch64/tuning_models/thunderx3t110.h: New file.
819 * config/aarch64/tuning_models/thunderxt88.h: New file.
820 * config/aarch64/tuning_models/tsv110.h: New file.
821 * config/aarch64/tuning_models/xgene1.h: New file.
823 2023-11-21 Tamar Christina <tamar.christina@arm.com>
825 * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode,
826 vec_unpack<su>_lo_<mode): Split into...
827 (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode,
828 vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These.
829 (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
830 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
831 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New.
832 (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2.
834 2023-11-21 Tamar Christina <tamar.christina@arm.com>
836 * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla.
837 (aarch64_vector_costs::count_ops): Likewise.
839 2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
842 * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of
843 __atomic_add_fetch() to the signed counter type.
844 (gen_counter_update): Fix formatting.
846 2023-11-21 Jakub Jelinek <jakub@redhat.com>
848 * tree-profile.cc (gen_counter_update, tree_profiling): Formatting
851 2023-11-21 Jakub Jelinek <jakub@redhat.com>
854 * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1
855 is specified but cleared, call save_expr on arg0.
857 2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
859 * config/i386/i386-expand.h (gen_push): Add default bool
862 * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add
864 * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add
865 ppx_p parameter for function declaration.
866 (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true.
867 (gen_push): Likewise.
868 (ix86_emit_restore_reg_using_pop2): Likewise for pop2p.
869 (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX.
870 (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn
871 and adjust cfi when ppx_p is ture.
872 (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its
874 (ix86_emit_restore_regs_using_pop2): Likewise.
875 (ix86_expand_epilogue): Parse TARGET_APX_PPX to
876 ix86_emit_restore_reg_using_pop.
877 * config/i386/i386.h (TARGET_APX_PPX): New.
878 * config/i386/i386.md (UNSPEC_APX_PPX): New unspec.
879 (pushp_di): New define_insn.
881 (push2p_di): Likewise.
882 (pop2p_di): Likewise.
883 * config/i386/i386.opt: Add apx_ppx enum.
885 2023-11-21 Richard Biener <rguenther@suse.de>
887 PR tree-optimization/111970
888 * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation
890 (vectorizable_store): Likewise for SLP scatter store.
892 2023-11-21 Xi Ruoyao <xry111@xry111.site>
894 * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to
895 exclude it for target libraries.
896 (loongarch_isa_base_features): Likewise.
897 (loongarch_isa): Likewise.
898 (loongarch_abi): Likewise.
899 (loongarch_target): Likewise.
900 (loongarch_cpu_default_isa): Likewise.
902 2023-11-21 liuhongt <hongtao.liu@intel.com>
905 * config/i386/i386-expand.cc (emit_reduc_half): Hanlde
907 * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander.
908 (reduc_<code>_scal_v4qi): Ditto.
910 2023-11-20 Marc Poulhiès <dkm@kataplop.net>
912 * config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic.
913 * config/nvptx/nvptx.cc (nvptx_function_arg_advance): Adjust to use fixed name.
914 (nvptx_declare_function_name): Likewise.
915 (nvptx_call_args): Likewise.
916 (nvptx_expand_call): Likewise.
918 2023-11-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
920 * tree-profile.cc (gen_counter_update): Use unshare_expr() for the
921 counter expression in the second gimple_build_assign().
923 2023-11-20 Jan Hubicka <jh@suse.cz>
925 * cgraph.cc (add_detected_attribute_1): New function.
926 (cgraph_node::add_detected_attribute): Likewise.
927 * cgraph.h (cgraph_node::add_detected_attribute): Declare.
928 * common.opt: Add -Wsuggest-attribute=returns_nonnull.
929 * doc/invoke.texi: Document new flag.
930 * gimple-range-fold.cc (fold_using_range::range_of_call):
931 Use known reutrn value ranges.
932 * ipa-prop.cc (struct ipa_return_value_summary): New type.
933 (class ipa_return_value_sum_t): New type.
934 (ipa_return_value_sum): New summary.
935 (ipa_record_return_value_range): New function.
936 (ipa_return_value_range): New function.
937 * ipa-prop.h (ipa_return_value_range): Declare.
938 (ipa_record_return_value_range): Declare.
939 * ipa-pure-const.cc (warn_function_returns_nonnull): New funcion.
940 * ipa-utils.h (warn_function_returns_nonnull): Declare.
941 * symbol-summary.h: Fix comment.
942 * tree-vrp.cc (execute_ranger_vrp): Record return values.
944 2023-11-20 Richard Biener <rguenther@suse.de>
946 PR tree-optimization/112618
947 * tree-vect-loop.cc (vect_transform_loop_stmt): For not
948 relevant and unused .MASK_CALL make sure we remove the
951 2023-11-20 Richard Biener <rguenther@suse.de>
953 PR tree-optimization/112281
954 * tree-loop-distribution.cc
955 (loop_distribution::pg_add_dependence_edges): For = in the
956 innermost common loop record a partition conflict.
958 2023-11-20 Richard Biener <rguenther@suse.de>
961 * convert.cc (convert_to_real_1): Use element_precision
962 where a vector type might appear. Provide specific
963 diagnostic for unexpected vector argument.
965 2023-11-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
968 * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE.
969 * config/riscv/vector.md: Fix slide1 intermediate mode bug.
971 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
973 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p):
974 Add check for XLEN == 32.
975 * config/riscv/vector-iterators.md: Change VLS part of the
976 demote iterator to 2x elements modes
977 * config/riscv/vector.md: Adjust iterators and insn conditions.
979 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
981 * config/arm/arm-mve-builtins-base.cc (vld1_impl, vld1q)
982 (vst1_impl, vst1q): New.
983 * config/arm/arm-mve-builtins-base.def (vld1q, vst1q): New.
984 * config/arm/arm-mve-builtins-base.h (vld1q, vst1q): New.
985 * config/arm/arm_mve.h
1000 (vst1q_s16): Delete.
1002 (vst1q_u32): Delete.
1003 (vst1q_u16): Delete.
1004 (__arm_vld1q_s8): Delete.
1005 (__arm_vld1q_s32): Delete.
1006 (__arm_vld1q_s16): Delete.
1007 (__arm_vld1q_u8): Delete.
1008 (__arm_vld1q_u32): Delete.
1009 (__arm_vld1q_u16): Delete.
1010 (__arm_vst1q_s8): Delete.
1011 (__arm_vst1q_s32): Delete.
1012 (__arm_vst1q_s16): Delete.
1013 (__arm_vst1q_u8): Delete.
1014 (__arm_vst1q_u32): Delete.
1015 (__arm_vst1q_u16): Delete.
1016 (__arm_vld1q_f32): Delete.
1017 (__arm_vld1q_f16): Delete.
1018 (__arm_vst1q_f32): Delete.
1019 (__arm_vst1q_f16): Delete.
1020 (__arm_vld1q): Delete.
1021 (__arm_vst1q): Delete.
1022 * config/arm/mve.md (mve_vld1q_f<mode>): Rename into ...
1023 (@mve_vld1q_f<mode>): ... this.
1024 (mve_vld1q_<supf><mode>): Rename into ...
1025 (@mve_vld1q_<supf><mode>) ... this.
1026 (mve_vst1q_f<mode>): Rename into ...
1027 (@mve_vst1q_f<mode>): ... this.
1028 (mve_vst1q_<supf><mode>): Rename into ...
1029 (@mve_vst1q_<supf><mode>) ... this.
1031 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1033 * config/arm/arm-mve-builtins-shapes.cc (load, store): New.
1034 * config/arm/arm-mve-builtins-shapes.h (load, store): New.
1036 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1038 * config/arm/arm-mve-builtins-functions.h (multi_vector_function)
1039 (full_width_access): New classes.
1040 * config/arm/arm-mve-builtins.cc
1041 (find_type_suffix_for_scalar_type, infer_pointer_type)
1042 (require_pointer_type, get_contiguous_base, add_mem_operand)
1043 (add_fixed_operand, use_contiguous_load_insn)
1044 (use_contiguous_store_insn): New.
1045 * config/arm/arm-mve-builtins.h (memory_vector_mode)
1046 (infer_pointer_type, require_pointer_type, get_contiguous_base)
1048 (add_fixed_operand, use_contiguous_load_insn)
1049 (use_contiguous_store_insn): New.
1051 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1053 * config/arm/arm-mve-builtins-shapes.cc (build_const_pointer):
1055 (parse_type): Add support for '_', 'al' and 'as'.
1056 * config/arm/arm-mve-builtins.h (function_instance): Add
1058 (function_base): Likewise.
1060 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
1062 * config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Fix
1063 initialization of arm_simd_types[].eltype.
1064 * config/arm/arm-mve-builtins.def (DEF_MVE_TYPE): Fix scalar
1067 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1069 * typeclass.h (enum type_class): Add vector_type_class.
1070 * builtins.cc (type_to_class): Return vector_type_class for
1072 * doc/extend.texi (__builtin_classify_type): Mention bit-precise
1073 integer types and vector types.
1075 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
1077 PR middle-end/112406
1078 * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern):
1079 Convert masks for conditional operations as well.
1081 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1083 PR tree-optimization/90693
1084 * tree-ssa-math-opts.cc (match_single_bit_test): Mark POPCOUNT with
1085 result only used in equality comparison against 1 with direct optab
1086 support as .POPCOUNT call with 2 arguments.
1087 * internal-fn.h (expand_POPCOUNT): Declare.
1088 * internal-fn.def (DEF_INTERNAL_INT_EXT_FN): New macro, document it,
1089 undefine at the end.
1090 (POPCOUNT): Use it instead of DEF_INTERNAL_INT_FN.
1091 * internal-fn.cc (DEF_INTERNAL_INT_EXT_FN): Define to nothing before
1092 inclusion to define expanders.
1093 (expand_POPCOUNT): New function.
1095 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1097 PR tree-optimization/90693
1098 * tree-ssa-math-opts.cc (match_single_bit_test): New function.
1099 (math_opts_dom_walker::after_dom_children): Call it for EQ_EXPR
1100 and NE_EXPR assignments and GIMPLE_CONDs.
1102 2023-11-20 Jakub Jelinek <jakub@redhat.com>
1104 * internal-fn.def: Document missing DEF_INTERNAL* macros and make sure
1105 they are all undefined at the end.
1106 * internal-fn.cc (lookup_hilo_internal_fn, lookup_evenodd_internal_fn,
1107 widening_fn_p, get_len_internal_fn): Don't undef DEF_INTERNAL_*FN
1108 macros after inclusion of internal-fn.def.
1110 2023-11-20 Haochen Jiang <haochen.jiang@intel.com>
1112 * common/config/i386/cpuinfo.h (get_available_features):
1113 Add avx10_set and version and detect avx10.1.
1114 (cpu_indicator_init): Handle avx10.1-512.
1115 * common/config/i386/i386-common.cc
1116 (OPTION_MASK_ISA2_AVX10_1_256_SET): New.
1117 (OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto.
1118 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
1119 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
1120 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1.
1121 (ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512.
1122 Add indicator for explicit no-avx512 and no-avx10.1 options.
1123 * common/config/i386/i386-cpuinfo.h (enum processor_features):
1124 Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512.
1125 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
1126 AVX10_1_256 and AVX10_1_512.
1127 * config/i386/cpuid.h (bit_AVX10): New.
1128 (bit_AVX10_256): Ditto.
1129 (bit_AVX10_512): Ditto.
1130 * config/i386/driver-i386.cc (check_avx10_avx512_features): New.
1131 (host_detect_local_cpu): Do not append "-mno-" options under
1132 specific scenarios to avoid emitting a warning.
1133 * config/i386/i386-isa.def
1134 (EVEX512): Add DEF_PTA(EVEX512).
1135 (AVX10_1_256): Add DEF_PTA(AVX10_1_256).
1136 (AVX10_1_512): Add DEF_PTA(AVX10_1_512).
1137 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and
1139 (ix86_function_specific_save): Save explicit no indicator.
1140 (ix86_function_specific_restore): Restore explicit no indicator.
1141 (ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and
1143 (ix86_valid_target_attribute_tree): Handle avx512 function
1144 attributes with avx10.1 command line option.
1145 (ix86_option_override_internal): Handle AVX10.1 options.
1146 * config/i386/i386.h: Add PTA_EVEX512 for AVX512 target
1148 * config/i386/i386.opt: Add variable ix86_no_avx512_explicit and
1149 ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and
1151 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
1152 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
1153 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
1156 2023-11-20 liuhongt <hongtao.liu@intel.com>
1159 * config/i386/sse.md (reduc_<code>_scal_<mode>): New expander.
1160 (REDUC_ANY_LOGIC_MODE): New iterator.
1161 (REDUC_PLUS_MODE): Extend to VxHI/SI/DImode.
1162 (REDUC_SSE_PLUS_MODE): Ditto.
1164 2023-11-20 xuli <xuli1@eswincomputing.com>
1167 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum.
1168 * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options.
1169 (expand_block_move): Ditto.
1170 * config/riscv/riscv.opt: Add -mmemcpy-strategy=.
1172 2023-11-20 Lulu Cheng <chenglulu@loongson.cn>
1174 * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
1176 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1178 * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Optimize constant AVL.
1180 2023-11-19 Philipp Tomsich <philipp.tomsich@vrull.eu>
1182 * config/riscv/riscv-protos.h (extract_base_offset_in_addr): Prototype.
1183 * config/riscv/riscv.cc (riscv_fusion_pairs): New enum.
1184 (riscv_tune_param): Add fusible_ops field.
1185 (riscv_tune_param_rocket_tune_info): Initialize new field.
1186 (riscv_tune_param_sifive_7_tune_info): Likewise.
1187 (thead_c906_tune_info): Likewise.
1188 (generic_oo_tune_info): Likewise.
1189 (optimize_size_tune_info): Likewise.
1190 (riscv_macro_fusion_p): New function.
1191 (riscv_fusion_enabled_p): Likewise.
1192 (riscv_macro_fusion_pair_p): Likewise.
1193 (TARGET_SCHED_MACRO_FUSION_P): Define.
1194 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
1195 (extract_base_offset_in_addr): Moved into riscv.cc from...
1196 * config/riscv/thead.cc: Here.
1197 Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>
1198 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
1200 2023-11-19 Jeff Law <jlaw@ventanamicro.com>
1202 * config/c6x/c6x.md (mvilc): Add mode to UNSPEC source.
1203 * config/mips/mips.md (rdhwr_synci_step_<mode>): Likewise.
1204 * config/riscv/riscv.md (riscv_frcsr, riscv_frflags): Likewise.
1205 * config/s390/s390.md (@split_stack_call<mode>): Likewise.
1206 (@split_stack_cond_call<mode>): Likewise.
1207 * config/sh/sh.md (sp_switch_1): Likewise.
1209 2023-11-19 David Malcolm <dmalcolm@redhat.com>
1211 * diagnostic.h: Include "rich-location.h".
1212 * edit-context.h (class fixit_hint): New forward decl.
1213 * gcc-rich-location.h: Include "rich-location.h".
1214 * genmatch.cc: Likewise.
1215 * pretty-print.h: Likewise.
1217 2023-11-19 David Malcolm <dmalcolm@redhat.com>
1219 * Makefile.in (CPPLIB_H): Add libcpp/include/rich-location.h.
1220 * coretypes.h (class rich_location): New forward decl.
1222 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1224 * config/riscv/riscv-v.cc (expand_tuple_move): Fix bug.
1226 2023-11-19 David Malcolm <dmalcolm@redhat.com>
1229 * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-strtok.
1231 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1233 * config/loongarch/predicates.md (const_call_insn_operand):
1234 Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to
1235 "true" to make the coding style consistent.
1237 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1239 * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas):
1241 * config/loongarch/loongarch-str.h: Regenerate.
1242 * config/loongarch/loongarch.opt: Regenerate.
1243 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
1244 * config/loongarch/loongarch-cpu.cc
1245 (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH
1246 and OPTION_MASK_ISA_LAMCAS.
1247 * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use
1248 TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty
1249 lines from assembly output.
1250 (atomic_exchange<mode>_short): Likewise.
1251 (atomic_exchange<mode:SHORT>): Likewise.
1252 (atomic_fetch_add<mode>_short): Likewise.
1253 (atomic_fetch_add<mode:SHORT>): Likewise.
1254 (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead
1255 of ISA_BASE_IS_LA64V110.
1256 (atomic_compare_and_swap<mode>): Likewise.
1257 (atomic_compare_and_swap<mode:GPR>): Likewise.
1258 (atomic_compare_and_swap<mode:SHORT>): Likewise.
1259 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump
1260 status if -mlam-bh and -mlamcas if -fverbose-asm.
1262 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1264 * config/loongarch/loongarch.cc (loongarch_print_operand): Don't
1265 print dbar 0x700 if TARGET_LD_SEQ_SA.
1266 * config/loongarch/sync.md (atomic_load<mode>): Likewise.
1268 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1270 * config/loongarch/loongarch.md (DIV): New mode iterator.
1271 (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32.
1272 (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32.
1273 (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32.
1274 (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32.
1276 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1278 * config/loongarch/loongarch-def.h:
1279 (loongarch_isa_base_features): Declare. Define it in ...
1280 * config/loongarch/loongarch-cpu.cc
1281 (loongarch_isa_base_features): ... here.
1282 (fill_native_cpu_config): If we know the base ISA of the CPU
1283 model from PRID, use it instead of la64 (v1.0). Check if all
1284 expected features of this base ISA is available, emit a warning
1286 * config/loongarch/loongarch-opts.cc (config_target_isa): Enable
1287 the features implied by the base ISA if not -march=native.
1289 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1291 * config/loongarch/genopts/isa-evolution.in: New data file.
1292 * config/loongarch/genopts/genstr.sh: Translate info in
1293 isa-evolution.in when generating loongarch-str.h, loongarch.opt,
1294 and loongarch-cpucfg-map.h.
1295 * config/loongarch/genopts/loongarch.opt.in (isa_evolution):
1297 * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New
1299 (loongarch-str.h): Depend on isa-evolution.in.
1300 (loongarch.opt): Depend on isa-evolution.in.
1301 (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h.
1302 * config/loongarch/loongarch-str.h: Regenerate.
1303 * config/loongarch/loongarch-def.h (loongarch_isa): Add field
1304 for evolution features. Add helper function to enable features
1306 Probe native CPU capability and save the corresponding options
1308 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config):
1309 Probe native CPU capability and save the corresponding options
1311 (cache_cpucfg): Simplify with C++11-style for loop.
1312 (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ...
1313 * config/loongarch/loongarch.cc
1314 (loongarch_option_override_internal): Enable the ISA evolution
1315 feature options implied by -march and not explicitly disabled.
1316 (loongarch_asm_code_end): New function, print ISA information as
1317 comments in the assembly if -fverbose-asm. It makes easier to
1318 debug things like -march=native.
1319 (TARGET_ASM_CODE_END): Define.
1320 * config/loongarch/loongarch.opt: Regenerate.
1321 * config/loongarch/loongarch-cpucfg-map.h: Generate.
1322 (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here.
1324 2023-11-18 Xi Ruoyao <xry111@xry111.site>
1326 * config/loongarch/genopts/loongarch-strings:
1327 (STR_ISA_BASE_LA64V110): Add.
1328 * config/loongarch/genopts/loongarch.opt.in:
1329 (ISA_BASE_LA64V110): Add.
1330 * config/loongarch/loongarch-def.c
1331 (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
1332 to STR_ISA_BASE_LA64V110.
1333 * config/loongarch/loongarch.opt: Regenerate.
1334 * config/loongarch/loongarch-str.h: Regenerate.
1336 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
1338 * doc/invoke.texi (-fprofile-update): Clarify default method. Document
1339 the atomic method behaviour.
1340 * tree-profile.cc (enum counter_update_method): New.
1341 (counter_update): Likewise.
1342 (gen_counter_update): Use counter_update_method. Split the
1343 atomic counter update in two 32-bit atomic operations if
1345 (tree_profiling): Select counter_update_method.
1347 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
1349 * tree-profile.cc (gen_assign_counter_update): New.
1350 (gen_counter_update): Likewise.
1351 (gimple_gen_edge_profiler): Use gen_counter_update().
1352 (gimple_gen_time_profiler): Likewise.
1354 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
1356 * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define.
1357 * doc/tm.texi: Regenerate.
1358 * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add.
1359 * target.def (have_libatomic): New.
1361 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
1364 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
1366 * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
1367 * config/sparc/sparc.c (sparc_gcov_type_size): New.
1368 (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
1369 * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
1370 * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
1371 * doc/tm.texi.in: Regenerate.
1372 * target.def (gcov_type_size): New target hook.
1373 * targhooks.c (default_gcov_type_size): New.
1374 * targhooks.h (default_gcov_type_size): Declare.
1375 * tree-profile.c (gimple_gen_edge_profiler): Use precision of
1377 (gimple_gen_time_profiler): Likewise.
1379 2023-11-18 Kito Cheng <kito.cheng@sifive.com>
1381 * config/riscv/riscv-target-attr.cc
1382 (riscv_target_attr_parser::parse_arch): Use char[] for
1383 std::unique_ptr to prevent mismatched new delete issue.
1384 (riscv_process_one_target_attr): Ditto.
1385 (riscv_process_target_attr): Ditto.
1387 2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1389 * config/riscv/vector-iterators.md: Refactor iterators.
1391 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1393 * config/loongarch/sync.md (atomic_load<mode>): New template.
1395 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1397 * config/loongarch/loongarch-def.h: Add comments.
1398 * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro.
1399 * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence):
1400 Remove redundant code implementations.
1401 * config/loongarch/sync.md (d): Added QI, HI support.
1402 (atomic_add<mode>): New template.
1403 (atomic_exchange<mode>_short): Likewise.
1404 (atomic_cas_value_strong<mode>_amcas): Likewise..
1405 (atomic_fetch_add<mode>_short): Likewise.
1407 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1409 * config.gcc: Support LA664.
1410 * config/loongarch/genopts/loongarch-strings: Likewise.
1411 * config/loongarch/genopts/loongarch.opt.in: Likewise.
1412 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise.
1413 * config/loongarch/loongarch-def.c: Likewise.
1414 * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise.
1415 (ISA_BASE_LA64V110): Define macro.
1416 (N_ARCH_TYPES): Update value.
1417 (N_TUNE_TYPES): Update value.
1418 (CPU_LA664): New macro.
1419 * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise.
1420 (isa_base_compat_p): Likewise.
1421 * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled
1422 when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110.
1423 (TARGET_uARCH_LA664): Define macro.
1424 * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise.
1425 * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width):
1427 * config/loongarch/loongarch.opt: Regenerate.
1429 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1430 Xi Ruoyao <xry111@xry111.site>
1432 * config.in: Regenerate.
1433 * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro.
1434 * config/loongarch/loongarch.cc (loongarch_legitimize_call_address):
1435 If binutils supports call36, the function call is not split over expand.
1436 * config/loongarch/loongarch.md: Add call36 generation code.
1437 * config/loongarch/predicates.md: Likewise.
1438 * configure: Regenerate.
1439 * configure.ac: Check whether binutils supports call36.
1441 2023-11-18 David Malcolm <dmalcolm@redhat.com>
1444 * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o.
1445 * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and
1446 -Wanalyzer-infinite-loop. Add missing CWE link for
1447 -Wanalyzer-infinite-recursion.
1448 * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New.
1450 2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
1452 PR middle-end/112406
1453 PR middle-end/112552
1454 * tree-vect-loop.cc (vect_transform_reduction): Pass truth
1455 vectype for mask operand.
1457 2023-11-17 Jakub Jelinek <jakub@redhat.com>
1460 * gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after
1461 gsi_remove, change the way of passing fallthrough stmt at the end
1462 of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH
1463 with GF_CALL_NOTHROW flag.
1464 (expand_FALLTHROUGH): Change loc into array of 2 location_t elts,
1465 don't test wi.callback_result, instead check whether first
1466 elt is not UNKNOWN_LOCATION and in that case pedwarn with the
1468 * gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt
1469 after the flag has been used.
1470 * internal-fn.def (FALLTHROUGH): Mention in comment the special
1471 meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls.
1473 2023-11-17 Jakub Jelinek <jakub@redhat.com>
1475 PR tree-optimization/112566
1476 PR tree-optimization/83171
1477 * match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X),
1478 parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New
1480 ( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than
1481 BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX.
1483 2023-11-17 Jakub Jelinek <jakub@redhat.com>
1485 PR tree-optimization/112374
1486 * tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p
1487 special case only if op_use_stmt == use_stmt, use as_a rather than
1488 dyn_cast in that case.
1490 2023-11-17 Richard Biener <rguenther@suse.de>
1493 2023-11-14 Richard Biener <rguenther@suse.de>
1495 PR tree-optimization/112281
1496 * tree-loop-distribution.cc (pg_add_dependence_edges):
1497 Preserve stmt order when the innermost loop has exact
1500 2023-11-17 Georg-Johann Lay <avr@gjlay.de>
1503 * config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]:
1504 Only return some .progmem*.data section if the user did not
1505 specify a section attribute.
1506 (avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE
1507 in returned section flags.
1509 2023-11-17 Xi Ruoyao <xry111@xry111.site>
1511 * config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to
1512 be an reg_or_vector_same_val_operand. If it's a const vector
1513 with same negative elements, expand the copysign with a bitset
1514 instruction. Otherwise, force it into an register.
1515 * config/loongarch/lasx.md (copysign<mode>3): Likewise.
1517 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
1520 * config/rs6000/vsx.md (*vsx_le_mem_to_mem_mov_ti): New.
1522 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
1525 * config/rs6000/altivec.md (cbranchv16qi4): New expand pattern.
1526 * config/rs6000/rs6000.cc (rs6000_generate_compare): Generate
1527 insn sequence for V16QImode equality compare.
1528 * config/rs6000/rs6000.h (MOVE_MAX_PIECES): Define.
1529 (STORE_MAX_PIECES): Define.
1531 2023-11-17 Li Wei <liwei@loongson.cn>
1533 * config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO):
1535 (CTZ_DEFINED_VALUE_AT_ZERO): Same.
1537 2023-11-17 Richard Biener <rguenther@suse.de>
1539 * dwarf2out.cc (add_AT_die_ref): Assert we do not add
1540 a self-ref DW_AT_abstract_origin or DW_AT_specification.
1542 2023-11-17 Jiahao Xu <xujiahao@loongson.cn>
1544 * config/loongarch/loongarch.cc
1545 (loongarch_builtin_vectorization_cost): Adjust.
1547 2023-11-16 Andrew Pinski <pinskia@gmail.com>
1549 PR rtl-optimization/112483
1550 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
1551 Call simplify_unary_operation for NEG instead of
1554 2023-11-16 Edwin Lu <ewlu@rivosinc.com>
1557 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): update macro name
1559 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
1562 * config/i386/i386.md (*addqi_ext2<mode>_0):
1563 New define_insn_and_split pattern.
1564 (*subqi_ext2<mode>_0): Ditto.
1565 (*<code>qi_ext2<mode>_0): Ditto.
1567 2023-11-16 John David Anglin <danglin@gcc.gnu.org>
1569 PR rtl-optimization/112415
1570 * config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
1571 displacements before reload. Simplify logic flow. Revise
1573 * config/pa/pa.h (TARGET_ELF64): New define.
1574 (INT14_OK_STRICT): Update define and comment.
1575 * config/pa/pa64-linux.h (TARGET_ELF64): Define.
1576 * config/pa/predicates.md (base14_operand): Don't check
1577 alignment of short displacements.
1578 (integer_store_memory_operand): Don't return true when
1579 reload_in_progress is true. Remove INT_5_BITS check.
1580 (floating_point_store_memory_operand): Don't return true when
1581 reload_in_progress is true. Use INT14_OK_STRICT to check
1582 whether long displacements are always okay.
1584 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
1587 * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp):
1588 Fix generation of invalid RTX in split pattern.
1590 2023-11-16 David Malcolm <dmalcolm@redhat.com>
1592 * diagnostic.cc (diagnostic_context::set_option_hooks): Add
1594 * diagnostic.h (diagnostic_context::option_enabled_p): Update for
1595 move of m_lang_mask.
1596 (diagnostic_context::set_option_hooks): Add "lang_mask" param.
1597 (diagnostic_context::get_lang_mask): New.
1598 (diagnostic_context::m_lang_mask): Move into m_option_callbacks,
1599 thus making private.
1600 * lto-wrapper.cc (main): Update for new lang_mask param of
1602 * toplev.cc (init_asm_output): Use get_lang_mask.
1603 (general_init): Move initialization of global_dc's lang_mask to
1604 new lang_mask param of set_option_hooks.
1606 2023-11-16 Tamar Christina <tamar.christina@arm.com>
1608 PR tree-optimization/111878
1609 * tree-vect-loop-manip.cc (find_loop_location): Skip edges check if
1612 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
1614 * config.gcc (riscv): Add riscv-target-attr.o.
1615 * config/riscv/riscv-protos.h (riscv_declare_function_size) New.
1616 (riscv_option_valid_attribute_p): New.
1617 (riscv_override_options_internal): New.
1618 (struct riscv_tune_info): New.
1619 (riscv_parse_tune): New.
1620 * config/riscv/riscv-target-attr.cc
1621 (class riscv_target_attr_parser): New.
1622 (struct riscv_attribute_info): New.
1623 (riscv_attributes): New.
1624 (riscv_target_attr_parser::parse_arch): New.
1625 (riscv_target_attr_parser::handle_arch): New.
1626 (riscv_target_attr_parser::handle_cpu): New.
1627 (riscv_target_attr_parser::handle_tune): New.
1628 (riscv_target_attr_parser::update_settings): New.
1629 (riscv_process_one_target_attr): New.
1630 (num_occurences_in_str): New.
1631 (riscv_process_target_attr): New.
1632 (riscv_option_valid_attribute_p): New.
1633 * config/riscv/riscv.cc: Include target-globals.h and
1635 (struct riscv_tune_info): Move to riscv-protos.h.
1636 (get_tune_str): New.
1637 (riscv_parse_tune): New parameter null_p.
1638 (riscv_declare_function_size): New.
1639 (riscv_option_override): Build target_option_default_node and
1640 target_option_current_node.
1641 (riscv_save_restore_target_globals): New.
1642 (riscv_option_restore): New.
1643 (riscv_previous_fndecl): New.
1644 (riscv_set_current_function): Apply the target attribute.
1645 (TARGET_OPTION_RESTORE): Define.
1646 (TARGET_OPTION_VALID_ATTRIBUTE_P): Ditto.
1647 * config/riscv/riscv.h (SWITCHABLE_TARGET): Define to 1.
1648 (ASM_DECLARE_FUNCTION_SIZE) Define.
1649 * config/riscv/riscv.opt (mtune=): Add Save attribute.
1652 * config/riscv/t-riscv: Add build rule for riscv-target-attr.o
1653 * doc/extend.texi: Add doc for target attribute.
1655 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
1658 * config/riscv/riscv.cc (riscv_save_return_addr_reg_p): Check ra
1661 2023-11-16 liuhongt <hongtao.liu@intel.com>
1664 * config/i386/mmx.md (*vec_dup<mode>): Extend for V4HI and
1667 2023-11-16 Jakub Jelinek <jakub@redhat.com>
1670 * config/i386/i386.md
1671 (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
1672 Verify in define_peephole2 that operands[2] dies or is overwritten
1673 at the end of multiplication.
1675 2023-11-16 Jakub Jelinek <jakub@redhat.com>
1677 PR tree-optimization/112536
1678 * tree-vect-slp.cc (arg0_map): New variable.
1679 (vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map.
1681 2023-11-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1683 PR middle-end/112554
1684 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
1685 Clear SELECT_VL_P for non-partial vectorization.
1687 2023-11-16 Hongyu Wang <hongyu.wang@intel.com>
1689 * config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl
1690 alternative with attr addr gpr16 and "jm" constraint.
1691 (vec_extract_hi_<mode>): Likewise for SF vector modes.
1692 (@vec_extract_hi_<mode>): Likewise.
1693 (*vec_extractv2ti): Likewise.
1694 (vec_set_hi_<mode><mask_name>): Likewise.
1695 * config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for
1698 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
1701 * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
1702 (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
1703 (*subqi_ext<mode>_2_slp): Ditto.
1704 (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
1706 2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
1708 * common/config/riscv/riscv-common.cc
1709 (riscv_subset_list::parse_std_ext): Emit an error and skip to
1710 the next extension when a non-canonical ordering is detected.
1712 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
1714 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
1715 Revert using the macro CAN_HAVE_LOCATION_P.
1717 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1720 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
1721 local vsetvl info before LCM suggested one.
1722 Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
1723 Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
1725 2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
1727 * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
1728 * (riscv_extend_comparands): Call New function on operands.
1730 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
1732 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
1733 Add "&& " before "reload_completed" in split condition.
1734 (*subqi_ext<mode>_1_slp): Ditto.
1735 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
1737 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
1740 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
1741 Correct operand numbers in split pattern. Replace !Q constraint
1742 of operand 1 with !qm. Add insn constrain.
1743 (*subqi_ext<mode>_1_slp): Ditto.
1744 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
1746 2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
1748 * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
1749 copy'n'paste-o in '__builtin_nvptx_brev' description.
1751 2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
1752 Thomas Schwinge <thomas@codesourcery.com>
1754 * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
1755 (bitrev<mode>2): Represent using bitreverse.
1757 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
1758 Andrew Jenner <andrew@codesourcery.com>
1760 * config/gcn/constraints.md: Add "a" AVGPR constraint.
1761 * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
1762 (*mov<mode>_4reg): Likewise.
1763 (@mov<mode>_sgprbase): Likewise.
1764 (gather<mode>_insn_1offset<exec>): Likewise.
1765 (gather<mode>_insn_1offset_ds<exec>): Likewise.
1766 (gather<mode>_insn_2offsets<exec>): Likewise.
1767 (scatter<mode>_expr<exec_scatter>): Likewise.
1768 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
1769 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
1770 * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
1771 (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
1772 (gcn_hard_regno_mode_ok): Likewise.
1773 (gcn_regno_reg_class): Likewise.
1774 (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
1775 (gcn_sgpr_move_p): Handle AVGPRs.
1776 (gcn_secondary_reload): Reload AVGPRs via VGPRs.
1777 (gcn_conditional_register_usage): Handle AVGPRs.
1778 (gcn_vgpr_equivalent_register_operand): New function.
1779 (gcn_valid_move_p): Check for validity of AVGPR moves.
1780 (gcn_compute_frame_offsets): Handle AVGPRs.
1781 (gcn_memory_move_cost): Likewise.
1782 (gcn_register_move_cost): Likewise.
1783 (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
1784 (gcn_md_reorg): Handle AVGPRs.
1785 (gcn_hsa_declare_function_name): Likewise.
1786 (print_reg): Likewise.
1787 (gcn_dwarf_register_number): Likewise.
1788 * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
1789 (AVGPR_REGNO): Define.
1790 (LAST_AVGPR_REG): Define.
1791 (SOFT_ARG_REG): Update.
1792 (FRAME_POINTER_REGNUM): Update.
1793 (DWARF_LINK_REGISTER): Update.
1794 (FIRST_PSEUDO_REGISTER): Update.
1795 (AVGPR_REGNO_P): Define.
1796 (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
1797 (REG_CLASS_CONTENTS): Add new register classes and add entries for
1798 AVGPRs to all classes.
1799 (REGISTER_NAMES): Add AVGPRs.
1800 * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
1801 (AP_REGNUM, FP_REGNUM): Update.
1802 (define_attr "type"): Add vop3p_mai.
1803 (define_attr "unit"): Handle vop3p_mai.
1804 (define_attr "gcn_version"): Add "cdna2".
1805 (define_attr "enabled"): Handle cdna2.
1806 (*mov<mode>_insn): Add AVGPR alternatives.
1807 (*movti_insn): Likewise.
1808 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
1809 (process_asm): Process avgpr_count.
1810 * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
1811 (gcn_avgpr_hard_register_operand): New.
1812 * doc/md.texi: Document the "a" constraint.
1814 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
1816 * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
1817 (reload_in<mode>): Delete.
1818 (reload_out<mode>): Delete.
1819 * config/gcn/gcn.cc (CODE_FOR): Delete.
1820 (get_code_for_##PREFIX##vN##SUFFIX): Delete.
1821 (CODE_FOR_OP): Delete.
1822 (get_code_for_##PREFIX): Delete.
1823 (gcn_secondary_reload): Replace "get_code_for" with "code_for".
1825 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1827 * config/s390/t-s390: Generate s390-gen-builtins.h without
1830 2023-11-15 Richard Biener <rguenther@suse.de>
1832 PR tree-optimization/112282
1833 * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
1836 2023-11-15 Richard Biener <rguenther@suse.de>
1838 * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
1839 we skipped an instance due to -fdbg-cnt.
1841 2023-11-15 Xi Ruoyao <xry111@xry111.site>
1843 * config/loongarch/loongarch.cc
1844 (loongarch_memmodel_needs_release_fence): Remove.
1845 (loongarch_cas_failure_memorder_needs_acquire): New static
1847 (loongarch_print_operand): Redefine 'G' for the barrier on CAS
1849 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
1850 Remove the redundant barrier before the LL instruction, and
1851 emit an acquire barrier on failure if needed by
1853 (atomic_cas_value_cmp_and_7_<mode>): Likewise.
1854 (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
1855 before the LL instruction.
1856 (atomic_cas_value_sub_7_<mode>): Likewise.
1857 (atomic_cas_value_and_7_<mode>): Likewise.
1858 (atomic_cas_value_xor_7_<mode>): Likewise.
1859 (atomic_cas_value_or_7_<mode>): Likewise.
1860 (atomic_cas_value_nand_7_<mode>): Likewise.
1861 (atomic_cas_value_exchange_7_<mode>): Likewise.
1863 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1865 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
1866 (expand_vec_init): Add trailing optimization.
1868 2023-11-15 Pan Li <pan2.li@intel.com>
1870 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
1871 Add inner_mode mask arg for mask int mode.
1872 (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
1873 to get the good enough vector int mode on precision.
1874 (expand_vector_init_merge_repeating_sequence): Pass required args
1877 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1880 * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
1882 2023-11-15 David Malcolm <dmalcolm@redhat.com>
1884 * json.cc (selftest::assert_print_eq): Add "loc" param and use
1886 (ASSERT_PRINT_EQ): New macro.
1887 (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
1888 source location of assertion.
1889 (selftest::test_writing_arrays): Likewise.
1890 (selftest::test_writing_float_numbers): Likewise.
1891 (selftest::test_writing_integer_numbers): Likewise.
1892 (selftest::test_writing_strings): Likewise.
1893 (selftest::test_writing_literals): Likewise.
1895 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1898 * doc/invoke.texi (Static Analyzer Options): Add the six
1899 -Wanalyzer-tainted-* warnings. Update documentation of each
1900 warning to reflect removed requirement to use
1901 -fanalyzer-checker=taint. Remove discussion of
1902 -fanalyzer-checker=taint.
1904 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1906 * diagnostic-format-json.cc
1907 (json_output_format::on_end_diagnostic): Update calls to m_context
1908 callbacks to use member functions; tighten up scopes.
1909 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
1911 (sarif_builder::make_reporting_descriptor_object_for_warning):
1913 * diagnostic.cc (diagnostic_context::initialize): Update for
1914 callbacks being moved into m_option_callbacks and being renamed.
1915 (diagnostic_context::set_option_hooks): New.
1916 (diagnostic_option_classifier::classify_diagnostic): Update call
1917 to global_dc->m_option_enabled to use option_enabled_p.
1918 (diagnostic_context::print_option_information): Update calls to
1919 m_context callbacks to use member functions; tighten up scopes.
1920 (diagnostic_context::diagnostic_enabled): Likewise.
1921 * diagnostic.h (diagnostic_option_enabled_cb): New typedef.
1922 (diagnostic_make_option_name_cb): New typedef.
1923 (diagnostic_make_option_url_cb): New typedef.
1924 (diagnostic_context::option_enabled_p): New.
1925 (diagnostic_context::make_option_name): New.
1926 (diagnostic_context::make_option_url): New.
1927 (diagnostic_context::set_option_hooks): New decl.
1928 (diagnostic_context::m_option_enabled): Rename to
1929 m_option_enabled_cb and move within m_option_callbacks, using
1931 (diagnostic_context::m_option_state): Move within
1933 (diagnostic_context::m_option_name): Rename to
1934 m_make_option_name_cb and move within m_option_callbacks, using
1936 (diagnostic_context::m_get_option_url): Likewise, renaming to
1937 m_make_option_url_cb.
1938 * lto-wrapper.cc (print_lto_docs_link): Update call to m_context
1939 callback to use member function.
1940 (main): Use diagnostic_context::set_option_hooks.
1941 * opts-diagnostic.h (option_name): Make context param const.
1942 (get_option_url): Likewise.
1943 * opts.cc (option_name): Likewise.
1944 (get_option_url): Likewise.
1945 * toplev.cc (general_init): Use
1946 diagnostic_context::set_option_hooks.
1948 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1950 * selftest-diagnostic.cc
1951 (test_diagnostic_context::test_diagnostic_context): Use
1952 diagnostic_start_span.
1953 * tree-diagnostic-path.cc (struct event_range): Likewise.
1955 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1957 * diagnostic-show-locus.cc (diagnostic_context::show_locus):
1958 Update for renaming of text callbacks fields.
1959 * diagnostic.cc (diagnostic_context::initialize): Likewise.
1960 * diagnostic.h (class diagnostic_context): Add "friend" for
1961 accessors to m_text_callbacks.
1962 (diagnostic_context::m_text_callbacks): Make private, and add an
1963 "m_" prefix to field names.
1964 (diagnostic_starter): Convert from macro to inline function.
1965 (diagnostic_start_span): New.
1966 (diagnostic_finalizer): Convert from macro to inline function.
1968 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1970 * diagnostic.h (diagnostic_ready_p): Convert from macro to inline
1973 2023-11-14 Uros Bizjak <ubizjak@gmail.com>
1976 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
1977 New define_insn_and_split pattern.
1978 (*subqi_ext<mode>_1_slp): Ditto.
1979 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
1981 2023-11-14 Andrew Stubbs <ams@codesourcery.com>
1984 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
1986 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1988 * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column):
1989 Use m_context's file_cache.
1990 (sarif_builder::maybe_make_artifact_content_object): Likewise.
1991 (sarif_builder::get_source_lines): Likewise.
1992 * diagnostic-show-locus.cc
1993 (exploc_with_display_col::exploc_with_display_col): Add file_cache
1995 (layout::m_file_cache): New field.
1996 (make_range): Add file_cache param.
1997 (selftest::test_layout_range_for_single_point): Create and use a
1998 temporary file_cache.
1999 (selftest::test_layout_range_for_single_line): Likewise.
2000 (selftest::test_layout_range_for_multiple_lines): Likewise.
2001 (layout::layout): Initialize m_file_cache from the context and use it.
2002 (layout::maybe_add_location_range): Use m_file_cache.
2003 (layout::calculate_x_offset_display): Likewise.
2004 (get_affected_range): Add file_cache param.
2005 (get_printed_columns): Likewise.
2006 (line_corrections::line_corrections): Likewwise.
2007 (line_corrections::m_file_cache): New field.
2008 (source_line::source_line): Add file_cache param.
2009 (line_corrections::add_hint): Use m_file_cache.
2010 (layout::print_trailing_fixits): Likewise.
2011 (layout::print_line): Likewise.
2012 (selftest::test_layout_x_offset_display_utf8): Create and use a
2013 temporary file_cache.
2014 (selftest::test_layout_x_offset_display_tab): Likewise.
2015 (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise.
2016 (selftest::test_add_location_if_nearby): Pass global_dc's
2017 file_cache to temp_source_file ctor.
2018 (selftest::test_overlapped_fixit_printing): Create and use a
2019 temporary file_cache.
2020 (selftest::test_overlapped_fixit_printing_utf8): Likewise.
2021 (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache.
2022 * diagnostic.cc (diagnostic_context::initialize): Always create a
2024 (diagnostic_context::initialize_input_context): Assume
2025 m_file_cache has already been created.
2026 (diagnostic_context::create_edit_context): Pass m_file_cache to
2028 (convert_column_unit): Add file_cache param.
2029 (diagnostic_context::converted_column): Use context's file_cache.
2030 (print_parseable_fixits): Add file_cache param.
2031 (diagnostic_context::report_diagnostic): Use context's file_cache.
2032 (selftest::test_print_parseable_fixits_none): Create and use a
2033 temporary file_cache.
2034 (selftest::test_print_parseable_fixits_insert): Likewise.
2035 (selftest::test_print_parseable_fixits_remove): Likewise.
2036 (selftest::test_print_parseable_fixits_replace): Likewise.
2037 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
2039 * diagnostic.h (diagnostic_context::file_cache_init): Delete.
2040 (diagnostic_context::get_file_cache): Convert return type from
2041 pointer to reference.
2042 * edit-context.cc (edited_file::get_file_cache): New.
2043 (edited_file::m_edit_context): New.
2044 (edit_context::edit_context): Add file_cache param.
2045 (edit_context::get_or_insert_file): Pass this to edited_file's
2047 (edited_file::edited_file): Add edit_context param.
2048 (edited_file::print_content): Use get_file_cache.
2049 (edited_file::print_diff_hunk): Likewise.
2050 (edited_file::print_run_of_changed_lines): Likewise.
2051 (edited_file::get_or_insert_line): Likewise.
2052 (edited_file::get_num_lines): Likewise.
2053 (edited_line::edited_line): Pass in file_cache and use it.
2054 (selftest::test_get_content): Create and use a
2055 temporary file_cache.
2056 (selftest::test_applying_fixits_insert_before): Likewise.
2057 (selftest::test_applying_fixits_insert_after): Likewise.
2058 (selftest::test_applying_fixits_insert_after_at_line_end):
2060 (selftest::test_applying_fixits_insert_after_failure): Likewise.
2061 (selftest::test_applying_fixits_insert_containing_newline):
2063 (selftest::test_applying_fixits_growing_replace): Likewise.
2064 (selftest::test_applying_fixits_shrinking_replace): Likewise.
2065 (selftest::test_applying_fixits_replace_containing_newline):
2067 (selftest::test_applying_fixits_remove): Likewise.
2068 (selftest::test_applying_fixits_multiple): Likewise.
2069 (selftest::test_applying_fixits_multiple_lines): Likewise.
2070 (selftest::test_applying_fixits_modernize_named_init): Likewise.
2071 (selftest::test_applying_fixits_modernize_named_init): Likewise.
2072 (selftest::test_applying_fixits_unreadable_file): Likewise.
2073 (selftest::test_applying_fixits_line_out_of_range): Likewise.
2074 (selftest::test_applying_fixits_column_validation): Likewise.
2075 (selftest::test_applying_fixits_column_validation): Likewise.
2076 (selftest::test_applying_fixits_column_validation): Likewise.
2077 (selftest::test_applying_fixits_column_validation): Likewise.
2078 * edit-context.h (edit_context::edit_context): Add file_cache
2080 (edit_context::get_file_cache): New.
2081 (edit_context::m_file_cache): New.
2082 * final.cc: Include "diagnostic.h".
2083 (asm_show_source): Use global_dc's file_cache.
2084 * gcc-rich-location.cc (blank_line_before_p): Add file_cache
2086 (use_new_line): Likewise.
2087 (gcc_rich_location::add_fixit_insert_formatted): Use global dc's
2089 * input.cc (diagnostic_file_cache_init): Delete.
2090 (diagnostic_context::file_cache_init): Delete.
2091 (diagnostics_file_cache_forcibly_evict_file): Delete.
2092 (file_cache::missing_trailing_newline_p): New.
2093 (file_cache::evicted_cache_tab_entry): Don't call
2094 diagnostic_file_cache_init.
2095 (location_get_source_line): Delete.
2096 (get_source_text_between): Add file_cache param.
2097 (get_source_file_content): Delete.
2098 (location_missing_trailing_newline): Delete.
2099 (location_compute_display_column): Add file_cache param.
2100 (dump_location_info): Create and use temporary file_cache.
2101 (get_substring_ranges_for_loc): Add file_cache param.
2102 (get_location_within_string): Likewise.
2103 (get_source_range_for_char): Likewise.
2104 (get_num_source_ranges_for_substring): Likewise.
2105 (selftest::test_reading_source_line): Create and use temporary
2107 (selftest::lexer_test::m_file_cache): New field.
2108 (selftest::assert_char_at_range): Use test.m_file_cache.
2109 (selftest::assert_num_substring_ranges): Likewise.
2110 (selftest::assert_has_no_substring_ranges): Likewise.
2111 (selftest::test_lexer_string_locations_concatenation_2): Likewise.
2112 * input.h (class file_cache): New forward decl.
2113 (location_compute_display_column): Add file_cache param.
2114 (location_get_source_line): Delete.
2115 (get_source_text_between): Add file_cache param.
2116 (get_source_file_content): Delete.
2117 (location_missing_trailing_newline): Delete.
2118 (file_cache::missing_trailing_newline_p): New decl.
2119 (diagnostics_file_cache_forcibly_evict_file): Delete.
2120 * selftest.cc (named_temp_file::named_temp_file): Add file_cache
2122 (named_temp_file::~named_temp_file): Optionally evict the file
2123 from the given file_cache.
2124 (temp_source_file::temp_source_file): Add file_cache param.
2125 * selftest.h (class file_cache): New forward decl.
2126 (named_temp_file::named_temp_file): Add file_cache param.
2127 (named_temp_file::m_file_cache): New field.
2128 (temp_source_file::temp_source_file): Add file_cache param.
2129 * substring-locations.h (get_location_within_string): Add
2132 2023-11-14 David Malcolm <dmalcolm@redhat.com>
2134 * diagnostic-format-json.cc: Use type-specific "set_*" functions
2135 of json::object to avoid naked new of json value subclasses.
2136 * diagnostic-format-sarif.cc: Likewise.
2137 * gcov.cc: Likewise.
2138 * json.cc (object::set_string): New.
2139 (object::set_integer): New.
2140 (object::set_float): New.
2141 (object::set_bool): New.
2142 (selftest::test_writing_objects): Use object::set_string.
2143 * json.h (object::set_string): New decl.
2144 (object::set_integer): New decl.
2145 (object::set_float): New decl.
2146 (object::set_bool): New decl.
2147 * optinfo-emit-json.cc: Use type-specific "set_*" functions of
2148 json::object to avoid naked new of json value subclasses.
2149 * timevar.cc: Likewise.
2150 * tree-diagnostic-path.cc: Likewise.
2152 2023-11-14 Andrew MacLeod <amacleod@redhat.com>
2154 PR tree-optimization/112509
2155 * tree-vrp.cc (find_case_label_range): Create range from case labels.
2157 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2159 * config/s390/s390-builtin-types.def: Add/remove types.
2160 * config/s390/s390-builtins.def (s390_vec_scatter_element_flt):
2161 The type for the offset should be UV4SI instead of V4SF.
2163 2023-11-14 Saurabh Jha <saurabh.jha@arm.com>
2166 * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
2169 2023-11-14 Richard Biener <rguenther@suse.de>
2171 PR tree-optimization/111233
2172 PR tree-optimization/111652
2173 PR tree-optimization/111727
2174 PR tree-optimization/111838
2175 PR tree-optimization/112113
2176 * tree-ssa-loop-split.cc (patch_loop_exit): Get the new
2177 guard code instead of the old guard stmt.
2178 (split_loop): Adjust.
2180 2023-11-14 Richard Biener <rguenther@suse.de>
2182 * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p):
2183 Consider all loops in the nest when looking for
2184 lambda_vector_zerop.
2186 2023-11-14 Richard Biener <rguenther@suse.de>
2188 PR tree-optimization/112281
2189 * tree-loop-distribution.cc (pg_add_dependence_edges):
2190 Preserve stmt order when the innermost loop has exact
2193 2023-11-14 Jakub Jelinek <jakub@redhat.com>
2197 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move
2198 operands[1] aka low part of input rather than operands[3] aka high
2199 part of input to output if not the same register.
2201 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
2203 * config.gcc: Add s390-gen-builtins.h to target_gtfiles.
2204 * config/s390/s390-builtins.h (s390_builtin_types)
2205 (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker.
2206 * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h.
2207 Add build rule for s390-gen-builtins.h.
2209 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
2211 * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check
2212 for error_mark_node.
2214 2023-11-14 Jakub Jelinek <jakub@redhat.com>
2217 * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG,
2218 BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New
2220 * builtins.cc (fold_builtin_bit_query): New function.
2221 (fold_builtin_1): Use it for
2222 BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
2223 (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G.
2224 * fold-const-call.cc: Fix comment typo on tm.h inclusion.
2225 (fold_const_call_ss): Handle
2226 CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
2227 (fold_const_call_sss): New function.
2228 (fold_const_call_1): Call it for 2 argument functions returning
2229 scalar when passed 2 INTEGER_CSTs.
2230 * genmatch.cc (cmp_operand): For function calls also compare
2231 number of arguments.
2232 (fns_cmp): New function.
2233 (dt_node::gen_kids): Sort fns and generic_fns.
2234 (dt_node::gen_kids_1): Handle fns with the same id but different
2235 number of arguments.
2236 * match.pd (CLZ simplifications): Drop checks for defined behavior
2237 at zero. Add variant of simplifications for IFN_CLZ with 2 arguments.
2238 (CTZ simplifications): Drop checks for defined behavior at zero,
2239 don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of
2240 simplifications for IFN_CTZ with 2 arguments.
2241 (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of
2242 type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than
2243 one argument. Add variant for matching CLZ with 2 arguments.
2244 (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly.
2245 * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New
2247 (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS}
2248 and IFN_{PARITY,POPCOUNT} calls.
2249 * gimple-range-op.cc (cfn_clz::fold_range): Don't check
2250 CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead
2251 assume defined value at zero if the call has 2 arguments and use
2252 second argument value for that case.
2253 (cfn_ctz::fold_range): Similarly.
2254 (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal
2255 or op_cfn_ctz_internal only if internal fn call has 2 arguments and
2256 set m_op2 in that case.
2257 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern,
2258 vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero
2259 use second argument of calls if present, otherwise assume UB at zero,
2260 create 2 argument .CLZ/.CTZ calls if needed.
2261 * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ
2263 * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument
2264 .CLZ/.CTZ calls if needed.
2265 * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2
2266 argument .CTZ calls if needed.
2267 * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle
2268 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument
2270 * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg,
2271 __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document.
2273 2023-11-14 Xi Ruoyao <xry111@xry111.site>
2276 * config/loongarch/genopts/loongarch.opt.in: Add
2277 -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to
2278 account conditional branch relaxation support status.
2279 * config/loongarch/loongarch.opt: Regenerate.
2280 * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
2281 the assembler supports conditional branch relaxation.
2282 * configure: Regenerate.
2283 * config.in: Regenerate. Note that there are some unrelated
2284 changes introduced by r14-5424 (which does not contain a
2285 config.in regeneration).
2286 * config/loongarch/loongarch-opts.h
2287 (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
2288 * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
2290 (ASM_MRELAX_SPEC): Define.
2291 (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
2292 * config/loongarch/loongarch.cc: Take the setting of
2293 -m[no-]relax into account when determining the default of
2295 * doc/invoke.texi: Document -m[no-]relax and
2296 -m[no-]pass-mrelax-to-as for LoongArch. Update the default
2297 value of -mexplicit-relocs=.
2299 2023-11-14 liuhongt <hongtao.liu@intel.com>
2301 PR tree-optimization/112496
2302 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return
2303 false when !tree_nop_conversion_p (TREE_TYPE (vectype),
2304 TREE_TYPE (init_expr)).
2306 2023-11-14 Xi Ruoyao <xry111@xry111.site>
2308 * config/loongarch/sync.md (mem_thread_fence): Remove redundant
2310 (mem_thread_fence_1): Emit finer-grained DBAR hints for
2311 different memory models, instead of 0.
2313 2023-11-14 Jakub Jelinek <jakub@redhat.com>
2315 PR middle-end/112511
2316 * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like
2319 2023-11-14 Jakub Jelinek <jakub@redhat.com>
2320 Hu, Lin1 <lin1.hu@intel.com>
2323 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
2324 <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add
2325 alternative with just x instead of v constraints and xjm instead of
2326 vm and use vblendps as optimization only with that alternative.
2328 2023-11-14 liuhongt <hongtao.liu@intel.com>
2330 PR tree-optimization/105735
2331 PR tree-optimization/111972
2332 * tree-scalar-evolution.cc
2333 (analyze_and_compute_bitop_with_inv_effect): Handle bitop with
2336 2023-11-13 Arsen Arsenović <arsen@aarsen.me>
2338 * configure: Regenerate.
2339 * aclocal.m4: Regenerate.
2340 * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from
2342 * doc/install.texi: Document new (notable) flags added by the
2343 optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc
2344 with gettext dependency.
2346 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
2348 * config/i386/i386-expand.h (gen_pushfl): New prototype.
2350 * config/i386/i386-expand.cc (ix86_expand_builtin)
2351 [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
2352 [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
2353 * config/i386/i386.cc (gen_pushfl): New function.
2355 * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
2356 (@pushfl<mode>2): Rename from *pushfl<mode>2.
2357 Rewrite as unspec using UNSPEC_PUSHFL.
2358 (@popfl<mode>1): Rename from *popfl<mode>1.
2359 Rewrite as unspec using UNSPEC_POPFL.
2361 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
2364 * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode.
2366 2023-11-13 Robin Dapp <rdapp@ventanamicro.com>
2368 * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer
2369 equality for REG_EQUAL.
2371 2023-11-13 Richard Biener <rguenther@suse.de>
2373 PR tree-optimization/112495
2374 * tree-data-ref.cc (runtime_alias_check_p): Reject checks
2375 between different address spaces.
2377 2023-11-13 Richard Biener <rguenther@suse.de>
2379 PR middle-end/112487
2380 * tree-inline.cc (setup_one_parameter): When the parameter
2381 is unused only insert a debug bind when there's not a gross
2382 mismatch in value and declared parameter type. Do not assert
2383 there effectively isn't.
2385 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2387 * config/riscv/riscv-v.cc
2388 (rvv_builder::combine_sequence_use_merge_profitable_p): New function.
2389 (expand_vector_init_merge_combine_sequence): Ditto.
2390 (expand_vec_init): Adapt for new optimization.
2392 2023-11-13 liuhongt <hongtao.liu@intel.com>
2394 * config/i386/i386-expand.cc
2395 (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and
2397 (ix86_expand_vector_init_one_nonzero): Ditto.
2398 (ix86_expand_vector_init_one_var): Ditto.
2399 (ix86_expand_vector_init_general): Ditto.
2400 (ix86_expand_vector_set_var): Ditto.
2401 (ix86_expand_vector_set): Ditto.
2402 (ix86_expand_vector_extract): Ditto.
2403 * config/i386/mmx.md
2404 (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF.
2405 (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x,
2406 x, x), add a new define_split after the pattern.
2407 (*mmx_pextrw<mode>): New define_insn.
2408 (mmx_pshufw_1): Rename to ..
2409 (mmx_pshufw<mode>_1): .. this, extend to V4FI_64.
2410 (*mmx_pblendw64): Extend to V4FI_64.
2411 (*vec_dup<mode>): New define_insn.
2412 (vec_setv4hi): Rename to ..
2413 (vec_set<mode>): .. this, and extend to V4FI_64
2414 (vec_extractv4hihi): Rename to ..
2415 (vec_extract<mode><mmxscalarmodelower>): .. this, and extend
2417 (vec_init<mode><mmxscalarmodelower>): New define_insn.
2418 (*pinsrw): Extend to V2FI_32, add a new alternative (&x,
2419 x, x), and add a new define_split after it.
2420 (*pextrw<mode>): New define_insn.
2421 (vec_setv2hi): Rename to ..
2422 (vec_set<mode>): .. this, extend to V2FI_32.
2423 (vec_extractv2hihi): Rename to ..
2424 (vec_extract<mode><mmxscalarmodelower>): .. this, extend to
2426 (*punpckwd): Extend to V2FI_32.
2427 (*pshufw_1): Rename to ..
2428 (*pshufw<mode>_1): .. this, extend to V2FI_32.
2429 (vec_initv2hihi): Rename to ..
2430 (vec_init<mode><mmxscalarmodelower>): .. this, and extend to
2432 (*vec_dup<mode>): New define_insn.
2433 * config/i386/sse.md (*vec_extract<mode>): Refine constraint
2436 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
2438 * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that
2439 represents the carry flag being set if the operand is non-zero.
2440 (adc_f): New define_insn representing adc with updated flags.
2441 (ashrdi3): New define_expand that only handles shifts by 1.
2442 (ashrdi3_cnt1): New pre-reload define_insn_and_split.
2443 (lshrdi3): New define_expand that only handles shifts by 1.
2444 (lshrdi3_cnt1): New pre-reload define_insn_and_split.
2445 (rrcsi2): New define_insn for rrc (SImode rotate right through carry).
2446 (rrcsi2_carry): Likewise for rrc.f, as above but updating flags.
2447 (rotldi3): New define_expand that only handles rotates by 1.
2448 (rotldi3_cnt1): New pre-reload define_insn_and_split.
2449 (rotrdi3): New define_expand that only handles rotates by 1.
2450 (rotrdi3_cnt1): New pre-reload define_insn_and_split.
2451 (lshrsi3_cnt1_carry): New define_insn for lsr.f.
2452 (ashrsi3_cnt1_carry): New define_insn for asr.f.
2453 (btst_0_carry): New define_insn for asr.f without result.
2455 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
2457 * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to
2459 (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP
2460 into a rotate. Evaluate ARC_BUILTIN_NORM and
2461 ARC_BUILTIN_NORMW of constant arguments.
2462 * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete.
2463 (normw): Make output template/assembler whitespace consistent.
2464 (swap): Remove define_insn, only use of SWAP UNSPEC.
2465 * config/arc/builtins.def: Tweak indentation.
2466 (SWAP): Expand using rotlsi2_cnt16 instead of using swap.
2468 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
2470 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New
2471 define_insn_and_split to optimize register usage of doubleword
2472 right shifts followed by truncation.
2474 2023-11-13 Jakub Jelinek <jakub@redhat.com>
2476 * config/i386/constraints.md: Remove j constraint letter from list of
2479 2023-11-13 Xi Ruoyao <xry111@xry111.site>
2481 PR rtl-optimization/112483
2482 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
2483 Fix the simplification of (fcopysign x, NEGATIVE_CONST).
2485 2023-11-13 Jakub Jelinek <jakub@redhat.com>
2487 PR tree-optimization/111967
2488 * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
2489 m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
2490 (block_range_cache::dump): Iterate from 1 rather than 0. Don't use
2491 ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to
2492 m_ssa_ranges.length () rather than num_ssa_names.
2494 2023-11-13 Xi Ruoyao <xry111@xry111.site>
2496 * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode
2498 (ST_ANY): New mode iterator.
2499 (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and
2500 ST_ANY instead of QHWD for applicable patterns.
2502 2023-11-13 Xi Ruoyao <xry111@xry111.site>
2505 * config/loongarch/loongarch.cc
2506 (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
2507 instead of gen_rtx_SUBREG.
2509 2023-11-13 Pan Li <pan2.li@intel.com>
2511 * config/riscv/autovec.md: Add bridge mode to lrint and lround
2513 * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
2514 bridge machine mode.
2515 (expand_vec_lround): Ditto.
2516 * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
2517 func impl to emit vfwcvt.f.f.
2518 (emit_vec_rounding_to_integer): Handle the HF to DI rounding
2519 with the bridge mode.
2520 (expand_vec_lrint): Reorder the args.
2521 (expand_vec_lround): Ditto.
2522 (expand_vec_lceil): Ditto.
2523 (expand_vec_lfloor): Ditto.
2524 * config/riscv/vector-iterators.md: Add vector HFmode and bridge
2525 mode for converting to DI.
2527 2023-11-12 Jeff Law <jlaw@ventanamicro.com>
2530 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
2532 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
2533 (prune_ready_list): USE or CLOBBER should delay execution
2534 if it starts a new live range.
2536 2023-11-12 Uros Bizjak <ubizjak@gmail.com>
2538 * config/i386/i386.md (*stack_protect_set_4s_<mode>_di):
2539 Remove alternative 0.
2541 2023-11-11 Eric Botcazou <ebotcazou@adacore.com>
2543 * ipa-cp.cc (print_ipcp_constant_value): Move to...
2544 (values_equal_for_ipcp_p): Deal with VAR_DECLs from the
2546 * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise.
2547 (ipa_print_node_jump_functions_for_edge): Call the function
2548 ipa_print_constant_value to print IPA_JF_CONST elements.
2550 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
2552 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
2553 (prune_ready_list): USE or CLOBBER should delay execution
2554 if it starts a new live range.
2556 2023-11-11 Jakub Jelinek <jakub@redhat.com>
2558 PR middle-end/112430
2559 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the
2560 order they were pushed rather than in reverse order. Call
2561 release_defs after gsi_remove.
2563 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2565 * target.def (mode_switching.backprop): New hook.
2566 * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook.
2567 * doc/tm.texi: Regenerate.
2568 * mode-switching.cc (struct bb_info): Add single_succ.
2569 (confluence_info): Add transp field.
2570 (single_succ_confluence_n, single_succ_transfer): New functions.
2571 (backprop_confluence_n, backprop_transfer): Likewise.
2572 (optimize_mode_switching): Use them. Push mode transitions onto
2573 a block's incoming edges, if the backprop hook requires it.
2575 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2577 * target.def (mode_switching.confluence): New hook.
2578 * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook.
2579 * doc/tm.texi.in: Regenerate.
2580 * mode-switching.cc (confluence_info): New variable.
2581 (mode_confluence, forward_confluence_n, forward_transfer): New
2583 (optimize_mode_switching): Use them to calculate mode_in when
2584 TARGET_MODE_CONFLUENCE is defined.
2586 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2588 * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values.
2590 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2592 * target.def (mode_switching.after): Add a regs_live parameter.
2593 * doc/tm.texi: Regenerate.
2594 * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update
2596 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
2597 (epiphany_mode_after): Likewise.
2598 * config/i386/i386.cc (ix86_mode_after): Likewise.
2599 * config/riscv/riscv.cc (riscv_mode_after): Likewise.
2600 * config/sh/sh.cc (sh_mode_after): Likewise.
2601 * mode-switching.cc (optimize_mode_switching): Likewise.
2603 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2605 * target.def (mode_switching.needed): Add a regs_live parameter.
2606 * doc/tm.texi: Regenerate.
2607 * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update
2609 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
2610 * config/epiphany/mode-switch-use.cc (insert_uses): Likewise.
2611 * config/i386/i386.cc (ix86_mode_needed): Likewise.
2612 * config/riscv/riscv.cc (riscv_mode_needed): Likewise.
2613 * config/sh/sh.cc (sh_mode_needed): Likewise.
2614 * mode-switching.cc (optimize_mode_switching): Likewise.
2615 (create_pre_exit): Likewise, using the DF simulate functions
2616 to calculate the required information.
2618 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2620 * target.def (mode_switching.eh_handler): New hook.
2621 * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook.
2622 * doc/tm.texi: Regenerate.
2623 * mode-switching.cc (optimize_mode_switching): Use eh_handler
2624 to get the mode on entry to an exception handler.
2626 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2628 * mode-switching.cc (optimize_mode_switching): Mark the exit
2629 block as nontransparent if it requires a specific mode.
2630 Handle the entry and exit mode as sibling rather than nested
2631 concepts. Remove outdated comment.
2633 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2635 * mode-switching.cc (optimize_mode_switching): Initially
2636 compute transparency in a bit-per-block bitmap.
2638 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2640 * mode-switching.cc (seginfo): Add a prev_mode field.
2641 (new_seginfo): Take and initialize the prev_mode.
2642 (optimize_mode_switching): Update calls accordingly.
2643 Use the recorded modes during the emit phase, rather than
2644 computing one on the fly.
2646 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2648 * mode-switching.cc (add_seginfo): Replace head pointer with
2649 a pointer to the tail pointer.
2650 (optimize_mode_switching): Update calls accordingly.
2652 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2654 * mode-switching.cc (optimize_mode_switching): Call
2655 df_note_add_problem.
2657 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2659 * target.def: Tweak documentation of mode-switching hooks.
2660 * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation.
2661 (NUM_MODES_FOR_MODE_SWITCHING): Likewise.
2662 * doc/tm.texi: Regenerate.
2664 2023-11-11 Martin Uecker <uecker@tugraz.at>
2668 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
2669 remove warning for parameters declared with `static`.
2671 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
2673 * doc/sourcebuild.texi (Scan the assembly output): Document change.
2675 2023-11-10 Mao <sray@live.com>
2677 PR middle-end/110983
2678 * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry.
2680 2023-11-10 Maciej W. Rozycki <macro@embecosm.com>
2682 * config/riscv/riscv.md (length): Fix indentation for branch and
2683 jump length calculation expressions.
2685 2023-11-10 Eric Botcazou <ebotcazou@adacore.com>
2687 * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>:
2688 Deal with nonempty constant CONSTRUCTORs.
2689 (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET
2690 and DECL_FIELD_BIT_OFFSET for FIELD_DECLs.
2692 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com>
2695 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
2696 (equiv_can_be_consumed_p): Use it.
2698 2023-11-10 Richard Sandiford <richard.sandiford@arm.com>
2700 * read-rtl.cc (md_reader::read_mapping): Allow iterators to
2701 include other iterators.
2702 * doc/md.texi: Document the change.
2703 * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
2704 the iterator that is being duplicated, rather than reproducing it.
2705 (VSTRUCT_D): Redefine using VSTRUCT_[234]D.
2706 (VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
2707 (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
2708 the individual D and Q iterators.
2710 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
2712 * config/i386/i386.md (stack_protect_set_1 peephole2):
2713 Explicitly check operand 2 for word_mode.
2714 (stack_protect_set_1 peephole2 #2): Ditto.
2715 (stack_protect_set_2 peephole2): Ditto.
2716 (stack_protect_set_3 peephole2): Ditto.
2717 (*stack_protect_set_4z_<mode>_di): New insn patter.
2718 (*stack_protect_set_4s_<mode>_di): Ditto.
2719 (stack_protect_set_4 peephole2): New peephole2 pattern to
2720 substitute stack protector scratch register clear with unrelated
2721 register initialization involving zero/sign-extend instruction.
2723 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
2725 * config/i386/i386.md (shift): Use SAL insted of SLL
2726 for ashift insn mnemonic.
2728 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2730 PR tree-optimization/112438
2731 * tree-vect-loop.cc (vectorizable_induction): Bugfix when
2732 LOOP_VINFO_USING_SELECT_VL_P.
2734 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2736 * config/riscv/riscv-protos.h (enum insn_type): New enum.
2737 * config/riscv/riscv-v.cc
2738 (rvv_builder::combine_sequence_use_slideup_profitable_p): New function.
2739 (expand_vector_init_slideup_combine_sequence): Ditto.
2740 (expand_vec_init): Add slideup combine optimization.
2742 2023-11-10 Robin Dapp <rdapp@ventanamicro.com>
2744 PR tree-optimization/112464
2745 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
2746 vect_orig_stmt on scalar_dest_def_info.
2748 2023-11-10 Jin Ma <jinma@linux.alibaba.com>
2750 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt
2751 operation before the XTheadMemPair.
2753 2023-11-10 Richard Biener <rguenther@suse.de>
2755 PR tree-optimization/110221
2756 * tree-vect-slp.cc (vect_schedule_slp_node): When loop
2757 masking / len is applied make sure to not schedule
2758 intenal defs outside of the loop.
2760 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
2762 * expr.cc (store_constructor): Add "and" operation to uniform mask
2765 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
2768 * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint
2769 and switch to the new format.
2770 (add<mode>3_dup<exec_clobber>): Likewise.
2771 (add<mode>3_vcc<exec_vcc>): Likewise.
2772 (add<mode>3_vcc_dup<exec_vcc>): Likewise.
2773 (add<mode>3_vcc_zext_dup): Likewise.
2774 (add<mode>3_vcc_zext_dup_exec): Likewise.
2775 (add<mode>3_vcc_zext_dup2): Likewise.
2776 (add<mode>3_vcc_zext_dup2_exec): Likewise.
2778 2023-11-10 Richard Biener <rguenther@suse.de>
2780 PR middle-end/112469
2781 * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add
2782 missing view_converts.
2784 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
2786 * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
2787 min/max instructions.
2789 2023-11-10 Chenghui Pan <panchenghui@loongson.cn>
2791 * config/loongarch/lsx.md: Fix instruction name typo in
2792 lsx_vreplgr2vr_<lsxfmt_f> template.
2794 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2796 * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
2798 2023-11-10 Pan Li <pan2.li@intel.com>
2801 2023-11-10 Pan Li <pan2.li@intel.com>
2802 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
2803 New fun impl to expand the insn when trailing same elements.
2804 (expand_vec_init): Try trailing same elements when vec_init.
2806 2023-11-10 Pan Li <pan2.li@intel.com>
2808 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
2809 New fun impl to expand the insn when trailing same elements.
2810 (expand_vec_init): Try trailing same elements when vec_init.
2812 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2814 * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
2815 * config/riscv/autovec.md (cond_copysign<mode>): New pattern.
2817 2023-11-10 Pan Li <pan2.li@intel.com>
2820 * internal-fn.def (LRINT): Add FLOATN support.
2825 2023-11-10 Jeff Law <jlaw@ventanamicro.com>
2827 * config/h8300/combiner.md (single bit sign_extract): Avoid recently
2828 added patterns for H8/SX.
2829 (single bit zero_extract): New patterns.
2831 2023-11-10 liuhongt <hongtao.liu@intel.com>
2834 * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
2835 from LT to GT since there's not in the pattern.
2836 (*avx2_pcmp<mode>3_5): Ditto.
2838 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com>
2840 * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
2841 to force emitting register names using the wN form.
2842 * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
2843 always use wN written form in pseudo-C assembly syntax.
2845 2023-11-09 David Malcolm <dmalcolm@redhat.com>
2847 * diagnostic-show-locus.cc (layout::m_line_table): New field.
2848 (compatible_locations_p): Convert to...
2849 (layout::compatible_locations_p): ...this, replacing uses of
2850 line_table global with m_line_table.
2851 (layout::layout): Convert "richloc" param from a pointer to a
2852 const reference. Initialize m_line_table member.
2853 (layout::maybe_add_location_range): Replace uses of line_table
2854 global with m_line_table. Pass the latter to
2855 linemap_client_expand_location_to_spelling_point.
2856 (layout::print_leading_fixits): Pass m_line_table to
2858 (layout::print_trailing_fixits): Likewise.
2859 (gcc_rich_location::add_location_if_nearby): Update for change
2860 to layout ctor params.
2861 (diagnostic_show_locus): Convert to...
2862 (diagnostic_context::maybe_show_locus): ...this, converting
2863 richloc param from a pointer to a const reference. Make "loc"
2864 const. Split out printing part of function to...
2865 (diagnostic_context::show_locus): ...this.
2866 (selftest::test_offset_impl): Update for change to layout ctor
2868 (selftest::test_layout_x_offset_display_utf8): Likewise.
2869 (selftest::test_layout_x_offset_display_tab): Likewise.
2870 (selftest::test_tab_expansion): Likewise.
2871 * diagnostic.h (diagnostic_context::maybe_show_locus): New decl.
2872 (diagnostic_context::show_locus): New decl.
2873 (diagnostic_show_locus): Convert from a decl to an inline function.
2874 * gdbinit.in (break-on-diagnostic): Update from a breakpoint
2875 on diagnostic_show_locus to one on
2876 diagnostic_context::maybe_show_locus.
2877 * genmatch.cc (linemap_client_expand_location_to_spelling_point):
2878 Add "set" param and use it in place of line_table global.
2879 * input.cc (expand_location_1): Likewise.
2880 (expand_location): Update for new param of expand_location_1.
2881 (expand_location_to_spelling_point): Likewise.
2882 (linemap_client_expand_location_to_spelling_point): Add "set"
2883 param and use it in place of line_table global.
2884 * tree-diagnostic-path.cc (event_range::print): Pass line_table
2885 for new param of linemap_client_expand_location_to_spelling_point.
2887 2023-11-09 Uros Bizjak <ubizjak@gmail.com>
2889 * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>):
2890 Use W mode iterator instead of SWI48. Output MOV instead of XOR
2891 for TARGET_USE_MOV0.
2892 (stack_protect_set_1 peephole2): Use integer modes with
2893 mode size <= word mode size for operand 3.
2894 (stack_protect_set_1 peephole2 #2): New peephole2 pattern to
2895 substitute stack protector scratch register clear with unrelated
2896 register initialization, originally in front of stack
2898 (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern.
2899 (stack_protect_set_1 peephole2): New peephole2 pattern to
2900 substitute stack protector scratch register clear with unrelated
2901 register initialization involving LEA instruction.
2903 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com>
2905 PR rtl-optimization/110215
2906 * ira-lives.cc: (add_conflict_from_region_landing_pads): New
2908 (process_bb_node_lives): Use it.
2910 2023-11-09 Alexandre Oliva <oliva@adacore.com>
2912 * config/i386/i386.cc (symbolic_base_address_p,
2913 base_address_p): New, factored out from...
2914 (extract_base_offset_in_addr): ... here and extended to
2915 recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c
2916 and sse2-store-multi.c with PIE enabled by default.
2918 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2920 PR tree-optimization/109154
2921 * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New.
2923 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2925 PR tree-optimization/109154
2926 * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle
2928 * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise.
2929 * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise.
2931 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2933 PR tree-optimization/109154
2934 * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case.
2935 * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise.
2936 * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New.
2938 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2940 PR tree-optimization/109154
2941 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
2942 *movdi_aarch64): Add new w -> Z case.
2943 * config/aarch64/iterators.md (Vbtype): Add QI and HI.
2945 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2947 PR tree-optimization/109154
2948 * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p,
2949 aarch64_maybe_generate_simd_constant): New.
2950 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>,
2951 *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants.
2952 * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int):
2954 (aarch64_simd_special_constant_p,
2955 aarch64_maybe_generate_simd_constant): New.
2956 * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for
2958 * config/aarch64/constraints.md (Dx): new.
2960 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2962 PR tree-optimization/109154
2963 * internal-fn.def (COPYSIGN): New.
2964 * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to
2966 * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New.
2968 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2970 PR tree-optimization/109154
2971 * match.pd: Add new neg+abs rule, remove inverse copysign rule.
2973 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2975 PR tree-optimization/109154
2976 * match.pd: expand existing copysign optimizations.
2978 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
2981 * collect2.cc (main): Do not prepend target triple to
2984 2023-11-09 Richard Biener <rguenther@suse.de>
2986 PR tree-optimization/111133
2987 * tree-vect-stmts.cc (vect_build_scatter_store_calls):
2988 Remove and refactor to ...
2989 (vect_build_one_scatter_store_call): ... this new function.
2990 (vectorizable_store): Use vect_check_scalar_mask to record
2991 the SLP node for the mask operand. Code generate scatters
2992 with builtin decls from the main scatter vectorization
2993 path and prepare that for SLP.
2994 * tree-vect-slp.cc (vect_get_operand_map): Do not look
2995 at the VDEF to decide between scatter or gather since that
2996 doesn't work for patterns. Use the LHS being an SSA_NAME
2999 2023-11-09 Pan Li <pan2.li@intel.com>
3001 * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
3002 perform once emit when at least one succ edge is abnormal.
3004 2023-11-09 Richard Biener <rguenther@suse.de>
3006 * tree-vect-loop.cc (vect_verify_full_masking_avx512):
3007 Check we have integer mode masks as required by
3010 2023-11-09 Richard Biener <rguenther@suse.de>
3012 PR tree-optimization/112444
3013 * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited
3014 defs as undefined vals.
3016 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com>
3018 * config/mips/mips.cc(mips_option_override): Set mips_abs to
3019 2008, if mips_abs is default and mips_nan is 2008.
3021 2023-11-09 Florian Weimer <fweimer@redhat.com>
3023 * doc/invoke.texi (Warning Options): Document
3024 -Wreturn-mismatch. Update -Wreturn-type documentation.
3026 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3028 * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP.
3029 * config/s390/vector.md (eltswapv16qi): New expander.
3030 (*eltswapv16qi): New insn and splitter.
3031 (eltswapv8hi): New insn and splitter.
3032 (eltswap<mode>): New insn and splitter for modes V_HW_4 as well
3034 * config/s390/vx-builtins.md (eltswap<mode>): Remove.
3035 (*eltswapv16qi): Remove.
3036 (*eltswap<mode>): Remove.
3037 (*eltswap<mode>_emu): Remove.
3039 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3041 * config/s390/s390.cc (expand_perm_with_rot): Remove.
3042 (expand_perm_reverse_elements): New.
3043 (expand_perm_with_vster): Remove.
3044 (expand_perm_with_vstbrq): Remove.
3045 (vectorize_vec_perm_const_1): Replace removed functions with new
3048 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3050 * config/s390/s390.cc (expand_perm_with_merge): Deal with cases
3051 where vmr{l,h} are still applicable if the operands are swapped.
3052 (expand_perm_with_vpdi): Likewise for vpdi.
3054 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3056 * config/s390/s390.md (VX_CONV_INT): Remove iterator.
3057 (gf): Add float mappings.
3058 (TOINT, toint): New attribute.
3059 (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13):
3061 (*fixuns_trunc<mode><toint>2_z13): Add.
3062 (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13):
3064 (*fix_trunc<mode><toint>2_bfp_z13): Add.
3065 (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove.
3066 (*floatuns<toint><mode>2_z13): Add.
3067 * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator.
3068 (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
3069 (float<tointvec><mode>2): Add.
3070 (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
3071 (floatuns<tointvec><mode>2): Add.
3072 (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
3074 (fix_trunc<mode><tointvec>2): Add.
3075 (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
3077 (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add.
3079 2023-11-09 Jakub Jelinek <jakub@redhat.com>
3082 * attribs.cc (attribute_ignored_p): Only return true for
3083 attr_namespace_ignored_p if as is NULL.
3084 (decl_attributes): Never add ignored attributes.
3086 2023-11-09 Jin Ma <jinma@linux.alibaba.com>
3088 * config/riscv/bitmanip.md: Avoid the conflict between
3089 zbb and xtheadmemidx in patterns.
3091 2023-11-09 Richard Biener <rguenther@suse.de>
3093 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
3094 to the correct simd_clone_info.
3096 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3098 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE.
3100 2023-11-09 Alexandre Oliva <oliva@adacore.com>
3102 * tree-cfg.cc (assign_discriminators): Handle debug stmts.
3104 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
3107 * config/i386/i386.md (*add<mode>_1_slp):
3108 Split insn only for unmatched operand 0.
3109 (*sub<mode>_1_slp): Ditto.
3110 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
3111 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
3112 Split insn only for unmatched operand 0.
3113 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
3114 (*one_cmpl<mode>_1_slp): Ditto.
3115 (*ashl<mode>3_1_slp): Ditto.
3116 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
3117 (*<any_rotate:insn><mode>_1_slp): Ditto.
3118 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
3119 alternative 1 and split insn after reload for unmatched operand 0.
3120 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
3121 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
3122 iterator. Redefine as define_insn_and_split. Add alternative 1
3123 and split insn after reload for unmatched operand 0.
3124 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
3125 alternative 1 and split insn after reload for unmatched operand 0.
3126 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
3127 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
3128 any_logic code iterator.
3129 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
3130 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
3131 any_logic code iterator. Redefine as define_insn_and_split. Add
3132 alternative 1 and split insn after reload for unmatched operand 0.
3133 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
3134 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
3135 code iterator. Redefine as define_insn_and_split. Add alternative 1
3136 and split insn after reload for unmatched operand 0.
3137 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
3138 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
3139 any_logic code iterator. Redefine as define_insn_and_split. Add
3140 alternative 1 and split insn after reload for unmatched operand 0.
3141 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
3142 Add alternative 1 and split insn after reload for unmatched operand 0.
3143 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
3144 alternative 1 and split insn after reload for unmatched operand 0.
3145 (*one_cmplqi_ext<mode>_1): Ditto.
3146 (*ashlqi_ext<mode>_1): Ditto.
3147 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
3149 2023-11-08 Richard Biener <rguenther@suse.de>
3151 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
3152 vector gathering for SLP of emulated gathers.
3154 2023-11-08 Richard Biener <rguenther@suse.de>
3156 * tree-vectorizer.h (vect_slp_child_index_for_operand):
3157 Add gatherscatter_p argument.
3158 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
3160 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
3161 argument into an output, also output the SLP node associated
3163 (vectorizable_simd_clone_call): Adjust.
3164 (vectorizable_store): Likewise.
3165 (vectorizable_load): Likewise.
3167 2023-11-08 Richard Biener <rguenther@suse.de>
3169 * tree-vect-stmts.cc (vectorizable_load): Use the correct
3170 vectorized mask operand.
3172 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
3174 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
3175 New combine pattern.
3177 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3179 * config/riscv/riscv-vsetvl.cc: Fix ICE.
3181 2023-11-08 xuli <xuli1@eswincomputing.com>
3183 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
3185 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
3188 * config/i386/constraints.md (jc): New constraint that prohibits
3190 * config/i386/i386.md (*movdi_internal): Change r constraint
3192 (*movti_internal): Likewise.
3194 2023-11-08 Florian Weimer <fweimer@redhat.com>
3196 * doc/invoke.texi (Warning Options): Mention C diagnostics
3199 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3202 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
3204 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
3207 * config/i386/i386.md (avx_noavx512vl): New definition for isa
3209 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
3210 avx_noavx512f to avx_noavx512vl.
3212 2023-11-07 Pan Li <pan2.li@intel.com>
3214 * config/riscv/autovec.md: Remove the size check of lfloor.
3215 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
3216 emit_vec_rounding_to_integer for floor.
3218 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
3220 PR tree-optimization/112361
3222 PR middle-end/112406
3223 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
3224 loop was versioned and only then create COND_OPs.
3225 (predicate_scalar_phi): Do not create COND_OP when not
3227 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
3229 (vectorize_fold_left_reduction): Pass mask to
3230 vect_expand_fold_left.
3232 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
3234 * config/i386/predicates.md ("flags_reg_operand"):
3235 Make predicate special to avoid automatic mode checks.
3237 2023-11-07 Martin Jambor <mjambor@suse.cz>
3239 * configure: Regenerate.
3241 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
3243 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
3245 (output_offload_tables): Write indirect functions.
3246 (input_offload_tables): read indirect functions.
3247 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
3248 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
3249 * omp-offload.cc (offload_ind_funcs): New.
3250 (omp_discover_implicit_declare_target): Add functions marked with
3251 'omp declare target indirect' to indirect functions list.
3252 (omp_finish_file): Add indirect functions to section for offload
3254 (execute_omp_device_lower): Redirect indirect calls on target by
3255 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
3256 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
3257 indirect functions are present on an accelerator device.
3258 * omp-offload.h (offload_ind_funcs): New.
3259 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
3260 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
3261 (omp_clause_code_name): Likewise.
3262 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
3263 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
3264 section. Count number of indirect functions.
3265 (process_obj): Emit number of indirect functions.
3266 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
3267 (process): Emit offload_ind_func_table in PTX code. Emit indirect
3268 function names and count in image.
3269 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
3270 indirect functions in PTX code with IND_FUNC_MAP.
3272 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
3274 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
3275 attribute syntax supported also in C.
3277 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
3279 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
3280 modifier for SVE registers.
3282 2023-11-07 Joseph Myers <joseph@codesourcery.com>
3284 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
3285 use flag_isoc23 and function_c23_misc.
3286 * config/rl78/rl78.cc (rl78_option_override): Compare
3287 lang_hooks.name with "GNU C23" not "GNU C2X".
3288 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
3289 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
3291 * doc/extend.texi: Likewise.
3292 * doc/invoke.texi: Likewise.
3293 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
3294 against and return "GNU C23" language string instead of "GNU C2X".
3295 * ginclude/float.h: Refer to C23 instead of C2X in comments.
3296 * ginclude/stdint-gcc.h: Likewise.
3297 * glimits.h: Likewise.
3300 2023-11-07 Alexandre Oliva <oliva@adacore.com>
3302 * doc/sourcebuild.texi (opt_mstrict_align): New target.
3304 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
3306 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
3307 New combine pattern.
3308 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
3309 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
3310 (*cond_len_extend<v_double_trunc><mode>): Ditto.
3311 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
3313 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3316 * config/riscv/riscv-avlprop.cc
3317 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
3318 * config/riscv/t-riscv: Add new include.
3320 2023-11-07 Pan Li <pan2.li@intel.com>
3322 * config/riscv/autovec.md: Remove the size check of lceil.l
3323 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
3324 emit_vec_rounding_to_integer for ceil.
3326 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
3328 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
3330 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
3332 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
3334 2023-11-06 David Malcolm <dmalcolm@redhat.com>
3336 * diagnostic-show-locus.cc (class colorizer): Take just a
3337 pretty_printer rather than a diagnostic_context.
3338 (layout::layout): Make context param a const reference,
3339 and pretty_printer param non-optional.
3340 (layout::m_context): Drop field.
3341 (layout::m_options): New field.
3342 (layout::m_colorize_source_p): Drop field.
3343 (layout::m_show_labels_p): Drop field.
3344 (layout::m_show_line_numbers_p): Drop field.
3345 (layout::print_gap_in_line_numbering): Use m_options.
3346 (layout::calculate_line_spans): Likewise.
3347 (layout::calculate_linenum_width): Likewise.
3348 (layout::calculate_x_offset_display): Likewise.
3349 (layout::print_source_line): Likewise.
3350 (layout::start_annotation_line): Likewise.
3351 (layout::print_annotation_line): Likewise.
3352 (layout::print_line): Likewise.
3353 (gcc_rich_location::add_location_if_nearby): Update for changes to
3355 (diagnostic_show_locus): Likewise.
3356 (selftest::test_offset_impl): Likewise.
3357 (selftest::test_layout_x_offset_display_utf8): Likewise.
3358 (selftest::test_layout_x_offset_display_tab): Likewise.
3359 (selftest::test_tab_expansion): Likewise.
3360 * diagnostic.h (diagnostic_context::m_source_printing): Move
3361 declaration of struct outside diagnostic_context as...
3362 (struct diagnostic_source_printing_options)... this.
3364 2023-11-06 David Malcolm <dmalcolm@redhat.com>
3366 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
3368 (diagnostic_option_classifier::push): ...this.
3369 (diagnostic_context::pop_diagnostics): Convert to...
3370 (diagnostic_option_classifier::pop): ...this.
3371 (diagnostic_context::initialize): Move code to...
3372 (diagnostic_option_classifier::init): ...this new function.
3373 (diagnostic_context::finish): Move code to...
3374 (diagnostic_option_classifier::fini): ...this new function.
3375 (diagnostic_context::classify_diagnostic): Convert to...
3376 (diagnostic_option_classifier::classify_diagnostic): ...this.
3377 (diagnostic_context::update_effective_level_from_pragmas): Convert
3379 (diagnostic_option_classifier::update_effective_level_from_pragmas):
3381 (diagnostic_context::diagnostic_enabled): Update for refactoring.
3382 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
3383 (class diagnostic_option_classifier): ...this new class.
3384 (diagnostic_context::option_unspecified_p): Update for move of
3385 fields into m_option_classifier.
3386 (diagnostic_context::classify_diagnostic): Likewise.
3387 (diagnostic_context::push_diagnostics): Likewise.
3388 (diagnostic_context::pop_diagnostics): Likewise.
3389 (diagnostic_context::update_effective_level_from_pragmas): Delete.
3390 (diagnostic_context::m_classify_diagnostic): Move into class
3391 diagnostic_option_classifier.
3392 (diagnostic_context::m_option_classifier): Likewise.
3393 (diagnostic_context::m_classification_history): Likewise.
3394 (diagnostic_context::m_n_classification_history): Likewise.
3395 (diagnostic_context::m_push_list): Likewise.
3396 (diagnostic_context::m_n_push): Likewise.
3397 (diagnostic_context::m_option_classifier): New.
3399 2023-11-06 David Malcolm <dmalcolm@redhat.com>
3401 * diagnostic.cc (diagnostic_context::set_urlifier): New.
3402 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
3403 (diagnostic_context::m_urlifier): Make private.
3404 * gcc.cc (driver::global_initializations): Use set_urlifier rather
3405 than directly setting field.
3406 * toplev.cc (general_init): Likewise.
3408 2023-11-06 David Malcolm <dmalcolm@redhat.com>
3410 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
3411 uses of diagnostic_kind_count with simple field acesss.
3412 (diagnostic_context::report_diagnostic): Likewise.
3413 (diagnostic_text_output_format::~diagnostic_text_output_format):
3414 Replace use of diagnostic_kind_count with
3415 diagnostic_context::diagnostic_count.
3416 * diagnostic.h (diagnostic_kind_count): Delete.
3417 (errorcount): Replace use of diagnostic_kind_count with
3418 diagnostic_context::diagnostic_count.
3419 (warningcount): Likewise.
3420 (werrorcount): Likewise.
3421 (sorrycount): Likewise.
3423 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
3425 * doc/sourcebuild.texi (Other attributes): Document thread_fence
3428 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
3430 * config/i386/constraints.md (Bc): Remove constraint.
3431 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
3432 * config/i386/i386.cc (ix86_memory_address_reg_class):
3433 Do not limit processing to TARGET_APX_EGPR. Exit early for
3434 NULL insn. Do not check recog_data.insn before calling
3435 extract_insn_cached.
3436 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
3437 (ix86_regno_ok_for_insn_base_p): Ditto.
3438 (ix86_insn_index_reg_class): Ditto.
3439 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
3440 Remove insn pattern and corresponding peephole2 pattern.
3441 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
3442 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
3443 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
3444 and corresponding peephole2 pattern.
3445 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
3446 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
3447 (*extzvqi_mem_rex64): Remove insn pattern and
3448 corresponding peephole2 pattern.
3449 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
3450 alternative to (Q,QnBn). Add "addr" attribute.
3451 (*insvqi_1_mem_rex64): Remove insn pattern and
3452 corresponding peephole2 pattern.
3453 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
3454 alternative to (Q,QnBn). Add "addr" attribute.
3455 (@insv<mode>_1): Ditto.
3456 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
3457 alternative to (QBn,0,Q). Add "addr" attribute.
3458 (*subqi_ext<mode>_0): Ditto.
3459 (*andqi_ext<mode>_0): Ditto.
3460 (*<any_or:code>qi_ext<mode>_0): Ditto.
3461 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
3462 alternative to (Q,0,QnBn). Add "addr" attribute.
3463 (*andqi_ext<mode>_1): Ditto.
3464 (*andqi_ext<mode>_1_cc): Ditto.
3465 (*<any_or:code>qi_ext<mode>_1): Ditto.
3466 (*xorqi_ext<mode>_1_cc): Ditto.
3467 * config/i386/predicates.md (nonimm_x64constmem_operand):
3469 (general_x64constmem_operand): Ditto.
3470 (norex_memory_operand): Ditto.
3472 2023-11-06 Joseph Myers <joseph@codesourcery.com>
3475 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
3476 -std=gnu23 instead of -std=c2x and -std=gnu2x.
3477 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
3478 instead of C2x and -std=c2x.
3479 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
3480 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
3481 -std=gnu2x as deprecated aliases. Update descriptions of C23.
3482 * doc/standards.texi (Standards): Describe C23 with C2X as an old
3485 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
3487 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
3489 2023-11-06 Richard Biener <rguenther@suse.de>
3491 PR tree-optimization/112405
3492 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
3493 Properly handle invariant and/or loop mask passing.
3495 2023-11-06 Pan Li <pan2.li@intel.com>
3497 * config/riscv/autovec.md: Remove the size check of lround.
3498 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
3499 emit_vec_rounding_to_integer for round.
3501 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3503 * config/riscv/predicates.md: Adapt predicate.
3504 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
3505 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
3506 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
3507 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
3509 2023-11-06 Richard Biener <rguenther@suse.de>
3511 PR tree-optimization/111950
3512 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
3514 (find_guard_arg): Likewise.
3515 (slpeel_update_phi_nodes_for_guard2): Likewise.
3516 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
3517 slpeel_duplicate_current_defs_from_edges, do not elide
3518 LC-PHIs for invariant values.
3519 (vect_do_peeling): Materialize PHI arguments for the edge
3520 around the epilog from the PHI defs of the main loop exit.
3522 2023-11-06 Richard Biener <rguenther@suse.de>
3524 PR tree-optimization/112404
3525 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
3526 overload with SLP node argument.
3527 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
3528 (vect_check_scalar_mask): Use it.
3529 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
3530 loads also for nodes with children, like .MASK_LOAD.
3531 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
3532 representative for load nodes and check whether it is a grouped
3533 access before looking for load-lanes support.
3535 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
3537 PR tree-optimization/111760
3538 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
3540 * config/riscv/riscv-protos.h (enum insn_type): Add.
3541 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
3542 * doc/md.texi: Add vcond_mask_len.
3543 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
3544 Create VCOND_MASK_LEN when length masking.
3545 * gimple-match.h (gimple_match_op::gimple_match_op): Always
3546 initialize len and bias.
3547 * internal-fn.cc (vec_cond_mask_len_direct): Add.
3548 (direct_vec_cond_mask_len_optab_supported_p): Add.
3549 (internal_fn_len_index): Add VCOND_MASK_LEN.
3550 (internal_fn_mask_index): Ditto.
3551 * internal-fn.def (VCOND_MASK_LEN): New internal function.
3552 * match.pd: Combine unconditional unary, binary and ternary
3553 operations into the respective COND_LEN operations.
3554 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
3556 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
3558 * explow.cc (align_dynamic_address): Do nothing if the required
3559 alignment is a byte.
3561 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
3563 * function.h (get_stack_dynamic_offset): Declare.
3564 * function.cc (get_stack_dynamic_offset): New function,
3566 (get_stack_dynamic_offset): ...here.
3567 * explow.cc (allocate_dynamic_stack_space): Handle calls made
3568 after virtual registers have been instantiated.
3570 2023-11-06 liuhongt <hongtao.liu@intel.com>
3573 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
3574 Avoid generating RTL code when d->testing_p.
3576 2023-11-06 Richard Biener <rguenther@suse.de>
3578 PR tree-optimization/112369
3579 * tree.cc (strip_float_extensions): Use element_precision.
3581 2023-11-06 Richard Biener <rguenther@suse.de>
3583 PR middle-end/112296
3584 * doc/extend.texi (__builtin_constant_p): Clarify that
3585 side-effects are discarded.
3587 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
3590 * config.in: Regenerate.
3591 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
3592 inline asm handling under !HAVE_AS_POWER10_HTM.
3593 * configure: Regenerate.
3594 * configure.ac: Detect assembler support for HTM insns at power10.
3596 2023-11-06 xuli <xuli1@eswincomputing.com>
3597 Pan Li <pan2.li@intel.com>
3599 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
3600 (riscv_register_pragmas): Register the hook.
3601 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
3602 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
3603 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
3604 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
3606 (function_builder::add_function): Add overloaded arg.
3607 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
3608 (function_builder::add_overloaded_function): New API impl.
3609 (registered_function::overloaded_hash): Calculate hash value.
3610 (has_vxrm_or_frm_p): New function impl.
3611 (non_overloaded_registered_function_hasher::hash): Ditto.
3612 (non_overloaded_registered_function_hasher::equal): Ditto.
3613 (handle_pragma_vector): Allocate space for hash table.
3614 (resolve_overloaded_builtin): New function impl.
3615 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
3616 (function_base::may_require_vxrm_p): Ditto.
3618 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3621 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
3622 * config/i386/avx512bf16vlintrin.h: Ditto.
3623 * config/i386/avx512bitalgvlintrin.h: Ditto.
3624 * config/i386/avx512bwintrin.h: Ditto.
3625 * config/i386/avx512dqintrin.h: Ditto.
3626 * config/i386/avx512fintrin.h: Ditto.
3627 * config/i386/avx512fp16intrin.h: Ditto.
3628 * config/i386/avx512fp16vlintrin.h: Ditto.
3629 * config/i386/avx512ifmavlintrin.h: Ditto.
3630 * config/i386/avx512vbmi2vlintrin.h: Ditto.
3631 * config/i386/avx512vbmivlintrin.h: Ditto.
3632 * config/i386/avx512vlbwintrin.h: Ditto.
3633 * config/i386/avx512vldqintrin.h: Ditto.
3634 * config/i386/avx512vlintrin.h: Ditto.
3635 * config/i386/avx512vnnivlintrin.h: Ditto.
3636 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
3637 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
3639 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3641 * config/i386/avx512bf16vlintrin.h
3642 (_mm_avx512_castsi128_ps): New.
3643 (_mm256_avx512_castsi256_ps): Ditto.
3644 (_mm_avx512_slli_epi32): Ditto.
3645 (_mm256_avx512_slli_epi32): Ditto.
3646 (_mm_avx512_cvtepi16_epi32): Ditto.
3647 (_mm256_avx512_cvtepi16_epi32): Ditto.
3648 (__attribute__): Change intrin call.
3649 * config/i386/avx512bwintrin.h
3650 (_mm_avx512_set_epi32): New.
3651 (_mm_avx512_set_epi16): Ditto.
3652 (_mm_avx512_set_epi8): Ditto.
3653 (__attribute__): Change intrin call.
3654 * config/i386/avx512fp16intrin.h: Ditto.
3655 * config/i386/avx512fp16vlintrin.h
3656 (_mm_avx512_set1_ps): New.
3657 (_mm256_avx512_set1_ps): Ditto.
3658 (_mm_avx512_and_si128): Ditto.
3659 (_mm256_avx512_and_si256): Ditto.
3660 (__attribute__): Change intrin call.
3661 * config/i386/avx512vlbwintrin.h
3662 (_mm_avx512_set1_epi32): New.
3663 (_mm_avx512_set1_epi16): Ditto.
3664 (_mm_avx512_set1_epi8): Ditto.
3665 (_mm256_avx512_set_epi16): Ditto.
3666 (_mm256_avx512_set_epi8): Ditto.
3667 (_mm256_avx512_set1_epi16): Ditto.
3668 (_mm256_avx512_set1_epi32): Ditto.
3669 (_mm256_avx512_set1_epi8): Ditto.
3670 (_mm_avx512_max_epi16): Ditto.
3671 (_mm_avx512_min_epi16): Ditto.
3672 (_mm_avx512_max_epu16): Ditto.
3673 (_mm_avx512_min_epu16): Ditto.
3674 (_mm_avx512_max_epi8): Ditto.
3675 (_mm_avx512_min_epi8): Ditto.
3676 (_mm_avx512_max_epu8): Ditto.
3677 (_mm_avx512_min_epu8): Ditto.
3678 (_mm256_avx512_max_epi16): Ditto.
3679 (_mm256_avx512_min_epi16): Ditto.
3680 (_mm256_avx512_max_epu16): Ditto.
3681 (_mm256_avx512_min_epu16): Ditto.
3682 (_mm256_avx512_insertf128_ps): Ditto.
3683 (_mm256_avx512_extractf128_pd): Ditto.
3684 (_mm256_avx512_extracti128_si256): Ditto.
3685 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
3686 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
3687 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
3688 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
3689 (__attribute__): Change intrin call.
3691 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3693 * config/i386/avx512bf16vlintrin.h: Change intrin call.
3694 * config/i386/avx512fintrin.h
3695 (_mm_avx512_undefined_ps): New.
3696 (_mm_avx512_undefined_pd): Ditto.
3697 (__attribute__): Change intrin call.
3698 * config/i386/avx512vbmivlintrin.h: Ditto.
3699 * config/i386/avx512vlbwintrin.h: Ditto.
3700 * config/i386/avx512vldqintrin.h: Ditto.
3701 * config/i386/avx512vlintrin.h
3702 (_mm_avx512_undefined_si128): New.
3703 (_mm256_avx512_undefined_ps): Ditto.
3704 (_mm256_avx512_undefined_pd): Ditto.
3705 (_mm256_avx512_undefined_si256): Ditto.
3706 (__attribute__): Change intrin call.
3708 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3710 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
3711 * config/i386/avx512dqintrin.h: Ditto.
3712 * config/i386/avx512fintrin.h:
3713 (_mm_avx512_setzero_ps): New.
3714 (_mm_avx512_setzero_pd): Ditto.
3715 (__attribute__): Change intrin call.
3716 * config/i386/avx512fp16intrin.h: Ditto.
3717 * config/i386/avx512fp16vlintrin.h: Ditto.
3718 * config/i386/avx512vbmi2vlintrin.h: Ditto.
3719 * config/i386/avx512vbmivlintrin.h: Ditto.
3720 * config/i386/avx512vlbwintrin.h: Ditto.
3721 * config/i386/avx512vldqintrin.h: Ditto.
3722 * config/i386/avx512vlintrin.h
3723 (_mm_avx512_setzero_si128): New.
3724 (_mm256_avx512_setzero_pd): Ditto.
3725 (_mm256_avx512_setzero_ps): Ditto.
3726 (_mm256_avx512_setzero_si256): Ditto.
3727 (__attribute__): Change intrin call.
3728 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
3729 * config/i386/gfniintrin.h: Ditto.
3731 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
3733 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
3734 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
3735 (REG_CLASS_NAMES): Ditto.
3736 (REG_CLASS_CONTENTS): Ditto.
3737 * config/i386/constraints.md ("R"): Update for rename.
3739 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
3741 * mode-switching.cc: Remove unused forward references.
3742 (seginfo): Remove bbnum.
3743 (new_seginfo): Remove associated argument.
3744 (optimize_mode_switching): Update calls accordingly.
3746 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
3748 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
3749 invalid [...] operands.
3751 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
3754 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
3755 function, with the core logic extracted from...
3756 (aarch64_can_change_mode_class): ...here. Extend the previous rules
3757 to allow changes between partial SVE modes and other modes if
3758 the other mode is no bigger than an element, and if no other rule
3759 prevents it. Use the aarch64_modes_tieable_p handling of
3760 partial Advanced SIMD structure modes.
3761 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
3762 Allow all vector mode ties that it allows.
3764 2023-11-05 Pan Li <pan2.li@intel.com>
3766 * config/riscv/autovec.md: Remove the size check of lrint.
3767 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
3769 (emit_vec_widden_cvt_x_f): New help emit func impl.
3770 (emit_vec_rounding_to_integer): New func impl to emit the
3771 rounding from FP to integer.
3772 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
3773 * config/riscv/vector.md: Take V_VLSF for vfncvt.
3775 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3777 * config/riscv/vector.md: Fix bug.
3779 2023-11-04 Sergei Trofimovich <siarheit@google.com>
3782 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
3785 2023-11-04 Pan Li <pan2.li@intel.com>
3787 * config/riscv/vector-iterators.md: Remove HF modes.
3789 2023-11-04 David Malcolm <dmalcolm@redhat.com>
3791 * diagnostic.cc: Include "pretty-print-urlifier.h".
3792 (diagnostic_context::initialize): Initialize m_urlifier.
3793 (diagnostic_context::finish): Clean up m_urlifier
3794 (diagnostic_report::diagnostic): m_urlifier to pp_format.
3795 * diagnostic.h (diagnostic_context::m_urlifier): New field.
3796 * gcc-urlifier.cc: New file.
3797 * gcc-urlifier.def: New file.
3798 * gcc-urlifier.h: New file.
3799 * gcc.cc: Include "gcc-urlifier.h".
3800 (driver::global_initializations): Initialize global_dc->m_urlifier.
3801 * pretty-print-urlifier.h: New file.
3802 * pretty-print.cc: Include "pretty-print-urlifier.h".
3803 (obstack_append_string): New.
3804 (urlify_quoted_string): New.
3805 (pp_format): Add "urlifier" param and use it to implement optional
3806 urlification of quoted text strings.
3807 (pp_output_formatted_text): Make buffer a const pointer.
3808 (selftest::pp_printf_with_urlifier): New.
3809 (selftest::test_urlification): New.
3810 (selftest::pretty_print_cc_tests): Call it.
3811 * pretty-print.h (class urlifier): New forward declaration.
3812 (pp_format): Add optional urlifier param.
3813 * selftest-run-tests.cc (selftest::run_tests): Call
3814 selftest::gcc_urlifier_cc_tests .
3815 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
3816 * toplev.cc: Include "gcc-urlifier.h".
3817 (general_init): Initialize global_dc->m_urlifier.
3819 2023-11-04 David Malcolm <dmalcolm@redhat.com>
3821 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
3824 2023-11-04 David Malcolm <dmalcolm@redhat.com>
3826 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
3827 to diagnostic-text-art.h.
3828 * coretypes.h (struct diagnostic_context): Replace forward decl
3830 (class diagnostic_context): ...this.
3831 * diagnostic-format-json.cc: Update for changes to
3833 * diagnostic-format-sarif.cc: Likewise.
3834 * diagnostic-show-locus.cc: Likewise.
3835 * diagnostic-text-art.h: Deleted file, moving content...
3836 (enum diagnostic_text_art_charset): ...to diagnostic.h,
3837 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
3838 (diagnostics_text_art_charset_init): ...deleting in favor of
3839 diagnostic_context::set_text_art_charset.
3840 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
3841 (pedantic_warning_kind): Update for field renaming.
3842 (permissive_error_kind): Likewise.
3843 (permissive_error_option): Likewise.
3844 (diagnostic_initialize): Convert to...
3845 (diagnostic_context::initialize): ...this, updating for field
3847 (diagnostic_color_init): Convert to...
3848 (diagnostic_context::color_init): ...this.
3849 (diagnostic_urls_init): Convert to...
3850 (diagnostic_context::urls_init): ...this.
3851 (diagnostic_initialize_input_context): Convert to...
3852 (diagnostic_context::initialize_input_context): ...this.
3853 (diagnostic_finish): Convert to...
3854 (diagnostic_context::finish): ...this, updating for field
3856 (diagnostic_context::set_output_format): New.
3857 (diagnostic_context::set_client_data_hooks): New.
3858 (diagnostic_context::create_edit_context): New.
3859 (diagnostic_converted_column): Convert to...
3860 (diagnostic_context::converted_column): ...this.
3861 (diagnostic_get_location_text): Update for field renaming.
3862 (diagnostic_check_max_errors): Convert to...
3863 (diagnostic_context::check_max_errors): ...this, updating for
3865 (diagnostic_action_after_output): Convert to...
3866 (diagnostic_context::action_after_output): ...this, updating for
3868 (last_module_changed_p): Delete.
3869 (set_last_module): Delete.
3870 (includes_seen): Convert to...
3871 (diagnostic_context::includes_seen_p): ...this, updating for field
3873 (diagnostic_report_current_module): Convert to...
3874 (diagnostic_context::report_current_module): ...this, updating for
3875 field renamings, and replacing uses of last_module_changed_p and
3876 set_last_module to simple field accesses.
3877 (diagnostic_show_any_path): Convert to...
3878 (diagnostic_context::show_any_path): ...this.
3879 (diagnostic_classify_diagnostic): Convert to...
3880 (diagnostic_context::classify_diagnostic): ...this, updating for
3882 (diagnostic_push_diagnostics): Convert to...
3883 (diagnostic_context::push_diagnostics): ...this, updating for field
3885 (diagnostic_pop_diagnostics): Convert to...
3886 (diagnostic_context::pop_diagnostics): ...this, updating for field
3888 (get_any_inlining_info): Convert to...
3889 (diagnostic_context::get_any_inlining_info): ...this, updating for
3891 (update_effective_level_from_pragmas): Convert to...
3892 (diagnostic_context::update_effective_level_from_pragmas):
3893 ...this, updating for field renamings.
3894 (print_any_cwe): Convert to...
3895 (diagnostic_context::print_any_cwe): ...this.
3896 (print_any_rules): Convert to...
3897 (diagnostic_context::print_any_rules): ...this.
3898 (print_option_information): Convert to...
3899 (diagnostic_context::print_option_information): ...this, updating
3900 for field renamings.
3901 (diagnostic_enabled): Convert to...
3902 (diagnostic_context::diagnostic_enabled): ...this, updating for
3904 (warning_enabled_at): Convert to...
3905 (diagnostic_context::warning_enabled_at): ...this.
3906 (diagnostic_report_diagnostic): Convert to...
3907 (diagnostic_context::report_diagnostic): ...this, updating for
3908 field renamings and conversions to member functions.
3909 (diagnostic_append_note): Update for field renaming.
3910 (diagnostic_impl): Use diagnostic_context::report_diagnostic
3912 (diagnostic_n_impl): Likewise.
3913 (diagnostic_emit_diagram): Convert to...
3914 (diagnostic_context::emit_diagram): ...this, updating for field
3916 (error_recursion): Convert to...
3917 (diagnostic_context::error_recursion): ...this.
3918 (diagnostic_text_output_format::~diagnostic_text_output_format):
3920 (diagnostics_text_art_charset_init): Convert to...
3921 (diagnostic_context::set_text_art_charset): ...this.
3922 (assert_location_text): Update for field renamings.
3923 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
3924 diagnostic-text-art.h.
3925 (struct diagnostic_context): Convert to...
3926 (class diagnostic_context): ...this.
3927 (diagnostic_context::ice_handler_callback_t): New typedef.
3928 (diagnostic_context::set_locations_callback_t): New typedef.
3929 (diagnostic_context::initialize): New decl.
3930 (diagnostic_context::color_init): New decl.
3931 (diagnostic_context::urls_init): New decl.
3932 (diagnostic_context::file_cache_init): New decl.
3933 (diagnostic_context::finish): New decl.
3934 (diagnostic_context::set_set_locations_callback): New.
3935 (diagnostic_context::initialize_input_context): New decl.
3936 (diagnostic_context::warning_enabled_at): New decl.
3937 (diagnostic_context::option_unspecified_p): New.
3938 (diagnostic_context::report_diagnostic): New decl.
3939 (diagnostic_context::report_current_module): New decl.
3940 (diagnostic_context::check_max_errors): New decl.
3941 (diagnostic_context::action_after_output): New decl.
3942 (diagnostic_context::classify_diagnostic): New decl.
3943 (diagnostic_context::push_diagnostics): New decl.
3944 (diagnostic_context::pop_diagnostics): New decl.
3945 (diagnostic_context::emit_diagram): New decl.
3946 (diagnostic_context::set_output_format): New decl.
3947 (diagnostic_context::set_text_art_charset): New decl.
3948 (diagnostic_context::set_client_data_hooks): New decl.
3949 (diagnostic_context::create_edit_context): New decl.
3950 (diagnostic_context::set_warning_as_error_requested): New.
3951 (diagnostic_context::set_report_bug): New.
3952 (diagnostic_context::set_extra_output_kind): New.
3953 (diagnostic_context::set_show_cwe): New.
3954 (diagnostic_context::set_show_rules): New.
3955 (diagnostic_context::set_path_format): New.
3956 (diagnostic_context::set_show_path_depths): New.
3957 (diagnostic_context::set_show_option_requested): New.
3958 (diagnostic_context::set_max_errors): New.
3959 (diagnostic_context::set_escape_format): New.
3960 (diagnostic_context::set_ice_handler_callback): New.
3961 (diagnostic_context::warning_as_error_requested_p): New.
3962 (diagnostic_context::show_path_depths_p): New.
3963 (diagnostic_context::get_path_format): New.
3964 (diagnostic_context::get_escape_format): New.
3965 (diagnostic_context::get_file_cache): New.
3966 (diagnostic_context::get_edit_context): New.
3967 (diagnostic_context::get_client_data_hooks): New.
3968 (diagnostic_context::get_diagram_theme): New.
3969 (diagnostic_context::converted_column): New decl.
3970 (diagnostic_context::diagnostic_count): New.
3971 (diagnostic_context::includes_seen_p): New decl.
3972 (diagnostic_context::print_any_cwe): New decl.
3973 (diagnostic_context::print_any_rules): New decl.
3974 (diagnostic_context::print_option_information): New decl.
3975 (diagnostic_context::show_any_path): New decl.
3976 (diagnostic_context::error_recursion): New decl.
3977 (diagnostic_context::diagnostic_enabled): New decl.
3978 (diagnostic_context::get_any_inlining_info): New decl.
3979 (diagnostic_context::update_effective_level_from_pragmas): New
3981 (diagnostic_context::m_file_cache): Make private.
3982 (diagnostic_context::diagnostic_count): Rename to...
3983 (diagnostic_context::m_diagnostic_count): ...this and make
3985 (diagnostic_context::warning_as_error_requested): Rename to...
3986 (diagnostic_context::m_warning_as_error_requested): ...this and
3988 (diagnostic_context::n_opts): Rename to...
3989 (diagnostic_context::m_n_opts): ...this and make private.
3990 (diagnostic_context::classify_diagnostic): Rename to...
3991 (diagnostic_context::m_classify_diagnostic): ...this and make
3993 (diagnostic_context::classification_history): Rename to...
3994 (diagnostic_context::m_classification_history): ...this and make
3996 (diagnostic_context::n_classification_history): Rename to...
3997 (diagnostic_context::m_n_classification_history): ...this and make
3999 (diagnostic_context::push_list): Rename to...
4000 (diagnostic_context::m_push_list): ...this and make private.
4001 (diagnostic_context::n_push): Rename to...
4002 (diagnostic_context::m_n_push): ...this and make private.
4003 (diagnostic_context::show_cwe): Rename to...
4004 (diagnostic_context::m_show_cwe): ...this and make private.
4005 (diagnostic_context::show_rules): Rename to...
4006 (diagnostic_context::m_show_rules): ...this and make private.
4007 (diagnostic_context::path_format): Rename to...
4008 (diagnostic_context::m_path_format): ...this and make private.
4009 (diagnostic_context::show_path_depths): Rename to...
4010 (diagnostic_context::m_show_path_depths): ...this and make
4012 (diagnostic_context::show_option_requested): Rename to...
4013 (diagnostic_context::m_show_option_requested): ...this and make
4015 (diagnostic_context::abort_on_error): Rename to...
4016 (diagnostic_context::m_abort_on_error): ...this.
4017 (diagnostic_context::show_column): Rename to...
4018 (diagnostic_context::m_show_column): ...this.
4019 (diagnostic_context::pedantic_errors): Rename to...
4020 (diagnostic_context::m_pedantic_errors): ...this.
4021 (diagnostic_context::permissive): Rename to...
4022 (diagnostic_context::m_permissive): ...this.
4023 (diagnostic_context::opt_permissive): Rename to...
4024 (diagnostic_context::m_opt_permissive): ...this.
4025 (diagnostic_context::fatal_errors): Rename to...
4026 (diagnostic_context::m_fatal_errors): ...this.
4027 (diagnostic_context::dc_inhibit_warnings): Rename to...
4028 (diagnostic_context::m_inhibit_warnings): ...this.
4029 (diagnostic_context::dc_warn_system_headers): Rename to...
4030 (diagnostic_context::m_warn_system_headers): ...this.
4031 (diagnostic_context::max_errors): Rename to...
4032 (diagnostic_context::m_max_errors): ...this and make private.
4033 (diagnostic_context::internal_error): Rename to...
4034 (diagnostic_context::m_internal_error): ...this.
4035 (diagnostic_context::option_enabled): Rename to...
4036 (diagnostic_context::m_option_enabled): ...this.
4037 (diagnostic_context::option_state): Rename to...
4038 (diagnostic_context::m_option_state): ...this.
4039 (diagnostic_context::option_name): Rename to...
4040 (diagnostic_context::m_option_name): ...this.
4041 (diagnostic_context::get_option_url): Rename to...
4042 (diagnostic_context::m_get_option_url): ...this.
4043 (diagnostic_context::print_path): Rename to...
4044 (diagnostic_context::m_print_path): ...this.
4045 (diagnostic_context::make_json_for_path): Rename to...
4046 (diagnostic_context::m_make_json_for_path): ...this.
4047 (diagnostic_context::x_data): Rename to...
4048 (diagnostic_context::m_client_aux_data): ...this.
4049 (diagnostic_context::last_location): Rename to...
4050 (diagnostic_context::m_last_location): ...this.
4051 (diagnostic_context::last_module): Rename to...
4052 (diagnostic_context::m_last_module): ...this and make private.
4053 (diagnostic_context::lock): Rename to...
4054 (diagnostic_context::m_lock): ...this and make private.
4055 (diagnostic_context::lang_mask): Rename to...
4056 (diagnostic_context::m_lang_mask): ...this.
4057 (diagnostic_context::inhibit_notes_p): Rename to...
4058 (diagnostic_context::m_inhibit_notes_p): ...this.
4059 (diagnostic_context::report_bug): Rename to...
4060 (diagnostic_context::m_report_bug): ...this and make private.
4061 (diagnostic_context::extra_output_kind): Rename to...
4062 (diagnostic_context::m_extra_output_kind): ...this and make
4064 (diagnostic_context::column_unit): Rename to...
4065 (diagnostic_context::m_column_unit): ...this and make private.
4066 (diagnostic_context::column_origin): Rename to...
4067 (diagnostic_context::m_column_origin): ...this and make private.
4068 (diagnostic_context::tabstop): Rename to...
4069 (diagnostic_context::m_tabstop): ...this and make private.
4070 (diagnostic_context::escape_format): Rename to...
4071 (diagnostic_context::m_escape_format): ...this and make private.
4072 (diagnostic_context::edit_context_ptr): Rename to...
4073 (diagnostic_context::m_edit_context_ptr): ...this and make
4075 (diagnostic_context::set_locations_cb): Rename to...
4076 (diagnostic_context::m_set_locations_cb): ...this and make
4078 (diagnostic_context::ice_handler_cb): Rename to...
4079 (diagnostic_context::m_ice_handler_cb): ...this and make private.
4080 (diagnostic_context::includes_seen): Rename to...
4081 (diagnostic_context::m_includes_seen): ...this and make private.
4082 (diagnostic_inhibit_notes): Update for field renaming.
4083 (diagnostic_context_auxiliary_data): Likewise.
4084 (diagnostic_abort_on_error): Convert from macro to inline function
4085 and update for field renaming.
4086 (diagnostic_kind_count): Convert from macro to inline function and
4087 use diagnostic_count accessor.
4088 (diagnostic_report_warnings_p): Update for field renaming.
4089 (diagnostic_initialize): Convert decl to inline function calling
4090 into diagnostic_context.
4091 (diagnostic_color_init): Likewise.
4092 (diagnostic_urls_init): Likewise.
4093 (diagnostic_urls_init): Likewise.
4094 (diagnostic_finish): Likewise.
4095 (diagnostic_report_current_module): Likewise.
4096 (diagnostic_show_any_path): Delete decl.
4097 (diagnostic_initialize_input_context): Convert decl to inline
4098 function calling into diagnostic_context.
4099 (diagnostic_classify_diagnostic): Likewise.
4100 (diagnostic_push_diagnostics): Likewise.
4101 (diagnostic_pop_diagnostics): Likewise.
4102 (diagnostic_report_diagnostic): Likewise.
4103 (diagnostic_action_after_output): Likewise.
4104 (diagnostic_check_max_errors): Likewise.
4105 (diagnostic_file_cache_fini): Delete decl.
4106 (diagnostic_converted_column): Delete decl.
4107 (warning_enabled_at): Convert decl to inline function calling into
4109 (option_unspecified_p): New.
4110 (diagnostic_emit_diagram): Delete decl.
4111 * gcc.cc: Remove include of "diagnostic-text-art.h".
4112 Update for changes to diagnostic_context.
4113 * input.cc (diagnostic_file_cache_init): Move implementation
4115 (diagnostic_context::file_cache_init): ...this new member
4117 (diagnostic_file_cache_fini): Delete.
4118 (diagnostics_file_cache_forcibly_evict_file): Update for
4119 m_file_cache becoming private.
4120 (location_get_source_line): Likewise.
4121 (get_source_file_content): Likewise.
4122 (location_missing_trailing_newline): Likewise.
4123 * input.h (diagnostics_file_cache_fini): Delete.
4124 * langhooks.cc: Update for changes to diagnostic_context.
4125 * lto-wrapper.cc: Likewise.
4126 * opts.cc: Remove include of "diagnostic-text-art.h".
4127 Update for changes to diagnostic_context.
4128 * selftest-diagnostic.cc: Update for changes to
4130 * toplev.cc: Likewise.
4131 * tree-diagnostic-path.cc: Likewise.
4132 * tree-diagnostic.cc: Likewise.
4134 2023-11-03 Martin Uecker <uecker@tugraz.at>
4137 * gimple-ssa-warn-access.cc
4138 (pass_waccess::maybe_check_access_sizes): For VLA bounds
4139 in parameters, only warn about null pointers with 'static'.
4141 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
4143 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
4144 calls to use masked simdclones.
4146 2023-11-03 David Malcolm <dmalcolm@redhat.com>
4148 * diagnostic.cc (diagnostic_initialize): Update for consolidation
4149 of group-based fields.
4150 (diagnostic_report_diagnostic): Likewise.
4151 (diagnostic_context::begin_group): New, based on body of
4152 auto_diagnostic_group's ctor.
4153 (diagnostic_context::end_group): New, based on body of
4154 auto_diagnostic_group's dtor.
4155 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
4157 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
4159 * diagnostic.h (diagnostic_context::begin_group): New decl.
4160 (diagnostic_context::end_group): New decl.
4161 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
4162 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
4164 (diagnostic_context::diagnostic_group_emission_count): Rename
4166 (diagnostic_context::m_diagnostic_groups::m_emission_count):
4169 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
4171 PR tree-optimization/111766
4172 * range-op.cc (operator_equal::fold_range): Check constants
4173 against the bitmask.
4174 (operator_not_equal::fold_range): Ditto.
4175 * value-range.h (irange_bitmask::member_p): New.
4177 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
4179 * value-range.cc (irange_bitmask::adjust_range): New.
4180 (irange::intersect_bitmask): Call adjust_range.
4181 * value-range.h (irange_bitmask::adjust_range): New prototype.
4183 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
4185 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
4187 (ix86_memory_address_reg_class): ... this. Generalize address
4188 register class handling to allow multiple address register classes.
4189 Return maximal class for unrecognized instructions. Improve comments.
4190 (ix86_insn_base_reg_class): Rewrite to handle
4191 multiple address register classes.
4192 (ix86_regno_ok_for_insn_base_p): Ditto.
4193 (ix86_insn_index_reg_class): Ditto.
4194 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
4195 and substitute its values with "0" -> "gpr16", "1" -> "*".
4196 (addr): New attribute to limit allowed address register set.
4198 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
4199 and substitute its values with "0" -> "gpr16", "1" -> "*".
4200 * config/i386/sse.md: Ditto.
4202 2023-11-03 Richard Biener <rguenther@suse.de>
4204 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
4207 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
4209 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
4210 (adddi3): Change define_expand to generate a *adddi3.
4211 (*adddi3): New define_insn_and_split to lower DImode additions
4212 during the split1 pass (after combine and before reload).
4213 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
4214 for DImode left shifts by a single bit.
4215 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
4216 left shifts by one bit to an *adddi3.
4218 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
4220 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
4221 can_create_pseudo_p condition.
4223 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4225 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
4226 * tree-vect-stmts.cc (vectorizable_load): Ditto.
4228 2023-11-03 Richard Biener <rguenther@suse.de>
4230 PR tree-optimization/112366
4231 * tree-vect-loop.cc (vectorizable_live_operation): Remove
4234 2023-11-03 Richard Biener <rguenther@suse.de>
4236 PR tree-optimization/112310
4237 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
4238 of expressions, validate dependences are contained within
4239 the hoistable set before hoisting.
4241 2023-11-03 Pan Li <pan2.li@intel.com>
4243 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
4244 (lround<mode><v_i_l_ll_convert>2): Ditto.
4245 (lceil<mode><v_i_l_ll_convert>2): Ditto.
4246 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
4247 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
4249 (lround<mode><v_f2si_convert>2): Ditto.
4250 (lceil<mode><v_f2si_convert>2): Ditto.
4251 (lfloor<mode><v_f2si_convert>2): Ditto.
4252 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
4254 (lround<mode><v_f2di_convert>2): Ditto.
4255 (lceil<mode><v_f2di_convert>2): Ditto.
4256 (lfloor<mode><v_f2di_convert>2): Ditto.
4257 * config/riscv/vector-iterators.md: Renew iterators for both
4260 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4263 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
4264 (simplify_replace_vlmax_avl): Ditto.
4265 (pass_avlprop::execute): Add immediate AVL simplification.
4266 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
4267 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
4269 (emit_vlmax_insn): Adapt for new interface name.
4270 * config/riscv/vector.md (mode_idx): New attribute.
4272 2023-11-03 Pan Li <pan2.li@intel.com>
4275 2023-11-02 Pan Li <pan2.li@intel.com>
4277 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
4278 (lround<mode><v_i_l_ll_convert>2): Ditto.
4279 (lceil<mode><v_i_l_ll_convert>2): Ditto.
4280 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
4281 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
4283 (lround<mode><v_f2si_convert>2): Ditto.
4284 (lceil<mode><v_f2si_convert>2): Ditto.
4285 (lfloor<mode><v_f2si_convert>2): Ditto.
4286 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
4288 (lround<mode><v_f2di_convert>2): Ditto.
4289 (lceil<mode><v_f2di_convert>2): Ditto.
4290 (lfloor<mode><v_f2di_convert>2): Ditto.
4291 * config/riscv/vector-iterators.md: Renew iterators for both
4294 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
4296 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
4298 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
4300 * config/h8300/combiner.md: Add new patterns for single bit
4303 2023-11-02 Pan Li <pan2.li@intel.com>
4305 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
4306 (lround<mode><v_i_l_ll_convert>2): Ditto.
4307 (lceil<mode><v_i_l_ll_convert>2): Ditto.
4308 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
4309 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
4311 (lround<mode><v_f2si_convert>2): Ditto.
4312 (lceil<mode><v_f2si_convert>2): Ditto.
4313 (lfloor<mode><v_f2si_convert>2): Ditto.
4314 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
4316 (lround<mode><v_f2di_convert>2): Ditto.
4317 (lceil<mode><v_f2di_convert>2): Ditto.
4318 (lfloor<mode><v_f2di_convert>2): Ditto.
4319 * config/riscv/vector-iterators.md: Renew iterators for both
4322 2023-11-02 Sam James <sam@gentoo.org>
4324 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
4325 as this has become the standard term for what we're doing here.
4327 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4329 * config/riscv/riscv-avlprop.cc
4330 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
4331 non-real insn AVL propation.
4333 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
4335 PR middle-end/111401
4336 * internal-fn.cc (internal_fn_else_index): New function.
4337 * internal-fn.h (internal_fn_else_index): Define.
4338 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
4340 (predicate_scalar_phi): Add whitespace.
4341 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
4342 (neutral_op_for_reduction): Return -0 for PLUS.
4343 (check_reduction_path): Don't count else operand in COND_OP.
4344 (vect_is_simple_reduction): Ditto.
4345 (vect_create_epilog_for_reduction): Fix whitespace.
4346 (vectorize_fold_left_reduction): Add COND_OP handling.
4347 (vectorizable_reduction): Don't count else operand in COND_OP.
4348 (vect_transform_reduction): Add COND_OP handling.
4349 * tree-vectorizer.h (neutral_op_for_reduction): Add default
4352 2023-11-02 Richard Biener <rguenther@suse.de>
4354 PR tree-optimization/112320
4355 * gimple-fold.h (rewrite_to_defined_overflow): New overload
4356 for in-place operation.
4357 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
4358 iterator argument to worker, define separate API for
4359 in-place and not in-place operation.
4360 * tree-if-conv.cc (predicate_statements): Simplify.
4361 * tree-scalar-evolution.cc (final_value_replacement_loop):
4363 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
4364 * tree-ssa-reassoc.cc (update_range_test): Likewise.
4366 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
4368 * config/i386/i386.md: Move stack protector patterns
4369 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
4371 2023-11-02 liuhongt <hongtao.liu@intel.com>
4373 * config/i386/mmx.md (cmlav4hf4): New expander.
4374 (cmla_conjv4hf4): Ditto.
4376 (cmul_conjv4hf3): Ditto.
4378 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4380 * config/riscv/vector.md: Fix redundant codes in attributes.
4382 2023-11-02 xuli <xuli1@eswincomputing.com>
4384 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
4385 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
4386 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
4387 * config/riscv/riscv-vector-builtins.cc: Add arg types.
4389 2023-11-02 Pan Li <pan2.li@intel.com>
4391 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
4392 size check for vectype_out doesn't participating for optab query.
4393 (vectorizable_call): Remove the type size check.
4395 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4398 * config/riscv/vector.md: Add '0'.
4400 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
4403 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
4404 as operands[2] with predicate register_operand must be !MEM_P.
4405 (peephole2): Optimize a mulx followed by a register-to-register
4406 move, to place result in the correct destination if possible.
4408 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
4410 * config/riscv/sync.md: Use riscv_subword_address function to
4411 calculate the address and shift in atomic_test_and_set.
4413 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
4415 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
4416 returned for libcall case.
4418 2023-11-01 Martin Uecker <uecker@tugraz.at>
4421 * doc/invoke.texi: Document -Walloc-size option.
4423 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
4425 * genautomata.cc (write_automata): move endif
4427 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
4429 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
4430 create return array and don't return new type.
4431 (simd_clone_adjust_argument_types): Hoist out code that creates
4432 ipa_param_body_adjustments and don't return them.
4433 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
4434 argument types have been vectorized, create adjustments and return array
4436 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
4437 argument types have been vectorized.
4439 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
4442 * config/i386/i386.md (stack_protexct_set_2 peephole2):
4443 Use general_gr_operand as operand 4 predicate.
4445 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
4447 * config/i386/i386.md (stack_protect_set): Explicitly
4448 generate scratch register in word mode.
4449 (@stack_protect_set_1_<mode>): Rename to ...
4450 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
4451 Use SWI48 mode iterator to match scratch register.
4452 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
4453 iterators to match peephole sequence. Use general_operand
4454 predicate for operand 4. Allow different operand 2 and operand 3
4455 registers and use peep2_reg_dead_p to ensure new scratch
4456 register is dead before peephole seqeunce. Use peep2_reg_dead_p
4457 to ensure old scratch register is dead after peephole sequence.
4458 (*stack_protect_set_2_<mode>): Rename to ...
4459 (*stack_protect_set_2_<mode>_si): .. this.
4460 (*stack_protect_set_3): Rename to ...
4461 (*stack_protect_set_2_<mode>_di): ... this.
4462 Use PTR mode iterator to match stack protector memory move.
4463 Use earlyclobber for all alternatives of operand 1.
4464 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
4465 iterators to match peephole sequence. Use general_operand
4466 predicate for operand 4. Allow different operand 2 and operand 3
4467 registers and use peep2_reg_dead_p to ensure new scratch
4468 register is dead before peephole seqeunce. Use peep2_reg_dead_p
4469 to ensure old scratch register is dead after peephole sequence.
4471 2023-11-01 xuli <xuli1@eswincomputing.com>
4473 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
4474 intrinsics for tuple types.
4475 * config/riscv/riscv-vector-builtins.cc: Ditto.
4476 * config/riscv/vector.md (@vundefined<mode>): Ditto.
4478 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4480 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
4482 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4484 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
4486 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4488 * input.cc (dump_location_info): Update for removal of
4489 MACRO_MAP_EXPANSION_POINT_LOCATION.
4490 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
4493 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4495 * opts.cc (get_option_url): Update comment; the requirement to
4496 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
4497 r10-8065-ge33a1eae25b8a8.
4499 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4501 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
4502 m_skipping_null_url.
4503 (pp_begin_url): Handle URL being null.
4504 (pp_end_url): Likewise.
4505 (selftest::test_null_urls): New.
4506 (selftest::pretty_print_cc_tests): Call it.
4507 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
4509 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4511 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
4512 (vect_build_slp_tree_1): Ditto.
4513 (vect_build_slp_tree_2): Ditto.
4515 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
4517 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
4518 * config/bpf/bpf-protos.h: Added prototype for new pass.
4519 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
4520 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
4522 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
4524 (is_attr_preserve_access): Improved check.
4525 (core_field_info): Make use of root_for_core_field_info
4527 (process_field_expr): Adapted to new functions.
4528 (pack_type): Small improvement.
4529 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
4530 (bpf_init_core_builtins): Changed to new function names.
4531 (construct_builtin_core_reloc): Improved implementation.
4532 (bpf_resolve_overloaded_core_builtin): Changed how
4533 __builtin_preserve_access_index is converted.
4534 (compute_field_expr): Corrected implementation. Added
4535 access_node argument.
4536 (bpf_core_get_index): Added valid argument.
4537 (root_for_core_field_info, pack_field_expr)
4538 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
4539 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
4540 (core_access_clean, core_is_access_index, core_mark_as_access_index)
4541 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
4542 (make_pass_lower_bpf_core): Added functions.
4543 (pass_data_lower_bpf_core): New pass struct.
4544 (pass_lower_bpf_core): New gimple_opt_pass class.
4545 (pack_field_expr_for_preserve_field)
4546 (bpf_replace_core_move_operands): Removed function.
4547 (bpf_enum_value_kind): Added GTY(()).
4548 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
4549 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
4550 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
4552 2023-10-31 Neal Frager <neal.frager@amd.com>
4554 * config/microblaze/microblaze.cc: Fix mcpu version check.
4556 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
4558 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
4559 TARGET_ATOMIC constraint
4560 (atomic_store_rvwmo<mode>): Ditto.
4561 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
4562 (atomic_store_ztso<mode>): Ditto.
4563 * config/riscv/sync.md (atomic_load<mode>): Ditto.
4564 (atomic_store<mode>): Ditto.
4566 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
4568 * config/riscv/riscv.cc (riscv_index_reg_class):
4569 Return GR_REGS for XTheadFMemIdx.
4570 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
4571 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
4572 * config/riscv/thead.cc (is_fmemidx_mode): New function.
4573 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
4574 (th_fmemidx_output_index): New function.
4575 (th_output_move): Add support for XTheadFMemIdx.
4576 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
4577 (TH_M_NOEXTF): Likewise.
4578 (*th_fmemidx_movsf_hardfloat): New INSN.
4579 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
4580 (*th_fmemidx_I_a): Likewise.
4581 (*th_fmemidx_I_c): Likewise.
4582 (*th_fmemidx_US_a): Likewise.
4583 (*th_fmemidx_US_c): Likewise.
4584 (*th_fmemidx_UZ_a): Likewise.
4585 (*th_fmemidx_UZ_c): Likewise.
4587 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
4589 * config/riscv/constraints.md (th_m_mia): New constraint.
4590 (th_m_mib): Likewise.
4591 (th_m_mir): Likewise.
4592 (th_m_miu): Likewise.
4593 * config/riscv/riscv-protos.h (enum riscv_address_type):
4594 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
4595 and ADDRESS_REG_WB and their documentation.
4596 (struct riscv_address_info): Add new field 'shift' and
4597 document the field usage for the new address types.
4598 (riscv_valid_base_register_p): New prototype.
4599 (th_memidx_legitimate_modify_p): Likewise.
4600 (th_memidx_legitimate_index_p): Likewise.
4601 (th_classify_address): Likewise.
4602 (th_output_move): Likewise.
4603 (th_print_operand_address): Likewise.
4604 * config/riscv/riscv.cc (riscv_index_reg_class):
4605 Return GR_REGS for XTheadMemIdx.
4606 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
4607 (riscv_classify_address): Call th_classify_address() on top.
4608 (riscv_output_move): Call th_output_move() on top.
4609 (riscv_print_operand_address): Call th_print_operand_address()
4611 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
4612 (HAVE_PRE_MODIFY_DISP): Likewise.
4613 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
4615 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
4616 create INSN with same name and disable it for XTheadMemIdx.
4617 (extendsidi2): Likewise.
4618 (*extendsidi2_internal): Disable for XTheadMemIdx.
4619 * config/riscv/thead.cc (valid_signed_immediate): New helper
4621 (th_memidx_classify_address_modify): New function.
4622 (th_memidx_legitimate_modify_p): Likewise.
4623 (th_memidx_output_modify): Likewise.
4624 (is_memidx_mode): Likewise.
4625 (th_memidx_classify_address_index): Likewise.
4626 (th_memidx_legitimate_index_p): Likewise.
4627 (th_memidx_output_index): Likewise.
4628 (th_classify_address): Likewise.
4629 (th_output_move): Likewise.
4630 (th_print_operand_address): Likewise.
4631 * config/riscv/thead.md (*th_memidx_operand): New splitter.
4632 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
4633 (*th_memidx_extendsidi2): Likewise.
4634 (*th_memidx_zero_extendsidi2): Likewise.
4635 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
4636 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
4637 (*th_memidx_bb_zero_extendsidi2): Likewise.
4638 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
4639 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
4640 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
4641 (TH_M_ANYI): New mode iterator.
4642 (TH_M_NOEXTI): Likewise.
4643 (*th_memidx_I_a): New combiner optimization.
4644 (*th_memidx_I_b): Likewise.
4645 (*th_memidx_I_c): Likewise.
4646 (*th_memidx_US_a): Likewise.
4647 (*th_memidx_US_b): Likewise.
4648 (*th_memidx_US_c): Likewise.
4649 (*th_memidx_UZ_a): Likewise.
4650 (*th_memidx_UZ_b): Likewise.
4651 (*th_memidx_UZ_c): Likewise.
4653 2023-10-31 Carl Love <cel@us.ibm.com>
4655 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
4656 documentation for the builti-ins.
4658 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
4660 PR rtl-optimization/111971
4661 * lra-constraints.cc: (process_alt_operands): Don't check start
4662 hard regs for regs originated from register variables.
4664 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
4666 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
4668 (cond_<ieee_fmaxmin_op><mode>): Ditto.
4669 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
4670 (reduc_fmax_scal_<mode>): Ditto.
4671 (reduc_fmin_scal_<mode>): Ditto.
4672 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
4673 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
4674 (UNSPEC_VFMIN): Ditto.
4675 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
4676 UNSPEC insn patterns.
4677 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
4679 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
4683 * Makefile.in: Handle split insn-emit.cc.
4684 * configure: Regenerate.
4685 * configure.ac: Add --with-insnemit-partitions.
4686 * genemit.cc (output_peephole2_scratches): Print to file instead
4688 (print_code): Ditto.
4689 (gen_rtx_scratch): Ditto.
4691 (gen_emit_seq): Ditto.
4692 (emit_c_code): Ditto.
4694 (gen_expand): Ditto.
4696 (output_add_clobbers): Ditto.
4697 (output_added_clobbers_hard_reg_p): Ditto.
4698 (print_overload_arguments): Ditto.
4699 (print_overload_test): Ditto.
4700 (handle_overloaded_code_for): Ditto.
4701 (handle_overloaded_gen): Ditto.
4702 (print_header): New function.
4703 (handle_arg): New function.
4704 (main): Split output into 10 files.
4705 * gensupport.cc (count_patterns): New function.
4706 * gensupport.h (count_patterns): Define.
4707 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
4708 * read-md.h (class md_reader): Change definition.
4710 2023-10-31 Alexandre Oliva <oliva@adacore.com>
4712 PR tree-optimization/111943
4713 * gimple-harden-control-flow.cc: Adjust copyright year.
4714 (rt_bb_visited): Add vfalse and vtrue data members.
4715 Zero-initialize them in the ctor.
4716 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
4717 abnormal edges, insert initializers for vfalse and vtrue on
4718 entry, and insert the check sequence guarded by a conditional
4721 2023-10-31 Richard Biener <rguenther@suse.de>
4723 PR tree-optimization/112305
4724 * tree-scalar-evolution.h (expression_expensive): Adjust.
4725 * tree-scalar-evolution.cc (expression_expensive): Record
4726 when we see a COND_EXPR.
4727 (final_value_replacement_loop): When the replacement contains
4728 a COND_EXPR, rewrite it to defined overflow.
4729 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
4731 2023-10-31 Xi Ruoyao <xry111@xry111.site>
4734 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
4737 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
4739 * gimple-match.h (gimple_match_op::gimple_match_op):
4740 Add interfaces for more arguments.
4741 (gimple_match_op::set_op): Add interfaces for more arguments.
4742 * match.pd: Add support of combining cond_len_op + vec_cond
4744 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
4746 * config/i386/avx512cdintrin.h (target): Push evex512 for
4748 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
4750 * config/i386/i386-builtin.def (BDESC): Do not check evex512
4751 for builtins not needed.
4753 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
4755 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
4756 Change to define_expand.
4758 2023-10-31 liuhongt <hongtao.liu@intel.com>
4761 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
4762 define_split to define_insn_and_split to handle
4763 immediate_operand for comparison.
4764 (*mmx_pblendvb_v8qi_2): Ditto.
4765 (*mmx_pblendvb_<mode>_1): Ditto.
4766 (*mmx_pblendvb_v4qi_2): Ditto.
4767 (<code><mode>3): Remove define_split after it.
4768 (<code>v8qi3): Ditto.
4769 (<code><mode>3): Ditto.
4770 (<ode>v2hi3): Ditto.
4772 2023-10-31 Andrew Pinski <pinskia@gmail.com>
4774 * match.pd (`a == 1 ? b : a OP b`): New pattern.
4775 (`a == -1 ? b : a & b`): New pattern.
4777 2023-10-31 Andrew Pinski <pinskia@gmail.com>
4779 * match.pd: (`a == 0 ? b : b + a`,
4780 `a == 0 ? b : b - a`): New patterns.
4782 2023-10-31 Neal Frager <neal.frager@amd.com>
4784 * config/microblaze/microblaze.cc: Fix mcpu version check.
4786 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
4788 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
4789 * common/config/i386/i386-common.cc: Add yongfeng.
4790 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
4791 Add ZHAOXIN_FAM7H_YONGFENG.
4792 * config.gcc: Add yongfeng.
4793 * config/i386/driver-i386.cc (host_detect_local_cpu):
4794 Let -march=native recognize yongfeng processors.
4795 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
4796 * config/i386/i386-options.cc (m_YONGFENG): New definition.
4798 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
4799 * config/i386/i386.md: Add yongfeng.
4800 * config/i386/lujiazui.md: Fix typo.
4801 * config/i386/x86-tune-costs.h (struct processor_costs):
4803 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
4804 (ix86_adjust_cost): Ditto.
4805 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
4806 m_LUJIAZUI with m_ZHAOXIN.
4807 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
4808 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
4809 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
4810 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
4811 (X86_TUNE_MOVX): Ditto.
4812 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
4813 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
4814 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
4815 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
4816 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
4817 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
4818 (X86_TUNE_USE_LEAVE): Ditto.
4819 (X86_TUNE_PUSH_MEMORY): Ditto.
4820 (X86_TUNE_LCP_STALL): Ditto.
4821 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
4822 (X86_TUNE_OPT_AGU): Ditto.
4823 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
4824 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
4825 (X86_TUNE_USE_SAHF): Ditto.
4826 (X86_TUNE_USE_BT): Ditto.
4827 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
4828 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
4829 (X86_TUNE_AVOID_MFENCE): Ditto.
4830 (X86_TUNE_EXPAND_ABS): Ditto.
4831 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
4832 (X86_TUNE_USE_FFREEP): Ditto.
4833 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
4834 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
4835 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
4836 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
4837 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
4838 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
4839 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
4840 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
4841 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
4842 * doc/extend.texi: Add details about yongfeng.
4843 * doc/invoke.texi: Ditto.
4844 * config/i386/yongfeng.md: New file to describe yongfeng processor.
4846 2023-10-30 Martin Jambor <mjambor@suse.cz>
4849 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
4850 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
4851 (update_signature): Mark any any IPA-CP aggregate constants at
4852 positions known to be killed as killed. Move check that there is
4853 clone_info after this pruning.
4854 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
4855 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
4856 (push_agg_values_from_plats): Likewise.
4857 (ipa_push_agg_values_from_jfunc): Likewise.
4858 (estimate_local_effects): Likewise.
4859 (push_agg_values_for_index_from_edge): Likewise.
4860 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
4862 (read_ipcp_transformation_info): Likewise.
4863 (ipcp_get_aggregate_const): Update comment, assert that encountered
4864 record does not have killed flag set.
4865 (ipcp_transform_function): Prune all aggregate constants with killed
4868 2023-10-30 Martin Jambor <mjambor@suse.cz>
4871 * ipa-prop.h (ipcp_transformation): New member function template
4873 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
4874 filter aggreagate constants.
4876 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
4878 PR middle-end/101955
4879 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
4880 to convert sign extract of the least significant bit into an
4881 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
4883 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
4885 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
4886 Provide reasonable values for SHIFTS and ROTATES by constant
4887 bit counts depending upon TARGET_BARREL_SHIFTER.
4888 (arc_insn_cost): Use insn attributes if the instruction is
4889 recognized. Avoid calling get_attr_length for type "multi",
4890 i.e. define_insn_and_split patterns without explicit type.
4891 Fall-back to set_rtx_cost for single_set and pattern_cost
4893 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
4894 (BRANCH_COST): Improve/correct definition.
4895 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
4897 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
4899 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
4900 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
4901 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
4902 (arc_split_rotl): Use swap on TARGET_SWAP.
4903 (arc_split_rotr): Likewise.
4904 * config/arc/arc.md (ANY_ROTATE): New code iterator.
4905 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
4906 swap instruction on TARGET_SWAP.
4907 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
4908 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
4909 (*ashlsi2_cnt16): See above.
4911 2023-10-30 Richard Ball <richard.ball@arm.com>
4913 * config/arm/aout.h: Change to use the Lrtx label.
4914 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
4915 from (!target_pure_code) condition.
4916 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
4917 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
4918 .Lrtx label and remove adr instructions.
4920 (arm_casesi_internal): Use force_reg to generate ldr instructions that
4921 would otherwise be out of range, and change rtl to accommodate force reg.
4922 Additionally remove unnecessary register temp.
4923 (casesi): Remove pure code check for Arm.
4924 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
4925 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
4927 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
4930 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
4931 xor to an equality and fix comment indentation.
4933 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4935 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
4936 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
4937 * config/riscv/vector.md: Ditto.
4939 2023-10-30 liuhongt <hongtao.liu@intel.com>
4942 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
4943 512-bit vector with vpcmpeq + kortest.
4944 * config/i386/i386.md (cbranchxi4): New expander.
4945 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
4948 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
4951 * expr.cc (qi_vector_mode_supported_p): Rename to...
4952 (by_pieces_mode_supported_p): ...this, and extends it to do
4953 the checking for both scalar and vector mode.
4954 (widest_fixed_size_mode_for_size): Call
4955 by_pieces_mode_supported_p to examine the mode.
4956 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
4958 2023-10-29 Martin Uecker <uecker@tugraz.at>
4960 PR tree-optimization/109334
4961 * tree-object-size.cc (parm_object_size): Allow size
4962 computation for implicit access attributes.
4964 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
4966 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
4967 260000 (which corresponds to RF-2014.0) to 270000 (which
4968 corresponds to RG-2015.0, the release where salt/saltu opcodes
4971 2023-10-29 Pan Li <pan2.li@intel.com>
4973 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
4974 reference type to prevent copying.
4976 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
4978 PR rtl-optimization/112107
4979 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
4982 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
4985 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
4988 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
4990 * config/gcn/gcn-valu.md
4991 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
4992 condition to silence the warnings.
4993 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
4994 * config/gcn/gcn.md (*movti_insn): Likewise.
4996 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
4998 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
5001 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
5003 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
5004 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
5006 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
5008 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
5009 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
5011 (expand_rawmemchr): Define.
5012 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
5014 (expand_block_move): Move from here...
5015 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
5016 (expand_rawmemchr): Add vectorized expander.
5017 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
5019 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
5021 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
5022 Process reg equivalence invariants.
5024 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
5026 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
5027 i386: Fiy typo in "partial_memory_read_stall" tune option.
5029 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
5031 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
5032 support for CONST_STRING.
5034 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
5037 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
5038 2 take "regiser_operand" and "nonimmediate_operand" respectively.
5039 (<u>mulqihi3): Likewise.
5040 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
5041 matching the %d constraint. Use umul_highpart RTX to represent
5042 the highpart multiplication.
5043 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
5044 predicate, and "a" rather than "0" as operands 0 and 2 have
5046 (define_split): For mul to mulx conversion, use the new
5047 umul_highpart RTX representation.
5048 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
5049 and the constraint %a as operands 0 and 1 have different modes.
5050 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
5052 (define_peephole2): Providing widening multiplication variants
5053 of the peephole2s that tweak highpart multiplication register
5056 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
5058 PR preprocessor/87299
5059 * toplev.cc (no_backend): New static global.
5060 (finalize): Remove argument no_backend, which is now a
5062 (process_options): Likewise.
5063 (do_compile): Likewise.
5064 (target_reinit): Don't do anything in preprocess-only mode.
5065 (toplev::main): Adapt to no_backend change.
5066 (toplev::finalize): Likewise.
5068 2023-10-27 Andrew Pinski <apinski@marvell.com>
5070 PR tree-optimization/101590
5071 PR tree-optimization/94884
5072 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
5074 2023-10-27 liuhongt <hongtao.liu@intel.com>
5077 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
5078 V2HF/V2BF/V4HF/V4BFmode.
5079 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
5080 data_mode is V4HF/V2HFmode.
5081 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
5082 (vcond_mask_<mode>v4hi): Ditto.
5083 (vcond_mask_<mode>qi): Ditto.
5084 (vec_cmpv2hfqi): Ditto.
5085 (vcond_mask_<mode>v2hi): Ditto.
5086 (mmx_plendvb_<mode>): Add 2 combine splitters after the
5088 (mmx_pblendvb_v8qi): Ditto.
5089 (<code>v2hi3): Add a combine splitter after the pattern.
5090 (<code><mode>3): Ditto.
5091 (<code>v8qi3): Ditto.
5092 (<code><mode>3): Ditto.
5093 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
5094 (vcond<sseintvecmodelower><mode>): .. this into ..
5095 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
5096 and extend to V8BF/V16BF/V32BFmode.
5098 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5100 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
5101 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
5102 (autovectorize_vector_modes): Ditto.
5103 (can_find_related_mode_p): Ditto.
5105 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5109 * config.gcc: Add AVL propagation pass.
5110 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
5111 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
5112 * config/riscv/t-riscv: Ditto.
5113 * config/riscv/riscv-avlprop.cc: New file.
5115 2023-10-26 David Malcolm <dmalcolm@redhat.com>
5117 * doc/extend.texi (Common Function Attributes): Add
5118 null_terminated_string_arg.
5120 2023-10-26 Andrew Pinski <pinskia@gmail.com>
5122 PR tree-optimization/111957
5123 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
5125 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
5127 * range-op-float.cc (range_operator::fold_range): Delete unused
5130 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
5132 * range-op-float.cc (range_operator::fold_range): Remove
5134 (range_operator::rv_fold): Remove unneeded arguments.
5135 (operator_plus::rv_fold): Same.
5136 (operator_minus::rv_fold): Same.
5137 (operator_mult::rv_fold): Same.
5138 (operator_div::rv_fold): Same.
5139 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
5143 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
5145 * range-op-float.cc (range_operator::fold_range): Pass frange
5146 argument to rv_fold.
5147 (range_operator::rv_fold): Add frange argument.
5148 (operator_plus::rv_fold): Same.
5149 (operator_minus::rv_fold): Same.
5150 (operator_mult::rv_fold): Same.
5151 (operator_div::rv_fold): Same.
5152 * range-op-mixed.h: Add frange argument to rv_fold methods.
5155 2023-10-26 Richard Ball <richard.ball@arm.com>
5157 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
5158 for different machine modes for arm.
5159 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
5160 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
5161 ASM_OUTPUT_ADDR_DIFF_ELT.
5162 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
5164 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
5166 * config/arm/arm.cc (arm_output_casesi): New function.
5167 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
5169 for arm to use new function arm_output_casesi.
5171 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
5174 (darwin_label_is_anonymous_local_objc_name): Make metadata names
5175 linker-visibile for GNU objective C.
5177 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
5179 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
5181 * ira-costs.cc: Include regset.h.
5182 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
5184 (find_costs_and_classes): Call calculate_equiv_gains and redefine
5185 mem_cost of pseudos with equivs when LRA is used.
5186 * var-tracking.cc: Include ira.h and lra.h.
5187 (vt_initialize): Use lra_eliminate_regs when LRA is used.
5189 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5191 * doc/md.texi: Adapt COND_LEN pseudo code.
5193 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
5194 Richard Biener <rguenther@suse.de>
5196 PR rtl-optimization/91865
5197 * combine.cc (make_compound_operation): Avoid creating a
5198 ZERO_EXTEND of a ZERO_EXTEND.
5200 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
5202 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
5203 (vcond_mask_<mode><mode256_i>): this.
5204 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
5205 (vcond_mask_<mode><mode_i>): this.
5207 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
5209 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
5210 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
5212 * ipa-visibility.cc (function_and_variable_visibility): Change
5213 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
5214 * varasm.cc (output_constant_pool_contents)
5215 [#ifdef ASM_OUTPUT_DEF]:
5216 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
5217 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
5218 'if (!TARGET_SUPPORTS_ALIASES)',
5219 'gcc_checking_assert (seen_error ());'.
5220 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
5221 'if (!TARGET_SUPPORTS_ALIASES)'.
5222 (default_asm_output_anchor):
5223 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
5225 2023-10-26 Alexandre Oliva <oliva@adacore.com>
5227 PR tree-optimization/111520
5228 * gimple-harden-conditionals.cc
5229 (pass_harden_compares::execute): Set EH edge probability and
5230 EH block execution count.
5232 2023-10-26 Alexandre Oliva <oliva@adacore.com>
5234 * tree-eh.h (make_eh_edges): Rename to...
5235 (make_eh_edge): ... this.
5236 * tree-eh.cc: Likewise. Adjust all callers...
5237 * gimple-harden-conditionals.cc: ... here, ...
5238 * gimple-harden-control-flow.cc: ... here, ...
5239 * tree-cfg.cc: ... here, ...
5240 * tree-inline.cc: ... and here.
5242 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
5244 * config/darwin.cc (darwin_override_options): Handle fPIE.
5246 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
5248 * config.gcc: Use -E to to sed to indicate that we are using
5251 2023-10-25 Jason Merrill <jason@redhat.com>
5253 * tree-core.h (struct tree_base): Update address_space comment.
5255 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
5257 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
5258 Add support for immediates using MOV/EOR bitmask.
5260 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
5263 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
5265 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
5266 * config/i386/i386.md: New peephole pattern to narrow test
5267 instructions with immediate operands that test memory locations
5270 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
5272 * value-range.cc (irange::union_append): New.
5273 (irange::union_): Call union_append when appropriate.
5274 * value-range.h (irange::union_append): New prototype.
5276 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
5278 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
5279 (__lasx_xvfrintrne_s): Ditto.
5280 (__lasx_xvfrintrne_d): Ditto.
5281 (__lasx_xvfrintrz_s): Ditto.
5282 (__lasx_xvfrintrz_d): Ditto.
5283 (__lasx_xvfrintrp_s): Ditto.
5284 (__lasx_xvfrintrp_d): Ditto.
5285 (__lasx_xvfrintrm_s): Ditto.
5286 (__lasx_xvfrintrm_d): Ditto.
5287 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
5288 (__lsx_vfrintrne_s): Ditto.
5289 (__lsx_vfrintrne_d): Ditto.
5290 (__lsx_vfrintrz_s): Ditto.
5291 (__lsx_vfrintrz_d): Ditto.
5292 (__lsx_vfrintrp_s): Ditto.
5293 (__lsx_vfrintrp_d): Ditto.
5294 (__lsx_vfrintrm_s): Ditto.
5295 (__lsx_vfrintrm_d): Ditto.
5297 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
5299 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
5300 instruction template corresponding to the __builtin_thread_pointer
5302 * doc/extend.texi:Add the __builtin_thread_pointer function support
5303 description to the documentation.
5305 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5307 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
5308 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
5309 (single_set_info): New functions.
5310 (remove_uses_of_def, accesses_reference_same_resource): Declare.
5311 (insn_clobbers_resources): Likewise.
5312 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
5313 (rtl_ssa::accesses_reference_same_resource): Likewise.
5314 (rtl_ssa::insn_clobbers_resources): Likewise.
5315 * rtl-ssa/movement.h (can_move_insn_p): Declare.
5316 * rtl-ssa/movement.cc: New file.
5318 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5320 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
5321 New member function.
5322 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
5324 (function_info::make_use_available): Avoid false negatives for
5325 queries within an EBB.
5327 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5329 * rtl-ssa/changes.cc: Include sreal.h.
5330 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
5331 scale the cost of each instruction by its execution frequency.
5333 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5335 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
5336 (is_single_dominating_def, remains_available_on_exit): Replace with...
5337 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
5338 (function_info::remains_available_on_exit): ...these new member
5340 (function_info::m_clobbered_by_calls): New member variable.
5341 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
5342 initialize m_clobbered_by_calls.
5343 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
5344 m_clobbered_by_calls for each call-clobber note.
5345 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
5346 New function. Check for call clobbers.
5347 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
5350 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5352 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
5354 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
5355 (bb_walker::bb_walker): Use it, moving the computation of the
5357 (function_info::process_all_blocks): ...here.
5358 (function_info::place_phis): Add dominance frontiers for the
5361 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5363 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
5364 New member function.
5365 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
5367 (function_info::change_insns): Use it.
5369 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5371 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
5372 If a change describes a set of memory, ensure that that set
5373 is kept, regardless of the insn pattern.
5375 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5377 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
5378 call to add_reg_unused_notes and instead...
5379 (function_info::change_insns): ...use a separate loop here.
5381 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5383 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
5384 global registers to be live on exit. Handle any block with zero
5385 successors like an exit block.
5387 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
5389 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
5390 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
5391 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
5392 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
5394 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
5396 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
5398 * tree-pretty-print.cc (dump_omp_clause): Adjust.
5399 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
5402 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5404 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
5405 (tail_agnostic_p): Ditto.
5406 (validate_change_or_fail): Ditto.
5407 (nonvlmax_avl_type_p): Ditto.
5408 (vlmax_avl_p): Ditto.
5410 (enum vlmul_type): Ditto.
5411 (count_regno_occurrences): Ditto.
5412 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
5413 (get_default_ta): Ditto.
5414 (tail_agnostic_p): Ditto.
5415 (validate_change_or_fail): Ditto.
5416 (nonvlmax_avl_type_p): Ditto.
5417 (vlmax_avl_p): Ditto.
5419 (enum vlmul_type): Ditto.
5421 (count_regno_occurrences): Ditto.
5422 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
5426 (get_default_ta): Ditto.
5427 (tail_agnostic_p): Ditto.
5428 (count_regno_occurrences): Ditto.
5429 (validate_change_or_fail): Ditto.
5431 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
5433 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
5434 (gimplify_adjust_omp_clauses): Likewise.
5435 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
5436 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
5437 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
5438 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
5440 (convert_local_omp_clauses): Likewise.
5441 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
5442 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
5443 (omp_clause_code_name): Likewise.
5444 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
5446 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5448 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
5449 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
5450 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
5451 * config/riscv/vector.md: Change avl_type into avl_type_idx.
5453 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5455 * recog.cc (constrain_operands): Remove UNARY_P handling.
5456 * reload.cc (find_reloads): Likewise.
5458 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
5460 * gcov-io.h: Fix record length encoding in comment.
5462 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
5464 * config/i386/i386-features.cc (compute_convert_gain): Provide
5465 more accurate values (sizes) for inter-unit moves with -Os.
5467 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
5468 Claudiu Zissulescu <claziss@gmail.com>
5470 * config/arc/arc-protos.h (output_shift): Rename to...
5471 (output_shift_loop): Tweak API to take an explicit rtx_code.
5472 (arc_split_ashl): Prototype new function here.
5473 (arc_split_ashr): Likewise.
5474 (arc_split_lshr): Likewise.
5475 (arc_split_rotl): Likewise.
5476 (arc_split_rotr): Likewise.
5477 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
5478 (output_shift_loop): New function replacing output_shift to output
5479 a zero overheap loop for SImode shifts and rotates on ARC targets
5480 without barrel shifter (i.e. no hardware support for these insns).
5481 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
5482 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
5483 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
5484 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
5485 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
5486 (arc_print_operand): Correct whitespace.
5487 (arc_rtx_costs): Likewise.
5488 (hwloop_optimize): Likewise.
5489 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
5490 (define_code_attr insn): New code attribute to map to pattern name.
5491 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
5492 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
5493 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
5494 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
5495 We now call arc_split_<insn> in arc.cc to implement each split.
5496 (shift_si3): Delete define_insn, all shifts/rotates are now split.
5497 (shift_si3_loop): Rename to...
5498 (<insn>si3_loop): define_insn to handle loop implementations of
5499 SImode shifts and rotates, calling ouput_shift_loop for template.
5500 (rotrsi3): Rename to...
5501 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
5502 (*rotlsi3): New define_insn_and_split to transform left rotates
5503 into right rotates before reload.
5504 (rotlsi3_cnt1): New define_insn_and_split to implement a left
5505 rotate by one bit using an add.f followed by an adc.
5506 * config/arc/predicates.md (shiftr4_operator): Delete.
5508 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
5510 * config/arc/arc.md (mulsi3_700): Update pattern.
5511 (mulsi3_v2): Likewise.
5512 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
5514 2023-10-24 Andrew Pinski <pinskia@gmail.com>
5516 PR tree-optimization/104376
5517 PR tree-optimization/101541
5518 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
5519 Allow nop conversions even if it is defined by a statement
5520 inside the conditional.
5522 2023-10-24 Andrew Pinski <pinskia@gmail.com>
5524 PR tree-optimization/111913
5525 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
5528 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5530 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
5531 whether the requested phi already exists.
5533 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5535 * rtl-ssa.h: Include cfgbuild.h.
5536 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
5537 more comprehensive control_flow_insn_p.
5539 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5541 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
5542 whether an insn has been replaced by a note.
5544 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5546 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
5549 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5551 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
5552 destination to be wider than the sources. Take the mode from the
5554 (ix86_expand_sse_extend): Pass the destination directly to
5555 ix86_split_mmx_punpck, rather than using a fresh register that
5558 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5560 * config/i386/predicates.md (aeswidekl_operation): Protect
5561 REGNO check with REG_P.
5563 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5565 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
5566 (TARGET_INSN_COST): Define.
5568 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5570 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
5573 2023-10-24 xuli <xuli1@eswincomputing.com>
5576 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
5578 2023-10-24 Mark Harmstone <mark@harmstone.com>
5580 * opts.cc (debug_type_names): Remove stabs and xcoff.
5581 (df_set_names): Adjust.
5583 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5586 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
5588 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
5590 PR preprocessor/36887
5591 * toplev.h (ident_hash_extra): Declare...
5592 * stringpool.cc (ident_hash_extra): ...this new global variable.
5593 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
5594 (ggc_mark_stringpool): Likewise.
5595 (ggc_purge_stringpool): Likewise.
5596 (struct string_pool_data_extra): New struct.
5597 (spd2): New GC root variable.
5598 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
5599 analogous to how spd is used to handle ident_hash.
5600 (gt_pch_restore_stringpool): Likewise.
5602 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
5604 PR tree-optimization/111794
5605 * tree-vect-stmts.cc (vectorizable_assignment): Add
5606 same-precision exception for dest and source.
5608 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
5610 * config/riscv/autovec.md (popcount<mode>2): New expander.
5611 * config/riscv/riscv-protos.h (expand_popcount): Define.
5612 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
5613 with the WWG algorithm.
5615 2023-10-23 Richard Biener <rguenther@suse.de>
5617 PR tree-optimization/111916
5618 * tree-sra.cc (sra_modify_assign): Do not lower all
5619 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
5621 2023-10-23 Richard Biener <rguenther@suse.de>
5623 PR tree-optimization/111915
5624 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
5625 accesses are either grouped or not.
5627 2023-10-23 Richard Biener <rguenther@suse.de>
5630 * tree-inline.cc (setup_one_parameter): Move code emitting
5631 a dummy load when not optimizing ...
5632 (initialize_inlined_parameters): ... here to after when
5633 we remapped the parameter type.
5635 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
5638 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
5639 Skip over nop move insns.
5641 2023-10-23 Tamar Christina <tamar.christina@arm.com>
5643 PR tree-optimization/111860
5644 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
5645 Drop .MEM nodes only.
5647 2023-10-23 Andrew Pinski <apinski@marvell.com>
5649 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
5652 2023-10-23 Andrew Pinski <pinskia@gmail.com>
5654 * convert.cc (convert_to_pointer_1): Return error_mark_node
5656 (convert_to_real_1): Likewise.
5657 (convert_to_integer_1): Likewise.
5658 (convert_to_complex_1): Likewise.
5660 2023-10-23 Andrew Pinski <pinskia@gmail.com>
5663 * convert.cc (convert_to_complex_1): Return
5664 error_mark_node if either convert was an error
5665 when converting from a scalar.
5667 2023-10-23 Richard Biener <rguenther@suse.de>
5669 PR tree-optimization/111917
5670 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
5671 new conditional after last stmt.
5673 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5676 * config/riscv/riscv-vsetvl.cc: Fix bug.
5678 2023-10-23 Pan Li <pan2.li@intel.com>
5680 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
5682 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
5684 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5686 * doc/invoke.texi (-mexplicit-relocs=style): Document.
5687 (-mexplicit-relocs): Document as an alias of
5688 -mexplicit-relocs=always.
5689 (-mno-explicit-relocs): Document as an alias of
5690 -mexplicit-relocs=none.
5691 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
5694 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5696 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
5698 * config/loongarch/loongarch.md (define_peephole2): Optimize
5699 la.local + ld/st to pcalau12i + ld/st if the address is only used
5700 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
5702 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5704 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
5705 Return true for TLS symbol types if -mexplicit-relocs=auto.
5706 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
5707 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
5708 (loongarch_legitimize_tls_address): Likewise.
5709 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
5710 TARGET_EXPLICIT_RELOCS from insn condition.
5712 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5714 * config/loongarch/loongarch-protos.h
5715 (loongarch_explicit_relocs_p): Declare new function.
5716 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
5718 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
5719 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
5720 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
5721 deciding if return early, instead of using
5722 TARGET_EXPLICIT_RELOCS.
5723 (loongarch_output_move): CAll loongarch_explicit_relocs_p
5724 instead of using TARGET_EXPLICIT_RELOCS.
5725 * config/loongarch/loongarch.md (*low<mode>): Remove
5726 TARGET_EXPLICIT_RELOCS from insn condition.
5727 (@ld_from_got<mode>): Likewise.
5728 * config/loongarch/predicates.md (move_operand): Call
5729 loongarch_explicit_relocs_p instead of using
5730 TARGET_EXPLICIT_RELOCS.
5732 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5734 * config/loongarch/genopts/loongarch-strings: Add strings for
5735 -mexplicit-relocs={auto,none,always}.
5736 * config/loongarch/genopts/loongarch.opt.in: Add options for
5737 -mexplicit-relocs={auto,none,always}.
5738 * config/loongarch/loongarch-str.h: Regenerate.
5739 * config/loongarch/loongarch.opt: Regenerate.
5740 * config/loongarch/loongarch-def.h
5741 (EXPLICIT_RELOCS_AUTO): Define.
5742 (EXPLICIT_RELOCS_NONE): Define.
5743 (EXPLICIT_RELOCS_ALWAYS): Define.
5744 (N_EXPLICIT_RELOCS_TYPES): Define.
5745 * config/loongarch/loongarch.cc
5746 (loongarch_option_override_internal): Error out if the old-style
5747 -m[no-]explicit-relocs option is used with
5748 -mexplicit-relocs={auto,none,always} together. Map
5749 -mno-explicit-relocs to -mexplicit-relocs=none and
5750 -mexplicit-relocs to -mexplicit-relocs=always for backward
5751 compatibility. Set a proper default for -mexplicit-relocs=
5752 based on configure-time probed linker capability. Update a
5753 diagnostic message to mention -mexplicit-relocs=always instead
5754 of the old-style -mexplicit-relocs.
5755 (loongarch_handle_model_attribute): Update a diagnostic message
5756 to mention -mexplicit-relocs=always instead of the old-style
5758 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
5760 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5762 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
5763 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
5765 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5767 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
5769 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
5771 PR tree-optimization/111784
5772 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
5773 adjacent vector stores, by costing them with the total number
5774 rather than costing them one by one.
5775 (vectorizable_load): Adjust costing way for adjacent vector
5776 loads, by costing them with the total number rather than costing
5779 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
5782 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
5783 Do not split to xmm16+ when !TARGET_AVX512VL.
5785 2023-10-23 Pan Li <pan2.li@intel.com>
5787 * config/riscv/riscv-protos.h (enum insn_type): Add new type
5789 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
5791 (expand_vec_ceil): Take MA instead of MU for tmp register.
5792 (expand_vec_floor): Ditto.
5793 (expand_vec_nearbyint): Ditto.
5794 (expand_vec_rint): Ditto.
5795 (expand_vec_round): Ditto.
5796 (expand_vec_roundeven): Ditto.
5798 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
5800 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
5802 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
5805 * expr.cc (can_use_qi_vectors): New function to return true if
5806 we know how to implement OP using vectors of bytes.
5807 (qi_vector_mode_supported_p): New function to check if optabs
5808 exists for the mode and certain by pieces operations.
5809 (widest_fixed_size_mode_for_size): Replace the second argument
5810 with the type of by pieces operations. Call can_use_qi_vectors
5811 and qi_vector_mode_supported_p to do the check. Call
5812 scalar_mode_supported_p to check if the scalar mode is supported.
5813 (by_pieces_ninsns): Pass the type of by pieces operation to
5814 widest_fixed_size_mode_for_size.
5815 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
5816 record the type of by pieces operations.
5817 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
5818 type of by pieces operations, initialize m_op with it. Pass
5819 m_op to function widest_fixed_size_mode_for_size.
5820 (op_by_pieces_d::get_usable_mode): Pass m_op to function
5821 widest_fixed_size_mode_for_size.
5822 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
5823 can_use_qi_vectors and qi_vector_mode_supported_p to do the
5825 (op_by_pieces_d::run): Pass m_op to function
5826 widest_fixed_size_mode_for_size.
5827 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
5828 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
5829 (can_store_by_pieces): Pass the type of by pieces operations to
5830 widest_fixed_size_mode_for_size.
5831 (clear_by_pieces): Initialize class store_by_pieces_d with
5833 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
5836 2023-10-23 liuhongt <hongtao.liu@intel.com>
5838 PR tree-optimization/111820
5839 PR tree-optimization/111833
5840 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
5841 up vectorization for nonlinear iv vect_step_op_mul when
5842 step_expr is not exact_log2 and niters is greater than
5843 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
5844 for nagative niters_skip which will be used by fully masked
5846 (vect_can_advance_ivs_p): Pass whole phi_info to
5847 vect_can_peel_nonlinear_iv_p.
5848 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
5849 init_expr * pow (step_expr, skipn) to init_expr
5850 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
5852 2023-10-23 liuhongt <hongtao.liu@intel.com>
5854 * config/i386/mmx.md (mmx_pinsrw): Remove.
5856 2023-10-22 Andrew Pinski <pinskia@gmail.com>
5859 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
5860 (*cmov_uxtw_insn_insv): Likewise.
5862 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5864 * doc/invoke.texi: Document the new -nodefaultrpaths option.
5865 * doc/install.texi: Document the new --with-darwin-extra-rpath
5868 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5870 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
5872 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5874 * configure.ac: Add --with-darwin-extra-rpath option.
5875 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
5876 * config.in: Regenerate.
5877 * configure: Regenerate.
5879 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5881 * aclocal.m4: Regenerate.
5882 * configure: Regenerate.
5883 * configure.ac: Handle Darwin rpaths.
5884 * config/darwin.h: Handle Darwin rpaths.
5885 * config/darwin.opt: Handle Darwin rpaths.
5886 * Makefile.in: Handle Darwin rpaths.
5888 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5890 * gcc.cc (RUNPATH_OPTION): New.
5891 (do_spec_1): Provide '%P' as a spec to insert rpaths for
5892 each compiler startfile path.
5894 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
5895 Maxim Blinov <maxim.blinov@embecosm.com>
5896 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5897 Iain Sandoe <iain@sandoe.co.uk>
5899 * config.gcc: Default to heap trampolines on macOS 11 and above.
5900 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
5901 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
5902 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
5904 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
5905 Maxim Blinov <maxim.blinov@embecosm.com>
5906 Iain Sandoe <iain@sandoe.co.uk>
5907 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5909 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
5910 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
5911 * common.opt (ftrampoline-impl): Add option to control
5912 generation of trampoline instantiation (heap or stack).
5913 * coretypes.h: Define enum trampoline_impl.
5914 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
5915 __builtin_adjust_trampoline for heap trampolines.
5916 (finalize_nesting_tree_1): Emit calls to
5917 __builtin_nested_...{created,deleted} if we're generating with
5918 -ftrampoline-impl=heap.
5919 * tree.cc (build_common_builtin_nodes): Build
5920 __builtin_nested_...{created,deleted}.
5921 * doc/invoke.texi (-ftrampoline-impl): Document.
5923 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
5925 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
5926 Prohibit 'E' and 'H' combinations.
5928 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
5930 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
5931 Change version number of the 'Zfa' extension to 1.0.
5933 2023-10-21 Pan Li <pan2.li@intel.com>
5936 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
5937 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
5938 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
5939 macro reference to func.
5940 (vls_mode_valid_p): New func impl for vls mode valid or not.
5941 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
5942 macro reference to func.
5943 * config/riscv/vector-iterators.md: Ditto.
5945 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
5946 Uros Bizjak <ubizjak@gmail.com>
5948 PR middle-end/101955
5949 PR tree-optimization/106245
5950 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
5952 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
5954 * gimple-harden-control-flow.cc: Include memmodel.h.
5956 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
5958 * gimple-harden-control-flow.cc: Include tm_p.h.
5960 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
5962 PR tree-optimization/111882
5963 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
5964 with non-constant offsets.
5966 2023-10-20 Tamar Christina <tamar.christina@arm.com>
5968 PR tree-optimization/111866
5969 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
5970 vect_set_loop_condition during prolog peeling.
5972 2023-10-20 Richard Biener <rguenther@suse.de>
5974 PR tree-optimization/111445
5975 * tree-scalar-evolution.cc (simple_iv_with_niters):
5976 Add missing check for a sign-conversion.
5978 2023-10-20 Richard Biener <rguenther@suse.de>
5980 PR tree-optimization/110243
5981 PR tree-optimization/111336
5982 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
5983 operations with undefined behavior on overflow to
5984 unsigned arithmetic.
5986 2023-10-20 Richard Biener <rguenther@suse.de>
5988 PR tree-optimization/111891
5989 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
5992 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
5994 * config.gcc: Allow --with-arch=gfx1030.
5995 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
5996 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
5997 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
5998 (TARGET_GFX1030): New.
5999 (TARGET_RDNA2): New.
6000 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
6001 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
6002 (subc<mode>3<exec_vcc>): Likewise.
6003 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
6004 (vec_cmp<mode>di): Likewise.
6005 (vec_cmp<u><mode>di): Likewise.
6006 (vec_cmp<mode>di_exec): Likewise.
6007 (vec_cmp<u><mode>di_exec): Likewise.
6008 (vec_cmp<mode>di_dup): Likewise.
6009 (vec_cmp<mode>di_dup_exec): Likewise.
6010 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
6011 (*<reduc_op>_dpp_shr_<mode>): Likewise.
6012 (*plus_carry_dpp_shr_<mode>): Likewise.
6013 (*plus_carry_in_dpp_shr_<mode>): Likewise.
6014 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
6015 (gcn_global_address_p): RDNA2 only allows smaller offsets.
6016 (gcn_addr_space_legitimate_address_p): Likewise.
6017 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
6018 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
6019 (output_file_start): Configure gfx1030.
6020 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
6021 (ASSEMBLER_DIALECT): New.
6022 * config/gcn/gcn.md (rdna): New define_attr.
6023 (enabled): Use "rdna" attribute.
6024 (gcn_return): Remove s_dcache_wb.
6025 (addcsi3_scalar): Add RDNA2 syntax variant.
6026 (addcsi3_scalar_zero): Likewise.
6027 (addptrdi3): Likewise.
6028 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
6029 (*memory_barrier): Add RDNA2 syntax variant.
6030 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
6031 scalar atomics for RDNA2.
6032 (atomic_store<mode>): Likewise.
6033 (atomic_exchange<mode>): Likewise.
6034 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
6035 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
6036 (main): Recognise -march=gfx1030.
6037 * config/gcn/t-omp-device: Add gfx1030 isa.
6039 2023-10-20 Richard Biener <rguenther@suse.de>
6041 PR tree-optimization/111000
6042 * stor-layout.h (element_precision): Move ..
6043 * tree.h (element_precision): .. here.
6044 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
6045 motion of shifts and rotates.
6047 2023-10-20 Alexandre Oliva <oliva@adacore.com>
6049 * tree-core.h (ECF_XTHROW): New macro.
6050 * tree.cc (set_call_expr): Add expected_throw attribute when
6052 (build_common_builtin_node): Add ECF_XTHROW to
6053 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
6054 * calls.cc (flags_from_decl_or_type): Check for expected_throw
6055 attribute to set ECF_XTHROW.
6056 * gimple.cc (gimple_build_call_from_tree): Propagate
6057 ECF_XTHROW from decl flags to gimple call...
6058 (gimple_call_flags): ... and back.
6059 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
6060 (gimple_call_set_expected_throw): New.
6061 (gimple_call_expected_throw_p): New.
6062 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
6063 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
6064 * common.opt (fharden-control-flow-redundancy): New.
6065 (-fhardcfr-check-returning-calls): New.
6066 (-fhardcfr-check-exceptions): New.
6067 (-fhardcfr-check-noreturn-calls=*): New.
6068 (Enum hardcfr_check_noreturn_calls): New.
6069 (fhardcfr-skip-leaf): New.
6070 * doc/invoke.texi: Document them.
6071 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
6072 * flag-types.h (enum hardcfr_noret): New.
6073 * gimple-harden-control-flow.cc: New.
6074 * params.opt (-param=hardcfr-max-blocks=): New.
6075 (-param=hradcfr-max-inline-blocks=): New.
6076 * passes.def (pass_harden_control_flow_redundancy): Add.
6077 * tree-pass.h (make_pass_harden_control_flow_redundancy):
6079 * doc/extend.texi: Document expected_throw attribute.
6081 2023-10-20 Alex Coplan <alex.coplan@arm.com>
6083 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
6084 ::remove_insn on deleted insns.
6086 2023-10-20 Richard Biener <rguenther@suse.de>
6088 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
6090 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
6093 * config/sh/sh.md (unnamed split pattern): Fix comparison of
6094 find_regno_note result.
6096 2023-10-20 Richard Biener <rguenther@suse.de>
6098 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
6099 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
6102 2023-10-20 Richard Biener <rguenther@suse.de>
6104 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
6105 off_arg3_arg2_map): New.
6106 (vect_get_operand_map): Get flag whether the stmt was
6107 recognized as gather or scatter and use the above
6109 (vect_get_and_check_slp_defs): Adjust.
6110 (vect_build_slp_tree_2): Likewise.
6112 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6114 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
6115 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
6116 (pre_vsetvl::emit_vsetvl): Ditto.
6118 2023-10-20 Tamar Christina <tamar.christina@arm.com>
6119 Andre Vieira <andre.simoesdiasvieira@arm.com>
6121 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
6122 (get_loop_body_if_conv_order): ... to here.
6123 (if_convertible_loop_p): Remove single_exit check.
6124 (tree_if_conversion): Move single_exit check to if-conversion part and
6125 support multiple exits.
6127 2023-10-20 Tamar Christina <tamar.christina@arm.com>
6128 Andre Vieira <andre.simoesdiasvieira@arm.com>
6130 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
6131 from original statement.
6132 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
6134 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6137 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
6138 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
6140 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
6145 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
6147 (compute_reaching_defintion): New.
6148 (enum vsetvl_type): Moved.
6149 (vlmax_avl_p): Moved.
6150 (enum emit_type): Moved.
6151 (vlmul_to_str): Moved.
6152 (vlmax_avl_insn_p): Removed.
6153 (policy_to_str): Moved.
6154 (loop_basic_block_p): Removed.
6155 (valid_sew_p): Removed.
6156 (vsetvl_insn_p): Moved.
6157 (vsetvl_vtype_change_only_p): Removed.
6158 (after_or_same_p): Removed.
6159 (before_p): Removed.
6160 (anticipatable_occurrence_p): Removed.
6161 (available_occurrence_p): Removed.
6162 (insn_should_be_added_p): Removed.
6163 (get_all_sets): Moved.
6164 (get_same_bb_set): Moved.
6165 (gen_vsetvl_pat): Removed.
6166 (calculate_vlmul): Moved.
6167 (get_max_int_sew): New.
6168 (emit_vsetvl_insn): Removed.
6169 (get_max_float_sew): New.
6170 (eliminate_insn): Removed.
6171 (insert_vsetvl): Removed.
6172 (count_regno_occurrences): Moved.
6173 (get_vl_vtype_info): Removed.
6174 (enum def_type): Moved.
6175 (validate_change_or_fail): Moved.
6176 (change_insn): Removed.
6177 (get_all_real_uses): Moved.
6178 (get_forward_read_vl_insn): Removed.
6179 (get_backward_fault_first_load_insn): Removed.
6180 (change_vsetvl_insn): Removed.
6181 (avl_source_has_vsetvl_p): Removed.
6182 (source_equal_p): Moved.
6183 (calculate_sew): Removed.
6184 (same_equiv_note_p): Moved.
6186 (incompatible_avl_p): Removed.
6188 (different_sew_p): Removed.
6189 (get_bb_index): New.
6190 (different_lmul_p): Removed.
6191 (has_no_uses): Moved.
6192 (different_ratio_p): Removed.
6193 (different_tail_policy_p): Removed.
6194 (different_mask_policy_p): Removed.
6195 (possible_zero_avl_p): Removed.
6196 (enum demand_flags): New.
6197 (second_ratio_invalid_for_first_sew_p): Removed.
6198 (second_ratio_invalid_for_first_lmul_p): Removed.
6200 (float_insn_valid_sew_p): Removed.
6201 (second_sew_less_than_first_sew_p): Removed.
6202 (first_sew_less_than_second_sew_p): Removed.
6203 (class vsetvl_info): New.
6204 (compare_lmul): Removed.
6205 (second_lmul_less_than_first_lmul_p): Removed.
6206 (second_ratio_less_than_first_ratio_p): Removed.
6207 (DEF_INCOMPATIBLE_COND): Removed.
6208 (greatest_sew): Removed.
6209 (first_sew): Removed.
6210 (second_sew): Removed.
6211 (first_vlmul): Removed.
6212 (second_vlmul): Removed.
6213 (first_ratio): Removed.
6214 (second_ratio): Removed.
6215 (vlmul_for_first_sew_second_ratio): Removed.
6216 (vlmul_for_greatest_sew_second_ratio): Removed.
6217 (ratio_for_second_sew_first_vlmul): Removed.
6218 (class vsetvl_block_info): New.
6219 (DEF_SEW_LMUL_FUSE_RULE): New.
6220 (always_unavailable): Removed.
6221 (avl_unavailable_p): Removed.
6222 (class demand_system): New.
6223 (sew_unavailable_p): Removed.
6224 (lmul_unavailable_p): Removed.
6225 (ge_sew_unavailable_p): Removed.
6226 (ge_sew_lmul_unavailable_p): Removed.
6227 (ge_sew_ratio_unavailable_p): Removed.
6228 (DEF_UNAVAILABLE_COND): Removed.
6229 (same_sew_lmul_demand_p): Removed.
6230 (propagate_avl_across_demands_p): Removed.
6231 (reg_available_p): Removed.
6232 (support_relaxed_compatible_p): Removed.
6233 (demands_can_be_fused_p): Removed.
6234 (earliest_pred_can_be_fused_p): Removed.
6235 (vsetvl_dominated_by_p): Removed.
6236 (avl_info::avl_info): Removed.
6237 (avl_info::single_source_equal_p): Removed.
6238 (avl_info::multiple_source_equal_p): Removed.
6239 (DEF_SEW_LMUL_RULE): New.
6240 (avl_info::operator=): Removed.
6241 (avl_info::operator==): Removed.
6242 (DEF_POLICY_RULE): New.
6243 (avl_info::operator!=): Removed.
6244 (avl_info::has_non_zero_avl): Removed.
6245 (vl_vtype_info::vl_vtype_info): Removed.
6246 (vl_vtype_info::operator==): Removed.
6247 (DEF_AVL_RULE): New.
6248 (vl_vtype_info::operator!=): Removed.
6249 (vl_vtype_info::same_avl_p): Removed.
6250 (vl_vtype_info::same_vtype_p): Removed.
6251 (vl_vtype_info::same_vlmax_p): Removed.
6252 (vector_insn_info::operator>=): Removed.
6253 (vector_insn_info::operator==): Removed.
6254 (class pre_vsetvl): New.
6255 (vector_insn_info::parse_insn): Removed.
6256 (vector_insn_info::compatible_p): Removed.
6257 (vector_insn_info::skip_avl_compatible_p): Removed.
6258 (vector_insn_info::compatible_avl_p): Removed.
6259 (vector_insn_info::compatible_vtype_p): Removed.
6260 (vector_insn_info::available_p): Removed.
6261 (vector_insn_info::fuse_avl): Removed.
6262 (vector_insn_info::fuse_sew_lmul): Removed.
6263 (vector_insn_info::fuse_tail_policy): Removed.
6264 (vector_insn_info::fuse_mask_policy): Removed.
6265 (vector_insn_info::local_merge): Removed.
6266 (vector_insn_info::global_merge): Removed.
6267 (vector_insn_info::get_avl_or_vl_reg): Removed.
6268 (vector_insn_info::update_fault_first_load_avl): Removed.
6269 (vector_insn_info::dump): Removed.
6270 (vector_infos_manager::vector_infos_manager): Removed.
6271 (vector_infos_manager::create_expr): Removed.
6272 (vector_infos_manager::get_expr_id): Removed.
6273 (vector_infos_manager::all_same_ratio_p): Removed.
6274 (vector_infos_manager::all_avail_in_compatible_p): Removed.
6275 (vector_infos_manager::all_same_avl_p): Removed.
6276 (vector_infos_manager::expr_set_num): Removed.
6277 (vector_infos_manager::release): Removed.
6278 (vector_infos_manager::create_bitmap_vectors): Removed.
6279 (vector_infos_manager::free_bitmap_vectors): Removed.
6280 (vector_infos_manager::dump): Removed.
6281 (class pass_vsetvl): Adjust.
6282 (pass_vsetvl::get_vector_info): Removed.
6283 (pass_vsetvl::get_block_info): Removed.
6284 (pass_vsetvl::update_vector_info): Removed.
6285 (pass_vsetvl::update_block_info): Removed.
6286 (pre_vsetvl::compute_avl_def_data): New.
6287 (pass_vsetvl::simple_vsetvl): Removed.
6288 (pass_vsetvl::compute_local_backward_infos): Removed.
6289 (pass_vsetvl::need_vsetvl): Removed.
6290 (pass_vsetvl::transfer_before): Removed.
6291 (pass_vsetvl::transfer_after): Removed.
6292 (pre_vsetvl::compute_vsetvl_def_data): New.
6293 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
6294 (pass_vsetvl::prune_expressions): Removed.
6295 (pass_vsetvl::compute_local_properties): Removed.
6296 (pre_vsetvl::compute_lcm_local_properties): New.
6297 (pass_vsetvl::earliest_fusion): Removed.
6298 (pre_vsetvl::fuse_local_vsetvl_info): New.
6299 (pass_vsetvl::vsetvl_fusion): Removed.
6300 (pass_vsetvl::can_refine_vsetvl_p): Removed.
6301 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
6302 (pass_vsetvl::refine_vsetvls): Removed.
6303 (pass_vsetvl::cleanup_vsetvls): Removed.
6304 (pass_vsetvl::commit_vsetvls): Removed.
6305 (pass_vsetvl::pre_vsetvl): Removed.
6306 (pass_vsetvl::get_vsetvl_at_end): Removed.
6307 (local_avl_compatible_p): Removed.
6308 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
6309 (pre_vsetvl::pre_global_vsetvl_info): New.
6310 (get_first_vsetvl_before_rvv_insns): Removed.
6311 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
6312 (pre_vsetvl::emit_vsetvl): New.
6313 (pass_vsetvl::ssa_post_optimization): Removed.
6314 (pre_vsetvl::cleaup): New.
6315 (pre_vsetvl::remove_avl_operand): New.
6316 (pass_vsetvl::df_post_optimization): Removed.
6317 (pre_vsetvl::remove_unused_dest_operand): New.
6318 (pass_vsetvl::init): Removed.
6319 (pass_vsetvl::done): Removed.
6320 (pass_vsetvl::compute_probabilities): Removed.
6321 (pass_vsetvl::lazy_vsetvl): Adjust.
6322 (pass_vsetvl::execute): Adjust.
6323 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
6324 (DEF_SEW_LMUL_RULE): New.
6325 (DEF_SEW_LMUL_FUSE_RULE): Removed.
6326 (DEF_POLICY_RULE): New.
6327 (DEF_UNAVAILABLE_COND): Removed
6328 (DEF_AVL_RULE): New demand type.
6329 (sew_lmul): New demand type.
6330 (ratio_only): New demand type.
6331 (sew_only): New demand type.
6332 (ge_sew): New demand type.
6333 (ratio_and_ge_sew): New demand type.
6334 (tail_mask_policy): New demand type.
6335 (tail_policy_only): New demand type.
6336 (mask_policy_only): New demand type.
6337 (ignore_policy): New demand type.
6338 (avl): New demand type.
6339 (non_zero_avl): New demand type.
6340 (ignore_avl): New demand type.
6341 * config/riscv/t-riscv: Removed riscv-vsetvl.h
6342 * config/riscv/riscv-vsetvl.h: Removed.
6344 2023-10-20 Alexandre Oliva <oliva@adacore.com>
6346 * tree-eh.cc (make_eh_edges): Return the new edge.
6347 * tree-eh.h (make_eh_edges): Likewise.
6349 2023-10-19 Marek Polacek <polacek@redhat.com>
6351 * doc/contrib.texi: Add entry for Patrick Palka.
6353 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
6355 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
6356 compatible with mask parameters in clone.
6357 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
6359 (vectorizable_simd_clone_call): Enable the use of masked clones in
6362 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
6364 PR tree-optimization/110485
6365 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
6366 vectors usage if a notinbranch simdclone has been selected.
6368 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
6370 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
6371 simd clone calls and only use types that are mapped to vectors.
6372 (simd_clone_call_p): New helper function.
6374 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
6376 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
6377 poly NIT and ALT_BOUND.
6379 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
6381 * tree-parloops.cc (create_loop_fn): Copy specific target and
6382 optimization options to clone.
6384 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
6386 * omp-simd-clone.cc (simd_clone_subparts): Remove.
6387 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
6388 TYPE_VECTOR_SUBPARTS.
6389 (ipa_simd_modify_function_body): Likewise.
6390 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
6391 (simd_clone_subparts): Remove.
6393 2023-10-19 Jason Merrill <jason@redhat.com>
6395 * ABOUT-GCC-NLS: Add usage guidance.
6397 2023-10-19 Jason Merrill <jason@redhat.com>
6399 * diagnostic-core.h (permerror): Rename new overloads...
6400 (permerror_opt): To this.
6401 * diagnostic.cc: Likewise.
6403 2023-10-19 Tamar Christina <tamar.christina@arm.com>
6405 PR tree-optimization/111860
6406 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
6407 Remove PHI nodes that dominate loop.
6409 2023-10-19 Richard Biener <rguenther@suse.de>
6411 PR tree-optimization/111131
6412 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
6413 sure to update all gather/scatter stmt DRs, not only those
6414 that eventually got VMAT_GATHER_SCATTER set.
6415 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
6416 (vect_get_and_check_slp_defs): Handle gathers/scatters,
6417 adding the offset as SLP operand and comparing base and scale.
6418 (vect_build_slp_tree_1): Handle gathers.
6419 (vect_build_slp_tree_2): Likewise.
6421 2023-10-19 Richard Biener <rguenther@suse.de>
6423 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
6425 (vect_build_one_gather_load_call): ... this. Refactor,
6426 inline widening/narrowing support ...
6427 (vectorizable_load): ... here, do gather vectorization
6428 with builtin decls along other gather vectorization.
6430 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6432 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
6433 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
6434 (store_pair_dw_tftf): Rename to ...
6435 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
6436 * config/aarch64/iterators.md (TX2): New.
6438 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6440 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
6441 parameter to give final insn position, infer use of mem if it isn't
6442 specified explicitly.
6443 (function_info::change_insns): Pass down final insn position to
6444 finalize_new_accesses.
6445 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
6447 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6449 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
6450 * rtl-ssa/functions.h (function_info): Declare new member
6451 function reparent_use.
6453 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6455 * rtl-ssa/access-utils.h (drop_memory_access): New.
6457 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6459 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
6460 update the prev pointer on the following nondebug insn in the
6461 case that !insn->is_debug_insn () && next->is_debug_insn ().
6463 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
6465 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
6466 Also make Clearwater Forest depends on Sierra Forest.
6467 * config/i386/i386-options.cc: Revise the order of the macro
6468 definition to avoid confusion.
6469 * doc/extend.texi: Revise documentation.
6470 * doc/invoke.texi: Correct documentation.
6472 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
6474 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
6475 Implement support for --with-multilib-list.
6476 * config/gcn/t-gcn-hsa: Likewise.
6477 * doc/install.texi: Likewise.
6478 * doc/invoke.texi: Mark Fiji deprecated.
6480 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
6482 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
6483 vector_costs. Add a constructor.
6484 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
6485 adjust the cost for inner loops.
6486 (loongarch_vector_costs::count_operations): New function.
6487 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
6488 (loongarch_vector_costs::finish_cost): Ditto.
6489 (loongarch_builtin_vectorization_cost): Adjust.
6490 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
6491 (loongarcg-vect-issue-info): Ditto.
6492 (mmemvec-cost): Delete.
6493 * config/loongarch/genopts/loongarch.opt.in
6494 (loongarch-vect-unroll-limit): Ditto.
6495 (loongarcg-vect-issue-info): Ditto.
6496 (mmemvec-cost): Delete.
6497 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
6499 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
6501 * config/loongarch/lasx.md
6502 (vec_widen_<su>mult_even_v8si): New patterns.
6503 (vec_widen_<su>add_hi_<mode>): Ditto.
6504 (vec_widen_<su>add_lo_<mode>): Ditto.
6505 (vec_widen_<su>sub_hi_<mode>): Ditto.
6506 (vec_widen_<su>sub_lo_<mode>): Ditto.
6507 (vec_widen_<su>mult_hi_<mode>): Ditto.
6508 (vec_widen_<su>mult_lo_<mode>): Ditto.
6509 * config/loongarch/loongarch.md (u_bool): New iterator.
6510 * config/loongarch/loongarch-protos.h
6511 (loongarch_expand_vec_widen_hilo): New prototype.
6512 * config/loongarch/loongarch.cc
6513 (loongarch_expand_vec_interleave): New function.
6514 (loongarch_expand_vec_widen_hilo): New function.
6516 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
6518 * config/loongarch/lasx.md
6519 (avg<mode>3_ceil): New patterns.
6520 (uavg<mode>3_ceil): Ditto.
6521 (avg<mode>3_floor): Ditto.
6522 (uavg<mode>3_floor): Ditto.
6525 * config/loongarch/lsx.md
6526 (avg<mode>3_ceil): New patterns.
6527 (uavg<mode>3_ceil): Ditto.
6528 (avg<mode>3_floor): Ditto.
6529 (uavg<mode>3_floor): Ditto.
6533 2023-10-18 Andrew Pinski <pinskia@gmail.com>
6535 PR middle-end/111863
6536 * expr.cc (do_store_flag): Don't over write arg0
6537 when stripping off `& POW2`.
6539 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
6541 PR tree-optimization/111648
6542 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
6543 chooses base element from arg, ensure that it's a natural stepped
6545 (build_vec_cst_rand): New param natural_stepped and use it to
6546 construct a naturally stepped sequence.
6547 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
6549 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
6551 * config/pru/pru.cc (pru_insn_cost): New function.
6552 (TARGET_INSN_COST): Define for PRU.
6554 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
6556 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
6557 Test <= instead of testing < twice.
6559 2023-10-18 Jakub Jelinek <jakub@redhat.com>
6562 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
6563 using rtx_def type for memory_extend_buf, use unsigned char
6564 arrayy with size of rtx_def and its alignment.
6566 2023-10-18 Jason Merrill <jason@redhat.com>
6568 * doc/invoke.texi: Move -fpermissive to Warning Options.
6569 * diagnostic.cc (update_effective_level_from_pragmas): Remove
6570 redundant system header check.
6571 (diagnostic_report_diagnostic): Move down syshdr/-w check.
6572 (diagnostic_impl): Handle DK_PERMERROR with an option number.
6573 (permerror): Add new overloads.
6574 * diagnostic-core.h (permerror): Declare them.
6576 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
6578 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
6579 to avoid that auxillary statement list reaches LTO.
6581 2023-10-18 Jakub Jelinek <jakub@redhat.com>
6583 PR tree-optimization/111845
6584 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
6585 statements for the 4 operand addition or subtraction of 3 operands
6586 from 1 operand cases and remove them when successful. Look for
6587 nested additions even from rhs[2], not just rhs[1].
6589 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
6592 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
6593 instead of an assert ICE when no -march= has been specified.
6595 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
6597 * config.in: Regenerate.
6598 * config/darwin.cc (darwin_file_start): Add assembler directives
6599 for the target OS version, where these are supported by the
6601 (darwin_override_options): Check for building >= macOS 10.14.
6602 * configure: Regenerate.
6603 * configure.ac: Check for assembler support of .build_version
6606 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6608 PR tree-optimization/109154
6609 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
6610 (typedef struct ifcvt_arg_entry): New.
6611 (cmp_arg_entry): New.
6612 (gen_phi_arg_condition, gen_phi_nest_statement,
6613 predicate_scalar_phi): Use them.
6615 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6617 PR tree-optimization/109154
6618 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
6619 Rewrite to new syntax.
6620 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
6623 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6625 PR tree-optimization/109154
6626 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
6628 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6630 PR tree-optimization/109154
6631 * match.pd: Add new cond_op rule.
6633 2023-10-18 Xi Ruoyao <xry111@xry111.site>
6635 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
6638 2023-10-18 Richard Biener <rguenther@suse.de>
6640 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
6641 Relax check to again allow passing integer mode masks
6642 as traditional vectors.
6644 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6646 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
6647 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
6649 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
6650 (find_guard_arg): Look value up through explicit edge and original defs.
6651 (vect_do_peeling): Use it.
6652 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
6653 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
6655 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
6656 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
6657 optional param to turn off LCSSA mode.
6659 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6661 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
6662 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
6664 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
6665 (vec_init_loop_exit_info): Extend analysis when multiple exits.
6666 (vect_analyze_loop_form): Record conds and determine main cond.
6667 (vect_create_loop_vinfo): Extend bookkeeping of conds.
6668 (vect_analyze_loop): Release conds.
6669 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
6670 LOOP_VINFO_LOOP_IV_COND): New.
6671 (struct vect_loop_form_info): Add conds, alt_loop_conds;
6672 (struct loop_vec_info): Add conds, loop_iv_cond.
6674 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6676 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
6677 (loop_distribution::distribute_loop): Bail out of not single exit.
6678 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
6679 * tree-scalar-evolution.h (get_loop_exit_condition): New.
6680 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
6682 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
6683 vect_set_loop_condition_partial_vectors_avx512,
6684 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
6686 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
6687 return new peeled corresponding peeled exit.
6688 (slpeel_can_duplicate_loop_p): Explicitly take exit.
6689 (find_loop_location): Handle not knowing an explicit exit.
6690 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
6691 find_guard_arg, slpeel_update_phi_nodes_for_loops,
6692 slpeel_update_phi_nodes_for_guard2): Use new exits.
6693 (vect_do_peeling): Update bookkeeping to keep track of exits.
6694 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
6696 (vec_init_loop_exit_info): New.
6697 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
6698 vec_epilogue_loop_iv, scalar_loop_iv.
6699 (vect_analyze_loop_form): Initialize exits.
6700 (vect_create_loop_vinfo): Set main exit.
6701 (vect_create_epilog_for_reduction, vectorizable_live_operation,
6702 vect_transform_loop): Use it.
6703 (scale_profile_for_vect_loop): Explicitly take exit to scale.
6704 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
6705 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
6706 LOOP_VINFO_SCALAR_IV_EXIT): New.
6707 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
6709 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
6710 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
6711 (vec_init_loop_exit_info): New.
6712 (struct vect_loop_form_info): Add loop_exit.
6714 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6716 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
6718 (vectorizable_comparison_1): ...This.
6720 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6722 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
6723 (expand_vec_perm_const_1): Add consecutive pattern recognition.
6725 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
6727 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
6729 * common/config/i386/i386-common.cc (processor_name):
6731 (processor_alias_table): Ditto.
6732 * common/config/i386/i386-cpuinfo.h (enum processor_types):
6733 Add INTEL_PANTHERLAKE.
6734 * config.gcc: Add -march=pantherlake.
6735 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
6736 the if clause. Handle pantherlake.
6737 * config/i386/i386-c.cc (ix86_target_macros_internal):
6739 * config/i386/i386-options.cc (processor_cost_table): Ditto.
6740 (m_PANTHERLAKE): New.
6741 (m_CORE_HYBRID): Add pantherlake.
6742 * config/i386/i386.h (enum processor_type): Ditto.
6743 * doc/extend.texi: Ditto.
6744 * doc/invoke.texi: Ditto.
6746 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
6748 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
6749 * config/i386/x86-tune.def: Replace hybrid client tune to
6752 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
6754 * common/config/i386/cpuinfo.h
6755 (get_intel_cpu): Handle Clearwater Forest.
6756 * common/config/i386/i386-common.cc (processor_name):
6757 Add Clearwater Forest.
6758 (processor_alias_table): Ditto.
6759 * common/config/i386/i386-cpuinfo.h (enum processor_types):
6760 Add INTEL_CLEARWATERFOREST.
6761 * config.gcc: Add -march=clearwaterforest.
6762 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
6764 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
6765 * config/i386/i386-options.cc (processor_cost_table): Ditto.
6766 (m_CLEARWATERFOREST): New.
6767 (m_CORE_ATOM): Add clearwaterforest.
6768 * config/i386/i386.h (enum processor_type): Ditto.
6769 * doc/extend.texi: Ditto.
6770 * doc/invoke.texi: Ditto.
6772 2023-10-18 liuhongt <hongtao.liu@intel.com>
6774 * config/i386/mmx.md (fma<mode>4): New expander.
6775 (fms<mode>4): Ditto.
6776 (fnma<mode>4): Ditto.
6777 (fnms<mode>4): Ditto.
6778 (vec_fmaddsubv4hf4): Ditto.
6779 (vec_fmsubaddv4hf4): Ditto.
6781 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6784 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
6786 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
6788 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
6789 the position of the LR save slot dependent on stack clash
6790 protection unless shadow call stacks are enabled.
6792 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
6794 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
6795 store the list saved GPRs, FPRs and predicate registers.
6796 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
6797 the lists of saved registers. Use them to choose push candidates.
6798 Invalidate pop candidates if we're not going to do a pop.
6799 (aarch64_next_callee_save): Delete.
6800 (aarch64_save_callee_saves): Take a list of registers,
6801 rather than a range. Make !skip_wb select only write-back
6803 (aarch64_expand_prologue): Update calls accordingly.
6804 (aarch64_restore_callee_saves): Take a list of registers,
6805 rather than a range. Always skip pop candidates. Also skip
6806 LR if shadow call stacks are enabled.
6807 (aarch64_expand_epilogue): Update calls accordingly.
6809 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
6811 * cfgbuild.h (find_sub_basic_blocks): Declare.
6812 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
6814 (find_many_sub_basic_blocks): ...here.
6815 (find_sub_basic_blocks): New function.
6816 * function.cc (thread_prologue_and_epilogue_insns): Handle
6817 epilogues that contain jumps.
6819 2023-10-17 Andrew Pinski <apinski@marvell.com>
6821 PR tree-optimization/110817
6822 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
6823 check for boolean type as they don't have "[0,1]" range.
6825 2023-10-17 Andrew Pinski <pinskia@gmail.com>
6827 PR tree-optimization/111432
6828 * match.pd (`a & (x | CST)`): New pattern.
6830 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
6832 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
6835 2023-10-17 Richard Biener <rguenther@suse.de>
6837 PR tree-optimization/111846
6838 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
6839 (SLP_TREE_SIMD_CLONE_INFO): New.
6840 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
6841 SLP_TREE_SIMD_CLONE_INFO.
6842 (_slp_tree::~_slp_tree): Release it.
6843 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
6844 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
6845 dependent on if we're doing SLP.
6847 2023-10-17 Jakub Jelinek <jakub@redhat.com>
6849 * wide-int-print.h (print_dec_buf_size): For length, divide number
6850 of bits by 3 and add 3 instead of division by 4 and adding 4.
6851 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
6852 print_hex, instead call print_decu on either negated value after
6853 printing - or on wi itself.
6854 (print_decu): Don't call print_hex, instead print even large numbers
6856 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
6857 even if it returns false.
6858 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
6859 pp_wide_int_large should be used.
6860 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
6861 to compute needed buffer size.
6863 2023-10-17 Richard Biener <rguenther@suse.de>
6865 PR middle-end/111818
6866 * tree-ssa.cc (maybe_optimize_var): When clearing
6867 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
6869 2023-10-17 Richard Biener <rguenther@suse.de>
6871 PR tree-optimization/111807
6872 * tree-sra.cc (build_ref_for_model): Only call
6873 build_reconstructed_reference when the offsets are the same.
6875 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
6878 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
6880 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
6882 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
6883 fix impl related to vec_initv32qiv16qi template to avoid ICE.
6885 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
6886 Chenghua Xu <xuchenghua@loongson.cn>
6888 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
6891 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6893 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
6894 (get_store_value): New function.
6896 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
6898 * explow.cc (probe_stack_range): Handle case when expand_binop
6899 does not construct its result in the expected location.
6901 2023-10-16 David Malcolm <dmalcolm@redhat.com>
6903 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
6904 default for -fdiagnostics-text-art-charset from emoji to ascii.
6905 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
6907 2023-10-16 David Malcolm <dmalcolm@redhat.com>
6909 * diagnostic.cc (diagnostic_initialize): Ensure
6910 context->extra_output_kind is initialized.
6912 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
6914 * config/i386/i386.cc (ix86_can_inline_p):
6915 Handle CM_LARGE and CM_LARGE_PIC.
6916 (x86_elf_aligned_decl_common): Ditto.
6917 (x86_output_aligned_bss): Ditto.
6918 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
6919 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
6921 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
6923 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
6924 prototype. Improve comment.
6925 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
6926 into riscv-string.cc.
6927 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
6928 (riscv_expand_block_move): Likewise.
6929 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
6931 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
6932 (riscv_expand_block_move): Likewise.
6934 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
6936 * Makefile.in: Add fold-mem-offsets.o.
6937 * passes.def: Schedule a new pass.
6938 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
6939 * common.opt: New options.
6940 * doc/invoke.texi: Document new option.
6941 * fold-mem-offsets.cc: New file.
6943 2023-10-16 Andrew Pinski <pinskia@gmail.com>
6945 PR tree-optimization/101541
6946 * match.pd (A CMP 0 ? A : -A): Improve
6947 using bitwise_equal_p.
6949 2023-10-16 Andrew Pinski <pinskia@gmail.com>
6951 PR tree-optimization/31531
6952 * match.pd (~X op ~Y): Allow for an optional nop convert.
6953 (~X op C): Likewise.
6955 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
6957 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
6958 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
6960 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6962 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
6963 unsigned vector element.
6965 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6967 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
6969 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
6971 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
6973 * gimple-fold.cc (size_must_be_zero_p): Likewise.
6974 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
6975 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
6976 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
6978 2023-10-16 liuhongt <hongtao.liu@intel.com>
6980 * config/i386/mmx.md (V2FI_32): New mode iterator
6981 (movd_v2hf_to_sse): Rename to ..
6982 (movd_<mode>_to_sse): .. this.
6983 (movd_v2hf_to_sse_reg): Rename to ..
6984 (movd_<mode>_to_sse_reg): .. this.
6985 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
6987 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
6988 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
6989 (float<floatunssuffix>v2siv2hf2): Ditto.
6990 (extendv2hfv2sf2): Ditto.
6991 (truncv2sfv2hf2): Ditto.
6992 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
6993 (*vec_concat<mode>_movss): .. this.
6995 2023-10-16 liuhongt <hongtao.liu@intel.com>
6997 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
6999 (ix86_expand_round_sse4): Ditto.
7000 * config/i386/i386.md (roundhf2): New expander.
7001 (lroundhf<mode>2): Ditto.
7002 (lrinthf<mode>2): Ditto.
7003 (l<rounding_insn>hf<mode>2): Ditto.
7004 * config/i386/mmx.md (sqrt<mode>2): Ditto.
7005 (btrunc<mode>2): Ditto.
7006 (nearbyint<mode>2): Ditto.
7007 (rint<mode>2): Ditto.
7008 (lrint<mode><mmxintvecmodelower>2): Ditto.
7009 (floor<mode>2): Ditto.
7010 (lfloor<mode><mmxintvecmodelower>2): Ditto.
7011 (ceil<mode>2): Ditto.
7012 (lceil<mode><mmxintvecmodelower>2): Ditto.
7013 (round<mode>2): Ditto.
7014 (lround<mode><mmxintvecmodelower>2): Ditto.
7015 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
7016 (lfloor<mode><sseintvecmodelower>2): Ditto.
7017 (lceil<mode><sseintvecmodelower>2): Ditto.
7018 (lround<mode><sseintvecmodelower>2): Ditto.
7019 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
7020 (round<mode>2): Extend to V8HF/V16HF/V32HF.
7022 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
7024 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
7025 @code; document more completely the supported Fortran sentinels.
7027 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
7029 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
7030 instead of expand_binop. Optimize cases (i.e. avoid generating
7031 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
7032 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
7034 2023-10-15 Jakub Jelinek <jakub@redhat.com>
7036 PR tree-optimization/111800
7037 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
7038 print_decu_buf_size, print_hex_buf_size): New inline functions.
7039 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
7040 (assert_hexeq): Use print_hex_buf_size.
7041 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
7042 (print_decu): Use print_decu_buf_size.
7043 (print_hex): Use print_hex_buf_size.
7044 (pp_wide_int_large): Use print_dec_buf_size.
7045 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
7046 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
7048 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
7049 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
7051 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7053 * combine.cc (simplify_compare_const): Fix handling of unsigned
7056 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7058 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
7060 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
7062 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
7063 'omp allocate' for stack variables.
7065 2023-10-14 Jakub Jelinek <jakub@redhat.com>
7068 * tree-core.h (struct tree_base): Remove int_length.offset
7069 member, change type of int_length.unextended and int_length.extended
7070 from unsigned char to unsigned short.
7071 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
7072 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
7073 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
7074 TREE_INT_CST_NUNITS.
7075 * tree.cc (wide_int_to_tree_1): Don't assert
7076 TREE_INT_CST_OFFSET_NUNITS value.
7077 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
7078 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
7079 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
7080 (trailing_wide_int_storage): Change m_len type from unsigned char *
7081 to unsigned short *.
7082 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
7083 argument from unsigned char * to unsigned short *.
7084 (trailing_wide_ints): Change m_max_len type from unsigned char to
7085 unsigned short. Change m_len element type from
7086 struct{unsigned char len;} to unsigned short.
7087 (trailing_wide_ints <N>::operator []): Remove .len from m_len
7089 * value-range-storage.h (irange_storage::lengths_address): Change
7090 return type from const unsigned char * to const unsigned short *.
7091 (irange_storage::write_lengths_address): Change return type from
7092 unsigned char * to unsigned short *.
7093 * value-range-storage.cc (irange_storage::write_lengths_address):
7095 (irange_storage::lengths_address): Change return type from
7096 const unsigned char * to const unsigned short *.
7097 (write_wide_int): Change len argument type from unsigned char *&
7098 to unsigned short *&.
7099 (irange_storage::set_irange): Change len variable type from
7100 unsigned char * to unsigned short *.
7101 (read_wide_int): Change len argument type from unsigned char to
7102 unsigned short. Use trailing_wide_int_storage <unsigned short>
7103 instead of trailing_wide_int_storage and
7104 trailing_wide_int <unsigned short> instead of trailing_wide_int.
7105 (irange_storage::get_irange): Change len variable type from
7106 unsigned char * to unsigned short *.
7107 (irange_storage::size): Multiply n by sizeof (unsigned short)
7108 in len_size variable initialization.
7109 (irange_storage::dump): Change len variable type from
7110 unsigned char * to unsigned short *.
7112 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7114 * config/riscv/vector-iterators.md: Remove redundant iterators.
7116 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
7118 PR tree-optimization/111622
7119 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
7120 register a partial equivalence if an operand has no uses.
7122 2023-10-13 Richard Biener <rguenther@suse.de>
7124 PR tree-optimization/111795
7125 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
7126 integer mode mask arguments.
7128 2023-10-13 Richard Biener <rguenther@suse.de>
7130 * tree-vect-slp.cc (mask_call_maps): New.
7131 (vect_get_operand_map): Handle IFN_MASK_CALL.
7132 (vect_build_slp_tree_1): Likewise.
7133 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
7136 2023-10-13 Richard Biener <rguenther@suse.de>
7138 PR tree-optimization/111779
7139 * tree-sra.cc (sra_handled_bf_read_p): New function.
7140 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
7141 (sra_modify_expr): Likewise.
7142 (make_fancy_name_1): Skip over BIT_FIELD_REF.
7144 2023-10-13 Richard Biener <rguenther@suse.de>
7146 PR tree-optimization/111773
7147 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
7148 not elide noreturn calls that are reflected to the IL.
7150 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
7152 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
7154 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
7156 2023-10-13 Pan Li <pan2.li@intel.com>
7158 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
7159 pattern for lfloor/lfloorf.
7160 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
7161 (expand_vec_lfloor): New func decl for expanding lfloor.
7162 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
7163 for expanding lfloor.
7165 2023-10-13 Pan Li <pan2.li@intel.com>
7167 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
7168 pattern] for lceil/lceilf.
7169 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
7170 (expand_vec_lceil): New func decl for expanding lceil.
7171 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
7172 for expanding lceil.
7174 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
7177 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
7178 code from shifts that are undefined.
7179 (can_be_built_by_li_lis_and_rldicr): Likewise.
7180 (can_be_built_by_li_and_rldic): Protect code from shifts that
7181 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
7183 2023-10-12 Alex Coplan <alex.coplan@arm.com>
7185 * reg-notes.def (NOALIAS): Correct comment.
7187 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7190 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
7192 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
7193 (wi::ints_for): Provide separate partial specializations for
7194 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
7195 and CONST_PRECISION, rather than using
7196 int_traits <extended_tree <N> >::precision_type as the second template
7198 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
7200 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
7203 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
7205 PR middle-end/111777
7206 * doc/extend.texi: Change subsubsection to subsection for
7209 2023-10-12 Tamar Christina <tamar.christina@arm.com>
7211 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
7213 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7215 * wide-int.h (widest_int_storage <N>::write_val): If l is small
7216 and there is space in u.val array, store a canary value at the
7218 (widest_int_storage <N>::set_len): Check the canary hasn't been
7221 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7224 * wide-int.h: Adjust file comment.
7225 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
7226 (WIDE_INT_MAX_INL_PRECISION): Define.
7227 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
7228 is smaller than WIDE_INT_MAX_ELTS.
7229 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
7230 WIDEST_INT_MAX_PRECISION): Define.
7231 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
7232 to pass 0 as a new argument.
7233 (class widest_int_storage): Likewise.
7234 (widest_int, widest2_int): Change typedefs to use widest_int_storage
7235 rather than fixed_wide_int_storage.
7236 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
7237 (struct binary_traits): Add partial specializations for
7238 INL_CONST_PRECISION.
7239 (generic_wide_int): Add needs_write_val_arg static data member.
7240 (int_traits): Likewise.
7241 (wide_int_storage): Replace val non-static data member with a union
7242 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
7243 assignment operator and destructor. Add unsigned int argument to
7245 (wide_int_storage::wide_int_storage): Initialize precision to 0
7246 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
7247 Assert in non-default ctor T's precision_type is not
7248 INL_CONST_PRECISION and allocate u.valp for large precision. Add
7250 (wide_int_storage::~wide_int_storage): New.
7251 (wide_int_storage::operator=): Add copy assignment operator. In
7252 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
7253 assert ctor T's precision_type is not INL_CONST_PRECISION and
7254 if precision changes, deallocate and/or allocate u.valp.
7255 (wide_int_storage::get_val): Return u.valp rather than u.val for
7257 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
7259 (wide_int_storage::set_len): Use write_val instead of writing val
7261 (wide_int_storage::from, wide_int_storage::from_array): Adjust
7263 (wide_int_storage::create): Allocate u.valp for large precisions.
7264 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
7265 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
7267 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
7268 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
7269 Adjust write_val callers.
7270 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
7271 (WIDEST_INT): Define.
7272 (widest_int_storage): New template class.
7273 (wi::int_traits <widest_int_storage>): New.
7274 (trailing_wide_int_storage::write_val): Add unused unsigned int
7276 (wi::get_binary_precision): Use
7277 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
7278 rather than get_precision on get_binary_result.
7279 (wi::copy): Adjust write_val callers. Don't call set_len if
7280 needs_write_val_arg.
7281 (wi::bit_not): If result.needs_write_val_arg, call write_val
7282 again with upper bound estimate of len.
7283 (wi::sext, wi::zext, wi::set_bit): Likewise.
7284 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
7285 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
7286 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
7287 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
7288 wi::lshift, wi::lrshift, wi::arshift): Likewise.
7289 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
7291 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
7292 generic_wide_int, instead add functions and templates for each
7293 storage of generic_wide_int. Make functions for
7294 generic_wide_int <wide_int_storage> and templates for
7295 generic_wide_int <widest_int_storage <N>> deleted.
7296 (wi::mask, wi::shifted_mask): Adjust write_val calls.
7297 * wide-int.cc (zeros): Decrease array size to 1.
7298 (BLOCKS_NEEDED): Use CEIL.
7299 (canonize): Use HOST_WIDE_INT_M1.
7300 (wi::from_buffer): Pass 0 to write_val.
7301 (wi::to_mpz): Use CEIL.
7302 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
7303 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
7304 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
7305 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
7306 above WIDE_INT_MAX_INL_PRECISION estimate precision from
7307 lengths of operands. Use XALLOCAVEC allocated buffers for
7308 prec above WIDE_INT_MAX_INL_PRECISION.
7309 (wi::divmod_internal): Likewise.
7310 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
7311 it from xlen and skip.
7312 (rshift_large_common): Remove xprecision argument, add len
7313 argument with len computed in caller. Don't return anything.
7314 (wi::lrshift_large, wi::arshift_large): Compute len here
7315 and pass it to rshift_large_common, for lengths above
7316 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
7317 (assert_deceq, assert_hexeq): For lengths above
7318 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
7319 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
7320 WIDE_INT_MAX_PRECISION.
7321 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
7322 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
7323 * wide-int-print.cc (print_decs, print_decu, print_hex): For
7324 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
7325 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
7326 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
7327 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
7328 WIDE_INT_MAX_PRECISION.
7329 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
7330 instead of hard coded CONST_PRECISION.
7331 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
7332 WIDE_INT_MAX_PRECISION.
7333 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
7334 than WIDE_INT_MAX_PRECISION.
7335 (wi::ints_for::zero): Use
7336 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
7337 wi::CONST_PRECISION.
7338 * tree.cc (build_replicated_int_cst): Formatting fix. Use
7339 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
7340 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
7341 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
7342 * double-int.h (wi::int_traits <double_int>::precision_type): Change
7343 to INL_CONST_PRECISION from CONST_PRECISION.
7344 * poly-int.h (struct poly_coeff_traits): Add partial specialization
7345 for wi::INL_CONST_PRECISION.
7346 * cfgloop.h (bound_wide_int): New typedef.
7347 (struct nb_iter_bound): Change bound type from widest_int to
7349 (struct loop): Change nb_iterations_upper_bound,
7350 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
7351 widest_int to bound_wide_int.
7352 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
7353 of i_bound is too large for bound_wide_int. Adjustments for the
7354 widest_int to bound_wide_int type change in non-static data members.
7355 (get_estimated_loop_iterations, get_max_loop_iterations,
7356 get_likely_max_loop_iterations): Adjustments for the widest_int to
7357 bound_wide_int type change in non-static data members.
7358 * tree-vect-loop.cc (vect_transform_loop): Likewise.
7359 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
7360 XALLOCAVEC allocated buffer for i_bound len above
7361 WIDE_INT_MAX_INL_ELTS.
7362 (record_estimate): Return early if wi::min_precision of i_bound is too
7363 large for bound_wide_int. Adjustments for the widest_int to
7364 bound_wide_int type change in non-static data members.
7365 (wide_int_cmp): Use bound_wide_int instead of widest_int.
7366 (bound_index): Use bound_wide_int instead of widest_int.
7367 (discover_iteration_bound_by_body_walk): Likewise. Use
7368 widest_int::from to convert it to widest_int when passed to
7370 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
7371 widest_int when passed to record_niter_bound.
7372 (estimate_numbers_of_iteration): Don't record upper bound if
7373 loop->nb_iterations has too large precision for bound_wide_int.
7374 (n_of_executions_at_most): Use widest_int::from.
7375 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
7376 the widest_int to bound_wide_int changes.
7377 * match.pd (fold_sign_changed_comparison simplification): Use
7378 wide_int::from on wi::to_wide instead of wi::to_widest.
7379 * value-range.h (irange::maybe_resize): Avoid using memcpy on
7380 non-trivially copyable elements.
7381 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
7382 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
7383 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
7384 Use wide_int::from on wi::to_wide instead of wi::to_widest.
7385 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
7386 before calling wi::udiv_trunc.
7387 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
7388 bound_wide_int type change in non-static data members.
7389 * lto-streamer-in.cc (input_cfg): Likewise.
7390 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
7391 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
7392 XALLOCAVEC allocated buffer. Formatting fix.
7393 * data-streamer-in.cc (streamer_read_wide_int,
7394 streamer_read_widest_int): Likewise.
7395 * tree-affine.cc (aff_combination_expand): Use placement new to
7396 construct name_expansion.
7397 (free_name_expansion): Destruct name_expansion.
7398 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
7399 index type from widest_int to offset_int.
7400 (class incr_info_d): Change incr type from widest_int to offset_int.
7401 (alloc_cand_and_find_basis, backtrace_base_for_ref,
7402 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
7403 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
7404 slsr_process_add, cand_abs_increment, replace_mult_candidate,
7405 replace_unconditional_candidate, incr_vec_index,
7406 create_add_on_incoming_edge, create_phi_basis_1,
7407 replace_conditional_candidate, record_increment,
7408 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
7409 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
7410 nearest_common_dominator_for_cands, insert_initializers,
7411 all_phi_incrs_profitable_1, replace_one_candidate,
7412 replace_profitable_candidates): Use offset_int rather than widest_int
7413 and wi::to_offset rather than wi::to_widest.
7414 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
7415 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
7417 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
7418 to construct tree_niter_desc and destruct it on failure.
7419 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
7420 * gengtype.cc (main): Remove widest_int handling.
7421 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
7422 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
7423 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
7424 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
7425 assert get_len () fits into it.
7426 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
7427 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
7429 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
7430 wide_int::from on wi::to_wide instead of wi::to_widest.
7431 * omp-general.cc (score_wide_int): New typedef.
7432 (omp_context_compute_score): Use score_wide_int instead of widest_int
7433 and adjust for those changes.
7434 (struct omp_declare_variant_entry): Change score and
7435 score_in_declare_simd_clone non-static data member type from widest_int
7437 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
7438 score_wide_int instead of widest_int and adjust for those changes.
7439 (omp_lto_output_declare_variant_alt): Likewise.
7440 (omp_lto_input_declare_variant_alt): Likewise.
7441 * godump.cc (go_output_typedef): Assert get_len () is smaller than
7442 WIDE_INT_MAX_INL_ELTS.
7444 2023-10-12 Pan Li <pan2.li@intel.com>
7446 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
7447 pattern for lround/lroundf.
7448 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
7449 (expand_vec_lround): New func decl for expanding lround.
7450 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
7451 for expanding lround.
7453 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7455 * dwarf2out.h (wide_int_ptr): Remove.
7456 (dw_wide_int_ptr): New typedef.
7457 (struct dw_val_node): Change type of val_wide from wide_int_ptr
7459 (struct dw_wide_int): New type.
7460 (dw_wide_int::elt): New method.
7461 (dw_wide_int::operator ==): Likewise.
7462 * dwarf2out.cc (get_full_len): Change argument type to
7463 const dw_wide_int & from const wide_int &. Use CEIL. Call
7464 get_precision method instead of calling wi::get_precision.
7465 (alloc_dw_wide_int): New function.
7466 (add_AT_wide): Change w argument type to const wide_int_ref &
7467 from const wide_int &. Use alloc_dw_wide_int.
7468 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
7469 (insert_wide_int): Change val argument type to const wide_int_ref &
7470 from const wide_int &.
7471 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
7472 add_AT_wide instead of using a temporary variable.
7474 2023-10-12 Richard Biener <rguenther@suse.de>
7476 PR tree-optimization/111764
7477 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
7478 to allow x + x via special-casing of assigns.
7480 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
7482 * common/config/i386/cpuinfo.h (get_available_features):
7484 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
7485 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
7486 (ix86_handle_option): Handle -musermsr.
7487 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7488 Add FEATURE_USER_MSR.
7489 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
7490 * config.gcc: Add usermsrintrin.h
7491 * config/i386/cpuid.h (bit_USER_MSR): New.
7492 * config/i386/i386-builtin-types.def:
7493 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
7494 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
7495 Add __builtin_urdmsr and __builtin_uwrmsr.
7496 * config/i386/i386-builtins.h (ix86_builtins):
7497 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
7498 * config/i386/i386-c.cc (ix86_target_macros_internal):
7499 Define __USER_MSR__.
7500 * config/i386/i386-expand.cc (ix86_expand_builtin):
7501 Handle new builtins.
7502 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
7503 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
7505 * config/i386/i386.md (urdmsr): New define_insn.
7507 * config/i386/i386.opt: Add option -musermsr.
7508 * config/i386/x86gprintrin.h: Include usermsrintrin.h
7509 * doc/extend.texi: Document usermsr.
7510 * doc/invoke.texi: Document -musermsr.
7511 * doc/sourcebuild.texi: Document target usermsr.
7512 * config/i386/usermsrintrin.h: New file.
7514 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
7516 * config.gcc: Add loongarch-driver.h to tm_files.
7517 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
7518 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
7519 instead of $(TM_H) for building generator programs.
7521 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7524 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
7525 instruction emission and incorporate to stack_protect_set<mode>.
7526 (stack_protect_setdi): Rename to ...
7527 (stack_protect_set<mode>): ... this, adjust constraint.
7528 (stack_protect_testsi): Support prefixed instruction emission and
7529 incorporate to stack_protect_test<mode>.
7530 (stack_protect_testdi): Rename to ...
7531 (stack_protect_test<mode>): ... this, adjust constraint.
7533 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7535 * tree-vect-stmts.cc (vectorizable_store): Consider generated
7536 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
7539 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7541 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
7542 (vectorizable_store): Adjust the costing for the remaining memory
7543 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
7545 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7547 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
7548 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
7550 (vectorizable_store): Adjust the cost handling on
7551 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
7553 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7555 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
7556 get VMAT_LOAD_STORE_LANES.
7557 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
7558 without calling vect_model_store_cost. Factor out new lambda function
7559 update_prologue_cost.
7561 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7563 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
7564 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
7566 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
7567 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
7569 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7571 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
7572 vectorizable_scan_store without calling vect_model_store_cost
7575 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7577 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
7578 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
7579 handlings and the related parameter gs_info.
7580 (vect_build_scatter_store_calls): Add the handlings on costing with
7581 one more argument cost_vec.
7582 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
7583 without calling vect_model_store_cost any more.
7585 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7587 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
7588 to vect_model_store_cost down to some different transform paths
7589 according to the handlings of different vect_memory_access_types
7590 or some special handling need.
7592 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7594 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
7595 vector store for some case of VMAT_ELEMENTWISE is supported.
7597 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
7598 Hu Lin1 <lin1.hu@intel.com>
7599 Hongyu Wang <hongyu.wang@intel.com>
7601 * config/i386/i386.cc (gen_push2): New function to emit push2
7602 and adjust cfa offset.
7603 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
7604 determine whether push2/pop2 can be used.
7605 (ix86_compute_frame_layout): Adjust preferred stack boundary
7606 and stack alignment needed for push2/pop2.
7607 (ix86_emit_save_regs): Emit push2 when available.
7608 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
7609 and adjust cfa info.
7610 (ix86_emit_restore_regs_using_pop2): New function to loop
7611 through the saved regs and call above.
7612 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
7613 when push2pop2 available.
7614 * config/i386/i386.md (push2_di): New pattern for push2.
7615 (pop2_di): Likewise for pop2.
7617 2023-10-12 Pan Li <pan2.li@intel.com>
7619 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
7620 (lrint<mode><v_i_l_ll_convert>2): Rename to.
7621 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
7623 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7625 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
7627 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
7629 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
7630 pseudo op instead of a "call" pseudo op.
7632 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7634 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
7636 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
7637 (riscv_subset_list::clone): Ditto.
7638 (riscv_subset_list::parse_single_ext): Ditto.
7639 (riscv_subset_list::set_loc): Ditto.
7640 (riscv_set_arch_by_subset_list): Ditto.
7641 * common/config/riscv/riscv-common.cc
7642 (riscv_subset_list::parse_single_std_ext): New.
7643 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
7644 (riscv_subset_list::clone): Ditto.
7645 (riscv_subset_list::parse_single_ext): Ditto.
7646 (riscv_subset_list::set_loc): Ditto.
7647 (riscv_set_arch_by_subset_list): Ditto.
7649 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7651 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
7652 from argument rather than get setting from global setting.
7653 (riscv_override_options_internal): New, splited from
7654 riscv_override_options, also take a gcc_options argument.
7655 (riscv_option_override): Splited most part to
7656 riscv_override_options_internal.
7658 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7660 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
7661 TARGET_<NAME>_OPTS_P.
7662 (InverseMask): Ditto.
7663 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
7664 TARGET_<NAME>_OPTS_P macro.
7665 (InverseMask): Ditto.
7667 2023-10-11 Andrew Pinski <pinskia@gmail.com>
7669 PR tree-optimization/111282
7670 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
7671 `a & ((~a) ^ b)`): New patterns.
7673 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
7675 * common/config/riscv/riscv-common.cc: Add the XCValu
7677 * config/riscv/constraints.md: Add builtins for the XCValu
7679 * config/riscv/predicates.md (immediate_register_operand):
7681 * config/riscv/corev.def: Likewise.
7682 * config/riscv/corev.md: Likewise.
7683 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
7684 (RISCV_ATYPE_UHI): Likewise.
7685 * config/riscv/riscv-ftypes.def: Likewise.
7686 * config/riscv/riscv.opt: Likewise.
7687 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
7688 * doc/extend.texi: Add XCValu documentation.
7689 * doc/sourcebuild.texi: Likewise.
7691 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
7693 * common/config/riscv/riscv-common.cc: Add XCVmac.
7694 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
7695 * config/riscv/riscv-builtins.cc: Likewise.
7696 * config/riscv/riscv.md: Likewise.
7697 * config/riscv/riscv.opt: Likewise.
7698 * doc/extend.texi: Add XCVmac builtin documentation.
7699 * doc/sourcebuild.texi: Likewise.
7700 * config/riscv/corev.def: New file.
7701 * config/riscv/corev.md: New file.
7703 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7705 * config/riscv/autovec.md: Fix index bug.
7706 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
7707 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
7708 (gather_scatter_valid_offset_mode_p): New function.
7710 2023-10-11 Pan Li <pan2.li@intel.com>
7712 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
7714 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
7716 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
7718 (expand_vec_lrint): New function impl for expanding lint.
7719 * config/riscv/vector-iterators.md: New mode attr and iterator.
7721 2023-10-11 Richard Biener <rguenther@suse.de>
7722 Jakub Jelinek <jakub@redhat.com>
7724 PR tree-optimization/111519
7725 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
7726 argument and pass it through to recursive calls and
7727 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
7728 change stmt for gimple_assign_single_p statements for which we don't
7730 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
7731 it through to recursive calls and count_nonzero_bytes calls. Don't
7732 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
7733 shadow the stmt argument.
7735 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
7737 PR middle-end/101955
7738 PR tree-optimization/106245
7739 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
7740 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
7742 2023-10-11 liuhongt <hongtao.liu@intel.com>
7745 * config/i386/mmx.md (divv4hf3): Refine predicate of
7746 operands[2] with register_operand.
7748 2023-10-10 Andrew Waterman <andrew@sifive.com>
7749 Philipp Tomsich <philipp.tomsich@vrull.eu>
7750 Jeff Law <jlaw@ventanamicro.com>
7752 * config/riscv/riscv.cc (struct machine_function): Track if a
7753 far-branch/jump is used within a function (and $ra needs to be
7755 (riscv_print_operand): Implement 'N' (inverse integer branch).
7756 (riscv_far_jump_used_p): Implement.
7757 (riscv_save_return_addr_reg_p): New function.
7758 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
7759 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
7760 (CALL_USED_REGISTERS): Update $ra.
7761 * config/riscv/riscv.md: Add new types "ret" and "jalr".
7762 (length attribute): Handle long conditional and unconditional
7764 (conditional branch pattern): Handle case where jump can not
7765 reach the intended target.
7766 (indirect_jump, tablejump): Use new "jalr" type.
7767 (simple_return): Use new "ret" type.
7768 (simple_return_internal, eh_return_internal): Likewise.
7769 (gpr_restore_return, riscv_mret): Likewise.
7770 (riscv_uret, riscv_sret): Likewise.
7771 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
7773 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
7775 2023-10-10 Andrew Pinski <pinskia@gmail.com>
7777 PR tree-optimization/111679
7778 * match.pd (`a | ((~a) ^ b)`): New pattern.
7780 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7783 * config/riscv/autovec.md: Add VLS BOOL modes.
7785 2023-10-10 Richard Biener <rguenther@suse.de>
7787 PR tree-optimization/111751
7788 * fold-const.cc (fold_view_convert_expr): Up the buffer size
7790 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
7791 constants, giving up when re-interpretation to the target type
7794 2023-10-10 Richard Biener <rguenther@suse.de>
7796 PR tree-optimization/111751
7797 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
7798 BLKmode result from the padding bits check.
7800 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
7802 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
7804 * config/arc/arc.md (addsi_compare): Make pattern canonical.
7805 (addsi_compare_2): Fix identation, constraint letters.
7806 (addsi_compare_3): Likewise.
7808 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
7810 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
7811 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
7812 when scaling loop profile
7814 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
7816 PR tree-optimization/111694
7817 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
7819 * value-relation.cc (adjust_equivalence_range): New.
7820 * value-relation.h (adjust_equivalence_range): New prototype.
7822 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
7824 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
7825 not call get_identity_relation.
7826 (gori_compute::compute_operand2_range): Ditto.
7827 * value-relation.cc (get_identity_relation): Remove.
7828 * value-relation.h (get_identity_relation): Remove protyotype.
7830 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
7832 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
7833 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
7835 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
7837 (TARGET_SCHED_ADJUST_COST): Define.
7838 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
7839 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
7840 * config/riscv/generic-ooo.md: New file.
7841 * config/riscv/vector.md: Add vsetvl_pre.
7843 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7845 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
7846 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
7847 * config/riscv/vector.md (movmisalign<mode>): New pattern.
7849 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
7851 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
7852 directives for store-pair instruction.
7854 2023-10-09 Richard Biener <rguenther@suse.de>
7856 PR tree-optimization/111715
7857 * alias.cc (reference_alias_ptr_type_1): When we have
7858 a type-punning ref at the base search for the access
7859 path part that's still semantically valid.
7861 2023-10-09 Pan Li <pan2.li@intel.com>
7863 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
7865 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
7867 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
7869 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
7870 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
7872 (ix86_split_lshr): Likewise, split shifts by one bit into
7873 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
7874 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
7875 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
7876 (rcrdi2): New define_insn for rcrq.
7877 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
7878 set the carry flag from the least significant bit, modelled using
7880 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
7881 controlling use of rcr 1 vs. shrd, which is significantly faster on
7884 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7886 * config/i386/i386.opt: Allow -mno-evex512.
7888 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7889 Hu, Lin1 <lin1.hu@intel.com>
7891 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
7894 (VFH_AVX512VL): Ditto.
7896 (VHF_AVX512VL): Ditto.
7897 (VI2H_AVX512VL): Ditto.
7898 (VI2F_256_512): Ditto.
7899 (VF48_I1248): Remove unused iterator.
7900 (VF48H_AVX512VL): Add TARGET_EVEX512.
7901 (VF_AVX512): Remove unused iterator.
7902 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
7903 (REDUC_SMINMAX_MODE): Ditto.
7905 (VFH_SF_AVX512VL): Ditto.
7906 (VEC_PERM_AVX2): Ditto.
7908 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7909 Hu, Lin1 <lin1.hu@intel.com>
7911 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
7913 (VI1_AVX512F): Ditto.
7914 (VI1_AVX512VNNI): Ditto.
7915 (VI1_AVX512VL_F): Ditto.
7916 (VI12_VI48F_AVX512VL): Ditto.
7917 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
7918 (sdot_prod<mode>): Ditto.
7919 (VEC_PERM_AVX2): Ditto.
7922 (vpmadd52<vpmadd52type>v8di): Ditto.
7923 (usdot_prod<mode>): Ditto.
7924 (vpdpbusd_v16si): Ditto.
7925 (vpdpbusds_v16si): Ditto.
7926 (vpdpwssd_v16si): Ditto.
7927 (vpdpwssds_v16si): Ditto.
7928 (VI48_AVX512VP2VL): Ditto.
7929 (avx512vp2intersect_2intersectv16si): Ditto.
7930 (VF_AVX512BF16VL): Ditto.
7931 (VF1_AVX512_256): Ditto.
7933 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7935 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
7936 Make sure there is EVEX512 enabled.
7937 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
7938 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
7939 when !TARGET_EVEX512.
7940 * config/i386/i386.md (avx512bw_512): New.
7941 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
7942 (*zero_extendsidi2): Change isa to avx512bw_512.
7945 (*andn<mode>_1): Change isa to kmov_isa.
7946 (*<code><mode>_1): Ditto.
7947 (*notxor<mode>_1): Ditto.
7948 (*one_cmpl<mode>2_1): Ditto.
7949 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
7950 (*ashl<mode>3_1): Change isa to kmov_isa.
7951 (*lshr<mode>3_1): Ditto.
7952 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
7953 (VI1248_AVX512VLBW): Ditto.
7954 (VHFBF_AVX512VL): Ditto.
7958 (VI1_AVX512): Ditto.
7959 (VI12_256_512_AVX512VL): Ditto.
7960 (VI2_AVX2_AVX512BW): Ditto.
7961 (VI2_AVX512VNNIBW): Ditto.
7962 (VI2_AVX512VL): Ditto.
7963 (VI2HFBF_AVX512VL): Ditto.
7964 (VI8_AVX2_AVX512BW): Ditto.
7965 (VIMAX_AVX2_AVX512BW): Ditto.
7966 (VIMAX_AVX512VL): Ditto.
7967 (VI12_AVX2_AVX512BW): Ditto.
7968 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
7969 (VI248_AVX512VL): Ditto.
7970 (VI248_AVX512VLBW): Ditto.
7971 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
7972 (VI248_AVX512BW): Ditto.
7973 (VI248_AVX512BW_AVX512VL): Ditto.
7975 (VI124_256_AVX512F_AVX512BW): Ditto.
7976 (VI_AVX512BW): Ditto.
7977 (VIHFBF_AVX512BW): Ditto.
7978 (SWI1248_AVX512BWDQ): Ditto.
7979 (SWI1248_AVX512BW): Ditto.
7980 (SWI1248_AVX512BWDQ2): Ditto.
7981 (*knotsi_1_zext): Ditto.
7982 (define_split for zero_extend + not): Ditto.
7984 (REDUC_SMINMAX_MODE): Ditto.
7985 (VEC_EXTRACT_MODE): Ditto.
7986 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
7987 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
7988 (truncv32hiv32qi2): Ditto.
7989 (avx512bw_<code>v32hiv32qi2): Ditto.
7990 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
7991 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
7993 (VEC_PERM_AVX2): Ditto.
7994 (AVX512ZEXTMASK): Ditto.
7996 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
7997 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
7998 (avx512bw_packssdw<mask_name>): Ditto.
7999 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
8000 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
8001 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
8002 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
8003 (vec_unpacks_lo_di): Ditto.
8005 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
8006 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
8007 (VI1248_AVX512VL_AVX512BW): Ditto.
8008 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
8009 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
8010 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
8011 (<insn>v32qiv32hi2): Ditto.
8012 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
8013 (VPERMI2): Add TARGET_EVEX512.
8016 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8018 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
8019 Add TARGET_EVEX512 for 512 bit usage.
8020 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
8021 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
8022 (VF1_128_256VL): Ditto.
8023 (VF2_AVX512VL): Ditto.
8024 (VI8_256_512): Ditto.
8025 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
8027 (AVX512_VEC): Ditto.
8028 (AVX512_VEC_2): Ditto.
8029 (VI4F_BRCST32x2): Ditto.
8030 (VI8F_BRCST64x2): Ditto.
8032 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8034 * config/i386/i386-builtins.cc
8035 (ix86_vectorize_builtin_gather): Disable 512 bit gather
8036 when !TARGET_EVEX512.
8037 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
8039 (ix86_expand_int_sse_cmp): Ditto.
8040 (ix86_expand_vector_init_one_nonzero): Disable subroutine
8041 when !TARGET_EVEX512.
8042 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
8043 (ix86_vectorize_vec_perm_const): Disable subroutine when
8045 * config/i386/i386.cc
8046 (standard_sse_constant_p): Add TARGET_EVEX512.
8047 (standard_sse_constant_opcode): Ditto.
8048 (ix86_get_ssemov): Ditto.
8049 (ix86_legitimate_constant_p): Ditto.
8050 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
8051 when !TARGET_EVEX512.
8052 * config/i386/i386.md (avx512f_512): New.
8053 (movxi): Add TARGET_EVEX512.
8054 (*movxi_internal_avx512f): Ditto.
8055 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
8057 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
8059 (*movhi_internal): Change alternative 11 to *Yv.
8060 (*movdf_internal): Change alternative 12 to Yv.
8061 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
8062 alternative 5 and 6.
8063 (*mov<mode>_internal): Change alternative 4 to Yv.
8064 (define_split for convert SF to DF): Add TARGET_EVEX512.
8065 (extendbfsf2_1): Ditto.
8066 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
8067 for 512 bit when !TARGET_EVEX512.
8068 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
8069 (V48_AVX512VL): Ditto.
8070 (V48_256_512_AVX512VL): Ditto.
8071 (V48H_AVX512VL): Ditto.
8072 (VI12_AVX512VL): Ditto.
8077 (VF1_VF2_AVX512DQ): Ditto.
8084 (VF2_512_256): Ditto.
8085 (VF2_512_256VL): Ditto.
8088 (VI48_AVX512VL): Ditto.
8089 (VI1248_AVX512VLBW): Ditto.
8090 (VF_AVX512VL): Ditto.
8091 (VFH_AVX512VL): Ditto.
8092 (VF1_AVX512VL): Ditto.
8097 (VI8_AVX512VL): Ditto.
8098 (VI2_AVX512F): Ditto.
8099 (VI4_AVX512F): Ditto.
8100 (VI4_AVX512VL): Ditto.
8101 (VI48_AVX512F_AVX512VL): Ditto.
8102 (VI8_AVX2_AVX512F): Ditto.
8103 (VI8_AVX_AVX512F): Ditto.
8106 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
8107 (VI248_AVX512VLBW): Ditto.
8108 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
8109 (VI248_AVX512BW): Ditto.
8110 (VI248_AVX512BW_AVX512VL): Ditto.
8111 (VI48_AVX512F): Ditto.
8112 (VI48_AVX_AVX512F): Ditto.
8113 (VI12_AVX_AVX512F): Ditto.
8115 (VI124_256_AVX512F_AVX512BW): Ditto.
8117 (VI_AVX512BW): Ditto.
8118 (VIHFBF_AVX512BW): Ditto.
8119 (VI4F_256_512): Ditto.
8120 (VI48F_256_512): Ditto.
8122 (VI12_VI48F_AVX512VL): Ditto.
8124 (AVX512MODE2P): Ditto.
8125 (STORENT_MODE): Ditto.
8126 (REDUC_PLUS_MODE): Ditto.
8127 (REDUC_SMINMAX_MODE): Ditto.
8128 (*andnot<mode>3): Change isa attribute to avx512f_512.
8129 (*andnot<mode>3): Ditto.
8130 (<code><mode>3): Ditto.
8132 (FMAMODEM): Add TARGET_EVEX512.
8133 (FMAMODE_AVX512): Ditto.
8134 (VFH_SF_AVX512VL): Ditto.
8135 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
8136 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
8138 (avx512f_cvtdq2pd512_2): Ditto.
8139 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
8140 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
8142 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
8143 (vec_unpacks_lo_v16sf): Ditto.
8144 (vec_unpacks_hi_v16sf): Ditto.
8145 (vec_unpacks_float_hi_v16si): Ditto.
8146 (vec_unpacks_float_lo_v16si): Ditto.
8147 (vec_unpacku_float_hi_v16si): Ditto.
8148 (vec_unpacku_float_lo_v16si): Ditto.
8149 (vec_pack_sfix_trunc_v8df): Ditto.
8150 (avx512f_vec_pack_sfix_v8df): Ditto.
8151 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
8152 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
8153 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
8154 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
8155 (AVX512_VEC): Ditto.
8156 (AVX512_VEC_2): Ditto.
8157 (vec_extract_lo_v64qi): Ditto.
8158 (vec_extract_hi_v64qi): Ditto.
8159 (VEC_EXTRACT_MODE): Ditto.
8160 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
8161 (avx512f_movddup512<mask_name>): Ditto.
8162 (avx512f_unpcklpd512<mask_name>): Ditto.
8163 (*<avx512>_vternlog<mode>_all): Ditto.
8164 (*<avx512>_vpternlog<mode>_1): Ditto.
8165 (*<avx512>_vpternlog<mode>_2): Ditto.
8166 (*<avx512>_vpternlog<mode>_3): Ditto.
8167 (avx512f_shufps512_mask): Ditto.
8168 (avx512f_shufps512_1<mask_name>): Ditto.
8169 (avx512f_shufpd512_mask): Ditto.
8170 (avx512f_shufpd512_1<mask_name>): Ditto.
8171 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
8172 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
8173 (vec_dupv2df<mask_name>): Ditto.
8174 (trunc<pmov_src_lower><mode>2): Ditto.
8175 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
8176 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
8177 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
8178 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
8179 (truncv8div8qi2): Ditto.
8180 (avx512f_<code>v8div16qi2): Ditto.
8181 (*avx512f_<code>v8div16qi2_store_1): Ditto.
8182 (*avx512f_<code>v8div16qi2_store_2): Ditto.
8183 (avx512f_<code>v8div16qi2_mask): Ditto.
8184 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
8185 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
8186 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
8187 (vec_widen_umult_even_v16si<mask_name>): Ditto.
8188 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
8189 (vec_widen_smult_even_v16si<mask_name>): Ditto.
8190 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
8191 (VEC_PERM_AVX2): Ditto.
8192 (one_cmpl<mode>2): Ditto.
8193 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
8194 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
8195 (define_split to xor): Ditto.
8196 (*andnot<mode>3): Ditto.
8197 (define_split for ior): Ditto.
8198 (*iornot<mode>3): Ditto.
8199 (*xnor<mode>3): Ditto.
8200 (*<nlogic><mode>3): Ditto.
8201 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
8202 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
8203 (avx512f_pshufdv3_mask): Ditto.
8204 (avx512f_pshufd_1<mask_name>): Ditto.
8205 (*vec_extractv4ti): Ditto.
8206 (VEXTRACTI128_MODE): Ditto.
8207 (define_split to vec_extract): Ditto.
8208 (VI1248_AVX512VL_AVX512BW): Ditto.
8209 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
8210 (<insn>v16qiv16si2): Ditto.
8211 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
8212 (<insn>v16hiv16si2): Ditto.
8213 (avx512f_zero_extendv16hiv16si2_1): Ditto.
8214 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
8215 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
8216 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
8217 (<insn>v8qiv8di2): Ditto.
8218 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
8219 (<insn>v8hiv8di2): Ditto.
8220 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
8221 (*avx512f_zero_extendv8siv8di2_1): Ditto.
8222 (*avx512f_zero_extendv8siv8di2_2): Ditto.
8223 (<insn>v8siv8di2): Ditto.
8224 (avx512f_roundps512_sfix): Ditto.
8225 (vashrv8di3): Ditto.
8226 (vashrv16si3): Ditto.
8227 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
8228 (vec_dupv4sf): Add TARGET_EVEX512.
8229 (*vec_dupv4si): Ditto.
8230 (*vec_dupv2di): Ditto.
8231 (vec_dup<mode>): Change isa attribute to avx512f_512.
8232 (VPERMI2): Add TARGET_EVEX512.
8234 (VEC_INIT_MODE): Ditto.
8235 (VEC_INIT_HALF_MODE): Ditto.
8236 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
8238 (avx512f_vcvtps2ph512_mask_sae): Ditto.
8239 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
8241 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
8242 (INT_BROADCAST_MODE): Ditto.
8244 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8246 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
8247 Disable zmm broadcast for !TARGET_EVEX512.
8248 * config/i386/i386-options.cc (ix86_option_override_internal):
8249 Do not use PVW_512 when no-evex512.
8250 (ix86_simd_clone_adjust): Add evex512 target into string.
8251 * config/i386/i386.cc (type_natural_mode): Report ABI warning
8252 when using zmm register w/o evex512.
8253 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
8254 (ix86_hard_regno_mode_ok): Ditto.
8255 (ix86_set_reg_reg_cost): Ditto.
8256 (ix86_rtx_costs): Ditto.
8257 (ix86_vector_mode_supported_p): Ditto.
8258 (ix86_preferred_simd_mode): Ditto.
8259 (ix86_get_mask_mode): Ditto.
8260 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
8261 libmvec call when !TARGET_EVEX512.
8262 (ix86_simd_clone_usable): Ditto.
8263 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
8264 when !TARGET_EVEX512
8265 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
8266 (STORE_MAX_PIECES): Ditto.
8268 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8270 * config/i386/i386-builtin.def (BDESC): Add
8271 OPTION_MASK_ISA2_EVEX512.
8273 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8275 * config/i386/i386-builtin.def (BDESC): Add
8276 OPTION_MASK_ISA2_EVEX512.
8278 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8280 * config/i386/i386-builtin.def (BDESC): Add
8281 OPTION_MASK_ISA2_EVEX512.
8283 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8285 * config/i386/i386-builtin.def (BDESC): Add
8286 OPTION_MASK_ISA2_EVEX512.
8288 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8290 * config/i386/i386-builtin.def (BDESC): Add
8291 OPTION_MASK_ISA2_EVEX512.
8292 * config/i386/i386-builtins.cc
8293 (ix86_init_mmx_sse_builtins): Ditto.
8295 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8296 Hu, Lin1 <lin1.hu@intel.com>
8298 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
8301 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8303 * config.gcc: Add avx512bitalgvlintrin.h.
8304 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
8306 * config/i386/avx5124vnniwintrin.h: Ditto.
8307 * config/i386/avx512bf16intrin.h: Ditto.
8308 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
8309 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
8310 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
8312 * config/i386/avx512ifmaintrin.h: Ditto
8313 * config/i386/avx512pfintrin.h: Ditto
8314 * config/i386/avx512vbmi2intrin.h: Ditto.
8315 * config/i386/avx512vbmiintrin.h: Ditto.
8316 * config/i386/avx512vnniintrin.h: Ditto.
8317 * config/i386/avx512vp2intersectintrin.h: Ditto.
8318 * config/i386/avx512vpopcntdqintrin.h: Ditto.
8319 * config/i386/gfniintrin.h: Ditto.
8320 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
8321 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
8322 * config/i386/vpclmulqdqintrin.h: Ditto.
8323 * config/i386/avx512bitalgvlintrin.h: New.
8325 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8327 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
8330 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8332 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
8335 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8337 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
8339 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
8341 * common/config/i386/i386-common.cc
8342 (OPTION_MASK_ISA2_EVEX512_SET): New.
8343 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
8344 (ix86_handle_option): Handle EVEX512.
8345 * config/i386/i386-c.cc
8346 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
8347 when AVX512VL is set.
8348 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
8349 (ix86_valid_target_attribute_inner_p): Ditto.
8350 (ix86_option_override_internal): Set EVEX512 target if it is not
8351 explicitly set when AVX512 is enabled. Disable
8352 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
8353 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
8355 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
8358 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
8359 from insn condition.
8360 (lrint<mode>si2): New insn pattern for 32bit lrint.
8362 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
8365 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
8366 Enable SImode on FP registers for P7.
8367 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
8368 move between FP registers. Set attribute isa of stfiwx to "*"
8369 and attribute of stxsiwx to "p7".
8371 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8373 * config/s390/s390.md: Make use of new copysign RTL.
8375 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
8377 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
8378 with "jm" for alternative 0 and 1 of operand 2.
8379 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
8380 "ja" for alternative 0 and 1 of operand2.
8382 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8385 * text-art/table.cc (table::maybe_set_cell_span): New.
8386 (table::add_other_table): New.
8387 * text-art/table.h (class table::cell_placement): Add class table
8389 (table::add_rows): New.
8390 (table::add_row): Reimplement in terms of add_rows.
8391 (table::maybe_set_cell_span): New decl.
8392 (table::add_other_table): New decl.
8393 * text-art/types.h (operator+): New operator for rect + coord.
8395 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8397 * genmatch.cc (main): Update for "m_" prefix of some fields of
8399 * input.cc (make_location): Update for removal of
8400 COMBINE_LOCATION_DATA.
8401 (dump_line_table_statistics): Update for "m_" prefix of some
8402 fields of line_maps.
8403 (location_with_discriminator): Update for removal of
8404 COMBINE_LOCATION_DATA.
8405 (line_table_test::line_table_test): Update for "m_" prefix of some
8406 fields of line_maps.
8407 * toplev.cc (general_init): Likewise.
8408 * tree.cc (set_block): Update for removal of
8409 COMBINE_LOCATION_DATA.
8410 (set_source_range): Likewise.
8412 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8414 * input.cc (make_location): Move implementation to
8415 line_maps::make_location.
8417 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8420 * input.cc (file_cache::add_file): Update leading comment to
8421 clarify that it can fail.
8422 (file_cache::lookup_or_add_file): Likewise.
8423 (file_cache::get_source_file_content): Gracefully handle
8424 lookup_or_add_file failing.
8426 2023-10-08 liuhongt <hongtao.liu@intel.com>
8428 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
8430 (ix86_build_signbit_mask): Ditto.
8431 * config/i386/mmx.md (mmxintvecmode): Ditto.
8432 (<code><mode>2): New define_expand.
8433 (*mmx_<code><mode>): New define_insn_and_split.
8434 (*mmx_nabs<mode>2): Ditto.
8435 (*mmx_andnot<mode>3): New define_insn.
8436 (<code><mode>3): Ditto.
8437 (copysign<mode>3): New define_expand.
8438 (xorsign<mode>3): Ditto.
8439 (signbit<mode>2): Ditto.
8441 2023-10-08 liuhongt <hongtao.liu@intel.com>
8443 * config/i386/mmx.md (VHF_32_64): New mode iterator.
8444 (<insn><mode>3): New define_expand, merged from ..
8445 (<insn>v4hf3): .. this and
8446 (<insn>v2hf3): .. this.
8447 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
8448 (movd_v2hf_to_sse): .. this.
8449 (<code><mode>3): New define_expand.
8451 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8453 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
8454 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
8456 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8458 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
8460 (can_be_built_by_li_lis_and_rldicr): New function.
8461 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
8462 can_be_built_by_li_lis_and_rldicl.
8464 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8466 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
8468 (can_be_built_by_li_and_rotldi): Rename to ...
8469 (can_be_built_by_li_lis_and_rotldi): ... this function.
8470 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
8472 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8474 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
8475 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
8477 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
8479 * config/riscv/linux.h: Pass the static-pie specific options to
8482 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
8484 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
8486 * config/aarch64/aarch64-tune.md: Regenerated.
8487 * doc/invoke.texi: Add command-line option for cortex-x4 core.
8489 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8490 Hongyu Wang <hongyu.wang@intel.com>
8491 Hongtao Liu <hongtao.liu@intel.com>
8493 * config/i386/constraints.md (jb): New constraint for vsib memory
8494 that does not allow gpr32.
8495 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
8496 alternative and set attr_gpr32 to 0.
8497 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
8499 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
8500 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
8501 (*rsqrtsf2_sse): Likewise.
8502 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
8503 avx/noavx and assign jr/r constraint to dest.
8504 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
8505 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
8506 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
8507 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
8508 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
8509 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
8510 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
8511 (<sse2_avx2>_pmovmskb): Likewise.
8512 (*<sse2_avx2>_pmovmskb_zext): Likewise.
8513 (*sse2_pmovmskb_ext): Likewise.
8514 (*<sse2_avx2>_pmovmskb_lt): Likewise.
8515 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
8516 (*sse2_pmovmskb_ext_lt): Likewise.
8517 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
8518 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
8519 (sse_vmrcpv4sf2): Likewise.
8520 (*sse_vmrcpv4sf2): Likewise.
8521 (rsqrt<mode>2): Likewise.
8522 (sse_vmrsqrtv4sf2): Likewise.
8523 (*sse_vmrsqrtv4sf2): Likewise.
8524 (avx_h<insn>v4df3): Likewise.
8525 (sse3_hsubv2df3): Likewise.
8526 (avx_h<insn>v8sf3): Likewise.
8527 (sse3_h<insn>v4sf3): Likewise.
8528 (<sse3>_lddqu<avxsizesuffix>): Likewise.
8529 (avx_cmp<mode>3): Likewise.
8530 (avx_vmcmp<mode>3): Likewise.
8531 (*sse2_gt<mode>3): Likewise.
8532 (sse_ldmxcsr): Likewise.
8533 (sse_stmxcsr): Likewise.
8534 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
8535 avx alternative and set attr_gpr32 to 0.
8536 (avx2_permv2ti): Likewise.
8537 (*avx_vperm2f128<mode>_full): Likewise.
8538 (*avx_vperm2f128<mode>_nozero): Likewise.
8539 (vec_set_lo_v32qi): Likewise.
8540 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
8541 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
8542 (avx_cmp<mode>3): Likewise.
8543 (avx_vmcmp<mode>3): Likewise.
8544 (*<sse>_maskcmp<mode>3_comm): Likewise.
8545 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
8547 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
8548 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
8549 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
8550 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
8551 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
8552 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
8553 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
8554 (vec_set_lo_<mode><mask_name>): Likewise.
8555 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
8556 (vec_set_hi_<mode><mask_name>): Likewise.
8557 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
8558 (vec_set_hi_<mode>): Likewise.
8559 (vec_set_lo_<mode>): Likewise.
8560 (avx2_set_hi_v32qi): Likewise.
8562 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8563 Hongyu Wang <hongyu.wang@intel.com>
8564 Hongtao Liu <hongtao.liu@intel.com>
8566 * config/i386/i386.md (*movhi_internal): Split out non-gpr
8567 supported pextrw with mem constraint to avx/noavx alternatives,
8568 set jm and attr gpr32 0 to the noavx alternative.
8569 (*mov<mode>_internal): Likewise.
8570 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
8571 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
8572 (mmx_pshufbv4qi3): Likewise.
8573 (*mmx_pinsrd): Likewise.
8574 (*mmx_pinsrb): Likewise.
8575 (*pinsrb): Likewise.
8576 (mmx_pshufbv8qi3): Likewise.
8577 (mmx_pshufbv4qi3): Likewise.
8578 (@sse4_1_insertps_<mode>): Likewise.
8579 (*mmx_pextrw): Split altrenatives and map non-EGPR
8580 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
8581 (*movv2qi_internal): Likewise.
8582 (*pextrw): Likewise.
8583 (*mmx_pextrb): Likewise.
8584 (*mmx_pextrb_zext): Likewise.
8585 (*pextrb): Likewise.
8586 (*pextrb_zext): Likewise.
8587 (vec_extractv2si_1): Likewise.
8588 (vec_extractv2si_1_zext): Likewise.
8589 * config/i386/sse.md: (vi128_h_r): New mode attr for
8590 pinsr{bw}/pextr{bw} with reg operand.
8591 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
8592 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
8593 (*vec_extract<mode>): Likewise.
8594 (*vec_extract<mode>): Likewise for HFBF pattern.
8595 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
8596 (*vec_extractv4si_1): Likewise.
8597 (*vec_extractv4si_zext): Likewise.
8598 (*vec_extractv2di_1): Likewise.
8599 (*vec_concatv2si_sse4_1): Likewise.
8600 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
8601 (vec_concatv2di): Likewise.
8602 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
8603 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
8604 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
8605 %v for avx/noavx alternatives if necessary.
8606 (*vec_concatv2sf_sse4_1): Likewise.
8607 (*sse4_1_extractps): Likewise.
8608 (vec_set<mode>_0): Likewise for VI4F_128.
8609 (*vec_setv4sf_sse4_1): Likewise.
8610 (@sse4_1_insertps<mode>): Likewise.
8611 (ssse3_pmaddubsw128): Likewise.
8612 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
8613 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
8614 (<ssse3_avx2>_palignr<mode>): Likewise.
8615 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
8616 (<sse4_1_avx2>_mpsadbw): Likewise.
8617 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
8618 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
8619 (*sse4_1_<code><mode>3<mask_name>): Likewise.
8620 (*<code>v8hi3): Likewise.
8621 (*<code>v16qi3): Likewise.
8622 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
8623 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
8624 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
8625 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
8626 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
8627 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
8628 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
8629 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
8630 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
8631 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
8632 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
8634 (aesdeclast): Likewise.
8636 (aesenclast): Likewise.
8637 (pclmulqdq): Likewise.
8638 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
8639 (vgf2p8affineqb_<mode><mask_name>): Likewise.
8640 (vgf2p8mulb_<mode><mask_name>): Likewise.
8642 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8643 Hongyu Wang <hongyu.wang@intel.com>
8644 Hongtao Liu <hongtao.liu@intel.com>
8646 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
8648 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
8650 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
8651 and constraint jm to all non-evex alternatives, adjust
8652 alternative outputs if evex reg is mentioned.
8653 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
8654 and constraint jm/ja to all non-evex alternatives.
8655 (ptesttf2): Likewise.
8656 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
8657 (sse4_1_round<ssescalarmodesuffix>): Likewise.
8658 (sse4_2_pcmpestri): Likewise.
8659 (sse4_2_pcmpestrm): Likewise.
8660 (sse4_2_pcmpestr_cconly): Likewise.
8661 (sse4_2_pcmpistr): Likewise.
8662 (sse4_2_pcmpistri): Likewise.
8663 (sse4_2_pcmpistrm): Likewise.
8664 (sse4_2_pcmpistr_cconly): Likewise.
8666 (aeskeygenassist): Likewise.
8668 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8669 Hongyu Wang <hongyu.wang@intel.com>
8670 Hongtao Liu <hongtao.liu@intel.com>
8672 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
8673 attr gpr32 0 and constraint jm/ja to all mem alternatives.
8674 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
8675 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
8676 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
8677 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
8678 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
8679 (<ssse3_avx2>_psign<mode>3): Likewise.
8680 (ssse3_psign<mode>3): Likewise.
8681 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
8682 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
8683 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
8684 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
8685 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
8686 (<sse4_1_avx2>_mpsadbw): Likewise.
8687 (<sse4_1_avx2>_pblendvb): Likewise.
8688 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
8689 (sse4_1_pblend<ssemodesuffix>): Likewise.
8690 (*avx2_pblend<ssemodesuffix>): Likewise.
8691 (avx2_permv2ti): Likewise.
8692 (*avx_vperm2f128<mode>_nozero): Likewise.
8693 (*avx2_eq<mode>3): Likewise.
8694 (*sse4_1_eqv2di3): Likewise.
8695 (sse4_2_gtv2di3): Likewise.
8696 (avx2_gt<mode>3): Likewise.
8698 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8699 Hongyu Wang <hongyu.wang@intel.com>
8700 Hongtao Liu <hongtao.liu@intel.com>
8702 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
8704 (<xsave>_rex64): Likewise.
8705 (<xrstor>_rex64): Likewise.
8706 (<xrstor>64): Likewise.
8707 (fxsave64): Likewise.
8708 (fxstore64): Likewise.
8710 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
8711 Kong Lingling <lingling.kong@intel.com>
8712 Hongtao Liu <hongtao.liu@intel.com>
8714 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
8715 adjust mnemonic for vmovduq/vmovdqa.
8716 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
8717 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
8718 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
8721 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8722 Hongyu Wang <hongyu.wang@intel.com>
8723 Hongtao Liu <hongtao.liu@intel.com>
8725 * config/i386/i386.cc (map_egpr_constraints): New funciton to
8726 map common constraints to EGPR prohibited constraints.
8727 (ix86_md_asm_adjust): Calls map_egpr_constraints.
8728 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
8730 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8731 Hongyu Wang <hongyu.wang@intel.com>
8732 Hongtao Liu <hongtao.liu@intel.com>
8734 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
8736 (ix86_regno_ok_for_insn_base_p): Likewise.
8737 (ix86_insn_index_reg_class): Likewise.
8738 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
8739 New helper function to scan the insn.
8740 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
8741 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
8742 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
8743 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
8744 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
8745 (INSN_INDEX_REG_CLASS): Likewise.
8746 (enum reg_class): Add INDEX_GPR16.
8747 (GENERAL_GPR16_REGNO_P): Define.
8748 * config/i386/i386.md (gpr32): New attribute.
8750 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8751 Hongyu Wang <hongyu.wang@intel.com>
8752 Hongtao Liu <hongtao.liu@intel.com>
8754 * config/i386/constraints.md (jr): New register constraint
8755 that prohibits EGPR.
8756 (jR): Constraint that force usage of EGPR.
8757 (jm): New memory constraint that prohibits EGPR.
8758 (ja): Likewise for Bm constraint.
8759 (jb): Likewise for Tv constraint.
8760 (j<): New auto-dec memory constraint that prohibits EGPR.
8761 (j>): Likewise for ">" constraint.
8762 (jo): Likewise for "o" constraint.
8763 (jv): Likewise for "V" constraint.
8764 (jp): Likewise for "p" constraint.
8765 * config/i386/i386.h (enum reg_class): Add new reg class
8768 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8769 Hongyu Wang <hongyu.wang@intel.com>
8770 Hongtao Liu <hongtao.liu@intel.com>
8772 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
8773 New function prototype.
8774 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
8776 (debugger64_register_map): Likewise.
8777 (ix86_conditional_register_usage): Clear REX2 register when APX
8779 (ix86_code_end): Add handling for REX2 reg.
8780 (print_reg): Likewise.
8781 (ix86_output_jmp_thunk_or_indirect): Likewise.
8782 (ix86_output_indirect_branch_via_reg): Likewise.
8783 (ix86_attr_length_vex_default): Likewise.
8784 (ix86_emit_save_regs): Adjust to allow saving r31.
8785 (ix86_register_priority): Set REX2 reg priority same as REX.
8786 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
8787 (x86_extended_rex2reg_mentioned_p): New function.
8788 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
8790 (REG_ALLOC_ORDER): Likewise.
8791 (FIRST_REX2_INT_REG): Define.
8792 (LAST_REX2_INT_REG): Ditto.
8793 (GENERAL_REGS): Add 16 new registers.
8794 (INT_SSE_REGS): Likewise.
8795 (FLOAT_INT_REGS): Likewise.
8796 (FLOAT_INT_SSE_REGS): Likewise.
8797 (INT_MASK_REGS): Likewise.
8798 (ALL_REGS):Likewise.
8799 (REX2_INT_REG_P): Define.
8800 (REX2_INT_REGNO_P): Ditto.
8801 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
8802 (REGNO_OK_FOR_INDEX_P): Ditto.
8803 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
8804 * config/i386/i386.md: Add 16 new integer general
8807 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8808 Hongyu Wang <hongyu.wang@intel.com>
8809 Hongtao Liu <hongtao.liu@intel.com>
8811 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
8812 (XCR_APX_F_ENABLED_MASK): Likewise.
8813 (get_available_features): Detect APX_F under
8814 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
8815 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
8816 (ix86_handle_option): Handle -mapxf.
8817 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
8818 * common/config/i386/i386-isas.h: Add entry for APX_F.
8819 * config/i386/cpuid.h (bit_APX_F): New.
8820 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
8821 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
8822 * config/i386/i386-opts.h (enum apx_features): New enum.
8823 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
8824 * config/i386/i386-options.cc (ix86_function_specific_save):
8825 Save ix86_apx_features.
8826 (ix86_function_specific_restore): Restore it.
8827 (ix86_valid_target_attribute_inner_p): Add mapxf.
8828 (ix86_option_override_internal): Set ix86_apx_features for PTA
8829 and TARGET_APX_F. Also reports error when APX_F is set but not
8830 having TARGET_64BIT.
8831 * config/i386/i386.opt: (-mapxf): New ISA flag option.
8832 (-mapx=): New enumeration option.
8833 (apx_features): New enum type.
8834 (apx_none): New enum value.
8835 (apx_egpr): Likewise.
8836 (apx_push2pop2): Likewise.
8837 (apx_ndd): Likewise.
8838 (apx_all): Likewise.
8839 * doc/invoke.texi: Document mapxf.
8841 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
8842 Kong Lingling <lingling.kong@intel.com>
8843 Hongtao Liu <hongtao.liu@intel.com>
8845 * addresses.h (index_reg_class): New wrapper function like
8847 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
8848 * doc/tm.texi.in: Ditto.
8849 * lra-constraints.cc (index_part_to_reg): Pass index_class.
8850 (process_address_1): Calls index_reg_class with curr_insn and
8851 replace INDEX_REG_CLASS with its return value index_cl.
8852 * reload.cc (find_reloads_address): Likewise.
8853 (find_reloads_address_1): Likewise.
8855 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8856 Hongyu Wang <hongyu.wang@intel.com>
8857 Hongtao Liu <hongtao.liu@intel.com>
8859 * addresses.h (base_reg_class): Add insn argument and new macro
8860 INSN_BASE_REG_CLASS.
8861 (regno_ok_for_base_p_1): Add insn argument and new macro
8862 REGNO_OK_FOR_INSN_BASE_P.
8863 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
8864 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
8865 REGNO_OK_FOR_INSN_BASE_P.
8866 * doc/tm.texi.in: Ditto.
8867 * lra-constraints.cc (process_address_1): Pass insn to
8869 (curr_insn_transform): Ditto.
8870 * reload.cc (find_reloads): Ditto.
8871 (find_reloads_address): Ditto.
8872 (find_reloads_address_1): Ditto.
8873 (find_reloads_subreg_address): Ditto.
8874 * reload1.cc (maybe_fix_stack_asms): Ditto.
8876 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
8879 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
8882 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
8885 * config/rs6000/predicates.md (lowpart_subreg_operator): New
8887 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
8888 (movsf_from_si2): Rename to ...
8889 (movsf_from_si2_<code>): ... this.
8891 2023-10-07 Pan Li <pan2.li@intel.com>
8894 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
8895 object is a REG before extracting its' REGNO.
8897 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
8899 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
8900 one into add3_cc_overflow_1 followed by add3_carry.
8901 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
8902 "*add<mode>3_cc_overflow_1" to provide generator function.
8904 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
8905 Uros Bizjak <ubizjak@gmail.com>
8907 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
8908 to perform left shifts into shorter instructions with -Oz.
8910 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
8912 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
8914 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
8916 * doc/extend.texi (Function Attributes): Mention standard attribute
8918 (Variable Attributes): Likewise.
8919 (Type Attributes): Likewise.
8920 (Attribute Syntax): Likewise.
8922 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
8924 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
8925 (mov<mode>_exec): Likewise.
8926 (mov<mode>_sgprbase): Likewise.
8927 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
8928 (*movti_insn): Likewise.
8930 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
8932 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
8934 2023-10-06 Andrew Pinski <pinskia@gmail.com>
8936 PR middle-end/111699
8937 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
8938 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
8940 2023-10-06 Jakub Jelinek <jakub@redhat.com>
8942 * ipa-prop.h (ipa_bits): Remove.
8943 (struct ipa_jump_func): Remove bits member.
8944 (struct ipcp_transformation): Remove bits member, adjust
8946 (ipa_get_ipa_bits_for_value): Remove.
8947 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
8948 (ipa_bits_hash_table): Remove.
8949 (ipa_print_node_jump_functions_for_edge): Don't print bits.
8950 (ipa_get_ipa_bits_for_value): Remove.
8951 (ipa_set_jfunc_bits): Remove.
8952 (ipa_compute_jump_functions_for_edge): For pointers query
8953 pointer alignment before ipa_set_jfunc_vr and update_bitmask
8954 in there. For integral types, just rely on bitmask already
8955 being handled in value ranges.
8956 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
8957 (ipcp_transformation_initialize): Neither here.
8958 (ipcp_transformation_t::duplicate): Don't copy bits vector.
8959 (ipa_write_jump_function): Don't stream bits here.
8960 (ipa_read_jump_function): Neither here.
8961 (useful_ipcp_transformation_info_p): Don't test bits vec.
8962 (write_ipcp_transformation_info): Don't stream bits here.
8963 (read_ipcp_transformation_info): Neither here.
8964 (ipcp_get_parm_bits): Get mask and value from m_vr rather
8966 (ipcp_update_bits): Remove.
8967 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
8968 bitmask stored in value range.
8969 (ipcp_transform_function): Don't test bits vector, don't call
8971 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
8972 jfunc->bits, instead get mask and value from jfunc->m_vr.
8973 (ipcp_store_bits_results): Remove.
8974 (ipcp_store_vr_results): Incorporate parts of
8975 ipcp_store_bits_results here, merge the bitmasks with value
8976 range if both are supplied.
8977 (ipcp_driver): Don't call ipcp_store_bits_results.
8978 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
8981 2023-10-06 Pan Li <pan2.li@intel.com>
8983 * config/riscv/autovec.md: Update comments.
8985 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
8987 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
8989 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
8991 * timevar.def (TV_TREE_FAST_VRP): New.
8992 * tree-pass.h (make_pass_fast_vrp): New prototype.
8993 * tree-vrp.cc (class fvrp_folder): New.
8994 (fvrp_folder::fvrp_folder): New.
8995 (fvrp_folder::~fvrp_folder): New.
8996 (fvrp_folder::value_of_expr): New.
8997 (fvrp_folder::value_on_edge): New.
8998 (fvrp_folder::value_of_stmt): New.
8999 (fvrp_folder::pre_fold_bb): New.
9000 (fvrp_folder::post_fold_bb): New.
9001 (fvrp_folder::pre_fold_stmt): New.
9002 (fvrp_folder::fold_stmt): New.
9003 (execute_fast_vrp): New.
9004 (pass_data_fast_vrp): New.
9005 (pass_vrp:execute): Check for fast VRP pass.
9006 (make_pass_fast_vrp): New.
9008 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
9010 * gimple-range.cc (dom_ranger::dom_ranger): New.
9011 (dom_ranger::~dom_ranger): New.
9012 (dom_ranger::range_of_expr): New.
9013 (dom_ranger::edge_range): New.
9014 (dom_ranger::range_on_edge): New.
9015 (dom_ranger::range_in_bb): New.
9016 (dom_ranger::range_of_stmt): New.
9017 (dom_ranger::maybe_push_edge): New.
9018 (dom_ranger::pre_bb): New.
9019 (dom_ranger::post_bb): New.
9020 * gimple-range.h (class dom_ranger): New.
9022 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
9024 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
9025 (gori_calc_operands): New.
9026 (gori_on_edge): New.
9027 (gori_name_helper): New.
9028 (gori_name_on_edge): New.
9029 * gimple-range-gori.h (gori_on_edge): New prototype.
9030 (gori_name_on_edge): New prototype.
9032 2023-10-05 Sergei Trofimovich <siarheit@google.com>
9035 PR gcov-profile/111559
9036 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
9037 uninitialized probabilities when merging counters with zero
9040 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
9043 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
9044 strategy for non-default address spaces.
9045 (decide_alg): Use loop strategy as a fallback strategy for
9046 non-default address spaces.
9048 2023-10-05 Jakub Jelinek <jakub@redhat.com>
9050 * sreal.cc (verify_aritmetics): Rename to ...
9051 (verify_arithmetics): ... this.
9052 (sreal_verify_arithmetics): Adjust caller.
9054 2023-10-05 Martin Jambor <mjambor@suse.cz>
9057 2023-10-03 Martin Jambor <mjambor@suse.cz>
9060 * cgraph.h (cgraph_edge): Add a parameter to
9061 redirect_call_stmt_to_callee.
9062 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
9063 parameter to modify_call.
9064 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
9065 parameter killed_ssas, pass it to padjs->modify_call.
9066 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
9067 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
9068 Instead of substituting uses, invoke purge_transitive_uses. If
9069 hash of killed SSAs has not been provided, create a temporary one
9070 and release SSAs that have been added to it.
9071 * tree-inline.cc (redirect_all_calls): Create
9072 id->killed_new_ssa_names earlier, pass it to edge redirection,
9074 (copy_body): Release SSAs in id->killed_new_ssa_names.
9076 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9078 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
9079 (vec_series<mode>): Ditto.
9080 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
9081 (shuffle_decompress_patterns): Ditto.
9083 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
9085 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
9086 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
9087 (arc_ccfsm_record_branch_deleted): Likewise.
9088 (arc_ccfsm_cond_exec_p): Likewise.
9089 (arc_ccfsm): Likewise.
9090 (arc_ccfsm_record_condition): Likewise.
9091 (make_pass_arc_ifcvt): Likewise.
9092 * config/arc/arc.cc (arc_ccfsm): Remove.
9093 (arc_ccfsm_current): Likewise.
9094 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
9095 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
9096 (ARC_CCFSM_COND_EXEC_P): Likewise.
9097 (CCFSM_ISCOMPACT): Likewise.
9098 (CCFSM_DBR_ISCOMPACT): Likewise.
9099 (machine_function): Remove ccfsm related fields.
9100 (arc_ifcvt): Remove pass.
9101 (arc_print_operand): Remove `#` punct operand and other ccfsm
9103 (arc_ccfsm_advance): Remove.
9104 (arc_ccfsm_at_label): Likewise.
9105 (arc_ccfsm_record_condition): Likewise.
9106 (arc_ccfsm_post_advance): Likewise.
9107 (arc_ccfsm_branch_deleted_p): Likewise.
9108 (arc_ccfsm_record_branch_deleted): Likewise.
9109 (arc_ccfsm_cond_exec_p): Likewise.
9110 (arc_get_ccfsm_cond): Likewise.
9111 (arc_final_prescan_insn): Remove ccfsm references.
9112 (arc_internal_label): Likewise.
9113 (arc_reorg): Likewise.
9114 (arc_output_libcall): Likewise.
9115 * config/arc/arc.md: Remove ccfsm references and update related
9116 instruction patterns.
9118 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
9120 * config/arc/arc.cc (arc_init): Remove '^' punct char.
9121 (arc_print_operand): Remove related code.
9122 * config/arc/arc.md: Update patterns which uses '%&'.
9124 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
9126 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
9127 (arc_toggle_unalign): Likewise.
9128 * config/arc/arc.cc (machine_function) Remove unalign.
9129 (arc_init): Remove `&` punct character.
9130 (arc_print_operand): Remove `&` related functions.
9131 (arc_verify_short): Update function's number of parameters.
9132 (output_short_suffix): Update function.
9133 (arc_short_long): Likewise.
9134 (arc_clear_unalign): Remove.
9135 (arc_toggle_unalign): Likewise.
9136 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
9137 (ASM_OUTPUT_ALIGN): Update.
9138 * config/arc/arc.md: Remove all `%&` references.
9139 * config/arc/arc.opt (mannotate-align): Ignore option.
9140 * doc/invoke.texi (mannotate-align): Update description.
9142 2023-10-05 Richard Biener <rguenther@suse.de>
9144 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
9145 ask for internal_fn_p (CFN_LAST).
9147 2023-10-05 Richard Biener <rguenther@suse.de>
9149 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
9150 visited value numbers are available itself.
9152 2023-10-05 Richard Biener <rguenther@suse.de>
9155 * doc/extend.texi (attribute flatten): Clarify.
9157 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
9159 * config/arc/arc-protos.h (emit_shift): Delete prototype.
9160 (arc_pre_reload_split): New function prototype.
9161 * config/arc/arc.cc (emit_shift): Delete function.
9162 (arc_pre_reload_split): New predicate function, copied from i386,
9163 to schedule define_insn_and_split splitters to the split1 pass.
9164 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
9165 (ashrsi3): Likewise.
9166 (lshrsi3): Likewise.
9167 (shift_si3): Move after other shift patterns, and disable when
9168 operands[2] is one (which is handled by its own define_insn).
9169 Use shiftr4_operator, instead of shift4_operator, as this is no
9170 longer used for left shifts.
9171 (shift_si3_loop): Likewise. Additionally remove match_scratch.
9172 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
9173 (*ashrsi3_nobs): Likewise.
9174 (*lshrsi3_nobs): Likewise.
9175 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
9176 (add_shift): Rename define_insn from *add_shift.
9177 * config/arc/predicates.md (shiftl4_operator): Delete.
9178 (shift4_operator): Delete.
9180 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
9182 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
9183 Change type attribute to "unary", as this doesn't have operands[2].
9184 Change length attribute to "*,4" to allow compact representation.
9185 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
9186 insn type attribute to "unary", as this doesn't have operands[2].
9187 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
9188 insn type attribute to "unary", as this doesn't have operands[2].
9190 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
9192 PR rtl-optimization/110701
9193 * combine.cc (record_dead_and_set_regs_1): Split comment into
9194 pieces placed before the relevant clauses. When the SET_DEST
9195 is a partial_subreg_p, mark the bits outside of the updated
9196 portion of the destination as undefined.
9198 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
9201 * opt-read.awk: Drop multidimensional arrays.
9202 * opth-gen.awk: Ditto.
9204 2023-10-04 Xi Ruoyao <xry111@xry111.site>
9206 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
9207 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
9209 2023-10-04 Jakub Jelinek <jakub@redhat.com>
9211 PR middle-end/111369
9212 * match.pd (x == cstN ? cst4 : cst3): Use
9213 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
9214 Fix comment typo. Formatting fix.
9215 (a?~t:t -> (-(a))^t): Always convert to type rather
9216 than using build_nonstandard_integer_type. Perform negation
9217 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
9219 2023-10-04 Jakub Jelinek <jakub@redhat.com>
9221 PR tree-optimization/111668
9222 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
9223 a ? 0 : -1 cases before the powerof2cst cases and differentiate
9224 between 1-bit precision types, larger precision boolean types
9225 and other integral types. Fix comment pastos and formatting.
9227 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
9229 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
9230 pointers rather than range_info_get_range.
9232 2023-10-03 Martin Jambor <mjambor@suse.cz>
9234 * ipa-modref.h (modref_summary::dump): Make const.
9235 * ipa-modref.cc (modref_summary::dump): Likewise.
9236 (dump_lto_records): Dump to out instead of dump_file.
9238 2023-10-03 Martin Jambor <mjambor@suse.cz>
9241 * ipa-param-manipulation.cc
9242 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
9243 return uses of PARAM will be removed.
9244 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
9245 * ipa-sra.cc (isra_param_desc): New fields
9246 remove_only_when_retval_removed and split_only_when_retval_removed.
9247 (struct gensum_param_desc): Likewise. Fix comment long line.
9248 (ipa_sra_function_summaries::duplicate): Copy the new flags.
9249 (dump_gensum_param_descriptor): Dump the new flags.
9250 (dump_isra_param_descriptor): Likewise.
9251 (isra_track_scalar_value_uses): New parameter desc. Set its flag
9252 remove_only_when_retval_removed when encountering a simple return.
9253 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
9254 with desc. Pass it to isra_track_scalar_value_uses and set its
9256 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
9257 parameter. If there is a direct return use, mark any..
9258 (create_parameter_descriptors): Pass the whole parameter descriptor to
9259 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
9260 (process_scan_results): Copy the new flags.
9261 (isra_write_node_summary): Stream the new flags.
9262 (isra_read_node_info): Likewise.
9263 (adjust_parameter_descriptions): Check that transformations
9264 requring return removal only happen when return value is removed.
9265 Restructure main loop. Adjust dump message.
9267 2023-10-03 Martin Jambor <mjambor@suse.cz>
9270 * cgraph.h (cgraph_edge): Add a parameter to
9271 redirect_call_stmt_to_callee.
9272 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
9273 parameter to modify_call.
9274 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
9275 parameter killed_ssas, pass it to padjs->modify_call.
9276 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
9277 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
9278 Instead of substituting uses, invoke purge_transitive_uses. If
9279 hash of killed SSAs has not been provided, create a temporary one
9280 and release SSAs that have been added to it.
9281 * tree-inline.cc (redirect_all_calls): Create
9282 id->killed_new_ssa_names earlier, pass it to edge redirection,
9284 (copy_body): Release SSAs in id->killed_new_ssa_names.
9286 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
9288 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
9289 * tree-vrp.cc (vrp_pass_num): Remove.
9290 (pass_vrp::my_pass): Remove.
9291 (pass_vrp::pass_vrp): Add warn_p as a parameter.
9292 (pass_vrp::final_p): New.
9293 (pass_vrp::set_pass_param): Set final_p param.
9294 (pass_vrp::execute): Call execute_range_vrp with no conditions.
9295 (make_pass_vrp): Pass additional parameter.
9296 (make_pass_early_vrp): Ditto.
9298 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
9300 * tree-ssanames.cc (set_range_info): Return true only if the
9301 current value changes.
9303 2023-10-03 David Malcolm <dmalcolm@redhat.com>
9305 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
9306 prefixes to text_info fields.
9307 (diagnostic_report_diagnostic): Likewise.
9308 (verbatim): Use text_info ctor.
9309 (simple_diagnostic_path::add_event): Likewise.
9310 (simple_diagnostic_path::add_thread_event): Likewise.
9311 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
9312 "m_" prefixes to text_info fields.
9313 (dump_context::dump_printf_va): Use text_info ctor.
9314 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
9315 (graphviz_out::print): Likewise.
9316 * opt-problem.cc (opt_problem::opt_problem): Likewise.
9317 * pretty-print.cc (pp_format): Update for "m_" prefixes to
9319 (pp_printf): Use text_info ctor.
9320 (pp_verbatim): Likewise.
9321 (assert_pp_format_va): Likewise.
9322 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
9324 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
9326 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
9327 prefixes to text_info fields.
9328 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
9330 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
9332 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
9333 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
9334 (*scc_insn): Don't split to a conditional move sequence for LTU.
9336 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
9338 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
9339 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
9340 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
9341 (load_pair_dw_<DX:mode><DX2:mode>)
9342 (store_pair_sw_<SX:mode><SX2:mode>)
9343 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
9344 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
9345 (*extend<SHORT:mode><GPI:mode>2_aarch64)
9346 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
9347 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
9348 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
9349 (add<mode>3_compare0, *addsi3_compare0_uxtw)
9350 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
9351 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
9352 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
9353 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
9354 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
9355 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
9356 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
9357 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
9358 (*aarch64_ashl_sisd_or_int_<mode>3)
9359 (*aarch64_lshr_sisd_or_int_<mode>3)
9360 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
9361 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
9362 (<optab><fcvt_target><GPF:mode>2)
9363 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
9364 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
9365 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
9367 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
9368 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
9369 (*aarch64_mul_unpredicated_<mode>)
9370 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
9371 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
9372 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
9373 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
9374 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
9375 (@aarch64_sve_<sve_int_op>_lane_<mode>)
9376 (@aarch64_sve_add_mul_lane_<mode>)
9377 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
9378 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
9379 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
9380 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
9381 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
9382 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
9383 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
9384 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
9385 (@aarch64_sve_qadd_<sve_int_op><mode>)
9386 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
9387 (@aarch64_sve_sub_<sve_int_op><mode>)
9388 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
9389 (@aarch64_sve_qsub_<sve_int_op><mode>)
9390 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
9391 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
9392 (@aarch64_pred_<sve_int_op><mode>)
9393 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
9394 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
9395 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
9396 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
9397 (*cond_<sve_fp_op><mode>_any_relaxed)
9398 (*cond_<sve_fp_op><mode>_any_strict)
9399 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
9400 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
9401 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
9402 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
9403 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
9404 (*aarch64_sve_mov<mode>, aarch64_wrffr)
9405 (mask_scatter_store<mode><v_int_container>)
9406 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
9407 (*mask_scatter_store<mode><v_int_container>_sxtw)
9408 (*mask_scatter_store<mode><v_int_container>_uxtw)
9409 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
9410 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
9411 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
9412 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
9413 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
9414 (vec_series<mode>, @extract_<last_op>_<mode>)
9415 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
9416 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
9417 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
9418 (@cond_<optab><mode>)
9419 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
9420 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
9421 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
9422 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
9423 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
9424 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
9425 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
9426 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
9427 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
9428 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
9429 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
9430 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
9431 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
9432 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
9433 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
9434 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
9435 (*cond_bic<mode>_2, *cond_bic<mode>_any)
9436 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
9437 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
9438 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
9439 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
9440 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
9441 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
9442 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
9443 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
9444 (*cond_<optab><mode>_2_const_relaxed)
9445 (*cond_<optab><mode>_2_const_strict)
9446 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
9447 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9448 (*cond_<optab><mode>_any_const_relaxed)
9449 (*cond_<optab><mode>_any_const_strict)
9450 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
9451 (*cond_add<mode>_2_const_strict)
9452 (*cond_add<mode>_any_const_relaxed)
9453 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
9454 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
9455 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9456 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
9457 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
9458 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
9459 (*aarch64_pred_abd<mode>_strict)
9460 (*aarch64_cond_abd<mode>_2_relaxed)
9461 (*aarch64_cond_abd<mode>_2_strict)
9462 (*aarch64_cond_abd<mode>_3_relaxed)
9463 (*aarch64_cond_abd<mode>_3_strict)
9464 (*aarch64_cond_abd<mode>_any_relaxed)
9465 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
9466 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
9467 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
9468 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
9469 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
9470 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
9471 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
9472 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
9473 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
9474 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9475 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
9476 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
9477 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9478 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
9479 (@aarch64_sve_<sve_fp_op>vnx4sf)
9480 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
9481 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
9482 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
9483 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
9484 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
9485 (@aarch64_fold_extract_vector_<last_op>_<mode>)
9486 (@aarch64_sve_splice<mode>)
9487 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
9488 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
9489 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
9490 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
9491 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
9492 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
9493 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
9494 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
9495 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
9496 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
9497 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
9498 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
9499 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
9500 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
9501 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
9502 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
9503 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
9505 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
9506 (load_pair<DREG:mode><DREG2:mode>)
9507 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
9508 (aarch64_simd_mov_from_<mode>low)
9509 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
9510 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
9511 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
9512 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
9513 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
9514 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
9515 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
9516 (*aarch64_combinez_be<mode>)
9517 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
9518 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
9519 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
9521 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
9523 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
9524 in new compact pattern syntax.
9526 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
9528 * gensupport.cc (convert_syntax): Updated to support unordered
9529 constraints in compact syntax.
9531 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
9533 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
9534 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
9535 (copysign<mode>3_hard): Likewise.
9536 (copysign<mode>3_soft): Likewise.
9537 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
9539 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
9542 2023-10-02 David Malcolm <dmalcolm@redhat.com>
9544 * diagnostic-format-json.cc (toplevel_array): Remove global in
9545 favor of json_output_format::m_top_level_array.
9546 (cur_group): Likewise, for json_output_format::m_cur_group.
9547 (cur_children_array): Likewise, for
9548 json_output_format::m_cur_children_array.
9549 (class json_output_format): New.
9550 (json_begin_diagnostic): Remove, in favor of
9551 json_output_format::on_begin_diagnostic.
9552 (json_end_diagnostic): Convert to...
9553 (json_output_format::on_end_diagnostic): ...this.
9554 (json_begin_group): Remove, in favor of
9555 json_output_format::on_begin_group.
9556 (json_end_group): Remove, in favor of
9557 json_output_format::on_end_group.
9558 (json_flush_to_file): Remove, in favor of
9559 json_output_format::flush_to_file.
9560 (json_stderr_final_cb): Remove, in favor of json_output_format
9562 (json_output_base_file_name): Remove global.
9563 (class json_stderr_output_format): New.
9564 (json_file_final_cb): Remove.
9565 (class json_file_output_format): New.
9566 (json_emit_diagram): Remove.
9567 (diagnostic_output_format_init_json): Update.
9568 (diagnostic_output_format_init_json_file): Update.
9569 * diagnostic-format-sarif.cc (the_builder): Remove this global,
9570 moving to a field of the sarif_output_format.
9571 (sarif_builder::maybe_make_artifact_content_object): Use the
9572 context's m_file_cache.
9573 (get_source_lines): Convert to...
9574 (sarif_builder::get_source_lines): ...this, using context's
9576 (sarif_begin_diagnostic): Remove, in favor of
9577 sarif_output_format::on_begin_diagnostic.
9578 (sarif_end_diagnostic): Remove, in favor of
9579 sarif_output_format::on_end_diagnostic.
9580 (sarif_begin_group): Remove, in favor of
9581 sarif_output_format::on_begin_group.
9582 (sarif_end_group): Remove, in favor of
9583 sarif_output_format::on_end_group.
9584 (sarif_flush_to_file): Delete.
9585 (sarif_stderr_final_cb): Delete.
9586 (sarif_output_base_file_name): Delete.
9587 (sarif_file_final_cb): Delete.
9588 (class sarif_output_format): New.
9589 (sarif_emit_diagram): Delete.
9590 (class sarif_stream_output_format): New.
9591 (class sarif_file_output_format): New.
9592 (diagnostic_output_format_init_sarif): Update.
9593 (diagnostic_output_format_init_sarif_stderr): Update.
9594 (diagnostic_output_format_init_sarif_file): Update.
9595 (diagnostic_output_format_init_sarif_stream): Update.
9596 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
9597 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
9598 diagnostic_text_output_format's dtor.
9599 (diagnostic_initialize): Update, making a new instance of
9600 diagnostic_text_output_format.
9601 (diagnostic_finish): Delete m_output_format, rather than calling
9603 (diagnostic_report_diagnostic): Assert that m_output_format is
9604 non-NULL. Replace call to begin_group_cb with call to
9605 m_output_format->on_begin_group. Replace call to
9606 diagnostic_starter with call to
9607 m_output_format->on_begin_diagnostic. Replace call to
9608 diagnostic_finalizer with call to
9609 m_output_format->on_end_diagnostic.
9610 (diagnostic_emit_diagram): Replace both optional call to
9611 m_diagrams.m_emission_cb and default implementation with call to
9612 m_output_format->on_diagram. Move default implementation to
9613 diagnostic_text_output_format::on_diagram.
9614 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
9615 end_group_cb with call to m_output_format->on_end_group.
9616 (diagnostic_text_output_format::~diagnostic_text_output_format):
9617 New, based on default_diagnostic_final_cb.
9618 (diagnostic_text_output_format::on_begin_diagnostic): New, based
9619 on code from diagnostic_report_diagnostic.
9620 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
9621 (diagnostic_text_output_format::on_diagram): New, based on code
9622 from diagnostic_emit_diagram.
9623 * diagnostic.h (class diagnostic_output_format): New.
9624 (class diagnostic_text_output_format): New.
9625 (diagnostic_context::begin_diagnostic): Move to...
9626 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
9627 (diagnostic_context::start_span): Move to...
9628 (diagnostic_context::m_text_callbacks::start_span): ...here.
9629 (diagnostic_context::end_diagnostic): Move to...
9630 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
9631 (diagnostic_context::begin_group_cb): Remove, in favor of
9632 m_output_format->on_begin_group.
9633 (diagnostic_context::end_group_cb): Remove, in favor of
9634 m_output_format->on_end_group.
9635 (diagnostic_context::final_cb): Remove, in favor of
9636 m_output_format's dtor.
9637 (diagnostic_context::m_output_format): New field.
9638 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
9639 of m_output_format->on_diagram.
9640 (diagnostic_starter): Update.
9641 (diagnostic_finalizer): Update.
9642 (diagnostic_output_format_init_sarif_stream): New.
9643 * input.cc (location_get_source_line): Move implementation apart from
9644 call to diagnostic_file_cache_init to...
9645 (file_cache::get_source_line): ...this new function...
9646 (location_get_source_line): ...and reintroduce, rewritten in terms of
9647 file_cache::get_source_line.
9648 (get_source_file_content): Likewise, refactor into...
9649 (file_cache::get_source_file_content): ...this new function.
9650 * input.h (file_cache::get_source_line): New decl.
9651 (file_cache::get_source_file_content): New decl.
9652 * selftest-diagnostic.cc
9653 (test_diagnostic_context::test_diagnostic_context): Update.
9654 * tree-diagnostic-path.cc (event_range::print): Update for
9655 change to diagnostic_context's start_span callback.
9657 2023-10-02 David Malcolm <dmalcolm@redhat.com>
9659 * diagnostic-show-locus.cc: Update for reorganization of
9660 source-printing fields of diagnostic_context.
9661 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
9662 (diagnostic_initialize): Likewise.
9663 * diagnostic.h (diagnostic_context::show_caret): Move to...
9664 (diagnostic_context::m_source_printing::enabled): ...here.
9665 (diagnostic_context::caret_max_width): Move to...
9666 (diagnostic_context::m_source_printing::max_width): ...here.
9667 (diagnostic_context::caret_chars): Move to...
9668 (diagnostic_context::m_source_printing::caret_chars): ...here.
9669 (diagnostic_context::colorize_source_p): Move to...
9670 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
9671 (diagnostic_context::show_labels_p): Move to...
9672 (diagnostic_context::m_source_printing::show_labels_p): ...here.
9673 (diagnostic_context::show_line_numbers_p): Move to...
9674 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
9675 (diagnostic_context::min_margin_width): Move to...
9676 (diagnostic_context::m_source_printing::min_margin_width): ...here.
9677 (diagnostic_context::show_ruler_p): Move to...
9678 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
9679 (diagnostic_same_line): Update for above changes.
9680 * opts.cc (common_handle_option): Update for reorganization of
9681 source-printing fields of diagnostic_context.
9682 * selftest-diagnostic.cc
9683 (test_diagnostic_context::test_diagnostic_context): Likewise.
9684 * toplev.cc (general_init): Likewise.
9685 * tree-diagnostic-path.cc (struct event_range): Likewise.
9687 2023-10-02 David Malcolm <dmalcolm@redhat.com>
9689 * diagnostic.cc (diagnostic_initialize): Initialize
9690 set_locations_cb to nullptr.
9692 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
9695 * config/arm/constraints.md: Remove Pf constraint.
9696 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
9697 (arm_atomic_load_acquire<mode>): Likewise.
9698 (arm_atomic_store<mode>): Likewise.
9699 (arm_atomic_store_release<mode>): Likewise.
9700 (atomic_load<mode>): Switch patterns to define_expand.
9701 (atomic_store<mode>): Likewise.
9702 (arm_atomic_loaddi2_ldrd): Remove predication.
9703 (arm_load_exclusive<mode>): Likewise.
9704 (arm_load_acquire_exclusive<mode>): Likewise.
9705 (arm_load_exclusivesi): Likewise.
9706 (arm_load_acquire_exclusivesi): Likewise.
9707 (arm_load_exclusivedi): Likewise.
9708 (arm_load_acquire_exclusivedi): Likewise.
9709 (arm_store_exclusive<mode>): Likewise.
9710 (arm_store_release_exclusivedi): Likewise.
9711 (arm_store_release_exclusive<mode>): Likewise.
9712 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
9714 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9717 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9719 PR tree-optimization/109154
9720 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
9721 (cmp_arg_entry): New.
9722 (predicate_scalar_phi): Use it.
9724 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9726 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
9727 (@xorsign<mode>3): ...This.
9728 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
9729 (@xorsign<mode>3): ..This and emit vectors directly
9730 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
9732 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9734 * emit-rtl.cc (validate_subreg): Relax subreg rule.
9736 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9738 PR tree-optimization/109154
9739 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
9740 (cmp_arg_entry): New.
9741 (predicate_scalar_phi): Use it.
9743 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
9746 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
9748 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
9750 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
9751 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9753 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
9755 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
9757 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
9759 (cpymem<P:mode>) .. this.
9761 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9763 * combine.cc (simplify_compare_const): Properly handle unsigned
9764 constants while narrowing comparison of memory and constants.
9766 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
9768 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
9769 (MASK_ZIFENCEI): Delete;
9770 (MASK_ZIHINTNTL): Ditto.
9771 (MASK_ZIHINTPAUSE): Ditto.
9772 (TARGET_ZICSR): Ditto.
9773 (TARGET_ZIFENCEI): Ditto.
9774 (TARGET_ZIHINTNTL): Ditto.
9775 (TARGET_ZIHINTPAUSE): Ditto.
9776 (MASK_ZAWRS): Ditto.
9777 (TARGET_ZAWRS): Ditto.
9782 (TARGET_ZBA): Ditto.
9783 (TARGET_ZBB): Ditto.
9784 (TARGET_ZBC): Ditto.
9785 (TARGET_ZBS): Ditto.
9786 (MASK_ZFINX): Ditto.
9787 (MASK_ZDINX): Ditto.
9788 (MASK_ZHINX): Ditto.
9789 (MASK_ZHINXMIN): Ditto.
9790 (TARGET_ZFINX): Ditto.
9791 (TARGET_ZDINX): Ditto.
9792 (TARGET_ZHINX): Ditto.
9793 (TARGET_ZHINXMIN): Ditto.
9801 (MASK_ZKSED): Ditto.
9804 (TARGET_ZBKB): Ditto.
9805 (TARGET_ZBKC): Ditto.
9806 (TARGET_ZBKX): Ditto.
9807 (TARGET_ZKNE): Ditto.
9808 (TARGET_ZKND): Ditto.
9809 (TARGET_ZKNH): Ditto.
9810 (TARGET_ZKR): Ditto.
9811 (TARGET_ZKSED): Ditto.
9812 (TARGET_ZKSH): Ditto.
9813 (TARGET_ZKT): Ditto.
9815 (TARGET_ZTSO): Ditto.
9816 (MASK_VECTOR_ELEN_32): Ditto.
9817 (MASK_VECTOR_ELEN_64): Ditto.
9818 (MASK_VECTOR_ELEN_FP_32): Ditto.
9819 (MASK_VECTOR_ELEN_FP_64): Ditto.
9820 (MASK_VECTOR_ELEN_FP_16): Ditto.
9821 (TARGET_VECTOR_ELEN_32): Ditto.
9822 (TARGET_VECTOR_ELEN_64): Ditto.
9823 (TARGET_VECTOR_ELEN_FP_32): Ditto.
9824 (TARGET_VECTOR_ELEN_FP_64): Ditto.
9825 (TARGET_VECTOR_ELEN_FP_16): Ditto.
9828 (TARGET_ZVBB): Ditto.
9829 (TARGET_ZVBC): Ditto.
9831 (MASK_ZVKNED): Ditto.
9832 (MASK_ZVKNHA): Ditto.
9833 (MASK_ZVKNHB): Ditto.
9834 (MASK_ZVKSED): Ditto.
9835 (MASK_ZVKSH): Ditto.
9837 (MASK_ZVKNC): Ditto.
9838 (MASK_ZVKNG): Ditto.
9840 (MASK_ZVKSC): Ditto.
9841 (MASK_ZVKSG): Ditto.
9843 (TARGET_ZVKG): Ditto.
9844 (TARGET_ZVKNED): Ditto.
9845 (TARGET_ZVKNHA): Ditto.
9846 (TARGET_ZVKNHB): Ditto.
9847 (TARGET_ZVKSED): Ditto.
9848 (TARGET_ZVKSH): Ditto.
9849 (TARGET_ZVKN): Ditto.
9850 (TARGET_ZVKNC): Ditto.
9851 (TARGET_ZVKNG): Ditto.
9852 (TARGET_ZVKS): Ditto.
9853 (TARGET_ZVKSC): Ditto.
9854 (TARGET_ZVKSG): Ditto.
9855 (TARGET_ZVKT): Ditto.
9856 (MASK_ZVL32B): Ditto.
9857 (MASK_ZVL64B): Ditto.
9858 (MASK_ZVL128B): Ditto.
9859 (MASK_ZVL256B): Ditto.
9860 (MASK_ZVL512B): Ditto.
9861 (MASK_ZVL1024B): Ditto.
9862 (MASK_ZVL2048B): Ditto.
9863 (MASK_ZVL4096B): Ditto.
9864 (MASK_ZVL8192B): Ditto.
9865 (MASK_ZVL16384B): Ditto.
9866 (MASK_ZVL32768B): Ditto.
9867 (MASK_ZVL65536B): Ditto.
9868 (TARGET_ZVL32B): Ditto.
9869 (TARGET_ZVL64B): Ditto.
9870 (TARGET_ZVL128B): Ditto.
9871 (TARGET_ZVL256B): Ditto.
9872 (TARGET_ZVL512B): Ditto.
9873 (TARGET_ZVL1024B): Ditto.
9874 (TARGET_ZVL2048B): Ditto.
9875 (TARGET_ZVL4096B): Ditto.
9876 (TARGET_ZVL8192B): Ditto.
9877 (TARGET_ZVL16384B): Ditto.
9878 (TARGET_ZVL32768B): Ditto.
9879 (TARGET_ZVL65536B): Ditto.
9880 (MASK_ZICBOZ): Ditto.
9881 (MASK_ZICBOM): Ditto.
9882 (MASK_ZICBOP): Ditto.
9883 (TARGET_ZICBOZ): Ditto.
9884 (TARGET_ZICBOM): Ditto.
9885 (TARGET_ZICBOP): Ditto.
9886 (MASK_ZICOND): Ditto.
9887 (TARGET_ZICOND): Ditto.
9889 (TARGET_ZFA): Ditto.
9890 (MASK_ZFHMIN): Ditto.
9892 (MASK_ZVFHMIN): Ditto.
9894 (TARGET_ZFHMIN): Ditto.
9895 (TARGET_ZFH): Ditto.
9896 (TARGET_ZVFHMIN): Ditto.
9897 (TARGET_ZVFH): Ditto.
9898 (MASK_ZMMUL): Ditto.
9899 (TARGET_ZMMUL): Ditto.
9907 (TARGET_ZCA): Ditto.
9908 (TARGET_ZCB): Ditto.
9909 (TARGET_ZCE): Ditto.
9910 (TARGET_ZCF): Ditto.
9911 (TARGET_ZCD): Ditto.
9912 (TARGET_ZCMP): Ditto.
9913 (TARGET_ZCMT): Ditto.
9914 (MASK_SVINVAL): Ditto.
9915 (MASK_SVNAPOT): Ditto.
9916 (TARGET_SVINVAL): Ditto.
9917 (TARGET_SVNAPOT): Ditto.
9918 (MASK_XTHEADBA): Ditto.
9919 (MASK_XTHEADBB): Ditto.
9920 (MASK_XTHEADBS): Ditto.
9921 (MASK_XTHEADCMO): Ditto.
9922 (MASK_XTHEADCONDMOV): Ditto.
9923 (MASK_XTHEADFMEMIDX): Ditto.
9924 (MASK_XTHEADFMV): Ditto.
9925 (MASK_XTHEADINT): Ditto.
9926 (MASK_XTHEADMAC): Ditto.
9927 (MASK_XTHEADMEMIDX): Ditto.
9928 (MASK_XTHEADMEMPAIR): Ditto.
9929 (MASK_XTHEADSYNC): Ditto.
9930 (TARGET_XTHEADBA): Ditto.
9931 (TARGET_XTHEADBB): Ditto.
9932 (TARGET_XTHEADBS): Ditto.
9933 (TARGET_XTHEADCMO): Ditto.
9934 (TARGET_XTHEADCONDMOV): Ditto.
9935 (TARGET_XTHEADFMEMIDX): Ditto.
9936 (TARGET_XTHEADFMV): Ditto.
9937 (TARGET_XTHEADINT): Ditto.
9938 (TARGET_XTHEADMAC): Ditto.
9939 (TARGET_XTHEADMEMIDX): Ditto.
9940 (TARGET_XTHEADMEMPAIR): Ditto.
9941 (TARGET_XTHEADSYNC): Ditto.
9942 (MASK_XVENTANACONDOPS): Ditto.
9943 (TARGET_XVENTANACONDOPS): Ditto.
9944 * config/riscv/riscv.opt: Add new Mask defination.
9945 * doc/options.texi: Add explanation for this new usage.
9946 * opt-functions.awk: Add new function to find the index
9947 of target variable from extra_target_vars.
9948 * opt-read.awk: Add new function to store the Mask flags.
9949 * opth-gen.awk: Add new function to output the defination of
9950 Mask Macro and Target Macro.
9952 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
9953 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9954 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9957 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
9958 Change second parameter to rtx *.
9959 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
9960 * config/riscv/vector.md: Changed callers of
9961 riscv_vector::legitimize_move.
9962 (*mov<mode>_mem_to_mem): Remove.
9964 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9967 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
9968 Replace safe_grow with safe_grow_cleared.
9970 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9972 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
9973 in function comment.
9975 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9977 PR middle-end/111625
9978 PR middle-end/111637
9979 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
9981 (bitint_large_huge::handle_operand_addr): For uninitialized operands
9982 use limb_prec or -limb_prec precision.
9984 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9986 * vec.h (quick_grow): Uncomment static_assert.
9988 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
9990 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
9992 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
9994 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
9995 SETs when the outer code is INSN.
9997 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
9999 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
10002 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
10004 * poly-int.h (poly_int_pod): Delete.
10005 (poly_coeff_traits::init_cast): New type.
10006 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
10007 (poly_int): Replace constructors that take 1 and 2 coefficients with
10008 a general one that takes an arbitrary number of coefficients.
10009 Delegate initialization to two new private constructors, one of
10010 which uses the coefficients as-is and one of which adds an extra
10011 zero of the appropriate type (and precision, where applicable).
10012 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
10013 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
10014 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
10015 * gengtype.cc (main): Don't register poly_int64_pod.
10016 * calls.cc (initialize_argument_information): Use poly_int rather
10018 (combine_pending_stack_adjustment_and_call): Likewise.
10019 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
10020 * data-streamer.h (bp_unpack_poly_value): Likewise.
10021 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
10022 (struct queued_reg_save): Likewise.
10023 * dwarf2out.h (struct dw_cfa_location): Likewise.
10024 * emit-rtl.h (struct incoming_args): Likewise.
10025 (struct rtl_data): Likewise.
10026 * expr.cc (get_bit_range): Likewise.
10027 (get_inner_reference): Likewise.
10028 * expr.h (get_bit_range): Likewise.
10029 * fold-const.cc (split_address_to_core_and_offset): Likewise.
10030 (ptr_difference_const): Likewise.
10031 * fold-const.h (ptr_difference_const): Likewise.
10032 * function.cc (try_fit_stack_local): Likewise.
10033 (instantiate_new_reg): Likewise.
10034 * function.h (struct expr_status): Likewise.
10035 (struct args_size): Likewise.
10036 * genmodes.cc (ZERO_COEFFS): Likewise.
10037 (mode_size_inline): Likewise.
10038 (mode_nunits_inline): Likewise.
10039 (emit_mode_precision): Likewise.
10040 (emit_mode_size): Likewise.
10041 (emit_mode_nunits): Likewise.
10042 * gimple-fold.cc (get_base_constructor): Likewise.
10043 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
10044 * inchash.h (class hash): Likewise.
10045 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
10046 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
10048 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
10049 * lra-eliminations.cc (self_elim_offsets): Likewise.
10050 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
10051 * omp-low.cc (omplow_simd_context): Likewise.
10052 * pretty-print.cc (pp_wide_integer): Likewise.
10053 * pretty-print.h (pp_wide_integer): Likewise.
10054 * reload.cc (struct decomposition): Likewise.
10055 * reload.h (struct reload): Likewise.
10056 * reload1.cc (spill_stack_slot_width): Likewise.
10057 (struct elim_table): Likewise.
10058 (offsets_at): Likewise.
10059 (init_eliminable_invariants): Likewise.
10060 * rtl.h (union rtunion): Likewise.
10061 (poly_int_rtx_p): Likewise.
10062 (strip_offset): Likewise.
10063 (strip_offset_and_add): Likewise.
10064 * rtlanal.cc (strip_offset): Likewise.
10065 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
10066 (get_addr_base_and_unit_offset_1): Likewise.
10067 (get_addr_base_and_unit_offset): Likewise.
10068 * tree-dfa.h (get_ref_base_and_extent): Likewise.
10069 (get_addr_base_and_unit_offset_1): Likewise.
10070 (get_addr_base_and_unit_offset): Likewise.
10071 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
10072 (strip_offset): Likewise.
10073 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
10074 * tree.cc (ptrdiff_tree_p): Likewise.
10075 * tree.h (poly_int_tree_p): Likewise.
10076 (ptrdiff_tree_p): Likewise.
10077 (get_inner_reference): Likewise.
10079 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
10081 * config/pa/pa.md (memory_barrier): Revise comment.
10082 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
10083 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
10085 2023-09-29 Jakub Jelinek <jakub@redhat.com>
10087 * vec.h (quick_insert, ordered_remove, unordered_remove,
10088 block_remove, qsort, sort, stablesort, quick_grow): Guard
10089 std::is_trivially_{copyable,default_constructible} and
10090 vec_detail::is_trivially_copyable_or_pair static assertions
10091 with GCC_VERSION >= 5000.
10092 (vec_detail::is_trivially_copyable_or_pair): Guard definition
10093 with GCC_VERSION >= 5000.
10095 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
10097 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
10098 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
10099 and aarch64_stp_policy to aarch64_ldp_stp_policy.
10100 (enum aarch64_stp_policy): Removed.
10101 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
10102 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
10103 and left only the definitions to the aarch64-opts one.
10104 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
10105 (aarch64_parse_stp_policy): Removed.
10106 (aarch64_override_options_internal): Removed calls to parsing
10107 functions and added obvious direct assignments.
10108 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
10109 code quality based on the new changes.
10110 * config/aarch64/aarch64.opt: Use single enum type
10111 aarch64_ldp_stp_policy for both ldp and stp options.
10113 2023-09-29 Richard Biener <rguenther@suse.de>
10115 PR tree-optimization/111583
10116 * tree-loop-distribution.cc (find_single_drs): Ensure the
10117 load/store are always executed.
10119 2023-09-29 Jakub Jelinek <jakub@redhat.com>
10121 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
10122 quick_grow_cleared method on unprom rather than quick_grow.
10124 2023-09-29 Sergei Trofimovich <siarheit@google.com>
10126 PR middle-end/111505
10127 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
10128 Add new helper. Use helper instead of memset() to wipe out pointers.
10130 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
10132 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
10134 * builtins.cc (c_readstr): Likewise. Build a local array of
10135 bytes and use native_decode_rtx to get the rtx image.
10136 (builtin_memcpy_read_str): Simplify accordingly.
10137 (builtin_strncpy_read_str): Likewise.
10138 (builtin_memset_read_str): Likewise.
10139 (builtin_memset_gen_str): Likewise.
10140 * expr.cc (string_cst_read_str): Likewise.
10142 2023-09-29 Jakub Jelinek <jakub@redhat.com>
10144 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
10145 instead of quick_grow on vec<bitmap_head> members.
10146 * cfganal.cc (control_dependences::control_dependences): Likewise.
10147 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
10148 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
10149 on auto_vec<bitmap_head> vars.
10150 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
10151 of quick_grow on vec<bitmap_head> var.
10153 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
10156 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
10158 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
10161 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
10164 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
10165 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
10166 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
10168 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
10171 2023-09-28 Pan Li <pan2.li@intel.com>
10174 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
10176 * config/riscv/vector-iterators.md: New iterator.
10178 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
10180 * rtl.h (lra_in_progress): Change type to bool.
10181 (ira_in_progress): Add new extern.
10182 * ira.cc (ira_in_progress): New global.
10183 (pass_ira::execute): Set up ira_in_progress.
10184 * lra.cc: (lra_in_progress): Change type to bool and initialize.
10185 (lra): Use bool values for lra_in_progress.
10186 * lra-eliminations.cc (init_elim_table): Ditto.
10188 2023-09-28 Richard Biener <rguenther@suse.de>
10191 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
10192 Use a heap allocated worklist for CFG traversal instead of
10195 2023-09-28 Jakub Jelinek <jakub@redhat.com>
10196 Jonathan Wakely <jwakely@redhat.com>
10198 * vec.h: Mention in file comment limited support for non-POD types
10199 in some operations.
10200 (vec_destruct): New function template.
10201 (release): Use it for non-trivially destructible T.
10202 (truncate): Likewise.
10203 (quick_push): Perform a placement new into slot
10204 instead of assignment.
10205 (pop): For non-trivially destructible T return void
10206 rather than T & and destruct the popped element.
10207 (quick_insert, ordered_remove): Note that they aren't suitable
10208 for non-trivially copyable types. Add static_asserts for that.
10209 (block_remove): Assert T is trivially copyable.
10210 (vec_detail::is_trivially_copyable_or_pair): New trait.
10211 (qsort, sort, stablesort): Assert T is trivially copyable or
10212 std::pair with both trivally copyable types.
10213 (quick_grow): Add assert T is trivially default constructible,
10214 for now commented out.
10215 (quick_grow_cleared): Don't call quick_grow, instead inline it
10216 by hand except for the new static_assert.
10217 (gt_ggc_mx): Assert T is trivially destructable.
10218 (auto_vec::operator=): Formatting fixes.
10219 (auto_vec::auto_vec): Likewise.
10220 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
10221 it manually and call quick_grow_cleared method rather than quick_grow.
10222 (safe_grow_cleared): Likewise.
10223 * edit-context.cc (class line_event): Move definition earlier.
10224 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
10226 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
10227 safe_grow_cleared instead of safe_grow followed by placement new
10228 constructing the elements.
10230 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
10232 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
10233 * tree-affine.cc (expr_to_aff_combination): Likewise.
10235 2023-09-28 Richard Biener <rguenther@suse.de>
10237 PR tree-optimization/111614
10238 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
10239 convert the first vector when required.
10241 2023-09-28 xuli <xuli1@eswincomputing.com>
10244 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
10245 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
10247 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
10249 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
10251 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
10254 * configure: Regenerate.
10255 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
10257 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
10258 Philipp Tomsich <philipp.tomsich@vrull.eu>
10259 Manolis Tsamis <manolis.tsamis@vrull.eu>
10261 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
10263 (enum aarch64_stp_policy): New enum type.
10264 * config/aarch64/aarch64-protos.h (struct tune_params): Add
10265 appropriate enums for the policies.
10266 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
10267 * config/aarch64/aarch64-tuning-flags.def
10268 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
10270 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
10271 function to parse ldp-policy parameter.
10272 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
10273 (aarch64_override_options_internal): Call parsing functions.
10274 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
10275 (aarch64_operands_ok_for_ldpstp): Add call to
10276 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
10277 check and alignment check and remove superseded ones.
10278 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
10279 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
10280 check and alignment check and remove superseded ones.
10281 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
10282 (aarch64-stp-policy): New param.
10283 * doc/invoke.texi: Document the parameters accordingly.
10285 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
10287 * tree-data-ref.cc (include calls.h): Add new include.
10288 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
10290 2023-09-27 Richard Biener <rguenther@suse.de>
10292 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
10294 2023-09-27 Jakub Jelinek <jakub@redhat.com>
10297 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
10298 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
10300 * function.cc (assign_parm_find_data_types): Likewise.
10302 2023-09-27 Pan Li <pan2.li@intel.com>
10304 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
10305 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
10306 (enum insn_type): Ditto.
10307 (expand_vec_roundeven): New func decl.
10308 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
10310 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10313 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
10315 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10317 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
10319 2023-09-27 Pan Li <pan2.li@intel.com>
10321 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
10322 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
10323 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
10324 (expand_vec_trunc): Ditto.
10326 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
10330 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
10331 Handle failure from expand_builtin_atomic_test_and_set.
10332 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
10333 generate atomic code through target support, return NULL
10334 instead of emitting non-atomic code. Also, for code handling
10335 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
10336 from calling emit_store_flag_force instead of returning NULL.
10338 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
10340 PR tree-optimization/111599
10341 * value-relation.cc (relation_oracle::valid_equivs): Ensure
10344 2023-09-26 Andrew Pinski <apinski@marvell.com>
10346 PR tree-optimization/106164
10347 PR tree-optimization/111456
10348 * match.pd (`(A ==/!= B) & (A CMP C)`):
10349 Support an optional cast on the second A.
10350 (`(A ==/!= B) | (A CMP C)`): Likewise.
10352 2023-09-26 Andrew Pinski <apinski@marvell.com>
10354 PR tree-optimization/111469
10355 * tree-ssa-phiopt.cc (minmax_replacement): Fix
10356 the assumption for the `non-diamond` handling cases
10359 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10361 * match.pd: Optimize COND_ADD reduction pattern.
10363 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10365 PR tree-optimization/111594
10366 PR tree-optimization/110660
10367 * match.pd: Optimize COND_LEN_ADD reduction.
10369 2023-09-26 Pan Li <pan2.li@intel.com>
10371 * config/riscv/autovec.md (round<mode>2): New pattern.
10372 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
10373 (enum insn_type): Ditto.
10374 (expand_vec_round): New function decl.
10375 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
10377 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
10379 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
10381 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
10383 PR middle-end/111547
10384 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
10385 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
10387 2023-09-26 Pan Li <pan2.li@intel.com>
10389 * config/riscv/autovec.md (rint<mode>2): New pattern.
10390 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
10391 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
10393 2023-09-26 Pan Li <pan2.li@intel.com>
10395 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
10396 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10397 (expand_vec_nearbyint): New function decl.
10398 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
10400 2023-09-26 Pan Li <pan2.li@intel.com>
10402 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
10403 (get_fp_rounding_coefficient): Rename.
10404 (gen_floor_const_fp): Remove.
10405 (expand_vec_ceil): Take renamed func.
10406 (expand_vec_floor): Ditto.
10408 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
10410 PR middle-end/111497
10411 * lra-constraints.cc (lra_constraints): Copy substituted
10413 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
10415 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
10417 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
10418 return statement in the varying case.
10420 2023-09-25 Xi Ruoyao <xry111@xry111.site>
10422 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
10424 2023-09-25 Andrew Pinski <apinski@marvell.com>
10426 PR tree-optimization/110386
10427 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
10429 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10432 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
10434 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
10437 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
10440 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
10443 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
10444 target_option_default_node when the callee has no option
10445 attributes, also simplify the existing code accordingly.
10447 2023-09-25 Guo Jie <guojie@loongson.cn>
10449 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
10450 pattern for vector construction.
10451 (vec_set<mode>_internal): Ditto.
10452 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
10453 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
10454 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
10455 Optimized the implementation of vector construction.
10456 (loongarch_expand_vector_init_same): New function.
10457 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
10458 pattern for vector construction.
10459 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
10461 (vec_concatv2df): Ditto.
10462 (vec_concatv4sf): Ditto.
10464 2023-09-24 Pan Li <pan2.li@intel.com>
10467 * config/riscv/riscv-v.cc
10468 (expand_vector_init_merge_repeating_sequence): Bugfix
10470 2023-09-24 Andrew Pinski <apinski@marvell.com>
10472 PR tree-optimization/111543
10473 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
10475 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10477 * config/riscv/autovec-opt.md: Extend VLS modes
10478 * config/riscv/vector-iterators.md: Ditto.
10480 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10482 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
10484 2023-09-23 Pan Li <pan2.li@intel.com>
10486 * config/riscv/autovec.md (floor<mode>2): New pattern.
10487 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
10488 (enum insn_type): Ditto.
10489 (expand_vec_floor): New function decl.
10490 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
10491 (expand_vec_floor): Ditto.
10493 2023-09-22 Pan Li <pan2.li@intel.com>
10495 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
10496 (emit_vec_float_cmp_mask): Rename.
10497 (expand_vec_copysign): Ditto.
10498 (emit_vec_copysign): Ditto.
10499 (emit_vec_abs): New function impl.
10500 (emit_vec_cvt_x_f): Ditto.
10501 (emit_vec_cvt_f_x): Ditto.
10502 (expand_vec_ceil): Ditto.
10504 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10506 * config/riscv/vector-iterators.md: Extend VLS modes.
10508 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10510 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
10511 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
10512 (vec_duplicate<mode>): Ditto.
10514 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10516 * config/riscv/autovec.md: Add VLS conditional patterns.
10517 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
10518 (expand_cond_binop): Ditto.
10519 (expand_cond_ternop): Ditto.
10520 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
10521 (expand_cond_binop): Ditto.
10522 (expand_cond_ternop): Ditto.
10524 2023-09-22 xuli <xuli1@eswincomputing.com>
10527 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
10528 into vrgatherei16.vv.
10530 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
10532 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
10533 New combine patterns.
10534 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
10536 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
10538 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
10539 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
10541 2023-09-22 Pan Li <pan2.li@intel.com>
10543 * config/riscv/autovec.md (ceil<mode>2): New pattern.
10544 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
10545 (enum insn_type): Ditto.
10546 (expand_vec_ceil): New function decl.
10547 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
10548 (expand_vec_float_cmp_mask): Ditto.
10549 (expand_vec_copysign): Ditto.
10550 (expand_vec_ceil): Ditto.
10551 * config/riscv/vector.md: Add VLS mode support.
10553 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10555 * config/riscv/autovec.md: Extend VLS modes.
10557 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10559 * config/riscv/vector-iterators.md: Extend VLS modes.
10561 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
10562 Robin Dapp <rdapp.gcc@gmail.com>
10564 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
10565 (emit_nonvlmax_insn): Adjust comments.
10566 (emit_vlmax_insn_lra): Adjust comments.
10568 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10570 * config.gcc (*linux*): Set rust target_objs, and
10571 target_has_targetrustm,
10572 * config/t-linux (linux-rust.o): New rule.
10573 * config/linux-rust.cc: New file.
10575 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10577 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
10578 rust_target_objs and target_has_targetrustm.
10579 * config/t-winnt (winnt-rust.o): New rule.
10580 * config/winnt-rust.cc: New file.
10582 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10584 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
10585 and target_has_targetrustm.
10586 * config/fuchsia-rust.cc: New file.
10587 * config/t-fuchsia: New file.
10589 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10591 * config.gcc (*-*-vxworks*): Set rust_target_objs and
10592 target_has_targetrustm.
10593 * config/t-vxworks (vxworks-rust.o): New rule.
10594 * config/vxworks-rust.cc: New file.
10596 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10598 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
10599 target_has_targetrustm.
10600 * config/t-dragonfly (dragonfly-rust.o): New rule.
10601 * config/dragonfly-rust.cc: New file.
10603 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10605 * config.gcc (*-*-solaris2*): Set rust_target_objs and
10606 target_has_targetrustm.
10607 * config/t-sol2 (sol2-rust.o): New rule.
10608 * config/sol2-rust.cc: New file.
10610 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10612 * config.gcc (*-*-openbsd*): Set rust_target_objs and
10613 target_has_targetrustm.
10614 * config/t-openbsd (openbsd-rust.o): New rule.
10615 * config/openbsd-rust.cc: New file.
10617 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10619 * config.gcc (*-*-netbsd*): Set rust_target_objs and
10620 target_has_targetrustm.
10621 * config/t-netbsd (netbsd-rust.o): New rule.
10622 * config/netbsd-rust.cc: New file.
10624 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10626 * config.gcc (*-*-freebsd*): Set rust_target_objs and
10627 target_has_targetrustm.
10628 * config/t-freebsd (freebsd-rust.o): New rule.
10629 * config/freebsd-rust.cc: New file.
10631 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10633 * config.gcc (*-*-darwin*): Set rust_target_objs and
10634 target_has_targetrustm.
10635 * config/t-darwin (darwin-rust.o): New rule.
10636 * config/darwin-rust.cc: New file.
10638 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10640 * config/i386/t-i386 (i386-rust.o): New rule.
10641 * config/i386/i386-rust.cc: New file.
10642 * config/i386/i386-rust.h: New file.
10644 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10646 * doc/tm.texi: Regenerate.
10647 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
10649 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10651 * doc/tm.texi: Regenerate.
10652 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
10653 TARGET_RUST_CPU_INFO.
10655 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10657 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
10658 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
10659 (tm_rust.h, cs-tm_rust.h, default-rust.o,
10660 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
10661 (s-tm-texi): Also check timestamp on rust-target.def.
10662 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
10663 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
10664 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
10666 * configure: Regenerate.
10667 * configure.ac (tm_rust_file_list, tm_rust_include_list,
10668 rust_target_objs): Add substitutes.
10669 * doc/tm.texi: Regenerate.
10670 * doc/tm.texi.in (targetrustm): Document.
10671 (target_has_targetrustm): Document.
10672 * genhooks.cc: Include rust/rust-target.def.
10673 * config/default-rust.cc: New file.
10675 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10678 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
10679 * config/riscv/predicates.md (autovec_else_operand): New predicate.
10680 * config/riscv/riscv-v.cc (get_else_operand): New function.
10681 (expand_cond_len_unop): Adapt ELSE value.
10682 (expand_cond_len_binop): Ditto.
10683 (expand_cond_len_ternop): Ditto.
10684 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
10685 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
10687 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10690 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
10692 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
10694 PR tree-optimization/111355
10695 * match.pd ((X + C) / N): Update pattern.
10697 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
10699 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
10701 2023-09-21 xuli <xuli1@eswincomputing.com>
10704 * config/riscv/constraints.md (c01): const_int 1.
10705 (c02): const_int 2.
10706 (c04): const_int 4.
10707 (c08): const_int 8.
10708 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
10709 (vector_eew16_stride_operand): Ditto.
10710 (vector_eew32_stride_operand): Ditto.
10711 (vector_eew64_stride_operand): Ditto.
10712 * config/riscv/vector-iterators.md: New iterator for stride operand.
10713 * config/riscv/vector.md: Add stride = element width constraint.
10715 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
10717 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
10718 (const_1_or_4_operand): Ditto.
10719 (vector_gs_scale_operand_16): Ditto.
10720 (vector_gs_scale_operand_32): Ditto.
10721 * config/riscv/vector-iterators.md: Adjust.
10723 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10725 * config/riscv/autovec.md: Extend VLS modes.
10726 * config/riscv/vector-iterators.md: Ditto.
10727 * config/riscv/vector.md: Ditto.
10729 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
10731 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
10732 of the return value.
10733 (ssa_cache::dump): Don't print GLOBAL RANGE header.
10734 (ssa_lazy_cache::merge_range): Adjust return value meaning.
10735 (ranger_cache::dump): Print GLOBAL RANGE header.
10737 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
10739 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
10741 (foperator_unordered_gt::fold_range): Same.
10742 (foperator_unordered_lt::fold_range): Same.
10743 (foperator_unordered_le::fold_range): Same.
10745 2023-09-20 Jakub Jelinek <jakub@redhat.com>
10747 * builtins.h (type_to_class): Declare.
10748 * builtins.cc (type_to_class): No longer static. Return
10749 int rather than enum.
10750 * doc/extend.texi (__builtin_classify_type): Document.
10752 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10755 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
10756 * optabs.cc (maybe_legitimize_operand): Ditto.
10757 (can_reuse_operands_p): Ditto.
10758 * optabs.h (enum expand_operand_type): Ditto.
10759 (create_undefined_input_operand): Ditto.
10761 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
10763 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
10764 'omp allocate' variables; move stack cleanup after other
10766 (omp_notice_variable): Process original decl when decl
10767 of the value-expression for a 'omp allocate' variable is passed.
10768 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
10770 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
10772 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
10773 support simplifying vector int not only scalar int.
10775 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10777 * config/riscv/vector-iterators.md: Extend VLS floating-point.
10779 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10781 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
10783 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
10786 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
10787 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
10789 2023-09-20 Richard Biener <rguenther@suse.de>
10791 PR tree-optimization/111489
10792 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
10794 2023-09-20 Richard Biener <rguenther@suse.de>
10796 PR tree-optimization/111489
10797 * doc/invoke.texi (--param uninit-max-chain-len): Document.
10798 (--param uninit-max-num-chains): Likewise.
10799 * params.opt (-param=uninit-max-chain-len=): New.
10800 (-param=uninit-max-num-chains=): Likewise.
10801 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
10802 param_uninit_max_num_chains.
10803 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
10804 (uninit_analysis::init_use_preds): Avoid VLA.
10805 (uninit_analysis::init_from_phi_def): Likewise.
10806 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
10807 template parameter.
10809 2023-09-20 Jakub Jelinek <jakub@redhat.com>
10811 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
10812 GET_MODE_PRECISION of TImode or DImode depending on whether
10813 TImode is supported scalar mode.
10814 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
10815 * expr.cc (expand_expr_real_1): Likewise.
10816 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
10817 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
10819 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
10821 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
10822 (*n<optab><mode>): Ditto.
10823 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
10824 (*<any_shiftrt:optab>trunc<mode>): Ditto.
10825 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
10826 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
10827 (*single_widen_mult<any_extend:su><mode>): Ditto.
10828 (*single_widen_mul<any_extend:su><mode>): Ditto.
10829 (*single_widen_mult<mode>): Ditto.
10830 (*single_widen_mul<mode>): Ditto.
10831 (*dual_widen_fma<mode>): Ditto.
10832 (*dual_widen_fma<su><mode>): Ditto.
10833 (*single_widen_fma<mode>): Ditto.
10834 (*single_widen_fma<su><mode>): Ditto.
10835 (*dual_fma<mode>): Ditto.
10836 (*single_fma<mode>): Ditto.
10837 (*dual_fnma<mode>): Ditto.
10838 (*dual_widen_fnma<mode>): Ditto.
10839 (*single_fnma<mode>): Ditto.
10840 (*single_widen_fnma<mode>): Ditto.
10841 (*dual_fms<mode>): Ditto.
10842 (*dual_widen_fms<mode>): Ditto.
10843 (*single_fms<mode>): Ditto.
10844 (*single_widen_fms<mode>): Ditto.
10845 (*dual_fnms<mode>): Ditto.
10846 (*dual_widen_fnms<mode>): Ditto.
10847 (*single_fnms<mode>): Ditto.
10848 (*single_widen_fnms<mode>): Ditto.
10850 2023-09-20 Jakub Jelinek <jakub@redhat.com>
10853 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
10854 on vars or function decls if -fopenmp or -fopenmp-simd.
10856 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
10859 * config/riscv/autovec-opt.md: Add missed operand.
10861 2023-09-20 Omar Sandoval <osandov@osandov.com>
10864 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
10865 dwarf_split_debug_info.
10867 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10869 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
10870 (vectorize_related_mode): Add VLS related modes.
10871 * config/riscv/vector-iterators.md: Extend VLS modes.
10873 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
10875 PR rtl-optimization/110071
10876 * ira-color.cc (improve_allocation): Consider cost of callee
10879 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
10880 Xi Ruoyao <xry111@xry111.site>
10882 * configure: Regenerate.
10883 * configure.ac: Checking assembler for -mno-relax support.
10884 Disable relaxation when probing leb128 support.
10886 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
10888 * config.in: Regenerate.
10889 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
10890 mrelax. And set the initial value of explicit-relocs according to the
10892 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
10893 --no-relax option to the linker.
10894 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
10895 -mno-relax, pass the -mno-relax option to the assembler.
10896 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
10897 * config/loongarch/loongarch.opt: Regenerate.
10898 * configure: Regenerate.
10899 * configure.ac: Add detection of support for binutils relax function.
10901 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
10903 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
10904 -fdeps-target= flags.
10905 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
10906 only -fdeps-format= is specified.
10907 * json.h: Add a TODO item to refactor out to share with
10908 `libcpp/mkdeps.cc`.
10910 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
10911 Jason Merrill <jason@redhat.com>
10913 * gcc.cc (join_spec_func): Add a spec function to join all
10916 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
10918 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
10919 src_op_0 var to avoid rtl check error.
10921 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10923 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
10925 (operator_not_equal::fold_range): Handle VREL_EQ.
10926 (operator_lt::fold_range): Remove special casing for VREL_EQ.
10927 (operator_gt::fold_range): Same.
10928 (foperator_unordered_equal::fold_range): Same.
10930 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
10932 * doc/extend.texi: Document attributes hot, cold on C++ types.
10934 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
10936 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
10937 modulo instruction is disabled.
10938 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
10939 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
10940 (define_expand umod<mode>3): New.
10941 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
10942 instruction is disabled.
10943 (umodti3, modti3): Check if the modulo instruction is disabled.
10945 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
10947 * doc/gm2.texi (fdebug-builtins): Correct description.
10949 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
10951 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
10952 * config/iq2000/iq2000.md (rotrsi3): Use it.
10954 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10956 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
10957 (operator_lt::op2_range): Same.
10958 (operator_le::op1_range): Same.
10959 (operator_le::op2_range): Same.
10960 (operator_gt::op1_range): Same.
10961 (operator_gt::op2_range): Same.
10962 (operator_ge::op1_range): Same.
10963 (operator_ge::op2_range): Same.
10964 (foperator_unordered_lt::op1_range): Same.
10965 (foperator_unordered_lt::op2_range): Same.
10966 (foperator_unordered_le::op1_range): Same.
10967 (foperator_unordered_le::op2_range): Same.
10968 (foperator_unordered_gt::op1_range): Same.
10969 (foperator_unordered_gt::op2_range): Same.
10970 (foperator_unordered_ge::op1_range): Same.
10971 (foperator_unordered_ge::op2_range): Same.
10973 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10975 * value-range.h (frange::update_nan): New.
10977 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10979 * range-op-float.cc (operator_not_equal::op2_range): New.
10980 * range-op-mixed.h: Add operator_not_equal::op2_range.
10982 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
10984 PR tree-optimization/110080
10985 PR tree-optimization/110249
10986 * tree-vrp.cc (remove_unreachable::final_p): New.
10987 (remove_unreachable::maybe_register): Rename from
10988 maybe_register_block and call early or final routine.
10989 (fully_replaceable): New.
10990 (remove_unreachable::handle_early): New.
10991 (remove_unreachable::remove_and_update_globals): Remove
10992 non-final processing.
10993 (rvrp_folder::rvrp_folder): Add final flag to constructor.
10994 (rvrp_folder::post_fold_bb): Remove unreachable registration.
10995 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
10996 (execute_ranger_vrp): Adjust some call parameters.
10998 2023-09-19 Richard Biener <rguenther@suse.de>
11001 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
11003 * tree-pretty-print.cc (op_symbol): Likewise.
11004 (op_symbol_code): Print TDF_GIMPLE variant if requested.
11005 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
11007 (dump_gimple_cond): Likewise.
11009 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
11010 Pan Li <pan2.li@intel.com>
11012 * tree-streamer.h (bp_unpack_machine_mode): If
11013 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
11015 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11017 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
11019 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11021 * config/riscv/autovec.md: Extend VLS modes.
11022 * config/riscv/vector.md: Ditto.
11024 2023-09-19 Richard Biener <rguenther@suse.de>
11026 PR tree-optimization/111465
11027 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
11028 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
11030 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11032 * config/riscv/autovec.md: Extend VLS floating-point modes.
11033 * config/riscv/vector.md: Ditto.
11035 2023-09-19 Jakub Jelinek <jakub@redhat.com>
11037 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
11038 nor check type_has_mode_precision_p for width larger than [TD]Imode
11040 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
11041 to type. Use boolean_true_node instead of
11042 constant_boolean_node (true, boolean_type_node). Formatting fixes.
11044 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11046 * config/riscv/autovec.md: Add VLS modes.
11047 * config/riscv/vector.md: Ditto.
11049 2023-09-19 Jakub Jelinek <jakub@redhat.com>
11051 * tree.cc (build_bitint_type): Assert precision is not 0, or
11052 for signed types 1.
11053 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
11054 of unsigned _BitInt(1).
11056 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
11058 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
11059 Removed old combine patterns.
11060 (*single_<optab>mult_plus<mode>): Ditto.
11061 (*double_<optab>mult_plus<mode>): Ditto.
11062 (*sign_zero_extend_fma): Ditto.
11063 (*zero_sign_extend_fma): Ditto.
11064 (*double_widen_fma<mode>): Ditto.
11065 (*single_widen_fma<mode>): Ditto.
11066 (*double_widen_fnma<mode>): Ditto.
11067 (*single_widen_fnma<mode>): Ditto.
11068 (*double_widen_fms<mode>): Ditto.
11069 (*single_widen_fms<mode>): Ditto.
11070 (*double_widen_fnms<mode>): Ditto.
11071 (*single_widen_fnms<mode>): Ditto.
11072 (*reduc_plus_scal_<mode>): Adjust name.
11073 (*widen_reduc_plus_scal_<mode>): Adjust name.
11074 (*dual_widen_fma<mode>): New combine pattern.
11075 (*dual_widen_fmasu<mode>): Ditto.
11076 (*dual_widen_fmaus<mode>): Ditto.
11077 (*dual_fma<mode>): Ditto.
11078 (*single_fma<mode>): Ditto.
11079 (*dual_fnma<mode>): Ditto.
11080 (*single_fnma<mode>): Ditto.
11081 (*dual_fms<mode>): Ditto.
11082 (*single_fms<mode>): Ditto.
11083 (*dual_fnms<mode>): Ditto.
11084 (*single_fnms<mode>): Ditto.
11085 * config/riscv/autovec.md (fma<mode>4):
11086 Reafctor fma pattern.
11087 (*fma<VI:mode><P:mode>): Removed.
11088 (fnma<mode>4): Reafctor.
11089 (*fnma<VI:mode><P:mode>): Removed.
11090 (*fma<VF:mode><P:mode>): Removed.
11091 (*fnma<VF:mode><P:mode>): Removed.
11092 (fms<mode>4): Reafctor.
11093 (*fms<VF:mode><P:mode>): Removed.
11094 (fnms<mode>4): Reafctor.
11095 (*fnms<VF:mode><P:mode>): Removed.
11096 * config/riscv/riscv-protos.h (prepare_ternary_operands):
11098 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
11099 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
11100 (*pred_mul_plus<mode>): Removed.
11101 (*pred_mul_plus<mode>_scalar): Removed.
11102 (*pred_mul_plus<mode>_extended_scalar): Removed.
11103 (*pred_minus_mul<mode>_undef): New pattern.
11104 (*pred_minus_mul<mode>): Removed.
11105 (*pred_minus_mul<mode>_scalar): Removed.
11106 (*pred_minus_mul<mode>_extended_scalar): Removed.
11107 (*pred_mul_<optab><mode>_undef): New pattern.
11108 (*pred_mul_<optab><mode>): Removed.
11109 (*pred_mul_<optab><mode>_scalar): Removed.
11110 (*pred_mul_neg_<optab><mode>_undef): New pattern.
11111 (*pred_mul_neg_<optab><mode>): Removed.
11112 (*pred_mul_neg_<optab><mode>_scalar): Removed.
11114 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
11116 * config/riscv/riscv-vector-builtins.cc
11117 (builtin_decl, expand_builtin): Replace SVE with RVV.
11119 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
11121 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
11122 riscv-cmo.def and riscv-scalar-crypto.def.
11124 2023-09-18 Pan Li <pan2.li@intel.com>
11126 * config/riscv/autovec.md: Extend to vls mode.
11128 2023-09-18 Pan Li <pan2.li@intel.com>
11130 * config/riscv/autovec.md: Bugfix.
11131 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
11133 2023-09-18 Andrew Pinski <apinski@marvell.com>
11135 PR tree-optimization/111442
11136 * match.pd (zero_one_valued_p): Have the bit_and match not be
11139 2023-09-18 Andrew Pinski <apinski@marvell.com>
11141 PR tree-optimization/111435
11142 * match.pd (zero_one_valued_p): Don't do recursion
11145 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
11147 * config/darwin-protos.h (enum darwin_external_toolchain): New.
11148 * config/darwin.cc (DSYMUTIL_VERSION): New.
11149 (darwin_override_options): Choose the default debug DWARF version
11150 depending on the configured dsymutil version.
11152 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
11154 * configure: Regenerate.
11155 * configure.ac: Handle explict disable of stdlib option, set
11156 defaults for Darwin.
11158 2023-09-18 Andrew Pinski <apinski@marvell.com>
11160 PR tree-optimization/111431
11161 * match.pd (`(a == CST) & a`): New pattern.
11163 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11165 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
11166 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
11168 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
11171 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
11172 Add support for immediates using shifted ORR/BIC.
11173 (aarch64_split_dimode_const_store): Apply if we save one instruction.
11174 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
11175 Make pattern global.
11177 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
11179 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
11180 (neoverse-v1): Place before zeus.
11181 (neoverse-v2): Place before demeter.
11182 * config/aarch64/aarch64-tune.md: Regenerate.
11184 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11186 * config/riscv/autovec.md: Add VLS modes.
11187 * config/riscv/vector-iterators.md: Ditto.
11188 * config/riscv/vector.md: Ditto.
11190 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11192 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
11193 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
11195 2023-09-18 Richard Biener <rguenther@suse.de>
11197 PR tree-optimization/111294
11198 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
11200 (back_threader::find_paths_to_names): Adjust.
11201 (back_threader::maybe_thread_block): Likewise.
11202 (back_threader_profitability::possibly_profitable_path_p): Remove
11203 code applying extra costs to copies PHIs.
11205 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11207 * config/riscv/autovec.md: Extend VLS modes.
11208 * config/riscv/vector.md: Ditto.
11210 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11212 * config/riscv/vector.md (mov<mode>): New pattern.
11213 (*mov<mode>_mem_to_mem): Ditto.
11214 (*mov<mode>): Ditto.
11215 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
11216 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
11217 (*mov<mode>_vls): Ditto.
11218 (movmisalign<mode>): Ditto.
11219 (@vec_duplicate<mode>): Ditto.
11220 * config/riscv/autovec-vls.md: Removed.
11222 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11225 * config/riscv/autovec.md: Add VLS modes.
11227 2023-09-18 Jason Merrill <jason@redhat.com>
11229 * doc/gty.texi: Add discussion of cache vs. deletable.
11231 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11233 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
11234 (copysign<mode>3): Ditto.
11235 (xorsign<mode>3): Ditto.
11236 (<optab><mode>2): Ditto.
11237 * config/riscv/autovec.md: Extend VLS modes.
11239 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
11241 PR middle-end/111303
11242 * match.pd ((t * 2) / 2): Update pattern.
11244 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
11246 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
11248 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11251 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
11252 (vec_extract<mode><vel>): Ditto.
11253 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
11254 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
11255 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
11257 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
11259 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
11260 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
11261 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
11262 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
11263 new insn/expansions.
11264 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
11265 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
11266 (*riscv_<sha256_op>_si): New raw instruction for RV32.
11267 (*riscv_<sm3_op>_si): Ditto.
11268 (*riscv_<sm4_op>_si): Ditto.
11269 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
11270 (riscv_<sm3_op>_di_extended): Ditto.
11271 (riscv_<sm4_op>_di_extended): Ditto.
11272 (riscv_<sha256_op>_si): New common instruction expansion.
11273 (riscv_<sm3_op>_si): Ditto.
11274 (riscv_<sm4_op>_si): Ditto.
11275 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
11276 "crypto_zksh" and "crypto_zksed". Remove availability
11277 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
11278 * config/riscv/riscv-ftypes.def: Remove unused function type.
11279 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
11280 intrinsics to operate on uint32_t.
11282 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
11284 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
11285 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
11286 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
11287 Removed as no longer used.
11288 (RISCV_ATYPE_UDI): New for uint64_t.
11289 * config/riscv/riscv-cmo.def: Make types unsigned for not working
11290 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
11291 argument/return types.
11292 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
11293 number and shift amount types unsigned.
11294 * config/riscv/riscv-scalar-crypto.def: Ditto.
11296 2023-09-16 Pan Li <pan2.li@intel.com>
11298 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
11300 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
11302 * config/riscv/predicates.md: Restrict predicate
11303 to allow 'reg' only.
11305 2023-09-15 Andrew Pinski <apinski@marvell.com>
11307 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
11308 Also match `a & zero_one_valued_p` too.
11310 2023-09-15 Andrew Pinski <apinski@marvell.com>
11312 PR tree-optimization/111414
11313 * match.pd (`(1 >> X) != 0`): Check to see if
11314 the integer_onep was an integral type (not a vector type).
11316 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
11318 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
11319 run phi analysis, and do it before loop analysis.
11321 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
11323 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
11326 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
11328 PR tree-optimization/111407
11329 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
11330 when one of the operands is subject to abnormal coalescing.
11332 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
11334 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
11335 (enum insn_type): Ditto.
11336 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
11337 (emit_vlmax_insn): Adjust.
11338 (emit_nonvlmax_insn): Adjust.
11339 (emit_vlmax_insn_lra): Adjust.
11341 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
11343 * config/riscv/autovec-opt.md: Adjust.
11344 * config/riscv/autovec.md: Ditto.
11345 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
11346 (expand_reduction): Adjust expand_reduction prototype.
11347 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
11348 (expand_reduction): Refactor expand_reduction.
11350 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
11353 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
11354 the lower memory access to a mem-pair operand.
11356 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
11358 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
11359 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
11360 before the driver canonicalization routines.
11361 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
11362 to loongarch-driver.h
11363 * config/loongarch/t-linux: Move multilib-related definitions to
11365 * config/loongarch/t-multilib: New file. Inject library build
11366 options obtained from --with-multilib-list.
11367 * config/loongarch/t-loongarch: Same.
11369 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
11372 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
11373 New combine pattern.
11374 (*fold_left_widen_plus_<mode>): Ditto.
11375 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
11376 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
11377 Change from define_expand to define_insn_and_split.
11378 (fold_left_plus_<mode>): Ditto.
11379 (mask_len_fold_left_plus_<mode>): Ditto.
11380 * config/riscv/riscv-v.cc (expand_reduction):
11381 Support widen reduction.
11382 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
11383 Add new iterators and attrs.
11385 2023-09-14 David Malcolm <dmalcolm@redhat.com>
11387 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
11388 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
11389 (sarif_thread_flow::sarif_thread_flow): New.
11390 (sarif_builder::make_code_flow_object): Reimplement, creating
11391 per-thread threadFlow objects, populating them with the relevant
11393 (sarif_builder::make_thread_flow_object): Delete, moving the
11394 code into sarif_builder::make_code_flow_object.
11395 (sarif_builder::make_thread_flow_location_object): Add
11396 "path_event_idx" param. Use it to set "executionOrder"
11398 * diagnostic-path.h (diagnostic_event::get_thread_id): New
11399 pure-virtual vfunc.
11400 (class diagnostic_thread): New.
11401 (diagnostic_path::num_threads): New pure-virtual vfunc.
11402 (diagnostic_path::get_thread): New pure-virtual vfunc.
11403 (diagnostic_path::multithreaded_p): New decl.
11404 (simple_diagnostic_event::simple_diagnostic_event): Add optional
11406 (simple_diagnostic_event::get_thread_id): New accessor.
11407 (simple_diagnostic_event::m_thread_id): New.
11408 (class simple_diagnostic_thread): New.
11409 (simple_diagnostic_path::simple_diagnostic_path): Move definition
11411 (simple_diagnostic_path::num_threads): New.
11412 (simple_diagnostic_path::get_thread): New.
11413 (simple_diagnostic_path::add_thread): New.
11414 (simple_diagnostic_path::add_thread_event): New.
11415 (simple_diagnostic_path::m_threads): New.
11416 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
11417 param for overriding the context's printer.
11418 (diagnostic_show_locus): Likwise.
11419 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
11420 Move here from diagnostic-path.h. Add main thread.
11421 (simple_diagnostic_path::num_threads): New.
11422 (simple_diagnostic_path::get_thread): New.
11423 (simple_diagnostic_path::add_thread): New.
11424 (simple_diagnostic_path::add_thread_event): New.
11425 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
11426 param and use it to initialize m_thread_id. Reformat.
11427 * diagnostic.h: Add pretty_printer param for overriding the
11429 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
11430 (can_consolidate_events): Compare thread ids.
11431 (class per_thread_summary): New.
11432 (event_range::event_range): Add per_thread_summary arg.
11433 (event_range::print): Add "pp" param and use it rather than dc's
11435 (event_range::m_thread_id): New field.
11436 (event_range::m_per_thread_summary): New field.
11437 (path_summary::multithreaded_p): New.
11438 (path_summary::get_events_for_thread_id): New.
11439 (path_summary::m_per_thread_summary): New field.
11440 (path_summary::m_thread_id_to_events): New field.
11441 (path_summary::get_or_create_events_for_thread_id): New.
11442 (path_summary::path_summary): Create per_thread_summary instances
11443 as needed and associate the event_range instances with them.
11444 (base_indent): Move here from print_path_summary_as_text.
11445 (per_frame_indent): Likewise.
11446 (class thread_event_printer): New, adapted from parts of
11447 print_path_summary_as_text.
11448 (print_path_summary_as_text): Make static. Reimplement to
11449 moving most of existing code to class thread_event_printer,
11450 capturing state as per-thread as appropriate.
11451 (default_tree_diagnostic_path_printer): Add missing 'break' on
11454 2023-09-14 David Malcolm <dmalcolm@redhat.com>
11456 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
11457 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
11458 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
11459 clearing the deletable gcc_root_tab_t.
11460 (ggc_common_finalize): New.
11461 * ggc.h (ggc_common_finalize): New decl.
11462 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
11463 ggc_common_finalize.
11465 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
11467 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
11468 unsigned comparisons.
11469 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
11470 generation of salt/saltu instructions.
11471 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
11472 * config/xtensa/xtensa.md (salt, saltu): New instruction
11475 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
11477 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
11480 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
11482 * config/riscv/autovec.md: Change rtx code to unspec.
11483 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
11484 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
11485 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
11487 (class widen_freducop): Removed.
11488 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
11489 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
11490 (@pred_<reduc_op><mode>): New name.
11491 (@pred_widen_reduc_plus<v_su><mode>): Change name.
11492 (@pred_reduc_plus<order><mode>): Change name.
11493 (@pred_widen_reduc_plus<order><mode>): Change name.
11495 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
11497 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
11498 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
11499 * config/riscv/vector-iterators.md: New iterators and attrs.
11500 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
11502 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
11503 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
11504 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
11505 (@pred_reduc_<reduc><mode>): Added.
11506 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
11507 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
11508 (@pred_widen_reduc_plus<v_su><mode>): Added.
11509 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
11510 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
11511 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
11512 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
11513 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
11514 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
11515 (@pred_reduc_plus<order><mode>): Added.
11516 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
11517 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
11518 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
11519 (@pred_widen_reduc_plus<order><mode>): Added.
11521 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
11523 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
11524 Move WHILELO handling to...
11525 (aarch64_vector_costs::finish_cost): ...here. Check whether the
11526 vectorizer has decided to use a predicated loop.
11528 2023-09-14 Andrew Pinski <apinski@marvell.com>
11530 PR tree-optimization/106164
11531 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
11532 Expand to support constants that are off by one.
11534 2023-09-14 Andrew Pinski <apinski@marvell.com>
11536 * genmatch.cc (parser::parse_result): For an else clause
11537 of an if statement inside a switch, error out explictly.
11539 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11541 * config/riscv/autovec-opt.md: Add VLS mask modes.
11542 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
11543 (vcond_mask_<mode><vm>): Add VLS mask modes.
11544 * config/riscv/vector.md: Ditto.
11546 2023-09-14 Richard Biener <rguenther@suse.de>
11548 PR tree-optimization/111294
11549 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
11550 operands that eventually become dead and use simple_dce_from_worklist
11551 to remove their definitions if they did so.
11553 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
11555 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
11556 Accept all nonimmediate_operands, but keep the existing constraints.
11557 If the instruction is split before RA, load invalid addresses into
11558 a temporary register.
11559 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
11561 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11564 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
11565 (vector_insn_info::global_merge): Ditto.
11566 (vector_insn_info::get_avl_or_vl_reg): Ditto.
11568 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11570 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
11572 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
11574 * config/loongarch/loongarch-def.c: Modify the default value of
11577 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11579 * config/xtensa/xtensa.cc (xtensa_expand_scc):
11580 Revert the changes from the last patch, as the work in the RTL
11581 expansion pass is too far to determine the physical registers.
11582 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
11583 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
11585 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
11588 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
11590 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11592 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
11593 (@vec_extract<mode><vel>): Ditto.
11594 * config/riscv/vector.md: Ditto
11596 2023-09-13 Andrew Pinski <apinski@marvell.com>
11598 * match.pd (`X <= MAX(X, Y)`):
11599 Move before `MIN (X, C1) < C2` pattern.
11601 2023-09-13 Andrew Pinski <apinski@marvell.com>
11603 PR tree-optimization/111364
11604 * match.pd (`MIN (X, Y) == X`): Extend
11605 to min/lt, min/ge, max/gt, max/le.
11607 2023-09-13 Andrew Pinski <apinski@marvell.com>
11609 PR tree-optimization/111345
11610 * match.pd (`Y > (X % Y)`): Merge
11612 (`(X % Y) < Y`): Pattern by adding `:c`
11615 2023-09-13 Richard Biener <rguenther@suse.de>
11617 PR tree-optimization/111387
11618 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
11619 EDGE_DFS_BACK when doing BB vectorization.
11620 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
11621 to compute RPO and mark backedges.
11623 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
11625 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
11626 New combine pattern.
11627 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
11628 (<mulh_table><mode>3_highpart): Merged pattern.
11629 (umul<mode>3_highpart): Mrege smul and umul.
11630 * config/riscv/vector-iterators.md (umul): New iterators.
11631 (UNSPEC_VMULHU): New iterators.
11633 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
11635 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
11636 New combine pattern.
11637 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
11639 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
11641 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
11642 (*cond_copysign<mode>): New combine pattern.
11643 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
11645 2023-09-13 Richard Biener <rguenther@suse.de>
11647 PR tree-optimization/111397
11648 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
11649 argument to specify whether the PHI destination doesn't flow in
11650 from an abnormal PHI.
11651 (propagate_value): Adjust.
11652 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
11654 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
11656 (process_bb): Likewise.
11658 2023-09-13 Pan Li <pan2.li@intel.com>
11661 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
11663 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
11665 PR tree-optimization/111303
11666 * match.pd ((X - N * M) / N): Add undefined_p checking.
11667 ((X + N * M) / N): Likewise.
11668 ((X + C) div_rshift N): Likewise.
11670 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11673 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
11675 2023-09-12 Martin Jambor <mjambor@suse.cz>
11677 * dbgcnt.def (form_fma): New.
11678 * tree-ssa-math-opts.cc: Include dbgcnt.h.
11679 (convert_mult_to_fma): Bail out if the debug counter say so.
11681 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
11683 * config/riscv/autovec-opt.md: Update type
11684 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
11686 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11688 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
11690 (aarch64_layout_frame): Use it to decide whether locals should
11691 go above or below the saved registers.
11692 (aarch64_expand_prologue): Update stack layout comment.
11693 Emit a stack tie after the final adjustment.
11695 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11697 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
11698 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
11699 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
11701 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11703 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
11704 (aarch64_frame::hard_fp_save_and_probe): New fields.
11705 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
11706 Rather than asserting that a leaf function saves LR, instead assert
11707 that a leaf function saves something.
11708 (aarch64_get_separate_components): Prevent the chosen probe
11709 registers from being individually shrink-wrapped.
11710 (aarch64_allocate_and_probe_stack_space): Remove workaround for
11711 probe registers that aren't at the bottom of the previous allocation.
11713 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11715 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
11716 Always probe the residual allocation at offset 1024, asserting
11717 that that is in range.
11719 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11721 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
11722 the LR save slot is in the first 16 bytes of the register save area.
11723 Only form STP/LDP push/pop candidates if both registers are valid.
11724 (aarch64_allocate_and_probe_stack_space): Remove workaround for
11725 when LR was not in the first 16 bytes.
11727 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11729 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
11730 Don't probe final allocations that are exactly 1KiB in size (after
11731 unprobed space above the final allocation has been deducted).
11733 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11735 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
11736 calculation of initial_adjust for frames in which all saves
11739 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11741 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
11742 the allocation of the top of the frame.
11744 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11746 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
11748 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
11749 from the bottom of the frame, rather than the bottom of the saved
11750 register area. Measure reg_offset from the bottom of the frame
11751 rather than the bottom of the saved register area.
11752 (aarch64_save_callee_saves): Update accordingly.
11753 (aarch64_restore_callee_saves): Likewise.
11754 (aarch64_get_separate_components): Likewise.
11755 (aarch64_process_components): Likewise.
11757 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11759 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
11761 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11763 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
11765 (aarch64_frame::bytes_above_hard_fp): ...this.
11766 * config/aarch64/aarch64.cc (aarch64_layout_frame)
11767 (aarch64_expand_prologue): Update accordingly.
11768 (aarch64_initial_elimination_offset): Likewise.
11770 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11772 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
11773 (aarch64_frame::bytes_above_locals): ...this.
11774 * config/aarch64/aarch64.cc (aarch64_layout_frame)
11775 (aarch64_initial_elimination_offset): Update accordingly.
11777 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11779 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
11780 calculation of chain_offset into the emit_frame_chain block.
11782 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11784 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
11785 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
11786 callee_offset handling.
11787 (aarch64_save_callee_saves): Replace the start_offset parameter
11788 with a bytes_below_sp parameter.
11789 (aarch64_restore_callee_saves): Likewise.
11790 (aarch64_expand_prologue): Update accordingly.
11791 (aarch64_expand_epilogue): Likewise.
11793 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11795 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
11797 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
11798 (aarch64_expand_epilogue): Use it instead of
11799 below_hard_fp_saved_regs_size.
11801 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11803 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
11805 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
11806 and use it instead of crtl->outgoing_args_size.
11807 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
11808 of outgoing_args_size.
11809 (aarch64_process_components): Likewise.
11811 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11813 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
11814 allocate the frame in one go if there are no saved registers.
11816 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11818 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
11819 chain_offset rather than callee_offset.
11821 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11823 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
11824 a local shorthand for cfun->machine->frame.
11825 (aarch64_restore_callee_saves, aarch64_get_separate_components):
11826 (aarch64_process_components): Likewise.
11827 (aarch64_allocate_and_probe_stack_space): Likewise.
11828 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
11829 (aarch64_layout_frame): Use existing shorthand for one more case.
11831 2023-09-12 Andrew Pinski <apinski@marvell.com>
11833 PR tree-optimization/107881
11834 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
11835 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
11837 2023-09-12 Pan Li <pan2.li@intel.com>
11839 * config/riscv/riscv-vector-costs.h (struct range): Removed.
11841 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11843 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
11844 (compute_nregs_for_mode): Ditto.
11845 (live_range_conflict_p): Ditto.
11846 (max_number_of_live_regs): Ditto.
11847 (compute_lmul): Ditto.
11848 (costs::prefer_new_lmul_p): Ditto.
11849 (costs::better_main_loop_than_p): Ditto.
11850 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
11851 (struct var_live_range): Ditto.
11852 (struct autovec_info): Ditto.
11853 * config/riscv/t-riscv: Update makefile for COST model.
11855 2023-09-12 Jakub Jelinek <jakub@redhat.com>
11857 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
11860 2023-09-12 Jakub Jelinek <jakub@redhat.com>
11862 PR middle-end/111338
11863 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
11865 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
11866 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
11867 optimization if type's precision is too large for
11868 vn_walk_cb_data::bufsize.
11870 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
11872 * doc/gm2.texi (Compiler options): Document new option
11875 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
11877 * doc/sourcebuild.texi (stack_size): Update.
11879 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
11881 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
11882 (<optab>_not<mode>3): Likewise.
11883 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
11885 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
11887 (GEN_EMIT_HELPER2): Likewise.
11888 (emit_strcmp_scalar_compare_byte): New function.
11889 (emit_strcmp_scalar_compare_subword): Likewise.
11890 (emit_strcmp_scalar_compare_word): Likewise.
11891 (emit_strcmp_scalar_load_and_compare): Likewise.
11892 (emit_strcmp_scalar_call_to_libc): Likewise.
11893 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
11894 (emit_strcmp_scalar_result_calculation): Likewise.
11895 (riscv_expand_strcmp_scalar): Likewise.
11896 (riscv_expand_strcmp): Likewise.
11897 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
11899 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
11900 (cmpstrnsi): Invoke expansion function for str(n)cmp.
11901 (cmpstrsi): Likewise.
11902 * config/riscv/riscv.opt: Add new parameter
11903 '-mstring-compare-inline-limit'.
11904 * doc/invoke.texi: Document new parameter
11905 '-mstring-compare-inline-limit'.
11907 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
11909 * config.gcc: Add new object riscv-string.o.
11911 * config/riscv/riscv-protos.h (riscv_expand_strlen):
11913 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
11914 * config/riscv/riscv.opt: New flag 'minline-strlen'.
11915 * config/riscv/t-riscv: Add new object riscv-string.o.
11916 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
11917 (th_rev<mode>2): Likewise.
11918 (th_tstnbz<mode>2): New INSN.
11919 * doc/invoke.texi: Document '-minline-strlen'.
11920 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
11921 (emit_unlikely_jump_insn): Likewise.
11922 * rtl.h (emit_likely_jump_insn): New prototype.
11923 (emit_unlikely_jump_insn): Likewise.
11924 * config/riscv/riscv-string.cc: New file.
11926 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
11928 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
11929 (TARGET_SUPPORTS_ALIASES): Define.
11931 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
11933 * doc/sourcebuild.texi (check-function-bodies): Update.
11935 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
11937 * gimplify.cc (gimplify_bind_expr): Check for
11938 insertion after variable cleanup. Convert 'omp allocate'
11939 var-decl attribute to GOMP_alloc/GOMP_free calls.
11941 2023-09-12 xuli <xuli1@eswincomputing.com>
11943 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
11944 parameter e and replace NULL_RTX with gcc_unreachable.
11946 2023-09-12 xuli <xuli1@eswincomputing.com>
11948 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
11950 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11951 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
11952 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
11954 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
11955 * config/riscv/riscv-vector-builtins.cc: Add args type.
11957 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
11959 * config/riscv/riscv.cc
11960 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
11961 riscv_avoid_shrink_wrapping_separate.
11962 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
11964 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
11966 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
11968 * shrink-wrap.cc (try_shrink_wrapping_separate):call
11969 use_shrink_wrapping_separate.
11970 (use_shrink_wrapping_separate): wrap the condition
11971 check in use_shrink_wrapping_separate.
11972 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
11974 2023-09-11 Andrew Pinski <apinski@marvell.com>
11976 PR tree-optimization/111348
11977 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
11978 the cmp part of the pattern.
11980 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
11983 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
11984 Call output_addr_const for CASE_CONST_SCALAR_INT.
11986 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11988 * config/riscv/thead.md: Update types
11990 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11992 * config/riscv/riscv.md: Update types
11994 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11996 * config/riscv/riscv.md: Add "zicond" type
11997 * config/riscv/zicond.md: Update types
11999 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
12001 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
12002 * config/riscv/zc.md: Update types
12004 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
12006 * config/riscv/autovec-opt.md: Update types
12007 * config/riscv/autovec.md: likewise
12009 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
12011 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
12013 (s390_vec_unsigned_flt): Ditto.
12014 (s390_vec_revb_flt): Ditto.
12015 (s390_vec_reve_flt): Ditto.
12016 (s390_vclfnhs): Fix operand flags.
12017 (s390_vclfnls): Ditto.
12018 (s390_vcrnfs): Ditto.
12019 (s390_vcfn): Ditto.
12020 (s390_vcnf): Ditto.
12022 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
12024 * config/s390/s390-builtins.def (O_U64): New.
12029 (O_M12): Change bit position.
12040 (OB_DEF_VAR): Add operand constraints.
12042 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
12045 2023-09-11 Andrew Pinski <apinski@marvell.com>
12047 PR tree-optimization/111349
12048 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
12049 the cmp part of the pattern.
12051 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12054 * config/riscv/riscv.opt: Set default as scalable vectorization.
12056 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12058 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
12059 (get_all_successors): Ditto.
12060 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
12061 (get_all_successors): Ditto.
12063 2023-09-11 Jakub Jelinek <jakub@redhat.com>
12065 PR middle-end/111329
12066 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
12067 function. For printing values which don't fit into digit_buffer
12068 use out-of-line function.
12069 * wide-int-print.h (pp_wide_int_large): Declare.
12070 * wide-int-print.cc: Include pretty-print.h.
12071 (pp_wide_int_large): Define.
12073 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12075 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
12076 Use dominance analysis.
12077 (pass_vsetvl::init): Ditto.
12078 (pass_vsetvl::done): Ditto.
12080 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12083 * config/riscv/autovec.md: Add VLS modes.
12084 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
12085 (cmp_lmul_gt_one): Ditto.
12086 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
12087 (cmp_lmul_gt_one): Ditto.
12088 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
12089 (riscv_vectorize_vec_perm_const): Ditto.
12090 * config/riscv/vector-iterators.md: Ditto.
12091 * config/riscv/vector.md: Ditto.
12093 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12095 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
12096 * config/riscv/vector-iterators.md: New iterator
12098 2023-09-11 Andrew Pinski <apinski@marvell.com>
12100 PR tree-optimization/111346
12101 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
12104 2023-09-11 liuhongt <hongtao.liu@intel.com>
12108 * config/i386/sse.md (int_comm): New int_attr.
12109 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
12110 Remove % for Complex conjugate operations since they're not
12112 (fma_<complexpairopname>_<mode>_pair): Ditto.
12113 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
12114 (cmul<conj_op><mode>3): Ditto.
12116 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12118 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
12119 fixed-vlmax/vls vector permutation.
12121 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12123 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
12125 2023-09-10 Andrew Pinski <apinski@marvell.com>
12127 PR tree-optimization/111331
12128 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
12129 Fix the LE/GE comparison to the correct value.
12130 * tree-ssa-phiopt.cc (minmax_replacement):
12131 Fix the LE/GE comparison for the
12132 `(a CMP CST1) ? max<a,CST2> : a` optimization.
12134 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
12136 * config/darwin.cc (darwin_function_section): Place unlikely
12137 executed global init code into the standard cold section.
12139 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12142 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
12143 (pass_vsetvl::pre_vsetvl): Ditto.
12144 (pass_vsetvl::init): Ditto.
12145 (pass_vsetvl::lazy_vsetvl): Ditto.
12147 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
12149 * config/loongarch/loongarch.md (mulsidi3_64bit):
12150 Field unsigned extension support.
12151 (<u>muldi3_highpart): Modify template name.
12152 (<u>mulsi3_highpart): Likewise.
12153 (<u>mulsidi3_64bit): Field unsigned extension support.
12154 (<su>muldi3_highpart): Modify muldi3_highpart to
12156 (<su>mulsi3_highpart): Modify mulsi3_highpart to
12159 2023-09-09 Xi Ruoyao <xry111@xry111.site>
12161 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
12162 Check precondition (delta must be a power of 2) and use
12163 popcount_hwi instead of a homebrew loop.
12165 2023-09-09 Xi Ruoyao <xry111@xry111.site>
12167 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
12168 Define to the maximum amount of bytes able to be loaded or
12169 stored with one machine instruction.
12170 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
12171 New static function.
12172 (loongarch_block_move_straight): Call
12173 loongarch_mode_for_move_size for machine_mode to be moved.
12174 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
12175 instead of UNITS_PER_WORD.
12177 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12179 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
12181 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
12183 * fold-const.cc (can_min_p): New function.
12184 (poly_int_binop): Try fold MIN_EXPR.
12186 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
12188 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
12189 case VREL_EQ nor call frelop_early_resolve.
12191 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
12193 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
12194 Remove broken INSN.
12195 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
12196 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
12198 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
12200 * config/riscv/thead.md: Use more appropriate mode attributes
12203 2023-09-08 Guo Jie <guojie@loongson.cn>
12205 * common/config/loongarch/loongarch-common.cc:
12206 (default_options loongarch_option_optimization_table):
12207 Default to -fsched-pressure.
12209 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
12211 * config.gcc: remove non-POSIX syntax "<<<".
12213 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
12215 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
12216 Rename postfix to _bitmanip.
12217 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
12218 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
12220 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12222 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
12224 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12226 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
12228 2023-09-07 liuhongt <hongtao.liu@intel.com>
12230 * config/i386/sse.md
12231 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
12232 (VHFBF_AVX512VL): New mode iterator.
12233 (VI2HFBF_AVX512VL): New mode iterator.
12235 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
12237 * value-range.h (contains_zero_p): Return false for undefined ranges.
12238 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
12239 contains_zero_p change above.
12240 (operator_ge::op1_op2_relation): Same.
12241 (operator_equal::op1_op2_relation): Same.
12242 (operator_not_equal::op1_op2_relation): Same.
12243 (operator_lt::op1_op2_relation): Same.
12244 (operator_le::op1_op2_relation): Same.
12245 (operator_ge::op1_op2_relation): Same.
12246 * range-op.cc (operator_equal::op1_op2_relation): Same.
12247 (operator_not_equal::op1_op2_relation): Same.
12248 (operator_lt::op1_op2_relation): Same.
12249 (operator_le::op1_op2_relation): Same.
12250 (operator_cast::op1_range): Same.
12251 (set_nonzero_range_from_mask): Same.
12252 (operator_bitwise_xor::op1_range): Same.
12253 (operator_addr_expr::fold_range): Same.
12254 (operator_addr_expr::op1_range): Same.
12256 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
12258 PR tree-optimization/110875
12259 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
12260 cache-prefilling routine when the ssa-name has no global value.
12262 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
12265 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
12266 (process_alt_operands): Set up the flag. Clear flag for chosen
12267 alternative with special memory constraints.
12268 (process_alt_operands): Set up used insn alternative depending on the flag.
12270 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12272 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
12273 * config/riscv/riscv.md: Ditto.
12274 * config/riscv/vector-iterators.md: Ditto.
12275 * config/riscv/vector.md: Ditto.
12277 2023-09-07 David Malcolm <dmalcolm@redhat.com>
12279 * diagnostic-core.h (error_meta): New decl.
12280 * diagnostic.cc (error_meta): New.
12282 2023-09-07 Jakub Jelinek <jakub@redhat.com>
12285 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
12286 inside gcc_assert, as later code relies on it filling info variable.
12287 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
12288 clear_padding_type): Likewise.
12289 * varasm.cc (output_constant): Likewise.
12290 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
12291 * stor-layout.cc (finish_bitfield_representative, layout_type):
12293 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
12295 2023-09-07 Xi Ruoyao <xry111@xry111.site>
12298 * config/loongarch/loongarch-protos.h
12299 (loongarch_pre_reload_split): Declare new function.
12300 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
12301 * config/loongarch/loongarch.cc
12302 (loongarch_pre_reload_split): Implement.
12303 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
12304 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
12306 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
12307 New define_insn_and_split.
12308 (bstrins_<mode>_for_ior_mask): Likewise.
12309 (define_peephole2): Further optimize code sequence produced by
12310 bstrins_<mode>_for_ior_mask if possible.
12312 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
12314 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
12315 rather than gen_rtx_PLUS.
12317 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12320 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
12321 (pass_vsetvl::df_post_optimization): Remove incorrect function.
12323 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
12325 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
12326 Parse 'XVentanaCondOps' extension.
12327 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
12328 (TARGET_XVENTANACONDOPS): Ditto.
12329 (TARGET_ZICOND_LIKE): New to represent targets with conditional
12330 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
12331 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
12332 with TARGET_ZICOND_LIKE.
12333 (riscv_expand_conditional_move): Ditto.
12334 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
12335 TARGET_ZICOND_LIKE.
12336 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
12337 * config/riscv/zicond.md: Modify description.
12338 (eqz_ventana): New to match corresponding czero instructions.
12339 (nez_ventana): Ditto.
12340 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
12341 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
12342 (*czero.<eqz>.<GPR><X>): Ditto.
12343 (*czero.eqz.<GPR><X>.opt1): Ditto.
12344 (*czero.nez.<GPR><X>.opt2): Ditto.
12346 2023-09-06 Ian Lance Taylor <iant@golang.org>
12349 * godump.cc (go_format_type): Handle BITINT_TYPE.
12351 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12354 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
12357 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12360 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
12361 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
12362 rather than make_edge, initialize bb->count.
12364 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12367 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
12368 Document general rules for _BitInt support library functions
12369 and document __mulbitint3 and __divmodbitint4.
12370 (Conversion functions): Document __fix{s,d,x,t}fbitint,
12371 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
12372 __bid_floatbitint{s,d,t}d.
12374 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12377 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
12380 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12383 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
12384 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
12385 check if all padding bits up to mode precision are zeros or sign
12386 bit copies and if not, jump to DO_ERROR.
12387 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
12388 Adjust expand_ubsan_result_store callers.
12389 * ubsan.cc: Include target.h and langhooks.h.
12390 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
12391 size converted to pointer sized integer, pass BITINT_TYPE values
12392 which fit into TImode (if supported) or DImode as those integer types
12393 or otherwise for now punt (pass 0).
12394 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
12395 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
12396 TImode/DImode precision rather than TK_Unknown used otherwise for
12397 large/huge BITINT_TYPEs.
12398 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
12399 they don't have mode precision.
12400 * ubsan.h (enum ubsan_print_style): New enumerator.
12402 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12405 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
12406 (ix86_bitint_type_info): New function.
12407 (TARGET_C_BITINT_TYPE_INFO): Redefine.
12409 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12412 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
12413 * passes.def: Add pass_lower_bitint after pass_lower_complex and
12414 pass_lower_bitint_O0 after pass_lower_complex_O0.
12415 * tree-pass.h (PROP_gimple_lbitint): Define.
12416 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
12417 * gimple-lower-bitint.h: New file.
12418 * tree-ssa-live.h (struct _var_map): Add bitint member.
12419 (init_var_map): Adjust declaration.
12420 (region_contains_p): Handle map->bitint like map->outofssa_p.
12421 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
12422 map->bitint and set map->outofssa_p to false if it is non-NULL.
12423 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
12424 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
12426 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
12427 not in that bitmap, and allow res without default def.
12428 (compute_optimized_partition_bases): In map->bitint mode try hard to
12429 coalesce any SSA_NAMEs with the same size.
12430 (coalesce_bitint): New function.
12431 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
12432 used_in_copies and call coalesce_bitint.
12433 * gimple-lower-bitint.cc: New file.
12435 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12438 * tree.def (BITINT_TYPE): New type.
12439 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
12440 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
12442 (BITINT_TYPE_P): Define.
12443 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
12444 they have BITINT_TYPE type.
12445 (tree_check6, tree_not_check6): New inline functions.
12446 (any_integral_type_check): Include BITINT_TYPE.
12447 (build_bitint_type): Declare.
12448 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
12449 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
12450 type_hash_canon): Handle BITINT_TYPE.
12451 (bitint_type_cache): New variable.
12452 (build_bitint_type): New function.
12453 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
12454 Handle BITINT_TYPE.
12455 (tree_cc_finalize): Free bitint_type_cache.
12456 * builtins.cc (type_to_class): Handle BITINT_TYPE.
12457 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
12458 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
12460 * convert.cc (convert_to_pointer_1, convert_to_real_1,
12461 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
12462 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
12463 GET_MODE_PRECISION (TYPE_MODE (type)).
12464 * doc/generic.texi (BITINT_TYPE): Document.
12465 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
12466 * doc/tm.texi: Regenerated.
12467 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
12468 gen_type_die_with_usage): Handle BITINT_TYPE.
12469 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
12470 handle those which fit into shwi.
12471 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
12472 to bitfield precision reads from BITINT_TYPE vars, parameters or
12473 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
12475 * fold-const.cc (fold_convert_loc, make_range_step): Handle
12477 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
12478 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
12479 (native_encode_int, native_interpret_int, native_interpret_expr):
12480 Handle BITINT_TYPE.
12481 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
12482 to some other integral type or vice versa conversions non-useless.
12483 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
12484 (clear_padding_unit): Mention in comment that _BitInt types don't need
12486 (clear_padding_bitint_needs_padding_p): New function.
12487 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
12488 (clear_padding_type): Likewise.
12489 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
12490 precision operands force pos_neg? to 1.
12491 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
12492 expand_BITINTTOFLOAT): New functions.
12493 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
12494 BITINTTOFLOAT): New internal functions.
12495 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
12496 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
12497 * match.pd (non-equality compare simplifications from fold_binary):
12498 Punt if TYPE_MODE (arg1_type) is BLKmode.
12499 * pretty-print.h (pp_wide_int): Handle printing of large precision
12500 wide_ints which would buffer overflow digit_buffer.
12501 * stor-layout.cc (finish_bitfield_representative): For bit-fields
12502 with BITINT_TYPE, prefer representatives with precisions in
12503 multiple of limb precision.
12504 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
12505 element type and assert it is BITINT_TYPE.
12506 * target.def (bitint_type_info): New C target hook.
12507 * target.h (struct bitint_info): New type.
12508 * targhooks.cc (default_bitint_type_info): New function.
12509 * targhooks.h (default_bitint_type_info): Declare.
12510 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
12511 Handle printing large wide_ints which would buffer overflow
12513 * tree-ssa-sccvn.cc: Include target.h.
12514 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
12516 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
12517 64-bit BITINT_TYPE subtract low bound from expression and cast to
12518 64-bit integer type both the controlling expression and case labels.
12519 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
12520 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
12521 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
12523 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
12524 unsigned_type_for rather than build_nonstandard_integer_type.
12526 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12529 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
12530 tieable for RVV modes.
12532 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12535 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
12537 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12539 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
12541 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12543 * config/xtensa/xtensa.cc (xtensa_expand_scc):
12544 Add code for particular constants (only 0 and INT_MIN for now)
12545 for EQ/NE boolean evaluation in SImode.
12546 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
12547 implementation has been integrated into the above.
12549 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12552 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
12554 (*pred_widen_mulsu<mode>): Delete.
12555 (*pred_single_widen_mul<mode>): Delete.
12556 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
12557 Add new combine patterns.
12558 (*single_widen_sub<any_extend:su><mode>): Ditto.
12559 (*single_widen_add<any_extend:su><mode>): Ditto.
12560 (*single_widen_mult<any_extend:su><mode>): Ditto.
12561 (*dual_widen_mulsu<mode>): Ditto.
12562 (*dual_widen_mulus<mode>): Ditto.
12563 (*dual_widen_<optab><mode>): Ditto.
12564 (*single_widen_add<mode>): Ditto.
12565 (*single_widen_sub<mode>): Ditto.
12566 (*single_widen_mult<mode>): Ditto.
12567 * config/riscv/autovec.md (<optab><mode>3):
12568 Change define_expand to define_insn_and_split.
12569 (<optab><mode>2): Ditto.
12570 (abs<mode>2): Ditto.
12571 (smul<mode>3_highpart): Ditto.
12572 (umul<mode>3_highpart): Ditto.
12574 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12576 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
12577 (riscv_asm_output_alias): Ditto.
12578 (riscv_asm_output_external): Ditto.
12579 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
12580 Output .variant_cc directive for vector function.
12581 (riscv_declare_function_name): Ditto.
12582 (riscv_asm_output_alias): Ditto.
12583 (riscv_asm_output_external): Ditto.
12584 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
12585 Implement ASM_DECLARE_FUNCTION_NAME.
12586 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
12587 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
12589 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12591 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
12592 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
12593 (riscv_frame_info::reset): Reset new fileds.
12594 (riscv_call_tls_get_addr): Pass riscv_cc.
12595 (riscv_function_arg): Return riscv_cc for call patterm.
12596 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
12597 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
12598 (riscv_save_reg_p): Add vector callee-saved check.
12599 (riscv_stack_align): Add vector save area comment.
12600 (riscv_compute_frame_info): Ditto.
12601 (riscv_restore_reg): Update for type change.
12602 (riscv_for_each_saved_v_reg): New function save vector registers.
12603 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
12604 (riscv_expand_prologue): Ditto.
12605 (riscv_expand_epilogue): Ditto.
12606 (riscv_output_mi_thunk): Pass riscv_cc.
12607 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
12608 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
12609 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
12611 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12613 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
12614 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
12615 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
12616 (riscv_init_cumulative_args): Setup variant_cc field.
12617 (riscv_vector_type_p): New function for checking vector type.
12618 (riscv_hard_regno_nregs): Hoist declare.
12619 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
12620 (riscv_get_arg_info): Support vector cc.
12621 (riscv_function_arg_advance): Update cum.
12622 (riscv_pass_by_reference): Handle vector args.
12623 (riscv_v_abi): New function return vector abi.
12624 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
12625 (riscv_arguments_is_vector_type_p): New function for check vector returns.
12626 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
12627 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
12628 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
12629 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
12630 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
12631 (V_ARG_FIRST): Ditto.
12632 (V_ARG_LAST): Ditto.
12633 (enum riscv_cc): Define all RISCV_CC variants.
12634 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
12636 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12638 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
12639 Add sqrt + vcond_mask combine pattern.
12640 * config/riscv/autovec.md (<optab><mode>2):
12641 Change define_expand to define_insn_and_split.
12643 2023-09-06 Jason Merrill <jason@redhat.com>
12645 * common.opt: Update -fabi-version=19.
12647 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
12649 * config/riscv/zicond.md: Add closing parent to a comment.
12651 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
12653 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
12654 large constant cons/alt into a register.
12656 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
12658 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
12659 require one zero bit in the upper 32 bits for LI+RORI synthesis.
12661 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
12663 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
12665 2023-09-05 Andrew Pinski <apinski@marvell.com>
12667 PR tree-optimization/98710
12668 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
12669 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
12671 2023-09-05 Andrew Pinski <apinski@marvell.com>
12673 PR tree-optimization/103536
12674 * match.pd (`(x | y) & (x & z)`,
12675 `(x & y) | (x | z)`): New patterns.
12677 2023-09-05 Andrew Pinski <apinski@marvell.com>
12679 PR tree-optimization/107137
12680 * match.pd (`(nop_convert)-(convert)a`): New pattern.
12682 2023-09-05 Andrew Pinski <apinski@marvell.com>
12684 PR tree-optimization/96694
12685 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
12687 2023-09-05 Andrew Pinski <apinski@marvell.com>
12689 PR tree-optimization/105832
12690 * match.pd (`(1 >> X) != 0`): New pattern
12692 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
12694 * config/riscv/riscv.md: Update/Add types
12696 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
12698 * config/riscv/pic.md: Update types
12700 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
12702 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
12703 synthesis with rotate-right for XTheadBb.
12705 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
12707 * config/riscv/zicond.md: Fix op2 pattern.
12709 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
12711 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
12713 2023-09-05 Xi Ruoyao <xry111@xry111.site>
12715 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
12716 Define to 0 if not defined yet.
12718 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
12720 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
12721 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
12723 2023-09-05 Pan Li <pan2.li@intel.com>
12725 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
12726 * config/riscv/vector.md: Extend iterator for VLS.
12728 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
12730 * config.gcc: Export the header file lasxintrin.h.
12731 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
12732 Add Loongson ASX builtin functions support.
12733 (AVAIL_ALL): Ditto.
12734 (LASX_BUILTIN): Ditto.
12735 (LASX_NO_TARGET_BUILTIN): Ditto.
12736 (LASX_BUILTIN_TEST_BRANCH): Ditto.
12737 (CODE_FOR_lasx_xvsadd_b): Ditto.
12738 (CODE_FOR_lasx_xvsadd_h): Ditto.
12739 (CODE_FOR_lasx_xvsadd_w): Ditto.
12740 (CODE_FOR_lasx_xvsadd_d): Ditto.
12741 (CODE_FOR_lasx_xvsadd_bu): Ditto.
12742 (CODE_FOR_lasx_xvsadd_hu): Ditto.
12743 (CODE_FOR_lasx_xvsadd_wu): Ditto.
12744 (CODE_FOR_lasx_xvsadd_du): Ditto.
12745 (CODE_FOR_lasx_xvadd_b): Ditto.
12746 (CODE_FOR_lasx_xvadd_h): Ditto.
12747 (CODE_FOR_lasx_xvadd_w): Ditto.
12748 (CODE_FOR_lasx_xvadd_d): Ditto.
12749 (CODE_FOR_lasx_xvaddi_bu): Ditto.
12750 (CODE_FOR_lasx_xvaddi_hu): Ditto.
12751 (CODE_FOR_lasx_xvaddi_wu): Ditto.
12752 (CODE_FOR_lasx_xvaddi_du): Ditto.
12753 (CODE_FOR_lasx_xvand_v): Ditto.
12754 (CODE_FOR_lasx_xvandi_b): Ditto.
12755 (CODE_FOR_lasx_xvbitsel_v): Ditto.
12756 (CODE_FOR_lasx_xvseqi_b): Ditto.
12757 (CODE_FOR_lasx_xvseqi_h): Ditto.
12758 (CODE_FOR_lasx_xvseqi_w): Ditto.
12759 (CODE_FOR_lasx_xvseqi_d): Ditto.
12760 (CODE_FOR_lasx_xvslti_b): Ditto.
12761 (CODE_FOR_lasx_xvslti_h): Ditto.
12762 (CODE_FOR_lasx_xvslti_w): Ditto.
12763 (CODE_FOR_lasx_xvslti_d): Ditto.
12764 (CODE_FOR_lasx_xvslti_bu): Ditto.
12765 (CODE_FOR_lasx_xvslti_hu): Ditto.
12766 (CODE_FOR_lasx_xvslti_wu): Ditto.
12767 (CODE_FOR_lasx_xvslti_du): Ditto.
12768 (CODE_FOR_lasx_xvslei_b): Ditto.
12769 (CODE_FOR_lasx_xvslei_h): Ditto.
12770 (CODE_FOR_lasx_xvslei_w): Ditto.
12771 (CODE_FOR_lasx_xvslei_d): Ditto.
12772 (CODE_FOR_lasx_xvslei_bu): Ditto.
12773 (CODE_FOR_lasx_xvslei_hu): Ditto.
12774 (CODE_FOR_lasx_xvslei_wu): Ditto.
12775 (CODE_FOR_lasx_xvslei_du): Ditto.
12776 (CODE_FOR_lasx_xvdiv_b): Ditto.
12777 (CODE_FOR_lasx_xvdiv_h): Ditto.
12778 (CODE_FOR_lasx_xvdiv_w): Ditto.
12779 (CODE_FOR_lasx_xvdiv_d): Ditto.
12780 (CODE_FOR_lasx_xvdiv_bu): Ditto.
12781 (CODE_FOR_lasx_xvdiv_hu): Ditto.
12782 (CODE_FOR_lasx_xvdiv_wu): Ditto.
12783 (CODE_FOR_lasx_xvdiv_du): Ditto.
12784 (CODE_FOR_lasx_xvfadd_s): Ditto.
12785 (CODE_FOR_lasx_xvfadd_d): Ditto.
12786 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
12787 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
12788 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
12789 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
12790 (CODE_FOR_lasx_xvffint_s_w): Ditto.
12791 (CODE_FOR_lasx_xvffint_d_l): Ditto.
12792 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
12793 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
12794 (CODE_FOR_lasx_xvfsub_s): Ditto.
12795 (CODE_FOR_lasx_xvfsub_d): Ditto.
12796 (CODE_FOR_lasx_xvfmul_s): Ditto.
12797 (CODE_FOR_lasx_xvfmul_d): Ditto.
12798 (CODE_FOR_lasx_xvfdiv_s): Ditto.
12799 (CODE_FOR_lasx_xvfdiv_d): Ditto.
12800 (CODE_FOR_lasx_xvfmax_s): Ditto.
12801 (CODE_FOR_lasx_xvfmax_d): Ditto.
12802 (CODE_FOR_lasx_xvfmin_s): Ditto.
12803 (CODE_FOR_lasx_xvfmin_d): Ditto.
12804 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
12805 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
12806 (CODE_FOR_lasx_xvflogb_s): Ditto.
12807 (CODE_FOR_lasx_xvflogb_d): Ditto.
12808 (CODE_FOR_lasx_xvmax_b): Ditto.
12809 (CODE_FOR_lasx_xvmax_h): Ditto.
12810 (CODE_FOR_lasx_xvmax_w): Ditto.
12811 (CODE_FOR_lasx_xvmax_d): Ditto.
12812 (CODE_FOR_lasx_xvmaxi_b): Ditto.
12813 (CODE_FOR_lasx_xvmaxi_h): Ditto.
12814 (CODE_FOR_lasx_xvmaxi_w): Ditto.
12815 (CODE_FOR_lasx_xvmaxi_d): Ditto.
12816 (CODE_FOR_lasx_xvmax_bu): Ditto.
12817 (CODE_FOR_lasx_xvmax_hu): Ditto.
12818 (CODE_FOR_lasx_xvmax_wu): Ditto.
12819 (CODE_FOR_lasx_xvmax_du): Ditto.
12820 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
12821 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
12822 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
12823 (CODE_FOR_lasx_xvmaxi_du): Ditto.
12824 (CODE_FOR_lasx_xvmin_b): Ditto.
12825 (CODE_FOR_lasx_xvmin_h): Ditto.
12826 (CODE_FOR_lasx_xvmin_w): Ditto.
12827 (CODE_FOR_lasx_xvmin_d): Ditto.
12828 (CODE_FOR_lasx_xvmini_b): Ditto.
12829 (CODE_FOR_lasx_xvmini_h): Ditto.
12830 (CODE_FOR_lasx_xvmini_w): Ditto.
12831 (CODE_FOR_lasx_xvmini_d): Ditto.
12832 (CODE_FOR_lasx_xvmin_bu): Ditto.
12833 (CODE_FOR_lasx_xvmin_hu): Ditto.
12834 (CODE_FOR_lasx_xvmin_wu): Ditto.
12835 (CODE_FOR_lasx_xvmin_du): Ditto.
12836 (CODE_FOR_lasx_xvmini_bu): Ditto.
12837 (CODE_FOR_lasx_xvmini_hu): Ditto.
12838 (CODE_FOR_lasx_xvmini_wu): Ditto.
12839 (CODE_FOR_lasx_xvmini_du): Ditto.
12840 (CODE_FOR_lasx_xvmod_b): Ditto.
12841 (CODE_FOR_lasx_xvmod_h): Ditto.
12842 (CODE_FOR_lasx_xvmod_w): Ditto.
12843 (CODE_FOR_lasx_xvmod_d): Ditto.
12844 (CODE_FOR_lasx_xvmod_bu): Ditto.
12845 (CODE_FOR_lasx_xvmod_hu): Ditto.
12846 (CODE_FOR_lasx_xvmod_wu): Ditto.
12847 (CODE_FOR_lasx_xvmod_du): Ditto.
12848 (CODE_FOR_lasx_xvmul_b): Ditto.
12849 (CODE_FOR_lasx_xvmul_h): Ditto.
12850 (CODE_FOR_lasx_xvmul_w): Ditto.
12851 (CODE_FOR_lasx_xvmul_d): Ditto.
12852 (CODE_FOR_lasx_xvclz_b): Ditto.
12853 (CODE_FOR_lasx_xvclz_h): Ditto.
12854 (CODE_FOR_lasx_xvclz_w): Ditto.
12855 (CODE_FOR_lasx_xvclz_d): Ditto.
12856 (CODE_FOR_lasx_xvnor_v): Ditto.
12857 (CODE_FOR_lasx_xvor_v): Ditto.
12858 (CODE_FOR_lasx_xvori_b): Ditto.
12859 (CODE_FOR_lasx_xvnori_b): Ditto.
12860 (CODE_FOR_lasx_xvpcnt_b): Ditto.
12861 (CODE_FOR_lasx_xvpcnt_h): Ditto.
12862 (CODE_FOR_lasx_xvpcnt_w): Ditto.
12863 (CODE_FOR_lasx_xvpcnt_d): Ditto.
12864 (CODE_FOR_lasx_xvxor_v): Ditto.
12865 (CODE_FOR_lasx_xvxori_b): Ditto.
12866 (CODE_FOR_lasx_xvsll_b): Ditto.
12867 (CODE_FOR_lasx_xvsll_h): Ditto.
12868 (CODE_FOR_lasx_xvsll_w): Ditto.
12869 (CODE_FOR_lasx_xvsll_d): Ditto.
12870 (CODE_FOR_lasx_xvslli_b): Ditto.
12871 (CODE_FOR_lasx_xvslli_h): Ditto.
12872 (CODE_FOR_lasx_xvslli_w): Ditto.
12873 (CODE_FOR_lasx_xvslli_d): Ditto.
12874 (CODE_FOR_lasx_xvsra_b): Ditto.
12875 (CODE_FOR_lasx_xvsra_h): Ditto.
12876 (CODE_FOR_lasx_xvsra_w): Ditto.
12877 (CODE_FOR_lasx_xvsra_d): Ditto.
12878 (CODE_FOR_lasx_xvsrai_b): Ditto.
12879 (CODE_FOR_lasx_xvsrai_h): Ditto.
12880 (CODE_FOR_lasx_xvsrai_w): Ditto.
12881 (CODE_FOR_lasx_xvsrai_d): Ditto.
12882 (CODE_FOR_lasx_xvsrl_b): Ditto.
12883 (CODE_FOR_lasx_xvsrl_h): Ditto.
12884 (CODE_FOR_lasx_xvsrl_w): Ditto.
12885 (CODE_FOR_lasx_xvsrl_d): Ditto.
12886 (CODE_FOR_lasx_xvsrli_b): Ditto.
12887 (CODE_FOR_lasx_xvsrli_h): Ditto.
12888 (CODE_FOR_lasx_xvsrli_w): Ditto.
12889 (CODE_FOR_lasx_xvsrli_d): Ditto.
12890 (CODE_FOR_lasx_xvsub_b): Ditto.
12891 (CODE_FOR_lasx_xvsub_h): Ditto.
12892 (CODE_FOR_lasx_xvsub_w): Ditto.
12893 (CODE_FOR_lasx_xvsub_d): Ditto.
12894 (CODE_FOR_lasx_xvsubi_bu): Ditto.
12895 (CODE_FOR_lasx_xvsubi_hu): Ditto.
12896 (CODE_FOR_lasx_xvsubi_wu): Ditto.
12897 (CODE_FOR_lasx_xvsubi_du): Ditto.
12898 (CODE_FOR_lasx_xvpackod_d): Ditto.
12899 (CODE_FOR_lasx_xvpackev_d): Ditto.
12900 (CODE_FOR_lasx_xvpickod_d): Ditto.
12901 (CODE_FOR_lasx_xvpickev_d): Ditto.
12902 (CODE_FOR_lasx_xvrepli_b): Ditto.
12903 (CODE_FOR_lasx_xvrepli_h): Ditto.
12904 (CODE_FOR_lasx_xvrepli_w): Ditto.
12905 (CODE_FOR_lasx_xvrepli_d): Ditto.
12906 (CODE_FOR_lasx_xvandn_v): Ditto.
12907 (CODE_FOR_lasx_xvorn_v): Ditto.
12908 (CODE_FOR_lasx_xvneg_b): Ditto.
12909 (CODE_FOR_lasx_xvneg_h): Ditto.
12910 (CODE_FOR_lasx_xvneg_w): Ditto.
12911 (CODE_FOR_lasx_xvneg_d): Ditto.
12912 (CODE_FOR_lasx_xvbsrl_v): Ditto.
12913 (CODE_FOR_lasx_xvbsll_v): Ditto.
12914 (CODE_FOR_lasx_xvfmadd_s): Ditto.
12915 (CODE_FOR_lasx_xvfmadd_d): Ditto.
12916 (CODE_FOR_lasx_xvfmsub_s): Ditto.
12917 (CODE_FOR_lasx_xvfmsub_d): Ditto.
12918 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
12919 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
12920 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
12921 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
12922 (CODE_FOR_lasx_xvpermi_q): Ditto.
12923 (CODE_FOR_lasx_xvpermi_d): Ditto.
12924 (CODE_FOR_lasx_xbnz_v): Ditto.
12925 (CODE_FOR_lasx_xbz_v): Ditto.
12926 (CODE_FOR_lasx_xvssub_b): Ditto.
12927 (CODE_FOR_lasx_xvssub_h): Ditto.
12928 (CODE_FOR_lasx_xvssub_w): Ditto.
12929 (CODE_FOR_lasx_xvssub_d): Ditto.
12930 (CODE_FOR_lasx_xvssub_bu): Ditto.
12931 (CODE_FOR_lasx_xvssub_hu): Ditto.
12932 (CODE_FOR_lasx_xvssub_wu): Ditto.
12933 (CODE_FOR_lasx_xvssub_du): Ditto.
12934 (CODE_FOR_lasx_xvabsd_b): Ditto.
12935 (CODE_FOR_lasx_xvabsd_h): Ditto.
12936 (CODE_FOR_lasx_xvabsd_w): Ditto.
12937 (CODE_FOR_lasx_xvabsd_d): Ditto.
12938 (CODE_FOR_lasx_xvabsd_bu): Ditto.
12939 (CODE_FOR_lasx_xvabsd_hu): Ditto.
12940 (CODE_FOR_lasx_xvabsd_wu): Ditto.
12941 (CODE_FOR_lasx_xvabsd_du): Ditto.
12942 (CODE_FOR_lasx_xvavg_b): Ditto.
12943 (CODE_FOR_lasx_xvavg_h): Ditto.
12944 (CODE_FOR_lasx_xvavg_w): Ditto.
12945 (CODE_FOR_lasx_xvavg_d): Ditto.
12946 (CODE_FOR_lasx_xvavg_bu): Ditto.
12947 (CODE_FOR_lasx_xvavg_hu): Ditto.
12948 (CODE_FOR_lasx_xvavg_wu): Ditto.
12949 (CODE_FOR_lasx_xvavg_du): Ditto.
12950 (CODE_FOR_lasx_xvavgr_b): Ditto.
12951 (CODE_FOR_lasx_xvavgr_h): Ditto.
12952 (CODE_FOR_lasx_xvavgr_w): Ditto.
12953 (CODE_FOR_lasx_xvavgr_d): Ditto.
12954 (CODE_FOR_lasx_xvavgr_bu): Ditto.
12955 (CODE_FOR_lasx_xvavgr_hu): Ditto.
12956 (CODE_FOR_lasx_xvavgr_wu): Ditto.
12957 (CODE_FOR_lasx_xvavgr_du): Ditto.
12958 (CODE_FOR_lasx_xvmuh_b): Ditto.
12959 (CODE_FOR_lasx_xvmuh_h): Ditto.
12960 (CODE_FOR_lasx_xvmuh_w): Ditto.
12961 (CODE_FOR_lasx_xvmuh_d): Ditto.
12962 (CODE_FOR_lasx_xvmuh_bu): Ditto.
12963 (CODE_FOR_lasx_xvmuh_hu): Ditto.
12964 (CODE_FOR_lasx_xvmuh_wu): Ditto.
12965 (CODE_FOR_lasx_xvmuh_du): Ditto.
12966 (CODE_FOR_lasx_xvssran_b_h): Ditto.
12967 (CODE_FOR_lasx_xvssran_h_w): Ditto.
12968 (CODE_FOR_lasx_xvssran_w_d): Ditto.
12969 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
12970 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
12971 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
12972 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
12973 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
12974 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
12975 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
12976 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
12977 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
12978 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
12979 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
12980 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
12981 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
12982 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
12983 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
12984 (CODE_FOR_lasx_xvftint_w_s): Ditto.
12985 (CODE_FOR_lasx_xvftint_l_d): Ditto.
12986 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
12987 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
12988 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
12989 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
12990 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
12991 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
12992 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
12993 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
12994 (CODE_FOR_lasx_xvsat_b): Ditto.
12995 (CODE_FOR_lasx_xvsat_h): Ditto.
12996 (CODE_FOR_lasx_xvsat_w): Ditto.
12997 (CODE_FOR_lasx_xvsat_d): Ditto.
12998 (CODE_FOR_lasx_xvsat_bu): Ditto.
12999 (CODE_FOR_lasx_xvsat_hu): Ditto.
13000 (CODE_FOR_lasx_xvsat_wu): Ditto.
13001 (CODE_FOR_lasx_xvsat_du): Ditto.
13002 (loongarch_builtin_vectorized_function): Ditto.
13003 (loongarch_expand_builtin_insn): Ditto.
13004 (loongarch_expand_builtin): Ditto.
13005 * config/loongarch/loongarch-ftypes.def (1): Ditto.
13009 * config/loongarch/lasxintrin.h: New file.
13011 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
13013 * config/loongarch/loongarch-modes.def
13014 (VECTOR_MODES): Add Loongson ASX instruction support.
13015 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
13016 (loongarch_split_256bit_move_p): Ditto.
13017 (loongarch_expand_vector_group_init): Ditto.
13018 (loongarch_expand_vec_perm_1): Ditto.
13019 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
13020 (loongarch_valid_offset_p): Ditto.
13021 (loongarch_address_insns): Ditto.
13022 (loongarch_const_insns): Ditto.
13023 (loongarch_legitimize_move): Ditto.
13024 (loongarch_builtin_vectorization_cost): Ditto.
13025 (loongarch_split_move_p): Ditto.
13026 (loongarch_split_move): Ditto.
13027 (loongarch_output_move_index_float): Ditto.
13028 (loongarch_split_256bit_move_p): Ditto.
13029 (loongarch_split_256bit_move): Ditto.
13030 (loongarch_output_move): Ditto.
13031 (loongarch_print_operand_reloc): Ditto.
13032 (loongarch_print_operand): Ditto.
13033 (loongarch_hard_regno_mode_ok_uncached): Ditto.
13034 (loongarch_hard_regno_nregs): Ditto.
13035 (loongarch_class_max_nregs): Ditto.
13036 (loongarch_can_change_mode_class): Ditto.
13037 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
13038 (loongarch_vector_mode_supported_p): Ditto.
13039 (loongarch_preferred_simd_mode): Ditto.
13040 (loongarch_autovectorize_vector_modes): Ditto.
13041 (loongarch_lsx_output_division): Ditto.
13042 (loongarch_expand_lsx_shuffle): Ditto.
13043 (loongarch_expand_vec_perm): Ditto.
13044 (loongarch_expand_vec_perm_interleave): Ditto.
13045 (loongarch_try_expand_lsx_vshuf_const): Ditto.
13046 (loongarch_expand_vec_perm_even_odd_1): Ditto.
13047 (loongarch_expand_vec_perm_even_odd): Ditto.
13048 (loongarch_expand_vec_perm_1): Ditto.
13049 (loongarch_expand_vec_perm_const_2): Ditto.
13050 (loongarch_is_quad_duplicate): Ditto.
13051 (loongarch_is_double_duplicate): Ditto.
13052 (loongarch_is_odd_extraction): Ditto.
13053 (loongarch_is_even_extraction): Ditto.
13054 (loongarch_is_extraction_permutation): Ditto.
13055 (loongarch_is_center_extraction): Ditto.
13056 (loongarch_is_reversing_permutation): Ditto.
13057 (loongarch_is_di_misalign_extract): Ditto.
13058 (loongarch_is_si_misalign_extract): Ditto.
13059 (loongarch_is_lasx_lowpart_interleave): Ditto.
13060 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
13061 (COMPARE_SELECTOR): Ditto.
13062 (loongarch_is_lasx_lowpart_extract): Ditto.
13063 (loongarch_is_lasx_highpart_interleave): Ditto.
13064 (loongarch_is_lasx_highpart_interleave_2): Ditto.
13065 (loongarch_is_elem_duplicate): Ditto.
13066 (loongarch_is_op_reverse_perm): Ditto.
13067 (loongarch_is_single_op_perm): Ditto.
13068 (loongarch_is_divisible_perm): Ditto.
13069 (loongarch_is_triple_stride_extract): Ditto.
13070 (loongarch_vectorize_vec_perm_const): Ditto.
13071 (loongarch_cpu_sched_reassociation_width): Ditto.
13072 (loongarch_expand_vector_extract): Ditto.
13073 (emit_reduc_half): Ditto.
13074 (loongarch_expand_vec_unpack): Ditto.
13075 (loongarch_expand_vector_group_init): Ditto.
13076 (loongarch_expand_vector_init): Ditto.
13077 (loongarch_expand_lsx_cmp): Ditto.
13078 (loongarch_builtin_support_vector_misalignment): Ditto.
13079 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
13080 (BITS_PER_LASX_REG): Ditto.
13081 (STRUCTURE_SIZE_BOUNDARY): Ditto.
13082 (LASX_REG_FIRST): Ditto.
13083 (LASX_REG_LAST): Ditto.
13084 (LASX_REG_NUM): Ditto.
13085 (LASX_REG_P): Ditto.
13086 (LASX_REG_RTX_P): Ditto.
13087 (LASX_SUPPORTED_MODE_P): Ditto.
13088 * config/loongarch/loongarch.md: Ditto.
13089 * config/loongarch/lasx.md: New file.
13091 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
13093 * config.gcc: Export the header file lsxintrin.h.
13094 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
13095 (enum loongarch_builtin_type): Ditto.
13096 (AVAIL_ALL): Ditto.
13097 (LARCH_BUILTIN): Ditto.
13098 (LSX_BUILTIN): Ditto.
13099 (LSX_BUILTIN_TEST_BRANCH): Ditto.
13100 (LSX_NO_TARGET_BUILTIN): Ditto.
13101 (CODE_FOR_lsx_vsadd_b): Ditto.
13102 (CODE_FOR_lsx_vsadd_h): Ditto.
13103 (CODE_FOR_lsx_vsadd_w): Ditto.
13104 (CODE_FOR_lsx_vsadd_d): Ditto.
13105 (CODE_FOR_lsx_vsadd_bu): Ditto.
13106 (CODE_FOR_lsx_vsadd_hu): Ditto.
13107 (CODE_FOR_lsx_vsadd_wu): Ditto.
13108 (CODE_FOR_lsx_vsadd_du): Ditto.
13109 (CODE_FOR_lsx_vadd_b): Ditto.
13110 (CODE_FOR_lsx_vadd_h): Ditto.
13111 (CODE_FOR_lsx_vadd_w): Ditto.
13112 (CODE_FOR_lsx_vadd_d): Ditto.
13113 (CODE_FOR_lsx_vaddi_bu): Ditto.
13114 (CODE_FOR_lsx_vaddi_hu): Ditto.
13115 (CODE_FOR_lsx_vaddi_wu): Ditto.
13116 (CODE_FOR_lsx_vaddi_du): Ditto.
13117 (CODE_FOR_lsx_vand_v): Ditto.
13118 (CODE_FOR_lsx_vandi_b): Ditto.
13119 (CODE_FOR_lsx_bnz_v): Ditto.
13120 (CODE_FOR_lsx_bz_v): Ditto.
13121 (CODE_FOR_lsx_vbitsel_v): Ditto.
13122 (CODE_FOR_lsx_vseqi_b): Ditto.
13123 (CODE_FOR_lsx_vseqi_h): Ditto.
13124 (CODE_FOR_lsx_vseqi_w): Ditto.
13125 (CODE_FOR_lsx_vseqi_d): Ditto.
13126 (CODE_FOR_lsx_vslti_b): Ditto.
13127 (CODE_FOR_lsx_vslti_h): Ditto.
13128 (CODE_FOR_lsx_vslti_w): Ditto.
13129 (CODE_FOR_lsx_vslti_d): Ditto.
13130 (CODE_FOR_lsx_vslti_bu): Ditto.
13131 (CODE_FOR_lsx_vslti_hu): Ditto.
13132 (CODE_FOR_lsx_vslti_wu): Ditto.
13133 (CODE_FOR_lsx_vslti_du): Ditto.
13134 (CODE_FOR_lsx_vslei_b): Ditto.
13135 (CODE_FOR_lsx_vslei_h): Ditto.
13136 (CODE_FOR_lsx_vslei_w): Ditto.
13137 (CODE_FOR_lsx_vslei_d): Ditto.
13138 (CODE_FOR_lsx_vslei_bu): Ditto.
13139 (CODE_FOR_lsx_vslei_hu): Ditto.
13140 (CODE_FOR_lsx_vslei_wu): Ditto.
13141 (CODE_FOR_lsx_vslei_du): Ditto.
13142 (CODE_FOR_lsx_vdiv_b): Ditto.
13143 (CODE_FOR_lsx_vdiv_h): Ditto.
13144 (CODE_FOR_lsx_vdiv_w): Ditto.
13145 (CODE_FOR_lsx_vdiv_d): Ditto.
13146 (CODE_FOR_lsx_vdiv_bu): Ditto.
13147 (CODE_FOR_lsx_vdiv_hu): Ditto.
13148 (CODE_FOR_lsx_vdiv_wu): Ditto.
13149 (CODE_FOR_lsx_vdiv_du): Ditto.
13150 (CODE_FOR_lsx_vfadd_s): Ditto.
13151 (CODE_FOR_lsx_vfadd_d): Ditto.
13152 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
13153 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
13154 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
13155 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
13156 (CODE_FOR_lsx_vffint_s_w): Ditto.
13157 (CODE_FOR_lsx_vffint_d_l): Ditto.
13158 (CODE_FOR_lsx_vffint_s_wu): Ditto.
13159 (CODE_FOR_lsx_vffint_d_lu): Ditto.
13160 (CODE_FOR_lsx_vfsub_s): Ditto.
13161 (CODE_FOR_lsx_vfsub_d): Ditto.
13162 (CODE_FOR_lsx_vfmul_s): Ditto.
13163 (CODE_FOR_lsx_vfmul_d): Ditto.
13164 (CODE_FOR_lsx_vfdiv_s): Ditto.
13165 (CODE_FOR_lsx_vfdiv_d): Ditto.
13166 (CODE_FOR_lsx_vfmax_s): Ditto.
13167 (CODE_FOR_lsx_vfmax_d): Ditto.
13168 (CODE_FOR_lsx_vfmin_s): Ditto.
13169 (CODE_FOR_lsx_vfmin_d): Ditto.
13170 (CODE_FOR_lsx_vfsqrt_s): Ditto.
13171 (CODE_FOR_lsx_vfsqrt_d): Ditto.
13172 (CODE_FOR_lsx_vflogb_s): Ditto.
13173 (CODE_FOR_lsx_vflogb_d): Ditto.
13174 (CODE_FOR_lsx_vmax_b): Ditto.
13175 (CODE_FOR_lsx_vmax_h): Ditto.
13176 (CODE_FOR_lsx_vmax_w): Ditto.
13177 (CODE_FOR_lsx_vmax_d): Ditto.
13178 (CODE_FOR_lsx_vmaxi_b): Ditto.
13179 (CODE_FOR_lsx_vmaxi_h): Ditto.
13180 (CODE_FOR_lsx_vmaxi_w): Ditto.
13181 (CODE_FOR_lsx_vmaxi_d): Ditto.
13182 (CODE_FOR_lsx_vmax_bu): Ditto.
13183 (CODE_FOR_lsx_vmax_hu): Ditto.
13184 (CODE_FOR_lsx_vmax_wu): Ditto.
13185 (CODE_FOR_lsx_vmax_du): Ditto.
13186 (CODE_FOR_lsx_vmaxi_bu): Ditto.
13187 (CODE_FOR_lsx_vmaxi_hu): Ditto.
13188 (CODE_FOR_lsx_vmaxi_wu): Ditto.
13189 (CODE_FOR_lsx_vmaxi_du): Ditto.
13190 (CODE_FOR_lsx_vmin_b): Ditto.
13191 (CODE_FOR_lsx_vmin_h): Ditto.
13192 (CODE_FOR_lsx_vmin_w): Ditto.
13193 (CODE_FOR_lsx_vmin_d): Ditto.
13194 (CODE_FOR_lsx_vmini_b): Ditto.
13195 (CODE_FOR_lsx_vmini_h): Ditto.
13196 (CODE_FOR_lsx_vmini_w): Ditto.
13197 (CODE_FOR_lsx_vmini_d): Ditto.
13198 (CODE_FOR_lsx_vmin_bu): Ditto.
13199 (CODE_FOR_lsx_vmin_hu): Ditto.
13200 (CODE_FOR_lsx_vmin_wu): Ditto.
13201 (CODE_FOR_lsx_vmin_du): Ditto.
13202 (CODE_FOR_lsx_vmini_bu): Ditto.
13203 (CODE_FOR_lsx_vmini_hu): Ditto.
13204 (CODE_FOR_lsx_vmini_wu): Ditto.
13205 (CODE_FOR_lsx_vmini_du): Ditto.
13206 (CODE_FOR_lsx_vmod_b): Ditto.
13207 (CODE_FOR_lsx_vmod_h): Ditto.
13208 (CODE_FOR_lsx_vmod_w): Ditto.
13209 (CODE_FOR_lsx_vmod_d): Ditto.
13210 (CODE_FOR_lsx_vmod_bu): Ditto.
13211 (CODE_FOR_lsx_vmod_hu): Ditto.
13212 (CODE_FOR_lsx_vmod_wu): Ditto.
13213 (CODE_FOR_lsx_vmod_du): Ditto.
13214 (CODE_FOR_lsx_vmul_b): Ditto.
13215 (CODE_FOR_lsx_vmul_h): Ditto.
13216 (CODE_FOR_lsx_vmul_w): Ditto.
13217 (CODE_FOR_lsx_vmul_d): Ditto.
13218 (CODE_FOR_lsx_vclz_b): Ditto.
13219 (CODE_FOR_lsx_vclz_h): Ditto.
13220 (CODE_FOR_lsx_vclz_w): Ditto.
13221 (CODE_FOR_lsx_vclz_d): Ditto.
13222 (CODE_FOR_lsx_vnor_v): Ditto.
13223 (CODE_FOR_lsx_vor_v): Ditto.
13224 (CODE_FOR_lsx_vori_b): Ditto.
13225 (CODE_FOR_lsx_vnori_b): Ditto.
13226 (CODE_FOR_lsx_vpcnt_b): Ditto.
13227 (CODE_FOR_lsx_vpcnt_h): Ditto.
13228 (CODE_FOR_lsx_vpcnt_w): Ditto.
13229 (CODE_FOR_lsx_vpcnt_d): Ditto.
13230 (CODE_FOR_lsx_vxor_v): Ditto.
13231 (CODE_FOR_lsx_vxori_b): Ditto.
13232 (CODE_FOR_lsx_vsll_b): Ditto.
13233 (CODE_FOR_lsx_vsll_h): Ditto.
13234 (CODE_FOR_lsx_vsll_w): Ditto.
13235 (CODE_FOR_lsx_vsll_d): Ditto.
13236 (CODE_FOR_lsx_vslli_b): Ditto.
13237 (CODE_FOR_lsx_vslli_h): Ditto.
13238 (CODE_FOR_lsx_vslli_w): Ditto.
13239 (CODE_FOR_lsx_vslli_d): Ditto.
13240 (CODE_FOR_lsx_vsra_b): Ditto.
13241 (CODE_FOR_lsx_vsra_h): Ditto.
13242 (CODE_FOR_lsx_vsra_w): Ditto.
13243 (CODE_FOR_lsx_vsra_d): Ditto.
13244 (CODE_FOR_lsx_vsrai_b): Ditto.
13245 (CODE_FOR_lsx_vsrai_h): Ditto.
13246 (CODE_FOR_lsx_vsrai_w): Ditto.
13247 (CODE_FOR_lsx_vsrai_d): Ditto.
13248 (CODE_FOR_lsx_vsrl_b): Ditto.
13249 (CODE_FOR_lsx_vsrl_h): Ditto.
13250 (CODE_FOR_lsx_vsrl_w): Ditto.
13251 (CODE_FOR_lsx_vsrl_d): Ditto.
13252 (CODE_FOR_lsx_vsrli_b): Ditto.
13253 (CODE_FOR_lsx_vsrli_h): Ditto.
13254 (CODE_FOR_lsx_vsrli_w): Ditto.
13255 (CODE_FOR_lsx_vsrli_d): Ditto.
13256 (CODE_FOR_lsx_vsub_b): Ditto.
13257 (CODE_FOR_lsx_vsub_h): Ditto.
13258 (CODE_FOR_lsx_vsub_w): Ditto.
13259 (CODE_FOR_lsx_vsub_d): Ditto.
13260 (CODE_FOR_lsx_vsubi_bu): Ditto.
13261 (CODE_FOR_lsx_vsubi_hu): Ditto.
13262 (CODE_FOR_lsx_vsubi_wu): Ditto.
13263 (CODE_FOR_lsx_vsubi_du): Ditto.
13264 (CODE_FOR_lsx_vpackod_d): Ditto.
13265 (CODE_FOR_lsx_vpackev_d): Ditto.
13266 (CODE_FOR_lsx_vpickod_d): Ditto.
13267 (CODE_FOR_lsx_vpickev_d): Ditto.
13268 (CODE_FOR_lsx_vrepli_b): Ditto.
13269 (CODE_FOR_lsx_vrepli_h): Ditto.
13270 (CODE_FOR_lsx_vrepli_w): Ditto.
13271 (CODE_FOR_lsx_vrepli_d): Ditto.
13272 (CODE_FOR_lsx_vsat_b): Ditto.
13273 (CODE_FOR_lsx_vsat_h): Ditto.
13274 (CODE_FOR_lsx_vsat_w): Ditto.
13275 (CODE_FOR_lsx_vsat_d): Ditto.
13276 (CODE_FOR_lsx_vsat_bu): Ditto.
13277 (CODE_FOR_lsx_vsat_hu): Ditto.
13278 (CODE_FOR_lsx_vsat_wu): Ditto.
13279 (CODE_FOR_lsx_vsat_du): Ditto.
13280 (CODE_FOR_lsx_vavg_b): Ditto.
13281 (CODE_FOR_lsx_vavg_h): Ditto.
13282 (CODE_FOR_lsx_vavg_w): Ditto.
13283 (CODE_FOR_lsx_vavg_d): Ditto.
13284 (CODE_FOR_lsx_vavg_bu): Ditto.
13285 (CODE_FOR_lsx_vavg_hu): Ditto.
13286 (CODE_FOR_lsx_vavg_wu): Ditto.
13287 (CODE_FOR_lsx_vavg_du): Ditto.
13288 (CODE_FOR_lsx_vavgr_b): Ditto.
13289 (CODE_FOR_lsx_vavgr_h): Ditto.
13290 (CODE_FOR_lsx_vavgr_w): Ditto.
13291 (CODE_FOR_lsx_vavgr_d): Ditto.
13292 (CODE_FOR_lsx_vavgr_bu): Ditto.
13293 (CODE_FOR_lsx_vavgr_hu): Ditto.
13294 (CODE_FOR_lsx_vavgr_wu): Ditto.
13295 (CODE_FOR_lsx_vavgr_du): Ditto.
13296 (CODE_FOR_lsx_vssub_b): Ditto.
13297 (CODE_FOR_lsx_vssub_h): Ditto.
13298 (CODE_FOR_lsx_vssub_w): Ditto.
13299 (CODE_FOR_lsx_vssub_d): Ditto.
13300 (CODE_FOR_lsx_vssub_bu): Ditto.
13301 (CODE_FOR_lsx_vssub_hu): Ditto.
13302 (CODE_FOR_lsx_vssub_wu): Ditto.
13303 (CODE_FOR_lsx_vssub_du): Ditto.
13304 (CODE_FOR_lsx_vabsd_b): Ditto.
13305 (CODE_FOR_lsx_vabsd_h): Ditto.
13306 (CODE_FOR_lsx_vabsd_w): Ditto.
13307 (CODE_FOR_lsx_vabsd_d): Ditto.
13308 (CODE_FOR_lsx_vabsd_bu): Ditto.
13309 (CODE_FOR_lsx_vabsd_hu): Ditto.
13310 (CODE_FOR_lsx_vabsd_wu): Ditto.
13311 (CODE_FOR_lsx_vabsd_du): Ditto.
13312 (CODE_FOR_lsx_vftint_w_s): Ditto.
13313 (CODE_FOR_lsx_vftint_l_d): Ditto.
13314 (CODE_FOR_lsx_vftint_wu_s): Ditto.
13315 (CODE_FOR_lsx_vftint_lu_d): Ditto.
13316 (CODE_FOR_lsx_vandn_v): Ditto.
13317 (CODE_FOR_lsx_vorn_v): Ditto.
13318 (CODE_FOR_lsx_vneg_b): Ditto.
13319 (CODE_FOR_lsx_vneg_h): Ditto.
13320 (CODE_FOR_lsx_vneg_w): Ditto.
13321 (CODE_FOR_lsx_vneg_d): Ditto.
13322 (CODE_FOR_lsx_vshuf4i_d): Ditto.
13323 (CODE_FOR_lsx_vbsrl_v): Ditto.
13324 (CODE_FOR_lsx_vbsll_v): Ditto.
13325 (CODE_FOR_lsx_vfmadd_s): Ditto.
13326 (CODE_FOR_lsx_vfmadd_d): Ditto.
13327 (CODE_FOR_lsx_vfmsub_s): Ditto.
13328 (CODE_FOR_lsx_vfmsub_d): Ditto.
13329 (CODE_FOR_lsx_vfnmadd_s): Ditto.
13330 (CODE_FOR_lsx_vfnmadd_d): Ditto.
13331 (CODE_FOR_lsx_vfnmsub_s): Ditto.
13332 (CODE_FOR_lsx_vfnmsub_d): Ditto.
13333 (CODE_FOR_lsx_vmuh_b): Ditto.
13334 (CODE_FOR_lsx_vmuh_h): Ditto.
13335 (CODE_FOR_lsx_vmuh_w): Ditto.
13336 (CODE_FOR_lsx_vmuh_d): Ditto.
13337 (CODE_FOR_lsx_vmuh_bu): Ditto.
13338 (CODE_FOR_lsx_vmuh_hu): Ditto.
13339 (CODE_FOR_lsx_vmuh_wu): Ditto.
13340 (CODE_FOR_lsx_vmuh_du): Ditto.
13341 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
13342 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
13343 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
13344 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
13345 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
13346 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
13347 (CODE_FOR_lsx_vssran_b_h): Ditto.
13348 (CODE_FOR_lsx_vssran_h_w): Ditto.
13349 (CODE_FOR_lsx_vssran_w_d): Ditto.
13350 (CODE_FOR_lsx_vssran_bu_h): Ditto.
13351 (CODE_FOR_lsx_vssran_hu_w): Ditto.
13352 (CODE_FOR_lsx_vssran_wu_d): Ditto.
13353 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
13354 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
13355 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
13356 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
13357 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
13358 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
13359 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
13360 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
13361 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
13362 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
13363 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
13364 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
13365 (loongarch_builtin_vector_type): Ditto.
13366 (loongarch_build_cvpointer_type): Ditto.
13367 (LARCH_ATYPE_CVPOINTER): Ditto.
13368 (LARCH_ATYPE_BOOLEAN): Ditto.
13369 (LARCH_ATYPE_V2SF): Ditto.
13370 (LARCH_ATYPE_V2HI): Ditto.
13371 (LARCH_ATYPE_V2SI): Ditto.
13372 (LARCH_ATYPE_V4QI): Ditto.
13373 (LARCH_ATYPE_V4HI): Ditto.
13374 (LARCH_ATYPE_V8QI): Ditto.
13375 (LARCH_ATYPE_V2DI): Ditto.
13376 (LARCH_ATYPE_V4SI): Ditto.
13377 (LARCH_ATYPE_V8HI): Ditto.
13378 (LARCH_ATYPE_V16QI): Ditto.
13379 (LARCH_ATYPE_V2DF): Ditto.
13380 (LARCH_ATYPE_V4SF): Ditto.
13381 (LARCH_ATYPE_V4DI): Ditto.
13382 (LARCH_ATYPE_V8SI): Ditto.
13383 (LARCH_ATYPE_V16HI): Ditto.
13384 (LARCH_ATYPE_V32QI): Ditto.
13385 (LARCH_ATYPE_V4DF): Ditto.
13386 (LARCH_ATYPE_V8SF): Ditto.
13387 (LARCH_ATYPE_UV2DI): Ditto.
13388 (LARCH_ATYPE_UV4SI): Ditto.
13389 (LARCH_ATYPE_UV8HI): Ditto.
13390 (LARCH_ATYPE_UV16QI): Ditto.
13391 (LARCH_ATYPE_UV4DI): Ditto.
13392 (LARCH_ATYPE_UV8SI): Ditto.
13393 (LARCH_ATYPE_UV16HI): Ditto.
13394 (LARCH_ATYPE_UV32QI): Ditto.
13395 (LARCH_ATYPE_UV2SI): Ditto.
13396 (LARCH_ATYPE_UV4HI): Ditto.
13397 (LARCH_ATYPE_UV8QI): Ditto.
13398 (loongarch_builtin_vectorized_function): Ditto.
13399 (LARCH_GET_BUILTIN): Ditto.
13400 (loongarch_expand_builtin_insn): Ditto.
13401 (loongarch_expand_builtin_lsx_test_branch): Ditto.
13402 (loongarch_expand_builtin): Ditto.
13403 * config/loongarch/loongarch-ftypes.def (1): Ditto.
13407 * config/loongarch/lsxintrin.h: New file.
13409 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
13411 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
13431 * config/loongarch/genopts/loongarch.opt.in: Ditto.
13432 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
13433 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
13434 (VECTOR_MODE): Ditto.
13436 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
13437 (loongarch_split_move_insn): Ditto.
13438 (loongarch_split_128bit_move): Ditto.
13439 (loongarch_split_128bit_move_p): Ditto.
13440 (loongarch_split_lsx_copy_d): Ditto.
13441 (loongarch_split_lsx_insert_d): Ditto.
13442 (loongarch_split_lsx_fill_d): Ditto.
13443 (loongarch_expand_vec_cmp): Ditto.
13444 (loongarch_const_vector_same_val_p): Ditto.
13445 (loongarch_const_vector_same_bytes_p): Ditto.
13446 (loongarch_const_vector_same_int_p): Ditto.
13447 (loongarch_const_vector_shuffle_set_p): Ditto.
13448 (loongarch_const_vector_bitimm_set_p): Ditto.
13449 (loongarch_const_vector_bitimm_clr_p): Ditto.
13450 (loongarch_lsx_vec_parallel_const_half): Ditto.
13451 (loongarch_gen_const_int_vector): Ditto.
13452 (loongarch_lsx_output_division): Ditto.
13453 (loongarch_expand_vector_init): Ditto.
13454 (loongarch_expand_vec_unpack): Ditto.
13455 (loongarch_expand_vec_perm): Ditto.
13456 (loongarch_expand_vector_extract): Ditto.
13457 (loongarch_expand_vector_reduc): Ditto.
13458 (loongarch_ldst_scaled_shift): Ditto.
13459 (loongarch_expand_vec_cond_expr): Ditto.
13460 (loongarch_expand_vec_cond_mask_expr): Ditto.
13461 (loongarch_builtin_vectorized_function): Ditto.
13462 (loongarch_gen_const_int_vector_shuffle): Ditto.
13463 (loongarch_build_signbit_mask): Ditto.
13464 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
13465 (loongarch_setup_incoming_varargs): Ditto.
13466 (loongarch_emit_move): Ditto.
13467 (loongarch_const_vector_bitimm_set_p): Ditto.
13468 (loongarch_const_vector_bitimm_clr_p): Ditto.
13469 (loongarch_const_vector_same_val_p): Ditto.
13470 (loongarch_const_vector_same_bytes_p): Ditto.
13471 (loongarch_const_vector_same_int_p): Ditto.
13472 (loongarch_const_vector_shuffle_set_p): Ditto.
13473 (loongarch_symbol_insns): Ditto.
13474 (loongarch_cannot_force_const_mem): Ditto.
13475 (loongarch_valid_offset_p): Ditto.
13476 (loongarch_valid_index_p): Ditto.
13477 (loongarch_classify_address): Ditto.
13478 (loongarch_address_insns): Ditto.
13479 (loongarch_ldst_scaled_shift): Ditto.
13480 (loongarch_const_insns): Ditto.
13481 (loongarch_split_move_insn_p): Ditto.
13482 (loongarch_subword_at_byte): Ditto.
13483 (loongarch_legitimize_move): Ditto.
13484 (loongarch_builtin_vectorization_cost): Ditto.
13485 (loongarch_split_move_p): Ditto.
13486 (loongarch_split_move): Ditto.
13487 (loongarch_split_move_insn): Ditto.
13488 (loongarch_output_move_index_float): Ditto.
13489 (loongarch_split_128bit_move_p): Ditto.
13490 (loongarch_split_128bit_move): Ditto.
13491 (loongarch_split_lsx_copy_d): Ditto.
13492 (loongarch_split_lsx_insert_d): Ditto.
13493 (loongarch_split_lsx_fill_d): Ditto.
13494 (loongarch_output_move): Ditto.
13495 (loongarch_extend_comparands): Ditto.
13496 (loongarch_print_operand_reloc): Ditto.
13497 (loongarch_print_operand): Ditto.
13498 (loongarch_hard_regno_mode_ok_uncached): Ditto.
13499 (loongarch_hard_regno_call_part_clobbered): Ditto.
13500 (loongarch_hard_regno_nregs): Ditto.
13501 (loongarch_class_max_nregs): Ditto.
13502 (loongarch_can_change_mode_class): Ditto.
13503 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
13504 (loongarch_secondary_reload): Ditto.
13505 (loongarch_vector_mode_supported_p): Ditto.
13506 (loongarch_preferred_simd_mode): Ditto.
13507 (loongarch_autovectorize_vector_modes): Ditto.
13508 (loongarch_lsx_output_division): Ditto.
13509 (loongarch_option_override_internal): Ditto.
13510 (loongarch_hard_regno_caller_save_mode): Ditto.
13511 (MAX_VECT_LEN): Ditto.
13512 (loongarch_spill_class): Ditto.
13513 (struct expand_vec_perm_d): Ditto.
13514 (loongarch_promote_function_mode): Ditto.
13515 (loongarch_expand_vselect): Ditto.
13516 (loongarch_starting_frame_offset): Ditto.
13517 (loongarch_expand_vselect_vconcat): Ditto.
13518 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
13519 (TARGET_OPTION_OVERRIDE): Ditto.
13520 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
13521 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
13522 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
13523 (loongarch_expand_lsx_shuffle): Ditto.
13524 (TARGET_SCHED_INIT): Ditto.
13525 (TARGET_SCHED_REORDER): Ditto.
13526 (TARGET_SCHED_REORDER2): Ditto.
13527 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
13528 (TARGET_SCHED_ADJUST_COST): Ditto.
13529 (TARGET_SCHED_ISSUE_RATE): Ditto.
13530 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
13531 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
13532 (TARGET_VALID_POINTER_MODE): Ditto.
13533 (TARGET_REGISTER_MOVE_COST): Ditto.
13534 (TARGET_MEMORY_MOVE_COST): Ditto.
13535 (TARGET_RTX_COSTS): Ditto.
13536 (TARGET_ADDRESS_COST): Ditto.
13537 (TARGET_IN_SMALL_DATA_P): Ditto.
13538 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
13539 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
13540 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
13541 (loongarch_expand_vec_perm): Ditto.
13542 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
13543 (TARGET_RETURN_IN_MEMORY): Ditto.
13544 (TARGET_FUNCTION_VALUE): Ditto.
13545 (TARGET_LIBCALL_VALUE): Ditto.
13546 (loongarch_try_expand_lsx_vshuf_const): Ditto.
13547 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
13548 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
13549 (TARGET_PRINT_OPERAND): Ditto.
13550 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
13551 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
13552 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
13553 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
13554 (TARGET_MUST_PASS_IN_STACK): Ditto.
13555 (TARGET_PASS_BY_REFERENCE): Ditto.
13556 (TARGET_ARG_PARTIAL_BYTES): Ditto.
13557 (TARGET_FUNCTION_ARG): Ditto.
13558 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
13559 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
13560 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
13561 (TARGET_INIT_BUILTINS): Ditto.
13562 (loongarch_expand_vec_perm_const_1): Ditto.
13563 (loongarch_expand_vec_perm_const_2): Ditto.
13564 (loongarch_vectorize_vec_perm_const): Ditto.
13565 (loongarch_cpu_sched_reassociation_width): Ditto.
13566 (loongarch_sched_reassociation_width): Ditto.
13567 (loongarch_expand_vector_extract): Ditto.
13568 (emit_reduc_half): Ditto.
13569 (loongarch_expand_vector_reduc): Ditto.
13570 (loongarch_expand_vec_unpack): Ditto.
13571 (loongarch_lsx_vec_parallel_const_half): Ditto.
13572 (loongarch_constant_elt_p): Ditto.
13573 (loongarch_gen_const_int_vector_shuffle): Ditto.
13574 (loongarch_expand_vector_init): Ditto.
13575 (loongarch_expand_lsx_cmp): Ditto.
13576 (loongarch_expand_vec_cond_expr): Ditto.
13577 (loongarch_expand_vec_cond_mask_expr): Ditto.
13578 (loongarch_expand_vec_cmp): Ditto.
13579 (loongarch_case_values_threshold): Ditto.
13580 (loongarch_build_const_vector): Ditto.
13581 (loongarch_build_signbit_mask): Ditto.
13582 (loongarch_builtin_support_vector_misalignment): Ditto.
13583 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
13584 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
13585 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
13586 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
13587 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
13588 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
13589 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
13590 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
13591 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
13592 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
13593 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
13594 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
13595 (UNITS_PER_LSX_REG): Ditto.
13596 (BITS_PER_LSX_REG): Ditto.
13597 (BIGGEST_ALIGNMENT): Ditto.
13598 (LSX_REG_FIRST): Ditto.
13599 (LSX_REG_LAST): Ditto.
13600 (LSX_REG_NUM): Ditto.
13601 (LSX_REG_P): Ditto.
13602 (LSX_REG_RTX_P): Ditto.
13603 (IMM13_OPERAND): Ditto.
13604 (LSX_SUPPORTED_MODE_P): Ditto.
13605 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
13606 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
13607 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
13614 * config/loongarch/loongarch.opt: Ditto.
13615 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
13616 (const_uimm3_operand): Ditto.
13617 (const_8_to_11_operand): Ditto.
13618 (const_12_to_15_operand): Ditto.
13619 (const_uimm4_operand): Ditto.
13620 (const_uimm6_operand): Ditto.
13621 (const_uimm7_operand): Ditto.
13622 (const_uimm8_operand): Ditto.
13623 (const_imm5_operand): Ditto.
13624 (const_imm10_operand): Ditto.
13625 (const_imm13_operand): Ditto.
13626 (reg_imm10_operand): Ditto.
13627 (aq8b_operand): Ditto.
13628 (aq8h_operand): Ditto.
13629 (aq8w_operand): Ditto.
13630 (aq8d_operand): Ditto.
13631 (aq10b_operand): Ditto.
13632 (aq10h_operand): Ditto.
13633 (aq10w_operand): Ditto.
13634 (aq10d_operand): Ditto.
13635 (aq12b_operand): Ditto.
13636 (aq12h_operand): Ditto.
13637 (aq12w_operand): Ditto.
13638 (aq12d_operand): Ditto.
13639 (const_m1_operand): Ditto.
13640 (reg_or_m1_operand): Ditto.
13641 (const_exp_2_operand): Ditto.
13642 (const_exp_4_operand): Ditto.
13643 (const_exp_8_operand): Ditto.
13644 (const_exp_16_operand): Ditto.
13645 (const_exp_32_operand): Ditto.
13646 (const_0_or_1_operand): Ditto.
13647 (const_0_to_3_operand): Ditto.
13648 (const_0_to_7_operand): Ditto.
13649 (const_2_or_3_operand): Ditto.
13650 (const_4_to_7_operand): Ditto.
13651 (const_8_to_15_operand): Ditto.
13652 (const_16_to_31_operand): Ditto.
13653 (qi_mask_operand): Ditto.
13654 (hi_mask_operand): Ditto.
13655 (si_mask_operand): Ditto.
13656 (d_operand): Ditto.
13657 (db4_operand): Ditto.
13658 (db7_operand): Ditto.
13659 (db8_operand): Ditto.
13660 (ib3_operand): Ditto.
13661 (sb4_operand): Ditto.
13662 (sb5_operand): Ditto.
13663 (sb8_operand): Ditto.
13664 (sd8_operand): Ditto.
13665 (ub4_operand): Ditto.
13666 (ub8_operand): Ditto.
13667 (uh4_operand): Ditto.
13668 (uw4_operand): Ditto.
13669 (uw5_operand): Ditto.
13670 (uw6_operand): Ditto.
13671 (uw8_operand): Ditto.
13672 (addiur2_operand): Ditto.
13673 (addiusp_operand): Ditto.
13674 (andi16_operand): Ditto.
13675 (movep_src_register): Ditto.
13676 (movep_src_operand): Ditto.
13677 (fcc_reload_operand): Ditto.
13678 (muldiv_target_operand): Ditto.
13679 (const_vector_same_val_operand): Ditto.
13680 (const_vector_same_simm5_operand): Ditto.
13681 (const_vector_same_uimm5_operand): Ditto.
13682 (const_vector_same_ximm5_operand): Ditto.
13683 (const_vector_same_uimm6_operand): Ditto.
13684 (par_const_vector_shf_set_operand): Ditto.
13685 (reg_or_vector_same_val_operand): Ditto.
13686 (reg_or_vector_same_simm5_operand): Ditto.
13687 (reg_or_vector_same_uimm5_operand): Ditto.
13688 (reg_or_vector_same_ximm5_operand): Ditto.
13689 (reg_or_vector_same_uimm6_operand): Ditto.
13690 * doc/md.texi: Ditto.
13691 * config/loongarch/lsx.md: New file.
13693 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13695 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
13696 (get_all_predecessors): New function.
13697 (get_all_successors): Ditto.
13698 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
13699 (get_all_successors): Ditto.
13700 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
13701 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
13703 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
13705 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
13706 (split_addsi): Likewise.
13707 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
13708 'N', 'x', and 'J' code letters.
13709 (arc_output_addsi): Make it static.
13710 (split_addsi): Remove it.
13711 * config/arc/arc.h (UNSIGNED_INT*): New defines.
13712 (SINNED_INT*): Likewise.
13713 * config/arc/arc.md (type): Add add, sub, bxor types.
13714 (tst_movb): Change code letter from 's' to 'x'.
13715 (andsi3_i): Likewise.
13716 (addsi3_mixed): Refurbish the pattern.
13717 (call_i): Change code letter from 'S' to 'J'.
13718 * config/arc/arc700.md: Add newly introduced types.
13719 * config/arc/arcHS.md: Likewsie.
13720 * config/arc/arcHS4x.md: Likewise.
13721 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
13722 (CM4): Update description.
13723 (CP4, C6u, C6n, CIs, C4p): New constraint.
13725 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
13727 * common/config/arc/arc-common.cc (arc_option_optimization_table):
13728 Remove mbbit_peephole.
13729 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
13730 (store_direct): Likewise.
13731 (BBIT peephole2): Likewise.
13732 * config/arc/arc.opt (mbbit-peephole): Ignore option.
13733 * doc/invoke.texi (mbbit-peephole): Update document.
13735 2023-09-05 Jakub Jelinek <jakub@redhat.com>
13737 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
13738 avreage -> average.
13740 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13742 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
13743 options passed from driver to gnat1 as explicit for multilib.
13745 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13747 * config.gcc: add loongarch*-elf target.
13748 * config/loongarch/elf.h: New file.
13749 Link against newlib by default.
13751 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13753 * config.gcc: use -mstrict-align for building libraries
13754 if --with-strict-align-lib is given.
13755 * doc/install.texi: likewise.
13757 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13759 * config/loongarch/loongarch-c.cc: Export macros
13760 "__loongarch_{arch,tune}" in the preprocessor.
13762 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13764 * config.gcc: Make --with-abi= obsolete, decide the default ABI
13765 with target triplet. Allow specifying multilib library build
13766 options with --with-multilib-list and --with-multilib-default.
13767 * config/loongarch/t-linux: Likewise.
13768 * config/loongarch/genopts/loongarch-strings: Likewise.
13769 * config/loongarch/loongarch-str.h: Likewise.
13770 * doc/install.texi: Likewise.
13771 * config/loongarch/genopts/loongarch.opt.in: Introduce
13772 -m[no-]l[a]sx options. Only process -m*-float and
13773 -m[no-]l[a]sx in the GCC driver.
13774 * config/loongarch/loongarch.opt: Likewise.
13775 * config/loongarch/la464.md: Likewise.
13776 * config/loongarch/loongarch-c.cc: Likewise.
13777 * config/loongarch/loongarch-cpu.cc: Likewise.
13778 * config/loongarch/loongarch-cpu.h: Likewise.
13779 * config/loongarch/loongarch-def.c: Likewise.
13780 * config/loongarch/loongarch-def.h: Likewise.
13781 * config/loongarch/loongarch-driver.cc: Likewise.
13782 * config/loongarch/loongarch-driver.h: Likewise.
13783 * config/loongarch/loongarch-opts.cc: Likewise.
13784 * config/loongarch/loongarch-opts.h: Likewise.
13785 * config/loongarch/loongarch.cc: Likewise.
13786 * doc/invoke.texi: Likewise.
13788 2023-09-05 liuhongt <hongtao.liu@intel.com>
13790 * config/i386/sse.md: (V8BFH_128): Renamed to ..
13791 (VHFBF_128): .. this.
13792 (V16BFH_256): Renamed to ..
13793 (VHFBF_256): .. this.
13794 (avx512f_mov<mode>): Extend to V_128.
13795 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
13796 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
13797 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
13798 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
13799 * config/i386/i386-expand.cc (expand_vec_perm_blend):
13800 Canonicalize vec_merge.
13802 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13804 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
13805 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
13806 (autovectorize_vector_modes): Ditto.
13807 (vectorize_related_mode): Ditto.
13809 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13811 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
13812 all 32b Darwin PowerPC cases.
13814 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13816 * config/darwin-sections.def (static_init_section): Add the
13817 __TEXT,__StaticInit section.
13818 * config/darwin.cc (darwin_function_section): Use the static init
13819 section for global initializers, to match other platform toolchains.
13821 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13823 * config/darwin-sections.def (darwin_exception_section): Move to
13824 the __TEXT segment.
13825 * config/darwin.cc (darwin_emit_except_table_label): Align before
13826 the exception table label.
13827 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
13828 relative 4byte relocs.
13830 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13832 * config/darwin.cc (dump_machopic_symref_flags): New.
13833 (debug_machopic_symref_flags): New.
13835 2023-09-04 Pan Li <pan2.li@intel.com>
13837 * config/riscv/riscv-vector-builtins-types.def
13838 (vfloat16mf4_t): Add FP16 intrinsic def.
13839 (vfloat16mf2_t): Ditto.
13840 (vfloat16m1_t): Ditto.
13841 (vfloat16m2_t): Ditto.
13842 (vfloat16m4_t): Ditto.
13843 (vfloat16m8_t): Ditto.
13845 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
13847 PR tree-optimization/108757
13848 * match.pd ((X - N * M) / N): New pattern.
13849 ((X + N * M) / N): New pattern.
13850 ((X + C) div_rshift N): New pattern.
13852 2023-09-04 Guo Jie <guojie@loongson.cn>
13854 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
13855 movsf_hardfloat and movdf_hardfloat.
13857 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
13859 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
13860 In unsigned QImode test, check for sign extended subreg and/or
13861 constant operands, and do a sign extension in that case.
13862 * config/loongarch/loongarch.md (TARGET_64BIT): Define
13863 template cbranchqi4.
13865 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
13867 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
13868 from memory into floating-point registers.
13870 2023-09-03 Pan Li <pan2.li@intel.com>
13872 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
13874 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
13876 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
13878 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
13879 pointer before overwriting it.
13881 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
13883 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
13884 Associate the __float128 type to float128_type_node so that it can
13885 be recognized by the compiler.
13886 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
13887 Add the flag "FLOAT128_TYPE" to gcc and associate a function
13888 with the suffix "q" to "f128".
13889 * doc/extend.texi:Added support for 128-bit floating-point functions on
13890 the LoongArch architecture.
13892 2023-09-01 Jakub Jelinek <jakub@redhat.com>
13895 * common.opt (fabi-version=): Document version 19.
13896 * doc/invoke.texi (-fabi-version=): Likewise.
13898 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13900 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
13901 New combine pattern.
13902 (*cond_<float_cvt><vconvert><mode>): Ditto.
13903 (*cond_<optab><vnconvert><mode>): Ditto.
13904 (*cond_<float_cvt><vnconvert><mode>): Ditto.
13905 (*cond_<optab><mode><vnconvert>): Ditto.
13906 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
13907 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
13908 (<float_cvt><vconvert><mode>2): Adjust.
13909 (<optab><vnconvert><mode>2): Adjust.
13910 (<float_cvt><vnconvert><mode>2): Adjust.
13911 (<optab><mode><vnconvert>2): Adjust.
13912 (<float_cvt><mode><vnconvert>2): Adjust.
13913 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
13915 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13917 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
13918 New combine pattern.
13919 (*cond_trunc<mode><v_double_trunc>): Ditto.
13920 * config/riscv/autovec.md: Adjust.
13921 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
13923 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13925 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
13926 New combine pattern.
13927 (*cond_<optab><v_quad_trunc><mode>): Ditto.
13928 (*cond_<optab><v_oct_trunc><mode>): Ditto.
13929 (*cond_trunc<mode><v_double_trunc>): Ditto.
13930 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
13931 (<optab><v_oct_trunc><mode>2): Ditto.
13933 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13935 * config/riscv/autovec.md: Adjust.
13936 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
13937 (expand_cond_len_binop): Ditto.
13938 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
13939 (expand_cond_len_op): Ditto.
13940 (expand_cond_len_unop): Ditto.
13941 (expand_cond_len_binop): Ditto.
13942 (expand_cond_len_ternop): Ditto.
13944 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13946 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
13947 VECT_COMPARE_COSTS by default.
13949 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
13951 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
13953 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13955 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
13957 * config/riscv/riscv.opt: Add dynamic compile option.
13959 2023-09-01 Pan Li <pan2.li@intel.com>
13961 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
13962 vls floating-point autovec.
13963 * config/riscv/vector-iterators.md: New iterator for
13964 floating-point V and VLS.
13965 * config/riscv/vector.md: Add VLS to floating-point binop.
13967 2023-09-01 Andrew Pinski <apinski@marvell.com>
13969 PR tree-optimization/19832
13970 * match.pd: Add pattern to optimize
13971 `(a != b) ? a OP b : c`.
13973 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
13974 Guo Jie <guojie@loongson.cn>
13977 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
13978 frame_pointer_needed to determine whether to use the $fp register.
13980 2023-08-31 Andrew Pinski <apinski@marvell.com>
13982 PR tree-optimization/110915
13983 * match.pd (min_value, max_value): Extend to vector constants.
13985 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
13987 * config.in: Regenerate.
13988 * config/darwin-c.cc: Change spelling to macOS.
13989 * config/darwin-driver.cc: Likewise.
13990 * config/darwin.h: Likewise.
13991 * configure.ac: Likewise.
13992 * doc/contrib.texi: Likewise.
13993 * doc/extend.texi: Likewise.
13994 * doc/invoke.texi: Likewise.
13995 * doc/plugins.texi: Likewise.
13996 * doc/tm.texi: Regenerate.
13997 * doc/tm.texi.in: Change spelling to macOS.
13998 * plugin.cc: Likewise.
14000 2023-08-31 Pan Li <pan2.li@intel.com>
14002 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
14003 * config/riscv/autovec.md: Ditto.
14005 2023-08-31 Pan Li <pan2.li@intel.com>
14007 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
14008 * config/riscv/autovec.md: Ditto.
14010 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
14012 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
14013 rather than a call. List each possible destination register
14014 in the call pattern.
14016 2023-08-31 Pan Li <pan2.li@intel.com>
14018 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
14019 * config/riscv/autovec.md: Ditto.
14021 2023-08-31 Pan Li <pan2.li@intel.com>
14022 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14024 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
14025 * config/riscv/autovec.md: Ditto.
14026 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
14028 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
14030 * config/riscv/autovec.md (shifts): Use
14031 vector_scalar_shift_operand.
14032 * config/riscv/predicates.md (vector_scalar_shift_operand): New
14035 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14037 * config.gcc: Add vector cost model framework for RVV.
14038 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
14039 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
14040 * config/riscv/t-riscv: Ditto.
14041 * config/riscv/riscv-vector-costs.cc: New file.
14042 * config/riscv/riscv-vector-costs.h: New file.
14044 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
14047 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
14048 AltiVec address operands.
14049 (define_insn_and_split movxo): Likewise.
14050 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
14051 redundant mode size check.
14053 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
14055 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
14056 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
14057 Change to default policy.
14058 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
14059 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
14060 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
14062 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
14064 * config/riscv/autovec-opt.md: Adjust.
14065 * config/riscv/autovec-vls.md: Ditto.
14066 * config/riscv/autovec.md: Ditto.
14067 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
14068 (enum insn_flags): Add insn flags.
14069 (emit_vlmax_insn): Adjust.
14070 (emit_vlmax_fp_insn): Delete.
14071 (emit_vlmax_ternary_insn): Delete.
14072 (emit_vlmax_fp_ternary_insn): Delete.
14073 (emit_nonvlmax_insn): Adjust.
14074 (emit_vlmax_slide_insn): Delete.
14075 (emit_nonvlmax_slide_tu_insn): Delete.
14076 (emit_vlmax_merge_insn): Delete.
14077 (emit_vlmax_cmp_insn): Delete.
14078 (emit_vlmax_cmp_mu_insn): Delete.
14079 (emit_vlmax_masked_mu_insn): Delete.
14080 (emit_scalar_move_insn): Delete.
14081 (emit_nonvlmax_integer_move_insn): Delete.
14082 (emit_vlmax_insn_lra): Add.
14083 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
14084 (emit_vlmax_insn): Adjust.
14085 (emit_nonvlmax_insn): Adjust.
14086 (emit_vlmax_insn_lra): Add.
14087 (emit_vlmax_fp_insn): Delete.
14088 (emit_vlmax_ternary_insn): Delete.
14089 (emit_vlmax_fp_ternary_insn): Delete.
14090 (emit_vlmax_slide_insn): Delete.
14091 (emit_nonvlmax_slide_tu_insn): Delete.
14092 (emit_nonvlmax_slide_insn): Delete.
14093 (emit_vlmax_merge_insn): Delete.
14094 (emit_vlmax_cmp_insn): Delete.
14095 (emit_vlmax_cmp_mu_insn): Delete.
14096 (emit_vlmax_masked_insn): Delete.
14097 (emit_nonvlmax_masked_insn): Delete.
14098 (emit_vlmax_masked_store_insn): Delete.
14099 (emit_nonvlmax_masked_store_insn): Delete.
14100 (emit_vlmax_masked_mu_insn): Delete.
14101 (emit_vlmax_masked_fp_mu_insn): Delete.
14102 (emit_nonvlmax_tu_insn): Delete.
14103 (emit_nonvlmax_fp_tu_insn): Delete.
14104 (emit_nonvlmax_tumu_insn): Delete.
14105 (emit_nonvlmax_fp_tumu_insn): Delete.
14106 (emit_scalar_move_insn): Delete.
14107 (emit_cpop_insn): Delete.
14108 (emit_vlmax_integer_move_insn): Delete.
14109 (emit_nonvlmax_integer_move_insn): Delete.
14110 (emit_vlmax_gather_insn): Delete.
14111 (emit_vlmax_masked_gather_mu_insn): Delete.
14112 (emit_vlmax_compress_insn): Delete.
14113 (emit_nonvlmax_compress_insn): Delete.
14114 (emit_vlmax_reduction_insn): Delete.
14115 (emit_vlmax_fp_reduction_insn): Delete.
14116 (emit_nonvlmax_fp_reduction_insn): Delete.
14117 (expand_vec_series): Adjust.
14118 (expand_const_vector): Adjust.
14119 (legitimize_move): Adjust.
14120 (sew64_scalar_helper): Adjust.
14121 (expand_tuple_move): Adjust.
14122 (expand_vector_init_insert_elems): Adjust.
14123 (expand_vector_init_merge_repeating_sequence): Adjust.
14124 (expand_vec_cmp): Adjust.
14125 (expand_vec_cmp_float): Adjust.
14126 (expand_vec_perm): Adjust.
14127 (shuffle_merge_patterns): Adjust.
14128 (shuffle_compress_patterns): Adjust.
14129 (shuffle_decompress_patterns): Adjust.
14130 (expand_load_store): Adjust.
14131 (expand_cond_len_op): Adjust.
14132 (expand_cond_len_unop): Adjust.
14133 (expand_cond_len_binop): Adjust.
14134 (expand_gather_scatter): Adjust.
14135 (expand_cond_len_ternop): Adjust.
14136 (expand_reduction): Adjust.
14137 (expand_lanes_load_store): Adjust.
14138 (expand_fold_extract_last): Adjust.
14139 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
14140 * config/riscv/vector.md: Adjust.
14142 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
14145 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
14146 load/store with length only on 64-bit Power10.
14148 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
14150 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
14151 SWAP option is enabled.
14152 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
14154 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
14156 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
14157 Use common insn for signed and unsigned front-end definitions.
14158 * config/arm/arm_mve_builtins.def
14159 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
14160 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
14161 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
14164 (mve_rot): Likewise.
14166 (VxCADDQ_M): Likewise.
14167 * config/arm/unspecs.md (unspec): Likewise.
14168 * config/arm/mve.md: Fix minor typo.
14170 2023-08-31 liuhongt <hongtao.liu@intel.com>
14172 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
14173 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
14174 (VF_AVX512HFBF16): Renamed to VHFBF.
14175 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
14176 (VF_AVX512FP16): Removed.
14177 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
14178 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
14179 (rsqrt<mode>2): Ditto.
14180 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
14181 (vcond<mode><code>): Ditto.
14182 (vcond<sseintvecmodelower><mode>): Ditto.
14183 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
14184 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
14185 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
14186 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
14187 (cmla<conj_op><mode>4): Ditto.
14188 (fma_<mode>_fadd_fmul): Ditto.
14189 (fma_<mode>_fadd_fcmul): Ditto.
14190 (fma_<complexopname>_<mode>_fma_zero): Ditto.
14191 (fma_<mode>_fmaddc_bcst): Ditto.
14192 (fma_<mode>_fcmaddc_bcst): Ditto.
14193 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
14194 (cmul<conj_op><mode>3): Ditto.
14195 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
14197 (vec_unpacks_lo_<mode>): Ditto.
14198 (vec_unpacks_hi_<mode>): Ditto.
14199 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
14200 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
14201 (*vec_extract<mode>_0): Ditto.
14202 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
14204 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
14207 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
14209 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
14211 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
14212 (operator_minus::overflow_free_p): New declare.
14213 (operator_mult::overflow_free_p): New declare.
14214 * range-op.cc (range_op_handler::overflow_free_p): New function.
14215 (range_operator::overflow_free_p): New default function.
14216 (operator_plus::overflow_free_p): New function.
14217 (operator_minus::overflow_free_p): New function.
14218 (operator_mult::overflow_free_p): New function.
14219 * range-op.h (range_op_handler::overflow_free_p): New declare.
14220 (range_operator::overflow_free_p): New declare.
14221 * value-range.cc (irange::nonnegative_p): New function.
14222 (irange::nonpositive_p): New function.
14223 * value-range.h (irange::nonnegative_p): New declare.
14224 (irange::nonpositive_p): New declare.
14226 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
14229 * config/pru/predicates.md (const_0_operand): New predicate.
14230 (pru_cstore_comparison_operator): Ditto.
14231 * config/pru/pru.md (cstore<mode>4): New pattern.
14232 (cstoredi4): Ditto.
14234 2023-08-30 Richard Biener <rguenther@suse.de>
14236 PR tree-optimization/111228
14237 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
14238 New simplifications.
14240 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14242 * config/riscv/autovec.md (movmisalign<mode>): Delete.
14244 2023-08-30 Die Li <lidie@eswincomputing.com>
14245 Fei Gao <gaofei@eswincomputing.com>
14247 * config/riscv/peephole.md: New pattern.
14248 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
14249 (zcmp_mv_sreg_operand): New predicate.
14250 * config/riscv/riscv.md: New predicate.
14251 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
14252 (*mvsa01<X:mode>): New pattern.
14254 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
14256 * config/riscv/riscv.cc
14257 (riscv_zcmp_can_use_popretz): true if popretz can be used
14258 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
14259 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
14260 * config/riscv/riscv.md: define A0_REGNUM
14261 * config/riscv/zc.md
14262 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
14263 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
14264 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
14265 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
14266 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
14267 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
14268 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
14269 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
14270 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
14271 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
14272 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
14273 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
14275 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
14277 * config/riscv/iterators.md
14278 (slot0_offset): slot 0 offset in stack GPRs area in bytes
14279 (slot1_offset): slot 1 offset in stack GPRs area in bytes
14280 (slot2_offset): likewise
14281 (slot3_offset): likewise
14282 (slot4_offset): likewise
14283 (slot5_offset): likewise
14284 (slot6_offset): likewise
14285 (slot7_offset): likewise
14286 (slot8_offset): likewise
14287 (slot9_offset): likewise
14288 (slot10_offset): likewise
14289 (slot11_offset): likewise
14290 (slot12_offset): likewise
14291 * config/riscv/predicates.md
14292 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
14293 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
14294 (stack_push_up_to_s1_operand): likewise
14295 (stack_push_up_to_s2_operand): likewise
14296 (stack_push_up_to_s3_operand): likewise
14297 (stack_push_up_to_s4_operand): likewise
14298 (stack_push_up_to_s5_operand): likewise
14299 (stack_push_up_to_s6_operand): likewise
14300 (stack_push_up_to_s7_operand): likewise
14301 (stack_push_up_to_s8_operand): likewise
14302 (stack_push_up_to_s9_operand): likewise
14303 (stack_push_up_to_s11_operand): likewise
14304 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
14305 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
14306 (stack_pop_up_to_s1_operand): likewise
14307 (stack_pop_up_to_s2_operand): likewise
14308 (stack_pop_up_to_s3_operand): likewise
14309 (stack_pop_up_to_s4_operand): likewise
14310 (stack_pop_up_to_s5_operand): likewise
14311 (stack_pop_up_to_s6_operand): likewise
14312 (stack_pop_up_to_s7_operand): likewise
14313 (stack_pop_up_to_s8_operand): likewise
14314 (stack_pop_up_to_s9_operand): likewise
14315 (stack_pop_up_to_s11_operand): likewise
14316 * config/riscv/riscv-protos.h
14317 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
14318 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
14319 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
14320 (riscv_use_multi_push): true if multi push is used
14321 (riscv_multi_push_sregs_count): num of sregs in multi-push
14322 (riscv_multi_push_regs_count): num of regs in multi-push
14323 (riscv_16bytes_align): align to 16 bytes
14324 (riscv_stack_align): moved to a better place
14325 (riscv_save_libcall_count): no functional change
14326 (riscv_compute_frame_info): add zcmp frame info
14327 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
14328 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
14329 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
14330 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
14331 (riscv_expand_prologue): allocate stack by cm.push
14332 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
14333 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
14334 (zcmp_base_adj): calculate stack adjustment base size
14335 (zcmp_additional_adj): calculate stack adjustment additional size
14336 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
14337 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
14338 (S0_MASK): likewise
14339 (S1_MASK): likewise
14340 (S2_MASK): likewise
14341 (S3_MASK): likewise
14342 (S4_MASK): likewise
14343 (S5_MASK): likewise
14344 (S6_MASK): likewise
14345 (S7_MASK): likewise
14346 (S8_MASK): likewise
14347 (S9_MASK): likewise
14348 (S10_MASK): likewise
14349 (S11_MASK): likewise
14350 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
14351 (ZCMP_MAX_SPIMM): max spimm value
14352 (ZCMP_SP_INC_STEP): zcmp sp increment step
14353 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
14354 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
14355 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
14356 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
14357 * config/riscv/riscv.md: include zc.md
14358 * config/riscv/zc.md: New file. machine description for zcmp
14360 2023-08-30 Jakub Jelinek <jakub@redhat.com>
14362 PR tree-optimization/110914
14363 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
14364 adjust_last_stmt unless len is known constant.
14366 2023-08-30 Jakub Jelinek <jakub@redhat.com>
14368 PR tree-optimization/111015
14369 * gimple-ssa-store-merging.cc
14370 (imm_store_chain_info::output_merged_store): Use wi::mask and
14371 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
14372 build_int_cst to build BIT_AND_EXPR mask.
14374 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14376 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
14377 (call_may_clobber_ref_p_1): Ditto.
14378 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
14379 (get_alias_ptr_type_for_ptr_address): Ditto.
14381 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14383 * config/riscv/riscv-vsetvl.cc
14384 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
14386 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14388 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
14389 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
14392 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
14394 * config/riscv/zicond.md: New splitters to rewrite single bit
14395 sign extension as the condition to a czero in the desired form.
14397 2023-08-29 David Malcolm <dmalcolm@redhat.com>
14400 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
14402 2023-08-29 David Malcolm <dmalcolm@redhat.com>
14405 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
14407 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
14409 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
14410 zvfh can generate zfa extended instruction fli.h, just like zfh.
14412 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
14413 Vineet Gupta <vineetg@rivosinc.com>
14415 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
14416 __riscv_unaligned_avoid with value 1 or
14417 __riscv_unaligned_slow with value 1 or
14418 __riscv_unaligned_fast with value 1
14419 * config/riscv/riscv.cc (riscv_option_override): Define
14420 riscv_user_wants_strict_align. Set
14421 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
14422 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
14424 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
14426 * config/riscv/autovec-vls.md: Update types
14427 * config/riscv/riscv.md: Add vector placeholder type
14428 * config/riscv/vector.md: Update types
14430 2023-08-29 Carl Love <cel@us.ibm.com>
14432 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
14433 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
14434 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
14435 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
14436 New buit-in definitions.
14437 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
14438 overloaded definition.
14439 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
14441 2023-08-29 Pan Li <pan2.li@intel.com>
14442 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14444 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
14445 (riscv_legitimize_const_move): Handle ref plus const poly.
14447 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
14449 * common/config/riscv/riscv-common.cc
14450 (riscv_implied_info): Add implications from unprivileged extensions.
14451 (riscv_ext_version_table): Add stub support for all unprivileged
14452 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
14454 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
14456 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
14457 Add stub support for all vendor extensions supported by Binutils.
14459 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
14461 * common/config/riscv/riscv-common.cc
14462 (riscv_implied_info): Add implications from privileged extensions.
14463 (riscv_ext_version_table): Add stub support for all privileged
14464 extensions supported by Binutils.
14466 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
14468 * config/riscv/autovec.md: Adjust
14469 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
14470 (get_vlmax_rtx): Exported.
14471 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
14472 (emit_vlmax_masked_gather_mu_insn): Adjust.
14473 (get_vlmax_rtx): New func.
14474 (expand_load_store): Adjust.
14475 (expand_cond_len_unop): Call expand_cond_len_op.
14476 (expand_cond_len_op): New subroutine.
14477 (expand_cond_len_binop): Call expand_cond_len_op.
14478 (expand_cond_len_ternop): Call expand_cond_len_op.
14479 (expand_lanes_load_store): Adjust.
14481 2023-08-29 Jakub Jelinek <jakub@redhat.com>
14483 PR middle-end/79173
14484 PR middle-end/111209
14485 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
14486 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
14487 carry-out on higher limb. Don't match it though if it could be
14488 matched later on 4 argument addition/subtraction.
14490 2023-08-29 Andrew Pinski <apinski@marvell.com>
14492 PR tree-optimization/111147
14493 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
14494 instead of matching bit_not.
14496 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
14498 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
14501 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14503 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
14504 (pass_vsetvl::compute_local_properties): Fix bug.
14505 (pass_vsetvl::commit_vsetvls): Ditto.
14506 * config/riscv/riscv-vsetvl.h: New function.
14508 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
14511 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
14513 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
14514 force_reg mem target operand.
14515 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
14516 (*pred_mov<mode>): Remove imm -> reg pattern.
14517 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
14519 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
14521 * common/config/loongarch/loongarch-common.cc:
14522 Enable '-free' on O2 and above.
14523 * doc/invoke.texi: Modify the description information
14524 of the '-free' compilation option and add the LoongArch
14527 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
14529 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
14531 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
14533 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
14534 Implement the 'Zihintpause' extension, version 2.0.
14535 (riscv_ext_flag_table) Add 'Zihintpause' handling.
14536 * config/riscv/riscv-builtins.cc: Remove availability predicate
14537 "always" and add "hint_pause".
14538 (riscv_builtins) : Add "pause" extension.
14539 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
14540 * config/riscv/riscv.md (riscv_pause): Adjust output based on
14541 TARGET_ZIHINTPAUSE.
14543 2023-08-28 Andrew Pinski <apinski@marvell.com>
14545 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
14546 instead of specifically checking for ~X.
14548 2023-08-28 Andrew Pinski <apinski@marvell.com>
14550 PR tree-optimization/111146
14551 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
14554 2023-08-28 Andrew Pinski <apinski@marvell.com>
14556 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
14557 when resimplify returns true.
14558 (match_simplify_replacement): Print only if accepted the match-and-simplify
14559 result rather than the full sequence.
14561 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14563 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
14565 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
14567 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14569 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
14571 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14573 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
14574 (vmulltq_poly): New.
14575 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
14576 (vmulltq_poly): New.
14577 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
14578 (vmulltq_poly): New.
14579 * config/arm/arm_mve.h (vmulltq_poly): Remove.
14580 (vmullbq_poly): Remove.
14581 (vmullbq_poly_m): Remove.
14582 (vmulltq_poly_m): Remove.
14583 (vmullbq_poly_x): Remove.
14584 (vmulltq_poly_x): Remove.
14585 (vmulltq_poly_p8): Remove.
14586 (vmullbq_poly_p8): Remove.
14587 (vmulltq_poly_p16): Remove.
14588 (vmullbq_poly_p16): Remove.
14589 (vmullbq_poly_m_p8): Remove.
14590 (vmullbq_poly_m_p16): Remove.
14591 (vmulltq_poly_m_p8): Remove.
14592 (vmulltq_poly_m_p16): Remove.
14593 (vmullbq_poly_x_p8): Remove.
14594 (vmullbq_poly_x_p16): Remove.
14595 (vmulltq_poly_x_p8): Remove.
14596 (vmulltq_poly_x_p16): Remove.
14597 (__arm_vmulltq_poly_p8): Remove.
14598 (__arm_vmullbq_poly_p8): Remove.
14599 (__arm_vmulltq_poly_p16): Remove.
14600 (__arm_vmullbq_poly_p16): Remove.
14601 (__arm_vmullbq_poly_m_p8): Remove.
14602 (__arm_vmullbq_poly_m_p16): Remove.
14603 (__arm_vmulltq_poly_m_p8): Remove.
14604 (__arm_vmulltq_poly_m_p16): Remove.
14605 (__arm_vmullbq_poly_x_p8): Remove.
14606 (__arm_vmullbq_poly_x_p16): Remove.
14607 (__arm_vmulltq_poly_x_p8): Remove.
14608 (__arm_vmulltq_poly_x_p16): Remove.
14609 (__arm_vmulltq_poly): Remove.
14610 (__arm_vmullbq_poly): Remove.
14611 (__arm_vmullbq_poly_m): Remove.
14612 (__arm_vmulltq_poly_m): Remove.
14613 (__arm_vmullbq_poly_x): Remove.
14614 (__arm_vmulltq_poly_x): Remove.
14616 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14618 * config/arm/arm-mve-builtins-functions.h (class
14619 unspec_mve_function_exact_insn_vmull_poly): New.
14621 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14623 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
14624 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
14626 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14628 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
14629 support for 'U' and 'p' format specifiers.
14631 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14633 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
14635 (TYPES_poly_8_16): New.
14637 * config/arm/arm-mve-builtins.def (p8): New type suffix.
14639 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
14641 (struct type_suffix_info): Add poly_p field.
14643 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14645 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
14647 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
14649 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
14651 * config/arm/arm_mve.h (vmulltq_int): Remove.
14652 (vmullbq_int): Remove.
14653 (vmullbq_int_m): Remove.
14654 (vmulltq_int_m): Remove.
14655 (vmullbq_int_x): Remove.
14656 (vmulltq_int_x): Remove.
14657 (vmulltq_int_u8): Remove.
14658 (vmullbq_int_u8): Remove.
14659 (vmulltq_int_s8): Remove.
14660 (vmullbq_int_s8): Remove.
14661 (vmulltq_int_u16): Remove.
14662 (vmullbq_int_u16): Remove.
14663 (vmulltq_int_s16): Remove.
14664 (vmullbq_int_s16): Remove.
14665 (vmulltq_int_u32): Remove.
14666 (vmullbq_int_u32): Remove.
14667 (vmulltq_int_s32): Remove.
14668 (vmullbq_int_s32): Remove.
14669 (vmullbq_int_m_s8): Remove.
14670 (vmullbq_int_m_s32): Remove.
14671 (vmullbq_int_m_s16): Remove.
14672 (vmullbq_int_m_u8): Remove.
14673 (vmullbq_int_m_u32): Remove.
14674 (vmullbq_int_m_u16): Remove.
14675 (vmulltq_int_m_s8): Remove.
14676 (vmulltq_int_m_s32): Remove.
14677 (vmulltq_int_m_s16): Remove.
14678 (vmulltq_int_m_u8): Remove.
14679 (vmulltq_int_m_u32): Remove.
14680 (vmulltq_int_m_u16): Remove.
14681 (vmullbq_int_x_s8): Remove.
14682 (vmullbq_int_x_s16): Remove.
14683 (vmullbq_int_x_s32): Remove.
14684 (vmullbq_int_x_u8): Remove.
14685 (vmullbq_int_x_u16): Remove.
14686 (vmullbq_int_x_u32): Remove.
14687 (vmulltq_int_x_s8): Remove.
14688 (vmulltq_int_x_s16): Remove.
14689 (vmulltq_int_x_s32): Remove.
14690 (vmulltq_int_x_u8): Remove.
14691 (vmulltq_int_x_u16): Remove.
14692 (vmulltq_int_x_u32): Remove.
14693 (__arm_vmulltq_int_u8): Remove.
14694 (__arm_vmullbq_int_u8): Remove.
14695 (__arm_vmulltq_int_s8): Remove.
14696 (__arm_vmullbq_int_s8): Remove.
14697 (__arm_vmulltq_int_u16): Remove.
14698 (__arm_vmullbq_int_u16): Remove.
14699 (__arm_vmulltq_int_s16): Remove.
14700 (__arm_vmullbq_int_s16): Remove.
14701 (__arm_vmulltq_int_u32): Remove.
14702 (__arm_vmullbq_int_u32): Remove.
14703 (__arm_vmulltq_int_s32): Remove.
14704 (__arm_vmullbq_int_s32): Remove.
14705 (__arm_vmullbq_int_m_s8): Remove.
14706 (__arm_vmullbq_int_m_s32): Remove.
14707 (__arm_vmullbq_int_m_s16): Remove.
14708 (__arm_vmullbq_int_m_u8): Remove.
14709 (__arm_vmullbq_int_m_u32): Remove.
14710 (__arm_vmullbq_int_m_u16): Remove.
14711 (__arm_vmulltq_int_m_s8): Remove.
14712 (__arm_vmulltq_int_m_s32): Remove.
14713 (__arm_vmulltq_int_m_s16): Remove.
14714 (__arm_vmulltq_int_m_u8): Remove.
14715 (__arm_vmulltq_int_m_u32): Remove.
14716 (__arm_vmulltq_int_m_u16): Remove.
14717 (__arm_vmullbq_int_x_s8): Remove.
14718 (__arm_vmullbq_int_x_s16): Remove.
14719 (__arm_vmullbq_int_x_s32): Remove.
14720 (__arm_vmullbq_int_x_u8): Remove.
14721 (__arm_vmullbq_int_x_u16): Remove.
14722 (__arm_vmullbq_int_x_u32): Remove.
14723 (__arm_vmulltq_int_x_s8): Remove.
14724 (__arm_vmulltq_int_x_s16): Remove.
14725 (__arm_vmulltq_int_x_s32): Remove.
14726 (__arm_vmulltq_int_x_u8): Remove.
14727 (__arm_vmulltq_int_x_u16): Remove.
14728 (__arm_vmulltq_int_x_u32): Remove.
14729 (__arm_vmulltq_int): Remove.
14730 (__arm_vmullbq_int): Remove.
14731 (__arm_vmullbq_int_m): Remove.
14732 (__arm_vmulltq_int_m): Remove.
14733 (__arm_vmullbq_int_x): Remove.
14734 (__arm_vmulltq_int_x): Remove.
14736 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14738 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
14739 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
14741 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14743 * config/arm/arm-mve-builtins-functions.h (class
14744 unspec_mve_function_exact_insn_vmull): New.
14746 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14748 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
14749 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
14751 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
14753 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
14754 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
14755 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
14756 (mve_vmulltq_int_<supf><mode>): Merge into ...
14757 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
14758 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
14759 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
14760 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
14761 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
14762 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
14763 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
14765 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14767 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
14770 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14772 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
14773 (binary_acca_int64): Likewise.
14775 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
14777 * range-op-float.cc (fold_range): Handle relations.
14779 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
14781 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
14782 Optimize the function implementation.
14784 2023-08-28 liuhongt <hongtao.liu@intel.com>
14787 * config/i386/sse.md (V48_AVX2): Rename to ..
14788 (V48_128_256): .. this.
14789 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
14790 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
14791 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
14792 integral modes when TARGET_AVX2 is not available.
14793 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
14794 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
14796 (maskstore<mode><sseintvecmodelower>): Ditto.
14798 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14800 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
14802 (after_or_same_p): Ditto.
14803 (find_reg_killed_by): Delete.
14804 (has_vsetvl_killed_avl_p): Ditto.
14805 (anticipatable_occurrence_p): Refactor.
14806 (any_set_in_bb_p): Delete.
14807 (count_regno_occurrences): Ditto.
14808 (backward_propagate_worthwhile_p): Ditto.
14809 (demands_can_be_fused_p): Ditto.
14810 (earliest_pred_can_be_fused_p): New function.
14811 (vsetvl_dominated_by_p): Ditto.
14812 (vector_insn_info::parse_insn): Refactor.
14813 (vector_insn_info::merge): Refactor.
14814 (vector_insn_info::dump): Refactor.
14815 (vector_infos_manager::vector_infos_manager): Refactor.
14816 (vector_infos_manager::all_empty_predecessor_p): Delete.
14817 (vector_infos_manager::all_same_avl_p): Ditto.
14818 (vector_infos_manager::create_bitmap_vectors): Refactor.
14819 (vector_infos_manager::free_bitmap_vectors): Refactor.
14820 (vector_infos_manager::dump): Refactor.
14821 (pass_vsetvl::update_block_info): New function.
14822 (enum fusion_type): Ditto.
14823 (pass_vsetvl::get_backward_fusion_type): Delete.
14824 (pass_vsetvl::hard_empty_block_p): Ditto.
14825 (pass_vsetvl::backward_demand_fusion): Ditto.
14826 (pass_vsetvl::forward_demand_fusion): Ditto.
14827 (pass_vsetvl::demand_fusion): Ditto.
14828 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
14829 (pass_vsetvl::compute_local_properties): Ditto.
14830 (pass_vsetvl::earliest_fusion): New function.
14831 (pass_vsetvl::vsetvl_fusion): Ditto.
14832 (pass_vsetvl::commit_vsetvls): Refactor.
14833 (get_first_vsetvl_before_rvv_insns): Ditto.
14834 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
14835 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
14836 (pass_vsetvl::df_post_optimization): Refactor.
14837 (pass_vsetvl::lazy_vsetvl): Ditto.
14838 * config/riscv/riscv-vsetvl.h: Ditto.
14840 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14842 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
14843 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14844 (expand_fold_extract_last): New function.
14845 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
14846 (emit_cpop_insn): Ditto.
14847 (emit_nonvlmax_compress_insn): Ditto.
14848 (expand_fold_extract_last): Ditto.
14849 * config/riscv/vector.md: Fix vcpop.m ratio demand.
14851 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
14853 * config/riscv/sync-rvwmo.md: updated types to "multi" or
14854 "atomic" based on number of assembly lines generated
14855 * config/riscv/sync-ztso.md: likewise
14856 * config/riscv/sync.md: likewise
14858 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
14860 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
14862 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
14863 instructions FLI.H/S/D can load.
14864 * config/riscv/iterators.md (ceil): New.
14865 * config/riscv/riscv-opts.h (MASK_ZFA): New.
14867 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
14868 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
14869 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
14871 (riscv_const_insns): Likewise.
14872 (riscv_legitimize_const_move): Likewise.
14873 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
14875 (riscv_split_doubleword_move): Likewise.
14876 (riscv_output_move): Output the mov instructions in zfa extension.
14877 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
14879 (riscv_secondary_memory_needed): Likewise.
14880 * config/riscv/riscv.md (fminm<mode>3): New.
14881 (fmaxm<mode>3): New.
14882 (movsidf2_low_rv32): New.
14883 (movsidf2_high_rv32): New.
14884 (movdfsisi3_rv32): New.
14885 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
14886 * config/riscv/riscv.opt: New.
14888 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
14891 * omp-general.cc (omp_runtime_api_procname): New.
14892 (omp_runtime_api_call): Moved here from omp-low.cc, and make
14894 * omp-general.h: Include omp-api.h.
14895 * omp-low.cc (omp_runtime_api_call): Delete this copy.
14897 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
14899 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
14900 * doc/gimple.texi (GIMPLE instruction set): Add
14901 GIMPLE_OMP_STRUCTURED_BLOCK.
14902 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
14903 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
14904 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
14905 GIMPLE_OMP_STRUCTURED_BLOCK.
14906 (pp_gimple_stmt_1): Likewise.
14907 * gimple-walk.cc (walk_gimple_stmt): Likewise.
14908 * gimple.cc (gimple_build_omp_structured_block): New.
14909 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
14910 * gimple.h (gimple_build_omp_structured_block): Declare.
14911 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
14912 (CASE_GIMPLE_OMP): Likewise.
14913 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
14914 (gimplify_expr): Likewise.
14915 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
14916 GIMPLE_OMP_STRUCTURED_BLOCK.
14917 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
14918 (lower_omp_1): Likewise.
14919 (diagnose_sb_1): Likewise.
14920 (diagnose_sb_2): Likewise.
14921 * tree-inline.cc (remap_gimple_stmt): Handle
14922 GIMPLE_OMP_STRUCTURED_BLOCK.
14923 (estimate_num_insns): Likewise.
14924 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
14925 (convert_local_reference_stmt): Likewise.
14926 (convert_gimple_call): Likewise.
14927 * tree-pretty-print.cc (dump_generic_node): Handle
14928 OMP_STRUCTURED_BLOCK.
14929 * tree.def (OMP_STRUCTURED_BLOCK): New.
14930 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
14932 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
14934 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
14935 cost. Add some comments about different constants handling.
14937 2023-08-25 Andrew Pinski <apinski@marvell.com>
14939 * match.pd (`a ? one_zero : one_zero`): Move
14940 below detection of minmax.
14942 2023-08-25 Andrew Pinski <apinski@marvell.com>
14944 * match.pd (`a | C -> C`): New pattern.
14946 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
14948 * caller-save.cc (new_saved_hard_reg):
14949 Rename TRUE/FALSE to true/false.
14950 (setup_save_areas): Ditto.
14951 * gcc.cc (set_collect_gcc_options): Ditto.
14952 (driver::build_multilib_strings): Ditto.
14953 (print_multilib_info): Ditto.
14954 * genautomata.cc (gen_cpu_unit): Ditto.
14955 (gen_query_cpu_unit): Ditto.
14956 (gen_bypass): Ditto.
14957 (gen_excl_set): Ditto.
14958 (gen_presence_absence_set): Ditto.
14959 (gen_presence_set): Ditto.
14960 (gen_final_presence_set): Ditto.
14961 (gen_absence_set): Ditto.
14962 (gen_final_absence_set): Ditto.
14963 (gen_automaton): Ditto.
14964 (gen_regexp_repeat): Ditto.
14965 (gen_regexp_allof): Ditto.
14966 (gen_regexp_oneof): Ditto.
14967 (gen_regexp_sequence): Ditto.
14968 (process_decls): Ditto.
14969 (reserv_sets_are_intersected): Ditto.
14970 (initiate_excl_sets): Ditto.
14971 (form_reserv_sets_list): Ditto.
14972 (check_presence_pattern_sets): Ditto.
14973 (check_absence_pattern_sets): Ditto.
14974 (check_regexp_units_distribution): Ditto.
14975 (check_unit_distributions_to_automata): Ditto.
14976 (create_ainsns): Ditto.
14977 (output_insn_code_cases): Ditto.
14978 (output_internal_dead_lock_func): Ditto.
14979 (form_important_insn_automata_lists): Ditto.
14980 * gengtype-state.cc (read_state_files_list): Ditto.
14981 * gengtype.cc (main): Ditto.
14982 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
14984 * gimple.cc (gimple_build_call_from_tree): Ditto.
14985 (preprocess_case_label_vec_for_gimple): Ditto.
14986 * gimplify.cc (gimplify_call_expr): Ditto.
14987 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
14989 2023-08-25 Richard Biener <rguenther@suse.de>
14991 PR tree-optimization/111137
14992 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
14993 Properly handle grouped stores from other SLP instances.
14995 2023-08-25 Richard Biener <rguenther@suse.de>
14997 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
14998 Split out from vect_slp_analyze_node_dependences, remove
15000 (vect_slp_analyze_load_dependences): Split out from
15001 vect_slp_analyze_node_dependences, adjust comments. Process
15002 queued stores before any disambiguation.
15003 (vect_slp_analyze_node_dependences): Remove.
15004 (vect_slp_analyze_instance_dependence): Adjust.
15006 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
15008 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
15010 (operator_not_equal::fold_range): Adjust for relations.
15011 (operator_lt::fold_range): Same.
15012 (operator_gt::fold_range): Same.
15013 (foperator_unordered_equal::fold_range): Same.
15014 (foperator_unordered_lt::fold_range): Same.
15015 (foperator_unordered_le::fold_range): Same.
15016 (foperator_unordered_gt::fold_range): Same.
15017 (foperator_unordered_ge::fold_range): Same.
15019 2023-08-25 Richard Biener <rguenther@suse.de>
15021 PR tree-optimization/111136
15022 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
15023 stores force STMT_VINFO_STRIDED_P and also duplicate that
15026 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15028 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
15029 Add early continue.
15031 2023-08-25 liuhongt <hongtao.liu@intel.com>
15033 * config/i386/sse.md (vec_set<mode>): Removed.
15034 (V_128H): Merge into ..
15036 (V_256H): Merge into ..
15038 (V_512): Add V32HF, V32BF.
15039 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
15041 (vcond<mode><sseintvecmodelower>): Removed
15042 (vcondu<mode><sseintvecmodelower>): Removed.
15043 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
15045 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
15048 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
15049 Adjust paramter order.
15051 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
15054 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
15056 2023-08-24 David Malcolm <dmalcolm@redhat.com>
15059 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
15060 list of functions known to the analyzer.
15062 2023-08-24 Richard Biener <rguenther@suse.de>
15064 PR tree-optimization/111123
15065 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
15066 remove indirect clobbers here ...
15067 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
15068 (remove_indirect_clobbers): New function.
15070 2023-08-24 Jan Hubicka <jh@suse.cz>
15072 * cfg.h (struct control_flow_graph): New field full_profile.
15073 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
15074 * cfg.cc (init_flow): Set full_profile to false.
15075 * graphite.cc (graphite_transform_loops): Set full_profile to false.
15076 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
15077 * predict.cc (pass_profile::execute): Set full_profile to true.
15078 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
15079 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
15080 if full_profile is set.
15081 * tree-inline.cc (initialize_cfun): Initialize full_profile.
15082 (expand_call_inline): Combine full_profile.
15084 2023-08-24 Richard Biener <rguenther@suse.de>
15086 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
15087 load_p to ldst_p, fix mistakes and rely on
15088 STMT_VINFO_DATA_REF.
15090 2023-08-24 Jan Hubicka <jh@suse.cz>
15092 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
15093 of newly build trap bb.
15095 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15097 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
15098 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
15099 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
15101 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
15103 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
15104 * config/riscv/riscv.cc (riscv_option_override): Set sched
15105 pressure algorithm.
15107 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
15109 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
15111 2023-08-24 Richard Biener <rguenther@suse.de>
15113 PR tree-optimization/111125
15114 * tree-vect-slp.cc (vect_slp_function): Split at novector
15115 loop entry, do not push blocks in novector loops.
15117 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
15119 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
15121 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15123 * genmatch.cc (decision_tree::gen): Support
15124 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
15125 * gimple-match-exports.cc (gimple_simplify): Ditto.
15126 (gimple_resimplify6): New function.
15127 (gimple_resimplify7): New function.
15128 (gimple_match_op::resimplify): Support
15129 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
15130 (convert_conditional_op): Ditto.
15131 (build_call_internal): Ditto.
15132 (try_conditional_simplification): Ditto.
15133 (gimple_extract): Ditto.
15134 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
15135 * internal-fn.cc (CASE): Ditto.
15137 2023-08-24 Richard Biener <rguenther@suse.de>
15139 PR tree-optimization/111115
15140 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
15141 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
15143 * tree-vect-slp.cc (arg3_arg2_map): New.
15144 (vect_get_operand_map): Handle IFN_MASK_STORE.
15145 (vect_slp_child_index_for_operand): New function.
15146 (vect_build_slp_tree_1): Handle statements with no LHS,
15148 (vect_remove_slp_scalar_calls): Likewise.
15149 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
15150 SLP child corresponding to the ifn value index.
15151 (vectorizable_store): Likewise for the mask index. Support
15153 (vectorizable_load): Lookup the SLP child corresponding to the
15156 2023-08-24 Richard Biener <rguenther@suse.de>
15158 PR tree-optimization/111125
15159 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
15160 for the remain_defs processing.
15162 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
15164 * config/aarch64/aarch64.cc: Include ssa.h.
15165 (aarch64_multiply_add_p): Require the second operand of an
15166 Advanced SIMD subtraction to be a multiplication. Assume that
15167 such an operation won't be fused if the second operand is used
15168 multiple times and if the first operand is also a multiplication.
15170 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15172 * tree-vect-loop.cc (vectorizable_reduction): Apply
15173 LEN_FOLD_EXTRACT_LAST.
15174 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
15176 2023-08-24 Richard Biener <rguenther@suse.de>
15178 PR tree-optimization/111128
15179 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
15180 Emit external shift operand inline if we promoted it with
15181 another pattern stmt.
15183 2023-08-24 Pan Li <pan2.li@intel.com>
15185 * config/riscv/autovec.md: Fix typo.
15187 2023-08-24 Pan Li <pan2.li@intel.com>
15189 * config/riscv/riscv-vector-builtins-bases.cc
15190 (class binop_frm): Removed.
15191 (class reverse_binop_frm): Ditto.
15192 (class widen_binop_frm): Ditto.
15193 (class vfmacc_frm): Ditto.
15194 (class vfnmacc_frm): Ditto.
15195 (class vfmsac_frm): Ditto.
15196 (class vfnmsac_frm): Ditto.
15197 (class vfmadd_frm): Ditto.
15198 (class vfnmadd_frm): Ditto.
15199 (class vfmsub_frm): Ditto.
15200 (class vfnmsub_frm): Ditto.
15201 (class vfwmacc_frm): Ditto.
15202 (class vfwnmacc_frm): Ditto.
15203 (class vfwmsac_frm): Ditto.
15204 (class vfwnmsac_frm): Ditto.
15205 (class unop_frm): Ditto.
15206 (class vfrec7_frm): Ditto.
15207 (class binop): Add frm_op_type template arg.
15208 (class unop): Ditto.
15209 (class widen_binop): Ditto.
15210 (class widen_binop_fp): Ditto.
15211 (class reverse_binop): Ditto.
15212 (class vfmacc): Ditto.
15213 (class vfnmsac): Ditto.
15214 (class vfmadd): Ditto.
15215 (class vfnmsub): Ditto.
15216 (class vfnmacc): Ditto.
15217 (class vfmsac): Ditto.
15218 (class vfnmadd): Ditto.
15219 (class vfmsub): Ditto.
15220 (class vfwmacc): Ditto.
15221 (class vfwnmacc): Ditto.
15222 (class vfwmsac): Ditto.
15223 (class vfwnmsac): Ditto.
15224 (class float_misc): Ditto.
15226 2023-08-24 Andrew Pinski <apinski@marvell.com>
15228 PR tree-optimization/111109
15229 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
15230 Add check to make sure cmp and icmp are inverse.
15232 2023-08-24 Andrew Pinski <apinski@marvell.com>
15234 PR tree-optimization/95929
15235 * match.pd (convert?(-a)): New pattern
15236 for 1bit integer types.
15238 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15241 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15243 * common/config/i386/cpuinfo.h (get_available_features):
15244 Add avx10_set and version and detect avx10.1.
15245 (cpu_indicator_init): Handle avx10.1-512.
15246 * common/config/i386/i386-common.cc
15247 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
15248 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
15249 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
15250 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
15251 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
15252 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
15254 * common/config/i386/i386-cpuinfo.h (enum processor_features):
15255 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
15256 FEATURE_AVX10_512BIT.
15257 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
15258 AVX10_512BIT, AVX10_1 and AVX10_1_512.
15259 * config/i386/constraints.md (Yk): Add AVX10_1.
15262 * config/i386/cpuid.h (bit_AVX10): New.
15263 (bit_AVX10_256): Ditto.
15264 (bit_AVX10_512): Ditto.
15265 * config/i386/i386-c.cc (ix86_target_macros_internal):
15266 Define AVX10_512BIT and AVX10_1.
15267 * config/i386/i386-isa.def
15268 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
15269 (AVX10_1): Add DEF_PTA(AVX10_1).
15270 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
15271 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
15273 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
15274 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
15275 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
15276 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
15277 (ix86_conditional_register_usage): Ditto.
15278 (ix86_hard_regno_mode_ok): Ditto.
15279 (ix86_rtx_costs): Ditto.
15280 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
15281 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
15283 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
15284 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
15285 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
15288 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15291 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15293 * common/config/i386/i386-common.cc
15294 (ix86_check_avx10): New function to check isa_flags and
15295 isa_flags_explicit to emit warning when AVX10 is enabled
15297 (ix86_check_avx512): New function to check isa_flags and
15298 isa_flags_explicit to emit warning when AVX512 is enabled
15300 (ix86_handle_option): Do not change the flags when warning
15302 * config/i386/driver-i386.cc (host_detect_local_cpu):
15303 Do not append -mno-avx10.1 for -march=native.
15305 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15308 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15310 * common/config/i386/i386-common.cc
15311 (ix86_check_avx10_vector_width): New function to check isa_flags
15312 to emit a warning when there is a conflict in AVX10 options for
15314 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
15315 * config/i386/driver-i386.cc (host_detect_local_cpu):
15316 Do not append -mno-avx10-max-512bit for -march=native.
15318 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15321 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15323 * config/i386/avx512vldqintrin.h: Remove target attribute.
15324 * config/i386/i386-builtin.def (BDESC):
15325 Add OPTION_MASK_ISA2_AVX10_1.
15326 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
15327 * config/i386/i386-expand.cc
15328 (ix86_check_builtin_isa_match): Ditto.
15329 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
15330 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
15331 and avx10_1_or_avx512vl.
15332 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
15333 (VF1_128_256VLDQ_AVX10_1): Ditto.
15334 (VI8_AVX512VLDQ_AVX10_1): Ditto.
15335 (<sse>_andnot<mode>3<mask_name>):
15336 Add TARGET_AVX10_1 and change isa attr from avx512dq to
15337 avx10_1_or_avx512dq.
15338 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
15339 avx512vl to avx10_1_or_avx512vl.
15340 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
15341 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
15342 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
15344 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
15346 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
15347 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
15348 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
15349 Add TARGET_AVX10_1.
15350 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
15351 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
15352 Remove target check.
15353 (avx512dq_mul<mode>3<mask_name>): Ditto.
15354 (*avx512dq_mul<mode>3<mask_name>): Ditto.
15355 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
15356 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
15357 Remove target check.
15358 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
15359 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
15360 Remove target check.
15361 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
15362 (mask_avx512vl_condition): Ditto.
15365 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15368 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15370 * config/i386/avx512vldqintrin.h: Remove target attribute.
15371 * config/i386/i386-builtin.def (BDESC):
15372 Add OPTION_MASK_ISA2_AVX10_1.
15373 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
15374 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
15375 (VI48_AVX512VLDQ_AVX10_1): Ditto.
15376 (VF2_AVX512VL): Remove.
15377 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
15378 Add TARGET_AVX10_1.
15379 (*<code><mode>3<mask_name>): Change isa attribute to
15380 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
15381 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
15382 to avx10_1_or_avx512vl.
15383 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
15384 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
15385 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
15386 Add TARGET_AVX10_1.
15387 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
15388 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
15389 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
15390 Add TARGET_AVX10_1.
15391 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
15392 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
15393 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
15394 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
15395 (float<floatunssuffix>v4div4sf2<mask_name>):
15396 Add TARGET_AVX10_1.
15397 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
15398 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
15399 (float<floatunssuffix>v2div2sf2): Ditto.
15400 (float<floatunssuffix>v2div2sf2_mask): Ditto.
15401 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
15402 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
15403 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
15404 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
15405 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
15406 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
15407 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
15408 Change when constraint is enabled.
15410 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15413 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15415 * config/i386/avx512vldqintrin.h: Remove target attribute.
15416 * config/i386/i386-builtin.def (BDESC):
15417 Add OPTION_MASK_ISA2_AVX10_1.
15418 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
15419 (VFH_AVX512VLDQ_AVX10_1): Ditto.
15420 (VF1_AVX512VLDQ_AVX10_1): Ditto.
15421 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
15422 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
15423 (vec_pack<floatprefix>_float_<mode>): Change iterator to
15424 VI8_AVX512VLDQ_AVX10_1. Remove target check.
15425 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
15426 VF1_AVX512VLDQ_AVX10_1. Remove target check.
15427 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
15428 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
15429 (avx512vl_vextractf128<mode>): Change iterator to
15430 VI48F_256_DQVL_AVX10_1. Remove target check.
15431 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
15432 (vec_extract_hi_<mode>): Ditto.
15433 (avx512vl_vinsert<mode>): Ditto.
15434 (vec_set_lo_<mode><mask_name>): Ditto.
15435 (vec_set_hi_<mode><mask_name>): Ditto.
15436 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
15437 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
15438 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
15439 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
15440 * config/i386/subst.md (mask_avx512dq_condition): Add
15442 (mask_scalar_merge): Ditto.
15444 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15447 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
15450 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
15453 2023-08-24 Richard Biener <rguenther@suse.de>
15456 * dwarf2out.cc (prune_unused_types_walk): Handle
15457 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
15458 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
15459 and DW_TAG_dynamic_type as to only output them when referenced.
15461 2023-08-24 liuhongt <hongtao.liu@intel.com>
15463 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
15466 2023-08-24 liuhongt <hongtao.liu@intel.com>
15468 * common/config/i386/i386-common.cc (processor_names): Add new
15469 member graniterapids-s and arrowlake-s.
15470 * config/i386/i386-options.cc (processor_alias_table): Update
15471 table with PROCESSOR_ARROWLAKE_S and
15472 PROCESSOR_GRANITERAPIDS_D.
15473 (m_GRANITERAPID_D): New macro.
15474 (m_ARROWLAKE_S): Ditto.
15475 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
15476 (processor_cost_table): Add icelake_cost for
15477 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
15478 PROCESSOR_ARROWLAKE_S.
15479 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
15481 * config/i386/i386.h (enum processor_type): Add new member
15482 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
15483 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
15484 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
15486 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
15488 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
15489 to help simplify code further.
15491 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
15493 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
15494 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
15495 Initialize using a range instead of value and edge.
15496 (phi_group::calculate_using_modifier): Use initializer value and
15497 process for relations after trying for iteration convergence.
15498 (phi_group::refine_using_relation): Use initializer range.
15499 (phi_group::dump): Rework the dump output.
15500 (phi_analyzer::process_phi): Allow multiple constant initilizers.
15501 Dump groups immediately as created.
15502 (phi_analyzer::dump): Tweak output.
15503 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
15504 (phi_group::initial_value): Delete.
15505 (phi_group::refine_using_relation): Adjust prototype.
15506 (phi_group::m_initial_value): Delete.
15507 (phi_group::m_initial_edge): Delete.
15508 (phi_group::m_vr): Use int_range_max.
15509 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
15511 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
15513 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
15514 no group was created.
15515 (phi_analyzer::process_phi): Do not create groups of one phi node.
15517 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
15519 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
15520 CODE, CMP_CODE and BIT_CODE arguments.
15521 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
15522 (aarch64_gen_ccmp_next): Likewise.
15523 * doc/tm.texi: Regenerated.
15525 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
15527 * coretypes.h (rtx_code): Add forward declaration.
15528 * rtl.h (rtx_code): Make compatible with forward declaration.
15530 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
15533 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
15534 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
15535 DWIH mode iterator. Disable (=&r,m,m) alternative for
15537 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
15538 alternative for 32-bit targets.
15540 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
15542 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
15543 appropriate type attribute.
15545 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
15547 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
15548 (*copysign<mode>_neg): Ditto.
15549 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
15550 (<optab><mode>2): Ditto.
15551 (cond_<optab><mode>): New.
15552 (cond_len_<optab><mode>): Ditto.
15553 * config/riscv/riscv-protos.h (enum insn_type): New.
15554 (expand_cond_len_unop): New helper func.
15555 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
15556 (expand_cond_len_unop): New helper func.
15558 2023-08-23 Jan Hubicka <jh@suse.cz>
15560 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
15561 (should_duplicate_loop_header_p): Fix return value for static exits.
15562 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
15564 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
15566 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
15567 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
15568 and update the final nest accordingly.
15570 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
15572 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
15573 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
15574 and update the final nest accordingly.
15576 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
15578 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
15579 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
15580 gvec_oprnds with auto_delete_vec.
15582 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15584 * config/riscv/riscv-vsetvl.cc
15585 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
15587 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15589 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
15591 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
15593 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15595 * config/riscv/vector.md: Add attribute.
15597 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15599 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
15600 (vector_infos_manager::all_same_ratio_p): Ditto.
15601 (vector_infos_manager::all_same_avl_p): Ditto.
15602 (pass_vsetvl::refine_vsetvls): Ditto.
15603 (pass_vsetvl::cleanup_vsetvls): Ditto.
15604 (pass_vsetvl::commit_vsetvls): Ditto.
15605 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
15606 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
15607 (pass_vsetvl::compute_probabilities): Ditto.
15609 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15611 * config/riscv/t-riscv: Add riscv-vsetvl.def
15613 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
15615 * config/riscv/riscv.opt: Add --param names
15616 riscv-autovec-preference and riscv-autovec-lmul
15618 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
15620 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
15622 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
15624 * tree-core.h (enum omp_clause_defaultmap_kind): Add
15625 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
15626 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
15627 * tree-pretty-print.cc (dump_omp_clause): Likewise.
15629 2023-08-22 Jakub Jelinek <jakub@redhat.com>
15632 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
15633 types aren't supported in C++.
15635 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15637 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
15638 * internal-fn.cc (fold_len_extract_direct): Ditto.
15639 (expand_fold_len_extract_optab_fn): Ditto.
15640 (direct_fold_len_extract_optab_supported_p): Ditto.
15641 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
15642 * optabs.def (OPTAB_D): Ditto.
15644 2023-08-22 Richard Biener <rguenther@suse.de>
15646 * tree-vect-stmts.cc (vectorizable_store): Do not bump
15647 DR_GROUP_STORE_COUNT here. Remove early out.
15648 (vect_transform_stmt): Only call vectorizable_store on
15649 the last element of an interleaving chain.
15651 2023-08-22 Richard Biener <rguenther@suse.de>
15653 PR tree-optimization/94864
15654 PR tree-optimization/94865
15655 PR tree-optimization/93080
15656 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
15657 for vector insertion from vector extraction.
15659 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15660 Kewen.Lin <linkw@linux.ibm.com>
15662 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
15663 (vectorizable_live_operation): Add live vectorization for length loop
15666 2023-08-22 David Malcolm <dmalcolm@redhat.com>
15669 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
15671 2023-08-22 Pan Li <pan2.li@intel.com>
15673 * config/riscv/riscv-vector-builtins-bases.cc
15674 (vfwredusum_frm_obj): New declaration.
15676 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15677 * config/riscv/riscv-vector-builtins-functions.def
15678 (vfwredusum_frm): New intrinsic function def.
15680 2023-08-21 David Faust <david.faust@oracle.com>
15682 * config/bpf/bpf.md (neg): Second operand must be a register.
15684 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
15686 * config/riscv/bitmanip.md: Added bitmanip type to insns
15687 that are missing types.
15689 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
15691 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
15694 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
15696 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
15697 Fix format specifier.
15699 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
15701 * value-range.cc (frange::union_nans): Return false if nothing
15703 (range_tests_floats): New test.
15705 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15707 PR tree-optimization/111048
15708 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
15710 (fold_vec_perm_cst): Remove workaround and again call
15711 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
15712 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
15714 2023-08-21 Richard Biener <rguenther@suse.de>
15716 PR tree-optimization/111082
15717 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
15718 pun operations that can overflow.
15720 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15722 * lcm.cc (compute_antinout_edge): Export as global use.
15723 (compute_earliest): Ditto.
15724 (compute_rev_insert_delete): Ditto.
15725 * lcm.h (compute_antinout_edge): Ditto.
15726 (compute_earliest): Ditto.
15728 2023-08-21 Richard Biener <rguenther@suse.de>
15730 PR tree-optimization/111070
15731 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
15732 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
15734 2023-08-21 Andrew Pinski <apinski@marvell.com>
15736 PR tree-optimization/111002
15737 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
15739 2023-08-21 liuhongt <hongtao.liu@intel.com>
15741 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
15743 * common/config/i386/i386-common.cc (alias_table): Support
15744 -march=gracemont as an alias of -march=alderlake.
15746 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
15748 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
15749 instead of src in the call to ix86_expand_sse_cmp.
15750 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
15751 force operands[1] to a register.
15752 (<any_extend:insn>v4hiv4si2): Ditto.
15753 (<any_extend:insn>v2siv2di2): Ditto.
15755 2023-08-20 Andrew Pinski <apinski@marvell.com>
15757 PR tree-optimization/111006
15758 PR tree-optimization/110986
15759 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
15761 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
15764 * Makefile.in: improve error message when /usr/include is
15767 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
15769 PR middle-end/111017
15770 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
15771 to expand_omp_build_cond for 'factor != 0' condition, resulting
15772 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
15774 2023-08-19 Guo Jie <guojie@loongson.cn>
15775 Lulu Cheng <chenglulu@loongson.cn>
15777 * config/loongarch/t-loongarch: Add loongarch-driver.h into
15778 TM_H. Add loongarch-def.h and loongarch-tune.h into
15781 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
15784 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
15785 Also handle V2QImode.
15786 (ix86_expand_sse_extend): New function.
15787 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
15788 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
15789 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
15790 (<any_extend:insn>v2hiv2si2): Ditto.
15791 (<any_extend:insn>v2qiv2hi2): Ditto.
15792 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
15793 (<any_extend:insn>v4hiv4si2): Ditto.
15794 (<any_extend:insn>v2siv2di2): Ditto.
15796 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
15799 * value-range.cc (irange::union_bitmask): Return FALSE if updated
15800 bitmask is semantically equivalent to the original mask.
15801 (irange::intersect_bitmask): Same.
15802 (irange::get_bitmask): Add comment.
15804 2023-08-18 Richard Biener <rguenther@suse.de>
15806 PR tree-optimization/111019
15807 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
15808 also scrap base and offset in case the ref is indirect.
15810 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
15812 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
15814 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
15816 PR bootstrap/111021
15817 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
15819 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
15821 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
15823 (vectorizable_store): ... here.
15825 2023-08-18 Richard Biener <rguenther@suse.de>
15827 PR tree-optimization/111048
15828 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
15831 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
15834 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
15837 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
15839 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
15840 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
15841 and update the final nest accordingly.
15843 2023-08-18 Andrew Pinski <apinski@marvell.com>
15845 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
15846 cond_len_neg and cond_len_one_cmpl.
15848 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
15850 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
15851 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
15852 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
15853 (*local_pic_load_32d<ANYF:mode>): Ditto.
15854 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
15855 (*local_pic_store<ANYF:mode>): Ditto.
15856 (*local_pic_store<ANYLSF:mode>): Ditto.
15857 (*local_pic_store_32d<ANYF:mode>): Ditto.
15858 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
15860 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
15861 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15863 * config/riscv/predicates.md (vector_const_0_operand): New.
15864 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
15866 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
15868 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
15871 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
15873 PR tree-optimization/111009
15874 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
15876 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
15878 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
15879 slots_num initialization from here ...
15880 (lra_spill): ... to here before the 1st call of
15881 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
15882 fp->sp elimination.
15884 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
15887 * doc/invoke.texi (Option Summary): Mention
15888 -Wcompare-distinct-pointer-types under `Warning Options'.
15889 (Warning Options): Document -Wcompare-distinct-pointer-types.
15891 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
15893 * recog.cc (memory_address_addr_space_p): Mark possibly unused
15894 argument as unused.
15896 2023-08-17 Richard Biener <rguenther@suse.de>
15898 PR tree-optimization/111039
15899 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
15900 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
15902 2023-08-17 Alex Coplan <alex.coplan@arm.com>
15904 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
15906 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
15909 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
15910 `naked' function attribute.
15911 (bpf_warn_func_return): New function.
15912 (TARGET_WARN_FUNC_RETURN): Define.
15913 (bpf_expand_prologue): Add preventive comment.
15914 (bpf_expand_epilogue): Likewise.
15915 * doc/extend.texi (BPF Function Attributes): Document the `naked'
15916 function attribute.
15918 2023-08-17 Richard Biener <rguenther@suse.de>
15920 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
15921 !needs_fold_left_reduction_p to decide whether we can
15922 handle the reduction with association.
15923 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
15924 reductions perform all arithmetic in an unsigned type.
15926 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
15928 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
15930 * configure: Regenerate.
15932 2023-08-17 Pan Li <pan2.li@intel.com>
15934 * config/riscv/riscv-vector-builtins-bases.cc
15935 (widen_freducop): Add frm_opt_type template arg.
15936 (vfwredosum_frm_obj): New declaration.
15938 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15939 * config/riscv/riscv-vector-builtins-functions.def
15940 (vfwredosum_frm): New intrinsic function def.
15942 2023-08-17 Pan Li <pan2.li@intel.com>
15944 * config/riscv/riscv-vector-builtins-bases.cc
15945 (vfredosum_frm_obj): New declaration.
15947 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15948 * config/riscv/riscv-vector-builtins-functions.def
15949 (vfredosum_frm): New intrinsic function def.
15951 2023-08-17 Pan Li <pan2.li@intel.com>
15953 * config/riscv/riscv-vector-builtins-bases.cc
15954 (class freducop): Add frm_op_type template arg.
15955 (vfredusum_frm_obj): New declaration.
15957 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15958 * config/riscv/riscv-vector-builtins-functions.def
15959 (vfredusum_frm): New intrinsic function def.
15960 * config/riscv/riscv-vector-builtins-shapes.cc
15961 (struct reduc_alu_frm_def): New class for frm shape.
15962 (SHAPE): New declaration.
15963 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
15965 2023-08-17 Pan Li <pan2.li@intel.com>
15967 * config/riscv/riscv-vector-builtins-bases.cc
15968 (class vfncvt_f): Add frm_op_type template arg.
15969 (vfncvt_f_frm_obj): New declaration.
15971 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15972 * config/riscv/riscv-vector-builtins-functions.def
15973 (vfncvt_f_frm): New intrinsic function def.
15975 2023-08-17 Pan Li <pan2.li@intel.com>
15977 * config/riscv/riscv-vector-builtins-bases.cc
15978 (vfncvt_xu_frm_obj): New declaration.
15980 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15981 * config/riscv/riscv-vector-builtins-functions.def
15982 (vfncvt_xu_frm): New intrinsic function def.
15984 2023-08-17 Pan Li <pan2.li@intel.com>
15986 * config/riscv/riscv-vector-builtins-bases.cc
15987 (class vfncvt_x): Add frm_op_type template arg.
15988 (BASE): New declaration.
15989 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15990 * config/riscv/riscv-vector-builtins-functions.def
15991 (vfncvt_x_frm): New intrinsic function def.
15992 * config/riscv/riscv-vector-builtins-shapes.cc
15993 (struct narrow_alu_frm_def): New shape function for frm.
15994 (SHAPE): New declaration.
15995 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
15997 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15999 * config/i386/avx512vldqintrin.h: Remove target attribute.
16000 * config/i386/i386-builtin.def (BDESC):
16001 Add OPTION_MASK_ISA2_AVX10_1.
16002 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
16003 (VFH_AVX512VLDQ_AVX10_1): Ditto.
16004 (VF1_AVX512VLDQ_AVX10_1): Ditto.
16005 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
16006 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
16007 (vec_pack<floatprefix>_float_<mode>): Change iterator to
16008 VI8_AVX512VLDQ_AVX10_1. Remove target check.
16009 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
16010 VF1_AVX512VLDQ_AVX10_1. Remove target check.
16011 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
16012 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
16013 (avx512vl_vextractf128<mode>): Change iterator to
16014 VI48F_256_DQVL_AVX10_1. Remove target check.
16015 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
16016 (vec_extract_hi_<mode>): Ditto.
16017 (avx512vl_vinsert<mode>): Ditto.
16018 (vec_set_lo_<mode><mask_name>): Ditto.
16019 (vec_set_hi_<mode><mask_name>): Ditto.
16020 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
16021 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
16022 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
16023 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
16024 * config/i386/subst.md (mask_avx512dq_condition): Add
16026 (mask_scalar_merge): Ditto.
16028 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16030 * config/i386/avx512vldqintrin.h: Remove target attribute.
16031 * config/i386/i386-builtin.def (BDESC):
16032 Add OPTION_MASK_ISA2_AVX10_1.
16033 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
16034 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
16035 (VI48_AVX512VLDQ_AVX10_1): Ditto.
16036 (VF2_AVX512VL): Remove.
16037 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
16038 Add TARGET_AVX10_1.
16039 (*<code><mode>3<mask_name>): Change isa attribute to
16040 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
16041 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
16042 to avx10_1_or_avx512vl.
16043 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
16044 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
16045 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
16046 Add TARGET_AVX10_1.
16047 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
16048 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
16049 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
16050 Add TARGET_AVX10_1.
16051 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
16052 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
16053 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
16054 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
16055 (float<floatunssuffix>v4div4sf2<mask_name>):
16056 Add TARGET_AVX10_1.
16057 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
16058 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
16059 (float<floatunssuffix>v2div2sf2): Ditto.
16060 (float<floatunssuffix>v2div2sf2_mask): Ditto.
16061 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
16062 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
16063 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
16064 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
16065 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
16066 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
16067 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
16068 Change when constraint is enabled.
16070 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16073 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
16074 (second_sew_less_than_first_sew_p): Fix bug.
16075 (first_sew_less_than_second_sew_p): Ditto.
16077 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16079 * config/i386/avx512vldqintrin.h: Remove target attribute.
16080 * config/i386/i386-builtin.def (BDESC):
16081 Add OPTION_MASK_ISA2_AVX10_1.
16082 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
16083 * config/i386/i386-expand.cc
16084 (ix86_check_builtin_isa_match): Ditto.
16085 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
16086 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
16087 and avx10_1_or_avx512vl.
16088 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
16089 (VF1_128_256VLDQ_AVX10_1): Ditto.
16090 (VI8_AVX512VLDQ_AVX10_1): Ditto.
16091 (<sse>_andnot<mode>3<mask_name>):
16092 Add TARGET_AVX10_1 and change isa attr from avx512dq to
16093 avx10_1_or_avx512dq.
16094 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
16095 avx512vl to avx10_1_or_avx512vl.
16096 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
16097 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
16098 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
16100 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
16102 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
16103 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
16104 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
16105 Add TARGET_AVX10_1.
16106 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
16107 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
16108 Remove target check.
16109 (avx512dq_mul<mode>3<mask_name>): Ditto.
16110 (*avx512dq_mul<mode>3<mask_name>): Ditto.
16111 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
16112 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
16113 Remove target check.
16114 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
16115 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
16116 Remove target check.
16117 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
16118 (mask_avx512vl_condition): Ditto.
16121 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16123 * common/config/i386/i386-common.cc
16124 (ix86_check_avx10_vector_width): New function to check isa_flags
16125 to emit a warning when there is a conflict in AVX10 options for
16127 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
16128 * config/i386/driver-i386.cc (host_detect_local_cpu):
16129 Do not append -mno-avx10-max-512bit for -march=native.
16131 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16133 * common/config/i386/i386-common.cc
16134 (ix86_check_avx10): New function to check isa_flags and
16135 isa_flags_explicit to emit warning when AVX10 is enabled
16137 (ix86_check_avx512): New function to check isa_flags and
16138 isa_flags_explicit to emit warning when AVX512 is enabled
16140 (ix86_handle_option): Do not change the flags when warning
16142 * config/i386/driver-i386.cc (host_detect_local_cpu):
16143 Do not append -mno-avx10.1 for -march=native.
16145 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
16147 * common/config/i386/cpuinfo.h (get_available_features):
16148 Add avx10_set and version and detect avx10.1.
16149 (cpu_indicator_init): Handle avx10.1-512.
16150 * common/config/i386/i386-common.cc
16151 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
16152 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
16153 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
16154 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
16155 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
16156 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
16158 * common/config/i386/i386-cpuinfo.h (enum processor_features):
16159 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
16160 FEATURE_AVX10_512BIT.
16161 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
16162 AVX10_512BIT, AVX10_1 and AVX10_1_512.
16163 * config/i386/constraints.md (Yk): Add AVX10_1.
16166 * config/i386/cpuid.h (bit_AVX10): New.
16167 (bit_AVX10_256): Ditto.
16168 (bit_AVX10_512): Ditto.
16169 * config/i386/i386-c.cc (ix86_target_macros_internal):
16170 Define AVX10_512BIT and AVX10_1.
16171 * config/i386/i386-isa.def
16172 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
16173 (AVX10_1): Add DEF_PTA(AVX10_1).
16174 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
16175 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
16177 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
16178 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
16179 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
16180 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
16181 (ix86_conditional_register_usage): Ditto.
16182 (ix86_hard_regno_mode_ok): Ditto.
16183 (ix86_rtx_costs): Ditto.
16184 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
16185 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
16187 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
16188 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
16189 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
16192 2023-08-17 Sergei Trofimovich <siarheit@google.com>
16194 * flag-types.h (vrp_mode): Remove unused.
16196 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
16198 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
16201 2023-08-17 Andrew Pinski <apinski@marvell.com>
16203 * internal-fn.def (COND_NOT): New internal function.
16204 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
16206 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
16207 into conditional not.
16208 * optabs.def (cond_one_cmpl): New optab.
16209 (cond_len_one_cmpl): Likewise.
16211 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
16213 PR rtl-optimization/110254
16214 * ira-color.cc (improve_allocation): Update array
16215 allocated_hard_reg_p.
16217 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
16219 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
16220 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
16221 (lra_update_fp2sp_elimination): Ditto.
16222 (update_reg_eliminate): Adjust spill_pseudos call.
16223 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
16224 in lra_update_fp2sp_elimination.
16226 2023-08-16 Richard Ball <richard.ball@arm.com>
16228 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
16229 * config/aarch64/aarch64-tune.md: Regenerate.
16230 * doc/invoke.texi: Document Cortex-A720 CPU.
16232 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
16234 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
16235 Implement expander.
16236 (<u>avg<v_double_trunc>3_ceil): Ditto.
16237 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
16240 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
16242 * internal-fn.cc (vec_extract_direct): Change type argument
16244 (expand_vec_extract_optab_fn): Call convert_optab_fn.
16245 (direct_vec_extract_optab_supported_p): Use
16246 convert_optab_supported_p.
16248 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16249 Richard Sandiford <richard.sandiford@arm.com>
16251 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
16252 (valid_mask_for_fold_vec_perm_cst_p): New function.
16253 (fold_vec_perm_cst): Likewise.
16254 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
16255 (test_fold_vec_perm_cst): New namespace.
16256 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
16257 (test_fold_vec_perm_cst::validate_res): Likewise.
16258 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
16259 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
16260 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
16261 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
16262 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
16263 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
16264 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
16265 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
16266 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
16267 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
16268 (test_fold_vec_perm_cst::test): Likewise.
16269 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
16271 2023-08-16 Pan Li <pan2.li@intel.com>
16273 * config/riscv/riscv-vector-builtins-bases.cc
16274 (BASE): New declaration.
16275 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16276 * config/riscv/riscv-vector-builtins-functions.def
16277 (vfwcvt_xu_frm): New intrinsic function def.
16279 2023-08-16 Pan Li <pan2.li@intel.com>
16281 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
16283 2023-08-16 Pan Li <pan2.li@intel.com>
16285 * config/riscv/riscv-vector-builtins-bases.cc
16286 (BASE): New declaration.
16287 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16288 * config/riscv/riscv-vector-builtins-functions.def
16289 (vfwcvt_x_frm): New intrinsic function def.
16291 2023-08-16 Pan Li <pan2.li@intel.com>
16293 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
16294 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16295 * config/riscv/riscv-vector-builtins-functions.def
16296 (vfcvt_f_frm): New intrinsic function def.
16298 2023-08-16 Pan Li <pan2.li@intel.com>
16300 * config/riscv/riscv-vector-builtins-bases.cc
16301 (BASE): New declaration.
16302 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16303 * config/riscv/riscv-vector-builtins-functions.def
16304 (vfcvt_xu_frm): New intrinsic function def..
16306 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
16309 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
16310 extract when the element is 7 on BE while 8 on LE for byte or 3 on
16311 BE while 4 on LE for halfword.
16313 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
16316 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
16317 for V8HI and V16QI.
16318 (vsx_extract_v4si): New expand for V4SI extraction.
16319 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
16320 word 1 from BE order.
16321 (*mfvsrwz): New insn pattern for mfvsrwz.
16322 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
16323 word 1 from BE order.
16324 (*vsx_extract_si): Remove.
16325 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
16328 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16330 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
16332 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
16333 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
16334 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
16335 (expand_lanes_load_store): New function.
16336 * config/riscv/vector-iterators.md: New iterator.
16338 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16340 * internal-fn.cc (internal_load_fn_p): Apply
16341 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
16342 (internal_store_fn_p): Ditto.
16343 (internal_fn_len_index): Ditto.
16344 (internal_fn_mask_index): Ditto.
16345 (internal_fn_stored_value_index): Ditto.
16346 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
16347 (vect_load_lanes_supported): Ditto.
16348 * tree-vect-loop.cc: Ditto.
16349 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
16350 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
16351 (get_group_load_store_type): Ditto.
16352 (vectorizable_store): Ditto.
16353 (vectorizable_load): Ditto.
16354 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
16355 (vect_load_lanes_supported): Ditto.
16357 2023-08-16 Pan Li <pan2.li@intel.com>
16359 * config/riscv/riscv-vector-builtins-bases.cc
16360 (enum frm_op_type): New type for frm.
16361 (BASE): New declaration.
16362 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16363 * config/riscv/riscv-vector-builtins-functions.def
16364 (vfcvt_x_frm): New intrinsic function def.
16366 2023-08-16 liuhongt <hongtao.liu@intel.com>
16368 * config/i386/i386-builtins.cc
16369 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
16370 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
16371 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
16372 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
16373 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
16374 for use_scatter_8parts
16375 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
16376 (TARGET_USE_GATHER_8PARTS): .. this.
16377 (TARGET_USE_SCATTER): Rename to ..
16378 (TARGET_USE_SCATTER_8PARTS): .. this.
16379 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
16380 (X86_TUNE_USE_GATHER_8PARTS): .. this.
16381 (X86_TUNE_USE_SCATTER): Rename to
16382 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
16383 * config/i386/i386.opt: Add new options mgather, mscatter.
16385 2023-08-16 liuhongt <hongtao.liu@intel.com>
16387 * config/i386/i386-options.cc (m_GDS): New macro.
16388 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
16390 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
16391 (X86_TUNE_USE_GATHER): Ditto.
16393 2023-08-16 liuhongt <hongtao.liu@intel.com>
16395 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
16396 vmovsd when moving DFmode between SSE_REGS.
16397 (movhi_internal): Generate vmovdqa instead of vmovsh when
16398 moving HImode between SSE_REGS.
16399 (mov<mode>_internal): Use vmovaps instead of vmovsh when
16400 moving HF/BFmode between SSE_REGS.
16402 2023-08-15 David Faust <david.faust@oracle.com>
16404 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
16406 2023-08-15 David Faust <david.faust@oracle.com>
16409 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
16410 for any mode 32-bits or smaller, not just SImode.
16412 2023-08-15 Martin Jambor <mjambor@suse.cz>
16416 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
16417 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
16418 (ipcp_transform_function): Do not deallocate transformation info.
16419 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
16421 (vn_reference_lookup_2): When hitting default-def vuse, query
16422 IPA-CP transformation info for any known constants.
16424 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
16425 Thomas Schwinge <thomas@codesourcery.com>
16427 * gimplify.cc (oacc_region_type_name): New function.
16428 (oacc_default_clause): If no 'default' clause appears on this
16429 compute construct, see if one appears on a lexically containing
16431 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
16432 ctx->oacc_default_clause_ctx to current context.
16434 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16437 * config/riscv/predicates.md: Fix predicate.
16439 2023-08-15 Richard Biener <rguenther@suse.de>
16441 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
16442 slp_inst_kind_ctor handling.
16443 (vect_analyze_slp): Simplify.
16444 (vect_build_slp_instance): Dump when we analyze a CTOR.
16445 (vect_slp_check_for_constructors): Rename to ...
16446 (vect_slp_check_for_roots): ... this. Register a
16447 slp_root for CONSTRUCTORs instead of shoving them to
16448 the set of grouped stores.
16449 (vect_slp_analyze_bb_1): Adjust.
16451 2023-08-15 Richard Biener <rguenther@suse.de>
16453 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
16455 (_slp_instance::remain_defs): ... this.
16456 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
16457 (SLP_INSTANCE_REMAIN_DEFS): ... this.
16458 (slp_root::remain): New.
16459 (slp_root::slp_root): Adjust.
16460 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
16461 (vect_build_slp_instance): Get extra remain parameter,
16462 adjust former handling of a cut off stmt.
16463 (vect_analyze_slp_instance): Adjust.
16464 (vect_analyze_slp): Likewise.
16465 (_bb_vec_info::~_bb_vec_info): Likewise.
16466 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
16467 (vect_slp_check_for_constructors): Handle non-internal
16468 defs as remain defs of a reduction.
16469 (vectorize_slp_instance_root_stmt): Adjust.
16471 2023-08-15 Richard Biener <rguenther@suse.de>
16473 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
16474 (canonicalize_loop_induction_variables): Use find_loop_location.
16476 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
16478 PR bootstrap/111021
16479 * config/cris/cris-protos.h: Revert recent change.
16480 * config/cris/cris.cc (cris_legitimate_address_p): Remove
16481 code_helper unused parameter.
16482 (cris_legitimate_address_p_hook): New wrapper function.
16483 (TARGET_LEGITIMATE_ADDRESS_P): Change to
16484 cris_legitimate_address_p_hook.
16486 2023-08-15 Richard Biener <rguenther@suse.de>
16488 PR tree-optimization/110963
16489 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
16490 a PHI node when the expression is available on all edges
16491 and we insert at most one copy from a constant.
16493 2023-08-15 Richard Biener <rguenther@suse.de>
16495 PR tree-optimization/110991
16496 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
16497 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
16498 that will end up constant.
16500 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
16502 PR bootstrap/111021
16503 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
16505 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
16507 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
16508 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
16509 and update the final nest accordingly.
16511 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
16513 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
16516 2023-08-15 Pan Li <pan2.li@intel.com>
16518 * mode-switching.cc (create_pre_exit): Add SET insn check.
16520 2023-08-15 Pan Li <pan2.li@intel.com>
16522 * config/riscv/riscv-vector-builtins-bases.cc
16523 (class vfrec7_frm): New class for frm.
16524 (vfrec7_frm_obj): New declaration.
16526 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16527 * config/riscv/riscv-vector-builtins-functions.def
16528 (vfrec7_frm): New intrinsic function definition.
16529 * config/riscv/vector-iterators.md
16530 (VFMISC): Remove VFREC7.
16532 (float_insn_type): Ditto.
16533 (VFMISC_FRM): New int iterator.
16534 (misc_frm_op): New op for frm.
16535 (float_frm_insn_type): New type for frm.
16536 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
16537 New pattern for misc frm.
16539 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
16541 * lra-constraints.cc (curr_insn_transform): Process output stack
16542 pointer reloads before emitting reload insns.
16544 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
16547 * doc/invoke.texi: Add documentation of
16548 fanalyzer-show-events-in-system-headers
16550 2023-08-14 Jan Hubicka <jh@suse.cz>
16552 PR gcov-profile/110988
16553 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
16555 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
16557 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
16558 Enable compressed builtins when ZC* extensions enabled.
16559 * config/riscv/riscv-shorten-memrefs.cc:
16560 Enable shorten_memrefs pass when ZC* extensions enabled.
16561 * config/riscv/riscv.cc (riscv_compressed_reg_p):
16562 Enable compressible registers when ZC* extensions enabled.
16563 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
16564 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
16565 (riscv_first_stack_step): Allow compression of the register saves
16566 without adding extra instructions.
16567 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
16568 to 16 bits when ZC* extensions enabled.
16570 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
16572 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
16573 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
16578 (MASK_ZCMP): Ditto.
16579 (MASK_ZCMT): Ditto.
16580 (TARGET_ZCA): New target.
16581 (TARGET_ZCB): Ditto.
16582 (TARGET_ZCE): Ditto.
16583 (TARGET_ZCF): Ditto.
16584 (TARGET_ZCD): Ditto.
16585 (TARGET_ZCMP): Ditto.
16586 (TARGET_ZCMT): Ditto.
16587 * config/riscv/riscv.opt: New target variable.
16589 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16592 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
16594 * genrecog.cc (print_nonbool_test): Fix type error of
16595 switch (SUBREG_BYTE (op))'.
16597 2023-08-14 Richard Biener <rguenther@suse.de>
16599 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
16601 2023-08-14 Pan Li <pan2.li@intel.com>
16603 * config/riscv/riscv-vector-builtins-bases.cc
16604 (class unop_frm): New class for frm.
16605 (vfsqrt_frm_obj): New declaration.
16607 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16608 * config/riscv/riscv-vector-builtins-functions.def
16609 (vfsqrt_frm): New intrinsic function definition.
16611 2023-08-14 Pan Li <pan2.li@intel.com>
16613 * config/riscv/riscv-vector-builtins-bases.cc
16614 (class vfwnmsac_frm): New class for frm.
16615 (vfwnmsac_frm_obj): New declaration.
16617 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16618 * config/riscv/riscv-vector-builtins-functions.def
16619 (vfwnmsac_frm): New intrinsic function definition.
16621 2023-08-14 Pan Li <pan2.li@intel.com>
16623 * config/riscv/riscv-vector-builtins-bases.cc
16624 (class vfwmsac_frm): New class for frm.
16625 (vfwmsac_frm_obj): New declaration.
16627 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16628 * config/riscv/riscv-vector-builtins-functions.def
16629 (vfwmsac_frm): New intrinsic function definition.
16631 2023-08-14 Pan Li <pan2.li@intel.com>
16633 * config/riscv/riscv-vector-builtins-bases.cc
16634 (class vfwnmacc_frm): New class for frm.
16635 (vfwnmacc_frm_obj): New declaration.
16637 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16638 * config/riscv/riscv-vector-builtins-functions.def
16639 (vfwnmacc_frm): New intrinsic function definition.
16641 2023-08-14 Cui, Lili <lili.cui@intel.com>
16643 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
16646 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16648 * config/mmix/predicates.md (mmix_address_operand): Use
16649 lra_in_progress, not reload_in_progress.
16651 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16653 * config/mmix/mmix.cc: Re-enable LRA.
16655 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16657 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
16658 when lra_in_progress.
16660 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16662 * config/mmix/mmix.cc: Disable LRA for MMIX.
16664 2023-08-14 Pan Li <pan2.li@intel.com>
16666 * config/riscv/riscv-vector-builtins-bases.cc
16667 (class vfwmacc_frm): New class for vfwmacc frm.
16668 (vfwmacc_frm_obj): New declaration.
16670 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16671 * config/riscv/riscv-vector-builtins-functions.def
16672 (vfwmacc_frm): Function definition for vfwmacc.
16673 * config/riscv/riscv-vector-builtins.cc
16674 (function_expander::use_widen_ternop_insn): Add frm support.
16676 2023-08-14 Pan Li <pan2.li@intel.com>
16678 * config/riscv/riscv-vector-builtins-bases.cc
16679 (class vfnmsub_frm): New class for vfnmsub frm.
16680 (vfnmsub_frm): New declaration.
16682 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16683 * config/riscv/riscv-vector-builtins-functions.def
16684 (vfnmsub_frm): New function declaration.
16686 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
16688 * lra-constraints.cc (curr_insn_transform): Set done_p up and
16689 check it on true after processing output stack pointer reload.
16691 2023-08-12 Jakub Jelinek <jakub@redhat.com>
16693 * Makefile.in (USER_H): Add stdckdint.h.
16694 * ginclude/stdckdint.h: New file.
16696 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16699 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
16701 2023-08-12 Patrick Palka <ppalka@redhat.com>
16703 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
16704 Delimit output with braces.
16706 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16709 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
16711 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16713 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
16714 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
16715 * config/riscv/vector.md: Ditto.
16717 2023-08-11 David Malcolm <dmalcolm@redhat.com>
16720 * doc/analyzer.texi (__analyzer_get_strlen): New.
16721 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
16723 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
16725 * config/rx/rx.md (subdi3): Fix test for borrow.
16727 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16729 PR middle-end/110989
16730 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
16731 (vectorizable_load): Ditto.
16733 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
16735 * config/bpf/bpf.md (allocate_stack): Define.
16736 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
16737 stack pointer register.
16738 (FIXED_REGISTERS): Adjust accordingly.
16739 (CALL_USED_REGISTERS): Likewise.
16740 (REG_CLASS_CONTENTS): Likewise.
16741 (REGISTER_NAMES): Likewise.
16742 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
16743 space for callee-saved registers.
16744 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
16745 (bpf_expand_epilogue): Do not restore callee-saved registers in
16748 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
16750 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
16751 about too many arguments if function is always inlined.
16753 2023-08-11 Patrick Palka <ppalka@redhat.com>
16755 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
16756 Don't call component_ref_field_offset if the RHS isn't a decl.
16758 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
16760 PR bootstrap/110646
16761 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
16763 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
16765 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
16766 (process_alt_operands): Set the flag.
16767 (curr_insn_transform): Modify stack pointer offsets if output
16768 stack pointer reload is generated.
16770 2023-08-11 Joseph Myers <joseph@codesourcery.com>
16772 * configure: Regenerate.
16774 2023-08-11 Richard Biener <rguenther@suse.de>
16776 PR tree-optimization/110979
16777 * tree-vect-loop.cc (vectorizable_reduction): For
16778 FOLD_LEFT_REDUCTION without target support make sure
16779 we don't need to honor signed zeros and sign dependent rounding.
16781 2023-08-11 Richard Biener <rguenther@suse.de>
16783 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
16784 subgraph entries. Dump the used vector size based on the
16785 SLP subgraph entry root vector type.
16787 2023-08-11 Pan Li <pan2.li@intel.com>
16789 * config/riscv/riscv-vector-builtins-bases.cc
16790 (class vfmsub_frm): New class for vfmsub frm.
16791 (vfmsub_frm): New declaration.
16793 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16794 * config/riscv/riscv-vector-builtins-functions.def
16795 (vfmsub_frm): New function declaration.
16797 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16799 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
16800 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
16801 (expand_partial_store_optab_fn): Ditto.
16802 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
16803 (MASK_LEN_STORE_LANES): Ditto.
16804 * optabs.def (OPTAB_CD): Ditto.
16806 2023-08-11 Pan Li <pan2.li@intel.com>
16808 * config/riscv/riscv-vector-builtins-bases.cc
16809 (class vfnmadd_frm): New class for vfnmadd frm.
16810 (vfnmadd_frm): New declaration.
16812 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16813 * config/riscv/riscv-vector-builtins-functions.def
16814 (vfnmadd_frm): New function declaration.
16816 2023-08-11 Drew Ross <drross@redhat.com>
16817 Jakub Jelinek <jakub@redhat.com>
16819 PR tree-optimization/109938
16820 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
16822 2023-08-11 Pan Li <pan2.li@intel.com>
16824 * config/riscv/riscv-vector-builtins-bases.cc
16825 (class vfmadd_frm): New class for vfmadd frm.
16826 (vfmadd_frm_obj): New declaration.
16828 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16829 * config/riscv/riscv-vector-builtins-functions.def
16830 (vfmadd_frm): New function definition.
16832 2023-08-11 Pan Li <pan2.li@intel.com>
16834 * config/riscv/riscv-vector-builtins-bases.cc
16835 (class vfnmsac_frm): New class for vfnmsac frm.
16836 (vfnmsac_frm_obj): New declaration.
16838 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16839 * config/riscv/riscv-vector-builtins-functions.def
16840 (vfnmsac_frm): New function definition.
16842 2023-08-11 Jakub Jelinek <jakub@redhat.com>
16844 * doc/extend.texi (Typeof): Document typeof_unqual
16845 and __typeof_unqual__.
16847 2023-08-11 Andrew Pinski <apinski@marvell.com>
16849 PR tree-optimization/110954
16850 * generic-match-head.cc (bitwise_inverted_equal_p): Add
16851 wascmp argument and set it accordingly.
16852 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
16853 wascmp argument to the macro.
16854 (gimple_bitwise_inverted_equal_p): Add
16855 wascmp argument and set it accordingly.
16856 * match.pd (`a & ~a`, `a ^| ~a`): Update call
16857 to bitwise_inverted_equal_p and handle wascmp case.
16858 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
16859 call to bitwise_inverted_equal_p and check to see
16860 if was !wascmp or if precision was 1.
16862 2023-08-11 Martin Uecker <uecker@tugraz.at>
16865 * doc/invoke.texi: Update.
16867 2023-08-11 Pan Li <pan2.li@intel.com>
16869 * config/riscv/riscv-vector-builtins-bases.cc
16870 (class vfmsac_frm): New class for vfmsac frm.
16871 (vfmsac_frm_obj): New declaration.
16873 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16874 * config/riscv/riscv-vector-builtins-functions.def
16875 (vfmsac_frm): New function definition
16877 2023-08-10 Jan Hubicka <jh@suse.cz>
16879 PR middle-end/110923
16880 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
16882 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
16884 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
16885 dependent on 'a' extension.
16886 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
16887 (TARGET_ZTSO): New target.
16888 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
16890 (riscv_memmodel_needs_amo_release): Add Ztso case.
16891 (riscv_print_operand): Add Ztso case for LR/SC annotations.
16892 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
16893 * config/riscv/riscv.opt: Add Ztso target variable.
16894 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
16895 Ztso specific insn.
16896 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
16897 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
16898 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
16899 specific load/store/fence mappings.
16900 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
16901 specific load/store/fence mappings.
16903 2023-08-10 Jan Hubicka <jh@suse.cz>
16905 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
16908 2023-08-10 Jan Hubicka <jh@suse.cz>
16910 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
16912 2023-08-10 Jan Hubicka <jh@suse.cz>
16914 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
16915 handling of undefined values.
16917 2023-08-10 Jakub Jelinek <jakub@redhat.com>
16920 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
16921 return virtual phis and return NULL if there is a virtual phi
16922 where the arguments from E0 and E1 edges aren't equal.
16924 2023-08-10 Richard Biener <rguenther@suse.de>
16926 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
16927 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
16929 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16932 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
16934 2023-08-10 Pan Li <pan2.li@intel.com>
16936 * config/riscv/riscv-vector-builtins-bases.cc
16937 (class vfnmacc_frm): New class for vfnmacc.
16938 (vfnmacc_frm_obj): New declaration.
16940 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16941 * config/riscv/riscv-vector-builtins-functions.def
16942 (vfnmacc_frm): New function definition.
16944 2023-08-10 Pan Li <pan2.li@intel.com>
16946 * config/riscv/riscv-vector-builtins-bases.cc
16947 (class vfmacc_frm): New class for vfmacc frm.
16948 (vfmacc_frm_obj): New declaration.
16950 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16951 * config/riscv/riscv-vector-builtins-functions.def
16952 (vfmacc_frm): New function definition.
16954 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16957 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
16959 2023-08-10 Richard Biener <rguenther@suse.de>
16961 * tree-vectorizer.h (vectorizable_live_operation): Remove
16962 gimple_stmt_iterator * argument.
16963 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
16964 Adjust plumbing around vect_get_loop_mask.
16965 (vect_analyze_loop_operations): Adjust.
16966 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
16967 (vect_bb_slp_mark_live_stmts): Likewise.
16968 (vect_schedule_slp_node): Likewise.
16969 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
16970 Remove gimple_stmt_iterator * argument.
16971 (vect_transform_stmt): Adjust.
16973 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16975 * config/riscv/vector-iterators.md: Add missing modes.
16977 2023-08-10 Jakub Jelinek <jakub@redhat.com>
16980 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
16981 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
16983 2023-08-10 Jakub Jelinek <jakub@redhat.com>
16986 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
16987 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
16990 2023-08-10 liuhongt <hongtao.liu@intel.com>
16993 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
16994 sanitize upper part of V4HFmode register with
16995 -fno-trapping-math.
16996 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
16997 (<divv4hf3): Ditto.
16998 (<insn>v2hf3): Ditto.
17000 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
17001 register with -fno-trapping-math.
17003 2023-08-10 Pan Li <pan2.li@intel.com>
17004 Kito Cheng <kito.cheng@sifive.com>
17006 * config/riscv/riscv-protos.h
17007 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
17008 (get_frm_mode): New declaration.
17009 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
17010 * config/riscv/riscv-vector-builtins.cc
17011 (function_expander::use_ternop_insn): Take care of frm reg.
17012 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
17013 (riscv_emit_frm_mode_set): Ditto.
17014 (riscv_emit_mode_set): Ditto.
17015 (riscv_frm_adjust_mode_after_call): Ditto.
17016 (riscv_frm_mode_needed): Ditto.
17017 (riscv_frm_mode_after): Ditto.
17018 (riscv_mode_entry): Ditto.
17019 (riscv_mode_exit): Ditto.
17020 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
17021 * config/riscv/vector.md
17022 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
17023 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
17025 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17027 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
17028 incorrect anticipate info.
17030 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
17032 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
17033 Remove 'Zve32d' from the version list.
17035 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
17037 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
17038 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
17039 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
17040 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17042 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
17044 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
17045 (mem_shadd_or_shadd_rtx_p): New function.
17047 2023-08-09 Andrew Pinski <apinski@marvell.com>
17049 PR tree-optimization/110937
17050 PR tree-optimization/100798
17051 * match.pd (`a ? ~b : b`): Handle this
17054 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
17056 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
17058 2023-08-09 Richard Ball <richard.ball@arm.com>
17060 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
17061 * config/aarch64/aarch64-tune.md: Regenerate.
17062 * doc/invoke.texi: Document Cortex-A520 CPU.
17064 2023-08-09 Carl Love <cel@us.ibm.com>
17066 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
17067 Move definitions to Altivec stanza.
17068 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
17071 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17074 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
17075 stepped vector support.
17077 2023-08-09 liuhongt <hongtao.liu@intel.com>
17079 * common/config/i386/cpuinfo.h (get_available_features):
17080 Rename local variable subleaf_level to max_subleaf_level.
17082 2023-08-09 Richard Biener <rguenther@suse.de>
17084 PR rtl-optimization/110587
17085 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
17087 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
17089 PR tree-optimization/110248
17090 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
17091 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
17092 legitimate when outer code is PLUS.
17094 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
17096 PR tree-optimization/110248
17097 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
17098 type code_helper and pass it to targetm.addr_space.legitimate_address_p
17099 instead of ERROR_MARK.
17100 (offsettable_address_addr_space_p): Update one function pointer with
17101 one more argument of type code_helper as its assignees
17102 memory_address_addr_space_p and strict_memory_address_addr_space_p
17103 have been adjusted, and adjust some call sites with ERROR_MARK.
17104 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
17105 (memory_address_addr_space_p): Adjust with one more unnamed argument
17106 of type code_helper with default ERROR_MARK.
17107 (strict_memory_address_addr_space_p): Likewise.
17108 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
17109 argument of type code_helper.
17110 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
17111 type code_helper and pass it to memory_address_addr_space_p.
17112 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
17113 one more unnamed argument of type code_helper with default value
17115 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
17116 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
17117 pass it to all valid_mem_ref_p calls.
17119 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
17121 PR tree-optimization/110248
17122 * coretypes.h (class code_helper): Add forward declaration.
17123 * doc/tm.texi: Regenerate.
17124 * lra-constraints.cc (valid_address_p): Call target hook
17125 targetm.addr_space.legitimate_address_p with an extra parameter
17126 ERROR_MARK as its prototype changes.
17127 * recog.cc (memory_address_addr_space_p): Likewise.
17128 * reload.cc (strict_memory_address_addr_space_p): Likewise.
17129 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
17130 Extend with one more argument of type code_helper, update the
17131 documentation accordingly.
17132 * targhooks.cc (default_legitimate_address_p): Adjust for the
17133 new code_helper argument.
17134 (default_addr_space_legitimate_address_p): Likewise.
17135 * targhooks.h (default_legitimate_address_p): Likewise.
17136 (default_addr_space_legitimate_address_p): Likewise.
17137 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
17138 with extra unnamed code_helper argument with default ERROR_MARK.
17139 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
17140 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
17141 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
17142 (tree.h): New include for tree_code ERROR_MARK.
17143 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
17144 unnamed code_helper argument with default ERROR_MARK.
17145 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
17146 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
17147 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
17148 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
17149 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
17150 (tree.h): New include for tree_code ERROR_MARK.
17151 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
17152 unnamed code_helper argument with default ERROR_MARK.
17153 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
17154 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
17156 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
17157 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
17158 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
17159 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
17160 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
17161 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
17162 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
17163 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
17164 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
17166 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
17167 (m32c_addr_space_legitimate_address_p): Likewise.
17168 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
17169 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
17170 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
17171 * config/microblaze/microblaze-protos.h (tree.h): New include for
17172 tree_code ERROR_MARK.
17173 (microblaze_legitimate_address_p): Adjust with extra unnamed
17174 code_helper argument with default ERROR_MARK.
17175 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
17177 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
17178 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
17179 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
17180 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
17181 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
17182 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
17183 argument with default ERROR_MARK and adjust the call to function
17184 msp430_legitimate_address_p.
17185 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
17186 unnamed code_helper argument with default ERROR_MARK.
17187 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
17188 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
17189 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
17190 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
17191 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
17192 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
17193 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
17194 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
17195 (tree.h): New include for tree_code ERROR_MARK.
17196 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
17197 extra unnamed code_helper argument with default ERROR_MARK.
17198 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
17199 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
17200 argument and adjust the call to function rs6000_legitimate_address_p.
17201 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
17202 unnamed code_helper argument with default ERROR_MARK.
17203 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
17204 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
17205 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
17206 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
17207 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
17208 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
17209 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
17210 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
17212 (tree.h): New include for tree_code ERROR_MARK.
17213 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
17214 Adjust with extra unnamed code_helper argument with default
17217 2023-08-09 liuhongt <hongtao.liu@intel.com>
17219 * common/config/i386/cpuinfo.h (get_available_features): Check
17220 EAX for valid subleaf before use CPUID.
17222 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
17224 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
17225 for the temporary when canonicalizing the condition.
17227 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
17229 * config/bpf/core-builtins.cc: Cleaned include headers.
17230 (struct cr_builtins): Added GTY.
17231 (cr_builtins_ref): Created.
17232 (builtins_data) Changed to GC root.
17233 (allocate_builtin_data): Changed.
17234 Included gt-core-builtins.h.
17235 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
17236 (bpf_core_extra_ref): Created.
17237 (bpf_comment_info): Changed to GC root.
17238 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
17240 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
17243 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
17244 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
17245 upper part of V2SFmode register with -fno-trapping-math.
17246 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
17248 (<smaxmin:code>v2sf3): Ditto.
17249 (sqrtv2sf2): Ditto.
17250 (*mmx_haddv2sf3_low): Ditto.
17251 (*mmx_hsubv2sf3_low): Ditto.
17252 (vec_addsubv2sf3): Ditto.
17253 (vec_cmpv2sfv2si): Ditto.
17254 (vcond<V2FI:mode>v2sf): Ditto.
17257 (fnmav2sf4): Ditto.
17258 (fnmsv2sf4): Ditto.
17259 (fix_truncv2sfv2si2): Ditto.
17260 (fixuns_truncv2sfv2si2): Ditto.
17261 (floatv2siv2sf2): Ditto.
17262 (floatunsv2siv2sf2): Ditto.
17263 (nearbyintv2sf2): Ditto.
17264 (rintv2sf2): Ditto.
17265 (lrintv2sfv2si2): Ditto.
17266 (ceilv2sf2): Ditto.
17267 (lceilv2sfv2si2): Ditto.
17268 (floorv2sf2): Ditto.
17269 (lfloorv2sfv2si2): Ditto.
17270 (btruncv2sf2): Ditto.
17271 (roundv2sf2): Ditto.
17272 (lroundv2sfv2si2): Ditto.
17273 * doc/invoke.texi (x86 Options): Document
17274 -mpartial-vector-fp-math option.
17276 2023-08-08 Andrew Pinski <apinski@marvell.com>
17278 PR tree-optimization/103281
17279 PR tree-optimization/28794
17280 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
17282 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
17283 (simplify_using_ranges::simplify_casted_cond): Rename to ...
17284 (simplify_using_ranges::simplify_casted_compare): This
17285 and change arguments to take op0 and op1.
17286 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
17287 (simplify_using_ranges::simplify): For tcc_comparison assignments call
17288 simplify_compare_assign_using_ranges_1.
17289 * vr-values.h (simplify_using_ranges): Add
17290 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
17291 Rename simplify_casted_cond and simplify_casted_compare and
17292 update argument types.
17294 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
17296 * genmatch.cc: Log line numbers indirectly.
17298 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
17300 * genmatch.cc: Make sinfo map ordered.
17301 * Makefile.in: Require the ordered map header for genmatch.o.
17303 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
17305 * ordered-hash-map.h: Add get_or_insert.
17306 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
17308 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17310 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
17311 (cond_len_<optab><mode>): Ditto.
17312 (cond_fma<mode>): Ditto.
17313 (cond_len_fma<mode>): Ditto.
17314 (cond_fnma<mode>): Ditto.
17315 (cond_len_fnma<mode>): Ditto.
17316 (cond_fms<mode>): Ditto.
17317 (cond_len_fms<mode>): Ditto.
17318 (cond_fnms<mode>): Ditto.
17319 (cond_len_fnms<mode>): Ditto.
17320 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
17322 (enum insn_type): Add new enum type.
17323 (prepare_ternary_operands): New function.
17324 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
17325 (emit_nonvlmax_tumu_insn): Ditto.
17326 (emit_nonvlmax_fp_tumu_insn): Ditto.
17327 (expand_cond_len_binop): Add condtional operations.
17328 (expand_cond_len_ternop): Ditto.
17329 (prepare_ternary_operands): New function.
17330 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
17331 riscv_get_v_regno_alignment as global scope.
17332 * config/riscv/vector.md: Fix ternary bugs.
17334 2023-08-08 Richard Biener <rguenther@suse.de>
17336 PR tree-optimization/49955
17337 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
17338 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
17339 * tree-vect-slp.cc (vect_free_slp_instance): Release
17340 SLP_INSTANCE_REMAIN_STMTS.
17341 (vect_build_slp_instance): Make the number of lanes of
17342 a BB reduction even.
17343 (vectorize_slp_instance_root_stmt): Handle unvectorized
17344 defs of a BB reduction.
17346 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17348 * internal-fn.cc (get_len_internal_fn): New function.
17349 (DEF_INTERNAL_COND_FN): Ditto.
17350 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
17351 * internal-fn.h (get_len_internal_fn): Ditto.
17352 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
17354 2023-08-08 Richard Biener <rguenther@suse.de>
17356 PR tree-optimization/110924
17357 * tree-ssa-live.h (virtual_operand_live): Update comment.
17358 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
17359 optimization, look at each predecessor.
17360 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
17362 2023-08-08 yulong <shiyulong@iscas.ac.cn>
17364 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
17366 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17368 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
17369 * config/riscv/vector.md: Ditto.
17371 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17373 * config/riscv/autovec.md: Add VLS shift.
17375 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17377 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
17378 * config/riscv/vector-iterators.md: Ditto.
17379 * config/riscv/vector.md: Ditto.
17381 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
17383 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
17385 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
17387 * configure: Regenerate.
17389 2023-08-07 John Ericson <git@JohnEricson.me>
17391 * configure: Regenerate.
17393 2023-08-07 Alan Modra <amodra@gmail.com>
17395 * configure: Regenerate.
17397 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
17399 * configure: Regenerate.
17401 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
17403 * configure: Regenerate.
17405 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
17407 * configure: Regenerate.
17409 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
17411 * configure: Regenerate.
17413 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
17415 * configure: Regenerate.
17417 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
17419 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
17420 VOIDmode operands to conditional before canonicalization.
17422 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
17424 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
17425 (find_oldest_value_reg): Inline stack_pointer_rtx check.
17426 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
17428 2023-08-07 Martin Jambor <mjambor@suse.cz>
17431 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
17432 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
17433 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
17434 (ptr_parm_has_nonarg_uses): Likewise.
17435 * ipa-param-manipulation.cc
17436 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
17437 (ipa_param_body_adjustments::mark_dead_statements): Move initial
17438 checks to get_ddef_if_exists_and_is_used.
17439 (ipa_param_body_adjustments::mark_clobbers_dead): New.
17440 (ipa_param_body_adjustments::common_initialization): Call
17441 mark_clobbers_dead when splitting.
17443 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
17445 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
17446 as an argument and pass it to riscv_emit_int_order_test.
17447 (riscv_expand_conditional_move): Handle cases where the condition
17448 is not EQ/NE or the second argument to the conditional is not
17450 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
17451 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17453 2023-08-07 Andrew Pinski <apinski@marvell.com>
17455 PR tree-optimization/109959
17456 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
17459 2023-08-07 Richard Biener <rguenther@suse.de>
17461 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
17462 calculate post-dominators. Calculate RPO on the inverted
17463 graph and process blocks in that order.
17465 2023-08-07 liuhongt <hongtao.liu@intel.com>
17468 * config/i386/i386-protos.h
17469 (vpternlog_redundant_operand_mask): Adjust parameter type.
17470 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
17471 INTVAL instead of XINT, also adjust parameter type from rtx*
17472 to rtx since the function only needs operands[4] in vpternlog
17474 (substitute_vpternlog_operands): Pass operands[4] instead of
17475 operands to vpternlog_redundant_operand_mask.
17476 * config/i386/sse.md: Ditto.
17478 2023-08-07 Richard Biener <rguenther@suse.de>
17480 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
17481 around dumping code.
17483 2023-08-07 liuhongt <hongtao.liu@intel.com>
17486 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
17487 to define_expand and break into ..
17488 (<insn>v4hf3): .. this.
17489 (divv4hf3): .. this.
17490 (<insn>v2hf3): .. this.
17491 (divv2hf3): .. this.
17492 (movd_v2hf_to_sse): New define_expand.
17493 (movq_<mode>_to_sse): Extend to V4HFmode.
17494 (mmxdoublevecmode): Ditto.
17495 (V2FI_V4HF): New mode iterator.
17496 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
17497 by using mode iterator V4SF_V8HF, renamed to ..
17498 (*vec_concat<mode>): .. this.
17499 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
17500 iterator V4SF_V8HF, renamed to ..
17501 (*vec_concat<mode>_0): .. this.
17502 (*vec_concatv8hf_movss): New define_insn.
17503 (V4SF_V8HF): New mode iterator.
17505 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17507 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
17509 2023-08-07 Jan Beulich <jbeulich@suse.com>
17511 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
17512 (*mmx_pinsrb): Likewise.
17513 (*mmx_pextrb): Likewise.
17514 (*mmx_pextrb_zext): Likewise.
17515 (mmx_pshufbv8qi3): Likewise.
17516 (mmx_pshufbv4qi3): Likewise.
17517 (mmx_pswapdv2si2): Likewise.
17518 (*pinsrb): Likewise.
17519 (*pextrb): Likewise.
17520 (*pextrb_zext): Likewise.
17521 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
17522 (*sse2_eq<mode>3): Likewise.
17523 (*sse2_gt<mode>3): Likewise.
17524 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
17525 (*vec_extract<mode>): Likewise.
17526 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
17527 (*vec_extractv16qi_zext): Likewise.
17528 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
17529 (ssse3_pmaddubsw128): Likewise.
17530 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
17531 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
17532 (<ssse3_avx2>_psign<mode>3): Likewise.
17533 (<ssse3_avx2>_palignr<mode>): Likewise.
17534 (*abs<mode>2): Likewise.
17535 (sse4_2_pcmpestr): Likewise.
17536 (sse4_2_pcmpestri): Likewise.
17537 (sse4_2_pcmpestrm): Likewise.
17538 (sse4_2_pcmpestr_cconly): Likewise.
17539 (sse4_2_pcmpistr): Likewise.
17540 (sse4_2_pcmpistri): Likewise.
17541 (sse4_2_pcmpistrm): Likewise.
17542 (sse4_2_pcmpistr_cconly): Likewise.
17543 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
17544 (vgf2p8affineqb_<mode><mask_name>): Likewise.
17545 (vgf2p8mulb_<mode><mask_name>): Likewise.
17546 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
17548 (*<code>v16qi3 [umaxmin]): Likewise.
17550 2023-08-07 Jan Beulich <jbeulich@suse.com>
17552 * config/i386/i386.md (sse4_1_round<mode>2): Make
17553 "length_immediate" uniformly 1.
17554 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
17555 (mmx_pblendvb_<mode>): Likewise.
17557 2023-08-07 Jan Beulich <jbeulich@suse.com>
17559 * config/i386/sse.md
17560 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
17561 "prefix" attribute.
17562 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
17565 2023-08-07 Jan Beulich <jbeulich@suse.com>
17567 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
17568 "prefix_extra", and "mode" attributes.
17569 (xop_phadd<u>bd): Likewise.
17570 (xop_phadd<u>bq): Likewise.
17571 (xop_phadd<u>wd): Likewise.
17572 (xop_phadd<u>wq): Likewise.
17573 (xop_phadd<u>dq): Likewise.
17574 (xop_phsubbw): Likewise.
17575 (xop_phsubwd): Likewise.
17576 (xop_phsubdq): Likewise.
17577 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
17578 (xop_rotr<mode>3): Likewise.
17579 (xop_frcz<mode>2): Likewise.
17580 (*xop_vmfrcz<mode>2): Likewise.
17581 (xop_vrotl<mode>3): Add "prefix" attribute. Change
17582 "prefix_extra" to 1.
17583 (xop_sha<mode>3): Likewise.
17584 (xop_shl<mode>3): Likewise.
17586 2023-08-07 Jan Beulich <jbeulich@suse.com>
17588 * config/i386/sse.md
17589 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
17591 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
17592 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
17593 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
17594 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
17595 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
17596 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
17597 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
17598 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
17599 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
17600 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
17601 (vec_extract_lo_v64qi): Likewise.
17602 (vec_extract_hi_v64qi): Likewise.
17603 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
17604 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
17605 (*avx512f_<code><mode>3<mask_name>): Likewise.
17606 (*vec_extractv4ti): Likewise.
17607 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
17608 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
17609 Add "length_immediate".
17611 2023-08-07 Jan Beulich <jbeulich@suse.com>
17613 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
17615 (@rdseed<mode>): Likewise.
17616 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
17617 Adjust "prefix_extra".
17618 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
17619 (*sse4_1_<code><mode>3<mask_name>): Likewise.
17620 (*avx2_eq<mode>3): Likewise.
17621 (avx2_gt<mode>3): Likewise.
17622 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
17623 (*vec_extract<mode>): Likewise.
17624 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
17626 2023-08-07 Jan Beulich <jbeulich@suse.com>
17628 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
17629 "prefix_rep". Drop "prefix_extra".
17630 (wr<fsgs>base<mode>): Likewise.
17631 (ptwrite<mode>): Likewise.
17633 2023-08-07 Jan Beulich <jbeulich@suse.com>
17635 * config/i386/i386.md (isa): Move up.
17636 (length_immediate): Handle "fma4".
17637 (prefix): Handle "ssemuladd".
17638 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
17639 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
17641 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
17642 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
17643 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
17645 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
17646 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
17647 (*fma_fnmadd_<mode>): Likewise.
17648 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
17650 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
17651 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
17652 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
17654 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
17655 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
17656 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
17658 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
17659 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
17660 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
17662 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
17663 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
17664 (*fmai_fmadd_<mode>): Likewise.
17665 (*fmai_fmsub_<mode>): Likewise.
17666 (*fmai_fnmadd_<mode><round_name>): Likewise.
17667 (*fmai_fnmsub_<mode><round_name>): Likewise.
17668 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
17669 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
17670 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
17671 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
17672 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
17673 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
17674 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
17675 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
17676 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
17677 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
17678 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
17679 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
17680 (*fma4i_vmfmadd_<mode>): Likewise.
17681 (*fma4i_vmfmsub_<mode>): Likewise.
17682 (*fma4i_vmfnmadd_<mode>): Likewise.
17683 (*fma4i_vmfnmsub_<mode>): Likewise.
17684 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
17685 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
17686 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
17688 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
17689 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
17690 (xop_p<macs>dql): Likewise.
17691 (xop_p<macs>dqh): Likewise.
17692 (xop_p<macs>wd): Likewise.
17693 (xop_p<madcs>wd): Likewise.
17694 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
17696 2023-08-07 Jan Beulich <jbeulich@suse.com>
17698 * config/i386/i386.md (length_immediate): Handle "sse4arg".
17699 (prefix): Likewise.
17700 (*xop_pcmov_<mode>): Add "mode" attribute.
17701 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
17702 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
17703 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
17704 (*xop_pcmov_<mode>): Add "mode" attribute.
17705 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
17707 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
17708 "prefix_extra", and "length_immediate" attributes.
17709 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
17710 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
17711 and "length_immediate" attributes. Switch "type" to "sse4arg".
17712 (xop_pcom_tf<mode>3): Likewise.
17713 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
17715 2023-08-07 Jan Beulich <jbeulich@suse.com>
17717 * config/i386/i386.md (prefix_extra): Correct comment. Fold
17718 cases yielding 2 into ones yielding 1.
17720 2023-08-07 Jan Hubicka <jh@suse.cz>
17722 PR tree-optimization/106293
17723 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
17724 * tree-vect-loop.cc (vect_transform_loop): Likewise.
17726 2023-08-07 Andrew Pinski <apinski@marvell.com>
17728 PR tree-optimization/96695
17729 * match.pd (min_value, max_value): Extend to
17732 2023-08-06 Jan Hubicka <jh@suse.cz>
17734 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
17735 __builtin_expect that CPU likely supports cpuid.
17737 2023-08-06 Jan Hubicka <jh@suse.cz>
17739 * tree-loop-distribution.cc (loop_distribution::execute): Disable
17740 distribution for loops with estimated iterations 0.
17742 2023-08-06 Jan Hubicka <jh@suse.cz>
17744 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
17746 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
17748 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
17749 more Zicond patterns. Fix whitespace typo.
17750 (riscv_rtx_costs): Remove accidental code duplication.
17751 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17753 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
17756 * config/i386/i386-protos.h
17757 (vpternlog_redundant_operand_mask): Declare.
17758 (substitute_vpternlog_operands): Declare.
17759 * config/i386/i386.cc
17760 (vpternlog_redundant_operand_mask): New helper.
17761 (substitute_vpternlog_operands): New function. Use them...
17762 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
17764 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
17766 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
17767 value of -1 is equivalent to don't care.
17768 (extract_integral_bit_field): Indicate that we don't require
17769 the most significant word to be zero extended, if we're about
17771 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
17772 of -1 is equivalent to don't care. Don't clear the most
17773 significant bits with AND mask when UNSIGNEDP is -1.
17775 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
17777 * config/i386/sse.md (define_split): Convert highpart:DF extract
17778 from V2DFmode register into a sse2_storehpd instruction.
17779 (define_split): Likewise, convert lowpart:DF extract from V2DF
17780 register into a sse2_storelpd instruction.
17782 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
17784 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
17787 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
17789 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
17790 against early clobber hard regs.
17792 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17794 * doc/extend.texi: Document it.
17796 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17799 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
17800 vec_widen_<sur>shiftl_hi_<mode>): Remove.
17801 (aarch64_<sur>shll<mode>_internal): Renamed to...
17802 (aarch64_<su>shll<mode>): .. This.
17803 (aarch64_<sur>shll2<mode>_internal): Renamed to...
17804 (aarch64_<su>shll2<mode>): .. This.
17805 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
17807 * config/aarch64/constraints.md (D2, DL): New.
17808 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
17810 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17812 * gensupport.cc (conlist): Support length 0 attribute.
17814 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17816 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
17817 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
17819 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17821 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
17823 (aarch64_adjust_stmt_cost): Use it.
17824 (aarch64_vector_costs::count_ops): Likewise.
17825 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
17826 aarch64_adjust_stmt_cost.
17828 2023-08-04 Richard Biener <rguenther@suse.de>
17830 PR tree-optimization/110838
17831 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
17832 Fix right-shift value sanitizing. Properly emit external
17833 def mangling in the preheader rather than in the pattern
17834 def sequence where it will fail vectorizing.
17836 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
17838 PR middle-end/110316
17840 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
17841 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
17842 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
17843 (timer::validate_phases): Use integral arithmetic to check
17845 (timer::print_row, timer::print): Convert from integral
17846 nanoseconds to floating point seconds before printing.
17847 (timer::all_zero): Change limit to nanosec count instead of
17848 fractional count of seconds.
17849 (make_json_for_timevar_time_def): Convert from integral
17850 nanoseconds to floating point seconds before recording.
17851 * timevar.h (struct timevar_time_def): Update all measurements
17852 to use uint64_t nanoseconds rather than seconds stored in a
17855 2023-08-04 Richard Biener <rguenther@suse.de>
17857 PR tree-optimization/110838
17858 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
17859 the arithmetic right-shift case to non-negative operands.
17861 2023-08-04 Pan Li <pan2.li@intel.com>
17864 2023-08-04 Pan Li <pan2.li@intel.com>
17866 * config/riscv/riscv-vector-builtins-bases.cc
17867 (class vfmacc_frm): New class for vfmacc frm.
17868 (vfmacc_frm_obj): New declaration.
17870 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17871 * config/riscv/riscv-vector-builtins-functions.def
17872 (vfmacc_frm): New function definition.
17873 * config/riscv/riscv-vector-builtins.cc
17874 (function_expander::use_ternop_insn): Add frm operand support.
17875 * config/riscv/vector.md: Add vfmuladd to frm_mode.
17877 2023-08-04 Pan Li <pan2.li@intel.com>
17880 2023-08-04 Pan Li <pan2.li@intel.com>
17882 * config/riscv/riscv-vector-builtins-bases.cc
17883 (class vfnmacc_frm): New class for vfnmacc.
17884 (vfnmacc_frm_obj): New declaration.
17886 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17887 * config/riscv/riscv-vector-builtins-functions.def
17888 (vfnmacc_frm): New function definition.
17890 2023-08-04 Pan Li <pan2.li@intel.com>
17893 2023-08-04 Pan Li <pan2.li@intel.com>
17895 * config/riscv/riscv-vector-builtins-bases.cc
17896 (class vfmsac_frm): New class for vfmsac frm.
17897 (vfmsac_frm_obj): New declaration.
17899 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17900 * config/riscv/riscv-vector-builtins-functions.def
17901 (vfmsac_frm): New function definition.
17903 2023-08-04 Pan Li <pan2.li@intel.com>
17906 2023-08-04 Pan Li <pan2.li@intel.com>
17908 * config/riscv/riscv-vector-builtins-bases.cc
17909 (class vfnmsac_frm): New class for vfnmsac frm.
17910 (vfnmsac_frm_obj): New declaration.
17912 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17913 * config/riscv/riscv-vector-builtins-functions.def
17914 (vfnmsac_frm): New function definition.
17916 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
17918 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
17919 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
17920 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
17921 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
17922 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
17923 (attiny102, attiny104): New devices.
17924 * doc/avr-mmcu.texi: Regenerate.
17926 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
17928 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
17929 and PM_OFFSET entries.
17931 2023-08-04 Andrew Pinski <apinski@marvell.com>
17933 PR tree-optimization/110874
17934 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
17935 (gimple_maybe_cmp): Likewise.
17936 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
17937 and gimple_maybe_cmp instead of being recursive.
17938 * match.pd (bit_not_with_nop): New match pattern.
17939 (maybe_cmp): Likewise.
17941 2023-08-04 Drew Ross <drross@redhat.com>
17943 PR middle-end/101955
17944 * match.pd ((signed x << c) >> c): New canonicalization.
17946 2023-08-04 Pan Li <pan2.li@intel.com>
17948 * config/riscv/riscv-vector-builtins-bases.cc
17949 (class vfnmsac_frm): New class for vfnmsac frm.
17950 (vfnmsac_frm_obj): New declaration.
17952 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17953 * config/riscv/riscv-vector-builtins-functions.def
17954 (vfnmsac_frm): New function definition.
17956 2023-08-04 Pan Li <pan2.li@intel.com>
17958 * config/riscv/riscv-vector-builtins-bases.cc
17959 (class vfmsac_frm): New class for vfmsac frm.
17960 (vfmsac_frm_obj): New declaration.
17962 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17963 * config/riscv/riscv-vector-builtins-functions.def
17964 (vfmsac_frm): New function definition.
17966 2023-08-04 Pan Li <pan2.li@intel.com>
17968 * config/riscv/riscv-vector-builtins-bases.cc
17969 (class vfnmacc_frm): New class for vfnmacc.
17970 (vfnmacc_frm_obj): New declaration.
17972 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17973 * config/riscv/riscv-vector-builtins-functions.def
17974 (vfnmacc_frm): New function definition.
17976 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
17979 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
17980 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
17982 2023-08-04 Pan Li <pan2.li@intel.com>
17984 * config/riscv/riscv-vector-builtins-bases.cc
17985 (class vfmacc_frm): New class for vfmacc frm.
17986 (vfmacc_frm_obj): New declaration.
17988 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17989 * config/riscv/riscv-vector-builtins-functions.def
17990 (vfmacc_frm): New function definition.
17991 * config/riscv/riscv-vector-builtins.cc
17992 (function_expander::use_ternop_insn): Add frm operand support.
17993 * config/riscv/vector.md: Add vfmuladd to frm_mode.
17995 2023-08-04 Pan Li <pan2.li@intel.com>
17997 * config/riscv/riscv-vector-builtins-bases.cc
17998 (vfwmul_frm_obj): New declaration.
17999 (vfwmul_frm): Ditto.
18000 * config/riscv/riscv-vector-builtins-bases.h:
18001 (vfwmul_frm): Ditto.
18002 * config/riscv/riscv-vector-builtins-functions.def
18003 (vfwmul_frm): New function definition.
18004 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
18006 2023-08-04 Pan Li <pan2.li@intel.com>
18008 * config/riscv/riscv-vector-builtins-bases.cc
18009 (binop_frm): New declaration.
18010 (reverse_binop_frm): Likewise.
18012 * config/riscv/riscv-vector-builtins-bases.h:
18013 (vfdiv_frm): New extern declaration.
18014 (vfrdiv_frm): Likewise.
18015 * config/riscv/riscv-vector-builtins-functions.def
18016 (vfdiv_frm): New function definition.
18017 (vfrdiv_frm): Likewise.
18018 * config/riscv/vector.md: Add vfdiv to frm_mode.
18020 2023-08-03 Jan Hubicka <jh@suse.cz>
18022 * tree-cfg.cc (print_loop_info): Print entry count.
18024 2023-08-03 Jan Hubicka <jh@suse.cz>
18026 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
18028 2023-08-03 Jan Hubicka <jh@suse.cz>
18030 PR bootstrap/110857
18031 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
18032 unadjusted_exit_count.
18034 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
18036 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
18039 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
18041 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
18042 various Zicond patterns.
18043 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
18044 sfb_alu_operand for both arms of the conditional move.
18045 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
18047 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
18053 * config.gcc: Added core-builtins.cc and .o files.
18054 * config/bpf/bpf-passes.def: Removed file.
18055 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
18056 bpf_replace_core_move_operands): New prototypes.
18057 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
18058 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
18059 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
18060 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
18061 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
18063 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
18064 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
18065 (mov_reloc_core<mode>): Added.
18066 * config/bpf/core-builtins.cc (struct cr_builtin, enum
18067 cr_decision struct cr_local, struct cr_final, struct
18068 core_builtin_helpers, enum bpf_plugin_states): Added types.
18069 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
18071 (allocate_builtin_data, get_builtin-data, search_builtin_data,
18072 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
18073 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
18074 bpf_core_get_index, compute_field_expr,
18075 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
18076 process_field_expr, pack_enum_value, process_enum_value, pack_type,
18077 process_type, bpf_require_core_support, make_core_relo, read_kind,
18078 kind_access_index, kind_preserve_field_info, kind_enum_value,
18079 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
18080 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
18081 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
18082 bpf_expand_core_builtin, bpf_add_core_reloc,
18083 bpf_replace_core_move_operands): Added functions.
18084 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
18085 (bpf_init_core_builtins, bpf_expand_core_builtin,
18086 bpf_resolve_overloaded_core_builtin): Added functions.
18087 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
18088 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
18089 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
18090 * config/bpf/t-bpf: Added core-builtins.o.
18091 * doc/extend.texi: Added documentation for new BPF builtins.
18093 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
18095 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
18096 ranges to the call to relation_fold_and_or.
18097 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
18098 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
18099 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
18100 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
18101 a varying op1 and op2 to call.
18102 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
18103 (operator_equal::op1_op2_relation): New float version.
18104 (operator_not_equal::op1_op2_relation): Ditto.
18105 (operator_lt::op1_op2_relation): Ditto.
18106 (operator_le::op1_op2_relation): Ditto.
18107 (operator_gt::op1_op2_relation): Ditto.
18108 (operator_ge::op1_op2_relation) Ditto.
18109 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
18111 (operator_not_equal::op1_op2_relation): Ditto.
18112 (operator_lt::op1_op2_relation): Ditto.
18113 (operator_le::op1_op2_relation): Ditto.
18114 (operator_gt::op1_op2_relation): Ditto.
18115 (operator_ge::op1_op2_relation): Ditto.
18116 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
18118 (range_operator::op1_op2_relation): Add extra params.
18119 (operator_equal::op1_op2_relation): Ditto.
18120 (operator_not_equal::op1_op2_relation): Ditto.
18121 (operator_lt::op1_op2_relation): Ditto.
18122 (operator_le::op1_op2_relation): Ditto.
18123 (operator_gt::op1_op2_relation): Ditto.
18124 (operator_ge::op1_op2_relation): Ditto.
18125 * range-op.h (range_operator): New prototypes.
18126 (range_op_handler): Ditto.
18128 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
18130 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
18131 Use identity relation.
18132 (gori_compute::compute_operand2_range): Ditto.
18133 * value-relation.cc (get_identity_relation): New.
18134 * value-relation.h (get_identity_relation): New prototype.
18136 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
18138 * value-range.h (Value_Range::set_varying): Set the type.
18139 (Value_Range::set_zero): Ditto.
18140 (Value_Range::set_nonzero): Ditto.
18142 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
18144 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
18147 2023-08-03 Pan Li <pan2.li@intel.com>
18149 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
18151 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
18153 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
18155 2023-08-03 Richard Biener <rguenther@suse.de>
18157 PR tree-optimization/110838
18158 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
18159 Adjust the shift operand of RSHIFT_EXPRs.
18161 2023-08-03 Richard Biener <rguenther@suse.de>
18163 PR tree-optimization/110702
18164 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
18165 we created a NULL pointer based access rewrite that to
18168 2023-08-03 Richard Biener <rguenther@suse.de>
18170 * tree-ssa-sink.cc: Include tree-ssa-live.h.
18171 (pass_sink_code::execute): Instantiate virtual_operand_live
18173 (sink_code_in_bb): Pass down virtual_operand_live.
18174 (statement_sink_location): Get virtual_operand_live and
18175 verify we are not sinking loads across stores by looking up
18176 the live virtual operand at the sink location.
18178 2023-08-03 Richard Biener <rguenther@suse.de>
18180 * tree-ssa-live.h (class virtual_operand_live): New.
18181 * tree-ssa-live.cc (virtual_operand_live::init): New.
18182 (virtual_operand_live::get_live_in): Likewise.
18183 (virtual_operand_live::get_live_out): Likewise.
18185 2023-08-03 Richard Biener <rguenther@suse.de>
18187 * passes.def: Exchange loop splitting and final value
18188 replacement passes.
18190 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18192 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
18193 New function which handles bswap patterns for vec_perm_const.
18194 (vectorize_vec_perm_const_1): Call new function.
18195 * config/s390/vector.md (*bswap<mode>): Fix operands in output
18197 (*vstbr<mode>): New insn.
18199 2023-08-03 Alexandre Oliva <oliva@adacore.com>
18201 * config/vxworks-smp.opt: New. Introduce -msmp.
18202 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
18203 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
18204 lib_smp when -msmp is present in the command line.
18205 * doc/invoke.texi: Document it.
18207 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
18209 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
18210 when enabling -mno-omit-leaf-frame-pointer
18211 (riscv_option_override): Override omit-frame-pointer.
18212 (riscv_frame_pointer_required): Save s0 for non-leaf function
18213 (TARGET_FRAME_POINTER_REQUIRED): Override defination
18214 * config/riscv/riscv.opt: Add option support.
18216 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
18219 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
18220 place operand in a register before gen_<insn>64ti2_doubleword.
18221 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
18222 operand in a register before gen_<insn>32di2_doubleword.
18223 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
18224 (<any_rotate>64ti2_doubleword): Likewise.
18226 2023-08-03 Pan Li <pan2.li@intel.com>
18228 * config/riscv/riscv-vector-builtins-bases.cc
18229 (vfmul_frm_obj): New declaration.
18231 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
18232 * config/riscv/riscv-vector-builtins-functions.def
18233 (vfmul_frm): New function definition.
18234 * config/riscv/vector.md: Add vfmul to frm_mode.
18236 2023-08-03 Andrew Pinski <apinski@marvell.com>
18238 * match.pd (`~X & X`): Check that the types match.
18239 (`~x | x`, `~x ^ x`): Likewise.
18241 2023-08-03 Pan Li <pan2.li@intel.com>
18243 * config/riscv/riscv-vector-builtins-bases.h: Remove
18244 redudant declaration.
18246 2023-08-03 Pan Li <pan2.li@intel.com>
18248 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
18250 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
18251 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
18252 Add vfwsub function definitions.
18254 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18256 PR rtl-optimization/110867
18257 * combine.cc (simplify_compare_const): Try the optimization only
18258 in case the constant fits into the comparison mode.
18260 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
18262 * config/riscv/zicond.md: Remove incorrect zicond patterns and
18263 renumber/rename them.
18264 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
18266 2023-08-02 Richard Biener <rguenther@suse.de>
18268 * tree-phinodes.h (add_phi_node_to_bb): Remove.
18269 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
18271 2023-08-02 Jan Beulich <jbeulich@suse.com>
18273 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
18274 two of the alternatives.
18276 2023-08-02 Richard Biener <rguenther@suse.de>
18278 PR tree-optimization/92335
18279 * tree-ssa-sink.cc (select_best_block): Before loop
18280 optimizations avoid sinking unconditional loads/stores
18281 in innermost loops to conditional executed places.
18283 2023-08-02 Andrew Pinski <apinski@marvell.com>
18285 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
18286 the comparison operands before comparing them.
18288 2023-08-02 Andrew Pinski <apinski@marvell.com>
18290 * match.pd (`~X & X`, `~X | X`): Move over to
18291 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
18292 handles that already.
18293 Remove range test simplifications to true/false as they
18294 are now handled by these patterns.
18296 2023-08-02 Andrew Pinski <apinski@marvell.com>
18298 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
18299 statement's lhs and rhs to check if trivial dead.
18300 Rename inserted_exprs to exprs_maybe_dce; also move it so
18301 bitmap is not allocated if not needed.
18303 2023-08-02 Pan Li <pan2.li@intel.com>
18305 * config/riscv/riscv-vector-builtins-bases.cc
18306 (class widen_binop_frm): New class for binop frm.
18307 (BASE): Add vfwadd_frm.
18308 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
18309 * config/riscv/riscv-vector-builtins-functions.def
18310 (vfwadd_frm): New function definition.
18311 * config/riscv/riscv-vector-builtins-shapes.cc
18312 (BASE_NAME_MAX_LEN): New macro.
18313 (struct alu_frm_def): Leverage new base class.
18314 (struct build_frm_base): New build base for frm.
18315 (struct widen_alu_frm_def): New struct for widen alu frm.
18316 (SHAPE): Add widen_alu_frm shape.
18317 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
18318 * config/riscv/vector.md (frm_mode): Add vfwalu type.
18320 2023-08-02 Jan Hubicka <jh@suse.cz>
18322 * cfgloop.h (loop_count_in): Declare.
18323 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
18324 (loop_count_in): Move here from ...
18325 * cfgloopmanip.cc (loop_count_in): ... here.
18326 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
18328 2023-08-02 Jan Hubicka <jh@suse.cz>
18330 * cfg.cc (scale_strictly_dominated_blocks): New function.
18331 * cfg.h (scale_strictly_dominated_blocks): Declare.
18332 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
18334 2023-08-02 Richard Biener <rguenther@suse.de>
18336 PR rtl-optimization/110587
18337 * lra-spills.cc (return_regno_p): Remove.
18338 (regno_in_use_p): Likewise.
18339 (lra_final_code_change): Do not remove noop moves
18340 between hard registers.
18342 2023-08-02 liuhongt <hongtao.liu@intel.com>
18345 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
18346 HFmode, use mode iterator VFH instead.
18347 (vec_fmsubadd<mode>4): Ditto.
18348 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
18349 Remove scalar mode from iterator, use VFH_AVX512VL instead.
18350 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
18353 2023-08-02 liuhongt <hongtao.liu@intel.com>
18355 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
18356 pre_reload define_insn_and_split.
18358 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
18360 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
18361 using Zicond to implement some conditional moves.
18363 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
18365 * config/riscv/zicond.md: Use the X iterator instead of ANYI
18366 on the comparison input operands.
18368 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
18370 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
18372 (case SET): For INSNs that just set a REG, take the cost from the
18374 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
18376 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
18378 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
18379 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
18380 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
18381 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
18382 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
18383 (OPTION_MASK_ISA_ABM_SET):
18384 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
18386 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
18388 * config/s390/s390.cc (s390_encode_section_info): Assume external
18389 symbols without explicit alignment to be unaligned if
18390 -munaligned-symbols has been specified.
18391 * config/s390/s390.opt (-munaligned-symbols): New option.
18393 2023-08-01 Richard Ball <richard.ball@arm.com>
18395 * gimple-fold.cc (fold_ctor_reference):
18396 Add support for poly_int.
18398 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
18401 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
18402 LABEL_NUSES of new conditional branch instruction.
18404 2023-08-01 Jan Hubicka <jh@suse.cz>
18406 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
18407 constant prologue peeling.
18409 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
18411 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
18413 2023-08-01 Pan Li <pan2.li@intel.com>
18414 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18416 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
18417 (STATIC_FRM_P): Ditto.
18418 (struct mode_switching_info): New struct for mode switching.
18419 (struct machine_function): Add new field mode switching.
18420 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
18421 (riscv_frm_adjust_mode_after_call): New function for call mode.
18422 (riscv_frm_emit_after_call_in_bb_end): New function for emit
18423 insn when call as the end of bb.
18424 (riscv_frm_mode_needed): New function for frm mode needed.
18425 (frm_unknown_dynamic_p): Remove call check.
18426 (riscv_mode_needed): Extrac function for frm.
18427 (riscv_frm_mode_after): Add DYN_CALL after.
18428 (riscv_mode_entry): Remove backup rtl initialization.
18429 * config/riscv/vector.md (frm_mode): Add dyn_call.
18430 (fsrmsi_restore_exit): Rename to _volatile.
18431 (fsrmsi_restore_volatile): Likewise.
18433 2023-08-01 Pan Li <pan2.li@intel.com>
18435 * config/riscv/riscv-vector-builtins-bases.cc
18436 (class reverse_binop_frm): Add new template for reversed frm.
18437 (vfsub_frm_obj): New obj.
18438 (vfrsub_frm_obj): Likewise.
18439 * config/riscv/riscv-vector-builtins-bases.h:
18440 (vfsub_frm): New declaration.
18441 (vfrsub_frm): Likewise.
18442 * config/riscv/riscv-vector-builtins-functions.def
18443 (vfsub_frm): New function define.
18444 (vfrsub_frm): Likewise.
18446 2023-08-01 Andrew Pinski <apinski@marvell.com>
18448 PR tree-optimization/93044
18449 * match.pd (nested int casts): A truncation (to the same size or smaller)
18450 can always remove the inner cast.
18452 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
18455 * doc/invoke.texi (-Wmissing-variable-declarations): Document
18458 2023-07-31 Andrew Pinski <apinski@marvell.com>
18460 PR tree-optimization/106164
18461 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
18462 `a == b | a < b`, `a == b | a > b`): Handle these cases
18465 2023-07-31 Andrew Pinski <apinski@marvell.com>
18467 PR tree-optimization/106164
18468 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
18469 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
18471 2023-07-31 Andrew Pinski <apinski@marvell.com>
18473 PR tree-optimization/100864
18474 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
18475 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
18476 (gimple_bitwise_inverted_equal_p): New function.
18477 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
18478 instead of direct matching bit_not.
18480 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
18483 * gcc-ar.cc (main): Expand argv and use
18484 temporary response file to call ar if any
18485 expansions were made.
18487 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
18489 PR tree-optimization/110582
18490 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
18491 range vector for non-ssa names.
18493 2023-07-31 David Malcolm <dmalcolm@redhat.com>
18496 * diagnostic-client-data-hooks.h (class sarif_object): New forward
18498 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
18500 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
18501 (class sarif_invocation): Inherit from sarif_object rather than
18503 (class sarif_result): Likewise.
18504 (class sarif_ice_notification): Likewise.
18505 (sarif_object::get_or_create_properties): New.
18506 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
18507 to call the context's add_sarif_invocation_properties hook.
18508 (sarif_builder::flush_to_file): Pass m_context to
18509 sarif_invocation::prepare_to_flush.
18510 * diagnostic-format-sarif.h: New header.
18511 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
18512 writes to stderr. Document that if SARIF diagnostic output is
18513 requested then any timing information is written in JSON form as
18514 part of the SARIF output, rather than to stderr.
18515 * timevar.cc: Include "json.h".
18516 (timer::named_items::m_hash_map): Split out type into...
18517 (timer::named_items::hash_map_t): ...this new typedef.
18518 (timer::named_items::make_json): New function.
18519 (timevar_diff): New function.
18520 (make_json_for_timevar_time_def): New function.
18521 (timer::timevar_def::make_json): New function.
18522 (timer::make_json): New function.
18523 * timevar.h (class json::value): New forward decl.
18524 (timer::make_json): New decl.
18525 (timer::timevar_def::make_json): New decl.
18526 * tree-diagnostic-client-data-hooks.cc: Include
18527 "diagnostic-format-sarif.h" and "timevar.h".
18528 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
18531 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18533 * combine.cc (simplify_compare_const): Narrow comparison of
18534 memory and constant.
18535 (try_combine): Adapt new function signature.
18536 (simplify_comparison): Adapt new function signature.
18538 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
18540 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
18542 (expand_vector_init_insert_elems): Ditto.
18544 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
18547 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
18548 single_defuse_cycle while counting reduction_latency.
18550 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18552 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
18553 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
18554 (COND_ADD): Remove.
18559 (COND_RDIV): Ditto.
18562 (COND_FMIN): Ditto.
18563 (COND_FMAX): Ditto.
18571 (COND_FNMA): Ditto.
18572 (COND_FNMS): Ditto.
18574 (COND_LEN_ADD): Ditto.
18575 (COND_LEN_SUB): Ditto.
18576 (COND_LEN_MUL): Ditto.
18577 (COND_LEN_DIV): Ditto.
18578 (COND_LEN_MOD): Ditto.
18579 (COND_LEN_RDIV): Ditto.
18580 (COND_LEN_MIN): Ditto.
18581 (COND_LEN_MAX): Ditto.
18582 (COND_LEN_FMIN): Ditto.
18583 (COND_LEN_FMAX): Ditto.
18584 (COND_LEN_AND): Ditto.
18585 (COND_LEN_IOR): Ditto.
18586 (COND_LEN_XOR): Ditto.
18587 (COND_LEN_SHL): Ditto.
18588 (COND_LEN_SHR): Ditto.
18589 (COND_LEN_FMA): Ditto.
18590 (COND_LEN_FMS): Ditto.
18591 (COND_LEN_FNMA): Ditto.
18592 (COND_LEN_FNMS): Ditto.
18593 (COND_LEN_NEG): Ditto.
18594 (ADD): New macro define.
18615 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
18618 * config/i386/i386-features.cc (compute_convert_gain): Check
18619 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
18620 and V4SImode rotates in STV.
18621 (general_scalar_chain::convert_rotate): Likewise.
18623 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
18625 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
18626 * config/riscv/riscv-protos.h (get_mask_mode): Update return
18628 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
18630 (emit_vlmax_insn): Ditto.
18631 (emit_vlmax_fp_insn): Ditto.
18632 (emit_vlmax_ternary_insn): Ditto.
18633 (emit_vlmax_fp_ternary_insn): Ditto.
18634 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
18635 (emit_nonvlmax_insn): Ditto.
18636 (emit_vlmax_slide_insn): Ditto.
18637 (emit_nonvlmax_slide_tu_insn): Ditto.
18638 (emit_vlmax_merge_insn): Ditto.
18639 (emit_vlmax_masked_insn): Ditto.
18640 (emit_nonvlmax_masked_insn): Ditto.
18641 (emit_vlmax_masked_store_insn): Ditto.
18642 (emit_nonvlmax_masked_store_insn): Ditto.
18643 (emit_vlmax_masked_mu_insn): Ditto.
18644 (emit_nonvlmax_tu_insn): Ditto.
18645 (emit_nonvlmax_fp_tu_insn): Ditto.
18646 (emit_scalar_move_insn): Ditto.
18647 (emit_vlmax_compress_insn): Ditto.
18648 (emit_vlmax_reduction_insn): Ditto.
18649 (emit_vlmax_fp_reduction_insn): Ditto.
18650 (emit_nonvlmax_fp_reduction_insn): Ditto.
18651 (expand_vec_series): Ditto.
18652 (expand_vector_init_merge_repeating_sequence): Ditto.
18653 (expand_vec_perm): Ditto.
18654 (shuffle_merge_patterns): Ditto.
18655 (shuffle_compress_patterns): Ditto.
18656 (shuffle_decompress_patterns): Ditto.
18657 (expand_reduction): Ditto.
18658 (get_mask_mode): Update return type.
18659 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
18660 is valid, and use new get_mask_mode interface.
18662 2023-07-31 Pan Li <pan2.li@intel.com>
18664 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
18665 Move rm suffix before mask.
18667 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18669 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
18670 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
18673 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
18676 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
18677 (extzv<mode>): Likewise.
18678 (insv<mode>): Likewise.
18679 (*testqi_ext_3): Likewise.
18680 (*btr<mode>_2): Likewise.
18681 (define_split): Likewise.
18682 (*btsq_imm): Likewise.
18683 (*btrq_imm): Likewise.
18684 (*btcq_imm): Likewise.
18685 (define_peephole2 x3): Likewise.
18686 (*bt<mode>): Likewise
18687 (*bt<mode>_mask): New define_insn_and_split.
18688 (*jcc_bt<mode>): Use QImode for offsets.
18689 (*jcc_bt<mode>_1): Delete obsolete pattern.
18690 (*jcc_bt<mode>_mask): Use QImode offsets.
18691 (*jcc_bt<mode>_mask_1): Likewise.
18692 (define_split): Likewise.
18693 (*bt<mode>_setcqi): Likewise.
18694 (*bt<mode>_setncqi): Likewise.
18695 (*bt<mode>_setnc<mode>): Likewise.
18696 (*bt<mode>_setncqi_2): Likewise.
18697 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
18698 (bmi2_bzhi_<mode>3): Use QImode offsets.
18699 (*bmi2_bzhi_<mode>3): Likewise.
18700 (*bmi2_bzhi_<mode>3_1): Likewise.
18701 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
18702 (@tbm_bextri_<mode>): Likewise.
18704 2023-07-29 Jan Hubicka <jh@suse.cz>
18706 * profile-count.cc (profile_probability::sqrt): New member function.
18707 (profile_probability::pow): Likewise.
18708 * profile-count.h: (profile_probability::sqrt): Declare
18709 (profile_probability::pow): Likewise.
18710 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
18712 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
18714 * gimple-range-cache.cc (ssa_cache::merge_range): New.
18715 (ssa_lazy_cache::merge_range): New.
18716 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
18717 (class ssa_lazy_cache): Ditto.
18718 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
18720 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
18722 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
18723 Move from value-query.cc.
18724 (substitute_and_fold_engine::value_of_stmt): Ditto.
18725 (substitute_and_fold_engine::range_of_expr): New.
18726 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
18727 range_query. New prototypes.
18728 * value-query.cc (value_query::value_on_edge): Relocate.
18729 (value_query::value_of_stmt): Ditto.
18730 * value-query.h (class value_query): Remove.
18731 (class range_query): Remove base class. Adjust prototypes.
18733 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
18735 PR tree-optimization/110205
18736 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
18737 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
18738 Add final override.
18739 * range-op.cc (operator_lshift): Add missing final overrides.
18740 (operator_rshift): Ditto.
18742 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
18744 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
18745 optimizations in BPF target.
18747 2023-07-28 Honza <jh@ryzen4.suse.cz>
18749 * cfgloopmanip.cc (loop_count_in): Break out from ...
18750 (loop_exit_for_scaling): Break out from ...
18751 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
18752 add more sanity check and debug info.
18753 (scale_loop_profile): ... here.
18754 (create_empty_loop_on_edge): Fix whitespac.
18755 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
18756 * loop-unroll.cc (unroll_loop_constant_iterations): Use
18757 update_loop_exit_probability_scale_dom_bbs.
18758 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
18759 (tree_transform_and_unroll_loop): Use
18760 update_loop_exit_probability_scale_dom_bbs.
18761 * tree-ssa-loop-split.cc (split_loop): Use
18762 update_loop_exit_probability_scale_dom_bbs.
18764 2023-07-28 Jan Hubicka <jh@suse.cz>
18766 PR middle-end/77689
18767 * tree-ssa-loop-split.cc: Include value-query.h.
18768 (split_at_bb_p): Analyze cases where EQ/NE can be turned
18769 into LT/LE/GT/GE; return updated guard code.
18770 (split_loop): Use guard code.
18772 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
18773 Richard Biener <rguenther@suse.de>
18775 PR middle-end/28071
18776 PR rtl-optimization/110587
18777 * expr.cc (emit_group_load_1): Simplify logic for calling
18778 force_reg on ORIG_SRC, to avoid making a copy if the source
18779 is already in a pseudo register.
18781 2023-07-28 Jan Hubicka <jh@suse.cz>
18783 PR middle-end/106923
18784 * tree-ssa-loop-split.cc (connect_loops): Change probability
18785 of the test preconditioning second loop to very_likely.
18786 (fix_loop_bb_probability): Handle correctly case where
18787 on of the arms of the conditional is empty.
18788 (split_loop): Fold the test guarding first condition to
18789 see if it is constant true; Set correct entry block
18790 probabilities of the split loops; determine correct loop
18791 eixt probabilities.
18793 2023-07-28 xuli <xuli1@eswincomputing.com>
18795 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
18796 vsadd[u] and vssub[u].
18797 * config/riscv/vector.md: Ditto.
18799 2023-07-28 Jan Hubicka <jh@suse.cz>
18801 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
18802 loops when IV test is not overflowing.
18804 2023-07-28 liuhongt <hongtao.liu@intel.com>
18807 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
18809 (avx512cd_maskw_vec_dup<mode>): Ditto.
18811 2023-07-27 David Faust <david.faust@oracle.com>
18815 * config/bpf/bpf.opt (msmov): New option.
18816 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
18817 * config/bpf/bpf.md (*extendsidi2): New.
18818 (extendhidi2): New.
18819 (extendqidi2): New.
18820 (extendsisi2): New.
18821 (extendhisi2): New.
18822 (extendqisi2): New.
18823 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
18824 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
18825 also enables -msmov.
18827 2023-07-27 David Faust <david.faust@oracle.com>
18829 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
18830 Add -mbswap and -msdiv eBPF options.
18831 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
18832 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
18835 2023-07-27 David Faust <david.faust@oracle.com>
18837 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
18838 in pseudo-C dialect output template.
18839 (sub<AM:mode>3): Likewise.
18841 2023-07-27 Jan Hubicka <jh@suse.cz>
18843 * tree-vect-loop.cc (optimize_mask_stores): Make store
18846 2023-07-27 Jan Hubicka <jh@suse.cz>
18848 * cfgloop.h (single_dom_exit): Declare.
18849 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
18850 * cfgrtl.cc (struct cfg_hooks): Fix comment.
18851 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
18852 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
18853 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
18855 (tree_transform_and_unroll_loop): ... here;
18857 2023-07-27 Jan Hubicka <jh@suse.cz>
18859 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
18860 tree-ssa-loop-manip.cc and avoid recursion.
18861 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
18862 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
18864 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
18865 (scale_dominated_blocks_in_loop): Declare.
18866 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
18867 (change_edge_frequency): Remove.
18868 * predict.h (change_edge_frequency): Remove.
18869 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
18871 (niter_for_unrolled_loop): Remove.
18872 (tree_transform_and_unroll_loop): Fix profile update.
18874 2023-07-27 Jan Hubicka <jh@suse.cz>
18876 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
18877 to guessed; fix count of new_bb.
18879 2023-07-27 Jan Hubicka <jh@suse.cz>
18881 * profile-count.h (profile_count::apply_probability): Fix
18882 handling of uninitialized probabilities, optimize scaling
18885 2023-07-27 Richard Biener <rguenther@suse.de>
18887 PR tree-optimization/91838
18888 * gimple-match-head.cc: Include attribs.h and asan.h.
18889 * generic-match-head.cc: Likewise.
18890 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
18892 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18894 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
18895 (ADJUST_ALIGNMENT): Ditto.
18896 (ADJUST_PRECISION): Ditto.
18897 (VLS_MODES): Ditto.
18898 (VECTOR_MODE_WITH_PREFIX): Ditto.
18899 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
18900 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
18901 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
18902 (legitimize_move): Enable basic VLS modes support.
18903 (get_vlmul): Ditto.
18904 (get_ratio): Ditto.
18905 (get_vector_mode): Ditto.
18906 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
18907 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
18908 (VLS_ENTRY): New macro.
18909 (riscv_v_ext_mode_p): Add vls modes.
18910 (riscv_get_v_regno_alignment): New function.
18911 (riscv_print_operand): Add vls modes.
18912 (riscv_hard_regno_nregs): Ditto.
18913 (riscv_hard_regno_mode_ok): Ditto.
18914 (riscv_regmode_natural_size): Ditto.
18915 (riscv_vectorize_preferred_vector_alignment): Ditto.
18916 * config/riscv/riscv.md: Ditto.
18917 * config/riscv/vector-iterators.md: Ditto.
18918 * config/riscv/vector.md: Ditto.
18919 * config/riscv/autovec-vls.md: New file.
18921 2023-07-27 Pan Li <pan2.li@intel.com>
18923 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
18924 (vread_csr): Ditto.
18925 (vwrite_csr): Ditto.
18927 2023-07-27 demin.han <demin.han@starfivetech.com>
18929 * config/riscv/autovec.md: Delete which_alternative use in split
18931 2023-07-27 Richard Biener <rguenther@suse.de>
18933 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
18935 (pass_sink_code::execute): ... in the caller.
18937 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
18938 Richard Biener <rguenther@suse.de>
18940 PR tree-optimization/110776
18941 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
18944 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
18946 * config/riscv/riscv.md: Include zicond.md
18947 * config/riscv/zicond.md: New file.
18949 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
18951 * common/config/riscv/riscv-common.cc: New extension.
18952 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
18953 (TARGET_ZICOND): New target.
18955 2023-07-26 Carl Love <cel@us.ibm.com>
18957 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
18958 specifies the number of built-in arguments to check.
18959 (altivec_resolve_overloaded_builtin): Update calls to find_instance
18960 to pass the number of built-in arguments to be checked.
18962 2023-07-26 David Faust <david.faust@oracle.com>
18964 * config/bpf/bpf.opt (mv3-atomics): New option.
18965 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
18966 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
18967 (REG_CLASS_NAMES): Likewise.
18968 (REG_CLASS_CONTENTS): Likewise.
18969 (REGNO_REG_CLASS): Handle R0.
18970 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
18971 (UNSPEC_AAND): New unspec.
18972 (UNSPEC_AOR): Likewise.
18973 (UNSPEC_AXOR): Likewise.
18974 (UNSPEC_AFADD): Likewise.
18975 (UNSPEC_AFAND): Likewise.
18976 (UNSPEC_AFOR): Likewise.
18977 (UNSPEC_AFXOR): Likewise.
18978 (UNSPEC_AXCHG): Likewise.
18979 (UNSPEC_ACMPX): Likewise.
18980 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
18982 * config/bpf/atomic.md: ...Here. New file.
18983 * config/bpf/constraints.md (t): New constraint for R0.
18984 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
18986 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
18988 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
18991 2023-07-26 Carl Love <cel@us.ibm.com>
18993 * config/rs6000/rs6000-builtins.def: Rename
18994 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
18995 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
18996 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
18997 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
18998 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
18999 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
19000 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
19001 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
19002 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
19003 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
19004 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
19005 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
19006 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
19007 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
19008 * config/rs6000/rs6000-c.cc (find_instance): Add case
19009 RS6000_OVLD_VEC_REPLACE_UN.
19010 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
19011 Fix first argument type. Rename VREPLACE_UN_UV4SI as
19012 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
19013 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
19014 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
19015 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
19016 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
19017 REPLACE_ELT_V for vector modes.
19018 (REPLACE_ELT): New scalar mode iterator.
19019 (REPLACE_ELT_char): Add scalar attributes.
19020 (vreplace_un_<mode>): Change iterator and mode attribute.
19022 2023-07-26 David Malcolm <dmalcolm@redhat.com>
19025 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
19027 2023-07-26 Richard Biener <rguenther@suse.de>
19029 PR tree-optimization/106081
19030 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
19031 Assign layout -1 to splats.
19033 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19035 * range-op-mixed.h (class operator_cast): Add update_bitmask.
19036 * range-op.cc (operator_cast::update_bitmask): New.
19037 (operator_cast::fold_range): Call update_bitmask.
19039 2023-07-26 Li Xu <xuli1@eswincomputing.com>
19041 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
19042 scalar type to float16, eliminate warning.
19043 (vfloat16mf4x3_t): Ditto.
19044 (vfloat16mf4x4_t): Ditto.
19045 (vfloat16mf4x5_t): Ditto.
19046 (vfloat16mf4x6_t): Ditto.
19047 (vfloat16mf4x7_t): Ditto.
19048 (vfloat16mf4x8_t): Ditto.
19049 (vfloat16mf2x2_t): Ditto.
19050 (vfloat16mf2x3_t): Ditto.
19051 (vfloat16mf2x4_t): Ditto.
19052 (vfloat16mf2x5_t): Ditto.
19053 (vfloat16mf2x6_t): Ditto.
19054 (vfloat16mf2x7_t): Ditto.
19055 (vfloat16mf2x8_t): Ditto.
19056 (vfloat16m1x2_t): Ditto.
19057 (vfloat16m1x3_t): Ditto.
19058 (vfloat16m1x4_t): Ditto.
19059 (vfloat16m1x5_t): Ditto.
19060 (vfloat16m1x6_t): Ditto.
19061 (vfloat16m1x7_t): Ditto.
19062 (vfloat16m1x8_t): Ditto.
19063 (vfloat16m2x2_t): Ditto.
19064 (vfloat16m2x3_t): Ditto.
19065 (vfloat16m2x4_t): Ditto.
19066 (vfloat16m4x2_t): Ditto.
19067 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
19068 * config/riscv/vector.md: add tuple mode in attr sew.
19070 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
19073 * config/i386/i386.md (plusminusmult): New code iterator.
19074 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
19075 (movq_<mode>_to_sse): New expander.
19076 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
19077 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
19078 as a wrapper around V4SFmode operation.
19079 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
19080 nonimmediate_operand.
19081 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
19082 operand 2 predicates to nonimmediate_operand.
19083 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
19084 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
19085 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
19086 operand 2 predicates to nonimmediate_operand.
19087 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
19088 nonimmediate_operand.
19089 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
19090 operand 2 predicates to nonimmediate_operand.
19091 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
19092 (<smaxmin:code>v2sf3): Ditto.
19093 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
19094 predicates to nonimmediate_operand.
19095 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
19096 operand 1 and operand 2 predicates to nonimmediate_operand.
19097 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
19098 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
19099 (*mmx_haddv2sf3_low): Ditto.
19100 (*mmx_hsubv2sf3_low): Ditto.
19101 (vec_addsubv2sf3): Ditto.
19102 (*mmx_maskcmpv2sf3_comm): Remove.
19103 (*mmx_maskcmpv2sf3): Remove.
19104 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
19105 (vcond<V2FI:mode>v2sf): Ditto.
19108 (fnmav2sf4): Ditto.
19109 (fnmsv2sf4): Ditto.
19110 (fix_truncv2sfv2si2): Ditto.
19111 (fixuns_truncv2sfv2si2): Ditto.
19112 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
19113 Change operand 1 predicate to nonimmediate_operand.
19114 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
19115 (floatunsv2siv2sf2): Ditto.
19116 (mmx_floatv2siv2sf2): Remove SSE alternatives.
19117 Change operand 1 predicate to nonimmediate_operand.
19118 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
19119 (rintv2sf2): Ditto.
19120 (lrintv2sfv2si2): Ditto.
19121 (ceilv2sf2): Ditto.
19122 (lceilv2sfv2si2): Ditto.
19123 (floorv2sf2): Ditto.
19124 (lfloorv2sfv2si2): Ditto.
19125 (btruncv2sf2): Ditto.
19126 (roundv2sf2): Ditto.
19127 (lroundv2sfv2si2): Ditto.
19128 (*mmx_roundv2sf2): Remove.
19130 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
19132 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
19134 2023-07-26 Richard Biener <rguenther@suse.de>
19136 PR tree-optimization/110799
19137 * tree-ssa-pre.cc (compute_avail): More thoroughly match
19138 up TBAA behavior of redundant loads.
19140 2023-07-26 Jakub Jelinek <jakub@redhat.com>
19142 PR tree-optimization/110755
19143 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
19144 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
19145 it is exact op1 + (-op1) or op1 - op1.
19147 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
19150 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
19151 operands output with "x".
19153 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19155 * range-op.cc (class operator_absu): Add update_bitmask.
19156 (operator_absu::update_bitmask): New.
19158 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19160 * range-op-mixed.h (class operator_abs): Add update_bitmask.
19161 * range-op.cc (operator_abs::update_bitmask): New.
19163 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19165 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
19166 * range-op.cc (operator_bitwise_not::update_bitmask): New.
19168 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19170 * range-op.cc (update_known_bitmask): Handle unary operators.
19172 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
19174 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
19176 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
19178 * config/riscv/riscv.md: Likewise.
19180 2023-07-26 Jan Hubicka <jh@suse.cz>
19182 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
19183 if we divide by zero.
19185 2023-07-25 David Faust <david.faust@oracle.com>
19187 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
19188 enclosing parentheses for pseudo-C dialect.
19189 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
19190 operands of pseudo-C dialect output templates where needed.
19191 (zero_extendqidi2): Likewise.
19192 (zero_extendsidi2): Likewise.
19193 (*mov<MM:mode>): Likewise.
19195 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
19197 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
19198 (bit_value_mult_const): Same.
19199 (get_individual_bits): Same.
19201 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
19204 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
19205 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
19206 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
19207 (minmax_op): New int attribute.
19208 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
19209 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
19210 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
19211 pattern to fmaxdf3.
19212 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
19214 2023-07-24 David Faust <david.faust@oracle.com>
19216 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
19218 2023-07-24 Drew Ross <drross@redhat.com>
19219 Jakub Jelinek <jakub@redhat.com>
19221 PR middle-end/109986
19222 * generic-match-head.cc (bitwise_equal_p): New macro.
19223 * gimple-match-head.cc (bitwise_equal_p): New macro.
19224 (gimple_nop_convert): Declare.
19225 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
19226 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
19228 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
19230 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
19231 single quote rather than backquote in diagnostic.
19233 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
19236 * config/bpf/bpf.opt: New command-line option -msdiv.
19237 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
19238 * config/bpf/bpf.cc (bpf_option_override): Initialize
19240 * doc/invoke.texi (eBPF Options): Document -msdiv.
19242 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
19244 * config/riscv/riscv.cc (riscv_option_override): Spell out
19245 greater than and use cannot in diagnostic string.
19247 2023-07-24 Richard Biener <rguenther@suse.de>
19249 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
19250 (_slp_tree::vec_stmts): Remove.
19251 (SLP_TREE_VEC_STMTS): Remove.
19252 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
19253 (_slp_tree::_slp_tree): Adjust.
19254 (_slp_tree::~_slp_tree): Likewise.
19255 (vect_get_slp_vect_def): Simplify.
19256 (vect_get_slp_defs): Likewise.
19257 (vect_transform_slp_perm_load_1): Adjust.
19258 (vect_add_slp_permutation): Likewise.
19259 (vect_schedule_slp_node): Likewise.
19260 (vectorize_slp_instance_root_stmt): Likewise.
19261 (vect_schedule_scc): Likewise.
19262 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
19263 (vectorizable_call): Likewise.
19264 (vectorizable_call): Likewise.
19265 (vect_create_vectorized_demotion_stmts): Likewise.
19266 (vectorizable_conversion): Likewise.
19267 (vectorizable_assignment): Likewise.
19268 (vectorizable_shift): Likewise.
19269 (vectorizable_operation): Likewise.
19270 (vectorizable_load): Likewise.
19271 (vectorizable_condition): Likewise.
19272 (vectorizable_comparison): Likewise.
19273 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
19274 (vectorize_fold_left_reduction): Use push_vec_def.
19275 (vect_transform_reduction): Likewise.
19276 (vect_transform_cycle_phi): Likewise.
19277 (vectorizable_lc_phi): Likewise.
19278 (vectorizable_phi): Likewise.
19279 (vectorizable_recurr): Likewise.
19280 (vectorizable_induction): Likewise.
19281 (vectorizable_live_operation): Likewise.
19283 2023-07-24 Richard Biener <rguenther@suse.de>
19285 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
19287 2023-07-24 Richard Biener <rguenther@suse.de>
19289 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
19290 * config/i386/i386-expand.cc: Likewise.
19291 * config/i386/i386-features.cc: Likewise.
19292 * config/i386/i386-options.cc: Likewise.
19294 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
19296 * tree-vect-stmts.cc (vectorizable_conversion): Handle
19297 more demotion/promotion for modifier == NONE.
19299 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
19304 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
19305 (extzv<mode>): Likewise.
19306 (insv<mode>): Likewise.
19307 (*testqi_ext_3): Likewise.
19308 (*btr<mode>_2): Likewise.
19309 (define_split): Likewise.
19310 (*btsq_imm): Likewise.
19311 (*btrq_imm): Likewise.
19312 (*btcq_imm): Likewise.
19313 (define_peephole2 x3): Likewise.
19314 (*bt<mode>): Likewise
19315 (*bt<mode>_mask): New define_insn_and_split.
19316 (*jcc_bt<mode>): Use QImode for offsets.
19317 (*jcc_bt<mode>_1): Delete obsolete pattern.
19318 (*jcc_bt<mode>_mask): Use QImode offsets.
19319 (*jcc_bt<mode>_mask_1): Likewise.
19320 (define_split): Likewise.
19321 (*bt<mode>_setcqi): Likewise.
19322 (*bt<mode>_setncqi): Likewise.
19323 (*bt<mode>_setnc<mode>): Likewise.
19324 (*bt<mode>_setncqi_2): Likewise.
19325 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
19326 (bmi2_bzhi_<mode>3): Use QImode offsets.
19327 (*bmi2_bzhi_<mode>3): Likewise.
19328 (*bmi2_bzhi_<mode>3_1): Likewise.
19329 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
19330 (@tbm_bextri_<mode>): Likewise.
19332 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
19334 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
19335 * config/bpf/bpf.opt (mkernel): Remove option.
19336 * config/bpf/bpf.cc (bpf_target_macros): Do not define
19337 BPF_KERNEL_VERSION_CODE.
19339 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
19342 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
19343 (mbswap): New option.
19344 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
19345 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
19346 * config/bpf/bpf.md: Use bswap instructions if available for
19347 bswap* insn, and fix constraint.
19348 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
19350 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19352 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
19353 (mask_len_fold_left_plus_<mode>): Ditto.
19354 * config/riscv/riscv-protos.h (enum insn_type): New enum.
19355 (enum reduction_type): Ditto.
19356 (expand_reduction): Add in-order reduction.
19357 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
19358 (expand_reduction): Add in-order reduction.
19360 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19362 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
19363 (vectorize_fold_left_reduction): Ditto.
19364 (vectorizable_reduction): Ditto.
19365 (vect_transform_reduction): Ditto.
19367 2023-07-24 Richard Biener <rguenther@suse.de>
19369 PR tree-optimization/110777
19370 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
19371 Avoid propagating abnormals.
19373 2023-07-24 Richard Biener <rguenther@suse.de>
19375 PR tree-optimization/110766
19376 * tree-scalar-evolution.cc
19377 (analyze_and_compute_bitwise_induction_effect): Check the PHI
19378 is defined in the loop header.
19380 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
19382 PR tree-optimization/110740
19383 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
19384 loop with a single scalar iteration.
19386 2023-07-24 Pan Li <pan2.li@intel.com>
19388 * config/riscv/riscv-vector-builtins-shapes.cc
19389 (struct alu_frm_def): Take range check.
19391 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
19394 * config/riscv/predicates.md (const_0_operand): Add back
19397 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
19399 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
19400 64-bit insertions into TImode optimizations with -O0, unless
19401 the function has the "naked" attribute (for PR target/110533).
19403 2023-07-22 Andrew Pinski <apinski@marvell.com>
19406 * rtl.h (extended_count): Change last argument type
19409 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
19411 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
19412 (extzv<mode>): Likewise.
19413 (insv<mode>): Likewise.
19414 (*testqi_ext_3): Likewise.
19415 (*btr<mode>_2): Likewise.
19416 (define_split): Likewise.
19417 (*btsq_imm): Likewise.
19418 (*btrq_imm): Likewise.
19419 (*btcq_imm): Likewise.
19420 (define_peephole2 x3): Likewise.
19421 (*bt<mode>): Likewise
19422 (*bt<mode>_mask): New define_insn_and_split.
19423 (*jcc_bt<mode>): Use QImode for offsets.
19424 (*jcc_bt<mode>_1): Delete obsolete pattern.
19425 (*jcc_bt<mode>_mask): Use QImode offsets.
19426 (*jcc_bt<mode>_mask_1): Likewise.
19427 (define_split): Likewise.
19428 (*bt<mode>_setcqi): Likewise.
19429 (*bt<mode>_setncqi): Likewise.
19430 (*bt<mode>_setnc<mode>): Likewise.
19431 (*bt<mode>_setncqi_2): Likewise.
19432 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
19433 (bmi2_bzhi_<mode>3): Use QImode offsets.
19434 (*bmi2_bzhi_<mode>3): Likewise.
19435 (*bmi2_bzhi_<mode>3_1): Likewise.
19436 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
19437 (@tbm_bextri_<mode>): Likewise.
19439 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
19441 * config/bfin/bfin.md (ones): Fix length computation.
19443 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
19445 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
19446 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
19447 instead of FRAME_POINTER_REGNUM to spill pseudos.
19449 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
19450 Richard Biener <rguenther@suse.de>
19453 * gimplify.cc (gimplify_compound_lval): If the array's type
19454 is error_mark_node then return GS_ERROR.
19456 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
19459 * config/bpf/bpf.opt: Added option -masm=<dialect>.
19460 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
19461 * config/bpf/bpf.cc (bpf_print_register): New function.
19462 (bpf_print_register): Support pseudo-c syntax for registers.
19463 (bpf_print_operand_address): Likewise.
19464 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
19465 (ASSEMBLER_DIALECT): Define.
19466 * config/bpf/bpf.md: Added pseudo-c templates.
19467 * doc/invoke.texi (-masm=): New eBPF option item.
19469 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
19471 * config/bpf/bpf.md: fixed template for neg instruction.
19473 2023-07-21 Jan Hubicka <jh@suse.cz>
19476 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
19477 profiles by vectorization factor.
19478 (vect_transform_loop): Check for flat profiles.
19480 2023-07-21 Jan Hubicka <jh@suse.cz>
19482 * cfgloop.h (maybe_flat_loop_profile): Declare
19483 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
19484 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
19486 2023-07-21 Jan Hubicka <jh@suse.cz>
19488 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
19489 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
19490 * predict.cc (estimate_bb_frequencies): Likewise.
19491 * profile.cc (branch_prob): Likewise.
19492 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
19494 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
19496 * config.in: Regenerate.
19497 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
19498 (LINK_COMMAND_SPEC_A): Add demangle handling.
19499 * configure: Regenerate.
19500 * configure.ac: Detect linker support for '-demangle'.
19502 2023-07-21 Jan Hubicka <jh@suse.cz>
19504 * sreal.cc (sreal::to_nearest_int): New.
19505 (sreal_verify_basics): Verify also to_nearest_int.
19506 (verify_aritmetics): Likewise.
19507 (sreal_verify_conversions): New.
19508 (sreal_cc_tests): Call sreal_verify_conversions.
19509 * sreal.h: (sreal::to_nearest_int): Declare
19511 2023-07-21 Jan Hubicka <jh@suse.cz>
19513 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
19514 (should_duplicate_loop_header_p): Return info on profitability.
19515 (do_while_loop_p): Watch for constant conditionals.
19516 (update_profile_after_ch): Do not sanity check that all
19517 static exits are taken.
19518 (ch_base::copy_headers): Run on all loops.
19519 (pass_ch::process_loop_p): Improve heuristics by handling also
19520 do_while loop and duplicating shortest sequence containing all
19523 2023-07-21 Jan Hubicka <jh@suse.cz>
19525 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
19526 tests first; update finite_p flag.
19528 2023-07-21 Jan Hubicka <jh@suse.cz>
19530 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
19531 * cfgloop.h (print_loop_info): Declare.
19532 * tree-cfg.cc (print_loop_info): Break out from ...; add
19533 printing of missing fields and profile
19534 (print_loop): ... here.
19536 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19538 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
19540 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19542 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
19543 (vectorizable_operation): Ditto.
19545 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19547 * config/riscv/autovec.md: Align order of mask and len.
19548 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
19549 (expand_gather_scatter): Ditto.
19550 * doc/md.texi: Ditto.
19551 * internal-fn.cc (add_len_and_mask_args): Ditto.
19552 (add_mask_and_len_args): Ditto.
19553 (expand_partial_load_optab_fn): Ditto.
19554 (expand_partial_store_optab_fn): Ditto.
19555 (expand_scatter_store_optab_fn): Ditto.
19556 (expand_gather_load_optab_fn): Ditto.
19557 (internal_fn_len_index): Ditto.
19558 (internal_fn_mask_index): Ditto.
19559 (internal_len_load_store_bias): Ditto.
19560 * tree-vect-stmts.cc (vectorizable_store): Ditto.
19561 (vectorizable_load): Ditto.
19563 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19565 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
19566 (mask_len_load<mode><vm>): Ditto.
19567 (len_maskstore<mode><vm>): Ditto.
19568 (mask_len_store<mode><vm>): Ditto.
19569 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
19570 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
19571 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
19572 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
19573 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
19574 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
19575 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
19576 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
19577 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
19578 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
19579 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
19580 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
19581 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
19582 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
19583 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
19584 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
19585 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
19586 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
19587 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
19588 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
19589 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
19590 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
19591 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
19592 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
19593 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
19594 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
19595 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
19596 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
19597 * doc/md.texi: Ditto.
19598 * genopinit.cc (main): Ditto.
19599 (CMP_NAME): Ditto. Ditto.
19600 * gimple-fold.cc (arith_overflowed_p): Ditto.
19601 (gimple_fold_partial_load_store_mem_ref): Ditto.
19602 (gimple_fold_call): Ditto.
19603 * internal-fn.cc (len_maskload_direct): Ditto.
19604 (mask_len_load_direct): Ditto.
19605 (len_maskstore_direct): Ditto.
19606 (mask_len_store_direct): Ditto.
19607 (expand_call_mem_ref): Ditto.
19608 (expand_len_maskload_optab_fn): Ditto.
19609 (expand_mask_len_load_optab_fn): Ditto.
19610 (expand_len_maskstore_optab_fn): Ditto.
19611 (expand_mask_len_store_optab_fn): Ditto.
19612 (direct_len_maskload_optab_supported_p): Ditto.
19613 (direct_mask_len_load_optab_supported_p): Ditto.
19614 (direct_len_maskstore_optab_supported_p): Ditto.
19615 (direct_mask_len_store_optab_supported_p): Ditto.
19616 (internal_load_fn_p): Ditto.
19617 (internal_store_fn_p): Ditto.
19618 (internal_gather_scatter_fn_p): Ditto.
19619 (internal_fn_len_index): Ditto.
19620 (internal_fn_mask_index): Ditto.
19621 (internal_fn_stored_value_index): Ditto.
19622 (internal_len_load_store_bias): Ditto.
19623 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
19624 (MASK_LEN_GATHER_LOAD): Ditto.
19625 (LEN_MASK_LOAD): Ditto.
19626 (MASK_LEN_LOAD): Ditto.
19627 (LEN_MASK_SCATTER_STORE): Ditto.
19628 (MASK_LEN_SCATTER_STORE): Ditto.
19629 (LEN_MASK_STORE): Ditto.
19630 (MASK_LEN_STORE): Ditto.
19631 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
19632 (supports_vec_scatter_store_p): Ditto.
19633 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
19634 (target_supports_len_load_store_p): Ditto.
19635 * optabs.def (OPTAB_CD): Ditto.
19636 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
19637 (call_may_clobber_ref_p_1): Ditto.
19638 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
19639 (dse_optimize_stmt): Ditto.
19640 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
19641 (get_alias_ptr_type_for_ptr_address): Ditto.
19642 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
19643 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
19644 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
19645 (vect_get_strided_load_store_ops): Ditto.
19646 (vectorizable_store): Ditto.
19647 (vectorizable_load): Ditto.
19649 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
19651 * config/i386/i386.opt: Fix a typo.
19653 2023-07-21 Richard Biener <rguenther@suse.de>
19655 PR tree-optimization/88540
19656 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
19657 with NaNs but handle the simple case by if-converting to a
19660 2023-07-21 Andrew Pinski <apinski@marvell.com>
19662 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
19665 2023-07-21 Richard Biener <rguenther@suse.de>
19667 PR tree-optimization/110742
19668 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
19669 Do not materialize an edge permutation in an external node with
19671 (vect_slp_analyze_node_operations_1): Guard purely internal
19674 2023-07-21 Jan Hubicka <jh@suse.cz>
19676 * cfgloop.cc: Include sreal.h.
19677 (flow_loop_dump): Dump sreal iteration exsitmate.
19678 (get_estimated_loop_iterations): Update.
19679 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
19680 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
19681 (expected_loop_iterations_unbounded): Use new API.
19682 * cfgloopmanip.cc (scale_loop_profile): Use
19683 expected_loop_iterations_by_profile
19684 * predict.cc (pass_profile::execute): Likewise.
19685 * profile.cc (branch_prob): Likewise.
19686 * tree-ssa-loop-niter.cc: Include sreal.h.
19687 (estimate_numbers_of_iterations): Likewise
19689 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
19691 PR tree-optimization/110744
19692 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
19693 operand for ifn IFN_LEN_STORE.
19695 2023-07-21 liuhongt <hongtao.liu@intel.com>
19698 * common.opt: (fcf-protection=): Add EnumSet attribute to
19699 support combination of params.
19701 2023-07-21 David Malcolm <dmalcolm@redhat.com>
19703 PR middle-end/110612
19704 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
19706 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
19707 (table_geometry::table_y_to_canvas_y): Likewise.
19708 * text-art/table.h (table_geometry::m_table): Drop unused field.
19709 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
19712 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
19715 * config/i386/i386-features.cc
19716 (general_scalar_chain::compute_convert_gain): Calculate gain
19717 for extend higpart case.
19718 (general_scalar_chain::convert_op): Handle
19719 ASHIFTRT/ASHIFT combined RTX.
19720 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
19721 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
19722 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
19723 New define_insn_and_split pattern.
19724 (*extendv2di2_highpart_stv): Ditto.
19726 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
19728 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
19731 2023-07-20 Andrew Pinski <apinski@marvell.com>
19733 * combine.cc (dump_combine_stats): Remove.
19734 (dump_combine_total_stats): Remove.
19735 (total_attempts, total_merges, total_extras,
19736 total_successes): Remove.
19737 (combine_instructions): Don't increment total stats
19738 instead use statistics_counter_event.
19739 * dumpfile.cc (print_combine_total_stats): Remove.
19740 * dumpfile.h (print_combine_total_stats): Remove.
19741 (dump_combine_total_stats): Remove.
19742 * passes.cc (finish_optimization_passes):
19743 Don't call print_combine_total_stats.
19744 * rtl.h (dump_combine_total_stats): Remove.
19745 (dump_combine_stats): Remove.
19747 2023-07-20 Jan Hubicka <jh@suse.cz>
19749 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
19752 2023-07-20 Martin Jambor <mjambor@suse.cz>
19754 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
19755 (analyzer-text-art-ideal-canvas-width): Likewise.
19756 (analyzer-text-art-string-ellipsis-head-len): Likewise.
19757 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
19759 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19761 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
19762 Refine code structure.
19764 2023-07-20 Jan Hubicka <jh@suse.cz>
19766 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
19767 (get_range_query): ... this one; do
19768 (static_loop_exit): Add query parametr, turn ranger to reference.
19769 (loop_static_stmt_p): New function.
19770 (loop_static_op_p): New function.
19771 (loop_iv_derived_p): Remove.
19772 (loop_combined_static_and_iv_p): New function.
19773 (should_duplicate_loop_header_p): Discover combined onditionals;
19774 do not track iv derived; improve dumps.
19775 (pass_ch::execute): Fix whitespace.
19777 2023-07-20 Richard Biener <rguenther@suse.de>
19779 PR tree-optimization/110204
19780 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
19781 Look through copies generated by PRE.
19783 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
19785 * tree-vect-stmts.cc (get_group_load_store_type): Account for
19786 `gap` when checking if need to peel twice.
19788 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
19790 PR middle-end/77928
19791 * doc/extend.texi: Document iseqsig builtin.
19792 * builtins.cc (fold_builtin_iseqsig): New function.
19793 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
19794 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
19795 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
19797 2023-07-20 Pan Li <pan2.li@intel.com>
19799 * config/riscv/vector.md: Fix incorrect match_operand.
19801 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
19803 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
19804 force_reg, to use SUBREG rather than create a new pseudo when
19805 inserting DFmode fields into TImode with insvti_{high,low}part.
19806 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
19807 define_insn_and_split...
19808 (*concatditi3_3): 64-bit implementation. Provide alternative
19809 that allows register allocation to use SSE registers that is
19810 split into vec_concatv2di after reload.
19811 (*concatsidi3_3): 32-bit implementation.
19813 2023-07-20 Richard Biener <rguenther@suse.de>
19815 PR middle-end/61747
19816 * internal-fn.cc (expand_vec_cond_optab_fn): When the
19817 value operands are equal to the original comparison operands
19818 preserve that equality by re-using the comparison expansion.
19819 * optabs.cc (emit_conditional_move): When the value operands
19820 are equal to the comparison operands and would be forced to
19821 a register by prepare_cmp_insn do so earlier, preserving the
19824 2023-07-20 Pan Li <pan2.li@intel.com>
19826 * config/riscv/vector.md: Align pattern format.
19828 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
19830 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
19831 Granite Rapids{, D} from documentation.
19833 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19835 * config/riscv/autovec.md
19836 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
19837 Refactor RVV machine modes.
19838 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
19839 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19840 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
19841 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19842 (len_mask_gather_load<mode><mode>): Ditto.
19843 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
19844 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
19845 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19846 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
19847 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19848 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
19849 (len_mask_scatter_store<mode><mode>): Ditto.
19850 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
19851 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
19852 (ADJUST_NUNITS): Ditto.
19853 (ADJUST_ALIGNMENT): Ditto.
19854 (ADJUST_BYTESIZE): Ditto.
19855 (ADJUST_PRECISION): Ditto.
19856 (RVV_MODES): Ditto.
19857 (RVV_WHOLE_MODES): Ditto.
19858 (RVV_FRACT_MODE): Ditto.
19859 (RVV_NF8_MODES): Ditto.
19860 (RVV_NF4_MODES): Ditto.
19861 (VECTOR_MODES_WITH_PREFIX): Ditto.
19862 (VECTOR_MODE_WITH_PREFIX): Ditto.
19863 (RVV_TUPLE_MODES): Ditto.
19864 (RVV_NF2_MODES): Ditto.
19865 (RVV_TUPLE_PARTIAL_MODES): Ditto.
19866 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
19868 (TUPLE_ENTRY): Ditto.
19869 (get_vlmul): Ditto.
19871 (get_ratio): Ditto.
19872 (preferred_simd_mode): Ditto.
19873 (autovectorize_vector_modes): Ditto.
19874 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
19875 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
19876 (vbool64_t): Ditto.
19877 (vbool32_t): Ditto.
19878 (vbool16_t): Ditto.
19883 (vint8mf8_t): Ditto.
19884 (vuint8mf8_t): Ditto.
19885 (vint8mf4_t): Ditto.
19886 (vuint8mf4_t): Ditto.
19887 (vint8mf2_t): Ditto.
19888 (vuint8mf2_t): Ditto.
19889 (vint8m1_t): Ditto.
19890 (vuint8m1_t): Ditto.
19891 (vint8m2_t): Ditto.
19892 (vuint8m2_t): Ditto.
19893 (vint8m4_t): Ditto.
19894 (vuint8m4_t): Ditto.
19895 (vint8m8_t): Ditto.
19896 (vuint8m8_t): Ditto.
19897 (vint16mf4_t): Ditto.
19898 (vuint16mf4_t): Ditto.
19899 (vint16mf2_t): Ditto.
19900 (vuint16mf2_t): Ditto.
19901 (vint16m1_t): Ditto.
19902 (vuint16m1_t): Ditto.
19903 (vint16m2_t): Ditto.
19904 (vuint16m2_t): Ditto.
19905 (vint16m4_t): Ditto.
19906 (vuint16m4_t): Ditto.
19907 (vint16m8_t): Ditto.
19908 (vuint16m8_t): Ditto.
19909 (vint32mf2_t): Ditto.
19910 (vuint32mf2_t): Ditto.
19911 (vint32m1_t): Ditto.
19912 (vuint32m1_t): Ditto.
19913 (vint32m2_t): Ditto.
19914 (vuint32m2_t): Ditto.
19915 (vint32m4_t): Ditto.
19916 (vuint32m4_t): Ditto.
19917 (vint32m8_t): Ditto.
19918 (vuint32m8_t): Ditto.
19919 (vint64m1_t): Ditto.
19920 (vuint64m1_t): Ditto.
19921 (vint64m2_t): Ditto.
19922 (vuint64m2_t): Ditto.
19923 (vint64m4_t): Ditto.
19924 (vuint64m4_t): Ditto.
19925 (vint64m8_t): Ditto.
19926 (vuint64m8_t): Ditto.
19927 (vfloat16mf4_t): Ditto.
19928 (vfloat16mf2_t): Ditto.
19929 (vfloat16m1_t): Ditto.
19930 (vfloat16m2_t): Ditto.
19931 (vfloat16m4_t): Ditto.
19932 (vfloat16m8_t): Ditto.
19933 (vfloat32mf2_t): Ditto.
19934 (vfloat32m1_t): Ditto.
19935 (vfloat32m2_t): Ditto.
19936 (vfloat32m4_t): Ditto.
19937 (vfloat32m8_t): Ditto.
19938 (vfloat64m1_t): Ditto.
19939 (vfloat64m2_t): Ditto.
19940 (vfloat64m4_t): Ditto.
19941 (vfloat64m8_t): Ditto.
19942 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
19943 (TUPLE_ENTRY): Ditto.
19944 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
19945 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
19946 (riscv_v_adjust_nunits): Ditto.
19947 (riscv_v_adjust_bytesize): Ditto.
19948 (riscv_v_adjust_precision): Ditto.
19949 (riscv_convert_vector_bits): Ditto.
19950 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
19951 * config/riscv/riscv.md: Ditto.
19952 * config/riscv/vector-iterators.md: Ditto.
19953 * config/riscv/vector.md
19954 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
19955 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
19956 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19957 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
19958 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19959 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
19960 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
19961 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
19962 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
19963 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
19964 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
19965 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
19966 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
19967 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
19968 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
19969 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
19970 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
19971 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
19972 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
19973 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
19974 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
19975 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
19976 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
19977 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
19978 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
19979 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
19980 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
19981 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
19982 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
19983 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
19984 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
19985 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
19986 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
19988 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
19990 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
19991 (lra_asm_insn_error): New prototype.
19992 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
19994 (lra_spill): Call lra_update_fp2sp_elimination.
19995 * lra-eliminations.cc: Remove trailing spaces.
19996 (elimination_fp2sp_occured_p): New static flag.
19997 (lra_eliminate_regs_1): Set the flag up.
19998 (update_reg_eliminate): Modify the assert for stack to frame
19999 pointer elimination.
20000 (lra_update_fp2sp_elimination): New function.
20001 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
20003 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
20005 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
20007 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
20008 dependencies from target pragmas.
20009 * config/aarch64/arm_fp16.h (target): Likewise.
20010 * config/aarch64/arm_neon.h (target): Likewise.
20012 2023-07-19 Andrew Pinski <apinski@marvell.com>
20014 PR tree-optimization/110252
20015 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
20016 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
20017 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
20018 (match_simplify_replacement): Temporarily
20019 remove the flow sensitive info on the two statements that might
20022 2023-07-19 Andrew Pinski <apinski@marvell.com>
20024 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
20025 with flow_sensitive_info_storage.
20026 (follow_outer_ssa_edges): Update how to save off the flow
20028 (maybe_fold_comparisons_from_match_pd): Update restoring
20029 of flow sensitive info.
20030 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
20031 (flow_sensitive_info_storage::restore): New method.
20032 (flow_sensitive_info_storage::save_and_clear): New method.
20033 (flow_sensitive_info_storage::clear_storage): New method.
20034 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
20036 2023-07-19 Andrew Pinski <apinski@marvell.com>
20038 PR tree-optimization/110726
20039 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
20040 Add checks to make sure the type was one bit precision
20043 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20045 * doc/md.texi: Add mask_len_fold_left_plus.
20046 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
20047 (expand_mask_len_fold_left_optab_fn): Ditto.
20048 (direct_mask_len_fold_left_optab_supported_p): Ditto.
20049 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
20050 * optabs.def (OPTAB_D): Ditto.
20052 2023-07-19 Jakub Jelinek <jakub@redhat.com>
20054 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
20056 2023-07-19 Jakub Jelinek <jakub@redhat.com>
20058 PR tree-optimization/110731
20059 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
20060 divisor as UNSIGNED regardless of sgn.
20062 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
20064 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
20065 (standard_extensions_p): Add check.
20066 (riscv_subset_list::add): Just return NULL if it failed before.
20067 (riscv_subset_list::parse_std_ext): Continue parse when find a error
20068 (riscv_subset_list::parse): Just return NULL if it failed before.
20069 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
20071 2023-07-19 Jan Beulich <jbeulich@suse.com>
20073 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
20075 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
20076 gen_vec_extract_hi.
20077 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
20078 gen_vec_interleave_low. Rename local variable.
20080 2023-07-19 Jan Beulich <jbeulich@suse.com>
20082 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
20083 alternative. Move AVX512VL part of condition to new "enabled"
20086 2023-07-19 liuhongt <hongtao.liu@intel.com>
20089 * config/i386/i386-builtins.cc
20090 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
20091 (ix86_register_bf16_builtin_type): Ditto.
20092 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
20093 isn't available, undef the macros which are used to check the
20094 backend support of the _Float16/__bf16 types when building
20095 libstdc++ and libgcc.
20096 * config/i386/i386.cc (construct_container): Issue errors for
20097 HFmode/BFmode when TARGET_SSE2 is not available.
20098 (function_value_32): Ditto.
20099 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
20100 (ix86_libgcc_floating_mode_supported_p): Ditto.
20101 (ix86_emit_support_tinfos): Adjust codes.
20102 (ix86_invalid_conversion): Return diagnostic message string
20103 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
20104 (ix86_invalid_unary_op): New function.
20105 (ix86_invalid_binary_op): Ditto.
20106 (TARGET_INVALID_UNARY_OP): Define.
20107 (TARGET_INVALID_BINARY_OP): Define.
20108 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
20109 related instrinsics header files.
20110 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
20112 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
20114 * dwarf2asm.cc: Change FALSE to false.
20115 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
20116 * dwarf2out.cc (matches_main_base): Change return type from
20117 int to bool. Change "last_match" variable to bool.
20118 (dump_struct_debug): Change return type from int to bool.
20119 Change "matches" and "result" function arguments to bool.
20120 (is_pseudo_reg): Change return type from int to bool.
20121 (is_tagged_type): Ditto.
20122 (same_loc_p): Ditto.
20123 (same_dw_val_p): Change return type from int to bool and adjust
20124 function body accordingly.
20125 (same_attr_p): Ditto.
20126 (same_die_p): Ditto.
20127 (is_type_die): Ditto.
20128 (is_declaration_die): Ditto.
20129 (should_move_die_to_comdat): Ditto.
20130 (is_base_type): Ditto.
20131 (is_based_loc): Ditto.
20132 (local_scope_p): Ditto.
20133 (class_scope_p): Ditto.
20134 (class_or_namespace_scope_p): Ditto.
20135 (is_tagged_type): Ditto.
20136 (is_rust): Use void argument.
20137 (is_nested_in_subprogram): Change return type from int to bool.
20138 (contains_subprogram_definition): Ditto.
20139 (gen_struct_or_union_type_die): Change "nested", "complete"
20140 and "ns_decl" variables to bool.
20141 (is_naming_typedef_decl): Change FALSE to false.
20143 2023-07-18 Jan Hubicka <jh@suse.cz>
20145 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
20146 for queries not in headers.
20147 (static_loop_exit): Add basic blck parameter; update use of
20149 (should_duplicate_loop_header_p): Add ranger and static_exits
20150 parameter. Do not account statements that will be optimized
20151 out after duplicaiton in overall size. Add ranger query to
20153 (update_profile_after_ch): Take static_exits has set instead of
20154 single eliminated_edge.
20155 (ch_base::copy_headers): Do all analysis in the first pass;
20156 remember invariant_exits and static_exits.
20158 2023-07-18 Jason Merrill <jason@redhat.com>
20160 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
20162 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
20164 * doc/gm2.texi (Semantic checking): Change example testwithptr
20167 2023-07-18 Richard Biener <rguenther@suse.de>
20169 PR middle-end/105715
20170 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
20171 (pass_gimple_isel::execute): ... this. Duplicate
20172 comparison defs of COND_EXPRs.
20174 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20176 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
20177 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
20178 (riscv_convert_vector_bits): Ditto.
20180 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20182 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
20183 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
20185 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
20187 * config/s390/vx-builtins.md: New vsel pattern.
20189 2023-07-18 liuhongt <hongtao.liu@intel.com>
20192 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
20193 Remove # from assemble output.
20195 2023-07-18 liuhongt <hongtao.liu@intel.com>
20198 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
20199 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
20200 3 define_peephole2 after the pattern.
20202 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20204 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
20206 2023-07-18 Pan Li <pan2.li@intel.com>
20207 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20209 * config/riscv/riscv.cc (struct machine_function): Add new field.
20210 (riscv_static_frm_mode_p): New function.
20211 (riscv_emit_frm_mode_set): New function for emit FRM.
20212 (riscv_emit_mode_set): Extract function for FRM.
20213 (riscv_mode_needed): Fix the TODO.
20214 (riscv_mode_entry): Initial dynamic frm RTL.
20215 (riscv_mode_exit): Return DYN_EXIT.
20216 * config/riscv/riscv.md: Add rdfrm.
20217 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
20218 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
20220 (fsrmsi_backup): New pattern for swap.
20221 (fsrmsi_restore): New pattern for restore.
20222 (fsrmsi_restore_exit): New pattern for restore exit.
20223 (frrmsi): New pattern for backup.
20225 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
20227 * doc/extend.texi: Add @cindex on __auto_type.
20229 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
20231 * combine-stack-adj.cc (stack_memref_p): Change return type from
20232 int to bool and adjust function body accordingly.
20233 (rest_of_handle_stack_adjustments): Change return type to void.
20235 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
20237 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
20238 (cant_combine_insn_p): Change return type from int to bool and adjust
20239 function body accordingly.
20240 (can_combine_p): Ditto.
20241 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
20242 function arguments from int to bool.
20243 (contains_muldiv): Change return type from int to bool and adjust
20244 function body accordingly.
20245 (try_combine): Ditto. Change "new_direct_jump" pointer function
20246 argument from int to bool. Change "substed_i2", "substed_i1",
20247 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
20248 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
20249 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
20250 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
20251 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
20252 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
20254 (subst): Change "in_dest", "in_cond" and "unique_copy" function
20255 arguments from int to bool.
20256 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
20257 arguments from int to bool.
20258 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
20259 function argument from int to bool.
20260 (force_int_to_mode): Change "just_select" function argument
20261 from int to bool. Change "next_select" variable to bool.
20262 (rtx_equal_for_field_assignment_p): Change return type from
20263 int to bool and adjust function body accordingly.
20264 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
20265 argument from int to bool.
20266 (get_last_value_validate): Change return type from int to bool
20267 and adjust function body accordingly.
20268 (reg_dead_at_p): Ditto.
20269 (reg_bitfield_target_p): Ditto.
20270 (combine_instructions): Ditto. Change "new_direct_jump"
20272 (can_combine_p): Change return type from int to bool
20273 and adjust function body accordingly.
20274 (likely_spilled_retval_p): Ditto.
20275 (can_change_dest_mode): Change "added_sets" function argument
20277 (find_split_point): Change "unsignedp" variable to bool.
20278 (simplify_if_then_else): Change "comparison_p" and "swapped"
20280 (simplify_set): Change "other_changed" variable to bool.
20281 (expand_compound_operation): Change "unsignedp" variable to bool.
20282 (force_to_mode): Change "just_select" function argument
20283 from int to bool. Change "next_select" variable to bool.
20284 (extended_count): Change "unsignedp" function argument to bool.
20285 (simplify_shift_const_1): Change "complement_p" variable to bool.
20286 (simplify_comparison): Change "changed" variable to bool.
20287 (rest_of_handle_combine): Change return type to void.
20289 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
20292 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
20294 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
20296 * ira.cc (setup_reg_class_relations): Continue
20297 if regclass cl3 is hard_reg_set_empty_p.
20299 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20301 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
20303 2023-07-17 Martin Jambor <mjambor@suse.cz>
20305 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
20308 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
20310 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
20312 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
20315 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
20316 recur add all implied extensions.
20317 (riscv_subset_list::check_implied_ext): Add new method.
20318 (riscv_subset_list::parse): Call checker check_implied_ext.
20319 * config/riscv/riscv-subset.h: Add new method.
20321 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20323 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
20324 (reduc_smax_scal_<mode>): Ditto.
20325 (reduc_umax_scal_<mode>): Ditto.
20326 (reduc_smin_scal_<mode>): Ditto.
20327 (reduc_umin_scal_<mode>): Ditto.
20328 (reduc_and_scal_<mode>): Ditto.
20329 (reduc_ior_scal_<mode>): Ditto.
20330 (reduc_xor_scal_<mode>): Ditto.
20331 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
20332 (expand_reduction): New function.
20333 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
20334 (emit_vlmax_fp_reduction_insn): Ditto.
20335 (get_m1_mode): Ditto.
20336 (expand_cond_len_binop): Fix name.
20337 (expand_reduction): New function
20338 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
20339 (validate_change_or_fail): New function.
20340 (change_insn): Fix VSETVL BUG.
20341 (change_vsetvl_insn): Ditto.
20342 (pass_vsetvl::backward_demand_fusion): Ditto.
20343 (pass_vsetvl::df_post_optimization): Ditto.
20345 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
20347 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
20349 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
20351 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
20352 Remove parameter name from declaration of unused parameter.
20354 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
20356 PR tree-optimization/110652
20357 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
20360 2023-07-17 Richard Biener <rguenther@suse.de>
20362 PR tree-optimization/110669
20363 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
20364 Check we matched a header PHI.
20366 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
20368 * tree-ssanames.cc (set_bitmask): New.
20369 * tree-ssanames.h (set_bitmask): New.
20371 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
20373 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
20375 * value-range.h (irange_bitmask::union_): Normalize beforehand.
20376 (irange_bitmask::intersect): Same.
20378 2023-07-17 Andrew Pinski <apinski@marvell.com>
20380 PR tree-optimization/95923
20381 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
20383 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
20385 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
20386 to the std::sort comparison lambda function const.
20388 2023-07-17 Andrew Pinski <apinski@marvell.com>
20390 PR tree-optimization/110666
20391 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
20393 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
20395 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
20396 Arrow Lake and Arrow Lake S.
20397 * common/config/i386/i386-common.cc:
20398 (processor_name): Add arrowlake.
20399 (processor_alias_table): Add arrow lake, arrow lake s and lunar
20401 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
20402 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
20403 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
20404 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
20406 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
20408 * config/i386/i386-options.cc (m_ARROWLAKE): New.
20409 (processor_cost_table): Add arrowlake.
20410 * config/i386/i386.h (enum processor_type):
20411 Add PROCESSOR_ARROWLAKE.
20412 * config/i386/x86-tune.def: Add m_ARROWLAKE.
20413 * doc/extend.texi: Add arrowlake and arrowlake-s.
20414 * doc/invoke.texi: Ditto.
20416 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20418 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
20419 have the same iterator. Also renaming all the occurence to
20421 (usdot_prod<mode>): New define_expand.
20422 (udot_prod<mode>): Ditto.
20424 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20426 * common/config/i386/cpuinfo.h (get_available_features):
20428 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
20429 OPTION_MASK_ISA2_SM4_UNSET): New.
20430 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
20431 (ix86_handle_option): Handle -msm4.
20432 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20434 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20436 * config.gcc: Add sm4intrin.h.
20437 * config/i386/cpuid.h (bit_SM4): New.
20438 * config/i386/i386-builtin.def (BDESC): Add new builtins.
20439 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20441 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
20442 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
20443 (ix86_valid_target_attribute_inner_p): Handle sm4.
20444 * config/i386/i386.opt: Add option -msm4.
20445 * config/i386/immintrin.h: Include sm4intrin.h
20446 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
20447 (vsm4rnds4_<mode>): Ditto.
20448 * doc/extend.texi: Document sm4.
20449 * doc/invoke.texi: Document -msm4.
20450 * doc/sourcebuild.texi: Document target sm4.
20451 * config/i386/sm4intrin.h: New file.
20453 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20455 * common/config/i386/cpuinfo.h (get_available_features):
20457 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
20458 OPTION_MASK_ISA2_SHA512_UNSET): New.
20459 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
20460 (ix86_handle_option): Handle -msha512.
20461 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20462 Add FEATURE_SHA512.
20463 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20465 * config.gcc: Add sha512intrin.h.
20466 * config/i386/cpuid.h (bit_SHA512): New.
20467 * config/i386/i386-builtin-types.def:
20468 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
20469 * config/i386/i386-builtin.def (BDESC): Add new builtins.
20470 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20472 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
20473 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
20474 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
20475 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
20476 (ix86_valid_target_attribute_inner_p): Handle sha512.
20477 * config/i386/i386.opt: Add option -msha512.
20478 * config/i386/immintrin.h: Include sha512intrin.h.
20479 * config/i386/sse.md (vsha512msg1): New define insn.
20480 (vsha512msg2): Ditto.
20481 (vsha512rnds2): Ditto.
20482 * doc/extend.texi: Document sha512.
20483 * doc/invoke.texi: Document -msha512.
20484 * doc/sourcebuild.texi: Document target sha512.
20485 * config/i386/sha512intrin.h: New file.
20487 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20489 * common/config/i386/cpuinfo.h (get_available_features):
20491 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
20492 OPTION_MASK_ISA2_SM3_UNSET): New.
20493 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
20494 (ix86_handle_option): Handle -msm3.
20495 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20497 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20499 * config.gcc: Add sm3intrin.h
20500 * config/i386/cpuid.h (bit_SM3): New.
20501 * config/i386/i386-builtin-types.def:
20502 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
20503 * config/i386/i386-builtin.def (BDESC): Add new builtins.
20504 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20506 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
20507 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
20508 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
20509 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
20510 (ix86_valid_target_attribute_inner_p): Handle sm3.
20511 * config/i386/i386.opt: Add option -msm3.
20512 * config/i386/immintrin.h: Include sm3intrin.h.
20513 * config/i386/sse.md (vsm3msg1): New define insn.
20515 (vsm3rnds2): Ditto.
20516 * doc/extend.texi: Document sm3.
20517 * doc/invoke.texi: Document -msm3.
20518 * doc/sourcebuild.texi: Document target sm3.
20519 * config/i386/sm3intrin.h: New file.
20521 2023-07-17 Kong Lingling <lingling.kong@intel.com>
20522 Haochen Jiang <haochen.jiang@intel.com>
20524 * common/config/i386/cpuinfo.h (get_available_features): Detect
20526 * common/config/i386/i386-common.cc
20527 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
20528 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
20529 (ix86_handle_option): Handle -mavxvnniint16.
20530 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20531 Add FEATURE_AVXVNNIINT16.
20532 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20534 * config.gcc: Add avxvnniint16.h.
20535 * config/i386/avxvnniint16intrin.h: New file.
20536 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
20537 * config/i386/i386-builtin.def: Add new builtins.
20538 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20540 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
20541 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
20542 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
20543 * config/i386/i386.opt: Add option -mavxvnniint16.
20544 * config/i386/immintrin.h: Include avxvnniint16.h.
20545 * config/i386/sse.md
20546 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
20547 * doc/extend.texi: Document avxvnniint16.
20548 * doc/invoke.texi: Document -mavxvnniint16.
20549 * doc/sourcebuild.texi: Document target avxvnniint16.
20551 2023-07-16 Jan Hubicka <jh@suse.cz>
20553 PR middle-end/110649
20554 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
20555 (vect_transform_loop): Move scale_profile_for_vect_loop after
20556 upper bound updates.
20558 2023-07-16 Jan Hubicka <jh@suse.cz>
20560 PR tree-optimization/110649
20561 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
20562 probability of the if-then-else construct.
20564 2023-07-16 Jan Hubicka <jh@suse.cz>
20566 PR middle-end/110649
20567 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
20569 2023-07-15 Andrew Pinski <apinski@marvell.com>
20571 * doc/contrib.texi: Update my entry.
20573 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
20575 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
20577 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
20578 (tld_load): Likewise.
20579 (tgd_load_pic): Change to expander.
20580 (tld_load_pic, tld_offset_load, tp_load): Likewise.
20581 (tie_load_pic, tle_load): Likewise.
20582 (tgd_load_picsi, tgd_load_picdi): New.
20583 (tld_load_picsi, tld_load_picdi): New.
20584 (tld_offset_load<P:mode>): New.
20585 (tp_load<P:mode>): New.
20586 (tie_load_picsi, tie_load_picdi): New.
20587 (tle_load<P:mode>): New.
20589 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20591 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
20592 (vcmlaq_rot180, vcmlaq_rot270): New.
20593 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
20594 (vcmlaq_rot180, vcmlaq_rot270): New.
20595 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
20596 (vcmlaq_rot180, vcmlaq_rot270): New.
20597 * config/arm/arm-mve-builtins.cc
20598 (function_instance::has_inactive_argument): Handle vcmlaq,
20599 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
20600 * config/arm/arm_mve.h (vcmlaq): Delete.
20601 (vcmlaq_rot180): Delete.
20602 (vcmlaq_rot270): Delete.
20603 (vcmlaq_rot90): Delete.
20604 (vcmlaq_m): Delete.
20605 (vcmlaq_rot180_m): Delete.
20606 (vcmlaq_rot270_m): Delete.
20607 (vcmlaq_rot90_m): Delete.
20608 (vcmlaq_f16): Delete.
20609 (vcmlaq_rot180_f16): Delete.
20610 (vcmlaq_rot270_f16): Delete.
20611 (vcmlaq_rot90_f16): Delete.
20612 (vcmlaq_f32): Delete.
20613 (vcmlaq_rot180_f32): Delete.
20614 (vcmlaq_rot270_f32): Delete.
20615 (vcmlaq_rot90_f32): Delete.
20616 (vcmlaq_m_f32): Delete.
20617 (vcmlaq_m_f16): Delete.
20618 (vcmlaq_rot180_m_f32): Delete.
20619 (vcmlaq_rot180_m_f16): Delete.
20620 (vcmlaq_rot270_m_f32): Delete.
20621 (vcmlaq_rot270_m_f16): Delete.
20622 (vcmlaq_rot90_m_f32): Delete.
20623 (vcmlaq_rot90_m_f16): Delete.
20624 (__arm_vcmlaq_f16): Delete.
20625 (__arm_vcmlaq_rot180_f16): Delete.
20626 (__arm_vcmlaq_rot270_f16): Delete.
20627 (__arm_vcmlaq_rot90_f16): Delete.
20628 (__arm_vcmlaq_f32): Delete.
20629 (__arm_vcmlaq_rot180_f32): Delete.
20630 (__arm_vcmlaq_rot270_f32): Delete.
20631 (__arm_vcmlaq_rot90_f32): Delete.
20632 (__arm_vcmlaq_m_f32): Delete.
20633 (__arm_vcmlaq_m_f16): Delete.
20634 (__arm_vcmlaq_rot180_m_f32): Delete.
20635 (__arm_vcmlaq_rot180_m_f16): Delete.
20636 (__arm_vcmlaq_rot270_m_f32): Delete.
20637 (__arm_vcmlaq_rot270_m_f16): Delete.
20638 (__arm_vcmlaq_rot90_m_f32): Delete.
20639 (__arm_vcmlaq_rot90_m_f16): Delete.
20640 (__arm_vcmlaq): Delete.
20641 (__arm_vcmlaq_rot180): Delete.
20642 (__arm_vcmlaq_rot270): Delete.
20643 (__arm_vcmlaq_rot90): Delete.
20644 (__arm_vcmlaq_m): Delete.
20645 (__arm_vcmlaq_rot180_m): Delete.
20646 (__arm_vcmlaq_rot270_m): Delete.
20647 (__arm_vcmlaq_rot90_m): Delete.
20649 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20651 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
20652 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
20653 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
20654 (mve_insn): Add vcmla.
20655 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
20657 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
20659 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
20660 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
20661 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
20662 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
20664 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
20666 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20668 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
20669 (vcmulq_rot180, vcmulq_rot270): New.
20670 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
20671 (vcmulq_rot180, vcmulq_rot270): New.
20672 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
20673 (vcmulq_rot180, vcmulq_rot270): New.
20674 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
20675 (vcmulq_rot270): Delete.
20676 (vcmulq_rot180): Delete.
20678 (vcmulq_m): Delete.
20679 (vcmulq_rot180_m): Delete.
20680 (vcmulq_rot270_m): Delete.
20681 (vcmulq_rot90_m): Delete.
20682 (vcmulq_x): Delete.
20683 (vcmulq_rot90_x): Delete.
20684 (vcmulq_rot180_x): Delete.
20685 (vcmulq_rot270_x): Delete.
20686 (vcmulq_rot90_f16): Delete.
20687 (vcmulq_rot270_f16): Delete.
20688 (vcmulq_rot180_f16): Delete.
20689 (vcmulq_f16): Delete.
20690 (vcmulq_rot90_f32): Delete.
20691 (vcmulq_rot270_f32): Delete.
20692 (vcmulq_rot180_f32): Delete.
20693 (vcmulq_f32): Delete.
20694 (vcmulq_m_f32): Delete.
20695 (vcmulq_m_f16): Delete.
20696 (vcmulq_rot180_m_f32): Delete.
20697 (vcmulq_rot180_m_f16): Delete.
20698 (vcmulq_rot270_m_f32): Delete.
20699 (vcmulq_rot270_m_f16): Delete.
20700 (vcmulq_rot90_m_f32): Delete.
20701 (vcmulq_rot90_m_f16): Delete.
20702 (vcmulq_x_f16): Delete.
20703 (vcmulq_x_f32): Delete.
20704 (vcmulq_rot90_x_f16): Delete.
20705 (vcmulq_rot90_x_f32): Delete.
20706 (vcmulq_rot180_x_f16): Delete.
20707 (vcmulq_rot180_x_f32): Delete.
20708 (vcmulq_rot270_x_f16): Delete.
20709 (vcmulq_rot270_x_f32): Delete.
20710 (__arm_vcmulq_rot90_f16): Delete.
20711 (__arm_vcmulq_rot270_f16): Delete.
20712 (__arm_vcmulq_rot180_f16): Delete.
20713 (__arm_vcmulq_f16): Delete.
20714 (__arm_vcmulq_rot90_f32): Delete.
20715 (__arm_vcmulq_rot270_f32): Delete.
20716 (__arm_vcmulq_rot180_f32): Delete.
20717 (__arm_vcmulq_f32): Delete.
20718 (__arm_vcmulq_m_f32): Delete.
20719 (__arm_vcmulq_m_f16): Delete.
20720 (__arm_vcmulq_rot180_m_f32): Delete.
20721 (__arm_vcmulq_rot180_m_f16): Delete.
20722 (__arm_vcmulq_rot270_m_f32): Delete.
20723 (__arm_vcmulq_rot270_m_f16): Delete.
20724 (__arm_vcmulq_rot90_m_f32): Delete.
20725 (__arm_vcmulq_rot90_m_f16): Delete.
20726 (__arm_vcmulq_x_f16): Delete.
20727 (__arm_vcmulq_x_f32): Delete.
20728 (__arm_vcmulq_rot90_x_f16): Delete.
20729 (__arm_vcmulq_rot90_x_f32): Delete.
20730 (__arm_vcmulq_rot180_x_f16): Delete.
20731 (__arm_vcmulq_rot180_x_f32): Delete.
20732 (__arm_vcmulq_rot270_x_f16): Delete.
20733 (__arm_vcmulq_rot270_x_f32): Delete.
20734 (__arm_vcmulq_rot90): Delete.
20735 (__arm_vcmulq_rot270): Delete.
20736 (__arm_vcmulq_rot180): Delete.
20737 (__arm_vcmulq): Delete.
20738 (__arm_vcmulq_m): Delete.
20739 (__arm_vcmulq_rot180_m): Delete.
20740 (__arm_vcmulq_rot270_m): Delete.
20741 (__arm_vcmulq_rot90_m): Delete.
20742 (__arm_vcmulq_x): Delete.
20743 (__arm_vcmulq_rot90_x): Delete.
20744 (__arm_vcmulq_rot180_x): Delete.
20745 (__arm_vcmulq_rot270_x): Delete.
20747 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20749 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
20750 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
20751 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
20752 (MVE_VCADDQ_VCMULQ_M): New.
20753 (mve_insn): Add vcmul.
20754 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
20757 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
20759 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
20760 @mve_<mve_insn>q<mve_rot>_f<mode>.
20761 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
20762 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
20763 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
20765 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20767 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
20768 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
20769 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
20770 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
20771 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
20772 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
20773 * config/arm/arm-mve-builtins-functions.h (class
20774 unspec_mve_function_exact_insn_rot): New.
20775 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
20776 (vcaddq_rot270): Delete.
20777 (vhcaddq_rot90): Delete.
20778 (vhcaddq_rot270): Delete.
20779 (vcaddq_rot270_m): Delete.
20780 (vcaddq_rot90_m): Delete.
20781 (vhcaddq_rot270_m): Delete.
20782 (vhcaddq_rot90_m): Delete.
20783 (vcaddq_rot90_x): Delete.
20784 (vcaddq_rot270_x): Delete.
20785 (vhcaddq_rot90_x): Delete.
20786 (vhcaddq_rot270_x): Delete.
20787 (vcaddq_rot90_u8): Delete.
20788 (vcaddq_rot270_u8): Delete.
20789 (vhcaddq_rot90_s8): Delete.
20790 (vhcaddq_rot270_s8): Delete.
20791 (vcaddq_rot90_s8): Delete.
20792 (vcaddq_rot270_s8): Delete.
20793 (vcaddq_rot90_u16): Delete.
20794 (vcaddq_rot270_u16): Delete.
20795 (vhcaddq_rot90_s16): Delete.
20796 (vhcaddq_rot270_s16): Delete.
20797 (vcaddq_rot90_s16): Delete.
20798 (vcaddq_rot270_s16): Delete.
20799 (vcaddq_rot90_u32): Delete.
20800 (vcaddq_rot270_u32): Delete.
20801 (vhcaddq_rot90_s32): Delete.
20802 (vhcaddq_rot270_s32): Delete.
20803 (vcaddq_rot90_s32): Delete.
20804 (vcaddq_rot270_s32): Delete.
20805 (vcaddq_rot90_f16): Delete.
20806 (vcaddq_rot270_f16): Delete.
20807 (vcaddq_rot90_f32): Delete.
20808 (vcaddq_rot270_f32): Delete.
20809 (vcaddq_rot270_m_s8): Delete.
20810 (vcaddq_rot270_m_s32): Delete.
20811 (vcaddq_rot270_m_s16): Delete.
20812 (vcaddq_rot270_m_u8): Delete.
20813 (vcaddq_rot270_m_u32): Delete.
20814 (vcaddq_rot270_m_u16): Delete.
20815 (vcaddq_rot90_m_s8): Delete.
20816 (vcaddq_rot90_m_s32): Delete.
20817 (vcaddq_rot90_m_s16): Delete.
20818 (vcaddq_rot90_m_u8): Delete.
20819 (vcaddq_rot90_m_u32): Delete.
20820 (vcaddq_rot90_m_u16): Delete.
20821 (vhcaddq_rot270_m_s8): Delete.
20822 (vhcaddq_rot270_m_s32): Delete.
20823 (vhcaddq_rot270_m_s16): Delete.
20824 (vhcaddq_rot90_m_s8): Delete.
20825 (vhcaddq_rot90_m_s32): Delete.
20826 (vhcaddq_rot90_m_s16): Delete.
20827 (vcaddq_rot270_m_f32): Delete.
20828 (vcaddq_rot270_m_f16): Delete.
20829 (vcaddq_rot90_m_f32): Delete.
20830 (vcaddq_rot90_m_f16): Delete.
20831 (vcaddq_rot90_x_s8): Delete.
20832 (vcaddq_rot90_x_s16): Delete.
20833 (vcaddq_rot90_x_s32): Delete.
20834 (vcaddq_rot90_x_u8): Delete.
20835 (vcaddq_rot90_x_u16): Delete.
20836 (vcaddq_rot90_x_u32): Delete.
20837 (vcaddq_rot270_x_s8): Delete.
20838 (vcaddq_rot270_x_s16): Delete.
20839 (vcaddq_rot270_x_s32): Delete.
20840 (vcaddq_rot270_x_u8): Delete.
20841 (vcaddq_rot270_x_u16): Delete.
20842 (vcaddq_rot270_x_u32): Delete.
20843 (vhcaddq_rot90_x_s8): Delete.
20844 (vhcaddq_rot90_x_s16): Delete.
20845 (vhcaddq_rot90_x_s32): Delete.
20846 (vhcaddq_rot270_x_s8): Delete.
20847 (vhcaddq_rot270_x_s16): Delete.
20848 (vhcaddq_rot270_x_s32): Delete.
20849 (vcaddq_rot90_x_f16): Delete.
20850 (vcaddq_rot90_x_f32): Delete.
20851 (vcaddq_rot270_x_f16): Delete.
20852 (vcaddq_rot270_x_f32): Delete.
20853 (__arm_vcaddq_rot90_u8): Delete.
20854 (__arm_vcaddq_rot270_u8): Delete.
20855 (__arm_vhcaddq_rot90_s8): Delete.
20856 (__arm_vhcaddq_rot270_s8): Delete.
20857 (__arm_vcaddq_rot90_s8): Delete.
20858 (__arm_vcaddq_rot270_s8): Delete.
20859 (__arm_vcaddq_rot90_u16): Delete.
20860 (__arm_vcaddq_rot270_u16): Delete.
20861 (__arm_vhcaddq_rot90_s16): Delete.
20862 (__arm_vhcaddq_rot270_s16): Delete.
20863 (__arm_vcaddq_rot90_s16): Delete.
20864 (__arm_vcaddq_rot270_s16): Delete.
20865 (__arm_vcaddq_rot90_u32): Delete.
20866 (__arm_vcaddq_rot270_u32): Delete.
20867 (__arm_vhcaddq_rot90_s32): Delete.
20868 (__arm_vhcaddq_rot270_s32): Delete.
20869 (__arm_vcaddq_rot90_s32): Delete.
20870 (__arm_vcaddq_rot270_s32): Delete.
20871 (__arm_vcaddq_rot270_m_s8): Delete.
20872 (__arm_vcaddq_rot270_m_s32): Delete.
20873 (__arm_vcaddq_rot270_m_s16): Delete.
20874 (__arm_vcaddq_rot270_m_u8): Delete.
20875 (__arm_vcaddq_rot270_m_u32): Delete.
20876 (__arm_vcaddq_rot270_m_u16): Delete.
20877 (__arm_vcaddq_rot90_m_s8): Delete.
20878 (__arm_vcaddq_rot90_m_s32): Delete.
20879 (__arm_vcaddq_rot90_m_s16): Delete.
20880 (__arm_vcaddq_rot90_m_u8): Delete.
20881 (__arm_vcaddq_rot90_m_u32): Delete.
20882 (__arm_vcaddq_rot90_m_u16): Delete.
20883 (__arm_vhcaddq_rot270_m_s8): Delete.
20884 (__arm_vhcaddq_rot270_m_s32): Delete.
20885 (__arm_vhcaddq_rot270_m_s16): Delete.
20886 (__arm_vhcaddq_rot90_m_s8): Delete.
20887 (__arm_vhcaddq_rot90_m_s32): Delete.
20888 (__arm_vhcaddq_rot90_m_s16): Delete.
20889 (__arm_vcaddq_rot90_x_s8): Delete.
20890 (__arm_vcaddq_rot90_x_s16): Delete.
20891 (__arm_vcaddq_rot90_x_s32): Delete.
20892 (__arm_vcaddq_rot90_x_u8): Delete.
20893 (__arm_vcaddq_rot90_x_u16): Delete.
20894 (__arm_vcaddq_rot90_x_u32): Delete.
20895 (__arm_vcaddq_rot270_x_s8): Delete.
20896 (__arm_vcaddq_rot270_x_s16): Delete.
20897 (__arm_vcaddq_rot270_x_s32): Delete.
20898 (__arm_vcaddq_rot270_x_u8): Delete.
20899 (__arm_vcaddq_rot270_x_u16): Delete.
20900 (__arm_vcaddq_rot270_x_u32): Delete.
20901 (__arm_vhcaddq_rot90_x_s8): Delete.
20902 (__arm_vhcaddq_rot90_x_s16): Delete.
20903 (__arm_vhcaddq_rot90_x_s32): Delete.
20904 (__arm_vhcaddq_rot270_x_s8): Delete.
20905 (__arm_vhcaddq_rot270_x_s16): Delete.
20906 (__arm_vhcaddq_rot270_x_s32): Delete.
20907 (__arm_vcaddq_rot90_f16): Delete.
20908 (__arm_vcaddq_rot270_f16): Delete.
20909 (__arm_vcaddq_rot90_f32): Delete.
20910 (__arm_vcaddq_rot270_f32): Delete.
20911 (__arm_vcaddq_rot270_m_f32): Delete.
20912 (__arm_vcaddq_rot270_m_f16): Delete.
20913 (__arm_vcaddq_rot90_m_f32): Delete.
20914 (__arm_vcaddq_rot90_m_f16): Delete.
20915 (__arm_vcaddq_rot90_x_f16): Delete.
20916 (__arm_vcaddq_rot90_x_f32): Delete.
20917 (__arm_vcaddq_rot270_x_f16): Delete.
20918 (__arm_vcaddq_rot270_x_f32): Delete.
20919 (__arm_vcaddq_rot90): Delete.
20920 (__arm_vcaddq_rot270): Delete.
20921 (__arm_vhcaddq_rot90): Delete.
20922 (__arm_vhcaddq_rot270): Delete.
20923 (__arm_vcaddq_rot270_m): Delete.
20924 (__arm_vcaddq_rot90_m): Delete.
20925 (__arm_vhcaddq_rot270_m): Delete.
20926 (__arm_vhcaddq_rot90_m): Delete.
20927 (__arm_vcaddq_rot90_x): Delete.
20928 (__arm_vcaddq_rot270_x): Delete.
20929 (__arm_vhcaddq_rot90_x): Delete.
20930 (__arm_vhcaddq_rot270_x): Delete.
20932 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20934 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
20935 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
20936 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
20937 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
20938 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
20939 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
20941 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
20942 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
20943 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
20944 VHCADDQ_ROT270_M_S.
20945 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
20946 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
20947 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
20948 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
20949 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
20950 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
20952 (VCADDQ_ROT270_M): Delete.
20953 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
20954 (VCADDQ_ROT90_M): Delete.
20955 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
20956 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
20958 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
20959 (mve_vcaddq<mve_rot><mode>): Rename into ...
20960 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
20961 (mve_vcaddq_rot270_m_<supf><mode>)
20962 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
20963 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
20964 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
20965 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
20967 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
20969 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
20972 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
20973 preparation statement over braces for a single statement.
20974 (*bt<mode>_setncqi): Likewise.
20975 (*bt<mode>_setncqi_2): New define_insn_and_split.
20977 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
20979 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
20980 case inserting of 64-bit values into a TImode register, to handle
20981 both DImode and DFmode using either *insvti_lowpart_1
20982 or *isnvti_highpart_1.
20984 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
20987 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
20988 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
20989 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
20990 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
20991 when the original source contains a paradoxical subreg.
20993 2023-07-14 Jan Hubicka <jh@suse.cz>
20995 * passes.cc (execute_function_todo): Remove
20996 TODO_rebuild_frequencies
20997 * passes.def: Add rebuild_frequencies pass.
20998 * predict.cc (estimate_bb_frequencies): Drop
21000 (tree_estimate_probability): Update call of
21001 estimate_bb_frequencies.
21002 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
21003 first and do not rebuild if not necessary.
21004 (class pass_rebuild_frequencies): New.
21005 (make_pass_rebuild_frequencies): New.
21006 * profile-count.h: Add profile_count::very_large_p.
21007 * tree-inline.cc (optimize_inline_calls): Do not return
21008 TODO_rebuild_frequencies
21009 * tree-pass.h (TODO_rebuild_frequencies): Remove.
21010 (make_pass_rebuild_frequencies): Declare.
21012 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21014 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
21015 * config/riscv/riscv-protos.h (enum insn_type): New enum.
21016 (expand_cond_len_ternop): New function.
21017 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
21018 (expand_cond_len_ternop): Ditto.
21020 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
21023 * config/bpf/bpf.md: Enable instruction scheduling.
21025 2023-07-14 Tamar Christina <tamar.christina@arm.com>
21027 PR tree-optimization/109154
21028 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
21029 (struct bb_predicate): Add no_predicate_stmts.
21030 (set_bb_predicate): Increase predicate count.
21031 (set_bb_predicate_gimplified_stmts): Conditionally initialize
21032 no_predicate_stmts.
21033 (get_bb_num_predicate_stmts): New.
21034 (init_bb_predicate): Initialzie no_predicate_stmts.
21035 (release_bb_predicate): Cleanup no_predicate_stmts.
21036 (insert_gimplified_predicates): Preserve no_predicate_stmts.
21038 2023-07-14 Tamar Christina <tamar.christina@arm.com>
21040 PR tree-optimization/109154
21041 * tree-if-conv.cc (gen_simplified_condition,
21042 gen_phi_nest_statement): New.
21043 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
21045 2023-07-14 Richard Biener <rguenther@suse.de>
21047 * gimple.h (gimple_phi_arg): New const overload.
21048 (gimple_phi_arg_def): Make gimple arg const.
21049 (gimple_phi_arg_def_from_edge): New inline function.
21050 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
21052 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
21053 new inline function.
21054 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
21056 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
21058 * common/config/riscv/riscv-common.cc:
21059 (riscv_implied_info): Add zihintntl item.
21060 (riscv_ext_version_table): Ditto.
21061 (riscv_ext_flag_table): Ditto.
21062 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
21063 (TARGET_ZIHINTNTL): Ditto.
21065 2023-07-14 Die Li <lidie@eswincomputing.com>
21067 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
21069 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
21072 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
21073 used by the address of the following memory operand.
21075 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
21078 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
21079 deallocate alloca-only frame.
21081 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
21084 * config/darwin.h (DARWIN_PLATFORM_ID): New.
21085 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
21086 and SDK data to the static linker.
21088 2023-07-13 Carl Love <cel@us.ibm.com>
21090 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
21091 built-in definition return type.
21092 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
21093 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
21094 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
21095 argument to return FPSCR fields.
21096 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
21097 the return value. Add description for
21098 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
21100 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
21103 * config/alpha/alpha.cc (alpha_emit_set_long_const):
21104 Always use DImode when constructing long const.
21106 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
21108 * haifa-sched.cc: Change TRUE/FALSE to true/false.
21110 * lra-assigns.cc: Ditto.
21111 * lra-constraints.cc: Ditto.
21112 * sel-sched.cc: Ditto.
21114 2023-07-13 Andrew Pinski <apinski@marvell.com>
21116 PR tree-optimization/110293
21117 PR tree-optimization/110539
21118 * match.pd: Expand the `x != (typeof x)(x == 0)`
21119 pattern to handle where the inner and outer comparsions
21120 are either `!=` or `==` and handle other constants
21123 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
21125 PR middle-end/109520
21126 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
21127 (lra_asm_insn_error): New prototype.
21128 * lra.cc: Include rtl_error.h.
21129 (lra_set_insn_recog_data): Initialize asm_reloads_num.
21130 (lra_asm_insn_error): New func whose code is taken from ...
21131 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
21132 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
21134 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21136 * genmatch.cc (commutative_op): Add COND_LEN_*
21137 * internal-fn.cc (first_commutative_argument): Ditto.
21139 (get_unconditional_internal_fn): Ditto.
21140 (can_interpret_as_conditional_op_p): Ditto.
21141 (internal_fn_len_index): Ditto.
21142 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
21143 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
21144 (convert_mult_to_fma): Ditto.
21145 (math_opts_dom_walker::after_dom_children): Ditto.
21147 2023-07-13 Pan Li <pan2.li@intel.com>
21149 * config/riscv/riscv.cc (vxrm_rtx): New static var.
21151 (global_state_unknown_p): Removed.
21152 (riscv_entity_mode_after): Removed.
21153 (asm_insn_p): New function.
21154 (vxrm_unknown_p): New function for fixed-point.
21155 (riscv_vxrm_mode_after): Ditto.
21156 (frm_unknown_dynamic_p): New function for floating-point.
21157 (riscv_frm_mode_after): Ditto.
21158 (riscv_mode_after): Leverage new functions.
21160 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21162 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
21163 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
21164 calling vect_model_load_cost.
21166 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21168 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
21169 handle memory_access_type VMAT_CONTIGUOUS, remove some
21170 VMAT_CONTIGUOUS_PERMUTE related handlings.
21171 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
21172 without calling vect_model_load_cost.
21174 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21176 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
21177 VMAT_CONTIGUOUS_REVERSE any more.
21178 (vectorizable_load): Adjust the costing handling on
21179 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
21181 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21183 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
21184 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
21185 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
21186 assert it will never get VMAT_LOAD_STORE_LANES.
21188 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21190 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
21191 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
21192 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
21193 remove VMAT_GATHER_SCATTER related handlings and the related parameter
21196 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21198 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
21199 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
21200 vect_model_load_cost.
21201 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
21202 VMAT_STRIDED_SLP any more, and remove their related handlings.
21204 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21206 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
21207 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
21208 hoisting decision and without calling vect_model_load_cost.
21209 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
21210 and remove VMAT_INVARIANT related handlings.
21212 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21214 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
21215 on costing with one extra argument cost_vec.
21216 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
21217 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
21218 gs_info.decl set any more.
21220 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21222 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
21223 to vect_model_load_cost down to some different transform paths
21224 according to the handlings of different vect_memory_access_types.
21226 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
21228 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
21230 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21232 * config/riscv/autovec.md
21233 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
21234 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
21235 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
21236 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
21237 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
21238 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
21239 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
21240 (len_mask_gather_load<mode><mode>): Ditto.
21241 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
21242 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
21243 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
21244 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
21245 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
21246 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
21247 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
21248 (len_mask_scatter_store<mode><mode>): Ditto.
21249 * config/riscv/predicates.md (const_1_operand): New predicate.
21250 (vector_gs_scale_operand_16): Ditto.
21251 (vector_gs_scale_operand_32): Ditto.
21252 (vector_gs_scale_operand_64): Ditto.
21253 (vector_gs_extension_operand): Ditto.
21254 (vector_gs_scale_operand_16_rv32): Ditto.
21255 (vector_gs_scale_operand_32_rv32): Ditto.
21256 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
21257 (expand_gather_scatter): New function.
21258 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
21259 (emit_vlmax_masked_store_insn): New function.
21260 (emit_nonvlmax_masked_store_insn): Ditto.
21261 (modulo_sel_indices): Ditto.
21262 (expand_vec_perm): Fix SLP for gather/scatter.
21263 (prepare_gather_scatter): New function.
21264 (expand_gather_scatter): Ditto.
21265 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
21266 (subreg:SI (DI CONST_POLY_INT)).
21267 * config/riscv/vector-iterators.md: Add gather/scatter.
21268 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
21269 (@vec_duplicate<mode>): Ditto.
21270 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
21272 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
21274 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21276 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
21277 * config/riscv/riscv-protos.h (enum insn_type): New enum.
21278 (expand_cond_len_binop): New function.
21279 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
21280 (emit_nonvlmax_fp_tu_insn): Ditto.
21281 (need_fp_rounding_p): Ditto.
21282 (expand_cond_len_binop): Ditto.
21283 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
21284 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
21286 2023-07-12 Jan Hubicka <jh@suse.cz>
21288 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
21289 (gimple_duplicate_seme_region): ... this; break out profile updating
21291 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
21292 (ch_base::copy_headers): Update.
21293 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
21294 (gimple_duplicate_seme_region): ... this.
21296 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
21298 PR tree-optimization/107043
21299 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
21301 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
21303 PR tree-optimization/107053
21304 * gimple-range-op.cc (cfn_popcount): Use known set bits.
21306 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
21308 * ira.cc (equiv_init_varies_p): Change return type from int to bool
21309 and adjust function body accordingly.
21310 (equiv_init_movable_p): Ditto.
21311 (memref_used_between_p): Ditto.
21312 * lra-constraints.cc (valid_address_p): Ditto.
21314 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
21316 * range-op.cc (irange_to_masked_value): Remove.
21317 (update_known_bitmask): Update irange value/mask pair instead of
21318 only updating nonzero bits.
21320 2023-07-12 Jan Hubicka <jh@suse.cz>
21322 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
21323 parameter and rewrite profile updating code to handle edges elimination.
21324 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
21325 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
21326 (loop_iv_derived_p): New function.
21327 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
21328 of PHIs and propagation of IV derived variables.
21329 (ch_base::copy_headers): Pass around the invariant edges hash set.
21331 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
21333 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
21334 (last_active_insn): Change "skip_use_p" function argument to bool.
21335 (noce_operand_ok): Change return type from int to bool.
21336 (find_cond_trap): Ditto.
21337 (block_jumps_and_fallthru_p): Change "fallthru_p" and
21338 "jump_p" variables to bool.
21339 (noce_find_if_block): Change return type from int to bool.
21340 (cond_exec_find_if_block): Ditto.
21341 (find_if_case_1): Ditto.
21342 (find_if_case_2): Ditto.
21343 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
21344 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
21345 (cond_exec_process_insns): Change return type from int to bool.
21346 Change "mod_ok" function arg to bool.
21347 (cond_exec_process_if_block): Change return type from int to bool.
21348 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
21350 (noce_emit_store_flag): Change return type from int to bool.
21351 Change "reversep" function arg to bool. Change "cond_complex"
21353 (noce_try_move): Change return type from int to bool.
21354 (noce_try_ifelse_collapse): Ditto.
21355 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
21356 (noce_try_addcc): Change return type from int to bool. Change
21357 "subtract" variable to bool.
21358 (noce_try_store_flag_constants): Change return type from int to bool.
21359 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
21360 (noce_try_cmove): Change return type from int to bool.
21361 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
21362 (noce_try_minmax): Change return type from int to bool. Change
21363 "unsignedp" variable to bool.
21364 (noce_try_abs): Change return type from int to bool. Change
21365 "negate" variable to bool.
21366 (noce_try_sign_mask): Change return type from int to bool.
21367 (noce_try_move): Ditto.
21368 (noce_try_store_flag_constants): Ditto.
21369 (noce_try_cmove): Ditto.
21370 (noce_try_cmove_arith): Ditto.
21371 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
21372 (noce_try_bitop): Change return type from int to bool.
21373 (noce_operand_ok): Ditto.
21374 (noce_convert_multiple_sets): Ditto.
21375 (noce_convert_multiple_sets_1): Ditto.
21376 (noce_process_if_block): Ditto.
21377 (check_cond_move_block): Ditto.
21378 (cond_move_process_if_block): Ditto. Change "success_p"
21380 (rest_of_handle_if_conversion): Change return type to void.
21382 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21384 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
21386 (get_conditional_len_internal_fn): New function.
21387 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
21388 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
21391 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21394 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
21396 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21399 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
21400 define_insn_and_split derived from *add<dwi>3_doubleword_concat
21401 and *add<dwi>3_doubleword_zext.
21403 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21406 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
21407 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
21408 (peephole2): Simplify rega = 0; rega op= rega cases.
21410 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21412 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
21413 testing a TImode SUBREG of a 128-bit vector register against
21414 zero, use a PTEST instruction instead of first moving it to
21415 a pair of scalar registers.
21417 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
21419 * genopinit.cc (main): Adjust maximal number of optabs and
21421 * gensupport.cc (find_optab): Shift optab by 20 and mode by
21423 * optabs-query.h (optab_handler): Ditto.
21424 (convert_optab_handler): Ditto.
21426 2023-07-12 Richard Biener <rguenther@suse.de>
21428 PR tree-optimization/110630
21429 * tree-vect-slp.cc (vect_add_slp_permutation): New
21430 offset parameter, honor that for the extract code generation.
21431 (vectorizable_slp_permutation_1): Handle offsetted identities.
21433 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21435 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
21436 (umul<mode>3_highpart): Ditto.
21438 2023-07-12 Jan Beulich <jbeulich@suse.com>
21440 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
21441 alternative. Adjust original last alternative's "prefix"
21442 attribute to maybe_evex.
21444 2023-07-12 Jan Beulich <jbeulich@suse.com>
21446 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
21447 vbroadcastss for AVX2. New AVX512F alternative.
21448 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
21449 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
21451 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21453 * config/riscv/peephole.md: Remove XThead* peephole passes.
21454 * config/riscv/thead.md: Include thead-peephole.md.
21455 * config/riscv/thead-peephole.md: New file.
21457 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21459 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
21461 (riscv_index_reg_class): Likewise.
21462 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
21463 (riscv_index_reg_class): New function.
21464 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
21465 riscv_index_reg_class().
21466 (REGNO_OK_FOR_INDEX_P): Call new function
21467 riscv_regno_ok_for_index_p().
21469 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21471 * config/riscv/riscv-protos.h (enum riscv_address_type):
21472 New location of type definition.
21473 (struct riscv_address_info): Likewise.
21474 * config/riscv/riscv.cc (enum riscv_address_type):
21475 Old location of type definition.
21476 (struct riscv_address_info): Likewise.
21478 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21480 * config/riscv/riscv.h (Xmode): New macro.
21482 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21484 * config/riscv/riscv.cc (riscv_print_operand_address): Use
21485 output_addr_const rather than riscv_print_operand.
21487 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21489 * config/riscv/thead.md: Adjust constraints of th_addsl.
21491 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21493 * config/riscv/thead.cc (th_mempair_operands_p):
21494 Fix documentation of th_mempair_order_operands().
21496 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21498 * config/riscv/thead.cc (th_mempair_save_regs):
21499 Emit REG_FRAME_RELATED_EXPR notes in prologue.
21501 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21503 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
21504 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
21505 New XThead extension INSN.
21506 (*zero_extendsidi2_th_extu): New XThead extension INSN.
21507 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
21509 2023-07-12 liuhongt <hongtao.liu@intel.com>
21513 * config/i386/predicates.md
21514 (int_float_vector_all_ones_operand): New predicate.
21515 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
21517 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
21519 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
21521 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
21522 define_insn_and_split to avoid false dependence.
21523 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
21524 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
21525 of operands 1 to '0' to avoid false dependence.
21526 (*andnot<mode>3): Ditto.
21527 (iornot<mode>3): Ditto.
21528 (*<nlogic><mode>3): Ditto.
21530 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
21532 * common/config/i386/cpuinfo.h
21533 (get_intel_cpu): Handle Granite Rapids D.
21534 * common/config/i386/i386-common.cc:
21535 (processor_alias_table): Add graniterapids-d.
21536 * common/config/i386/i386-cpuinfo.h
21537 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
21538 * config.gcc: Add -march=graniterapids-d.
21539 * config/i386/driver-i386.cc (host_detect_local_cpu):
21540 Handle graniterapids-d.
21541 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
21542 * doc/extend.texi: Add graniterapids-d.
21543 * doc/invoke.texi: Ditto.
21545 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
21547 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
21548 Add OPTION_MASK_ISA_AVX512VL.
21549 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
21552 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21554 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
21555 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
21556 (shuffle_compress_patterns): Ditto.
21557 (expand_vec_perm_const_1): Ditto.
21559 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
21561 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
21562 * cfghooks.h (struct cfg_hooks): Change return type of
21563 verify_flow_info from integer to bool.
21564 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
21565 (can_delete_label_p): Ditto.
21566 (rtl_verify_flow_info): Change return type from int to bool
21567 and adjust function body accordingly. Change "err" variable to bool.
21568 (rtl_verify_flow_info_1): Ditto.
21569 (free_bb_for_insn): Change return type to void.
21570 (rtl_merge_blocks): Change "b_empty" variable to bool.
21571 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
21572 (verify_hot_cold_block_grouping): Change return type from int to bool.
21573 Change "err" variable to bool.
21574 (rtl_verify_edges): Ditto.
21575 (rtl_verify_bb_insns): Ditto.
21576 (rtl_verify_bb_pointers): Ditto.
21577 (rtl_verify_bb_insn_chain): Ditto.
21578 (rtl_verify_fallthru): Ditto.
21579 (rtl_verify_bb_layout): Ditto.
21580 (purge_all_dead_edges): Change "purged" variable to bool.
21581 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
21582 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
21583 (load_killed_in_block_p): Change return type from int to bool
21584 and adjust function body accordingly.
21585 (oprs_unchanged_p): Return true/false.
21586 (rest_of_handle_gcse2): Change return type to void.
21587 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
21588 int to bool. Change "err" variable to bool.
21590 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
21592 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
21594 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21596 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
21597 * internal-fn.cc (cond_len_unary_direct): Ditto.
21598 (cond_len_binary_direct): Ditto.
21599 (cond_len_ternary_direct): Ditto.
21600 (expand_cond_len_unary_optab_fn): Ditto.
21601 (expand_cond_len_binary_optab_fn): Ditto.
21602 (expand_cond_len_ternary_optab_fn): Ditto.
21603 (direct_cond_len_unary_optab_supported_p): Ditto.
21604 (direct_cond_len_binary_optab_supported_p): Ditto.
21605 (direct_cond_len_ternary_optab_supported_p): Ditto.
21606 * internal-fn.def (COND_LEN_ADD): Ditto.
21607 (COND_LEN_SUB): Ditto.
21608 (COND_LEN_MUL): Ditto.
21609 (COND_LEN_DIV): Ditto.
21610 (COND_LEN_MOD): Ditto.
21611 (COND_LEN_RDIV): Ditto.
21612 (COND_LEN_MIN): Ditto.
21613 (COND_LEN_MAX): Ditto.
21614 (COND_LEN_FMIN): Ditto.
21615 (COND_LEN_FMAX): Ditto.
21616 (COND_LEN_AND): Ditto.
21617 (COND_LEN_IOR): Ditto.
21618 (COND_LEN_XOR): Ditto.
21619 (COND_LEN_SHL): Ditto.
21620 (COND_LEN_SHR): Ditto.
21621 (COND_LEN_FMA): Ditto.
21622 (COND_LEN_FMS): Ditto.
21623 (COND_LEN_FNMA): Ditto.
21624 (COND_LEN_FNMS): Ditto.
21625 (COND_LEN_NEG): Ditto.
21626 * optabs.def (OPTAB_D): Ditto.
21628 2023-07-11 Richard Biener <rguenther@suse.de>
21630 PR tree-optimization/110614
21631 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
21632 SLP splats are not suitable for re-align ops.
21634 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
21636 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
21638 (vsx_quad_dform_memory_operand): Likewise.
21640 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
21642 * reorg.cc (stop_search_p): Change return type from int to bool
21643 and adjust function body accordingly.
21644 (resource_conflicts_p): Ditto.
21645 (insn_references_resource_p): Change return type from int to bool.
21646 (insn_sets_resource_p): Ditto.
21647 (redirect_with_delay_slots_safe_p): Ditto.
21648 (condition_dominates_p): Change return type from int to bool
21649 and adjust function body accordingly.
21650 (redirect_with_delay_list_safe_p): Ditto.
21651 (check_annul_list_true_false): Ditto. Change "annul_true_p"
21652 function argument to bool.
21653 (steal_delay_list_from_target): Change "pannul_p" function
21654 argument to bool pointer. Change "must_annul" and "used_annul"
21655 variables from int to bool.
21656 (steal_delay_list_from_fallthrough): Ditto.
21657 (own_thread_p): Change return type from int to bool and adjust
21658 function body accordingly. Change "allow_fallthrough" function
21660 (reorg_redirect_jump): Change return type from int to bool.
21661 (fill_simple_delay_slots): Change "non_jumps_p" function
21662 argument from int to bool. Change "maybe_never" varible to bool.
21663 (fill_slots_from_thread): Change "likely", "thread_if_true" and
21664 "own_thread" function arguments to bool. Change "lose" and
21665 "must_annul" variables to bool.
21666 (delete_from_delay_slot): Change "had_barrier" variable to bool.
21667 (try_merge_delay_insns): Change "annul_p" variable to bool.
21668 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
21670 (rest_of_handle_delay_slots): Change return type from int to void
21671 and adjust function body accordingly.
21673 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
21675 * doc/extend.texi (RISC-V Operand Modifiers): New.
21677 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21679 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
21680 (insert_insn_end_basic_block): Ditto.
21681 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
21682 * gcse.cc (insert_insn_end_basic_block): Export as global function.
21683 * gcse.h (insert_insn_end_basic_block): Ditto.
21685 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
21688 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
21689 (arm_builtin_decl): Hahndle MVE builtins.
21690 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
21691 (add_unique_function): Fix handling of
21692 __ARM_MVE_PRESERVE_USER_NAMESPACE.
21693 (add_overloaded_function): Likewise.
21694 * config/arm/arm-protos.h (builtin_decl): New declaration.
21696 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
21698 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
21700 2023-07-10 Xi Ruoyao <xry111@xry111.site>
21702 PR tree-optimization/110557
21703 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
21704 Ensure the output sign-extended if necessary.
21706 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
21708 * config/i386/i386.md (peephole2): Transform xchg insn with a
21709 REG_UNUSED note to a (simple) move.
21710 (*insvti_lowpart_1): New define_insn_and_split.
21711 (*insvdi_lowpart_1): Likewise.
21713 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
21715 * config/i386/i386-features.cc (compute_convert_gain): Tweak
21716 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
21717 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
21718 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
21720 2023-07-10 liuhongt <hongtao.liu@intel.com>
21723 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
21724 splitter to detect fp max pattern.
21725 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
21727 2023-07-09 Jan Hubicka <jh@suse.cz>
21729 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
21730 (dump_edge_info): Likewise.
21731 (dump_bb_info): Likewise.
21732 * profile-count.cc (profile_count::dump): Add comma between quality and
21735 2023-07-08 Jan Hubicka <jh@suse.cz>
21737 PR tree-optimization/110600
21738 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
21740 2023-07-08 Jan Hubicka <jh@suse.cz>
21742 PR middle-end/110590
21743 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
21744 inner loops and be more careful about inconsistent profiles.
21745 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
21746 exit is followed by other exit.
21748 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
21750 * cprop.cc (reg_available_p): Change return type from int to bool.
21751 (reg_not_set_p): Ditto.
21752 (try_replace_reg): Ditto. Change "success" variable to bool.
21753 (cprop_jump): Change return type from int to void
21754 and adjust function body accordingly.
21755 (constprop_register): Ditto.
21756 (cprop_insn): Ditto. Change "changed" variable to bool.
21757 (local_cprop_pass): Change return type from int to void
21758 and adjust function body accordingly.
21759 (bypass_block): Ditto. Change "change", "may_be_loop_header"
21760 and "removed_p" variables to bool.
21761 (bypass_conditional_jumps): Change return type from int to void
21762 and adjust function body accordingly. Change "changed"
21764 (one_cprop_pass): Ditto.
21766 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
21768 * gcse.cc (expr_equiv_p): Change return type from int to bool.
21769 (oprs_unchanged_p): Change return type from int to void
21770 and adjust function body accordingly.
21771 (oprs_anticipatable_p): Ditto.
21772 (oprs_available_p): Ditto.
21773 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
21774 arguments to bool. Change "found" variable to bool.
21775 (load_killed_in_block_p): Change return type from int to void and
21776 adjust function body accordingly. Change "avail_p" argument to bool.
21777 (pre_expr_reaches_here_p): Change return type from int to void
21778 and adjust function body accordingly.
21779 (pre_delete): Ditto. Change "changed" variable to bool.
21780 (pre_gcse): Change return type from int to void
21781 and adjust function body accordingly. Change "did_insert" and
21782 "changed" variables to bool.
21783 (one_pre_gcse_pass): Change return type from int to void
21784 and adjust function body accordingly. Change "changed" variable
21786 (should_hoist_expr_to_dom): Change return type from int to void
21787 and adjust function body accordingly. Change
21788 "visited_allocated_locally" variable to bool.
21789 (hoist_code): Change return type from int to void and adjust
21790 function body accordingly. Change "changed" variable to bool.
21791 (one_code_hoisting_pass): Ditto.
21792 (pre_edge_insert): Change return type from int to void and adjust
21793 function body accordingly. Change "did_insert" variable to bool.
21794 (pre_expr_reaches_here_p_work): Change return type from int to void
21795 and adjust function body accordingly.
21796 (simple_mem): Ditto.
21797 (want_to_gcse_p): Change return type from int to void
21798 and adjust function body accordingly.
21799 (can_assign_to_reg_without_clobbers_p): Update function body
21800 for bool return type.
21801 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
21802 (pre_insert_copies): Change "added_copy" variable to bool.
21804 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
21808 * doc/invoke.texi (Warning Options): Fix typos.
21810 2023-07-07 Jan Hubicka <jh@suse.cz>
21812 * profile-count.cc (profile_count::dump): Add FUN
21813 parameter; print relative frequency.
21814 (profile_count::debug): Update.
21815 * profile-count.h (profile_count::dump): Update
21818 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
21822 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
21823 TImode destinations from paradoxical SUBREGs (setting the lowpart)
21824 into explicit zero extensions. Use *insvti_highpart_1 instruction
21825 to set the highpart of a TImode destination.
21827 2023-07-07 Jan Hubicka <jh@suse.cz>
21829 * predict.cc (force_edge_cold): Use
21830 set_edge_probability_and_rescale_others; improve dumps.
21832 2023-07-07 Jan Hubicka <jh@suse.cz>
21834 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
21836 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
21839 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
21841 * config/s390/s390.cc (vec_init): Fix default case
21843 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
21845 * lra-assigns.cc (assign_by_spills): Add reload insns involving
21846 reload pseudos with non-refined class to be processed on the next
21848 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
21849 (in_class_p): Use it.
21850 (print_curr_insn_alt): New func.
21851 (process_alt_operands): Use it. Improve debug info.
21852 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
21853 pseudo class if it is not refined yet.
21855 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
21857 * value-range.cc (irange::get_bitmask_from_range): Return all the
21858 known bits for a singleton.
21859 (irange::set_range_from_bitmask): Set a range of a singleton when
21860 all bits are known.
21862 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
21864 * value-range.cc (irange::intersect): Leave normalization to
21867 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
21869 * data-streamer-in.cc (streamer_read_value_range): Adjust for
21871 * data-streamer-out.cc (streamer_write_vrange): Same.
21872 * range-op.cc (operator_cast::fold_range): Same.
21873 * value-range-pretty-print.cc
21874 (vrange_printer::print_irange_bitmasks): Same.
21875 * value-range-storage.cc (irange_storage::write_lengths_address):
21877 (irange_storage::set_irange): Same.
21878 (irange_storage::get_irange): Same.
21879 (irange_storage::size): Same.
21880 (irange_storage::dump): Same.
21881 * value-range-storage.h: Same.
21882 * value-range.cc (debug): New.
21883 (irange_bitmask::dump): New.
21884 (add_vrange): Adjust for value/mask.
21885 (irange::operator=): Same.
21886 (irange::set): Same.
21887 (irange::verify_range): Same.
21888 (irange::operator==): Same.
21889 (irange::contains_p): Same.
21890 (irange::irange_single_pair_union): Same.
21891 (irange::union_): Same.
21892 (irange::intersect): Same.
21893 (irange::invert): Same.
21894 (irange::get_nonzero_bits_from_range): Rename to...
21895 (irange::get_bitmask_from_range): ...this.
21896 (irange::set_range_from_nonzero_bits): Rename to...
21897 (irange::set_range_from_bitmask): ...this.
21898 (irange::set_nonzero_bits): Rename to...
21899 (irange::update_bitmask): ...this.
21900 (irange::get_nonzero_bits): Rename to...
21901 (irange::get_bitmask): ...this.
21902 (irange::intersect_nonzero_bits): Rename to...
21903 (irange::intersect_bitmask): ...this.
21904 (irange::union_nonzero_bits): Rename to...
21905 (irange::union_bitmask): ...this.
21906 (irange_bitmask::verify_mask): New.
21907 * value-range.h (class irange_bitmask): New.
21908 (irange_bitmask::set_unknown): New.
21909 (irange_bitmask::unknown_p): New.
21910 (irange_bitmask::irange_bitmask): New.
21911 (irange_bitmask::get_precision): New.
21912 (irange_bitmask::get_nonzero_bits): New.
21913 (irange_bitmask::set_nonzero_bits): New.
21914 (irange_bitmask::operator==): New.
21915 (irange_bitmask::union_): New.
21916 (irange_bitmask::intersect): New.
21917 (class irange): Friend vrange_printer.
21918 (irange::varying_compatible_p): Adjust for bitmask.
21919 (irange::set_varying): Same.
21920 (irange::set_nonzero): Same.
21922 2023-07-07 Jan Beulich <jbeulich@suse.com>
21924 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
21926 2023-07-07 Jan Beulich <jbeulich@suse.com>
21928 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
21929 alternative. Switch new last alternative's "isa" attribute to
21931 (vec_extract_hi_v32qi): Likewise.
21933 2023-07-07 Pan Li <pan2.li@intel.com>
21934 Robin Dapp <rdapp@ventanamicro.com>
21936 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
21938 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
21939 (riscv_mode_exit): Likewise for exit mode.
21940 (riscv_mode_needed): Likewise for needed mode.
21941 (riscv_mode_after): Likewise for after mode.
21943 2023-07-07 Pan Li <pan2.li@intel.com>
21945 * config/riscv/vector.md: Fix typo.
21947 2023-07-06 Jan Hubicka <jh@suse.cz>
21949 PR middle-end/25623
21950 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
21951 of iterations determined.
21952 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
21954 2023-07-06 Jan Hubicka <jh@suse.cz>
21956 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
21957 probability update to be safe on loops with subloops.
21958 Make bound parameter to be iteration bound.
21959 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
21960 of scale_loop_profile.
21961 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
21963 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
21965 PR tree-optimization/110449
21966 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
21967 vec_loop for the unrolled loop.
21969 2023-07-06 Jan Hubicka <jh@suse.cz>
21971 * cfg.cc (set_edge_probability_and_rescale_others): New function.
21972 (update_bb_profile_for_threading): Use it; simplify the rest.
21973 * cfg.h (set_edge_probability_and_rescale_others): Declare.
21974 * profile-count.h (profile_probability::apply_scale): New.
21976 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
21978 * doc/extend.texi (ARC Built-in Functions): Update documentation
21979 with missing builtins.
21981 2023-07-06 Richard Biener <rguenther@suse.de>
21983 PR tree-optimization/110556
21984 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
21985 assign code and all operands of non-stores.
21987 2023-07-06 Richard Biener <rguenther@suse.de>
21989 PR tree-optimization/110563
21990 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
21991 Remove second argument.
21992 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
21993 Remove for_epilogue_p argument. Merge assert ...
21994 (vect_analyze_loop_2): ... with check done before determining
21995 partial vectors by moving it after.
21996 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
21998 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22000 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
22001 few things re 'reorder' option and strings.
22002 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
22004 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22006 * gengtype-parse.cc: Clean up obsolete parametrized structs
22008 * gengtype.cc: Likewise.
22009 * gengtype.h: Likewise.
22011 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22013 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
22016 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22018 * gengtype-parse.cc (token_names): Add '"user"'.
22019 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
22020 'FIRST_TOKEN_WITH_VALUE'.
22022 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22024 * doc/gty.texi (GTY Options) <string_length>: Enhance.
22026 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22028 * gengtype.cc (write_root, write_roots): Explicitly reject
22029 'string_length' option.
22030 * doc/gty.texi (GTY Options) <string_length>: Document.
22032 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
22034 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
22035 (ggc_pch_write_object): Remove 'bool is_string' argument.
22036 * ggc-common.cc: Adjust.
22037 * ggc-page.cc: Likewise.
22039 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
22041 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
22043 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
22045 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
22046 and add description for inling of function with arch and tune
22049 2023-07-06 Richard Biener <rguenther@suse.de>
22051 PR tree-optimization/110515
22052 * tree-ssa-pre.cc (compute_avail): Make code dealing
22053 with hoisting loads with different alias-sets more
22056 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22058 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
22060 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
22062 * config/i386/i386.cc (ix86_can_inline_p): If callee has
22063 default arch=x86-64 and tune=generic, do not block the
22064 inlining to its caller. Also allow callee with different
22065 arch= to be inlined if it has always_inline attribute and
22066 it's ISA is subset of caller's.
22068 2023-07-06 liuhongt <hongtao.liu@intel.com>
22070 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
22071 DF/SFmode AND/IOR/XOR/ANDN operations.
22073 2023-07-06 Andrew Pinski <apinski@marvell.com>
22075 PR middle-end/110554
22076 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
22077 just build using boolean_type_node instead of the cond_type.
22078 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
22079 that will feed into the COND_EXPR.
22081 2023-07-06 liuhongt <hongtao.liu@intel.com>
22084 * config/i386/i386.md (movdf_internal): Disparage slightly for
22085 2 alternatives (r,v) and (v,r) by adding constraint modifier
22088 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
22091 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
22092 initialization of new_addr.
22094 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
22096 PR tree-optimization/110474
22097 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
22098 unroll factor while selecting the epilog vect loop VF.
22100 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22102 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
22105 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22107 * gimple-range-gori.cc (compute_operand_range): After calling
22108 compute_operand2_range, recursively call self if needed.
22109 (compute_operand2_range): Turn into a leaf function.
22110 (gori_compute::compute_operand1_and_operand2_range): Finish
22111 operand2 calculation.
22112 * gimple-range-gori.h (compute_operand2_range): Remove name param.
22114 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22116 * gimple-range-gori.cc (compute_operand_range): After calling
22117 compute_operand1_range, recursively call self if needed.
22118 (compute_operand1_range): Turn into a leaf function.
22119 (gori_compute::compute_operand1_and_operand2_range): Finish
22120 operand1 calculation.
22121 * gimple-range-gori.h (compute_operand1_range): Remove name param.
22123 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22125 * gimple-range-gori.cc (compute_operand_range): Check for
22126 operand interdependence when both op1 and op2 are computed.
22127 (compute_operand1_and_operand2_range): No checks required now.
22129 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
22131 * gimple-range-gori.cc (compute_operand_range): Check for
22132 a relation between op1 and op2 and use that instead.
22133 (compute_operand1_range): Don't look for a relation override.
22134 (compute_operand2_range): Ditto.
22136 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
22138 * doc/contrib.texi (Contributors): Update my entry.
22140 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
22142 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
22145 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
22147 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
22148 scehdule_more_p and contributes_to_priority indirect frunction
22149 type from int to bool.
22150 (no_real_insns_p): Change return type from int to bool.
22151 (contributes_to_priority): Ditto.
22152 * haifa-sched.cc (no_real_insns_p): Change return type from
22153 int to bool and adjust function body accordingly.
22154 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
22155 variable type from int to bool.
22156 (ps_insn_advance_column): Change return type from int to bool.
22157 (ps_has_conflicts): Ditto. Change "has_conflicts"
22158 variable type from int to bool.
22159 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
22160 (conditions_mutex_p): Ditto.
22161 * sched-ebb.cc (schedule_more_p): Ditto.
22162 (ebb_contributes_to_priority): Change return type from
22163 int to bool and adjust function body accordingly.
22164 * sched-rgn.cc (is_cfg_nonregular): Ditto.
22165 (check_live_1): Ditto.
22167 (find_conditional_protection): Ditto.
22168 (is_conditionally_protected): Ditto.
22169 (is_prisky): Ditto.
22170 (is_exception_free): Ditto.
22171 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
22172 variables from int to bool.
22173 (extend_rgns): Change "rescan" variable from int to bool.
22174 (check_live): Change return type from
22175 int to bool and adjust function body accordingly.
22176 (can_schedule_ready_p): Ditto.
22177 (schedule_more_p): Ditto.
22178 (contributes_to_priority): Ditto.
22180 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22182 * doc/md.texi: Document that vec_set and vec_extract must not
22184 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
22185 (gimple_expand_vec_set_extract_expr): ...to this.
22186 (gimple_expand_vec_exprs): Call renamed function.
22187 * internal-fn.cc (vec_extract_direct): Add.
22188 (expand_vec_extract_optab_fn): New function to expand
22190 (direct_vec_extract_optab_supported_p): Add.
22191 * internal-fn.def (VEC_EXTRACT): Add.
22192 * optabs.cc (can_vec_extract_var_idx_p): New function.
22193 * optabs.h (can_vec_extract_var_idx_p): Declare.
22195 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22197 * config/riscv/autovec.md: Add gen_lowpart.
22199 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22201 * config/riscv/autovec.md: Allow register index operand.
22203 2023-07-05 Pan Li <pan2.li@intel.com>
22205 * config/riscv/riscv-vector-builtins.cc
22206 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
22208 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22210 * config/riscv/autovec.md: Use float_truncate.
22212 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22214 * internal-fn.cc (internal_fn_len_index): Apply
22215 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
22216 (internal_fn_mask_index): Ditto.
22217 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
22218 (supports_vec_scatter_store_p): Ditto.
22219 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
22220 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
22221 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
22222 (vect_get_strided_load_store_ops): Ditto.
22223 (vectorizable_store): Ditto.
22224 (vectorizable_load): Ditto.
22226 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
22227 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22229 * simplify-rtx.cc (native_encode_rtx): Ditto.
22230 (native_decode_vector_rtx): Ditto.
22231 (simplify_const_vector_byte_offset): Ditto.
22232 (simplify_const_vector_subreg): Ditto.
22233 * tree.cc (build_truth_vector_type_for_mode): Ditto.
22234 * varasm.cc (output_constant_pool_2): Ditto.
22236 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
22238 * config/mips/mips.cc (mips_expand_block_move): don't expand for
22239 r6 with -mno-unaligned-access option if one or both of src and
22240 dest are unaligned. restruct: return directly if length is not const.
22241 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
22243 2023-07-05 Jan Beulich <jbeulich@suse.com>
22246 * config/i386/sse.md: New splitters to simplify
22247 not;vec_duplicate as a singular vpternlog.
22248 (one_cmpl<mode>2): Allow broadcast for operand 1.
22249 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
22251 2023-07-05 Jan Beulich <jbeulich@suse.com>
22254 * config/i386/sse.md: New splitters to simplify
22255 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
22257 2023-07-05 Jan Beulich <jbeulich@suse.com>
22260 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
22261 form of splitter for PR target/100711.
22263 2023-07-05 Richard Biener <rguenther@suse.de>
22265 PR middle-end/110541
22266 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
22269 2023-07-05 Jan Beulich <jbeulich@suse.com>
22272 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
22273 for memory form operand 1.
22275 2023-07-05 Jan Beulich <jbeulich@suse.com>
22278 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
22279 bitwise vector operations.
22280 * config/i386/sse.md (*iornot<mode>3): New insn.
22281 (*xnor<mode>3): Likewise.
22282 (*<nlogic><mode>3): Likewise.
22283 (andor): New code iterator.
22284 (nlogic): New code attribute.
22285 (ternlog_nlogic): Likewise.
22287 2023-07-05 Richard Biener <rguenther@suse.de>
22289 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
22291 2023-07-05 yulong <shiyulong@iscas.ac.cn>
22293 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
22295 2023-07-05 yulong <shiyulong@iscas.ac.cn>
22297 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
22298 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
22299 (ADJUST_ALIGNMENT): Ditto.
22300 (RVV_TUPLE_PARTIAL_MODES): Ditto.
22301 (ADJUST_NUNITS): Ditto.
22302 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
22304 (vfloat16mf4x3_t): Ditto.
22305 (vfloat16mf4x4_t): Ditto.
22306 (vfloat16mf4x5_t): Ditto.
22307 (vfloat16mf4x6_t): Ditto.
22308 (vfloat16mf4x7_t): Ditto.
22309 (vfloat16mf4x8_t): Ditto.
22310 (vfloat16mf2x2_t): Ditto.
22311 (vfloat16mf2x3_t): Ditto.
22312 (vfloat16mf2x4_t): Ditto.
22313 (vfloat16mf2x5_t): Ditto.
22314 (vfloat16mf2x6_t): Ditto.
22315 (vfloat16mf2x7_t): Ditto.
22316 (vfloat16mf2x8_t): Ditto.
22317 (vfloat16m1x2_t): Ditto.
22318 (vfloat16m1x3_t): Ditto.
22319 (vfloat16m1x4_t): Ditto.
22320 (vfloat16m1x5_t): Ditto.
22321 (vfloat16m1x6_t): Ditto.
22322 (vfloat16m1x7_t): Ditto.
22323 (vfloat16m1x8_t): Ditto.
22324 (vfloat16m2x2_t): Ditto.
22325 (vfloat16m2x3_t): Ditto.
22326 (vfloat16m2x4_t): Ditto.
22327 (vfloat16m4x2_t): Ditto.
22328 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
22329 (vfloat16mf4x3_t): Ditto.
22330 (vfloat16mf4x4_t): Ditto.
22331 (vfloat16mf4x5_t): Ditto.
22332 (vfloat16mf4x6_t): Ditto.
22333 (vfloat16mf4x7_t): Ditto.
22334 (vfloat16mf4x8_t): Ditto.
22335 (vfloat16mf2x2_t): Ditto.
22336 (vfloat16mf2x3_t): Ditto.
22337 (vfloat16mf2x4_t): Ditto.
22338 (vfloat16mf2x5_t): Ditto.
22339 (vfloat16mf2x6_t): Ditto.
22340 (vfloat16mf2x7_t): Ditto.
22341 (vfloat16mf2x8_t): Ditto.
22342 (vfloat16m1x2_t): Ditto.
22343 (vfloat16m1x3_t): Ditto.
22344 (vfloat16m1x4_t): Ditto.
22345 (vfloat16m1x5_t): Ditto.
22346 (vfloat16m1x6_t): Ditto.
22347 (vfloat16m1x7_t): Ditto.
22348 (vfloat16m1x8_t): Ditto.
22349 (vfloat16m2x2_t): Ditto.
22350 (vfloat16m2x3_t): Ditto.
22351 (vfloat16m2x4_t): Ditto.
22352 (vfloat16m4x2_t): Ditto.
22353 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
22354 * config/riscv/riscv.md: New.
22355 * config/riscv/vector-iterators.md: New.
22357 2023-07-04 Andrew Pinski <apinski@marvell.com>
22359 PR tree-optimization/110487
22360 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
22361 build a nonstandard integer and use that.
22363 2023-07-04 Andrew Pinski <apinski@marvell.com>
22365 * match.pd (a?-1:0): Cast type an integer type
22366 rather the type before the negative.
22367 (a?0:-1): Likewise.
22369 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22371 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
22372 Change to use HARD_REG_BIT and its macros.
22373 * config/xtensa/xtensa.md
22374 (peephole2: regmove elimination during DFmode input reload):
22377 2023-07-04 Richard Biener <rguenther@suse.de>
22379 PR tree-optimization/110491
22380 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
22381 whether the PHI args are possibly undefined before folding
22384 2023-07-04 Pan Li <pan2.li@intel.com>
22385 Thomas Schwinge <thomas@codesourcery.com>
22387 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
22388 bits for machine mode table.
22389 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
22390 HOST machine mode bits.
22391 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
22392 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
22394 * tree-streamer.h (streamer_mode_table): Ditto.
22395 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
22396 as the packing limit.
22397 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
22399 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
22401 * lto-streamer.h (class lto_input_block): Capture
22402 'lto_file_decl_data *file_data' instead of just
22403 'unsigned char *mode_table'.
22404 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
22405 * ipa-fnsummary.cc (inline_read_section): Likewise.
22406 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
22407 * ipa-modref.cc (read_section): Likewise.
22408 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
22410 * ipa-sra.cc (isra_read_summary_section): Likewise.
22411 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
22412 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
22413 * lto-streamer-in.cc (lto_read_body_or_constructor)
22414 (lto_input_toplevel_asms): Likewise.
22415 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
22417 2023-07-04 Richard Biener <rguenther@suse.de>
22419 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
22420 (empty_bb_or_one_feeding_into_p): Check for them.
22421 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
22422 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
22424 2023-07-04 Richard Biener <rguenther@suse.de>
22426 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
22427 check guarding scalar_niter underflow.
22429 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
22431 PR tree-optimization/110531
22432 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
22433 slp_done_for_suggested_uf to false.
22435 2023-07-04 Richard Biener <rguenther@suse.de>
22437 PR tree-optimization/110228
22438 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
22439 Mark SSA may-undefs.
22440 (bb_no_side_effects_p): Check stmt uses for undefs.
22442 2023-07-04 Richard Biener <rguenther@suse.de>
22444 PR tree-optimization/110436
22445 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
22446 force live but not relevant pattern stmts relevant.
22448 2023-07-04 Lili Cui <lili.cui@intel.com>
22450 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
22451 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
22453 2023-07-04 Richard Biener <rguenther@suse.de>
22455 PR middle-end/110495
22456 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
22457 since we do not set TREE_OVERFLOW on those since the
22458 introduction of VL vectors.
22459 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
22460 at TREE_OVERFLOW to determine validity of association.
22462 2023-07-04 Richard Biener <rguenther@suse.de>
22464 PR tree-optimization/110310
22465 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
22466 Move costing part ...
22467 (vect_analyze_loop_costing): ... here. Integrate better
22468 estimate for epilogues from ...
22469 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
22470 with actual epilogue status.
22471 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
22472 avoid cancelling epilogue vectorization.
22473 (vect_update_epilogue_niters): Remove. No longer update
22474 epilogue LOOP_VINFO_NITERS.
22476 2023-07-04 Pan Li <pan2.li@intel.com>
22479 2023-07-03 Pan Li <pan2.li@intel.com>
22481 * config/riscv/vector.md: Fix typo.
22483 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22485 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
22486 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
22487 (expand_gather_load_optab_fn): Ditto.
22488 (internal_load_fn_p): Ditto.
22489 (internal_store_fn_p): Ditto.
22490 (internal_gather_scatter_fn_p): Ditto.
22491 (internal_fn_len_index): Ditto.
22492 (internal_fn_mask_index): Ditto.
22493 (internal_fn_stored_value_index): Ditto.
22494 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
22495 (LEN_MASK_SCATTER_STORE): Ditto.
22496 * optabs.def (OPTAB_CD): Ditto.
22498 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22500 * config/riscv/riscv-vsetvl.cc
22501 (vector_insn_info::parse_insn): Add early break.
22503 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
22505 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
22506 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
22508 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
22510 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
22512 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
22514 * common/config/riscv/riscv-common.cc: Add support for zvbb,
22515 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
22516 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
22517 * config/riscv/arch-canonicalize: Add canonicalization info for
22518 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
22519 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
22520 (MASK_ZVBC): Likewise.
22521 (TARGET_ZVBB): Likewise.
22522 (TARGET_ZVBC): Likewise.
22523 (MASK_ZVKG): Likewise.
22524 (MASK_ZVKNED): Likewise.
22525 (MASK_ZVKNHA): Likewise.
22526 (MASK_ZVKNHB): Likewise.
22527 (MASK_ZVKSED): Likewise.
22528 (MASK_ZVKSH): Likewise.
22529 (MASK_ZVKN): Likewise.
22530 (MASK_ZVKNC): Likewise.
22531 (MASK_ZVKNG): Likewise.
22532 (MASK_ZVKS): Likewise.
22533 (MASK_ZVKSC): Likewise.
22534 (MASK_ZVKSG): Likewise.
22535 (MASK_ZVKT): Likewise.
22536 (TARGET_ZVKG): Likewise.
22537 (TARGET_ZVKNED): Likewise.
22538 (TARGET_ZVKNHA): Likewise.
22539 (TARGET_ZVKNHB): Likewise.
22540 (TARGET_ZVKSED): Likewise.
22541 (TARGET_ZVKSH): Likewise.
22542 (TARGET_ZVKN): Likewise.
22543 (TARGET_ZVKNC): Likewise.
22544 (TARGET_ZVKNG): Likewise.
22545 (TARGET_ZVKS): Likewise.
22546 (TARGET_ZVKSC): Likewise.
22547 (TARGET_ZVKSG): Likewise.
22548 (TARGET_ZVKT): Likewise.
22549 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
22551 2023-07-03 Andrew Pinski <apinski@marvell.com>
22553 PR middle-end/110510
22554 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
22556 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
22558 * config/darwin.h: Avoid duplicate multiply_defined specs on
22559 earlier Darwin versions with shared libgcc.
22561 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
22563 * tree.h (tree_int_cst_equal): Change return type from int to bool.
22564 (operand_equal_for_phi_arg_p): Ditto.
22565 (tree_map_base_marked_p): Ditto.
22566 * tree.cc (contains_placeholder_p): Update function body
22567 for bool return type.
22568 (type_cache_hasher::equal): Ditto.
22569 (tree_map_base_hash): Change return type
22570 from int to void and adjust function body accordingly.
22571 (tree_int_cst_equal): Ditto.
22572 (operand_equal_for_phi_arg_p): Ditto.
22573 (get_narrower): Change "first" variable to bool.
22574 (cl_option_hasher::equal): Update function body for bool return type.
22575 * ggc.h (ggc_set_mark): Change return type from int to bool.
22576 (ggc_marked_p): Ditto.
22577 * ggc-page.cc (gt_ggc_mx): Change return type
22578 from int to void and adjust function body accordingly.
22579 (ggc_set_mark): Ditto.
22581 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22583 * config/riscv/autovec.md: Change order of
22584 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22585 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
22586 * doc/md.texi: Ditto.
22587 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
22588 * internal-fn.cc (len_maskload_direct): Ditto.
22589 (len_maskstore_direct): Ditto.
22590 (add_len_and_mask_args): New function.
22591 (expand_partial_load_optab_fn): Change order of
22592 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22593 (expand_partial_store_optab_fn): Ditto.
22594 (internal_fn_len_index): New function.
22595 (internal_fn_mask_index): Change order of
22596 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22597 (internal_fn_stored_value_index): Ditto.
22598 (internal_len_load_store_bias): Ditto.
22599 * internal-fn.h (internal_fn_len_index): New function.
22600 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
22601 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22602 * tree-vect-stmts.cc (vectorizable_store): Ditto.
22603 (vectorizable_load): Ditto.
22605 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
22608 * doc/gm2.texi (Semantic checking): Include examples using
22609 -Wuninit-variable-checking.
22611 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22613 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
22614 (*single_widen_fnma<mode>): Ditto.
22615 (*double_widen_fms<mode>): Ditto.
22616 (*single_widen_fms<mode>): Ditto.
22617 (*double_widen_fnms<mode>): Ditto.
22618 (*single_widen_fnms<mode>): Ditto.
22620 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22622 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
22623 into "*" in pattern name which simplifies build files.
22624 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
22625 (*pred_single_widen_mul<mode>): New pattern.
22627 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
22629 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
22630 the index to be 0 or 1.
22632 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
22635 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22637 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
22638 (*single_widen_fnma<mode>): Ditto.
22639 (*double_widen_fms<mode>): Ditto.
22640 (*single_widen_fms<mode>): Ditto.
22641 (*double_widen_fnms<mode>): Ditto.
22642 (*single_widen_fnms<mode>): Ditto.
22644 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22646 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
22647 (*single_widen_fnma<mode>): Ditto.
22648 (*double_widen_fms<mode>): Ditto.
22649 (*single_widen_fms<mode>): Ditto.
22650 (*double_widen_fnms<mode>): Ditto.
22651 (*single_widen_fnms<mode>): Ditto.
22653 2023-07-03 Pan Li <pan2.li@intel.com>
22655 * config/riscv/vector.md: Fix typo.
22657 2023-07-03 Richard Biener <rguenther@suse.de>
22659 PR tree-optimization/110506
22660 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
22661 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
22663 2023-07-03 Richard Biener <rguenther@suse.de>
22665 PR tree-optimization/110506
22666 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
22667 type before relying on TYPE_PRECISION to produce a nonzero mask.
22669 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22671 * config/mips/mips.md(*and<mode>3_mips16): Generates
22672 ZEB/ZEH instructions.
22674 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22676 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
22677 address register to M16_REGS for MIPS16.
22678 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
22679 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
22680 (AVAIL_NON_MIPS16 (cache..)): Update to
22681 AVAIL_MIPS16E2_OR_NON_MIPS16.
22682 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
22683 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
22685 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22687 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
22688 for ISA_HAS_MIPS16E2.
22689 (ISA_HAS_SYNC): Same as above.
22690 (ISA_HAS_LL_SC): Same as above.
22692 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22694 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
22695 Add logics for generating instruction.
22696 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
22697 * config/mips/mips.md(mov_<load>l): Generates instructions.
22698 (mov_<load>r): Same as above.
22699 (mov_<store>l): Adjusted for the conditions above.
22700 (mov_<store>r): Same as above.
22701 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
22702 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
22704 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22706 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
22707 (mips_const_insns): Same as above.
22708 (mips_output_move): Same as above.
22709 (mips_output_function_prologue): Same as above.
22710 * config/mips/mips.md: Same as above
22712 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22714 * config/mips/constraints.md(Yz): New constraints for mips16e2.
22715 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
22716 (mips_bit_clear_info): Same as above.
22717 * config/mips/mips.cc(mips_bit_clear_info): New function for
22718 generating instructions.
22719 (mips_bit_clear_p): Same as above.
22720 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
22721 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
22722 (*and<mode>3): Generates INS instruction.
22723 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
22724 (ior<mode>3): Add logics for ORI instruction.
22725 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
22726 (*ior<mode>3_mips16): Add logics for XORI instruction.
22727 (*xor<mode>3_mips16): Generates XORI instrucion.
22728 (*extzv<mode>): Add logics for EXT instruction.
22729 (*insv<mode>): Add logics for INS instruction.
22730 * config/mips/predicates.md(bit_clear_operand): New predicate for
22731 generating bitwise instructions.
22732 (and_reg_operand): Add logics for generating bitwise instructions.
22734 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22736 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
22737 that uses global pointer register.
22738 (mips16_unextended_reference_p): Same as above.
22739 (mips_pic_base_register): Same as above.
22740 (mips_init_relocs): Same as above.
22741 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
22742 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
22743 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
22744 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
22746 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22748 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
22749 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
22750 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
22751 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
22752 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
22753 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
22755 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22757 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
22759 * config/mips/mips.h(__mips_mips16e2): Defined a new
22761 (ISA_HAS_MIPS16E2): Defined a new macro.
22762 (ASM_SPEC): Pass mmips16e2 to the assembler.
22763 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
22764 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
22765 * doc/invoke.texi: Add -m(no-)mips16e2 option..
22767 2023-07-02 Jakub Jelinek <jakub@redhat.com>
22769 PR tree-optimization/110508
22770 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
22771 REALPART_EXPR opf nlhs if re2 is non-NULL.
22773 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22775 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
22777 * config/xtensa/xtensa.md (*xtensa_clamps):
22778 Add TARGET_MINMAX to the condition.
22780 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22782 * config/xtensa/xtensa.md (*eqne_INT_MIN):
22783 Add missing ":SI" to the match_operator.
22785 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
22788 * config/darwin.opt: Add fconstant-cfstrings alias to
22789 mconstant-cfstrings.
22790 * doc/invoke.texi: Amend invocation descriptions to reflect
22791 that the fconstant-cfstrings is a target-option alias and to
22792 add the missing mconstant-cfstrings option description to the
22795 2023-07-01 Jan Hubicka <jh@suse.cz>
22797 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
22798 parmaeter; update profile.
22799 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
22800 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
22801 (static_loop_exit): ... this; return the edge to be elliminated.
22802 (ch_base::copy_headers): Handle profile updating for eliminated exits.
22804 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
22806 * config/i386/i386-features.cc (compute_convert_gain): Provide
22807 gains/costs for ROTATE and ROTATERT (by an integer constant).
22808 (general_scalar_chain::convert_rotate): New helper function to
22809 convert a DImode or SImode rotation by an integer constant into
22811 (general_scalar_chain::convert_insn): Call the new convert_rotate
22812 for ROTATE and ROTATERT.
22813 (general_scalar_to_vector_candidate_p): Consider ROTATE and
22814 ROTATERT to be candidates if the second operand is an integer
22815 constant, valid for a rotation (or shift) in the given mode.
22816 * config/i386/i386-features.h (general_scalar_chain): Add new
22817 helper method convert_rotate.
22819 2023-07-01 Jan Hubicka <jh@suse.cz>
22821 PR tree-optimization/103680
22822 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
22823 make message clearer.
22825 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
22827 PR tree-optimization/101832
22828 * tree-object-size.cc (addr_object_size): Handle structure/union type
22829 when it has flexible size.
22831 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
22833 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
22834 (fold_nonarray_ctor_reference): Likewise. Specifically deal
22835 with integral bit-fields.
22836 (fold_ctor_reference): Make sure that the constructor uses the
22837 native storage order.
22839 2023-06-30 Jan Hubicka <jh@suse.cz>
22841 PR middle-end/109849
22842 * predict.cc (estimate_bb_frequencies): Turn to static function.
22843 (expr_expected_value_1): Fix handling of binary expressions with
22845 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
22846 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
22848 * predict.h (estimate_bb_frequencies): No longer declare it.
22850 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
22852 * fold-const.h (multiple_of_p): Change return type from int to bool.
22853 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
22854 neg_conp_p and neg_var_p variables to bool.
22855 (const_binop): Change sat_p variable to bool.
22856 (merge_ranges): Change no_overlap variable to bool.
22857 (extract_muldiv_1): Change same_p variable to bool.
22858 (tree_swap_operands_p): Update function body for bool return type.
22859 (fold_truth_andor): Change commutative variable to bool.
22860 (multiple_of_p): Change return type
22861 from int to void and adjust function body accordingly.
22862 * optabs.h (expand_twoval_unop): Change return type from int to bool.
22863 (expand_twoval_binop): Ditto.
22864 (can_compare_p): Ditto.
22865 (have_add2_insn): Ditto.
22866 (have_addptr3_insn): Ditto.
22867 (have_sub2_insn): Ditto.
22868 (have_insn_for): Ditto.
22869 * optabs.cc (add_equal_note): Ditto.
22870 (widen_operand): Change no_extend argument from int to bool.
22871 (expand_binop): Ditto.
22872 (expand_twoval_unop): Change return type
22873 from int to void and adjust function body accordingly.
22874 (expand_twoval_binop): Ditto.
22875 (can_compare_p): Ditto.
22876 (have_add2_insn): Ditto.
22877 (have_addptr3_insn): Ditto.
22878 (have_sub2_insn): Ditto.
22879 (have_insn_for): Ditto.
22881 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
22883 * config/aarch64/aarch64-simd.md
22884 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
22885 Expansions for abd vec widen optabs.
22886 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
22887 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
22888 that give the appropriate extend RTL for the max RTL.
22890 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
22892 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
22893 * optabs.def (vec_widen_sabd_optab,
22894 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
22895 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
22896 vec_widen_uabd_optab,
22897 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
22898 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
22900 * doc/md.texi: Document them.
22901 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
22902 to build a VEC_WIDEN_ABD call if the input precision is smaller
22903 than the precision of the output.
22904 (vect_recog_widen_abd_pattern): Should an ABD expression be
22905 found preceeding an extension, replace the two with a
22908 2023-06-30 Pan Li <pan2.li@intel.com>
22910 * config/riscv/vector.md: Refactor the common condition.
22912 2023-06-30 Richard Biener <rguenther@suse.de>
22914 PR tree-optimization/110496
22915 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
22916 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
22918 2023-06-30 Richard Biener <rguenther@suse.de>
22920 PR middle-end/110489
22921 * statistics.cc (curr_statistics_hash): Add argument
22922 indicating whether we should allocate the hash.
22923 (statistics_fini_pass): If the hash isn't allocated
22924 only print the summary header.
22926 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
22927 Thomas Schwinge <thomas@codesourcery.com>
22929 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
22931 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
22934 * config/mips/mips.cc (mips_function_arg_alignment): Returns
22935 the alignment of function argument. In case of typedef type,
22936 it returns the aligment of the aliased type.
22937 (mips_function_arg_boundary): Relocated calculation of the
22938 aligment of function arguments.
22940 2023-06-29 Jan Hubicka <jh@suse.cz>
22942 PR tree-optimization/109849
22943 * ipa-fnsummary.cc (decompose_param_expr): Skip
22944 functions returning its parameter.
22945 (set_cond_stmt_execution_predicate): Return early
22946 if predicate was constructed.
22948 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
22951 * doc/extend.texi: Document GCC extension on a structure containing
22952 a flexible array member to be a member of another structure.
22954 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
22956 * print-tree.cc (print_node): Print new bit type_include_flexarray.
22957 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
22958 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
22959 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
22960 in bit no_named_args_stdarg_p properly for its corresponding type.
22961 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
22962 out bit no_named_args_stdarg_p properly for its corresponding type.
22963 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
22965 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
22967 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
22968 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
22969 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
22971 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
22973 * value-range.cc (frange::set): Do not call verify_range.
22974 (frange::normalize_kind): Verify range.
22975 (frange::union_nans): Do not call verify_range.
22976 (frange::union_): Same.
22977 (frange::intersect): Same.
22978 (irange::irange_single_pair_union): Call normalize_kind if
22980 (irange::union_): Same.
22981 (irange::intersect): Same.
22982 (irange::set_range_from_nonzero_bits): Verify range.
22983 (irange::set_nonzero_bits): Call normalize_kind if necessary.
22984 (irange::get_nonzero_bits): Tweak comment.
22985 (irange::intersect_nonzero_bits): Call normalize_kind if
22987 (irange::union_nonzero_bits): Same.
22988 * value-range.h (irange::normalize_kind): Verify range.
22990 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
22992 * cselib.h (rtx_equal_for_cselib_1):
22993 Change return type from int to bool.
22994 (references_value_p): Ditto.
22995 (rtx_equal_for_cselib_p): Ditto.
22996 * expr.h (can_store_by_pieces): Ditto.
22997 (try_casesi): Ditto.
22998 (try_tablejump): Ditto.
22999 (safe_from_p): Ditto.
23000 * sbitmap.h (bitmap_equal_p): Ditto.
23001 * cselib.cc (references_value_p): Change return type
23002 from int to void and adjust function body accordingly.
23003 (rtx_equal_for_cselib_1): Ditto.
23004 * expr.cc (is_aligning_offset): Ditto.
23005 (can_store_by_pieces): Ditto.
23006 (mostly_zeros_p): Ditto.
23007 (all_zeros_p): Ditto.
23008 (safe_from_p): Ditto.
23009 (is_aligning_offset): Ditto.
23010 (try_casesi): Ditto.
23011 (try_tablejump): Ditto.
23012 (store_constructor): Change "need_to_clear" and
23013 "const_bounds_p" variables to bool.
23014 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
23016 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
23018 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
23021 2023-06-29 Richard Biener <rguenther@suse.de>
23023 PR tree-optimization/110460
23024 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
23025 Only allow integral, pointer and scalar float type scalar_type.
23027 2023-06-29 Lili Cui <lili.cui@intel.com>
23029 PR tree-optimization/110148
23030 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
23031 ops in this function.
23033 2023-06-29 Richard Biener <rguenther@suse.de>
23035 PR middle-end/110452
23036 * expr.cc (store_constructor): Handle uniform boolean
23037 vectors with integer mode specially.
23039 2023-06-29 Richard Biener <rguenther@suse.de>
23041 PR middle-end/110461
23042 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
23045 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
23047 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
23048 (array_slice): Relax va_gc constructor to handle all vectors
23049 with a vl_embed layout.
23051 2023-06-29 Pan Li <pan2.li@intel.com>
23053 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
23054 (riscv_mode_needed): Likewise.
23055 (riscv_entity_mode_after): Likewise.
23056 (riscv_mode_after): Likewise.
23057 (riscv_mode_entry): Likewise.
23058 (riscv_mode_exit): Likewise.
23059 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
23061 * config/riscv/riscv.md: Add FRM register.
23062 * config/riscv/vector-iterators.md: Add FRM type.
23063 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
23064 (fsrm): Define new insn for fsrm instruction.
23066 2023-06-29 Pan Li <pan2.li@intel.com>
23068 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
23069 Add macro for static frm min and max.
23070 * config/riscv/riscv-vector-builtins-bases.cc
23071 (class binop_frm): New class for floating-point with frm.
23072 (BASE): Add vfadd for frm.
23073 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
23074 * config/riscv/riscv-vector-builtins-functions.def
23075 (vfadd_frm): Likewise.
23076 * config/riscv/riscv-vector-builtins-shapes.cc
23077 (struct alu_frm_def): New struct for alu with frm.
23078 (SHAPE): Add alu with frm.
23079 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
23080 * config/riscv/riscv-vector-builtins.cc
23081 (function_checker::report_out_of_range_and_not): New function
23082 for report out of range and not val.
23083 (function_checker::require_immediate_range_or): New function
23084 for checking in range or one val.
23085 * config/riscv/riscv-vector-builtins.h: Add function decl.
23087 2023-06-29 Cui, Lili <lili.cui@intel.com>
23089 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
23090 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
23092 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
23095 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
23096 to insn before validating it.
23098 2023-06-28 Jan Hubicka <jh@suse.cz>
23100 PR middle-end/110334
23101 * ipa-fnsummary.h (ipa_fn_summary): Add
23102 safe_to_inline_to_always_inline.
23103 * ipa-inline.cc (can_early_inline_edge_p): ICE
23104 if SSA is not built; do cycle checking for
23105 always_inline functions.
23106 (inline_always_inline_functions): Be recrusive;
23107 watch for cycles; do not updat overall summary.
23108 (early_inliner): Do not give up on always_inlines.
23109 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
23112 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
23114 * output.h (leaf_function_p): Change return type from int to bool.
23115 (final_forward_branch_p): Ditto.
23116 (only_leaf_regs_used): Ditto.
23117 (maybe_assemble_visibility): Ditto.
23118 * varasm.h (supports_one_only): Ditto.
23119 * rtl.h (compute_alignments): Change return type from int to void.
23120 * final.cc (app_on): Change return type from int to bool.
23121 (compute_alignments): Change return type from int to void
23122 and adjust function body accordingly.
23123 (shorten_branches): Change "something_changed" variable
23124 type from int to bool.
23125 (leaf_function_p): Change return type from int to bool
23126 and adjust function body accordingly.
23127 (final_forward_branch_p): Ditto.
23128 (only_leaf_regs_used): Ditto.
23129 * varasm.cc (contains_pointers_p): Change return type from
23130 int to bool and adjust function body accordingly.
23131 (compare_constant): Ditto.
23132 (maybe_assemble_visibility): Ditto.
23133 (supports_one_only): Ditto.
23135 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
23138 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
23139 (maybe_copy_reg_attrs): New function.
23140 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
23141 (copyprop_hardreg_forward_1): Ditto.
23143 2023-06-28 Richard Biener <rguenther@suse.de>
23145 PR tree-optimization/110434
23146 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
23147 VAR we replace with <retval>.
23149 2023-06-28 Richard Biener <rguenther@suse.de>
23151 PR tree-optimization/110451
23152 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
23153 tcc_comparison are expensive.
23155 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
23157 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
23158 for TImode comparisons on 32-bit architectures.
23159 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
23160 SWIM1248x to exclude/avoid TImode being conditional on -m64.
23161 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
23162 and/or with TARGET_SSE4_1.
23163 * config/i386/predicates.md (ix86_timode_comparison_operator):
23164 New predicate that depends upon TARGET_64BIT.
23165 (ix86_timode_comparison_operand): Likewise.
23167 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
23170 * config/i386/i386-features.cc (compute_convert_gain): Provide
23171 more accurate gains for conversion of scalar comparisons to
23174 2023-06-28 Richard Biener <rguenther@suse.de>
23176 PR tree-optimization/110443
23177 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
23180 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
23182 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
23183 (peephole2 for move_and_compare): New.
23184 (mode_iterator WORD): New. Set the mode to SI/DImode by
23186 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
23187 (split pattern for compare_and_move): Likewise.
23189 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23191 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
23192 (*single_widen_fma<mode>): Ditto.
23194 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
23197 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
23199 (altivec_vupkhs<VU_char>_direct): ...this.
23200 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
23201 predicate to test if a constant can be loaded with vspltisw and
23203 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
23204 a vector constant can be synthesized with a vspltisw and a vupkhsw.
23205 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
23207 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
23208 function to return true if OP mode is V2DI and can be synthesized
23209 with vupkhsw and vspltisw.
23210 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
23211 constants with vspltisw and vupkhsw.
23213 2023-06-28 Jan Hubicka <jh@suse.cz>
23215 PR tree-optimization/110377
23216 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
23218 (ipa_analyze_node): Enable ranger.
23220 2023-06-28 Richard Biener <rguenther@suse.de>
23222 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
23223 (TYPE_PRECISION_RAW): Provide raw access to the precision
23225 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
23226 (gimple_canonical_types_compatible_p): Likewise.
23227 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
23228 Stream TYPE_PRECISION_RAW.
23229 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
23231 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
23233 2023-06-28 Alexandre Oliva <oliva@adacore.com>
23235 * doc/extend.texi (zero-call-used-regs): Document leafy and
23237 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
23238 LEAFY and variants.
23239 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
23240 functions in leafy mode.
23241 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
23243 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23245 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
23246 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
23248 (@pred_single_widen_add<mode>): New pattern.
23249 (@pred_single_widen_sub<mode>): New pattern.
23251 2023-06-28 liuhongt <hongtao.liu@intel.com>
23253 * config/i386/i386.cc (ix86_invalid_conversion): New function.
23254 (TARGET_INVALID_CONVERSION): Define as
23255 ix86_invalid_conversion.
23257 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
23259 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
23261 (<float_cvt><vnconvert><mode>2): Ditto.
23262 (<optab><mode><vnconvert>2): Ditto.
23263 (<float_cvt><mode><vnconvert>2): Ditto.
23264 * config/riscv/vector-iterators.md: Add vnconvert.
23266 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
23268 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
23270 (extend<v_quad_trunc><mode>2): Ditto.
23271 (trunc<mode><v_double_trunc>2): Ditto.
23272 (trunc<mode><v_quad_trunc>2): Ditto.
23273 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
23274 V_QUAD_TRUNC and v_quad_trunc.
23276 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
23278 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
23281 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
23283 * config/riscv/autovec.md (copysign<mode>3): Add expander.
23284 (xorsign<mode>3): Ditto.
23285 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
23287 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
23291 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
23292 (@pred_ncopysign<mode>_scalar): Ditto.
23294 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
23296 * config/riscv/autovec.md: VF_AUTO -> VF.
23297 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
23298 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
23300 * config/riscv/vector.md: Use new iterators.
23302 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
23304 * match.pd: Use element_mode and check if target supports
23305 operation with new type.
23307 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
23309 * config/aarch64/aarch64-sve-builtins-base.cc
23310 (svdupq_impl::fold_nonconst_dupq): New method.
23311 (svdupq_impl::fold): Call fold_nonconst_dupq.
23313 2023-06-27 Andrew Pinski <apinski@marvell.com>
23315 PR middle-end/110420
23316 PR middle-end/103979
23317 PR middle-end/98619
23318 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
23320 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
23322 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
23323 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
23325 (set_switch_stmt_execution_predicate): Same.
23326 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
23328 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
23330 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
23331 ipa_vr instead of value_range.
23334 (ipa_get_value_range): Same.
23335 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
23339 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
23341 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
23342 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
23343 (ipa_set_jfunc_vr): Take a range.
23344 (ipa_compute_jump_functions_for_edge): Pass range to
23346 (ipa_write_jump_function): Call streamer write helper.
23347 (ipa_read_jump_function): Call streamer read helper.
23348 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
23350 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
23352 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
23353 as a probable initializer rather than a probable complete statement.
23355 2023-06-27 Richard Biener <rguenther@suse.de>
23357 PR tree-optimization/96208
23358 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
23359 a non-grouped load if it is the same for all lanes.
23360 (vect_build_slp_tree_2): Handle not grouped loads.
23361 (vect_optimize_slp_pass::remove_redundant_permutations):
23363 (vect_transform_slp_perm_load_1): Likewise.
23364 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
23365 (get_group_load_store_type): Likewise. Handle
23366 invariant accesses.
23367 (vectorizable_load): Likewise.
23369 2023-06-27 liuhongt <hongtao.liu@intel.com>
23371 PR rtl-optimization/110237
23372 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
23374 (maskstore<mode><avx512fmaskmodelower): Ditto.
23375 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
23376 from original <avx512>_store<mode>_mask.
23378 2023-06-27 liuhongt <hongtao.liu@intel.com>
23380 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
23381 Move flag_expensive_optimizations && !optimize_size to ..
23382 * config/i386/i386-options.cc (ix86_option_override_internal):
23383 .. this, it makes -mvzeroupper independent of optimization
23384 level, but still keeps the behavior of architecture
23385 tuning(emit_vzeroupper) unchanged.
23387 2023-06-27 liuhongt <hongtao.liu@intel.com>
23390 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
23391 vzeroupper for vzeroupper call_insn.
23393 2023-06-27 Andrew Pinski <apinski@marvell.com>
23395 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
23398 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23400 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
23403 2023-06-26 Andrew Pinski <apinski@marvell.com>
23405 * doc/extend.texi (access attribute): Add
23407 (interrupt/interrupt_handler attribute):
23410 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23412 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
23413 Use <DWI> instead of <V2XWIDE>.
23414 (aarch64_sqrshrun_n<mode>): Likewise.
23416 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23418 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
23420 (aarch64_rnd_imm_p): ... This.
23421 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
23423 (aarch64_int_rnd_operand): ... This.
23424 (aarch64_simd_rshrn_imm_vec): Delete.
23425 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
23426 Adjust for the above.
23427 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
23428 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
23429 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
23430 (aarch64_sqrshrun_n<mode>_insn): Likewise.
23431 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
23432 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
23433 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
23434 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
23435 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
23437 (aarch64_rnd_imm_p): ... This.
23439 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
23441 * config/s390/s390.cc (s390_encode_section_info): Set
23442 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
23445 2023-06-26 Jan Hubicka <jh@suse.cz>
23447 PR tree-optimization/109849
23448 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
23449 count of newly constructed forwarder block.
23451 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
23453 * doc/optinfo.texi: Fix "steam" -> "stream".
23455 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23457 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
23459 (dse_optimize_stmt): Add LEN_MASK_STORE.
23461 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23463 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
23464 fold of LOAD/STORE with length.
23466 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
23468 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
23469 Check for interdependence between operands 1 and 2.
23471 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
23473 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
23474 into account when costing non-widening/truncating conversions.
23476 2023-06-26 Richard Biener <rguenther@suse.de>
23478 PR tree-optimization/110381
23479 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
23480 Materialize permutes before fold-left reductions.
23482 2023-06-26 Pan Li <pan2.li@intel.com>
23484 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
23486 2023-06-26 Richard Biener <rguenther@suse.de>
23488 * varasm.cc (initializer_constant_valid_p_1): Also
23489 constrain the type of value to be scalar integral
23490 before dispatching to narrowing_initializer_constant_valid_p.
23492 2023-06-26 Richard Biener <rguenther@suse.de>
23494 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
23495 Use element_precision.
23497 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23499 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
23501 (vcondu<V:mode><VI:mode>): Ditto.
23502 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
23503 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
23505 2023-06-26 Richard Biener <rguenther@suse.de>
23507 PR tree-optimization/110392
23508 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
23509 Do early exits on true/false predicate only after normalization.
23511 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23513 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
23516 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
23518 * config/i386/i386.md (peephole2): Simplify zeroing a register
23519 followed by an IOR, XOR or PLUS operation on it, into a move.
23520 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
23521 eliminate (and hide from reload) unnecessary word to doubleword
23522 extensions that are followed by left shifts by sufficiently large,
23523 but valid, bit counts.
23525 2023-06-26 liuhongt <hongtao.liu@intel.com>
23527 PR tree-optimization/110371
23528 PR tree-optimization/110018
23529 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
23530 save intermediate type operand instead of "subtle" vec_dest
23533 2023-06-26 liuhongt <hongtao.liu@intel.com>
23535 PR tree-optimization/110371
23536 PR tree-optimization/110018
23537 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
23538 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
23540 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
23542 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
23543 Override tune_string with arch_string if tune_string is not
23544 explicitly specified.
23546 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23548 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
23550 * config/riscv/riscv-vsetvl.h: New function.
23552 2023-06-25 Li Xu <xuli1@eswincomputing.com>
23554 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
23557 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23559 * config/riscv/autovec.md (len_load_<mode>): Remove.
23560 (len_maskload<mode><vm>): Remove.
23561 (len_store_<mode>): New pattern.
23562 (len_maskstore<mode><vm>): New pattern.
23563 * config/riscv/predicates.md (autovec_length_operand): New predicate.
23564 * config/riscv/riscv-protos.h (enum insn_type): New enum.
23565 (expand_load_store): New function.
23566 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
23567 (emit_nonvlmax_masked_insn): Ditto.
23568 (expand_load_store): Ditto.
23569 * config/riscv/riscv-vector-builtins.cc
23570 (function_expander::use_contiguous_store_insn): Add avl_type operand
23572 * config/riscv/vector.md: Ditto.
23574 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23576 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
23579 2023-06-25 Pan Li <pan2.li@intel.com>
23581 * config/riscv/vector.md: Revert.
23583 2023-06-25 Pan Li <pan2.li@intel.com>
23585 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
23586 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
23587 (ADJUST_ALIGNMENT): Ditto.
23588 (RVV_TUPLE_PARTIAL_MODES): Ditto.
23589 (ADJUST_NUNITS): Ditto.
23590 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
23591 (vfloat16mf4x3_t): Ditto.
23592 (vfloat16mf4x4_t): Ditto.
23593 (vfloat16mf4x5_t): Ditto.
23594 (vfloat16mf4x6_t): Ditto.
23595 (vfloat16mf4x7_t): Ditto.
23596 (vfloat16mf4x8_t): Ditto.
23597 (vfloat16mf2x2_t): Ditto.
23598 (vfloat16mf2x3_t): Ditto.
23599 (vfloat16mf2x4_t): Ditto.
23600 (vfloat16mf2x5_t): Ditto.
23601 (vfloat16mf2x6_t): Ditto.
23602 (vfloat16mf2x7_t): Ditto.
23603 (vfloat16mf2x8_t): Ditto.
23604 (vfloat16m1x2_t): Ditto.
23605 (vfloat16m1x3_t): Ditto.
23606 (vfloat16m1x4_t): Ditto.
23607 (vfloat16m1x5_t): Ditto.
23608 (vfloat16m1x6_t): Ditto.
23609 (vfloat16m1x7_t): Ditto.
23610 (vfloat16m1x8_t): Ditto.
23611 (vfloat16m2x2_t): Ditto.
23612 (vfloat16m2x3_t): Diito.
23613 (vfloat16m2x4_t): Diito.
23614 (vfloat16m4x2_t): Diito.
23615 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
23616 (vfloat16mf4x3_t): Ditto.
23617 (vfloat16mf4x4_t): Ditto.
23618 (vfloat16mf4x5_t): Ditto.
23619 (vfloat16mf4x6_t): Ditto.
23620 (vfloat16mf4x7_t): Ditto.
23621 (vfloat16mf4x8_t): Ditto.
23622 (vfloat16mf2x2_t): Ditto.
23623 (vfloat16mf2x3_t): Ditto.
23624 (vfloat16mf2x4_t): Ditto.
23625 (vfloat16mf2x5_t): Ditto.
23626 (vfloat16mf2x6_t): Ditto.
23627 (vfloat16mf2x7_t): Ditto.
23628 (vfloat16mf2x8_t): Ditto.
23629 (vfloat16m1x2_t): Ditto.
23630 (vfloat16m1x3_t): Ditto.
23631 (vfloat16m1x4_t): Ditto.
23632 (vfloat16m1x5_t): Ditto.
23633 (vfloat16m1x6_t): Ditto.
23634 (vfloat16m1x7_t): Ditto.
23635 (vfloat16m1x8_t): Ditto.
23636 (vfloat16m2x2_t): Ditto.
23637 (vfloat16m2x3_t): Ditto.
23638 (vfloat16m2x4_t): Ditto.
23639 (vfloat16m4x2_t): Ditto.
23640 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
23641 * config/riscv/riscv.md: Ditto.
23642 * config/riscv/vector-iterators.md: Ditto.
23644 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23646 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
23647 (gimple_fold_partial_load_store_mem_ref): Ditto.
23648 (gimple_fold_partial_store): Ditto.
23649 (gimple_fold_call): Ditto.
23651 2023-06-25 liuhongt <hongtao.liu@intel.com>
23654 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
23655 Refine pattern with UNSPEC_MASKLOAD.
23656 (maskload<mode><avx512fmaskmodelower>): Ditto.
23657 (*<avx512>_load<mode>_mask): Extend mode iterator to
23659 (*<avx512>_load<mode>): Ditto.
23661 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23663 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
23665 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23667 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
23668 LEN_MASK_{LOAD,STORE}
23670 2023-06-25 yulong <shiyulong@iscas.ac.cn>
23672 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
23674 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
23676 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
23678 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23680 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
23681 (*fma<VI:mode><P:mode>): Ditto.
23682 (*fnma<mode>): Ditto.
23683 (*fnma<VI:mode><P:mode>): Ditto.
23685 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23687 * config/riscv/autovec.md (fma<mode>4): New pattern.
23688 (*fma<mode>): Ditto.
23689 (fnma<mode>4): Ditto.
23690 (*fnma<mode>): Ditto.
23691 (fms<mode>4): Ditto.
23692 (*fms<mode>): Ditto.
23693 (fnms<mode>4): Ditto.
23694 (*fnms<mode>): Ditto.
23695 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
23697 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
23698 * config/riscv/vector.md: Fix attribute bug.
23700 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23702 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
23703 Apply LEN_MASK_{LOAD,STORE}.
23705 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23707 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
23708 Add LEN_MASK_{LOAD,STORE}.
23710 2023-06-24 David Malcolm <dmalcolm@redhat.com>
23712 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
23713 * diagnostic.cc: Likewise.
23714 * text-art/box-drawing.cc: Likewise.
23715 * text-art/canvas.cc: Likewise.
23716 * text-art/ruler.cc: Likewise.
23717 * text-art/selftests.cc: Likewise.
23718 * text-art/selftests.h (text_art::canvas): New forward decl.
23719 * text-art/style.cc: Add #define INCLUDE_VECTOR.
23720 * text-art/styled-string.cc: Likewise.
23721 * text-art/table.cc: Likewise.
23722 * text-art/table.h: Remove #include <vector>.
23723 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
23724 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
23725 Remove #include of <vector> and <string>.
23726 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
23727 * text-art/widget.h: Remove #include <vector>.
23729 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23731 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
23732 (internal_load_fn_p): Add LEN_MASK_LOAD.
23733 (internal_store_fn_p): Add LEN_MASK_STORE.
23734 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
23735 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
23736 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
23737 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
23738 (get_len_load_store_mode): Ditto.
23739 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
23740 (get_len_load_store_mode): Ditto.
23741 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
23742 (get_all_ones_mask): New function.
23743 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
23744 (vectorizable_load): Ditto.
23746 2023-06-23 Marek Polacek <polacek@redhat.com>
23748 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
23749 -std=gnu++26. Document that for C++23, its value is 202302L.
23750 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
23751 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
23752 (gen_compile_unit_die): Likewise.
23754 2023-06-23 Jan Hubicka <jh@suse.cz>
23756 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
23758 (pass_phiprop::execute): Do not compute it here; return
23759 update_ssa_only_virtuals if something changed.
23760 (pass_data_phiprop): Remove TODO_update_ssa from todos.
23762 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
23763 Aaron Sawdey <acsawdey@linux.ibm.com>
23766 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
23767 allowed prefixed lwa to be generated.
23768 * config/rs6000/fusion.md: Regenerate.
23769 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
23770 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
23771 plus compare immediate fused insns.
23772 (maybe_prefixed): Likewise.
23774 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
23776 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
23777 of ASHIFT to const0_rtx with sufficiently large shift count.
23778 Optimize highpart SUBREGs of ASHIFT as the shift operand when
23779 the shift count is the correct offset. Optimize SUBREGs of
23780 multi-word logic operations if the SUBREGs of both operands
23783 2023-06-23 Richard Biener <rguenther@suse.de>
23785 * varasm.cc (initializer_constant_valid_p_1): Only
23786 allow conversions between scalar floating point types.
23788 2023-06-23 Richard Biener <rguenther@suse.de>
23790 * tree-vect-stmts.cc (vectorizable_assignment):
23791 Properly handle non-integral operands when analyzing
23794 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
23796 PR tree-optimization/110280
23797 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
23798 using build_vector_from_val with the element of input operand, and
23799 mask's type if operand and mask's types don't match.
23801 2023-06-23 Richard Biener <rguenther@suse.de>
23803 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
23804 the truth_value_p case with !VECTOR_TYPE_P.
23806 2023-06-23 Richard Biener <rguenther@suse.de>
23808 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
23809 Exit early when the type isn't scalar integral.
23811 2023-06-23 Richard Biener <rguenther@suse.de>
23813 * match.pd ((outertype)((innertype0)a+(innertype1)b)
23814 -> ((newtype)a+(newtype)b)): Use element_precision
23817 2023-06-23 Richard Biener <rguenther@suse.de>
23819 * fold-const.cc (fold_binary_loc): Use element_precision
23820 when trying (double)float1 CMP (double)float2 to
23821 float1 CMP float2 simplification.
23822 * match.pd: Likewise.
23824 2023-06-23 Richard Biener <rguenther@suse.de>
23826 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
23827 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
23829 2023-06-23 Richard Biener <rguenther@suse.de>
23831 * tree-vect-stmts.cc (vector_vector_composition_type):
23832 Handle composition of a vector from a number of elements that
23833 happens to match its number of lanes.
23835 2023-06-22 Marek Polacek <polacek@redhat.com>
23837 * configure.ac (--enable-host-bind-now): New check. Add
23838 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
23839 * configure: Regenerate.
23840 * doc/install.texi: Document --enable-host-bind-now.
23842 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
23844 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
23846 2023-06-22 Richard Biener <rguenther@suse.de>
23848 PR tree-optimization/110332
23849 * tree-ssa-phiprop.cc (propagate_with_phi): Always
23850 check aliasing with edge inserted loads.
23852 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
23853 Uros Bizjak <ubizjak@gmail.com>
23855 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
23856 expansion of ptestc with equal operands as producing const1_rtx.
23857 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
23858 estimates of UNSPEC_PTEST, where the ptest performs the PAND
23859 or PAND of its operands.
23860 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
23861 of reg_equal_p operands into an x86_stc instruction.
23862 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
23863 (define_split): Similar to above for strict_low_part destinations.
23864 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
23866 2023-06-22 David Malcolm <dmalcolm@redhat.com>
23869 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
23870 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
23872 (fanalyzer-debug-text-art): New.
23874 2023-06-22 David Malcolm <dmalcolm@redhat.com>
23876 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
23877 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
23878 text-art/style.o, text-art/styled-string.o, text-art/table.o,
23879 text-art/theme.o, and text-art/widget.o.
23880 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
23881 (COLOR_FG_BRIGHT_RED): New.
23882 (COLOR_FG_BRIGHT_GREEN): New.
23883 (COLOR_FG_BRIGHT_YELLOW): New.
23884 (COLOR_FG_BRIGHT_BLUE): New.
23885 (COLOR_FG_BRIGHT_MAGENTA): New.
23886 (COLOR_FG_BRIGHT_CYAN): New.
23887 (COLOR_FG_BRIGHT_WHITE): New.
23888 (COLOR_BG_BRIGHT_BLACK): New.
23889 (COLOR_BG_BRIGHT_RED): New.
23890 (COLOR_BG_BRIGHT_GREEN): New.
23891 (COLOR_BG_BRIGHT_YELLOW): New.
23892 (COLOR_BG_BRIGHT_BLUE): New.
23893 (COLOR_BG_BRIGHT_MAGENTA): New.
23894 (COLOR_BG_BRIGHT_CYAN): New.
23895 (COLOR_BG_BRIGHT_WHITE): New.
23896 * common.opt (fdiagnostics-text-art-charset=): New option.
23897 (diagnostic-text-art.h): New SourceInclude.
23898 (diagnostic_text_art_charset) New Enum and EnumValues.
23899 * configure: Regenerate.
23900 * configure.ac (gccdepdir): Add text-art to loop.
23901 * diagnostic-diagram.h: New file.
23902 * diagnostic-format-json.cc (json_emit_diagram): New.
23903 (diagnostic_output_format_init_json): Wire it up to
23904 context->m_diagrams.m_emission_cb.
23905 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
23906 "text-art/canvas.h".
23907 (sarif_result::on_nested_diagnostic): Move code to...
23908 (sarif_result::add_related_location): ...this new function.
23909 (sarif_result::on_diagram): New.
23910 (sarif_builder::emit_diagram): New.
23911 (sarif_builder::make_message_object_for_diagram): New.
23912 (sarif_emit_diagram): New.
23913 (diagnostic_output_format_init_sarif): Set
23914 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
23915 * diagnostic-text-art.h: New file.
23916 * diagnostic.cc: Include "diagnostic-text-art.h",
23917 "diagnostic-diagram.h", and "text-art/theme.h".
23918 (diagnostic_initialize): Initialize context->m_diagrams and
23919 call diagnostics_text_art_charset_init.
23920 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
23921 (diagnostic_emit_diagram): New.
23922 (diagnostics_text_art_charset_init): New.
23923 * diagnostic.h (text_art::theme): New forward decl.
23924 (class diagnostic_diagram): Likewise.
23925 (diagnostic_context::m_diagrams): New field.
23926 (diagnostic_emit_diagram): New decl.
23927 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
23928 -fdiagnostics-text-art-charset=.
23929 (-fdiagnostics-plain-output): Add
23930 -fdiagnostics-text-art-charset=none.
23931 * gcc.cc: Include "diagnostic-text-art.h".
23932 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
23933 * opts-common.cc (decode_cmdline_options_to_array): Add
23934 "-fdiagnostics-text-art-charset=none" to expanded_args for
23935 -fdiagnostics-plain-output.
23936 * opts.cc: Include "diagnostic-text-art.h".
23937 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
23938 * pretty-print.cc (pp_unicode_character): New.
23939 * pretty-print.h (pp_unicode_character): New decl.
23940 * selftest-run-tests.cc: Include "text-art/selftests.h".
23941 (selftest::run_tests): Call text_art_tests.
23942 * text-art/box-drawing-chars.inc: New file, generated by
23943 contrib/unicode/gen-box-drawing-chars.py.
23944 * text-art/box-drawing.cc: New file.
23945 * text-art/box-drawing.h: New file.
23946 * text-art/canvas.cc: New file.
23947 * text-art/canvas.h: New file.
23948 * text-art/ruler.cc: New file.
23949 * text-art/ruler.h: New file.
23950 * text-art/selftests.cc: New file.
23951 * text-art/selftests.h: New file.
23952 * text-art/style.cc: New file.
23953 * text-art/styled-string.cc: New file.
23954 * text-art/table.cc: New file.
23955 * text-art/table.h: New file.
23956 * text-art/theme.cc: New file.
23957 * text-art/theme.h: New file.
23958 * text-art/types.h: New file.
23959 * text-art/widget.cc: New file.
23960 * text-art/widget.h: New file.
23962 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
23964 * function.h (emit_initial_value_sets):
23965 Change return type from int to void.
23966 (aggregate_value_p): Change return type from int to bool.
23967 (prologue_contains): Ditto.
23968 (epilogue_contains): Ditto.
23969 (prologue_epilogue_contains): Ditto.
23970 * function.cc (temp_slot): Make "in_use" variable bool.
23971 (make_slot_available): Update for changed "in_use" variable.
23972 (assign_stack_temp_for_type): Ditto.
23973 (emit_initial_value_sets): Change return type from int to void
23974 and update function body accordingly.
23975 (instantiate_virtual_regs): Ditto.
23976 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
23977 (safe_insn_predicate): Change return type from int to bool.
23978 (aggregate_value_p): Change return type from int to bool
23979 and update function body accordingly.
23980 (prologue_contains): Change return type from int to bool.
23981 (prologue_epilogue_contains): Ditto.
23983 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
23985 * common.opt (fp_contract_mode) [on]: Remove fallback.
23986 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
23987 * doc/invoke.texi (-ffp-contract): Update.
23988 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
23990 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23992 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
23993 Add alternatives to prefer to avoid same input and output Z register.
23994 (mask_gather_load<mode><v_int_container>): Likewise.
23995 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
23996 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
23997 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
23998 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24000 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24002 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24003 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24004 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24005 <SVE_2BHSI:mode>_sxtw): Likewise.
24006 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24007 <SVE_2BHSI:mode>_uxtw): Likewise.
24008 (@aarch64_ldff1_gather<mode>): Likewise.
24009 (@aarch64_ldff1_gather<mode>): Likewise.
24010 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24011 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24012 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24013 <VNx4_NARROW:mode>): Likewise.
24014 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24015 <VNx2_NARROW:mode>): Likewise.
24016 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24017 <VNx2_NARROW:mode>_sxtw): Likewise.
24018 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24019 <VNx2_NARROW:mode>_uxtw): Likewise.
24020 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24021 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24022 <SVE_PARTIAL_I:mode>): Likewise.
24024 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24026 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
24027 Convert to compact alternatives syntax.
24028 (mask_gather_load<mode><v_int_container>): Likewise.
24029 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
24030 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
24031 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
24032 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24034 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24036 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24037 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24038 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24039 <SVE_2BHSI:mode>_sxtw): Likewise.
24040 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24041 <SVE_2BHSI:mode>_uxtw): Likewise.
24042 (@aarch64_ldff1_gather<mode>): Likewise.
24043 (@aarch64_ldff1_gather<mode>): Likewise.
24044 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24045 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24046 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24047 <VNx4_NARROW:mode>): Likewise.
24048 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24049 <VNx2_NARROW:mode>): Likewise.
24050 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24051 <VNx2_NARROW:mode>_sxtw): Likewise.
24052 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24053 <VNx2_NARROW:mode>_uxtw): Likewise.
24054 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24055 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24056 <SVE_PARTIAL_I:mode>): Likewise.
24058 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24061 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24063 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
24064 Convert to compact alternatives syntax.
24065 (mask_gather_load<mode><v_int_container>): Likewise.
24066 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
24067 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
24068 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
24069 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24071 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24073 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24074 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24075 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24076 <SVE_2BHSI:mode>_sxtw): Likewise.
24077 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24078 <SVE_2BHSI:mode>_uxtw): Likewise.
24079 (@aarch64_ldff1_gather<mode>): Likewise.
24080 (@aarch64_ldff1_gather<mode>): Likewise.
24081 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24082 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24083 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24084 <VNx4_NARROW:mode>): Likewise.
24085 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24086 <VNx2_NARROW:mode>): Likewise.
24087 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24088 <VNx2_NARROW:mode>_sxtw): Likewise.
24089 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24090 <VNx2_NARROW:mode>_uxtw): Likewise.
24091 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24092 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24093 <SVE_PARTIAL_I:mode>): Likewise.
24095 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24097 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
24098 (get_len_load_store_mode): Ditto.
24099 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
24100 (get_len_load_store_mode): Ditto.
24101 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
24102 (get_len_load_store_mode): Ditto.
24103 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
24104 (get_len_load_store_mode): Ditto.
24105 * tree-if-conv.cc: include optabs-tree instead of optabs-query
24107 2023-06-21 Richard Biener <rguenther@suse.de>
24109 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
24110 split_constant_offset for the POINTER_PLUS_EXPR case.
24112 2023-06-21 Richard Biener <rguenther@suse.de>
24114 * tree-ssa-loop-ivopts.cc (record_group_use): Use
24115 split_constant_offset.
24117 2023-06-21 Richard Biener <rguenther@suse.de>
24119 * tree-loop-distribution.cc (classify_builtin_st): Use
24120 split_constant_offset.
24121 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
24122 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
24124 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24126 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
24127 Convert to compact alternatives syntax.
24128 (mask_gather_load<mode><v_int_container>): Likewise.
24129 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
24130 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
24131 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
24132 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
24134 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
24136 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24137 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
24138 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24139 <SVE_2BHSI:mode>_sxtw): Likewise.
24140 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
24141 <SVE_2BHSI:mode>_uxtw): Likewise.
24142 (@aarch64_ldff1_gather<mode>): Likewise.
24143 (@aarch64_ldff1_gather<mode>): Likewise.
24144 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
24145 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
24146 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
24147 <VNx4_NARROW:mode>): Likewise.
24148 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24149 <VNx2_NARROW:mode>): Likewise.
24150 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24151 <VNx2_NARROW:mode>_sxtw): Likewise.
24152 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
24153 <VNx2_NARROW:mode>_uxtw): Likewise.
24154 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
24155 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
24156 <SVE_PARTIAL_I:mode>): Likewise.
24158 2023-06-21 Tamar Christina <tamar.christina@arm.com>
24161 * doc/md.texi: Replace backslashchar.
24163 2023-06-21 Richard Biener <rguenther@suse.de>
24165 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
24166 Overload. For masked main loops make sure the vectorization
24167 factor isn't more than double the number of iterations.
24169 2023-06-21 Jan Beulich <jbeulich@suse.com>
24171 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
24172 value duplication by ix86_build_signbit_mask() when AVX512F and
24174 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
24175 2-alternative form. Adjust "mode" attribute. Add "enabled"
24177 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
24178 && !TARGET_PREFER_AVX256.
24179 (*<avx512>_vpternlog<mode>_2): Likewise.
24180 (*<avx512>_vpternlog<mode>_3): Likewise.
24182 2023-06-21 liuhongt <hongtao.liu@intel.com>
24185 * tree-vect-stmts.cc (vectorizable_conversion): Use
24186 intermiediate integer type for float_expr/fix_trunc_expr when
24187 direct optab is not existed.
24189 2023-06-20 Tamar Christina <tamar.christina@arm.com>
24191 PR bootstrap/110324
24192 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
24194 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
24196 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
24197 register operand to the stack pointer. Require the second register
24198 operand to have the number specified in a separate const_int operand.
24199 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
24200 (aarch64_allocate_and_probe_stack_space): Use it.
24201 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
24202 (aarch64_expand_epilogue): Likewise.
24204 2023-06-20 Jakub Jelinek <jakub@redhat.com>
24206 PR middle-end/79173
24207 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
24208 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
24211 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
24213 * calls.h (setjmp_call_p): Change return type from int to bool.
24214 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
24215 (store_one_arg): Change return type from int to bool
24216 and adjust function body accordingly. Change "sibcall_failure"
24218 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
24219 argument to bool. Change "partial_seen" variable to bool.
24220 (load_register_parameters): Change *sibcall_failure
24221 pointer argument to bool.
24222 (check_sibcall_argument_overlap_1): Change return type from int to bool
24223 and adjust function body accordingly.
24224 (check_sibcall_argument_overlap): Ditto. Change
24225 "mark_stored_args_map" argument to bool.
24226 (emit_call_1): Change "already_popped" variable to bool.
24227 (setjmp_call_p): Change return type from int to bool
24228 and adjust function body accordingly.
24229 (initialize_argument_information): Change *must_preallocate
24230 pointer argument to bool.
24231 (expand_call): Change "pcc_struct_value", "must_preallocate"
24232 and "sibcall_failure" variables to bool.
24233 (emit_library_call_value_1): Change "pcc_struct_value"
24236 2023-06-20 Martin Jambor <mjambor@suse.cz>
24239 * ipa-sra.cc (struct caller_issues): New field there_is_one.
24240 (check_for_caller_issues): Set it.
24241 (check_all_callers_for_issues): Check it.
24243 2023-06-20 Martin Jambor <mjambor@suse.cz>
24245 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
24246 (struct ipcp_transformation): Rearrange members according to
24247 C++ class coding convention, add m_uid_to_idx,
24248 get_param_index and maybe_create_parm_idx_map.
24249 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
24250 (compare_uids): Likewise.
24251 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
24252 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
24253 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
24254 (ipcp_update_vr): Likewise.
24255 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
24256 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
24258 2023-06-20 Carl Love <cel@us.ibm.com>
24260 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
24261 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
24262 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
24263 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
24264 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
24265 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
24266 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
24267 * config/rs6000/rs6000-builtins.def
24268 (__builtin_vsx_scalar_extract_exp_to_vec,
24269 __builtin_vsx_scalar_extract_sig_to_vec,
24270 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
24271 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
24272 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
24273 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
24274 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
24275 overloaded instance. Update comments.
24276 * config/rs6000/rs6000-overload.def
24277 (__builtin_vec_scalar_insert_exp): Add new overload definition with
24279 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
24280 overloaded definitions.
24281 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
24282 (DI_to_TI): New mode attribute.
24283 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
24284 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
24285 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
24286 * doc/extend.texi (scalar_extract_exp_to_vec,
24287 scalar_extract_sig_to_vec): Add documentation for new builtins.
24288 (scalar_insert_exp): Add new overloaded builtin definition.
24290 2023-06-20 Li Xu <xuli1@eswincomputing.com>
24292 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
24293 size of vector mask mode to one rvv register.
24295 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24297 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
24299 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
24301 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
24304 2023-06-20 Richard Biener <rguenther@suse.de>
24306 * tree-ssa-dse.cc (dse_classify_store): When we found
24307 no defs and the basic-block with the original definition
24308 ends in __builtin_unreachable[_trap] the store is dead.
24310 2023-06-20 Richard Biener <rguenther@suse.de>
24312 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
24313 keep the virtual SSA form up-to-date.
24315 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24317 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
24318 New define_insn_and_split.
24320 2023-06-20 Tamar Christina <tamar.christina@arm.com>
24322 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
24324 2023-06-20 Jan Beulich <jbeulich@suse.com>
24326 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
24327 constraint. Add new AVX512F alternative.
24329 2023-06-20 Richard Biener <rguenther@suse.de>
24332 * dwarf2out.cc (process_scope_var): Continue processing
24333 the decl after setting a parent in case the existing DIE
24336 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
24338 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
24339 (riscv_arg_has_vector): Simplify.
24340 (riscv_pass_in_vector_p): Adjust warning message.
24342 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
24344 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
24345 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
24346 * config/riscv/riscv.md (riscv_frcsr): New patterns.
24347 (riscv_fscsr): Likewise.
24349 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
24351 PR rtl-optimization/110305
24352 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
24353 Handle HONOR_SNANS for x + 0.0.
24355 2023-06-19 Jan Hubicka <jh@suse.cz>
24357 PR tree-optimization/109811
24358 PR tree-optimization/109849
24359 * passes.def: Add phiprop to early optimization passes.
24360 * tree-ssa-phiprop.cc: Allow clonning.
24362 2023-06-19 Tamar Christina <tamar.christina@arm.com>
24364 * config/aarch64/aarch64.md (arches): Add nosimd.
24365 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
24368 2023-06-19 Tamar Christina <tamar.christina@arm.com>
24369 Omar Tahir <Omar.Tahir2@arm.com>
24371 * gensupport.cc (class conlist, add_constraints, add_attributes,
24372 skip_spaces, expect_char, preprocess_compact_syntax,
24373 parse_section_layout, parse_section, convert_syntax): New.
24374 (process_rtx): Check for conversion.
24375 * genoutput.cc (process_template): Check for unresolved iterators.
24376 (class data): Add compact_syntax_p.
24377 (gen_insn): Use it.
24378 * gensupport.h (compact_syntax): New.
24379 (hash-set.h): Include.
24380 * doc/md.texi: Document it.
24382 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
24384 * recog.h (check_asm_operands): Change return type from int to bool.
24385 (insn_invalid_p): Ditto.
24386 (verify_changes): Ditto.
24387 (apply_change_group): Ditto.
24388 (constrain_operands): Ditto.
24389 (constrain_operands_cached): Ditto.
24390 (validate_replace_rtx_subexp): Ditto.
24391 (validate_replace_rtx): Ditto.
24392 (validate_replace_rtx_part): Ditto.
24393 (validate_replace_rtx_part_nosimplify): Ditto.
24394 (added_clobbers_hard_reg_p): Ditto.
24395 (peep2_regno_dead_p): Ditto.
24396 (peep2_reg_dead_p): Ditto.
24397 (store_data_bypass_p): Ditto.
24398 (if_test_bypass_p): Ditto.
24399 * rtl.h (split_all_insns_noflow): Change
24400 return type from unsigned int to void.
24401 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
24402 of generated added_clobbers_hard_reg_p from int to bool and adjust
24403 function body accordingly. Change "used" variable type from
24405 * recog.cc (check_asm_operands): Change return type
24406 from int to bool and adjust function body accordingly.
24407 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
24408 (verify_changes): Change return type from int to bool.
24409 (apply_change_group): Change return type from int to bool
24410 and adjust function body accordingly.
24411 (validate_replace_rtx_subexp): Change return type from int to bool.
24412 (validate_replace_rtx): Ditto.
24413 (validate_replace_rtx_part): Ditto.
24414 (validate_replace_rtx_part_nosimplify): Ditto.
24415 (constrain_operands_cached): Ditto.
24416 (constrain_operands): Ditto. Change "lose" and "win"
24417 variables type from int to bool.
24418 (split_all_insns_noflow): Change return type from unsigned int
24419 to void and adjust function body accordingly.
24420 (peep2_regno_dead_p): Change return type from int to bool.
24421 (peep2_reg_dead_p): Ditto.
24422 (peep2_find_free_register): Change "success"
24423 variable type from int to bool
24424 (store_data_bypass_p_1): Change return type from int to bool.
24425 (store_data_bypass_p): Ditto.
24427 2023-06-19 Li Xu <xuli1@eswincomputing.com>
24429 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
24432 2023-06-19 Pan Li <pan2.li@intel.com>
24435 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
24437 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
24438 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
24439 VF_ZVE63 and VF_ZVE32.
24440 * config/riscv/vector.md
24441 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
24442 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
24443 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
24444 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
24445 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
24446 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
24447 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
24448 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
24449 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
24450 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
24452 2023-06-19 Pan Li <pan2.li@intel.com>
24455 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
24457 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
24458 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
24459 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
24460 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
24461 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
24462 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
24463 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
24464 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
24465 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
24466 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
24467 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
24468 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
24469 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
24470 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
24472 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
24474 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
24475 (gcn_init_libfuncs): Add div and mod functions for all modes.
24476 Add placeholders for divmod functions.
24477 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
24479 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
24481 * tree-vect-generic.cc: Include optabs-libfuncs.h.
24482 (get_compute_type): Check optab_libfunc.
24483 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
24484 (vectorizable_operation): Check optab_libfunc.
24486 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
24488 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
24489 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
24490 (V_MOV, V_MOV_ALT): Likewise.
24491 (scalar_mode, SCALAR_MODE): Add TImode.
24492 (vnsi, VnSI, vndi, VnDI): Likewise.
24493 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
24494 (mov<mode>, mov<mode>_unspec): Use V_MOV.
24495 (*mov<mode>_4reg): New insn.
24496 (mov<mode>_exec): New 4reg variant.
24497 (mov<mode>_sgprbase): Likewise.
24498 (reload_in<mode>, reload_out<mode>): Use V_MOV.
24499 (vec_set<mode>): Likewise.
24500 (vec_duplicate<mode><exec>): New 4reg variant.
24501 (vec_extract<mode><scalar_mode>): Likewise.
24502 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
24503 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
24504 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
24505 (fold_extract_last_<mode>): Use V_MOV.
24506 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
24507 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
24508 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
24509 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
24510 gather<mode>_insn_2offsets<exec>): Use V_MOV.
24511 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
24512 scatter<mode>_insn_1offset<exec_scatter>,
24513 scatter<mode>_insn_1offset_ds<exec_scatter>,
24514 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
24515 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
24516 mask_scatter_store<mode><vnsi>): Likewise.
24517 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
24518 (gcn_hard_regno_mode_ok): Likewise.
24519 (GEN_VNM): Add TImode support.
24520 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
24521 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
24522 V8TImode, and V2TImode.
24523 (print_operand): Add 'J' and 'K' print codes.
24525 2023-06-19 Richard Biener <rguenther@suse.de>
24527 PR tree-optimization/110298
24528 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
24529 Clear number of iterations info before cleaning up the CFG.
24531 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24533 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
24534 Simplify vec_concat of lowpart subreg and high part vec_select.
24536 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
24538 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
24540 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
24542 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
24543 Handle null niters_skip.
24545 2023-06-19 Richard Biener <rguenther@suse.de>
24547 * config/aarch64/aarch64.cc
24548 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
24549 to LOOP_VINFO_MASKS.
24551 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
24554 * common/config/avr/avr-common.cc: Remove setting
24555 of OPT_fdelete_null_pointer_checks.
24556 * config/avr/avr.cc (avr_option_override): Clear
24557 flag_delete_null_pointer_checks if zero_address_valid.
24558 (avr_addr_space_zero_address_valid): New function.
24559 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
24562 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24563 Robin Dapp <rdapp.gcc@gmail.com>
24565 * doc/md.texi: Add len_mask{load,store}.
24566 * genopinit.cc (main): Ditto.
24568 * internal-fn.cc (len_maskload_direct): Ditto.
24569 (len_maskstore_direct): Ditto.
24570 (expand_call_mem_ref): Ditto.
24571 (expand_partial_load_optab_fn): Ditto.
24572 (expand_len_maskload_optab_fn): Ditto.
24573 (expand_partial_store_optab_fn): Ditto.
24574 (expand_len_maskstore_optab_fn): Ditto.
24575 (direct_len_maskload_optab_supported_p): Ditto.
24576 (direct_len_maskstore_optab_supported_p): Ditto.
24577 * internal-fn.def (LEN_MASK_LOAD): Ditto.
24578 (LEN_MASK_STORE): Ditto.
24579 * optabs.def (OPTAB_CD): Ditto.
24581 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24583 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
24585 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24587 * config/riscv/autovec.md (<optab><mode>3): Implement binop
24589 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
24590 (enum vxrm_field_enum): Rename this...
24591 (enum fixed_point_rounding_mode): ...to this.
24592 (enum frm_field_enum): Rename this...
24593 (enum floating_point_rounding_mode): ...to this.
24594 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
24595 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
24597 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
24598 (riscv_excess_precision): Do not convert to float for ZVFH.
24599 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
24601 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24603 * config/riscv/vector-iterators.md: Add VI_QH iterator.
24604 * config/riscv/autovec-opt.md
24605 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
24606 that includes sign extension.
24607 (@pred_extract_first_sextsi<mode>): Dito for SImode.
24609 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24611 * config/riscv/autovec.md (vec_set<mode>): Implement.
24612 (vec_extract<mode><vel>): Implement.
24613 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
24614 (emit_vlmax_slide_insn): Declare.
24615 (emit_nonvlmax_slide_tu_insn): Declare.
24616 (emit_scalar_move_insn): Export.
24617 (emit_nonvlmax_integer_move_insn): Export.
24618 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
24619 (emit_nonvlmax_slide_tu_insn): New function.
24620 (emit_vlmax_masked_mu_insn): No change.
24621 (emit_vlmax_integer_move_insn): Export.
24623 2023-06-19 Richard Biener <rguenther@suse.de>
24625 * tree-vectorizer.h (enum vect_partial_vector_style): New.
24626 (_loop_vec_info::partial_vector_style): Likewise.
24627 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
24628 (rgroup_controls::compare_type): Add.
24629 (vec_loop_masks): Change from a typedef to auto_vec<>
24631 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
24632 Adjust. Convert niters_skip to compare_type.
24633 (vect_set_loop_condition_partial_vectors_avx512): New function
24634 implementing the AVX512 partial vector codegen.
24635 (vect_set_loop_condition): Dispatch to the correct
24636 vect_set_loop_condition_partial_vectors_* function based on
24637 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
24638 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
24639 in the original niter type.
24640 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
24641 partial_vector_style.
24642 (can_produce_all_loop_masks_p): Adjust.
24643 (vect_verify_full_masking): Produce the rgroup_controls vector
24644 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
24645 (vect_verify_full_masking_avx512): New function implementing
24646 verification of AVX512 style masking.
24647 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
24648 (vect_analyze_loop_2): Also try AVX512 style masking.
24650 (vect_estimate_min_profitable_iters): Implement AVX512 style
24651 mask producing cost.
24652 (vect_record_loop_mask): Do not build the rgroup_controls
24653 vector here but record masks in a hash-set.
24654 (vect_get_loop_mask): Implement AVX512 style mask query,
24655 complementing the existing while_ult style.
24657 2023-06-19 Richard Biener <rguenther@suse.de>
24659 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
24661 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
24662 (vectorize_fold_left_reduction): Adjust.
24663 (vect_transform_reduction): Likewise.
24664 (vectorizable_live_operation): Likewise.
24665 * tree-vect-stmts.cc (vectorizable_call): Likewise.
24666 (vectorizable_operation): Likewise.
24667 (vectorizable_store): Likewise.
24668 (vectorizable_load): Likewise.
24669 (vectorizable_condition): Likewise.
24671 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
24674 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
24675 Add Optimization option property.
24677 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24679 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
24680 Add new pattern for the abovementioned case.
24682 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24684 * config/xtensa/xtensa.cc
24685 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
24687 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
24689 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
24691 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
24693 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
24695 2023-06-19 liuhongt <hongtao.liu@intel.com>
24698 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
24700 (sse2_packsswb<mask_name>): .. this, ..
24701 (avx2_packsswb<mask_name>): .. this and ..
24702 (avx512bw_packsswb<mask_name>): .. this.
24703 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
24704 (sse2_packssdw<mask_name>): .. this, ..
24705 (avx2_packssdw<mask_name>): .. this and ..
24706 (avx512bw_packssdw<mask_name>): .. this.
24708 2023-06-19 liuhongt <hongtao.liu@intel.com>
24711 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
24712 UNSPEC_US_TRUNCATE instead of original us_truncate for
24714 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
24716 (mmx_packsswb): .. this and ..
24717 (mmx_packuswb): .. this.
24718 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
24720 (s_trunsuffix): Removed code iterator.
24721 (any_s_truncate): Ditto.
24722 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
24723 UNSPEC_US_TRUNCATE instead of original us_truncate.
24724 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
24725 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
24727 2023-06-18 Pan Li <pan2.li@intel.com>
24729 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
24731 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
24733 * rtl.h (*rtx_equal_p_callback_function):
24734 Change return type from int to bool.
24735 (rtx_equal_p): Ditto.
24736 (*hash_rtx_callback_function): Ditto.
24737 * rtl.cc (rtx_equal_p): Change return type from int to bool
24738 and adjust function body accordingly.
24739 * early-remat.cc (scratch_equal): Ditto.
24740 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
24741 (hash_with_unspec_callback): Ditto.
24743 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
24745 * config/arc/arc.md (movqi_insn): Allow certain constants to
24746 be stored into memory in the pattern's condition.
24747 (movsf_insn): Similarly.
24749 2023-06-18 Honza <jh@ryzen3.suse.cz>
24751 PR tree-optimization/109849
24752 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
24753 ES; handle ipa_predicate::not_sra_candidate.
24754 (evaluate_properties_for_edge): Pass es to
24755 evaluate_conditions_for_known_args.
24756 (ipa_fn_summary_t::duplicate): Handle sra candidates.
24757 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
24758 (load_or_store_of_ptr_parameter): New function.
24759 (points_to_possible_sra_candidate_p): New function.
24760 (analyze_function_body): Initialize points_to_possible_sra_candidate;
24761 determine sra predicates.
24762 (estimate_ipcp_clone_size_and_time): Update call of
24763 evaluate_conditions_for_known_args.
24764 (remap_edge_params): Update points_to_possible_sra_candidate.
24765 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
24766 (write_ipa_call_summary): Likewise.
24767 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
24768 (dump_condition): Dump it.
24769 * ipa-predicate.h (struct inline_param_summary): Add
24770 points_to_possible_sra_candidate.
24772 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
24774 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
24775 function for setting the carry flag.
24776 (ix86_expand_builtin) <handlecarry>: Use it here.
24777 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
24778 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
24779 (usubc<mode>5): Likewise.
24781 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
24783 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
24784 for the immediate constant shift count.
24785 (*concat<mode><dwi>3_2): Likewise.
24786 (*concat<mode><dwi>3_3): Likewise.
24787 (*concat<mode><dwi>3_4): Likewise.
24788 (*concat<mode><dwi>3_5): Likewise.
24789 (*concat<mode><dwi>3_6): Likewise.
24791 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
24793 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
24794 (hash_rtx): Remove.
24795 * early-remat.cc (remat_candidate_hasher::equal): Update
24796 to call rtx_equal_p with rtx_equal_p_callback_function argument.
24797 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
24798 (rtx_equal_p): Remove.
24799 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
24800 argument with NULL default value.
24801 (rtx_equal_p_cb): Remove function declaration.
24802 (hash_rtx_cb): Ditto.
24803 (hash_rtx): Add hash_rtx_callback_function argument
24804 with NULL default value.
24805 * sel-sched-ir.cc (free_nop_pool): Update function comment.
24806 (skip_unspecs_callback): Ditto.
24807 (vinsn_init): Update to call hash_rtx with
24808 hash_rtx_callback_function argument.
24809 (vinsn_equal_p): Ditto.
24811 2023-06-18 yulong <shiyulong@iscas.ac.cn>
24813 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
24814 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
24815 (ADJUST_ALIGNMENT): Ditto.
24816 (RVV_TUPLE_PARTIAL_MODES): Ditto.
24817 (ADJUST_NUNITS): Ditto.
24818 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
24820 (vfloat16mf4x3_t): Ditto.
24821 (vfloat16mf4x4_t): Ditto.
24822 (vfloat16mf4x5_t): Ditto.
24823 (vfloat16mf4x6_t): Ditto.
24824 (vfloat16mf4x7_t): Ditto.
24825 (vfloat16mf4x8_t): Ditto.
24826 (vfloat16mf2x2_t): Ditto.
24827 (vfloat16mf2x3_t): Ditto.
24828 (vfloat16mf2x4_t): Ditto.
24829 (vfloat16mf2x5_t): Ditto.
24830 (vfloat16mf2x6_t): Ditto.
24831 (vfloat16mf2x7_t): Ditto.
24832 (vfloat16mf2x8_t): Ditto.
24833 (vfloat16m1x2_t): Ditto.
24834 (vfloat16m1x3_t): Ditto.
24835 (vfloat16m1x4_t): Ditto.
24836 (vfloat16m1x5_t): Ditto.
24837 (vfloat16m1x6_t): Ditto.
24838 (vfloat16m1x7_t): Ditto.
24839 (vfloat16m1x8_t): Ditto.
24840 (vfloat16m2x2_t): Ditto.
24841 (vfloat16m2x3_t): Ditto.
24842 (vfloat16m2x4_t): Ditto.
24843 (vfloat16m4x2_t): Ditto.
24844 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
24845 (vfloat16mf4x3_t): Ditto.
24846 (vfloat16mf4x4_t): Ditto.
24847 (vfloat16mf4x5_t): Ditto.
24848 (vfloat16mf4x6_t): Ditto.
24849 (vfloat16mf4x7_t): Ditto.
24850 (vfloat16mf4x8_t): Ditto.
24851 (vfloat16mf2x2_t): Ditto.
24852 (vfloat16mf2x3_t): Ditto.
24853 (vfloat16mf2x4_t): Ditto.
24854 (vfloat16mf2x5_t): Ditto.
24855 (vfloat16mf2x6_t): Ditto.
24856 (vfloat16mf2x7_t): Ditto.
24857 (vfloat16mf2x8_t): Ditto.
24858 (vfloat16m1x2_t): Ditto.
24859 (vfloat16m1x3_t): Ditto.
24860 (vfloat16m1x4_t): Ditto.
24861 (vfloat16m1x5_t): Ditto.
24862 (vfloat16m1x6_t): Ditto.
24863 (vfloat16m1x7_t): Ditto.
24864 (vfloat16m1x8_t): Ditto.
24865 (vfloat16m2x2_t): Ditto.
24866 (vfloat16m2x3_t): Ditto.
24867 (vfloat16m2x4_t): Ditto.
24868 (vfloat16m4x2_t): Ditto.
24869 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
24870 * config/riscv/riscv.md: New.
24871 * config/riscv/vector-iterators.md: New.
24873 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
24875 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
24876 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
24877 Generalize special case for converting TImode to V1TImode to handle
24878 all 128-bit vector conversions.
24880 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
24882 * gcc-ar.cc (main): Refactor to slightly reduce code
24883 duplication. Avoid unnecessary elements in nargv.
24885 2023-06-16 Pan Li <pan2.li@intel.com>
24888 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
24889 integer reduction expand.
24890 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
24891 and the LMUL1 attr respectively.
24892 * config/riscv/vector.md
24893 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
24894 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
24895 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
24896 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
24897 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
24898 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
24899 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
24901 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24904 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
24906 2023-06-16 Jakub Jelinek <jakub@redhat.com>
24908 PR middle-end/79173
24909 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
24910 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
24911 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
24913 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
24914 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
24915 * builtins.cc (fold_builtin_addc_subc): New function.
24916 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
24917 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
24919 2023-06-16 Jakub Jelinek <jakub@redhat.com>
24921 PR tree-optimization/110271
24922 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
24923 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
24924 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
24926 2023-06-16 Martin Jambor <mjambor@suse.cz>
24928 * configure: Regenerate.
24930 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
24931 Uros Bizjak <ubizjak@gmail.com>
24934 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
24935 define_insn_and_split combine *add<dwi>3_doubleword with
24936 a *concat<mode><dwi>3 for more efficient lowering after reload.
24938 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
24940 * ira-lives.cc: Include except.h.
24941 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
24942 when the pseudo does not live at the exception landing pad.
24944 2023-06-16 Alex Coplan <alex.coplan@arm.com>
24946 * doc/invoke.texi: Document -Welaborated-enum-base.
24948 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24950 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
24951 (ushrn2_n): ... This.
24952 (sqshrn2_n): Rename builtins to...
24953 (ssqshrn2_n): ... This.
24954 (uqshrn2_n): Rename builtins to...
24955 (uqushrn2_n): ... This.
24956 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
24957 (vqshrn_high_n_s32): Likewise.
24958 (vqshrn_high_n_s64): Likewise.
24959 (vqshrn_high_n_u16): Likewise.
24960 (vqshrn_high_n_u32): Likewise.
24961 (vqshrn_high_n_u64): Likewise.
24962 (vshrn_high_n_s16): Likewise.
24963 (vshrn_high_n_s32): Likewise.
24964 (vshrn_high_n_s64): Likewise.
24965 (vshrn_high_n_u16): Likewise.
24966 (vshrn_high_n_u32): Likewise.
24967 (vshrn_high_n_u64): Likewise.
24968 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
24970 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
24971 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
24972 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
24973 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
24974 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
24975 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
24976 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
24977 Update expander for the above.
24979 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24981 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
24982 (shrn2_n): ... This.
24983 (rshrn2): Rename builtins to...
24984 (rshrn2_n): ... This.
24985 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
24986 (vrshrn_high_n_s32): Likewise.
24987 (vrshrn_high_n_s64): Likewise.
24988 (vrshrn_high_n_u16): Likewise.
24989 (vrshrn_high_n_u32): Likewise.
24990 (vrshrn_high_n_u64): Likewise.
24991 (vshrn_high_n_s16): Likewise.
24992 (vshrn_high_n_s32): Likewise.
24993 (vshrn_high_n_s64): Likewise.
24994 (vshrn_high_n_u16): Likewise.
24995 (vshrn_high_n_u32): Likewise.
24996 (vshrn_high_n_u64): Likewise.
24997 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
24999 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
25000 (aarch64_shrn2<mode>_insn_le): Likewise.
25001 (aarch64_shrn2<mode>_insn_be): Likewise.
25002 (aarch64_shrn2<mode>): Likewise.
25003 (aarch64_rshrn2<mode>_insn_le): Likewise.
25004 (aarch64_rshrn2<mode>_insn_be): Likewise.
25005 (aarch64_rshrn2<mode>): Likewise.
25006 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
25007 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
25008 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
25009 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
25010 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
25011 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
25012 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
25013 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
25014 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
25015 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
25016 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
25017 (aarch64_sqshrun2_n<mode>): New define_expand.
25018 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
25019 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
25020 (aarch64_sqrshrun2_n<mode>): New define_expand.
25021 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
25022 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
25023 Delete unspec values.
25024 (VQSHRN_N): Delete int iterator.
25026 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25028 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
25029 * config/aarch64/aarch64-simd.md
25030 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
25031 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
25032 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
25033 * config/aarch64/iterators.md (shrn_s): New code attribute.
25035 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25037 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
25039 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
25040 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
25041 (aarch64_sqrshrun_n<mode>_insn): Likewise.
25042 (aarch64_sqshrun_n<mode>_insn): Likewise.
25043 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
25044 (aarch64_sqshrun_n<mode>): Likewise.
25045 (aarch64_sqrshrun_n<mode>): Likewise.
25046 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
25048 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25050 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
25051 (shrn_n): ... This.
25052 (rshrn): Rename builtins to...
25053 (rshrn_n): ... This.
25054 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
25055 (vshrn_n_s32): Likewise.
25056 (vshrn_n_s64): Likewise.
25057 (vshrn_n_u16): Likewise.
25058 (vshrn_n_u32): Likewise.
25059 (vshrn_n_u64): Likewise.
25060 (vrshrn_n_s16): Likewise.
25061 (vrshrn_n_s32): Likewise.
25062 (vrshrn_n_s64): Likewise.
25063 (vrshrn_n_u16): Likewise.
25064 (vrshrn_n_u32): Likewise.
25065 (vrshrn_n_u64): Likewise.
25066 * config/aarch64/aarch64-simd.md
25067 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
25068 (aarch64_shrn<mode>): Likewise.
25069 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
25070 (aarch64_rshrn<mode>): Likewise.
25071 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
25072 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
25073 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
25074 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
25075 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
25076 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
25077 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
25078 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
25079 (aarch64_sqshrun_n<mode>): Likewise.
25080 (aarch64_sqrshrun_n<mode>): Likewise.
25081 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
25082 (TRUNCEXTEND): New code attribute.
25083 (TRUNC_SHIFT): Likewise.
25084 (shrn_op): Likewise.
25085 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
25088 2023-06-16 Pan Li <pan2.li@intel.com>
25090 * config/riscv/riscv-vsetvl.cc
25091 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
25093 2023-06-16 Richard Biener <rguenther@suse.de>
25095 PR tree-optimization/110278
25096 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
25097 (x != (typeof x)(x == 0) -> true): Likewise.
25099 2023-06-16 Pali Rohár <pali@kernel.org>
25101 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
25102 (REAL_LIBGCC_SPEC): New define.
25103 * config/i386/mingw.opt: Add mcrtdll=
25104 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
25105 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
25106 (STARTFILE_SPEC): Adjust for -mcrtdll=.
25107 * doc/invoke.texi: Add mcrtdll= documentation.
25109 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
25111 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
25112 (mips_handle_code_readable_attr):New static function.
25113 (mips_get_code_readable_attr):New static enum function.
25114 (mips_set_current_function):Set the code_readable mode.
25115 (mips_option_override):Same as above.
25116 * doc/extend.texi:Document code_readable.
25118 2023-06-16 Richard Biener <rguenther@suse.de>
25120 PR tree-optimization/110269
25121 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
25122 with tree_expr_nonzero_p ...
25123 * match.pd (cmp (convert? addr@0) integer_zerop): With this
25126 2023-06-15 Marek Polacek <polacek@redhat.com>
25128 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
25129 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
25130 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
25131 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
25132 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
25134 * configure: Regenerate.
25135 * doc/install.texi: Document --enable-host-pie.
25137 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
25139 * regcprop.cc (maybe_mode_change): Enable stack pointer
25142 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
25144 PR tree-optimization/110266
25145 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
25147 (adjust_realpart_expr): Ditto.
25149 2023-06-15 Jan Beulich <jbeulich@suse.com>
25151 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
25154 2023-06-15 Jan Beulich <jbeulich@suse.com>
25156 * config/i386/constraints.md: Mention k and r for B.
25158 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
25159 Andrew Pinski <apinski@marvell.com>
25162 * config/loongarch/loongarch.md: Modify the register constraints for template
25163 "jumptable" and "indirect_jump" from "r" to "e".
25165 2023-06-15 Xi Ruoyao <xry111@xry111.site>
25167 * config/loongarch/loongarch-tune.h (loongarch_align): New
25169 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
25171 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
25173 * config/loongarch/loongarch.cc
25174 (loongarch_option_override_internal): Set the value of
25175 -falign-functions= if -falign-functions is enabled but no value
25176 is given. Likewise for -falign-labels=.
25178 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25180 PR middle-end/79173
25181 * internal-fn.def (UADDC, USUBC): New internal functions.
25182 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
25183 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
25184 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
25185 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
25186 match_uaddc_usubc): New functions.
25187 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
25188 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
25189 other optimizations have been successful for those.
25190 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
25191 * fold-const-call.cc (fold_const_call): Likewise.
25192 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
25193 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
25194 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
25196 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
25197 define_expand patterns.
25198 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
25199 into NOTE_INSN_DELETED note rather than nop instruction.
25200 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
25203 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25205 PR middle-end/79173
25206 * config/i386/i386.md (subborrow<mode>): Add alternative with
25207 memory destination and add for it define_peephole2
25208 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
25209 destination in these patterns.
25211 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25213 PR middle-end/79173
25214 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
25215 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
25216 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
25217 using memory destination in these patterns.
25219 2023-06-15 Jakub Jelinek <jakub@redhat.com>
25221 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
25222 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
25223 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
25224 * fold-const-call.cc (fold_const_call): ... here.
25226 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
25228 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
25229 Rename to <su>abd<mode>3.
25230 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
25233 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
25235 * doc/md.texi (sabd, uabd): Document them.
25236 * internal-fn.def (ABD): Use new optab.
25237 * optabs.def (sabd_optab, uabd_optab): New optabs,
25238 * tree-vect-patterns.cc (vect_recog_absolute_difference):
25239 Recognize the following idiom abs (a - b).
25240 (vect_recog_sad_pattern): Refactor to use
25241 vect_recog_absolute_difference.
25242 (vect_recog_abd_pattern): Use patterns found by
25243 vect_recog_absolute_difference to build a new ABD
25246 2023-06-15 chenxiaolong <chenxl04200420@163.com>
25248 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
25249 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
25251 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25253 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
25254 (expand_vec_perm_const_1): Add merge optmization.
25256 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
25259 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
25260 (riscv_pass_by_reference): Return true for vector mode
25262 2023-06-15 Pan Li <pan2.li@intel.com>
25264 * config/riscv/autovec-opt.md: Align the predictor sytle.
25265 * config/riscv/autovec.md: Ditto.
25267 2023-06-15 Pan Li <pan2.li@intel.com>
25269 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
25270 Take elen instead of scalar BITS_PER_WORD.
25271 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
25272 instead of scaler BITS_PER_WORD.
25274 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
25276 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
25278 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25280 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
25281 Fix signed comparison warning in loop from npats to enelts.
25283 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
25285 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
25286 to offloading compilation.
25287 * config/gcn/mkoffload.cc (main): Adjust.
25288 * config/nvptx/mkoffload.cc (main): Likewise.
25289 * doc/invoke.texi (foffload-options): Update example.
25291 2023-06-14 liuhongt <hongtao.liu@intel.com>
25294 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
25295 for alternative 2 since there's no evex version for vpcmpeqd
25298 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
25300 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
25302 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
25304 * config/sh/divtab.cc: Remove.
25306 2023-06-13 Jakub Jelinek <jakub@redhat.com>
25308 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
25309 superfluous spaces around \t for vpcmpeqd.
25311 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
25313 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
25314 clearing vectors with only a single element. Set CLEARED if the
25315 vector was initialized to zero.
25317 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
25319 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
25322 (TUPLE_ENTRY): Undef.
25324 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25326 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
25327 (shuffle_generic_patterns): Ditto.
25328 (expand_vec_perm_const_1): Ditto.
25330 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25332 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
25333 (shuffle_decompress_patterns): Ditto.
25335 2023-06-13 Richard Biener <rguenther@suse.de>
25337 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
25339 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
25340 Kito Cheng <kito.cheng@sifive.com>
25342 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
25343 warning flag if func is not builtin
25344 * config/riscv/riscv.cc
25345 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
25346 (riscv_arg_has_vector): Determine whether the arg is vector type.
25347 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
25348 (riscv_init_cumulative_args): The same as header.
25349 (riscv_get_arg_info): Add the checking.
25350 (riscv_function_value): Check the func return and set warning flag
25351 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
25352 determine whether warning psabi or not.
25354 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25356 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
25357 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
25358 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
25359 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
25361 (arm_output_load_tpidr): Define.
25362 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
25363 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
25365 (reload_tp_hard): Likewise.
25366 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
25368 * doc/invoke.texi (Arm Options, mtp): Document new values.
25370 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25373 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
25374 AARCH64_TPIDRRO_EL0 value.
25375 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
25376 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
25377 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
25378 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
25380 2023-06-13 Alexandre Oliva <oliva@adacore.com>
25382 * range-op-float.cc (frange_nextafter): Drop inline.
25383 (frelop_early_resolve): Add static.
25384 (frange_float): Likewise.
25386 2023-06-13 Richard Biener <rguenther@suse.de>
25388 PR middle-end/110232
25389 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
25390 to check whether the buffer covers the whole vector.
25392 2023-06-13 Richard Biener <rguenther@suse.de>
25394 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
25395 .MASK_LOAD and friends set the size of the access to unknown.
25397 2023-06-13 Tejas Belagod <tbelagod@arm.com>
25400 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
25401 calls that have a constant input predicate vector.
25402 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
25403 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
25404 (svlast_impl::vect_all_same): Check if all vector elements are equal.
25406 2023-06-13 Andi Kleen <ak@linux.intel.com>
25408 * config/i386/gcc-auto-profile: Regenerate.
25410 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25412 * config/riscv/vector-iterators.md: Fix requirement.
25414 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25416 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
25417 (shuffle_decompress_patterns): New function.
25418 (expand_vec_perm_const_1): Add decompress optimization.
25420 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
25422 PR rtl-optimization/101188
25423 * postreload.cc (reload_cse_move2add_invalidate): New function,
25425 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
25427 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
25429 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
25430 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
25431 and if maxv == 1, use constant element for duplicating into register.
25433 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
25435 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
25436 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
25437 (gimplify_adjust_omp_clauses): Change
25438 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
25439 GOMP_MAP_FORCE_PRESENT.
25440 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
25441 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
25442 to/from clauses with present modifier.
25444 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25446 PR tree-optimization/110205
25447 * range-op-float.cc (range_operator::fold_range): Add default FII
25449 * range-op-mixed.h (class operator_gt): Add missing final overrides.
25450 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
25451 (operator_lshift ::update_bitmask): Add final override.
25452 (operator_rshift ::update_bitmask): Add final override.
25453 * range-op.h (range_operator::fold_range): Add FII prototype.
25455 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25457 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
25458 Use range_op_handler directly.
25459 * range-op.cc (range_op_handler::range_op_handler): Unsigned
25460 param instead of tree-code.
25461 (ptr_op_widen_plus_signed): Delete.
25462 (ptr_op_widen_plus_unsigned): Delete.
25463 (ptr_op_widen_mult_signed): Delete.
25464 (ptr_op_widen_mult_unsigned): Delete.
25465 (range_op_table::initialize_integral_ops): Add new opcodes.
25466 * range-op.h (range_op_handler): Use unsigned.
25467 (OP_WIDEN_MULT_SIGNED): New.
25468 (OP_WIDEN_MULT_UNSIGNED): New.
25469 (OP_WIDEN_PLUS_SIGNED): New.
25470 (OP_WIDEN_PLUS_UNSIGNED): New.
25471 (RANGE_OP_TABLE_SIZE): New.
25472 (range_op_table::operator []): Use unsigned.
25473 (range_op_table::set): Use unsigned.
25474 (m_range_tree): Make unsigned.
25475 (ptr_op_widen_mult_signed): Remove.
25476 (ptr_op_widen_mult_unsigned): Remove.
25477 (ptr_op_widen_plus_signed): Remove.
25478 (ptr_op_widen_plus_unsigned): Remove.
25480 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25482 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
25483 manually as there is no access to the default operator.
25484 (cfn_copysign::fold_range): Don't check for validity.
25485 (cfn_ubsan::fold_range): Ditto.
25486 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
25487 * range-op.cc (default_operator): New.
25488 (range_op_handler::range_op_handler): Use default_operator
25490 (range_op_handler::operator bool): Move from header, compare
25491 against default operator.
25492 (range_op_handler::range_op): New.
25493 * range-op.h (range_op_handler::operator bool): Move.
25495 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25497 * range-op.cc (unified_table): Delete.
25498 (range_op_table operator_table): Instantiate.
25499 (range_op_table::range_op_table): Rename from unified_table.
25500 (range_op_handler::range_op_handler): Use range_op_table.
25501 * range-op.h (range_op_table::operator []): Inline.
25502 (range_op_table::set): Inline.
25504 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25506 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
25508 * gimple-range-op.cc (get_code): Rename from get_code_and_type
25510 (gimple_range_op_handler::supported_p): No need for type.
25511 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
25512 (cfn_copysign::fold_range): Ditto.
25513 (cfn_ubsan::fold_range): Ditto.
25514 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
25515 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
25516 * range-op-float.cc (operator_plus::op1_range): Ditto.
25517 (operator_mult::op1_range): Ditto.
25518 (range_op_float_tests): Ditto.
25519 * range-op.cc (get_op_handler): Remove.
25520 (range_op_handler::set_op_handler): Remove.
25521 (operator_plus::op1_range): No need for type.
25522 (operator_minus::op1_range): Ditto.
25523 (operator_mult::op1_range): Ditto.
25524 (operator_exact_divide::op1_range): Ditto.
25525 (operator_cast::op1_range): Ditto.
25526 (perator_bitwise_not::fold_range): Ditto.
25527 (operator_negate::fold_range): Ditto.
25528 * range-op.h (range_op_handler::range_op_handler): Remove type param.
25529 (range_cast): No need for type.
25530 (range_op_table::operator[]): Check for enum_code >= 0.
25531 * tree-data-ref.cc (compute_distributive_range): No need for type.
25532 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
25533 * value-query.cc (range_query::get_tree_range): Ditto.
25534 * value-relation.cc (relation_oracle::validate_relation): Ditto.
25535 * vr-values.cc (range_of_var_in_loop): Ditto.
25536 (simplify_using_ranges::fold_cond_with_ops): Ditto.
25538 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25540 * range-op-mixed.h (operator_max): Remove final.
25541 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
25542 (pointer_table::pointer_table): Remove.
25543 (class hybrid_max_operator): New.
25544 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
25545 * range-op.cc (pointer_tree_table): Remove.
25546 (unified_table::unified_table): Comment out MAX_EXPR.
25547 (get_op_handler): Remove check of pointer table.
25548 * range-op.h (class pointer_table): Remove.
25550 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25552 * range-op-mixed.h (operator_min): Remove final.
25553 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
25554 (class hybrid_min_operator): New.
25555 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
25556 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
25558 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25560 * range-op-mixed.h (operator_bitwise_or): Remove final.
25561 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
25562 (class hybrid_or_operator): New.
25563 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
25564 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
25566 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25568 * range-op-mixed.h (operator_bitwise_and): Remove final.
25569 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
25570 (class hybrid_and_operator): New.
25571 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
25572 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
25574 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25576 * Makefile.in (OBJS): Add range-op-ptr.o.
25577 * range-op-mixed.h (update_known_bitmask): Move prototype here.
25578 (minus_op1_op2_relation_effect): Move prototype here.
25579 (wi_includes_zero_p): Move function to here.
25580 (wi_zero_p): Ditto.
25581 * range-op.cc (update_known_bitmask): Remove static.
25582 (wi_includes_zero_p): Move to header.
25583 (wi_zero_p): Move to header.
25584 (minus_op1_op2_relation_effect): Remove static.
25585 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
25586 (pointer_plus_operator): Ditto.
25587 (pointer_min_max_operator): Ditto.
25588 (pointer_and_operator): Ditto.
25589 (pointer_or_operator): Ditto.
25590 (pointer_table): Ditto.
25591 (range_op_table::initialize_pointer_ops): Ditto.
25592 * range-op-ptr.cc: New.
25594 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25596 * range-op-mixed.h (class operator_max): Move from...
25597 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
25598 (get_op_handler): Remove the integral table.
25599 (class operator_max): Move from here.
25600 (integral_table::integral_table): Delete.
25601 * range-op.h (class integral_table): Delete.
25603 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25605 * range-op-mixed.h (class operator_min): Move from...
25606 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
25607 (class operator_min): Move from here.
25608 (integral_table::integral_table): Remove MIN_EXPR.
25610 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25612 * range-op-mixed.h (class operator_bitwise_or): Move from...
25613 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
25614 (class operator_bitwise_or): Move from here.
25615 (integral_table::integral_table): Remove BIT_IOR_EXPR.
25617 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25619 * range-op-mixed.h (class operator_bitwise_and): Move from...
25620 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
25621 (get_op_handler): Check for a pointer table entry first.
25622 (class operator_bitwise_and): Move from here.
25623 (integral_table::integral_table): Remove BIT_AND_EXPR.
25625 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25627 * range-op-mixed.h (class operator_bitwise_xor): Move from...
25628 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
25629 (class operator_bitwise_xor): Move from here.
25630 (integral_table::integral_table): Remove BIT_XOR_EXPR.
25631 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
25633 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25635 * range-op-mixed.h (class operator_bitwise_not): Move from...
25636 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
25637 (class operator_bitwise_not): Move from here.
25638 (integral_table::integral_table): Remove BIT_NOT_EXPR.
25639 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
25641 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25643 * range-op-mixed.h (class operator_addr_expr): Move from...
25644 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
25645 (class operator_addr_expr): Move from here.
25646 (integral_table::integral_table): Remove ADDR_EXPR.
25647 (pointer_table::pointer_table): Remove ADDR_EXPR.
25649 2023-06-12 Pan Li <pan2.li@intel.com>
25651 * config/riscv/riscv-vector-builtins-types.def
25652 (vfloat16m1_t): Add type to lmul1 ops.
25653 (vfloat16m2_t): Likewise.
25654 (vfloat16m4_t): Likewise.
25656 2023-06-12 Richard Biener <rguenther@suse.de>
25658 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
25659 .MASK_STORE and friend set the size of the access to
25662 2023-06-12 Tamar Christina <tamar.christina@arm.com>
25664 * config.in: Regenerate.
25665 * configure: Regenerate.
25666 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
25668 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25670 * config/riscv/autovec-opt.md
25671 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
25672 (*<any_shiftrt:optab>trunc<mode>): Ditto.
25673 * config/riscv/autovec.md (<optab><mode>3): Change to
25674 define_insn_and_split.
25675 (v<optab><mode>3): Ditto.
25676 (trunc<mode><v_double_trunc>2): Ditto.
25678 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25680 * simplify-rtx.cc (simplify_const_unary_operation):
25681 Handle US_TRUNCATE, SS_TRUNCATE.
25683 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
25686 * doc/gm2.texi (Standard procedures): Fix Next link.
25688 2023-06-12 Tamar Christina <tamar.christina@arm.com>
25690 * config.in: Regenerate.
25692 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
25694 PR middle-end/110142
25695 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
25696 subtype to vect_widened_op_tree and remove subtype parameter, also
25697 remove superfluous overloaded function definition.
25698 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
25699 to call to vect_recog_widen_op_pattern.
25700 (vect_recog_widen_minus_pattern): Likewise.
25702 2023-06-12 liuhongt <hongtao.liu@intel.com>
25704 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
25705 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
25706 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
25707 (vec_unpacks_lo_<mode>): Ditto.
25708 (vec_unpacks_hi_<mode>): Ditto.
25709 (sse_movlhps_<mode>): New define_insn.
25710 (ssse3_palignr<mode>_perm): Extend to V_128H.
25711 (V_128H): New mode iterator.
25712 (ssepackPHmode): New mode attribute.
25713 (vunpck_extract_mode): Ditto.
25714 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
25715 (vpckfloat_temp_mode): Ditto.
25716 (vpckfloat_op_mode): Ditto.
25717 (vunpckfixt_mode): Extend to VxHF.
25718 (vunpckfixt_model): Ditto.
25719 (vunpckfixt_extract_mode): Ditto.
25721 2023-06-12 Richard Biener <rguenther@suse.de>
25723 PR middle-end/110200
25724 * genmatch.cc (expr::gen_transform): Put braces around
25725 the if arm for the (convert ...) short-cut.
25727 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
25730 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
25731 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
25733 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
25736 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
25737 floating constant itself for real_to_target call.
25739 2023-06-12 Pan Li <pan2.li@intel.com>
25741 * config/riscv/riscv-vector-builtins-types.def
25742 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
25743 (vfloat16mf2_t): Ditto.
25744 (vfloat16m1_t): Ditto.
25745 (vfloat16m2_t): Ditto.
25746 (vfloat16m4_t): Ditto.
25748 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
25750 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
25751 Do not require a stack frame when debugging is enabled for AIX.
25753 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
25755 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
25756 Remove attribute values.
25757 (insv_notbit): New post-reload insn.
25758 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
25759 (*insv.not-bit.0_split, *insv.not-bit.7_split)
25760 (*insv.xor-extract_split): Split to insv_notbit.
25761 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
25762 (*insv.xor-extract): Remove post-reload insns.
25763 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
25764 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
25765 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
25766 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
25768 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
25771 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
25772 (MSB, SIZE): New mode attributes.
25773 (any_shift): New code iterator.
25774 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
25775 (*lshr<mode>3_const_split): Add constraint alternative for
25776 the case of shift-offset = MSB. Ditch "length" attribute.
25777 (extzv<mode): New. replaces extzv. Adjust following patterns.
25778 Use avr_out_extr, avr_out_extr_not to print asm.
25779 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
25780 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
25781 * config/avr/constraints.md (C15, C23, C31, Yil): New
25782 * config/avr/predicates.md (reg_or_low_io_operand)
25783 (const7_operand, reg_or_low_io_operand)
25784 (const15_operand, const_0_to_15_operand)
25785 (const23_operand, const_0_to_23_operand)
25786 (const31_operand, const_0_to_31_operand): New.
25787 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
25788 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
25789 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
25790 MSB case to new insn constraint "r" for operands[1].
25791 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
25792 Handle these cases.
25793 (avr_rtx_costs_1): Adjust cost for a new pattern.
25795 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25797 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
25798 (vector_insn_info::parse_insn): Add rtx_insn parse.
25799 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
25800 (get_first_vsetvl): New function.
25801 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
25802 (pass_vsetvl::cleanup_insns): Remove it.
25803 (pass_vsetvl::ssa_post_optimization): New function.
25804 (has_no_uses): Ditto.
25805 (pass_vsetvl::propagate_avl): Remove it.
25806 (pass_vsetvl::df_post_optimization): New function.
25807 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
25808 * config/riscv/riscv-vsetvl.h: Adapt declaration.
25810 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
25812 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
25813 (ipcp_vr_lattice::print): Call dump method.
25814 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
25816 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
25817 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
25819 (initialize_node_lattices): Pass type when appropriate.
25820 (ipa_vr_operation_and_type_effects): Make type agnostic.
25821 (ipa_value_range_from_jfunc): Same.
25822 (propagate_vr_across_jump_function): Same.
25823 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
25824 (evaluate_properties_for_edge): Same.
25825 * ipa-prop.cc (ipa_vr::get_vrange): Same.
25826 (ipcp_update_vr): Same.
25827 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
25828 (ipa_range_set_and_normalize): Same.
25830 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
25834 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
25835 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
25836 (avr_pass_data_ifelse): New pass_data for it.
25837 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
25838 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
25839 (avr_out_cmp_ext): New functions.
25840 (compare_condtition): Make sure REG_CC dies in the branch insn.
25841 (avr_rtx_costs_1): Add computation of cbranch costs.
25842 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
25843 [ADJUST_LEN_CMP_SEXT]Handle them.
25844 (TARGET_CANONICALIZE_COMPARISON): New define.
25845 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
25846 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
25847 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
25848 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
25849 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
25850 (avr_out_cmp_zext): New Protos
25851 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
25852 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
25853 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
25854 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
25855 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
25856 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
25857 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
25858 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
25859 (adjust_len) [add_set_ZN, cmp_zext]: New.
25860 (QIPSI): New mode iterator.
25861 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
25862 (gelt): New code iterator.
25863 (gelt_eqne): New code attribute.
25864 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
25865 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
25866 (*cmpqi_sign_extend): Remove insns.
25867 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
25868 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
25869 * config/avr/predicates.md (scratch_or_d_register_operand): New.
25870 * config/avr/constraints.md (Yxx): New constraint.
25872 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25874 * config/riscv/autovec.md (select_vl<mode>): New pattern.
25875 * config/riscv/riscv-protos.h (expand_select_vl): New function.
25876 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
25878 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25880 * range-op-float.cc (foperator_mult_div_base): Delete.
25881 (foperator_mult_div_base::find_range): Make static local function.
25882 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
25883 (operator_mult::op1_range): Rename from foperator_mult.
25884 (operator_mult::op2_range): Ditto.
25885 (operator_mult::rv_fold): Ditto.
25886 (float_table::float_table): Remove MULT_EXPR.
25887 (class foperator_div): Inherit from range_operator.
25888 (float_table::float_table): Delete.
25889 * range-op-mixed.h (class operator_mult): Combined from integer
25891 * range-op.cc (float_tree_table): Delete.
25892 (op_mult): New object.
25893 (unified_table::unified_table): Add MULT_EXPR.
25894 (get_op_handler): Do not check float table any longer.
25895 (class cross_product_operator): Move to range-op-mixed.h.
25896 (class operator_mult): Move to range-op-mixed.h.
25897 (integral_table::integral_table): Remove MULT_EXPR.
25898 (pointer_table::pointer_table): Remove MULT_EXPR.
25899 * range-op.h (float_table): Remove.
25901 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25903 * range-op-float.cc (foperator_negate): Remove. Move prototypes
25904 to range-op-mixed.h
25905 (operator_negate::fold_range): Rename from foperator_negate.
25906 (operator_negate::op1_range): Ditto.
25907 (float_table::float_table): Remove NEGATE_EXPR.
25908 * range-op-mixed.h (class operator_negate): Combined from integer
25910 * range-op.cc (op_negate): New object.
25911 (unified_table::unified_table): Add NEGATE_EXPR.
25912 (class operator_negate): Move to range-op-mixed.h.
25913 (integral_table::integral_table): Remove NEGATE_EXPR.
25914 (pointer_table::pointer_table): Remove NEGATE_EXPR.
25916 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25918 * range-op-float.cc (foperator_minus): Remove. Move prototypes
25919 to range-op-mixed.h
25920 (operator_minus::fold_range): Rename from foperator_minus.
25921 (operator_minus::op1_range): Ditto.
25922 (operator_minus::op2_range): Ditto.
25923 (operator_minus::rv_fold): Ditto.
25924 (float_table::float_table): Remove MINUS_EXPR.
25925 * range-op-mixed.h (class operator_minus): Combined from integer
25927 * range-op.cc (op_minus): New object.
25928 (unified_table::unified_table): Add MINUS_EXPR.
25929 (class operator_minus): Move to range-op-mixed.h.
25930 (integral_table::integral_table): Remove MINUS_EXPR.
25931 (pointer_table::pointer_table): Remove MINUS_EXPR.
25933 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25935 * range-op-float.cc (foperator_abs): Remove. Move prototypes
25936 to range-op-mixed.h
25937 (operator_abs::fold_range): Rename from foperator_abs.
25938 (operator_abs::op1_range): Ditto.
25939 (float_table::float_table): Remove ABS_EXPR.
25940 * range-op-mixed.h (class operator_abs): Combined from integer
25942 * range-op.cc (op_abs): New object.
25943 (unified_table::unified_table): Add ABS_EXPR.
25944 (class operator_abs): Move to range-op-mixed.h.
25945 (integral_table::integral_table): Remove ABS_EXPR.
25946 (pointer_table::pointer_table): Remove ABS_EXPR.
25948 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25950 * range-op-float.cc (foperator_plus): Remove. Move prototypes
25951 to range-op-mixed.h
25952 (operator_plus::fold_range): Rename from foperator_plus.
25953 (operator_plus::op1_range): Ditto.
25954 (operator_plus::op2_range): Ditto.
25955 (operator_plus::rv_fold): Ditto.
25956 (float_table::float_table): Remove PLUS_EXPR.
25957 * range-op-mixed.h (class operator_plus): Combined from integer
25959 * range-op.cc (op_plus): New object.
25960 (unified_table::unified_table): Add PLUS_EXPR.
25961 (class operator_plus): Move to range-op-mixed.h.
25962 (integral_table::integral_table): Remove PLUS_EXPR.
25963 (pointer_table::pointer_table): Remove PLUS_EXPR.
25965 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25967 * range-op-mixed.h (class operator_cast): Combined from integer
25969 * range-op.cc (op_cast): New object.
25970 (unified_table::unified_table): Add op_cast
25971 (class operator_cast): Move to range-op-mixed.h.
25972 (integral_table::integral_table): Remove op_cast
25973 (pointer_table::pointer_table): Remove op_cast.
25975 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25977 * range-op-float.cc (operator_cst::fold_range): New.
25978 * range-op-mixed.h (class operator_cst): Move from integer file.
25979 * range-op.cc (op_cst): New object.
25980 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
25981 (class operator_cst): Move to range-op-mixed.h.
25982 (integral_table::integral_table): Remove op_cst.
25983 (pointer_table::pointer_table): Remove op_cst.
25985 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25987 * range-op-float.cc (foperator_identity): Remove. Move prototypes
25988 to range-op-mixed.h
25989 (operator_identity::fold_range): Rename from foperator_identity.
25990 (operator_identity::op1_range): Ditto.
25991 (float_table::float_table): Remove fop_identity.
25992 * range-op-mixed.h (class operator_identity): Combined from integer
25994 * range-op.cc (op_identity): New object.
25995 (unified_table::unified_table): Add op_identity.
25996 (class operator_identity): Move to range-op-mixed.h.
25997 (integral_table::integral_table): Remove identity.
25998 (pointer_table::pointer_table): Remove identity.
26000 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26002 * range-op-float.cc (foperator_ge): Remove. Move prototypes
26003 to range-op-mixed.h
26004 (operator_ge::fold_range): Rename from foperator_ge.
26005 (operator_ge::op1_range): Ditto.
26006 (float_table::float_table): Remove GE_EXPR.
26007 * range-op-mixed.h (class operator_ge): Combined from integer
26009 * range-op.cc (op_ge): New object.
26010 (unified_table::unified_table): Add GE_EXPR.
26011 (class operator_ge): Move to range-op-mixed.h.
26012 (ge_op1_op2_relation): Fold into
26013 operator_ge::op1_op2_relation.
26014 (integral_table::integral_table): Remove GE_EXPR.
26015 (pointer_table::pointer_table): Remove GE_EXPR.
26016 * range-op.h (ge_op1_op2_relation): Delete.
26018 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26020 * range-op-float.cc (foperator_gt): Remove. Move prototypes
26021 to range-op-mixed.h
26022 (operator_gt::fold_range): Rename from foperator_gt.
26023 (operator_gt::op1_range): Ditto.
26024 (float_table::float_table): Remove GT_EXPR.
26025 * range-op-mixed.h (class operator_gt): Combined from integer
26027 * range-op.cc (op_gt): New object.
26028 (unified_table::unified_table): Add GT_EXPR.
26029 (class operator_gt): Move to range-op-mixed.h.
26030 (gt_op1_op2_relation): Fold into
26031 operator_gt::op1_op2_relation.
26032 (integral_table::integral_table): Remove GT_EXPR.
26033 (pointer_table::pointer_table): Remove GT_EXPR.
26034 * range-op.h (gt_op1_op2_relation): Delete.
26036 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26038 * range-op-float.cc (foperator_le): Remove. Move prototypes
26039 to range-op-mixed.h
26040 (operator_le::fold_range): Rename from foperator_le.
26041 (operator_le::op1_range): Ditto.
26042 (float_table::float_table): Remove LE_EXPR.
26043 * range-op-mixed.h (class operator_le): Combined from integer
26045 * range-op.cc (op_le): New object.
26046 (unified_table::unified_table): Add LE_EXPR.
26047 (class operator_le): Move to range-op-mixed.h.
26048 (le_op1_op2_relation): Fold into
26049 operator_le::op1_op2_relation.
26050 (integral_table::integral_table): Remove LE_EXPR.
26051 (pointer_table::pointer_table): Remove LE_EXPR.
26052 * range-op.h (le_op1_op2_relation): Delete.
26054 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26056 * range-op-float.cc (foperator_lt): Remove. Move prototypes
26057 to range-op-mixed.h
26058 (operator_lt::fold_range): Rename from foperator_lt.
26059 (operator_lt::op1_range): Ditto.
26060 (float_table::float_table): Remove LT_EXPR.
26061 * range-op-mixed.h (class operator_lt): Combined from integer
26063 * range-op.cc (op_lt): New object.
26064 (unified_table::unified_table): Add LT_EXPR.
26065 (class operator_lt): Move to range-op-mixed.h.
26066 (lt_op1_op2_relation): Fold into
26067 operator_lt::op1_op2_relation.
26068 (integral_table::integral_table): Remove LT_EXPR.
26069 (pointer_table::pointer_table): Remove LT_EXPR.
26070 * range-op.h (lt_op1_op2_relation): Delete.
26072 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26074 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
26075 to range-op-mixed.h
26076 (operator_equal::fold_range): Rename from foperator_not_equal.
26077 (operator_equal::op1_range): Ditto.
26078 (float_table::float_table): Remove NE_EXPR.
26079 * range-op-mixed.h (class operator_not_equal): Combined from integer
26081 * range-op.cc (op_equal): New object.
26082 (unified_table::unified_table): Add NE_EXPR.
26083 (class operator_not_equal): Move to range-op-mixed.h.
26084 (not_equal_op1_op2_relation): Fold into
26085 operator_not_equal::op1_op2_relation.
26086 (integral_table::integral_table): Remove NE_EXPR.
26087 (pointer_table::pointer_table): Remove NE_EXPR.
26088 * range-op.h (not_equal_op1_op2_relation): Delete.
26090 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26092 * range-op-float.cc (foperator_equal): Remove. Move prototypes
26093 to range-op-mixed.h
26094 (operator_equal::fold_range): Rename from foperator_equal.
26095 (operator_equal::op1_range): Ditto.
26096 (float_table::float_table): Remove EQ_EXPR.
26097 * range-op-mixed.h (class operator_equal): Combined from integer
26099 * range-op.cc (op_equal): New object.
26100 (unified_table::unified_table): Add EQ_EXPR.
26101 (class operator_equal): Move to range-op-mixed.h.
26102 (equal_op1_op2_relation): Fold into
26103 operator_equal::op1_op2_relation.
26104 (integral_table::integral_table): Remove EQ_EXPR.
26105 (pointer_table::pointer_table): Remove EQ_EXPR.
26106 * range-op.h (equal_op1_op2_relation): Delete.
26108 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
26110 * range-op-float.cc (class float_table): Move to header.
26111 (float_table::float_table): Move float only operators to...
26112 (range_op_table::initialize_float_ops): Here.
26113 * range-op-mixed.h: New.
26114 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
26116 (float_tree_table): Moved from range-op-float.cc.
26117 (unified_tree_table): New.
26118 (unified_table::unified_table): New. Call initialize routines.
26119 (get_op_handler): Check unified table first.
26120 (range_op_handler::range_op_handler): Handle no type constructor.
26121 (integral_table::integral_table): Move integral only operators to...
26122 (range_op_table::initialize_integral_ops): Here.
26123 (pointer_table::pointer_table): Move pointer only operators to...
26124 (range_op_table::initialize_pointer_ops): Here.
26125 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
26126 (get_bool_state): Ditto.
26127 (empty_range_varying): Ditto.
26128 (relop_early_resolve): Ditto.
26129 (class range_op_table): Add new init methods for range types.
26130 (class integral_table): Move declaration to here.
26131 (class pointer_table): Move declaration to here.
26132 (class float_table): Move declaration to here.
26134 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26135 Richard Sandiford <richard.sandiford@arm.com>
26136 Richard Biener <rguenther@suse.de>
26138 * doc/md.texi: Add SELECT_VL support.
26139 * internal-fn.def (SELECT_VL): Ditto.
26140 * optabs.def (OPTAB_D): Ditto.
26141 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
26142 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
26143 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
26144 (vectorizable_store): Ditto.
26145 (vectorizable_load): Ditto.
26146 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
26148 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
26151 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
26154 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
26156 * range-op.cc (range_cast): Move to...
26157 * range-op.h (range_cast): Here and add generic a version.
26159 2023-06-09 Marek Polacek <polacek@redhat.com>
26163 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
26164 warn about designated initializers in C only.
26166 2023-06-09 Andrew Pinski <apinski@marvell.com>
26168 PR tree-optimization/97711
26169 PR tree-optimization/110155
26170 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
26171 ((zero_one != 0) ? z <op> y : y): Likewise.
26173 2023-06-09 Andrew Pinski <apinski@marvell.com>
26175 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
26176 multiply rather than negation/bit_and.
26178 2023-06-09 Andrew Pinski <apinski@marvell.com>
26180 * match.pd (`X & -Y -> X * Y`): Allow for truncation
26181 and the same type for unsigned types.
26183 2023-06-09 Andrew Pinski <apinski@marvell.com>
26185 PR tree-optimization/110165
26186 PR tree-optimization/110166
26187 * match.pd (zero_one_valued_p): Don't accept
26188 signed 1-bit integers.
26190 2023-06-09 Richard Biener <rguenther@suse.de>
26192 * match.pd (two conversions in a row): Use element_precision
26193 to DTRT for VECTOR_TYPE.
26195 2023-06-09 Pan Li <pan2.li@intel.com>
26197 * config/riscv/riscv.md (enabled): Move to another place, and
26198 add fp_vector_disabled to the cond.
26199 (fp_vector_disabled): New attr defined for disabling fp.
26200 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
26202 2023-06-09 Pan Li <pan2.li@intel.com>
26204 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
26207 2023-06-09 liuhongt <hongtao.liu@intel.com>
26210 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
26211 view_convert_expr mask to signed type when folding pblendvb
26214 2023-06-09 liuhongt <hongtao.liu@intel.com>
26217 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
26218 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
26219 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
26221 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
26222 real codename for __builtin_ia32_pabs{b,w,d}.
26224 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
26226 * gimple-range-op.cc
26227 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
26228 (gimple_range_op_handler::maybe_builtin_call): Adjust.
26229 * gimple-range-op.h (operand1, operand2): Use m_operator.
26230 * range-op.cc (integral_table, pointer_table): Relocate.
26231 (get_op_handler): Rename from get_handler and handle all types.
26232 (range_op_handler::range_op_handler): Relocate.
26233 (range_op_handler::set_op_handler): Relocate and adjust.
26234 (range_op_handler::range_op_handler): Relocate.
26235 (dispatch_trio): New.
26236 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
26237 (range_op_handler::dispatch_kind): New.
26238 (range_op_handler::fold_range): Relocate and Use new dispatch value.
26239 (range_op_handler::op1_range): Ditto.
26240 (range_op_handler::op2_range): Ditto.
26241 (range_op_handler::lhs_op1_relation): Ditto.
26242 (range_op_handler::lhs_op2_relation): Ditto.
26243 (range_op_handler::op1_op2_relation): Ditto.
26244 (range_op_handler::set_op_handler): Use m_operator member.
26245 * range-op.h (range_op_handler::operator bool): Use m_operator.
26246 (range_op_handler::dispatch_kind): New.
26247 (range_op_handler::m_valid): Delete.
26248 (range_op_handler::m_int): Delete
26249 (range_op_handler::m_float): Delete
26250 (range_op_handler::m_operator): New.
26251 (range_op_table::operator[]): Relocate from .cc file.
26252 (range_op_table::set): Ditto.
26253 * value-range.h (class vrange): Make range_op_handler a friend.
26255 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
26257 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
26258 (cfn_pass_through_arg1): Adjust using statemenmt.
26259 (cfn_signbit): Change base class, adjust using statement.
26260 (cfn_copysign): Ditto.
26262 (cfn_sincos): Ditto.
26263 * range-op-float.cc (fold_range): Change class to range_operator.
26267 (lhs_op1_relation): Ditto.
26268 (lhs_op2_relation): Ditto.
26269 (op1_op2_relation): Ditto.
26270 (foperator_*): Ditto.
26271 (class float_table): New. Inherit from range_op_table.
26272 (floating_tree_table) Change to range_op_table pointer.
26273 (class floating_op_table): Delete.
26274 * range-op.cc (operator_equal): Adjust using statement.
26275 (operator_not_equal): Ditto.
26276 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
26277 (operator_minus, operator_cast): Ditto.
26278 (operator_bitwise_and, pointer_plus_operator): Ditto.
26279 (get_float_handle): Change return type.
26280 * range-op.h (range_operator_float): Delete. Relocate all methods
26281 into class range_operator.
26282 (range_op_handler::m_float): Change type to range_operator.
26283 (floating_op_table): Delete.
26284 (floating_tree_table): Change type.
26286 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
26288 * range-op.cc (range_operator::fold_range): Call virtual routine.
26289 (range_operator::update_bitmask): New.
26290 (operator_equal::update_bitmask): New.
26291 (operator_not_equal::update_bitmask): New.
26292 (operator_lt::update_bitmask): New.
26293 (operator_le::update_bitmask): New.
26294 (operator_gt::update_bitmask): New.
26295 (operator_ge::update_bitmask): New.
26296 (operator_ge::update_bitmask): New.
26297 (operator_plus::update_bitmask): New.
26298 (operator_minus::update_bitmask): New.
26299 (operator_pointer_diff::update_bitmask): New.
26300 (operator_min::update_bitmask): New.
26301 (operator_max::update_bitmask): New.
26302 (operator_mult::update_bitmask): New.
26303 (operator_div:operator_div):New.
26304 (operator_div::update_bitmask): New.
26305 (operator_div::m_code): New member.
26306 (operator_exact_divide::operator_exact_divide): New constructor.
26307 (operator_lshift::update_bitmask): New.
26308 (operator_rshift::update_bitmask): New.
26309 (operator_bitwise_and::update_bitmask): New.
26310 (operator_bitwise_or::update_bitmask): New.
26311 (operator_bitwise_xor::update_bitmask): New.
26312 (operator_trunc_mod::update_bitmask): New.
26313 (op_ident, op_unknown, op_ptr_min_max): New.
26314 (op_nop, op_convert): Delete.
26315 (op_ssa, op_paren, op_obj_type): Delete.
26316 (op_realpart, op_imagpart): Delete.
26317 (op_ptr_min, op_ptr_max): Delete.
26318 (pointer_plus_operator:update_bitmask): New.
26319 (range_op_table::set): Do not use m_code.
26320 (integral_table::integral_table): Adjust to single instances.
26321 * range-op.h (range_operator::range_operator): Delete.
26322 (range_operator::m_code): Delete.
26323 (range_operator::update_bitmask): New.
26325 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
26327 * range-op-float.cc (range_operator_float::fold_range): Return
26328 NAN of the result type.
26330 2023-06-08 Jakub Jelinek <jakub@redhat.com>
26332 * optabs.cc (expand_ffs): Add forward declaration.
26333 (expand_doubleword_clz): Rename to ...
26334 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
26335 handle also doubleword CTZ and FFS in addition to CLZ.
26336 (expand_unop): Adjust caller. Also call it for doubleword
26337 ctz_optab and ffs_optab.
26339 2023-06-08 Jakub Jelinek <jakub@redhat.com>
26342 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
26343 n_words == 2 recurse with mmx_ok as first argument rather than false.
26345 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
26347 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
26348 avoid sign extension/undefined behaviour when setting each bit.
26350 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
26351 Uros Bizjak <ubizjak@gmail.com>
26353 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
26354 Use new x86_stc instruction when the carry flag must be set.
26355 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
26356 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
26357 * config/i386/i386.h (TARGET_SLOW_STC): New define.
26358 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
26359 (x86_stc): New define_insn.
26360 (define_peephole2): Convert x86_stc into alternate implementation
26361 on pentium4 without -Os when a QImode register is available.
26362 (*x86_cmc): New define_insn.
26363 (define_peephole2): Convert *x86_cmc into alternate implementation
26364 on pentium4 without -Os when a QImode register is available.
26365 (*setccc): New define_insn_and_split for a no-op CCCmode move.
26366 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
26367 recognize (and eliminate) the carry flag being copied to itself.
26368 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
26369 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
26371 2023-06-07 Andrew Pinski <apinski@marvell.com>
26373 * match.pd: Fix comment for the
26374 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
26376 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
26377 Jeff Law <jlaw@ventanamicro.com>
26379 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
26380 (rotrsi3_sext): Expose generator.
26381 (rotlsi3 pattern): Hide generator.
26382 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
26384 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
26385 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
26386 (mulsi3, <optab>si3): Likewise.
26387 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
26388 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
26389 (<u>mulsidi3): Likewise.
26390 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
26391 (mulsi3_extended, <optab>si3_extended): Likewise.
26392 (splitter for shadd feeding divison): Update RTL pattern to account
26393 for changes in how 32 bit ops are expanded for TARGET_64BIT.
26394 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
26396 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
26399 * config/riscv/riscv.cc (riscv_print_operand): Calculate
26400 memmodel only when it is valid.
26402 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
26404 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
26405 for constant element of a vector.
26407 2023-06-07 Jakub Jelinek <jakub@redhat.com>
26409 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
26410 instead compare tree_nonzero_bits <= 1U rather than just == 1.
26412 2023-06-07 Alex Coplan <alex.coplan@arm.com>
26415 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
26417 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
26418 names for builtins.
26419 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
26420 setup if in_lto_p, just like we do for SVE.
26421 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
26422 (__arm_st64b): Delete.
26423 (__arm_st64bv): Delete.
26424 (__arm_st64bv0): Delete.
26426 2023-06-07 Alex Coplan <alex.coplan@arm.com>
26429 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
26430 Use input operand for the destination address.
26431 * config/aarch64/aarch64.md (st64b): Fix constraint on address
26434 2023-06-07 Alex Coplan <alex.coplan@arm.com>
26437 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
26438 Replace eight consecutive spaces with tabs.
26439 (aarch64_init_ls64_builtins): Likewise.
26440 (aarch64_expand_builtin_ls64): Likewise.
26441 * config/aarch64/aarch64.md (ld64b): Likewise.
26444 (st64bv0): Likewise.
26446 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
26448 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
26449 offset table pseudo to a general reg subset.
26451 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26453 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
26455 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
26457 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
26458 (aarch64_sqxtun2<mode>_le): Likewise.
26459 (aarch64_sqxtun2<mode>_be): Likewise.
26460 (aarch64_sqxtun2<mode>): Adjust for the above.
26461 (aarch64_sqmovun<mode>): New define_expand.
26462 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
26463 (half_mask): New mode attribute.
26464 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
26467 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26469 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
26471 (aarch64_addp<mode>_insn): ... This...
26472 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
26473 (aarch64_addp<mode>): New define_expand.
26475 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26477 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
26478 * config/riscv/riscv-v.cc
26479 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
26481 (rvv_builder::single_step_npatterns_p): New function.
26482 (rvv_builder::npatterns_all_equal_p): Ditto.
26483 (const_vec_all_in_range_p): Support POLY handling.
26484 (gen_const_vector_dup): Ditto.
26485 (emit_vlmax_gather_insn): Add vrgatherei16.
26486 (emit_vlmax_masked_gather_mu_insn): Ditto.
26487 (expand_const_vector): Add VLA SLP const vector support.
26488 (expand_vec_perm): Support POLY.
26489 (struct expand_vec_perm_d): New struct.
26490 (shuffle_generic_patterns): New function.
26491 (expand_vec_perm_const_1): Ditto.
26492 (expand_vec_perm_const): Ditto.
26493 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
26494 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
26496 2023-06-07 Andrew Pinski <apinski@marvell.com>
26498 PR middle-end/110117
26499 * expr.cc (expand_single_bit_test): Handle
26500 const_int from expand_expr.
26502 2023-06-07 Andrew Pinski <apinski@marvell.com>
26504 * expr.cc (do_store_flag): Rearrange the
26505 TER code so that it overrides the nonzero bits
26506 info if we had `a & POW2`.
26508 2023-06-07 Andrew Pinski <apinski@marvell.com>
26510 PR tree-optimization/110134
26511 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
26513 (-A CMP CST -> B CMP (-CST)): Likewise.
26515 2023-06-07 Andrew Pinski <apinski@marvell.com>
26517 PR tree-optimization/89263
26518 PR tree-optimization/99069
26519 PR tree-optimization/20083
26520 PR tree-optimization/94898
26521 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
26522 one of the operands are constant.
26524 2023-06-07 Andrew Pinski <apinski@marvell.com>
26526 * match.pd (zero_one_valued_p): Match 0 integer constant
26529 2023-06-07 Pan Li <pan2.li@intel.com>
26531 * config/riscv/riscv-vector-builtins-types.def
26532 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
26533 (vfloat32m1_t): Ditto.
26534 (vfloat32m2_t): Ditto.
26535 (vfloat32m4_t): Ditto.
26536 (vfloat32m8_t): Ditto.
26537 (vint16mf4_t): Ditto.
26538 (vint16mf2_t): Ditto.
26539 (vint16m1_t): Ditto.
26540 (vint16m2_t): Ditto.
26541 (vint16m4_t): Ditto.
26542 (vint16m8_t): Ditto.
26543 (vuint16mf4_t): Ditto.
26544 (vuint16mf2_t): Ditto.
26545 (vuint16m1_t): Ditto.
26546 (vuint16m2_t): Ditto.
26547 (vuint16m4_t): Ditto.
26548 (vuint16m8_t): Ditto.
26549 (vint32mf2_t): Ditto.
26550 (vint32m1_t): Ditto.
26551 (vint32m2_t): Ditto.
26552 (vint32m4_t): Ditto.
26553 (vint32m8_t): Ditto.
26554 (vuint32mf2_t): Ditto.
26555 (vuint32m1_t): Ditto.
26556 (vuint32m2_t): Ditto.
26557 (vuint32m4_t): Ditto.
26558 (vuint32m8_t): Ditto.
26560 2023-06-07 Jason Merrill <jason@redhat.com>
26563 * doc/invoke.texi: Document it.
26565 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
26567 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
26568 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
26569 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
26570 NOT (BITREVERSE x) as BITREVERSE (NOT x).
26571 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
26572 Optimize PARITY (BITREVERSE x) as PARITY x.
26573 Optimize BITREVERSE (BITREVERSE x) as x.
26574 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
26575 BITREVERSE of a constant integer at compile-time.
26576 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
26577 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
26578 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
26579 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
26580 Optimize COPYSIGN (x, ABS y) as ABS x.
26581 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
26582 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
26583 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
26584 arguments at compile-time.
26586 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
26588 * rtl.h (function_invariant_p): Change return type from int to bool.
26589 * reload1.cc (function_invariant_p): Change return type from
26590 int to bool and adjust function body accordingly.
26592 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26594 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
26595 (*single_<optab>mult_plus<mode>): Ditto.
26596 (*double_<optab>mult_plus<mode>): Ditto.
26597 (*sign_zero_extend_fma): Ditto.
26598 (*zero_sign_extend_fma): Ditto.
26599 * config/riscv/riscv-protos.h (enum insn_type): New enum.
26601 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
26602 Tobias Burnus <tobias@codesourcery.com>
26604 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
26605 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
26607 (omp_get_attachment): Handle map clauses with 'present' modifier.
26608 (omp_group_base): Likewise.
26609 (gimplify_scan_omp_clauses): Reorder present maps to come first.
26610 Set GOVD flags for present defaultmaps.
26611 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
26612 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
26614 (lower_omp_target): Handle map clauses with 'present' modifier.
26615 Handle 'to' and 'from' clauses with 'present'.
26616 * tree-core.h (enum omp_clause_defaultmap_kind): Add
26617 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
26618 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
26619 'from' clauses with 'present' modifier. Handle present defaultmap.
26620 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
26622 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
26624 * config/rs6000/genfusion.pl: Delete some dead code.
26626 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
26628 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
26630 (gen_ld_cmpi_p10): ... this.
26632 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
26635 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
26636 duplicate expression.
26638 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26640 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
26641 Handle unsigned reduc_plus_scal_ builtins.
26642 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
26643 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
26644 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
26645 __builtin_aarch64_reduc_plus_scal_v2di.
26646 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
26648 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26650 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
26651 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
26652 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
26654 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26656 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
26657 (aarch64_shrn<mode>_insn_be): Delete.
26658 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
26659 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
26660 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
26661 (aarch64_rshrn<mode>_insn_le): Delete.
26662 (aarch64_rshrn<mode>_insn_be): Delete.
26663 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
26664 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
26666 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26668 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
26670 (aarch64_pars_overlap_p): Likewise.
26671 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
26672 Express in terms of UNSPEC_ADDV.
26673 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
26674 (*aarch64_<su>addlv<mode>_reduction): Define.
26675 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
26676 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
26677 (aarch64_pars_overlap_p): Likewise.
26678 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
26679 (VQUADW): New mode attribute.
26680 (VWIDE2X_S): Likewise.
26682 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
26683 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
26685 2023-06-06 Richard Biener <rguenther@suse.de>
26687 PR middle-end/110055
26688 * gimplify.cc (gimplify_target_expr): Do not emit
26689 CLOBBERs for variables which have static storage duration
26690 after gimplifying their initializers.
26692 2023-06-06 Richard Biener <rguenther@suse.de>
26694 PR tree-optimization/109143
26695 * tree-ssa-structalias.cc (solution_set_expand): Avoid
26696 one bitmap iteration and optimize bit range setting.
26698 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
26700 PR bootstrap/110120
26701 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
26702 XVECEXP, not XEXP, to access first item of a PARALLEL.
26704 2023-06-06 Pan Li <pan2.li@intel.com>
26706 * config/riscv/riscv-vector-builtins-types.def
26707 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
26708 (vfloat16mf2_t): Likewise.
26709 (vfloat16m1_t): Likewise.
26710 (vfloat16m2_t): Likewise.
26711 (vfloat16m4_t): Likewise.
26712 (vfloat16m8_t): Likewise.
26713 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
26714 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
26716 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
26718 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
26719 for cfi reg/mem machmode
26720 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
26722 2023-06-06 Li Xu <xuli1@eswincomputing.com>
26724 * config/riscv/vector-iterators.md:
26725 Fix 'REQUIREMENT' for machine_mode 'MODE'.
26726 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
26727 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
26728 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
26730 2023-06-06 Pan Li <pan2.li@intel.com>
26732 * config/riscv/vector-iterators.md: Fix typo in mode attr.
26734 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
26735 Joel Hutton <joel.hutton@arm.com>
26737 * doc/generic.texi: Remove old tree codes.
26738 * expr.cc (expand_expr_real_2): Remove old tree code cases.
26739 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
26740 * optabs-tree.cc (optab_for_tree_code): Likewise.
26741 (supportable_half_widening_operation): Likewise.
26742 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
26743 * tree-inline.cc (estimate_operator_cost): Likewise.
26744 (op_symbol_code): Likewise.
26745 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
26746 (vect_analyze_data_ref_accesses): Likewise.
26747 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
26748 * cfgexpand.cc (expand_debug_expr): Likewise.
26749 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
26750 (supportable_widening_operation): Likewise.
26751 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
26753 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
26754 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
26755 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
26756 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
26757 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
26758 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
26759 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
26760 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
26762 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
26763 Joel Hutton <joel.hutton@arm.com>
26764 Tamar Christina <tamar.christina@arm.com>
26766 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
26768 (vec_widen_<su>add_lo_<mode>): ... to this.
26769 (vec_widen_<su>addl_hi_<mode>): Rename this ...
26770 (vec_widen_<su>add_hi_<mode>): ... to this.
26771 (vec_widen_<su>subl_lo_<mode>): Rename this ...
26772 (vec_widen_<su>sub_lo_<mode>): ... to this.
26773 (vec_widen_<su>subl_hi_<mode>): Rename this ...
26774 (vec_widen_<su>sub_hi_<mode>): ...to this.
26775 * doc/generic.texi: Document new IFN codes.
26776 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
26777 (commutative_binary_fn_p): Add widen_plus fn's.
26778 (widening_fn_p): New function.
26779 (narrowing_fn_p): New function.
26780 (direct_internal_fn_optab): Change visibility.
26781 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
26782 internal_fn that expands into multiple internal_fns for widening.
26783 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
26784 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
26785 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
26786 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
26787 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
26788 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
26789 (lookup_hilo_internal_fn): Likewise.
26790 (widening_fn_p): Likewise.
26791 (Narrowing_fn_p): Likewise.
26792 * optabs.cc (commutative_optab_p): Add widening plus optabs.
26793 * optabs.def (OPTAB_D): Define widen add, sub optabs.
26794 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
26795 patterns with a hi/lo or even/odd split.
26796 (vect_recog_sad_pattern): Refactor to use new IFN codes.
26797 (vect_recog_widen_plus_pattern): Likewise.
26798 (vect_recog_widen_minus_pattern): Likewise.
26799 (vect_recog_average_pattern): Likewise.
26800 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
26802 (supportable_widening_operation): Likewise.
26803 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
26805 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
26806 Joel Hutton <joel.hutton@arm.com>
26808 * tree-vect-patterns.cc: Add include for gimple-iterator.
26809 (vect_recog_widen_op_pattern): Refactor to use code_helper.
26810 (vect_gimple_build): New function.
26811 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
26813 (vectorizable_call): Likewise.
26814 (vect_gen_widened_results_half): Likewise.
26815 (vect_create_vectorized_demotion_stmts): Likewise.
26816 (vect_create_vectorized_promotion_stmts): Likewise.
26817 (vect_create_half_widening_stmts): Likewise.
26818 (vectorizable_conversion): Likewise.
26819 (supportable_widening_operation): Likewise.
26820 (supportable_narrowing_operation): Likewise.
26821 * tree-vectorizer.h (supportable_widening_operation): Change
26822 prototype to use code_helper.
26823 (supportable_narrowing_operation): Likewise.
26824 (vect_gimple_build): New function prototype.
26825 * tree.h (code_helper::safe_as_tree_code): New function.
26826 (code_helper::safe_as_fn_code): New function.
26828 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
26830 * wide-int.cc (wi::bitreverse_large): New function implementing
26831 bit reversal of an integer.
26832 * wide-int.h (wi::bitreverse): New (template) function prototype.
26833 (bitreverse_large): Prototype helper function/implementation.
26834 (wi::bitreverse): New template wrapper around bitreverse_large.
26836 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
26838 * rtl.h (print_rtl_single): Change return type from int to void.
26839 (print_rtl_single_with_indent): Ditto.
26840 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
26841 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
26842 (rtx_writer::print_rtx_operand_code_0): Ditto.
26843 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
26844 (rtx_writer::print_rtx_operand_code_i): Ditto.
26845 (rtx_writer::print_rtx_operand_code_u): Ditto.
26846 (rtx_writer::print_rtx_operand): Ditto.
26847 (rtx_writer::print_rtx): Ditto.
26848 (rtx_writer::finish_directive): Ditto.
26849 (print_rtl_single): Change return type from int to void
26850 and adjust function body accordingly.
26851 (rtx_writer::print_rtl_single_with_indent): Ditto.
26853 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
26855 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
26856 (reg_class_subset_p): Ditto.
26857 * reginfo.cc (reg_classes_intersect_p): Ditto.
26858 (reg_class_subset_p): Ditto.
26860 2023-06-05 Pan Li <pan2.li@intel.com>
26862 * config/riscv/riscv-vector-builtins-types.def
26863 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
26864 (vfloat32m1_t): Ditto.
26865 (vfloat32m2_t): Ditto.
26866 (vfloat32m4_t): Ditto.
26867 (vfloat32m8_t): Ditto.
26868 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
26869 (vint16mf2_t): Ditto.
26870 (vint16m1_t): Ditto.
26871 (vint16m2_t): Ditto.
26872 (vint16m4_t): Ditto.
26873 (vint16m8_t): Ditto.
26874 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
26875 (vuint16mf2_t): Ditto.
26876 (vuint16m1_t): Ditto.
26877 (vuint16m2_t): Ditto.
26878 (vuint16m4_t): Ditto.
26879 (vuint16m8_t): Ditto.
26880 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
26881 (vint32m1_t): Ditto.
26882 (vint32m2_t): Ditto.
26883 (vint32m4_t): Ditto.
26884 (vint32m8_t): Ditto.
26885 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
26886 (vuint32m1_t): Ditto.
26887 (vuint32m2_t): Ditto.
26888 (vuint32m4_t): Ditto.
26889 (vuint32m8_t): Ditto.
26890 * config/riscv/vector-iterators.md: Add FP=16 support for V,
26891 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
26893 2023-06-05 Andrew Pinski <apinski@marvell.com>
26895 PR bootstrap/110085
26896 * Makefile.in (clean): Remove the removing of
26897 MULTILIB_DIR/MULTILIB_OPTIONS directories.
26899 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
26901 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
26903 * config/mips/mips.cc (speculation_barrier_libfunc): New static
26905 (mips_init_libfuncs): Initialize it.
26906 (mips_emit_speculation_barrier): New function.
26907 * config/mips/mips.md (speculation_barrier): Call
26908 mips_emit_speculation_barrier.
26910 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26912 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
26913 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
26914 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
26915 (rvv_builder::get_merged_repeating_sequence): Ditto.
26916 (rvv_builder::get_merge_scalar_mask): Ditto.
26917 (emit_scalar_move_insn): Ditto.
26918 (emit_vlmax_integer_move_insn): Ditto.
26919 (emit_nonvlmax_integer_move_insn): Ditto.
26920 (emit_vlmax_gather_insn): Ditto.
26921 (emit_vlmax_masked_gather_mu_insn): Ditto.
26922 (get_repeating_sequence_dup_machine_mode): Ditto.
26924 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26926 * config/riscv/autovec.md: Split arguments.
26927 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
26928 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
26930 2023-06-04 Andrew Pinski <apinski@marvell.com>
26932 * expr.cc (do_store_flag): Improve for single bit testing
26933 not against zero but against that single bit.
26935 2023-06-04 Andrew Pinski <apinski@marvell.com>
26937 * expr.cc (do_store_flag): Extend the one bit checking case
26938 to handle the case where we don't have an and but rather still
26939 one bit is known to be non-zero.
26941 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
26943 * config/h8300/constraints.md (Zz): Make this a normal
26945 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
26946 * config/h8300/logical.md (H8/SX bit patterns): Remove.
26948 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26950 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
26951 New insn_and_split patterns.
26953 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26956 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
26957 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
26958 (@vlmul_extx4<mode>): Ditto.
26959 (@vlmul_extx8<mode>): Ditto.
26960 (@vlmul_extx16<mode>): Ditto.
26961 (@vlmul_extx32<mode>): Ditto.
26962 (@vlmul_extx64<mode>): Ditto.
26963 (*vlmul_extx2<mode>): Ditto.
26964 (*vlmul_extx4<mode>): Ditto.
26965 (*vlmul_extx8<mode>): Ditto.
26966 (*vlmul_extx16<mode>): Ditto.
26967 (*vlmul_extx32<mode>): Ditto.
26968 (*vlmul_extx64<mode>): Ditto.
26970 2023-06-04 Pan Li <pan2.li@intel.com>
26972 * config/riscv/riscv-vector-builtins-types.def
26973 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
26974 (vfloat32m1_t): Likewise.
26975 (vfloat32m2_t): Likewise.
26976 (vfloat32m4_t): Likewise.
26977 (vfloat32m8_t): Likewise.
26978 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
26979 * config/riscv/vector-iterators.md: Add single to half machine
26982 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26984 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
26985 (*n<optab><mode>): Ditto.
26986 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
26987 (*n<optab><mode>): Ditto.
26988 * config/riscv/vector.md: Ditto.
26990 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
26993 * config/i386/i386-features.cc (scalar_chain::convert_compare):
26994 Update or delete REG_EQUAL notes, converting CONST_INT and
26995 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
26997 2023-06-04 Jason Merrill <jason@redhat.com>
27000 * tree-eh.cc (lower_resx): Pass the exception pointer to the
27002 * except.h: Tweak comment.
27004 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
27006 * postreload.cc (move2add_use_add2_insn): Handle
27007 trivial single_sets. Rename variable PAT to SET.
27008 (move2add_use_add3_insn, reload_cse_move2add): Similar.
27010 2023-06-04 Pan Li <pan2.li@intel.com>
27012 * config/riscv/riscv-vector-builtins-types.def
27013 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
27014 (vfloat16mf2_t): Likewise.
27015 (vfloat16m1_t): Likewise.
27016 (vfloat16m2_t): Likewise.
27017 (vfloat16m4_t): Likewise.
27018 (vfloat16m8_t): Likewise.
27019 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
27020 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
27021 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
27022 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
27025 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
27027 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
27030 2023-06-03 Die Li <lidie@eswincomputing.com>
27032 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
27034 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27036 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
27038 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27040 * config/riscv/vector.md: Add vector-opt.md.
27041 * config/riscv/autovec-opt.md: New file.
27043 2023-06-03 liuhongt <hongtao.liu@intel.com>
27045 PR tree-optimization/110067
27046 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
27047 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
27049 2023-06-03 liuhongt <hongtao.liu@intel.com>
27052 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
27053 (truncv2si<mode>2): Ditto.
27055 2023-06-02 Andrew Pinski <apinski@marvell.com>
27057 PR rtl-optimization/102733
27058 * dse.cc (store_info): Add addrspace field.
27059 (record_store): Record the address space
27060 and check to make sure they are the same.
27062 2023-06-02 Andrew Pinski <apinski@marvell.com>
27064 PR rtl-optimization/110042
27065 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
27066 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
27068 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
27071 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
27072 Make sure that we do not have a cap on field alignment before altering
27073 the struct layout based on the type alignment of the first entry.
27075 2023-06-02 David Faust <david.faust@oracle.com>
27078 * btfout.cc (btf_absolute_func_id): New function.
27079 (btf_asm_func_type): Call it here. Change index parameter from
27080 size_t to ctf_id_t. Use PRIu64 formatter.
27082 2023-06-02 Alex Coplan <alex.coplan@arm.com>
27084 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
27085 (btf_asm_datasec_type): Likewise.
27087 2023-06-02 Carl Love <cel@us.ibm.com>
27089 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
27090 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
27092 2023-06-02 Jason Merrill <jason@redhat.com>
27096 * tree.h (DECL_MERGEABLE): New.
27097 * tree-core.h (struct tree_decl_common): Mention it.
27098 * gimplify.cc (gimplify_init_constructor): Check it.
27099 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
27100 * varasm.cc (categorize_decl_for_section): Likewise.
27102 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
27104 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
27105 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
27106 (stack_regs_mentioned_p): Change return type from int to bool
27107 and adjust function body accordingly.
27108 (stack_regs_mentioned): Ditto.
27109 (check_asm_stack_operands): Ditto. Change "malformed_asm"
27111 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
27112 (swap_rtx_condition_1): Change return type from int to bool
27113 and adjust function body accordingly. Change "r" variable to bool.
27114 (swap_rtx_condition): Change return type from int to bool
27115 and adjust function body accordingly.
27116 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
27117 (subst_stack_regs): Ditto.
27118 (convert_regs_entry): Change return type from int to bool and adjust
27119 function body accordingly. Change "inserted" variable to bool.
27120 (convert_regs_1): Recode handling of control_flow_insn_deleted.
27121 (convert_regs_2): Recode handling of cfg_altered.
27122 (convert_regs): Ditto. Change "inserted" variable to bool.
27124 2023-06-02 Jason Merrill <jason@redhat.com>
27127 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
27128 (initializer_constant_valid_p_1): Compare float precision.
27130 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
27132 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
27135 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27137 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
27138 (vect_set_loop_condition_partial_vectors): Ditto.
27140 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
27143 * config/avr/avr.md: Add an RTL peephole to optimize operations on
27144 non-LD_REGS after a move from LD_REGS.
27145 (piaop): New code iterator.
27147 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
27150 * doc/install.texi: Document (optional) Perl usage for parallel
27151 testing of libgomp.
27153 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
27156 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
27159 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27160 KuanLin Chen <best124612@gmail.com>
27162 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
27163 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
27165 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27167 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
27169 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27171 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
27173 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27175 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
27177 (DEF_RVV_FRM_ENUM): Ditto.
27179 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27181 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
27182 intrinsic API expander
27183 * config/riscv/vector.md
27184 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
27185 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
27186 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
27188 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27190 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
27191 * config/riscv/predicates.md (vector_perm_operand): New predicate.
27192 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27193 (expand_vec_perm): New function.
27194 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
27195 (gen_const_vector_dup): Ditto.
27196 (emit_vlmax_gather_insn): Ditto.
27197 (emit_vlmax_masked_gather_mu_insn): Ditto.
27198 (expand_vec_perm): Ditto.
27200 2023-06-01 Jason Merrill <jason@redhat.com>
27202 * doc/invoke.texi (-Wpedantic): Improve clarity.
27204 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
27206 * rtl.h (exp_equiv_p): Change return type from int to bool.
27207 * cse.cc (mention_regs): Change return type from int to bool
27208 and adjust function body accordingly.
27209 (exp_equiv_p): Ditto.
27210 (insert_regs): Ditto. Change "modified" function argument to bool
27211 and update usage accordingly.
27212 (record_jump_cond): Remove always zero "reversed_nonequality"
27213 function argument and update usage accordingly.
27214 (fold_rtx): Change "changed" variable to bool.
27215 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
27216 (is_dead_reg): Change return type from int to bool.
27218 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27220 * config/xtensa/xtensa.md (adddi3, subdi3):
27221 New RTL generation patterns implemented according to the instruc-
27222 tion idioms described in the Xtensa ISA reference manual (p. 600).
27224 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
27225 Uros Bizjak <ubizjak@gmail.com>
27228 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
27229 CODE_for_sse4_1_ptestzv2di.
27230 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
27231 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
27232 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
27233 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
27234 when expanding UNSPEC_PTEST to compare against zero.
27235 * config/i386/i386-features.cc (scalar_chain::convert_compare):
27236 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
27237 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
27238 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
27239 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
27240 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
27241 check for suitable matching modes for the UNSPEC_PTEST pattern.
27242 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
27243 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
27244 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
27245 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
27246 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
27247 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
27248 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
27250 (*ptest<mode>_and): Specify CCZ to only perform this optimization
27251 when only the Z flag is required.
27253 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
27256 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
27258 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27260 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
27261 Add =r,m and =r,m alternatives.
27262 (load_pair<DREG:mode><DREG2:mode>): Likewise.
27263 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
27265 2023-06-01 Pan Li <pan2.li@intel.com>
27267 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
27269 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
27270 (main): Disable FP16 tuple.
27271 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
27272 (TARGET_VECTOR_ELEN_FP_16): Ditto.
27273 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
27275 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
27276 (vfloat16mf2_t): Ditto.
27277 (vfloat16m1_t): Ditto.
27278 (vfloat16m2_t): Ditto.
27279 (vfloat16m4_t): Ditto.
27280 (vfloat16m8_t): Ditto.
27281 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
27283 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
27284 machine mode based on TARGET_VECTOR_ELEN_FP_16.
27286 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27288 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
27289 (DEF_RVV_FRM_ENUM): New macro.
27290 (handle_pragma_vector): Add FRM enum
27291 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
27298 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
27299 Richard Sandiford <richard.sandiford@arm.com>
27301 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
27302 Update call to wi::bswap.
27303 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
27304 Update call to wi::bswap.
27305 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
27306 Update calls to wi::bswap.
27307 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
27308 (wi::bswap_large): New function, with revised API.
27309 * wide-int.h (wi::bswap): New (template) function prototype.
27310 (wide_int_storage::bswap): Remove method.
27311 (sext_large, zext_large): Consistent indentation/line wrapping.
27312 (bswap_large): Prototype helper function containing implementation.
27313 (wi::bswap): New template wrapper around bswap_large.
27315 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27318 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
27319 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
27320 (usdot_prod<vsi2qi>): Rename to...
27321 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
27322 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
27323 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
27324 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
27325 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
27326 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
27327 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
27330 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27333 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
27334 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
27335 (aarch64_sq<r>dmulh_n<mode>): Rename to...
27336 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
27337 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
27338 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
27339 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
27340 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
27341 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
27342 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
27343 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
27344 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
27345 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
27346 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
27348 2023-05-31 David Faust <david.faust@oracle.com>
27350 * btfout.cc (btf_kind_names): New.
27351 (btf_kind_name): New.
27352 (btf_absolute_var_id): New utility function.
27353 (btf_relative_var_id): Likewise.
27354 (btf_relative_func_id): Likewise.
27355 (btf_absolute_datasec_id): Likewise.
27356 (btf_asm_type_ref): New.
27357 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
27358 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
27359 (btf_asm_varent): Likewise.
27360 (btf_asm_func_arg): Likewise.
27361 (btf_asm_datasec_entry): Likewise.
27362 (btf_asm_datasec_type): Likewise.
27363 (btf_asm_func_type): Likewise. Add index parameter.
27364 (btf_asm_enum_const): Likewise.
27365 (btf_asm_sou_member): Likewise.
27366 (output_btf_vars): Update btf_asm_* call accordingly.
27367 (output_asm_btf_sou_fields): Likewise.
27368 (output_asm_btf_enum_list): Likewise.
27369 (output_asm_btf_func_args_list): Likewise.
27370 (output_asm_btf_vlen_bytes): Likewise.
27371 (output_btf_func_types): Add ctf_container_ref parameter.
27372 Pass it to btf_asm_func_type.
27373 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
27374 (btf_output): Update output_btf_func_types call similarly.
27376 2023-05-31 David Faust <david.faust@oracle.com>
27378 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
27379 and BTF_KIND_FWD which do not use the size/type field at all.
27381 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
27383 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
27384 (active_insn_p): Ditto.
27385 (in_sequence_p): Ditto.
27386 (unshare_all_rtl): Change return type from int to void.
27387 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
27388 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
27389 and adjust function body accordingly.
27390 (mem_expr_equal_p): Ditto.
27391 (unshare_all_rtl): Change return type from int to void
27392 and adjust function body accordingly.
27393 (verify_rtx_sharing): Remove unneeded return.
27394 (active_insn_p): Change return type from int to bool
27395 and adjust function body accordingly.
27396 (in_sequence_p): Ditto.
27398 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
27400 * rtl.h (true_dependence): Change return type from int to bool.
27401 (canon_true_dependence): Ditto.
27402 (read_dependence): Ditto.
27403 (anti_dependence): Ditto.
27404 (canon_anti_dependence): Ditto.
27405 (output_dependence): Ditto.
27406 (canon_output_dependence): Ditto.
27407 (may_alias_p): Ditto.
27408 * alias.h (alias_sets_conflict_p): Ditto.
27409 (alias_sets_must_conflict_p): Ditto.
27410 (objects_must_conflict_p): Ditto.
27411 (nonoverlapping_memrefs_p): Ditto.
27412 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
27413 (record_set): Ditto.
27414 (base_alias_check): Ditto.
27415 (find_base_value): Ditto.
27416 (mems_in_disjoint_alias_sets_p): Ditto.
27417 (get_alias_set_entry): Ditto.
27418 (decl_for_component_ref): Ditto.
27419 (write_dependence_p): Ditto.
27420 (memory_modified_1): Ditto.
27421 (mems_in_disjoint_alias_set_p): Change return type from int to bool
27422 and adjust function body accordingly.
27423 (alias_sets_conflict_p): Ditto.
27424 (alias_sets_must_conflict_p): Ditto.
27425 (objects_must_conflict_p): Ditto.
27426 (rtx_equal_for_memref_p): Ditto.
27427 (base_alias_check): Ditto.
27428 (read_dependence): Ditto.
27429 (nonoverlapping_memrefs_p): Ditto.
27430 (true_dependence_1): Ditto.
27431 (true_dependence): Ditto.
27432 (canon_true_dependence): Ditto.
27433 (write_dependence_p): Ditto.
27434 (anti_dependence): Ditto.
27435 (canon_anti_dependence): Ditto.
27436 (output_dependence): Ditto.
27437 (canon_output_dependence): Ditto.
27438 (may_alias_p): Ditto.
27439 (init_alias_analysis): Change "changed" variable to bool.
27441 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27443 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
27444 expand into define_insn_and_split.
27446 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27448 * config/riscv/vector.md: Remove FRM.
27450 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27452 * config/riscv/vector.md: Remove FRM.
27454 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27456 * config/riscv/vector.md: Remove FRM.
27458 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
27461 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
27464 2023-05-31 Richard Biener <rguenther@suse.de>
27467 PR tree-optimization/109143
27468 * tree-ssa-structalias.cc (struct topo_info): Remove.
27469 (init_topo_info): Likewise.
27470 (free_topo_info): Likewise.
27471 (compute_topo_order): Simplify API, put the component
27472 with ESCAPED last so it's processed first.
27473 (topo_visit): Adjust.
27474 (solve_graph): Likewise.
27476 2023-05-31 Richard Biener <rguenther@suse.de>
27478 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
27480 (add_graph_edge): Count redundant edges we avoid to create.
27481 (dump_sa_stats): Dump them.
27482 (ipa_pta_execute): Do not dump generating constraints when
27483 we are not dumping them.
27485 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27487 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
27488 output template to avoid explicit switch on which_alternative.
27489 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
27490 (and<mode>3): Likewise.
27491 (ior<mode>3): Likewise.
27492 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
27494 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27496 * config/xtensa/predicates.md (xtensa_bit_join_operator):
27498 * config/xtensa/xtensa.md (ior_op): Remove.
27499 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
27500 insn_and_split pattern of the same name to express and capture
27501 the bit-combining operation with both sides swapped.
27502 In addition, replace use of code iterator with new operator
27504 (*shlrd_const, *shlrd_per_byte):
27505 Likewise regarding the code iterator.
27507 2023-05-31 Cui, Lili <lili.cui@intel.com>
27509 PR tree-optimization/110038
27510 * params.opt: Add a limit on tree-reassoc-width.
27511 * tree-ssa-reassoc.cc
27512 (rewrite_expr_tree_parallel): Add width limit.
27514 2023-05-31 Pan Li <pan2.li@intel.com>
27516 * common/config/riscv/riscv-common.cc:
27517 (riscv_implied_info): Add zvfh item.
27518 (riscv_ext_version_table): Ditto.
27519 (riscv_ext_flag_table): Ditto.
27520 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
27521 (TARGET_ZVFH): Ditto.
27523 2023-05-30 liuhongt <hongtao.liu@intel.com>
27525 PR tree-optimization/108804
27526 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
27527 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
27528 Add new parameter narrow_src_p.
27529 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
27530 vectorization by truncating to lower precision.
27531 * tree-vectorizer.h (vect_get_range_info): New declare.
27533 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
27535 * lra-int.h (lra_update_sp_offset): Add the prototype.
27536 * lra.cc (setup_sp_offset): Change the return type. Use
27537 lra_update_sp_offset.
27538 * lra-eliminations.cc (lra_update_sp_offset): New function.
27539 (lra_process_new_insns): Push the current insn to reprocess if the
27540 input reload changes sp offset.
27542 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
27545 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
27546 Fix misleading identation.
27548 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
27550 * rtl.h (comparison_dominates_p): Change return type from int to bool.
27551 (condjump_p): Ditto.
27552 (any_condjump_p): Ditto.
27553 (any_uncondjump_p): Ditto.
27554 (simplejump_p): Ditto.
27555 (returnjump_p): Ditto.
27556 (eh_returnjump_p): Ditto.
27557 (onlyjump_p): Ditto.
27558 (invert_jump_1): Ditto.
27559 (invert_jump): Ditto.
27560 (rtx_renumbered_equal_p): Ditto.
27561 (redirect_jump_1): Ditto.
27562 (redirect_jump): Ditto.
27563 (condjump_in_parallel_p): Ditto.
27564 * jump.cc (invert_exp_1): Adjust forward declaration.
27565 (comparison_dominates_p): Change return type from int to bool
27566 and adjust function body accordingly.
27567 (simplejump_p): Ditto.
27568 (condjump_p): Ditto.
27569 (condjump_in_parallel_p): Ditto.
27570 (any_uncondjump_p): Ditto.
27571 (any_condjump_p): Ditto.
27572 (returnjump_p): Ditto.
27573 (eh_returnjump_p): Ditto.
27574 (onlyjump_p): Ditto.
27575 (redirect_jump_1): Ditto.
27576 (redirect_jump): Ditto.
27577 (invert_exp_1): Ditto.
27578 (invert_jump_1): Ditto.
27579 (invert_jump): Ditto.
27580 (rtx_renumbered_equal_p): Ditto.
27582 2023-05-30 Andrew Pinski <apinski@marvell.com>
27584 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
27585 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
27586 Add ne as a possible cmp.
27587 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
27589 2023-05-30 Andrew Pinski <apinski@marvell.com>
27591 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
27594 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
27596 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
27597 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
27598 (and (extend X) C) as (zero_extend (and X C)), to also optimize
27599 modes wider than HOST_WIDE_INT.
27601 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
27604 * simplify-rtx.cc (simplify_const_relational_operation): Return
27605 early if we have a MODE_CC comparison that isn't a COMPARE against
27608 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
27610 * config/riscv/riscv.cc (riscv_const_insns): Allow
27611 const_vec_duplicates.
27613 2023-05-30 liuhongt <hongtao.liu@intel.com>
27615 PR middle-end/108938
27616 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
27617 function, cut from original find_bswap_or_nop function.
27618 (find_bswap_or_nop): Add a new parameter, detect bswap +
27619 rotate and save rotate result in the new parameter.
27620 (bswap_replace): Add a new parameter to indicate rotate and
27621 generate rotate stmt if needed.
27622 (maybe_optimize_vector_constructor): Adjust for new rotate
27623 parameter in the upper 2 functions.
27624 (pass_optimize_bswap::execute): Ditto.
27625 (imm_store_chain_info::output_merged_store): Ditto.
27627 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27629 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
27630 (aarch64_<su>adalp<mode>): New define_expand.
27631 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
27632 (aarch64_<su>addlp<mode>): Convert to define_expand.
27633 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
27634 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
27636 (USADDLP): Likewise.
27637 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
27639 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27641 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
27642 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
27643 srhadd, urhadd builtin codes for standard optab ones.
27644 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
27645 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
27647 (<u>avg<mode>3_ceil): Rename to...
27648 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
27650 (aarch64_<su>hsub<mode>): New define_expand.
27651 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
27652 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
27653 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
27655 2023-05-30 Andreas Schwab <schwab@suse.de>
27658 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
27659 match libsanitizer.
27661 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27663 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
27664 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
27666 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
27667 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
27668 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
27669 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
27670 (aarch64_<sra_op>sra_n<mode>): New define_expand.
27671 (aarch64_<sra_op>rsra_n<mode>): Likewise.
27672 (aarch64_<sur>sra_n<mode>): Rename to...
27673 (aarch64_<sur>sra_ndi): ... This.
27674 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
27675 any_target_p argument.
27676 (aarch64_extract_vec_duplicate_wide_int): Define.
27677 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
27678 (aarch64_const_vec_rnd_cst_p): Likewise.
27679 (aarch64_vector_mode_supported_any_target_p): Likewise.
27680 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
27681 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
27682 (VSRA): Adjust for the above.
27684 (V2XWIDE): New mode_attr.
27685 (vec_or_offset): Likewise.
27686 (SHIFTEXTEND): Likewise.
27687 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
27689 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
27690 clarify that it applies to current target options.
27691 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
27692 * doc/tm.texi.in: Regenerate.
27693 * stor-layout.cc (mode_for_vector): Check
27694 vector_mode_supported_any_target_p when iterating through vector modes.
27695 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
27696 clarify that it applies to current target options.
27697 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
27699 2023-05-30 Lili Cui <lili.cui@intel.com>
27701 PR tree-optimization/98350
27702 * tree-ssa-reassoc.cc
27703 (rewrite_expr_tree_parallel): Rewrite this function.
27704 (rank_ops_for_fma): New.
27705 (reassociate_bb): Handle new function.
27707 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
27709 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
27710 (rtx_unstable_p): Ditto.
27711 (reg_mentioned_p): Ditto.
27712 (reg_referenced_p): Ditto.
27713 (reg_used_between_p): Ditto.
27714 (reg_set_between_p): Ditto.
27715 (modified_between_p): Ditto.
27716 (no_labels_between_p): Ditto.
27717 (modified_in_p): Ditto.
27718 (reg_set_p): Ditto.
27719 (multiple_sets): Ditto.
27720 (set_noop_p): Ditto.
27721 (noop_move_p): Ditto.
27722 (reg_overlap_mentioned_p): Ditto.
27723 (dead_or_set_p): Ditto.
27724 (dead_or_set_regno_p): Ditto.
27725 (find_reg_fusage): Ditto.
27726 (find_regno_fusage): Ditto.
27727 (side_effects_p): Ditto.
27728 (volatile_refs_p): Ditto.
27729 (volatile_insn_p): Ditto.
27730 (may_trap_p_1): Ditto.
27731 (may_trap_p): Ditto.
27732 (may_trap_or_fault_p): Ditto.
27733 (computed_jump_p): Ditto.
27734 (auto_inc_p): Ditto.
27735 (loc_mentioned_in_p): Ditto.
27736 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
27737 (rtx_unstable_p): Change return type from int to bool
27738 and adjust function body accordingly.
27739 (rtx_addr_can_trap_p): Ditto.
27740 (reg_mentioned_p): Ditto.
27741 (no_labels_between_p): Ditto.
27742 (reg_used_between_p): Ditto.
27743 (reg_referenced_p): Ditto.
27744 (reg_set_between_p): Ditto.
27745 (reg_set_p): Ditto.
27746 (modified_between_p): Ditto.
27747 (modified_in_p): Ditto.
27748 (multiple_sets): Ditto.
27749 (set_noop_p): Ditto.
27750 (noop_move_p): Ditto.
27751 (reg_overlap_mentioned_p): Ditto.
27752 (dead_or_set_p): Ditto.
27753 (dead_or_set_regno_p): Ditto.
27754 (find_reg_fusage): Ditto.
27755 (find_regno_fusage): Ditto.
27756 (remove_node_from_insn_list): Ditto.
27757 (volatile_insn_p): Ditto.
27758 (volatile_refs_p): Ditto.
27759 (side_effects_p): Ditto.
27760 (may_trap_p_1): Ditto.
27761 (may_trap_p): Ditto.
27762 (may_trap_or_fault_p): Ditto.
27763 (computed_jump_p): Ditto.
27764 (auto_inc_p): Ditto.
27765 (loc_mentioned_in_p): Ditto.
27766 * combine.cc (can_combine_p): Update indirect function.
27768 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27770 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
27771 * config/riscv/iterators.md: New attribute.
27772 * config/riscv/vector-iterators.md: New attribute.
27774 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
27776 * config/riscv/riscv.md: Fix signed and unsigned comparison
27779 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27781 * config/riscv/autovec.md (fnma<mode>4): New pattern.
27782 (*fnma<mode>): Ditto.
27784 2023-05-29 Die Li <lidie@eswincomputing.com>
27786 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
27788 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
27789 process for TARGET_XTHEADCONDMOV
27791 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
27794 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
27795 TARGET_AVX512BW to generate truncv16hiv16qi2.
27797 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
27799 * config/riscv/riscv.md (and<mode>3): New expander.
27800 (*and<mode>3) New pattern.
27801 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
27804 2023-05-29 Pan Li <pan2.li@intel.com>
27806 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
27807 comments and rename local variables.
27808 (emit_nonvlmax_insn): Diito.
27809 (emit_vlmax_merge_insn): Ditto.
27810 (emit_vlmax_cmp_insn): Ditto.
27811 (emit_vlmax_cmp_mu_insn): Ditto.
27812 (emit_scalar_move_insn): Ditto.
27814 2023-05-29 Pan Li <pan2.li@intel.com>
27816 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
27818 (emit_nonvlmax_insn): Ditto.
27819 (emit_vlmax_merge_insn): Ditto.
27820 (emit_vlmax_cmp_insn): Ditto.
27821 (emit_vlmax_cmp_mu_insn): Ditto.
27822 (expand_vec_series): Ditto.
27824 2023-05-29 Pan Li <pan2.li@intel.com>
27826 * config/riscv/riscv-protos.h (enum insn_type): New type.
27827 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
27828 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
27830 (rvv_builder::get_merged_repeating_sequence): Ditto.
27831 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
27832 to evaluate the optimization cost.
27833 (rvv_builder::get_merge_scalar_mask): New function to get the merge
27835 (emit_scalar_move_insn): New function to emit vmv.s.x.
27836 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
27837 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
27839 (get_repeating_sequence_dup_machine_mode): New function to get the dup
27841 (expand_vector_init_merge_repeating_sequence): New function to perform
27843 (expand_vec_init): Add this vector init optimization.
27844 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
27846 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
27848 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
27849 put onto the increment when it is inserted after the position.
27851 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
27853 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
27856 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27858 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
27860 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27862 * config/riscv/autovec.md (fma<mode>4): New pattern.
27863 (*fma<mode>): Ditto.
27864 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27865 (emit_vlmax_ternary_insn): New function.
27866 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
27868 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27870 * config/riscv/vector.md: Fix vimuladd instruction bug.
27872 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27874 * config/riscv/riscv.cc (global_state_unknown_p): New function.
27875 (riscv_mode_after): Fix incorrect VXM.
27877 2023-05-29 Pan Li <pan2.li@intel.com>
27879 * common/config/riscv/riscv-common.cc:
27880 (riscv_implied_info): Add zvfhmin item.
27881 (riscv_ext_version_table): Ditto.
27882 (riscv_ext_flag_table): Ditto.
27883 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
27884 (TARGET_ZFHMIN): Align indent.
27885 (TARGET_ZFH): Ditto.
27886 (TARGET_ZVFHMIN): New macro.
27888 2023-05-27 liuhongt <hongtao.liu@intel.com>
27891 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
27892 to VI_AVX2 to cover more modes.
27894 2023-05-27 liuhongt <hongtao.liu@intel.com>
27896 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
27897 Remove ATOM and ICELAKE(and later) core processors.
27899 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
27901 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
27903 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
27905 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
27908 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
27909 Juzhe Zhong <juzhe.zhong@rivai.ai>
27911 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
27913 (<optab><v_quad_trunc><mode>2): Dito.
27914 (<optab><v_oct_trunc><mode>2): Dito.
27915 (trunc<mode><v_double_trunc>2): Dito.
27916 (trunc<mode><v_quad_trunc>2): Dito.
27917 (trunc<mode><v_oct_trunc>2): Dito.
27918 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
27919 (autovectorize_vector_modes): Define.
27920 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
27922 (autovectorize_vector_modes): Implement hook.
27923 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
27924 Implement target hook.
27925 (riscv_vectorize_related_mode): Implement target hook.
27926 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
27927 (TARGET_VECTORIZE_RELATED_MODE): Define.
27928 * config/riscv/vector-iterators.md: Add lowercase versions of
27929 mode_attr iterators.
27931 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
27932 Tobias Burnus <tobias@codesourcery.com>
27934 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
27935 (ASM_SPEC): Use XNACKOPT.
27936 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
27937 (enum hsaco_attr_type): ... this, and generalize the names.
27938 (TARGET_XNACK): New macro.
27939 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
27941 (output_file_start): Update xnack handling.
27942 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
27943 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
27944 (sram_ecc_type): Rename to ...
27945 (hsaco_attr_type: ... this.)
27946 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
27947 (TEST_XNACK): Delete.
27948 (TEST_XNACK_ANY): New macro.
27949 (TEST_XNACK_ON): New macro.
27950 (main): Support the new -mxnack=on/off/any syntax.
27951 * doc/invoke.texi (-mxnack): Update for new syntax.
27953 2023-05-26 Andrew Pinski <apinski@marvell.com>
27955 * genmatch.cc (emit_debug_printf): New function.
27956 (dt_simplify::gen_1): Emit printf into the code
27957 before the `return true` or returning the folded result
27958 instead of emitting it always.
27960 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27962 * config/xtensa/xtensa-protos.h
27963 (xtensa_expand_block_set_unrolled_loop,
27964 xtensa_expand_block_set_small_loop): Remove.
27965 (xtensa_expand_block_set): New prototype.
27966 * config/xtensa/xtensa.cc
27967 (xtensa_expand_block_set_libcall): New subfunction.
27968 (xtensa_expand_block_set_unrolled_loop,
27969 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
27970 (xtensa_expand_block_set): New function that calls the above
27972 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
27973 xtensa_expand_block_set().
27975 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27977 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
27979 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
27981 * config/xtensa/constraints.md (O):
27982 Change to use the above function.
27983 * config/xtensa/xtensa.md (*subsi3_from_const):
27984 New insn_and_split pattern.
27986 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27988 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
27989 Retract excessive line folding, and correct the value of
27990 the "length" insn attribute related to TARGET_DENSITY.
27991 (*extzvsi-1bit_addsubx): Ditto.
27993 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
27995 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
27996 Do not disable call to ix86_expand_vecop_qihi2.
27998 2023-05-26 liuhongt <hongtao.liu@intel.com>
28002 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
28003 calculation when !hard_regno_mode_ok for GENERAL_REGS and
28004 mode, otherwise still use GENERAL_REGS.
28006 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28008 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
28009 explict VL and drop VL in ops.
28011 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
28013 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
28014 in different BB blocks.
28016 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
28018 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
28019 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
28020 instructions when available. Emulate truncation via
28021 ix86_expand_vec_perm_const_1 when native truncate insn
28023 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
28024 when available. Trivially rename some variables.
28025 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
28026 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
28027 calculation of V*QImode emulations to account for generation of
28028 2x-wider mode instructions.
28029 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
28030 emulations to account for generation of 2x-wider mode instructions.
28032 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
28035 * config/avr/avr.cc (avr_can_inline_p): New static function.
28036 (TARGET_CAN_INLINE_P): Define to that function.
28038 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
28041 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
28042 Handle any bit position and use mode QISI.
28043 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
28044 of 2 insns for bit-transfer of respective style.
28046 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
28048 * config/arm/iterators.md (MVE_6): Remove.
28049 * config/arm/mve.md: Replace MVE_6 with MVE_5.
28051 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28052 Richard Sandiford <richard.sandiford@arm.com>
28054 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
28056 (vect_set_loop_controls_directly): Add decrement IV support.
28057 (vect_set_loop_condition_partial_vectors): Ditto.
28058 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
28060 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
28063 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28066 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
28067 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
28068 Fix canonicalization of PLUS operands.
28069 (aarch64_fcmla<rot><mode>): Rename to...
28070 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
28071 Fix canonicalization of PLUS operands.
28072 (aarch64_fcmla_lane<rot><mode>): Rename to...
28073 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
28074 Fix canonicalization of PLUS operands.
28075 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
28076 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
28077 Fix canonicalization of PLUS operands.
28078 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
28080 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
28082 * config/arm/arm.md (rbitsi2): Rename to...
28083 (arm_rbit): ... This.
28084 (ctzsi2): Adjust for the above.
28085 (arm_rev16si2): Convert to define_expand.
28086 (arm_rev16si2_alt1): New pattern.
28087 (arm_rev16si2_alt): Rename to...
28088 (*arm_rev16si2_alt2): ... This.
28089 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
28090 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
28091 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
28092 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
28094 2023-05-25 Alex Coplan <alex.coplan@arm.com>
28097 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
28099 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
28100 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
28101 DFmode as an rvalue.
28103 2023-05-25 Richard Biener <rguenther@suse.de>
28106 * tree-vect-stmts.cc (vectorizable_condition): For
28107 embedded comparisons also handle the case when the target
28108 only provides vec_cmp and vcond_mask.
28110 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
28112 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
28115 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28117 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
28118 (seq_cost_ignoring_scalar_moves): Likewise.
28119 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
28121 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28123 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
28124 (vcage_f32): Likewise.
28125 (vcages_f32): Likewise.
28126 (vcageq_f32): Likewise.
28127 (vcaged_f64): Likewise.
28128 (vcageq_f64): Likewise.
28129 (vcagts_f32): Likewise.
28130 (vcagt_f32): Likewise.
28131 (vcagt_f64): Likewise.
28132 (vcagtq_f32): Likewise.
28133 (vcagtd_f64): Likewise.
28134 (vcagtq_f64): Likewise.
28135 (vcale_f32): Likewise.
28136 (vcale_f64): Likewise.
28137 (vcaled_f64): Likewise.
28138 (vcales_f32): Likewise.
28139 (vcaleq_f32): Likewise.
28140 (vcaleq_f64): Likewise.
28141 (vcalt_f32): Likewise.
28142 (vcalt_f64): Likewise.
28143 (vcaltd_f64): Likewise.
28144 (vcaltq_f32): Likewise.
28145 (vcaltq_f64): Likewise.
28146 (vcalts_f32): Likewise.
28148 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
28152 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
28153 int to const int or const int to const unsigned int.
28154 (_mm512_mask_srli_epi16): Ditto.
28155 (_mm512_slli_epi16): Ditto.
28156 (_mm512_mask_slli_epi16): Ditto.
28157 (_mm512_maskz_slli_epi16): Ditto.
28158 (_mm512_srai_epi16): Ditto.
28159 (_mm512_mask_srai_epi16): Ditto.
28160 (_mm512_maskz_srai_epi16): Ditto.
28161 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
28162 (_mm512_mask_slli_epi64): Ditto.
28163 (_mm512_maskz_slli_epi64): Ditto.
28164 (_mm512_srli_epi64): Ditto.
28165 (_mm512_mask_srli_epi64): Ditto.
28166 (_mm512_maskz_srli_epi64): Ditto.
28167 (_mm512_srai_epi64): Ditto.
28168 (_mm512_mask_srai_epi64): Ditto.
28169 (_mm512_maskz_srai_epi64): Ditto.
28170 (_mm512_slli_epi32): Ditto.
28171 (_mm512_mask_slli_epi32): Ditto.
28172 (_mm512_maskz_slli_epi32): Ditto.
28173 (_mm512_srli_epi32): Ditto.
28174 (_mm512_mask_srli_epi32): Ditto.
28175 (_mm512_maskz_srli_epi32): Ditto.
28176 (_mm512_srai_epi32): Ditto.
28177 (_mm512_mask_srai_epi32): Ditto.
28178 (_mm512_maskz_srai_epi32): Ditto.
28179 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
28180 (_mm256_maskz_srai_epi16): Ditto.
28181 (_mm_mask_srai_epi16): Ditto.
28182 (_mm_maskz_srai_epi16): Ditto.
28183 (_mm256_mask_slli_epi16): Ditto.
28184 (_mm256_maskz_slli_epi16): Ditto.
28185 (_mm_mask_slli_epi16): Ditto.
28186 (_mm_maskz_slli_epi16): Ditto.
28187 (_mm_maskz_srli_epi16): Ditto.
28188 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
28189 (_mm256_maskz_srli_epi32): Ditto.
28190 (_mm_mask_srli_epi32): Ditto.
28191 (_mm_maskz_srli_epi32): Ditto.
28192 (_mm256_mask_srli_epi64): Ditto.
28193 (_mm256_maskz_srli_epi64): Ditto.
28194 (_mm_mask_srli_epi64): Ditto.
28195 (_mm_maskz_srli_epi64): Ditto.
28196 (_mm256_mask_srai_epi32): Ditto.
28197 (_mm256_maskz_srai_epi32): Ditto.
28198 (_mm_mask_srai_epi32): Ditto.
28199 (_mm_maskz_srai_epi32): Ditto.
28200 (_mm256_srai_epi64): Ditto.
28201 (_mm256_mask_srai_epi64): Ditto.
28202 (_mm256_maskz_srai_epi64): Ditto.
28203 (_mm_srai_epi64): Ditto.
28204 (_mm_mask_srai_epi64): Ditto.
28205 (_mm_maskz_srai_epi64): Ditto.
28206 (_mm_mask_slli_epi32): Ditto.
28207 (_mm_maskz_slli_epi32): Ditto.
28208 (_mm_mask_slli_epi64): Ditto.
28209 (_mm_maskz_slli_epi64): Ditto.
28210 (_mm256_mask_slli_epi32): Ditto.
28211 (_mm256_maskz_slli_epi32): Ditto.
28212 (_mm256_mask_slli_epi64): Ditto.
28213 (_mm256_maskz_slli_epi64): Ditto.
28215 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28217 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
28220 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28222 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
28223 * data-streamer-out.cc (streamer_write_vrange): Same.
28224 * value-range.h (class vrange): Make streamer_write_vrange a friend.
28226 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28228 * value-query.cc (range_query::get_tree_range): Set NAN directly
28230 * value-range.cc (frange::set): Assert that bounds are not NAN.
28232 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28234 * value-range.cc (add_vrange): Handle known NANs.
28236 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
28238 * value-range.h (frange::set_nan): New.
28240 2023-05-25 Alexandre Oliva <oliva@adacore.com>
28243 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
28244 requires stricter alignment than MEM's.
28246 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28248 PR tree-optimization/107822
28249 PR tree-optimization/107986
28250 * Makefile.in (OBJS): Add gimple-range-phi.o.
28251 * gimple-range-cache.h (ranger_cache::m_estimate): New
28252 phi_analyzer pointer member.
28253 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
28254 phi_analyzer if no loop info is available.
28255 * gimple-range-phi.cc: New file.
28256 * gimple-range-phi.h: New file.
28257 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
28259 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28261 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
28263 (fold_range): Add range_query parameter.
28264 (fur_relation::fur_relation): New.
28265 (fur_relation::trio): New.
28266 (fur_relation::register_relation): New.
28267 (fold_relations): New.
28268 * gimple-range-fold.h (fold_range): Adjust prototypes.
28269 (fold_relations): New.
28271 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28273 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
28274 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
28275 (ranger_cache::const_query): New.
28276 * gimple-range.cc (gimple_ranger::const_query): New.
28277 * gimple-range.h (gimple_ranger::const_query): New prototype.
28279 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28281 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
28282 (ssa_cache::dump_range_query): Delete.
28283 (ssa_lazy_cache::dump_range_query): Delete.
28284 (ssa_lazy_cache::get_range): Move from header file.
28285 (ssa_lazy_cache::clear_range): ditto.
28286 (ssa_lazy_cache::clear): Ditto.
28287 * gimple-range-cache.h (class ssa_cache): Virtualize.
28288 (class ssa_lazy_cache): Inherit and virtualize.
28290 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
28292 * value-range.h (vrange::kind): Remove.
28294 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
28296 PR middle-end/109840
28297 * match.pd <popcount optimizations>: Preserve zero-extension when
28298 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
28299 popcount((T)x), so the popcount's argument keeps the same type.
28300 <parity optimizations>: Likewise preserve extensions when
28301 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
28302 parity((T)x), so that the parity's argument type is the same.
28304 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
28306 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
28307 (ipcp_store_vr_results): Same.
28308 * ipa-prop.cc (ipa_vr::ipa_vr): New.
28309 (ipa_vr::get_vrange): New.
28310 (ipa_vr::set_unknown): New.
28311 (ipa_vr::streamer_read): New.
28312 (ipa_vr::streamer_write): New.
28313 (write_ipcp_transformation_info): Use new ipa_vr API.
28314 (read_ipcp_transformation_info): Same.
28315 (ipa_vr::nonzero_p): Delete.
28316 (ipcp_update_vr): Use new ipa_vr API.
28317 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
28318 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
28320 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
28322 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
28323 silence overflow warnings later on.
28325 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
28327 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
28328 Remove handling of V8QImode.
28329 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
28330 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
28331 (v<insn>v4qi3): Ditto.
28332 * config/i386/sse.md (v<insn>v8qi3): Remove.
28334 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28337 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
28338 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
28339 (aarch64_simd_ashr<mode>): Rename to...
28340 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
28341 (aarch64_simd_imm_shl<mode>): Rename to...
28342 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
28343 (aarch64_simd_reg_sshl<mode>): Rename to...
28344 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
28345 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
28346 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
28347 (aarch64_simd_reg_shl<mode>_signed): Rename to...
28348 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
28349 (vec_shr_<mode>): Rename to...
28350 (vec_shr_<mode><vczle><vczbe>): ... This.
28351 (aarch64_<sur>shl<mode>): Rename to...
28352 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
28353 (aarch64_<sur>q<r>shl<mode>): Rename to...
28354 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
28356 2023-05-24 Richard Biener <rguenther@suse.de>
28359 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
28360 Perform final vector composition using
28361 ix86_expand_vector_init_general instead of setting
28362 the highpart and lowpart which causes spilling.
28364 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28366 PR tree-optimization/109695
28367 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
28369 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
28370 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
28371 flag to set_global_range.
28372 (gimple_ranger::prefill_stmt_dependencies): Ditto.
28374 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28376 PR tree-optimization/109695
28377 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
28379 (temporal_cache::current_p): Check always_current method.
28380 (temporal_cache::set_always_current): Add param and set value
28382 (temporal_cache::always_current_p): New.
28383 (ranger_cache::get_global_range): Adjust.
28384 (ranger_cache::set_global_range): set always current first.
28386 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28388 PR tree-optimization/109695
28389 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
28390 fold_range with global query to choose an initial value.
28392 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28394 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
28397 2023-05-24 Richard Biener <rguenther@suse.de>
28399 PR tree-optimization/109849
28400 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
28401 expressions but take the first sets.
28403 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
28406 * doc/gm2.texi (High procedure function): New node.
28407 (Using): New menu entry for High procedure function.
28409 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
28411 PR rtl-optimization/109940
28412 * early-remat.cc (postorder_index): Rename to...
28413 (rpo_index): ...this.
28414 (compare_candidates): Sort by decreasing rpo_index rather than
28415 increasing postorder_index.
28416 (early_remat::sort_candidates): Calculate the forward RPO from
28418 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
28419 rather than DF_BACKWARD in reverse.
28421 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28424 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
28425 qualifier_none for the return operand.
28427 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28429 * config/riscv/autovec.md (<optab><mode>3): New pattern.
28430 (one_cmpl<mode>2): Ditto.
28431 (*<optab>not<mode>): Ditto.
28432 (*n<optab><mode>): Ditto.
28433 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
28436 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
28438 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
28439 calculation on n_perms by considering nvectors_per_build.
28441 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28442 Richard Sandiford <richard.sandiford@arm.com>
28444 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
28445 (vec_cmp<mode><vm>): New pattern.
28446 (vec_cmpu<mode><vm>): New pattern.
28447 (vcond<V:mode><VI:mode>): New pattern.
28448 (vcondu<V:mode><VI:mode>): New pattern.
28449 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
28450 (emit_vlmax_merge_insn): New function.
28451 (emit_vlmax_cmp_insn): Ditto.
28452 (emit_vlmax_cmp_mu_insn): Ditto.
28453 (expand_vec_cmp): Ditto.
28454 (expand_vec_cmp_float): Ditto.
28455 (expand_vcond): Ditto.
28456 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
28457 (emit_vlmax_cmp_insn): Ditto.
28458 (emit_vlmax_cmp_mu_insn): Ditto.
28459 (get_cmp_insn_code): Ditto.
28460 (expand_vec_cmp): Ditto.
28461 (expand_vec_cmp_float): Ditto.
28462 (expand_vcond): Ditto.
28464 2023-05-24 Pan Li <pan2.li@intel.com>
28466 * config/riscv/genrvv-type-indexer.cc (main): Add
28467 unsigned_eew*_lmul1_interpret for indexer.
28468 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
28469 Register vuint*m1_t interpret function.
28470 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
28471 New macro for vuint8m1_t.
28472 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28473 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28474 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28475 (vbool1_t): Add to unsigned_eew*_interpret_ops.
28476 (vbool2_t): Likewise.
28477 (vbool4_t): Likewise.
28478 (vbool8_t): Likewise.
28479 (vbool16_t): Likewise.
28480 (vbool32_t): Likewise.
28481 (vbool64_t): Likewise.
28482 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
28483 New macro for vuint*m1_t.
28484 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28485 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28486 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28487 (required_extensions_p): Add vuint*m1_t interpret case.
28488 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
28489 Add vuint*m1_t interpret to base type.
28490 (unsigned_eew16_lmul1_interpret): Likewise.
28491 (unsigned_eew32_lmul1_interpret): Likewise.
28492 (unsigned_eew64_lmul1_interpret): Likewise.
28494 2023-05-24 Pan Li <pan2.li@intel.com>
28496 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
28497 for the eew size list.
28498 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
28499 (main): Add signed_eew*_lmul1_interpret for indexer.
28500 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
28501 Register vint*m1_t interpret function.
28502 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
28503 New macro for vint8m1_t.
28504 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28505 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28506 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28507 (vbool1_t): Add to signed_eew*_interpret_ops.
28508 (vbool2_t): Likewise.
28509 (vbool4_t): Likewise.
28510 (vbool8_t): Likewise.
28511 (vbool16_t): Likewise.
28512 (vbool32_t): Likewise.
28513 (vbool64_t): Likewise.
28514 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
28515 New macro for vint*m1_t.
28516 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28517 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28518 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28519 (required_extensions_p): Add vint8m1_t interpret case.
28520 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
28521 Add vint*m1_t interpret to base type.
28522 (signed_eew16_lmul1_interpret): Likewise.
28523 (signed_eew32_lmul1_interpret): Likewise.
28524 (signed_eew64_lmul1_interpret): Likewise.
28526 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28528 * config/riscv/autovec.md: Adjust for new interface.
28529 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
28530 (emit_nonvlmax_insn): Add AVL operand.
28531 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
28532 (emit_nonvlmax_insn): Add AVL operand.
28533 (sew64_scalar_helper): Adjust for new interface.
28534 (expand_tuple_move): Ditto.
28535 * config/riscv/vector.md: Ditto.
28537 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28539 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
28540 (expand_const_vector): Ditto.
28541 (legitimize_move): Ditto.
28542 (sew64_scalar_helper): Ditto.
28543 (expand_tuple_move): Ditto.
28544 (expand_vector_init_insert_elems): Ditto.
28545 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
28547 2023-05-24 liuhongt <hongtao.liu@intel.com>
28550 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
28551 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
28552 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
28553 (ix86_masked_all_ones): Handle 64-bit mask.
28554 * config/i386/i386-builtin.def: Replace icode of related
28555 non-mask simd abs builtins with CODE_FOR_nothing.
28557 2023-05-23 Martin Uecker <uecker@tugraz.at>
28560 * function.cc (gimplify_parm_type): Remove function.
28561 (gimplify_parameters): Call gimplify_type_sizes.
28563 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28565 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
28566 and change to also accept '*subx' pattern.
28569 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28571 * config/xtensa/predicates.md (addsub_operator): New.
28572 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
28573 *extzvsi-1bit_addsubx): New insn_and_split patterns.
28574 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
28575 Add a special case about ifcvt 'noce_try_cmove()' to handle
28576 constant loads that do not fit into signed 12 bits in the
28577 patterns added above.
28579 2023-05-23 Richard Biener <rguenther@suse.de>
28581 PR tree-optimization/109747
28582 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
28583 the SLP node only once to the cost hook.
28585 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
28587 * config/avr/avr.cc (avr_insn_cost): New static function.
28588 (TARGET_INSN_COST): Define to that function.
28590 2023-05-23 Richard Biener <rguenther@suse.de>
28593 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
28594 For vector construction or splats apply GPR->XMM move
28595 costing. QImode memory can be handled directly only
28596 with SSE4.1 pinsrb.
28598 2023-05-23 Richard Biener <rguenther@suse.de>
28600 PR tree-optimization/108752
28601 * tree-vect-stmts.cc (vectorizable_operation): For bit
28602 operations with generic word_mode vectors do not cost
28603 an extra stmt. For plus, minus and negate also cost the
28604 constant materialization.
28606 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
28608 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
28609 Call ix86_expand_vec_shift_qihi_constant for shifts
28610 with constant count operand.
28611 * config/i386/i386.cc (ix86_shift_rotate_cost):
28612 Handle V4QImode and V8QImode.
28613 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
28614 (<insn>v4qi3): Ditto.
28616 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28618 * config/riscv/vector.md: Add mode.
28620 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
28622 PR tree-optimization/109934
28623 * value-range.cc (irange::invert): Remove buggy special case.
28625 2023-05-23 Richard Biener <rguenther@suse.de>
28627 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
28630 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
28633 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
28634 subregs between any scalars that are 64 bits or smaller.
28635 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
28636 (bits_etype): New int attribute.
28637 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
28638 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
28639 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
28641 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
28643 * doc/md.texi: Document that <FOO> can be used to refer to the
28644 numerical value of an int iterator FOO. Tweak other parts of
28645 the int iterator documentation.
28646 * read-rtl.cc (iterator_group::has_self_attr): New field.
28647 (map_attr_string): When has_self_attr is true, make <FOO>
28648 expand to the current value of iterator FOO.
28649 (initialize_iterators): Set has_self_attr for int iterators.
28651 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28653 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
28654 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
28655 (RVV_UNOP_NUM): New macro.
28656 (RVV_BINOP_NUM): Ditto.
28657 (legitimize_move): Refactor the framework of RVV auto-vectorization.
28658 (emit_vlmax_op): Ditto.
28659 (emit_vlmax_reg_op): Ditto.
28660 (emit_len_op): Ditto.
28661 (emit_len_binop): Ditto.
28662 (emit_vlmax_tany_many): Ditto.
28663 (emit_nonvlmax_tany_many): Ditto.
28664 (sew64_scalar_helper): Ditto.
28665 (expand_tuple_move): Ditto.
28666 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
28667 (emit_pred_binop): Ditto.
28668 (emit_vlmax_op): Ditto.
28669 (emit_vlmax_tany_many): New function.
28670 (emit_len_op): Remove.
28671 (emit_nonvlmax_tany_many): New function.
28672 (emit_vlmax_reg_op): Remove.
28673 (emit_len_binop): Ditto.
28674 (emit_index_op): Ditto.
28675 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
28676 (expand_const_vector): Ditto.
28677 (legitimize_move): Ditto.
28678 (sew64_scalar_helper): Ditto.
28679 (expand_tuple_move): Ditto.
28680 (expand_vector_init_insert_elems): Ditto.
28681 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
28682 * config/riscv/vector.md: Ditto.
28684 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28687 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
28688 and constraint for operand 0.
28689 (add_vec_concat_subst_be): Likewise.
28691 2023-05-23 Richard Biener <rguenther@suse.de>
28693 PR tree-optimization/109849
28694 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
28695 and use that to determine what to hoist.
28697 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
28699 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
28700 specific treatment for bit-fields only if they have an integral type
28701 and filter out non-integral bit-fields that do not start and end on
28704 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
28706 PR tree-optimization/109920
28707 * value-range.h (RESIZABLE>::~int_range): Use delete[].
28709 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
28711 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
28712 calcuation of integer vector mode costs to reflect generated
28713 instruction sequences of different integer vector modes and
28714 different target ABIs. Remove "speed" function argument.
28715 (ix86_rtx_costs): Update call for removed function argument.
28716 (ix86_vector_costs::add_stmt_cost): Ditto.
28718 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
28720 * value-range.h (class Value_Range): Implement set_zero,
28721 set_nonzero, and nonzero_p.
28723 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
28725 * config/i386/i386.cc (ix86_multiplication_cost): Add
28726 the cost of a memory read to the cost of V?QImode sequences.
28728 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28730 * config/riscv/riscv-v.cc: Add "m_" prefix.
28732 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28734 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
28735 multiple-rgroup of length.
28736 * tree-vect-stmts.cc (vectorizable_store): Ditto.
28737 (vectorizable_load): Ditto.
28738 * tree-vectorizer.h (vect_get_loop_len): Ditto.
28740 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28742 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
28745 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
28747 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
28748 handling for the case index == count.
28750 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
28753 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
28754 Don't fold to XOR / AND / XOR if just one bit is copied to the
28757 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
28759 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
28760 builtin for bit reversal using brev instruction.
28761 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
28762 NVPTX_BUILTIN_BREVLL.
28763 (nvptx_init_builtins): Define "brev" and "brevll".
28764 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
28765 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
28766 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
28767 section, document __builtin_nvptx_brev{,ll}.
28769 2023-05-21 Jakub Jelinek <jakub@redhat.com>
28771 PR tree-optimization/109505
28772 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
28773 Combine successive equal operations with constants,
28774 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
28775 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
28778 2023-05-21 Andrew Pinski <apinski@marvell.com>
28780 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
28782 2023-05-21 Pan Li <pan2.li@intel.com>
28784 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
28785 rest bool size, aka 2, 4, 8, 16, 32, 64.
28786 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
28787 Register vbool[2|4|8|16|32|64] interpret function.
28788 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
28789 New macro for vbool2_t.
28790 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
28791 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
28792 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
28793 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
28794 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
28795 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
28796 (vint16m1_t): Likewise.
28797 (vint32m1_t): Likewise.
28798 (vint64m1_t): Likewise.
28799 (vuint8m1_t): Likewise.
28800 (vuint16m1_t): Likewise.
28801 (vuint32m1_t): Likewise.
28802 (vuint64m1_t): Likewise.
28803 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
28804 New macro for vbool2_t.
28805 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
28806 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
28807 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
28808 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
28809 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
28810 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
28811 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
28812 vbool2_t interprect to base type.
28813 (bool4_interpret): Likewise.
28814 (bool8_interpret): Likewise.
28815 (bool16_interpret): Likewise.
28816 (bool32_interpret): Likewise.
28817 (bool64_interpret): Likewise.
28819 2023-05-21 Andrew Pinski <apinski@marvell.com>
28821 PR middle-end/109919
28822 * expr.cc (expand_single_bit_test): Don't use the
28823 target for expand_expr.
28825 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
28827 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
28830 2023-05-20 Pan Li <pan2.li@intel.com>
28832 * mode-switching.cc (entity_map): Initialize the array to zero.
28835 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
28838 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
28839 Remove superfluous "parallel" in insn pattern.
28840 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
28841 printing error text to assembly.
28843 2023-05-20 Andrew Pinski <apinski@marvell.com>
28845 * expr.cc (fold_single_bit_test): Rename to ...
28846 (expand_single_bit_test): This and expand directly.
28847 (do_store_flag): Update for the rename function.
28849 2023-05-20 Andrew Pinski <apinski@marvell.com>
28851 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
28852 instead of shift/and.
28854 2023-05-20 Andrew Pinski <apinski@marvell.com>
28856 * expr.cc (fold_single_bit_test): Add an assert
28857 and simplify based on code being NE_EXPR or EQ_EXPR.
28859 2023-05-20 Andrew Pinski <apinski@marvell.com>
28861 * expr.cc (fold_single_bit_test): Take inner and bitnum
28862 instead of arg0 and arg1. Update the code.
28863 (do_store_flag): Don't create a tree when calling
28864 fold_single_bit_test instead just call it with the bitnum
28865 and the inner tree.
28867 2023-05-20 Andrew Pinski <apinski@marvell.com>
28869 * expr.cc (fold_single_bit_test): Use get_def_for_expr
28870 instead of checking the inner's code.
28872 2023-05-20 Andrew Pinski <apinski@marvell.com>
28874 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
28875 (fold_single_bit_test): This and simplify.
28877 2023-05-20 Andrew Pinski <apinski@marvell.com>
28879 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
28881 (fold_single_bit_test): Likewise.
28882 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
28883 (fold_single_bit_test): Likewise and make static.
28884 * fold-const.h (fold_single_bit_test): Remove declaration.
28886 2023-05-20 Die Li <lidie@eswincomputing.com>
28888 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
28891 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
28893 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
28895 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
28898 * config/riscv/bitmanip.md
28899 (<bitmanip_optab>disi2): Match with any_extend.
28900 (<bitmanip_optab>disi2_sext): New pattern to match
28901 with sign extend using an ANDI instruction.
28903 2023-05-19 Nathan Sidwell <nathan@acm.org>
28906 * opts.h (handle_deferred_dump_options): Declare.
28907 * opts-global.cc (handle_common_deferred_options): Do not handle
28909 (handle_deferred_dump_options): New.
28910 * toplev.cc (toplev::main): Call it after plugin init.
28912 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
28914 * config/riscv/constraints.md (DsS, DsD): Restore agreement
28915 with shiftm1 mode attribute.
28917 2023-05-19 Andrew Pinski <apinski@marvell.com>
28920 * gcc.cc (default_compilers["@c-header"]): Add %w
28921 after the --output-pch.
28923 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
28925 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
28926 to hival, ASHIFT the corresponding regs.
28928 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
28930 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
28932 2023-05-19 Jakub Jelinek <jakub@redhat.com>
28934 PR tree-optimization/105776
28935 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
28936 non-NULL, allow division statement to have a cast as single imm use
28937 rather than comparison/condition.
28938 (match_arith_overflow): In that case remove the cast stmt in addition
28939 to the division statement.
28941 2023-05-19 Jakub Jelinek <jakub@redhat.com>
28943 PR tree-optimization/101856
28944 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
28945 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
28946 support it but umul_highpart_optab does.
28948 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
28950 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
28951 of tree_to_shwi on array indices. Minor tweaks.
28953 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
28955 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
28956 * attribs.cc (diag_attr_exclusions): Ditto.
28957 (decl_attributes): Ditto.
28958 (build_type_attribute_qual_variant): Ditto.
28959 * builtins.cc (fold_builtin_carg): Ditto.
28960 (fold_builtin_next_arg): Ditto.
28961 (do_mpc_arg2): Ditto.
28962 * cfgexpand.cc (expand_return): Ditto.
28963 * cgraph.h (decl_in_symtab_p): Ditto.
28964 (symtab_node::get_create): Ditto.
28965 * dwarf2out.cc (base_type_die): Ditto.
28966 (implicit_ptr_descriptor): Ditto.
28967 (gen_array_type_die): Ditto.
28968 (gen_type_die_with_usage): Ditto.
28969 (optimize_location_into_implicit_ptr): Ditto.
28970 * expr.cc (do_store_flag): Ditto.
28971 * fold-const.cc (negate_expr_p): Ditto.
28972 (fold_negate_expr_1): Ditto.
28973 (fold_convert_const): Ditto.
28974 (fold_convert_loc): Ditto.
28975 (constant_boolean_node): Ditto.
28976 (fold_binary_op_with_conditional_arg): Ditto.
28977 (build_fold_addr_expr_with_type_loc): Ditto.
28978 (fold_comparison): Ditto.
28979 (fold_checksum_tree): Ditto.
28980 (tree_unary_nonnegative_warnv_p): Ditto.
28981 (integer_valued_real_unary_p): Ditto.
28982 (fold_read_from_constant_string): Ditto.
28983 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
28984 * gimple-expr.cc (useless_type_conversion_p): Ditto.
28985 (is_gimple_reg): Ditto.
28986 (is_gimple_asm_val): Ditto.
28987 (mark_addressable): Ditto.
28988 * gimple-expr.h (is_gimple_variable): Ditto.
28989 (virtual_operand_p): Ditto.
28990 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
28991 * gimplify.cc (gimplify_bind_expr): Ditto.
28992 (gimplify_return_expr): Ditto.
28993 (gimple_add_padding_init_for_auto_var): Ditto.
28994 (gimplify_addr_expr): Ditto.
28995 (omp_add_variable): Ditto.
28996 (omp_notice_variable): Ditto.
28997 (omp_get_base_pointer): Ditto.
28998 (omp_strip_components_and_deref): Ditto.
28999 (omp_strip_indirections): Ditto.
29000 (omp_accumulate_sibling_list): Ditto.
29001 (omp_build_struct_sibling_lists): Ditto.
29002 (gimplify_adjust_omp_clauses_1): Ditto.
29003 (gimplify_adjust_omp_clauses): Ditto.
29004 (gimplify_omp_for): Ditto.
29005 (goa_lhs_expr_p): Ditto.
29006 (gimplify_one_sizepos): Ditto.
29007 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
29008 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
29009 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
29010 (propagate_controlled_uses): Ditto.
29011 * ipa-sra.cc (type_prevails_p): Ditto.
29012 (scan_expr_access): Ditto.
29013 * optabs-tree.cc (optab_for_tree_code): Ditto.
29014 * toplev.cc (wrapup_global_declaration_1): Ditto.
29015 * trans-mem.cc (transaction_invariant_address_p): Ditto.
29016 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
29017 (verify_gimple_comparison): Ditto.
29018 (verify_gimple_assign_binary): Ditto.
29019 (verify_gimple_assign_single): Ditto.
29020 * tree-complex.cc (get_component_ssa_name): Ditto.
29021 * tree-emutls.cc (lower_emutls_2): Ditto.
29022 * tree-inline.cc (copy_tree_body_r): Ditto.
29023 (estimate_move_cost): Ditto.
29024 (copy_decl_for_dup_finish): Ditto.
29025 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
29026 (note_nonlocal_vla_type): Ditto.
29027 (convert_local_omp_clauses): Ditto.
29028 (remap_vla_decls): Ditto.
29029 (fixup_vla_decls): Ditto.
29030 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
29031 * tree-pretty-print.cc (print_declaration): Ditto.
29032 (print_call_name): Ditto.
29033 * tree-sra.cc (compare_access_positions): Ditto.
29034 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
29035 * tree-ssa-ccp.cc (get_default_value): Ditto.
29036 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
29037 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
29038 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
29039 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
29040 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
29041 * tree-ssa-sink.cc (statement_sink_location): Ditto.
29042 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
29043 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
29044 * tree-ssa-uninit.cc (warn_uninit): Ditto.
29045 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
29046 (non_rewritable_mem_ref_base): Ditto.
29047 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
29048 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
29049 * tree-vect-generic.cc (do_binop): Ditto.
29051 * tree-vect-stmts.cc (vect_init_vector): Ditto.
29052 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
29053 * tree.cc (sign_mask_for): Ditto.
29054 (verify_type_variant): Ditto.
29055 (gimple_canonical_types_compatible_p): Ditto.
29056 (verify_type): Ditto.
29057 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
29058 * var-tracking.cc (prepare_call_arguments): Ditto.
29059 (vt_add_function_parameters): Ditto.
29060 * varasm.cc (decode_addr_const): Ditto.
29062 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
29064 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
29065 (lower_reduction_clauses): Ditto.
29066 (lower_send_clauses): Ditto.
29067 (lower_omp_task_reductions): Ditto.
29068 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
29069 (worker_single_copy): Ditto.
29070 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
29071 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
29073 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
29075 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
29077 (lto_read_body_or_constructor): Ditto.
29078 * lto-streamer-out.cc (tree_is_indexable): Ditto.
29079 (lto_output_var_decl_ref): Ditto.
29080 (DFS::DFS_write_tree_body): Ditto.
29081 (wrap_refs): Ditto.
29082 (write_symbol_extension_info): Ditto.
29084 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
29086 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
29087 defines from tree.h.
29088 (aarch64_mangle_type): Ditto.
29089 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
29090 (alpha_gimplify_va_arg_1): Ditto.
29091 * config/arc/arc.cc (arc_encode_section_info): Ditto.
29092 (arc_is_aux_reg_p): Ditto.
29093 (arc_is_uncached_mem_p): Ditto.
29094 (arc_handle_aux_attribute): Ditto.
29095 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
29096 (arm_handle_cmse_nonsecure_call): Ditto.
29097 (arm_set_default_type_attributes): Ditto.
29098 (arm_is_segment_info_known): Ditto.
29099 (arm_mangle_type): Ditto.
29100 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
29101 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
29102 (avr_decl_absdata_p): Ditto.
29103 (avr_insert_attributes): Ditto.
29104 (avr_section_type_flags): Ditto.
29105 (avr_encode_section_info): Ditto.
29106 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
29107 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
29108 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
29109 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
29110 (csky_mangle_type): Ditto.
29111 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
29112 * config/darwin.cc (is_objc_metadata): Ditto.
29113 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
29114 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
29115 * config/frv/frv.cc (frv_emit_movsi): Ditto.
29116 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
29117 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
29118 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
29119 * config/i386/i386-expand.cc: Ditto.
29120 * config/i386/i386.cc (type_natural_mode): Ditto.
29121 (ix86_function_arg): Ditto.
29122 (ix86_data_alignment): Ditto.
29123 (ix86_local_alignment): Ditto.
29124 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
29125 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
29126 (i386_pe_type_dllexport_p): Ditto.
29127 (i386_pe_adjust_class_at_definition): Ditto.
29128 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
29129 (i386_pe_binds_local_p): Ditto.
29130 (i386_pe_section_type_flags): Ditto.
29131 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
29132 (ia64_gimplify_va_arg): Ditto.
29133 (ia64_in_small_data_p): Ditto.
29134 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
29135 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
29136 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
29137 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
29138 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
29139 (mcore_encode_section_info): Ditto.
29140 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
29141 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
29142 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
29143 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
29144 (pass_in_memory): Ditto.
29145 (nvptx_generate_vector_shuffle): Ditto.
29146 (nvptx_lockless_update): Ditto.
29147 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
29148 (pa_function_value): Ditto.
29149 (pa_function_arg): Ditto.
29150 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
29151 (TEXT_SPACE_P): Ditto.
29152 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
29153 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
29154 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
29155 (riscv_mangle_type): Ditto.
29156 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
29157 (rl78_addsi3_internal): Ditto.
29158 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
29159 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
29160 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
29161 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
29162 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
29163 (rs6000_function_arg_advance_1): Ditto.
29164 (rs6000_function_arg): Ditto.
29165 (rs6000_pass_by_reference): Ditto.
29166 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
29167 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
29168 (rs6000_set_default_type_attributes): Ditto.
29169 (rs6000_elf_in_small_data_p): Ditto.
29170 (IN_NAMED_SECTION): Ditto.
29171 (rs6000_xcoff_encode_section_info): Ditto.
29172 (rs6000_function_value): Ditto.
29173 (invalid_arg_for_unprototyped_fn): Ditto.
29174 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
29175 (s390_vec_n_elem): Ditto.
29176 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
29177 (s390_function_arg_integer): Ditto.
29178 (s390_return_in_memory): Ditto.
29179 (s390_encode_section_info): Ditto.
29180 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
29181 (sh_function_value): Ditto.
29182 * config/sol2.cc (solaris_insert_attributes): Ditto.
29183 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
29184 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
29185 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
29186 (xstormy16_handle_below100_attribute): Ditto.
29187 * config/v850/v850.cc (v850_encode_section_info): Ditto.
29188 (v850_insert_attributes): Ditto.
29189 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
29190 (visium_return_in_memory): Ditto.
29191 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
29193 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
29195 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
29196 (ix86_expand_vecop_qihi): Add op2vec bool variable.
29197 Do not set REG_EQUAL note.
29198 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
29200 * config/i386/i386.cc (ix86_multiplication_cost): Handle
29201 V4QImode and V8QImode.
29202 * config/i386/mmx.md (mulv8qi3): New expander.
29204 * config/i386/sse.md (mulv8qi3): Remove.
29206 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
29208 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
29210 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
29212 PR bootstrap/105831
29213 * config.gcc: Use = operator instead of ==.
29215 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
29217 PR bootstrap/105831
29218 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
29219 * configure.ac: Likewise.
29220 * configure: Regenerate.
29222 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
29224 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
29225 (__ARM_mve_coerce1): Remove.
29226 (__ARM_mve_coerce2): Remove.
29227 (__ARM_mve_coerce3): Remove.
29228 (__ARM_mve_coerce_i_scalar): New.
29229 (__ARM_mve_coerce_s8_ptr): New.
29230 (__ARM_mve_coerce_u8_ptr): New.
29231 (__ARM_mve_coerce_s16_ptr): New.
29232 (__ARM_mve_coerce_u16_ptr): New.
29233 (__ARM_mve_coerce_s32_ptr): New.
29234 (__ARM_mve_coerce_u32_ptr): New.
29235 (__ARM_mve_coerce_s64_ptr): New.
29236 (__ARM_mve_coerce_u64_ptr): New.
29237 (__ARM_mve_coerce_f_scalar): New.
29238 (__ARM_mve_coerce_f16_ptr): New.
29239 (__ARM_mve_coerce_f32_ptr): New.
29240 (__arm_vst4q): Change _coerce_ overloads.
29241 (__arm_vbicq): Change _coerce_ overloads.
29242 (__arm_vld1q): Change _coerce_ overloads.
29243 (__arm_vld1q_z): Change _coerce_ overloads.
29244 (__arm_vld2q): Change _coerce_ overloads.
29245 (__arm_vld4q): Change _coerce_ overloads.
29246 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
29247 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
29248 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
29249 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
29250 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
29251 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
29252 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
29253 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
29254 (__arm_vst1q_p): Change _coerce_ overloads.
29255 (__arm_vst2q): Change _coerce_ overloads.
29256 (__arm_vst1q): Change _coerce_ overloads.
29257 (__arm_vstrhq): Change _coerce_ overloads.
29258 (__arm_vstrhq_p): Change _coerce_ overloads.
29259 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
29260 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
29261 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
29262 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
29263 (__arm_vstrwq_p): Change _coerce_ overloads.
29264 (__arm_vstrwq): Change _coerce_ overloads.
29265 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
29266 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
29267 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
29268 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
29269 (__arm_vsetq_lane): Change _coerce_ overloads.
29270 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
29271 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
29272 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
29273 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
29274 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
29275 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
29276 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
29277 (__arm_vidupq_x_u8): Change _coerce_ overloads.
29278 (__arm_vddupq_x_u8): Change _coerce_ overloads.
29279 (__arm_vidupq_x_u16): Change _coerce_ overloads.
29280 (__arm_vddupq_x_u16): Change _coerce_ overloads.
29281 (__arm_vidupq_x_u32): Change _coerce_ overloads.
29282 (__arm_vddupq_x_u32): Change _coerce_ overloads.
29283 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
29284 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
29285 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
29286 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
29287 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
29288 (__arm_vidupq_u16): Change _coerce_ overloads.
29289 (__arm_vidupq_u32): Change _coerce_ overloads.
29290 (__arm_vidupq_u8): Change _coerce_ overloads.
29291 (__arm_vddupq_u16): Change _coerce_ overloads.
29292 (__arm_vddupq_u32): Change _coerce_ overloads.
29293 (__arm_vddupq_u8): Change _coerce_ overloads.
29294 (__arm_viwdupq_m): Change _coerce_ overloads.
29295 (__arm_viwdupq_u16): Change _coerce_ overloads.
29296 (__arm_viwdupq_u32): Change _coerce_ overloads.
29297 (__arm_viwdupq_u8): Change _coerce_ overloads.
29298 (__arm_vdwdupq_m): Change _coerce_ overloads.
29299 (__arm_vdwdupq_u16): Change _coerce_ overloads.
29300 (__arm_vdwdupq_u32): Change _coerce_ overloads.
29301 (__arm_vdwdupq_u8): Change _coerce_ overloads.
29302 (__arm_vstrbq): Change _coerce_ overloads.
29303 (__arm_vstrbq_p): Change _coerce_ overloads.
29304 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
29305 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
29306 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
29307 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
29308 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
29310 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
29312 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
29315 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
29317 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
29318 (__arm_vadcq_u32): Likewise.
29319 (__arm_vadcq_m_s32): Likewise.
29320 (__arm_vadcq_m_u32): Likewise.
29321 (__arm_vsbcq_s32): Likewise.
29322 (__arm_vsbcq_u32): Likewise.
29323 (__arm_vsbcq_m_s32): Likewise.
29324 (__arm_vsbcq_m_u32): Likewise.
29325 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
29327 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
29329 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
29330 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
29331 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
29332 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
29333 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
29334 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
29335 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
29336 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
29337 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
29338 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
29339 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
29340 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
29341 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
29342 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
29343 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
29344 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
29345 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
29346 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
29347 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
29348 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
29349 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
29350 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
29351 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
29352 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
29353 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
29354 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
29355 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
29356 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
29357 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
29358 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
29359 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
29360 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
29361 (mve_vorrq_m_f<mode>)
29362 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
29363 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
29364 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
29365 capitalization in the emitted asm.
29367 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
29369 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
29371 (Ri): Move constraint definition from predicates.md.
29372 (Rl): Define new constraint.
29373 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
29374 missing constraint.
29375 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
29376 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
29377 op 2. Fix asm output spacing.
29378 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
29379 * config/arm/predicates.md (Ri) Move constraint to constraints.md
29380 (mve_vldrd_immediate): Move it from
29382 (mve_vstrw_immediate): New predicate.
29384 2023-05-18 Pan Li <pan2.li@intel.com>
29385 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29386 Kito Cheng <kito.cheng@sifive.com>
29387 Richard Biener <rguenther@suse.de>
29388 Richard Sandiford <richard.sandiford@arm.com>
29390 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
29391 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
29392 (struct table_elt): Extend machine_mode to 16 bits.
29393 (struct set): Ditto.
29394 * genmodes.cc (emit_mode_wider): Extend type from char to short.
29395 (emit_mode_complex): Ditto.
29396 (emit_mode_inner): Ditto.
29397 (emit_class_narrowest_mode): Ditto.
29398 * genopinit.cc (main): Extend the machine_mode limit.
29399 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
29400 re-ordered the struct fields for padding.
29401 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
29402 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
29403 (get_mode_alignment): Extend type from char to short.
29404 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
29405 removed the ATTRIBUTE_PACKED.
29406 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
29407 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
29408 m_kind to 2 bits and remove m_spare.
29409 * rtl.h (RTX_CODE_BITSIZE): New macro.
29410 (struct rtx_def): Swap both the bit size and location between the
29411 rtx_code and the machine_mode.
29412 (subreg_shape::unique_id): Extend the machine_mode limit.
29413 * rtlanal.h: Extend machine_mode to 16 bits.
29414 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
29415 bits and re-ordered the struct fields for padding.
29416 (struct tree_decl_common): Extend machine_mode to 16 bits.
29418 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
29420 * genrecog.cc (print_nonbool_test): Fix type error of
29421 switch (SUBREG_BYTE (op))'.
29423 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
29425 * common/config/riscv/riscv-common.cc: Remove
29426 trailing spaces on lines.
29427 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
29428 * config/riscv/riscv.h (enum reg_class): Likewise.
29429 * config/riscv/riscv.md: Likewise.
29431 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
29433 * config/pa/pa.md (clear_cache): New.
29435 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
29437 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
29438 parenthesis. Fix misnamed index entry.
29439 <concept>: Fix misnamed index entry.
29441 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
29443 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
29445 (*<optab>si3_mask, *<optab>di3_mask): Here.
29446 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
29447 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
29449 (*<bitmanip_optab>si3_sext_mask): Likewise.
29450 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
29451 and const_di_mask_operand.
29452 (bitmanip_rotate): New iterator.
29453 (bitmanip_optab): Add rotates.
29454 * config/riscv/predicates.md (const_si_mask_operand): Renamed
29455 from const31_operand. Generalize to handle more mask constants.
29456 (const_di_mask_operand): Similarly.
29458 2023-05-17 Jakub Jelinek <jakub@redhat.com>
29461 * config/i386/i386-builtin-types.def (FLOAT128): Use
29462 float128t_type_node rather than float128_type_node.
29464 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
29466 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
29467 FP_CONTRACT_FAST (no functional change).
29469 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
29471 * config/i386/i386.cc (ix86_multiplication_cost): Correct
29472 calcuation of integer vector mode costs to reflect generated
29473 instruction sequences of different integer vector modes and
29474 different target ABIs.
29476 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29478 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
29479 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
29480 (riscv_mode_needed): Ditto.
29481 (riscv_mode_after): Ditto.
29482 (riscv_mode_entry): Ditto.
29483 (riscv_mode_exit): Ditto.
29484 (riscv_mode_priority): Ditto.
29485 (TARGET_MODE_EMIT): New target hook.
29486 (TARGET_MODE_NEEDED): Ditto.
29487 (TARGET_MODE_AFTER): Ditto.
29488 (TARGET_MODE_ENTRY): Ditto.
29489 (TARGET_MODE_EXIT): Ditto.
29490 (TARGET_MODE_PRIORITY): Ditto.
29491 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
29492 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
29493 * config/riscv/riscv.md: Add csrwvxrm.
29494 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
29495 (vxrmsi): New pattern.
29497 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29499 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
29500 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
29501 (struct narrow_alu_def): Ditto.
29502 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
29503 (function_expander::use_exact_insn): Ditto.
29504 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
29505 (function_base::has_rounding_mode_operand_p): New function.
29507 2023-05-17 Andrew Pinski <apinski@marvell.com>
29509 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
29510 against 0 instead of calling integer_zerop.
29512 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29514 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
29515 (DEF_RVV_VXRM_ENUM): New macro.
29516 (handle_pragma_vector): Add vxrm enum register.
29517 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
29523 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
29525 * value-range.h (Value_Range::operator=): New.
29527 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
29529 * value-range.cc (vrange::operator=): Add a stub to copy
29530 unsupported ranges.
29531 * value-range.h (is_a <unsupported_range>): New.
29532 (Value_Range::operator=): Support copying unsupported ranges.
29534 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
29536 * data-streamer-in.cc (streamer_read_real_value): New.
29537 (streamer_read_value_range): New.
29538 * data-streamer-out.cc (streamer_write_real_value): New.
29539 (streamer_write_vrange): New.
29540 * data-streamer.h (streamer_write_vrange): New.
29541 (streamer_read_value_range): New.
29543 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
29546 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
29547 is ignored for a fixed underlying type.
29548 (C++ Dialect Options): Likewise for -fstrict-enums.
29550 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
29552 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
29555 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29557 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
29559 (s390_atomic_align_for_mode): New.
29561 2023-05-17 Jakub Jelinek <jakub@redhat.com>
29563 * wide-int.cc (wi::from_array): Add missing closing paren in function
29566 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
29568 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
29569 suggested unroll factor once the previous analysis fails.
29571 2023-05-17 Pan Li <pan2.li@intel.com>
29573 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
29575 (main): Add bool1 to the type indexer.
29576 * config/riscv/riscv-vector-builtins-functions.def
29577 (vreinterpret): Register vbool1 interpret function.
29578 * config/riscv/riscv-vector-builtins-types.def
29579 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
29580 (vint8m1_t): Add the type to bool1_interpret_ops.
29581 (vint16m1_t): Ditto.
29582 (vint32m1_t): Ditto.
29583 (vint64m1_t): Ditto.
29584 (vuint8m1_t): Ditto.
29585 (vuint16m1_t): Ditto.
29586 (vuint32m1_t): Ditto.
29587 (vuint64m1_t): Ditto.
29588 * config/riscv/riscv-vector-builtins.cc
29589 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
29590 (required_extensions_p): Add bool1 interpret case.
29591 * config/riscv/riscv-vector-builtins.def
29592 (bool1_interpret): Add bool1 interpret to base type.
29593 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
29594 with VB dest for vreinterpret.
29596 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
29599 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
29600 constants through "lis; xoris".
29602 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
29604 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
29605 default rs6000 target pass for O2 and above.
29606 * doc/invoke.texi: Document -free
29608 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
29610 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
29611 Fix wrong select_kind...
29613 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29615 * config/s390/s390-protos.h (s390_expand_setmem): Change
29616 function signature.
29617 * config/s390/s390.cc (s390_expand_setmem): For memset's less
29618 than or equal to 256 byte do not perform a libc call.
29619 * config/s390/s390.md: Change expander into a version which
29622 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29624 * config/s390/s390-protos.h (s390_expand_movmem): New.
29625 * config/s390/s390.cc (s390_expand_movmem): New.
29626 * config/s390/s390.md (movmem<mode>): New.
29630 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29632 * config/s390/s390-protos.h (s390_expand_cpymem): Change
29633 function signature.
29634 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
29635 than or equal to 256 byte do not perform a libc call.
29636 (s390_expand_insv): Adapt new function signature of
29637 s390_expand_cpymem.
29638 * config/s390/s390.md: Change expander into a version which
29641 2023-05-16 Andrew Pinski <apinski@marvell.com>
29643 PR tree-optimization/109424
29644 * match.pd: Add patterns for min/max of zero_one_valued
29647 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29649 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
29650 * config/riscv/riscv-vector-builtins.cc
29651 (function_expander::use_ternop_insn): Add default rounding mode.
29652 (function_expander::use_widen_ternop_insn): Ditto.
29653 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
29654 (riscv_hard_regno_mode_ok): Ditto.
29655 (riscv_conditional_register_usage): Ditto.
29656 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
29657 (FRM_REG_P): Ditto.
29658 (RISCV_DWARF_FRM): Ditto.
29659 * config/riscv/riscv.md: Ditto.
29660 * config/riscv/vector-iterators.md: split no frm and has frm operations.
29661 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
29662 (@pred_<optab><mode>): Ditto.
29664 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
29666 PR tree-optimization/109695
29667 * value-range.cc (irange::operator=): Resize range.
29668 (irange::union_): Same.
29669 (irange::intersect): Same.
29670 (irange::invert): Same.
29671 (int_range_max): Default to 3 sub-ranges and resize as needed.
29672 * value-range.h (irange::maybe_resize): New.
29674 (int_range::int_range): Adjust for resizing.
29675 (int_range::operator=): Same.
29677 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
29679 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
29681 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
29682 when range changed.
29684 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29686 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
29687 * config/riscv/riscv-vector-builtins.cc
29688 (function_expander::use_exact_insn): Add default rounding mode operand.
29689 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
29690 (riscv_hard_regno_mode_ok): Ditto.
29691 (riscv_conditional_register_usage): Ditto.
29692 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
29693 (VXRM_REG_P): Ditto.
29694 (RISCV_DWARF_VXRM): Ditto.
29695 * config/riscv/riscv.md: Ditto.
29696 * config/riscv/vector.md: Ditto
29698 2023-05-15 Pan Li <pan2.li@intel.com>
29700 * optabs.cc (maybe_gen_insn): Add case to generate instruction
29701 that has 11 operands.
29703 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29705 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
29706 logic for vector modes.
29708 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29711 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
29712 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
29713 (aarch64_cmtst<mode>): Rename to...
29714 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
29715 (*aarch64_cmtst_same_<mode>): Rename to...
29716 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
29717 (*aarch64_cmtstdi): Rename to...
29718 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
29719 (aarch64_fac<optab><mode>): Rename to...
29720 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
29722 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29725 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
29726 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
29728 2023-05-15 Pan Li <pan2.li@intel.com>
29729 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29730 kito-cheng <kito.cheng@sifive.com>
29732 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
29733 deciding the mode is constant or not.
29734 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
29736 2023-05-15 Richard Biener <rguenther@suse.de>
29738 PR tree-optimization/109848
29739 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
29740 TARGET_MEM_REF address preparation before the store, not
29743 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29745 * config/riscv/riscv.cc
29746 (riscv_vectorize_preferred_vector_alignment): New function.
29747 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
29749 2023-05-14 Andrew Pinski <apinski@marvell.com>
29751 PR tree-optimization/109829
29752 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
29754 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
29757 * config/i386/i386.cc: Revert the 2023-05-11 change.
29758 (ix86_widen_mult_cost): Return high value instead of
29759 ICEing for unsupported modes.
29761 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
29763 * config/i386/i386.cc (x86_function_profiler): Take
29764 ix86_direct_extern_access into account when generating calls
29767 2023-05-14 Pan Li <pan2.li@intel.com>
29769 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
29770 Refactor the or pattern to switch cases.
29772 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29774 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
29775 aarch64_expand_vector_init to this, and remove interleaving case.
29776 Recursively call aarch64_expand_vector_init_fallback, instead of
29777 aarch64_expand_vector_init.
29778 (aarch64_unzip_vector_init): New function.
29779 (aarch64_expand_vector_init): Likewise.
29781 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
29783 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
29784 Pull out function call from the gcc_assert.
29786 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
29788 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
29789 (policy_to_str): New.
29790 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
29792 2023-05-13 Andrew Pinski <apinski@marvell.com>
29794 PR tree-optimization/109834
29795 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
29796 (popcount(rotate(x,y))->popcount(x)): Likewise.
29798 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
29800 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
29801 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
29802 gen_extend_insn to generate zero/sign extension instructions.
29804 (ix86_expand_vecop_qihi): Initialize interleave functions
29805 for MULT code only. Fix comments.
29807 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
29810 * config/i386/mmx.md (mulv2si3): Remove expander.
29811 (mulv2si3): Rename insn pattern from *mulv2si.
29813 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
29815 PR libstdc++/109816
29816 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
29817 '!lto_stream_offload_p'.
29819 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
29820 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29823 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
29824 (local_avl_compatible_p): New.
29825 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
29826 for LCM, rewrite as a backward algorithm.
29827 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
29828 interface, handle a BB at once.
29830 2023-05-12 Richard Biener <rguenther@suse.de>
29832 PR tree-optimization/64731
29833 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
29834 handle TARGET_MEM_REF destinations of stores from vector
29837 2023-05-12 Richard Biener <rguenther@suse.de>
29839 PR tree-optimization/109791
29840 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
29842 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
29845 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29847 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
29848 * config/arm/arm-mve-builtins-base.def (vsriq): New.
29849 * config/arm/arm-mve-builtins-base.h (vsriq): New.
29850 * config/arm/arm-mve-builtins.cc
29851 (function_instance::has_inactive_argument): Handle vsriq.
29852 * config/arm/arm_mve.h (vsriq): Remove.
29854 (vsriq_n_u8): Remove.
29855 (vsriq_n_s8): Remove.
29856 (vsriq_n_u16): Remove.
29857 (vsriq_n_s16): Remove.
29858 (vsriq_n_u32): Remove.
29859 (vsriq_n_s32): Remove.
29860 (vsriq_m_n_s8): Remove.
29861 (vsriq_m_n_u8): Remove.
29862 (vsriq_m_n_s16): Remove.
29863 (vsriq_m_n_u16): Remove.
29864 (vsriq_m_n_s32): Remove.
29865 (vsriq_m_n_u32): Remove.
29866 (__arm_vsriq_n_u8): Remove.
29867 (__arm_vsriq_n_s8): Remove.
29868 (__arm_vsriq_n_u16): Remove.
29869 (__arm_vsriq_n_s16): Remove.
29870 (__arm_vsriq_n_u32): Remove.
29871 (__arm_vsriq_n_s32): Remove.
29872 (__arm_vsriq_m_n_s8): Remove.
29873 (__arm_vsriq_m_n_u8): Remove.
29874 (__arm_vsriq_m_n_s16): Remove.
29875 (__arm_vsriq_m_n_u16): Remove.
29876 (__arm_vsriq_m_n_s32): Remove.
29877 (__arm_vsriq_m_n_u32): Remove.
29878 (__arm_vsriq): Remove.
29879 (__arm_vsriq_m): Remove.
29881 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29883 * config/arm/iterators.md (mve_insn): Add vsri.
29884 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
29885 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
29886 (mve_vsriq_m_n_<supf><mode>): Rename into ...
29887 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29889 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29891 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
29892 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
29894 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29896 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
29897 * config/arm/arm-mve-builtins-base.def (vsliq): New.
29898 * config/arm/arm-mve-builtins-base.h (vsliq): New.
29899 * config/arm/arm-mve-builtins.cc
29900 (function_instance::has_inactive_argument): Handle vsliq.
29901 * config/arm/arm_mve.h (vsliq): Remove.
29903 (vsliq_n_u8): Remove.
29904 (vsliq_n_s8): Remove.
29905 (vsliq_n_u16): Remove.
29906 (vsliq_n_s16): Remove.
29907 (vsliq_n_u32): Remove.
29908 (vsliq_n_s32): Remove.
29909 (vsliq_m_n_s8): Remove.
29910 (vsliq_m_n_s32): Remove.
29911 (vsliq_m_n_s16): Remove.
29912 (vsliq_m_n_u8): Remove.
29913 (vsliq_m_n_u32): Remove.
29914 (vsliq_m_n_u16): Remove.
29915 (__arm_vsliq_n_u8): Remove.
29916 (__arm_vsliq_n_s8): Remove.
29917 (__arm_vsliq_n_u16): Remove.
29918 (__arm_vsliq_n_s16): Remove.
29919 (__arm_vsliq_n_u32): Remove.
29920 (__arm_vsliq_n_s32): Remove.
29921 (__arm_vsliq_m_n_s8): Remove.
29922 (__arm_vsliq_m_n_s32): Remove.
29923 (__arm_vsliq_m_n_s16): Remove.
29924 (__arm_vsliq_m_n_u8): Remove.
29925 (__arm_vsliq_m_n_u32): Remove.
29926 (__arm_vsliq_m_n_u16): Remove.
29927 (__arm_vsliq): Remove.
29928 (__arm_vsliq_m): Remove.
29930 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29932 * config/arm/iterators.md (mve_insn>): Add vsli.
29933 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
29934 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29935 (mve_vsliq_m_n_<supf><mode>): Rename into ...
29936 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29938 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29940 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
29941 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
29943 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29945 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
29946 * config/arm/arm-mve-builtins-base.def (vpselq): New.
29947 * config/arm/arm-mve-builtins-base.h (vpselq): New.
29948 * config/arm/arm_mve.h (vpselq): Remove.
29949 (vpselq_u8): Remove.
29950 (vpselq_s8): Remove.
29951 (vpselq_u16): Remove.
29952 (vpselq_s16): Remove.
29953 (vpselq_u32): Remove.
29954 (vpselq_s32): Remove.
29955 (vpselq_u64): Remove.
29956 (vpselq_s64): Remove.
29957 (vpselq_f16): Remove.
29958 (vpselq_f32): Remove.
29959 (__arm_vpselq_u8): Remove.
29960 (__arm_vpselq_s8): Remove.
29961 (__arm_vpselq_u16): Remove.
29962 (__arm_vpselq_s16): Remove.
29963 (__arm_vpselq_u32): Remove.
29964 (__arm_vpselq_s32): Remove.
29965 (__arm_vpselq_u64): Remove.
29966 (__arm_vpselq_s64): Remove.
29967 (__arm_vpselq_f16): Remove.
29968 (__arm_vpselq_f32): Remove.
29969 (__arm_vpselq): Remove.
29971 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29973 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
29974 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
29976 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29978 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
29980 * config/arm/iterators.md (MVE_VPSELQ_F): New.
29981 (mve_insn): Add vpsel.
29982 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
29983 (@mve_<mve_insn>q_<supf><mode>): ... this.
29984 (@mve_vpselq_f<mode>): Rename into ...
29985 (@mve_<mve_insn>q_f<mode>): ... this.
29987 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29989 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
29990 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
29991 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
29992 * config/arm/arm-mve-builtins.cc
29993 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
29995 * config/arm/arm_mve.h (vfmaq): Remove.
29999 (vfmasq_m): Remove.
30001 (vfmaq_f16): Remove.
30002 (vfmaq_n_f16): Remove.
30003 (vfmasq_n_f16): Remove.
30004 (vfmsq_f16): Remove.
30005 (vfmaq_f32): Remove.
30006 (vfmaq_n_f32): Remove.
30007 (vfmasq_n_f32): Remove.
30008 (vfmsq_f32): Remove.
30009 (vfmaq_m_f32): Remove.
30010 (vfmaq_m_f16): Remove.
30011 (vfmaq_m_n_f32): Remove.
30012 (vfmaq_m_n_f16): Remove.
30013 (vfmasq_m_n_f32): Remove.
30014 (vfmasq_m_n_f16): Remove.
30015 (vfmsq_m_f32): Remove.
30016 (vfmsq_m_f16): Remove.
30017 (__arm_vfmaq_f16): Remove.
30018 (__arm_vfmaq_n_f16): Remove.
30019 (__arm_vfmasq_n_f16): Remove.
30020 (__arm_vfmsq_f16): Remove.
30021 (__arm_vfmaq_f32): Remove.
30022 (__arm_vfmaq_n_f32): Remove.
30023 (__arm_vfmasq_n_f32): Remove.
30024 (__arm_vfmsq_f32): Remove.
30025 (__arm_vfmaq_m_f32): Remove.
30026 (__arm_vfmaq_m_f16): Remove.
30027 (__arm_vfmaq_m_n_f32): Remove.
30028 (__arm_vfmaq_m_n_f16): Remove.
30029 (__arm_vfmasq_m_n_f32): Remove.
30030 (__arm_vfmasq_m_n_f16): Remove.
30031 (__arm_vfmsq_m_f32): Remove.
30032 (__arm_vfmsq_m_f16): Remove.
30033 (__arm_vfmaq): Remove.
30034 (__arm_vfmasq): Remove.
30035 (__arm_vfmsq): Remove.
30036 (__arm_vfmaq_m): Remove.
30037 (__arm_vfmasq_m): Remove.
30038 (__arm_vfmsq_m): Remove.
30040 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30042 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
30044 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
30045 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
30046 (mve_insn): Add vfma, vfmas, vfms.
30047 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
30049 (@mve_<mve_insn>q_f<mode>): ... this.
30050 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
30051 (@mve_<mve_insn>q_n_f<mode>): ... this.
30052 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
30053 @mve_<mve_insn>q_m_f<mode>.
30054 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
30055 @mve_<mve_insn>q_m_n_f<mode>.
30057 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30059 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
30060 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
30062 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30064 * config/arm/arm-mve-builtins-base.cc
30065 (FUNCTION_WITH_RTX_M_N_NO_F): New.
30067 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
30068 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
30069 * config/arm/arm_mve.h (vmvnq): Remove.
30072 (vmvnq_s8): Remove.
30073 (vmvnq_s16): Remove.
30074 (vmvnq_s32): Remove.
30075 (vmvnq_n_s16): Remove.
30076 (vmvnq_n_s32): Remove.
30077 (vmvnq_u8): Remove.
30078 (vmvnq_u16): Remove.
30079 (vmvnq_u32): Remove.
30080 (vmvnq_n_u16): Remove.
30081 (vmvnq_n_u32): Remove.
30082 (vmvnq_m_u8): Remove.
30083 (vmvnq_m_s8): Remove.
30084 (vmvnq_m_u16): Remove.
30085 (vmvnq_m_s16): Remove.
30086 (vmvnq_m_u32): Remove.
30087 (vmvnq_m_s32): Remove.
30088 (vmvnq_m_n_s16): Remove.
30089 (vmvnq_m_n_u16): Remove.
30090 (vmvnq_m_n_s32): Remove.
30091 (vmvnq_m_n_u32): Remove.
30092 (vmvnq_x_s8): Remove.
30093 (vmvnq_x_s16): Remove.
30094 (vmvnq_x_s32): Remove.
30095 (vmvnq_x_u8): Remove.
30096 (vmvnq_x_u16): Remove.
30097 (vmvnq_x_u32): Remove.
30098 (vmvnq_x_n_s16): Remove.
30099 (vmvnq_x_n_s32): Remove.
30100 (vmvnq_x_n_u16): Remove.
30101 (vmvnq_x_n_u32): Remove.
30102 (__arm_vmvnq_s8): Remove.
30103 (__arm_vmvnq_s16): Remove.
30104 (__arm_vmvnq_s32): Remove.
30105 (__arm_vmvnq_n_s16): Remove.
30106 (__arm_vmvnq_n_s32): Remove.
30107 (__arm_vmvnq_u8): Remove.
30108 (__arm_vmvnq_u16): Remove.
30109 (__arm_vmvnq_u32): Remove.
30110 (__arm_vmvnq_n_u16): Remove.
30111 (__arm_vmvnq_n_u32): Remove.
30112 (__arm_vmvnq_m_u8): Remove.
30113 (__arm_vmvnq_m_s8): Remove.
30114 (__arm_vmvnq_m_u16): Remove.
30115 (__arm_vmvnq_m_s16): Remove.
30116 (__arm_vmvnq_m_u32): Remove.
30117 (__arm_vmvnq_m_s32): Remove.
30118 (__arm_vmvnq_m_n_s16): Remove.
30119 (__arm_vmvnq_m_n_u16): Remove.
30120 (__arm_vmvnq_m_n_s32): Remove.
30121 (__arm_vmvnq_m_n_u32): Remove.
30122 (__arm_vmvnq_x_s8): Remove.
30123 (__arm_vmvnq_x_s16): Remove.
30124 (__arm_vmvnq_x_s32): Remove.
30125 (__arm_vmvnq_x_u8): Remove.
30126 (__arm_vmvnq_x_u16): Remove.
30127 (__arm_vmvnq_x_u32): Remove.
30128 (__arm_vmvnq_x_n_s16): Remove.
30129 (__arm_vmvnq_x_n_s32): Remove.
30130 (__arm_vmvnq_x_n_u16): Remove.
30131 (__arm_vmvnq_x_n_u32): Remove.
30132 (__arm_vmvnq): Remove.
30133 (__arm_vmvnq_m): Remove.
30134 (__arm_vmvnq_x): Remove.
30136 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30138 * config/arm/iterators.md (mve_insn): Add vmvn.
30139 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
30140 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30141 (mve_vmvnq_m_<supf><mode>): Rename into ...
30142 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
30143 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
30144 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30146 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30148 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
30149 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
30151 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30153 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
30154 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
30155 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
30156 * config/arm/arm_mve.h (vbrsrq): Remove.
30157 (vbrsrq_m): Remove.
30158 (vbrsrq_x): Remove.
30159 (vbrsrq_n_f16): Remove.
30160 (vbrsrq_n_f32): Remove.
30161 (vbrsrq_n_u8): Remove.
30162 (vbrsrq_n_s8): Remove.
30163 (vbrsrq_n_u16): Remove.
30164 (vbrsrq_n_s16): Remove.
30165 (vbrsrq_n_u32): Remove.
30166 (vbrsrq_n_s32): Remove.
30167 (vbrsrq_m_n_s8): Remove.
30168 (vbrsrq_m_n_s32): Remove.
30169 (vbrsrq_m_n_s16): Remove.
30170 (vbrsrq_m_n_u8): Remove.
30171 (vbrsrq_m_n_u32): Remove.
30172 (vbrsrq_m_n_u16): Remove.
30173 (vbrsrq_m_n_f32): Remove.
30174 (vbrsrq_m_n_f16): Remove.
30175 (vbrsrq_x_n_s8): Remove.
30176 (vbrsrq_x_n_s16): Remove.
30177 (vbrsrq_x_n_s32): Remove.
30178 (vbrsrq_x_n_u8): Remove.
30179 (vbrsrq_x_n_u16): Remove.
30180 (vbrsrq_x_n_u32): Remove.
30181 (vbrsrq_x_n_f16): Remove.
30182 (vbrsrq_x_n_f32): Remove.
30183 (__arm_vbrsrq_n_u8): Remove.
30184 (__arm_vbrsrq_n_s8): Remove.
30185 (__arm_vbrsrq_n_u16): Remove.
30186 (__arm_vbrsrq_n_s16): Remove.
30187 (__arm_vbrsrq_n_u32): Remove.
30188 (__arm_vbrsrq_n_s32): Remove.
30189 (__arm_vbrsrq_m_n_s8): Remove.
30190 (__arm_vbrsrq_m_n_s32): Remove.
30191 (__arm_vbrsrq_m_n_s16): Remove.
30192 (__arm_vbrsrq_m_n_u8): Remove.
30193 (__arm_vbrsrq_m_n_u32): Remove.
30194 (__arm_vbrsrq_m_n_u16): Remove.
30195 (__arm_vbrsrq_x_n_s8): Remove.
30196 (__arm_vbrsrq_x_n_s16): Remove.
30197 (__arm_vbrsrq_x_n_s32): Remove.
30198 (__arm_vbrsrq_x_n_u8): Remove.
30199 (__arm_vbrsrq_x_n_u16): Remove.
30200 (__arm_vbrsrq_x_n_u32): Remove.
30201 (__arm_vbrsrq_n_f16): Remove.
30202 (__arm_vbrsrq_n_f32): Remove.
30203 (__arm_vbrsrq_m_n_f32): Remove.
30204 (__arm_vbrsrq_m_n_f16): Remove.
30205 (__arm_vbrsrq_x_n_f16): Remove.
30206 (__arm_vbrsrq_x_n_f32): Remove.
30207 (__arm_vbrsrq): Remove.
30208 (__arm_vbrsrq_m): Remove.
30209 (__arm_vbrsrq_x): Remove.
30211 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30213 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
30214 (mve_insn): Add vbrsr.
30215 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
30216 (@mve_<mve_insn>q_n_f<mode>): ... this.
30217 (mve_vbrsrq_n_<supf><mode>): Rename into ...
30218 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30219 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
30220 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30221 (mve_vbrsrq_m_n_f<mode>): Rename into ...
30222 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
30224 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30226 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
30227 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
30229 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30231 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
30232 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
30233 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
30234 * config/arm/arm_mve.h (vqshluq): Remove.
30235 (vqshluq_m): Remove.
30236 (vqshluq_n_s8): Remove.
30237 (vqshluq_n_s16): Remove.
30238 (vqshluq_n_s32): Remove.
30239 (vqshluq_m_n_s8): Remove.
30240 (vqshluq_m_n_s16): Remove.
30241 (vqshluq_m_n_s32): Remove.
30242 (__arm_vqshluq_n_s8): Remove.
30243 (__arm_vqshluq_n_s16): Remove.
30244 (__arm_vqshluq_n_s32): Remove.
30245 (__arm_vqshluq_m_n_s8): Remove.
30246 (__arm_vqshluq_m_n_s16): Remove.
30247 (__arm_vqshluq_m_n_s32): Remove.
30248 (__arm_vqshluq): Remove.
30249 (__arm_vqshluq_m): Remove.
30251 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30253 * config/arm/iterators.md (mve_insn): Add vqshlu.
30254 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
30255 (VQSHLUQ_M_N, VQSHLUQ_N): New.
30256 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
30257 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30258 (mve_vqshluq_m_n_s<mode>): Change name into ...
30259 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30261 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30263 * config/arm/arm-mve-builtins-shapes.cc
30264 (binary_lshift_unsigned): New.
30265 * config/arm/arm-mve-builtins-shapes.h
30266 (binary_lshift_unsigned): New.
30268 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30270 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
30271 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
30272 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
30273 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
30274 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
30275 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
30276 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
30277 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
30278 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
30279 (vrmlaldavhaxq): Remove.
30280 (vrmlsldavhaq): Remove.
30281 (vrmlsldavhaxq): Remove.
30282 (vrmlaldavhaq_p): Remove.
30283 (vrmlaldavhaxq_p): Remove.
30284 (vrmlsldavhaq_p): Remove.
30285 (vrmlsldavhaxq_p): Remove.
30286 (vrmlaldavhaq_s32): Remove.
30287 (vrmlaldavhaq_u32): Remove.
30288 (vrmlaldavhaxq_s32): Remove.
30289 (vrmlsldavhaq_s32): Remove.
30290 (vrmlsldavhaxq_s32): Remove.
30291 (vrmlaldavhaq_p_s32): Remove.
30292 (vrmlaldavhaq_p_u32): Remove.
30293 (vrmlaldavhaxq_p_s32): Remove.
30294 (vrmlsldavhaq_p_s32): Remove.
30295 (vrmlsldavhaxq_p_s32): Remove.
30296 (__arm_vrmlaldavhaq_s32): Remove.
30297 (__arm_vrmlaldavhaq_u32): Remove.
30298 (__arm_vrmlaldavhaxq_s32): Remove.
30299 (__arm_vrmlsldavhaq_s32): Remove.
30300 (__arm_vrmlsldavhaxq_s32): Remove.
30301 (__arm_vrmlaldavhaq_p_s32): Remove.
30302 (__arm_vrmlaldavhaq_p_u32): Remove.
30303 (__arm_vrmlaldavhaxq_p_s32): Remove.
30304 (__arm_vrmlsldavhaq_p_s32): Remove.
30305 (__arm_vrmlsldavhaxq_p_s32): Remove.
30306 (__arm_vrmlaldavhaq): Remove.
30307 (__arm_vrmlaldavhaxq): Remove.
30308 (__arm_vrmlsldavhaq): Remove.
30309 (__arm_vrmlsldavhaxq): Remove.
30310 (__arm_vrmlaldavhaq_p): Remove.
30311 (__arm_vrmlaldavhaxq_p): Remove.
30312 (__arm_vrmlsldavhaq_p): Remove.
30313 (__arm_vrmlsldavhaxq_p): Remove.
30315 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30317 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
30318 (MVE_VRMLxLDAVHAxQ_P): New.
30319 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
30321 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
30322 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
30324 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
30325 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
30326 (mve_vrmlsldavhaq_sv4si): Merge into ...
30327 (@mve_<mve_insn>q_<supf>v4si): ... this.
30328 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
30329 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
30330 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
30331 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
30333 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30335 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
30336 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
30338 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
30339 * config/arm/arm_mve.h (vqdmulltq): Remove.
30340 (vqdmullbq): Remove.
30341 (vqdmullbq_m): Remove.
30342 (vqdmulltq_m): Remove.
30343 (vqdmulltq_s16): Remove.
30344 (vqdmulltq_n_s16): Remove.
30345 (vqdmullbq_s16): Remove.
30346 (vqdmullbq_n_s16): Remove.
30347 (vqdmulltq_s32): Remove.
30348 (vqdmulltq_n_s32): Remove.
30349 (vqdmullbq_s32): Remove.
30350 (vqdmullbq_n_s32): Remove.
30351 (vqdmullbq_m_n_s32): Remove.
30352 (vqdmullbq_m_n_s16): Remove.
30353 (vqdmullbq_m_s32): Remove.
30354 (vqdmullbq_m_s16): Remove.
30355 (vqdmulltq_m_n_s32): Remove.
30356 (vqdmulltq_m_n_s16): Remove.
30357 (vqdmulltq_m_s32): Remove.
30358 (vqdmulltq_m_s16): Remove.
30359 (__arm_vqdmulltq_s16): Remove.
30360 (__arm_vqdmulltq_n_s16): Remove.
30361 (__arm_vqdmullbq_s16): Remove.
30362 (__arm_vqdmullbq_n_s16): Remove.
30363 (__arm_vqdmulltq_s32): Remove.
30364 (__arm_vqdmulltq_n_s32): Remove.
30365 (__arm_vqdmullbq_s32): Remove.
30366 (__arm_vqdmullbq_n_s32): Remove.
30367 (__arm_vqdmullbq_m_n_s32): Remove.
30368 (__arm_vqdmullbq_m_n_s16): Remove.
30369 (__arm_vqdmullbq_m_s32): Remove.
30370 (__arm_vqdmullbq_m_s16): Remove.
30371 (__arm_vqdmulltq_m_n_s32): Remove.
30372 (__arm_vqdmulltq_m_n_s16): Remove.
30373 (__arm_vqdmulltq_m_s32): Remove.
30374 (__arm_vqdmulltq_m_s16): Remove.
30375 (__arm_vqdmulltq): Remove.
30376 (__arm_vqdmullbq): Remove.
30377 (__arm_vqdmullbq_m): Remove.
30378 (__arm_vqdmulltq_m): Remove.
30380 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30382 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
30383 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
30384 (mve_insn): Add vqdmullb, vqdmullt.
30385 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
30386 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
30388 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
30389 (mve_vqdmulltq_n_s<mode>): Merge into ...
30390 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30391 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
30392 (@mve_<mve_insn>q_<supf><mode>): ... this.
30393 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
30395 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30396 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
30397 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
30399 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30401 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
30402 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
30404 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
30406 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
30407 Drop unused parameter.
30408 (riscv_select_multilib): Ditto.
30409 (riscv_compute_multilib): Update call site of
30410 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
30412 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
30414 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
30415 * config/riscv/riscv-protos.h (expand_vec_init): New function.
30416 * config/riscv/riscv-v.cc (class rvv_builder): New class.
30417 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
30418 (rvv_builder::get_merged_repeating_sequence): Ditto.
30419 (expand_vector_init_insert_elems): Ditto.
30420 (expand_vec_init): Ditto.
30421 * config/riscv/vector-iterators.md: New attribute.
30423 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
30425 * config/rs6000/rs6000-builtins.def
30426 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
30428 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
30429 xsiexpdpf to xsiexpdpf_di.
30430 * config/rs6000/vsx.md (xsiexpdp): Rename to...
30431 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
30432 replace TARGET_64BIT with TARGET_POWERPC64.
30433 (xsiexpdpf): Rename to...
30434 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
30435 replace TARGET_64BIT with TARGET_POWERPC64.
30437 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
30439 * config/rs6000/rs6000-builtins.def
30440 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
30442 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
30445 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
30447 * config/rs6000/rs6000-builtins.def
30448 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
30449 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
30451 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
30452 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
30453 TARGET_64BIT check.
30454 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
30455 requirement when it has a 64-bit argument.
30457 2023-05-12 Pan Li <pan2.li@intel.com>
30458 Richard Sandiford <richard.sandiford@arm.com>
30459 Richard Biener <rguenther@suse.de>
30460 Jakub Jelinek <jakub@redhat.com>
30462 * mux-utils.h: Add overload operator == and != for pointer_mux.
30463 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
30464 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
30465 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
30466 (dv_as_decl): Ditto.
30467 (dv_as_opaque): Removed due to unnecessary.
30468 (struct variable_hasher): Take decl_or_value as compare_type.
30469 (variable_hasher::equal): Diito.
30470 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
30471 (dv_from_value): Ditto.
30472 (attrs_list_member): Ditto.
30473 (vars_copy): Ditto.
30474 (var_reg_decl_set): Ditto.
30475 (var_reg_delete_and_set): Ditto.
30476 (find_loc_in_1pdv): Ditto.
30477 (canonicalize_values_star): Ditto.
30478 (variable_post_merge_new_vals): Ditto.
30479 (dump_onepart_variable_differences): Ditto.
30480 (variable_different_p): Ditto.
30481 (set_slot_part): Ditto.
30482 (clobber_slot_part): Ditto.
30483 (clobber_variable_part): Ditto.
30485 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
30487 * match.pd: simplify vector shift + bit_and + multiply.
30489 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30491 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
30492 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
30493 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
30494 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
30495 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
30496 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
30497 * config/arm/arm-mve-builtins.cc
30498 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
30499 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
30500 * config/arm/arm_mve.h (vqrdmlashq): Remove.
30501 (vqrdmlahq): Remove.
30502 (vqdmlashq): Remove.
30503 (vqdmlahq): Remove.
30507 (vmlasq_m): Remove.
30508 (vqdmlashq_m): Remove.
30509 (vqdmlahq_m): Remove.
30510 (vqrdmlahq_m): Remove.
30511 (vqrdmlashq_m): Remove.
30512 (vmlasq_n_u8): Remove.
30513 (vmlaq_n_u8): Remove.
30514 (vqrdmlashq_n_s8): Remove.
30515 (vqrdmlahq_n_s8): Remove.
30516 (vqdmlahq_n_s8): Remove.
30517 (vqdmlashq_n_s8): Remove.
30518 (vmlasq_n_s8): Remove.
30519 (vmlaq_n_s8): Remove.
30520 (vmlasq_n_u16): Remove.
30521 (vmlaq_n_u16): Remove.
30522 (vqrdmlashq_n_s16): Remove.
30523 (vqrdmlahq_n_s16): Remove.
30524 (vqdmlashq_n_s16): Remove.
30525 (vqdmlahq_n_s16): Remove.
30526 (vmlasq_n_s16): Remove.
30527 (vmlaq_n_s16): Remove.
30528 (vmlasq_n_u32): Remove.
30529 (vmlaq_n_u32): Remove.
30530 (vqrdmlashq_n_s32): Remove.
30531 (vqrdmlahq_n_s32): Remove.
30532 (vqdmlashq_n_s32): Remove.
30533 (vqdmlahq_n_s32): Remove.
30534 (vmlasq_n_s32): Remove.
30535 (vmlaq_n_s32): Remove.
30536 (vmlaq_m_n_s8): Remove.
30537 (vmlaq_m_n_s32): Remove.
30538 (vmlaq_m_n_s16): Remove.
30539 (vmlaq_m_n_u8): Remove.
30540 (vmlaq_m_n_u32): Remove.
30541 (vmlaq_m_n_u16): Remove.
30542 (vmlasq_m_n_s8): Remove.
30543 (vmlasq_m_n_s32): Remove.
30544 (vmlasq_m_n_s16): Remove.
30545 (vmlasq_m_n_u8): Remove.
30546 (vmlasq_m_n_u32): Remove.
30547 (vmlasq_m_n_u16): Remove.
30548 (vqdmlashq_m_n_s8): Remove.
30549 (vqdmlashq_m_n_s32): Remove.
30550 (vqdmlashq_m_n_s16): Remove.
30551 (vqdmlahq_m_n_s8): Remove.
30552 (vqdmlahq_m_n_s32): Remove.
30553 (vqdmlahq_m_n_s16): Remove.
30554 (vqrdmlahq_m_n_s8): Remove.
30555 (vqrdmlahq_m_n_s32): Remove.
30556 (vqrdmlahq_m_n_s16): Remove.
30557 (vqrdmlashq_m_n_s8): Remove.
30558 (vqrdmlashq_m_n_s32): Remove.
30559 (vqrdmlashq_m_n_s16): Remove.
30560 (__arm_vmlasq_n_u8): Remove.
30561 (__arm_vmlaq_n_u8): Remove.
30562 (__arm_vqrdmlashq_n_s8): Remove.
30563 (__arm_vqdmlashq_n_s8): Remove.
30564 (__arm_vqrdmlahq_n_s8): Remove.
30565 (__arm_vqdmlahq_n_s8): Remove.
30566 (__arm_vmlasq_n_s8): Remove.
30567 (__arm_vmlaq_n_s8): Remove.
30568 (__arm_vmlasq_n_u16): Remove.
30569 (__arm_vmlaq_n_u16): Remove.
30570 (__arm_vqrdmlashq_n_s16): Remove.
30571 (__arm_vqdmlashq_n_s16): Remove.
30572 (__arm_vqrdmlahq_n_s16): Remove.
30573 (__arm_vqdmlahq_n_s16): Remove.
30574 (__arm_vmlasq_n_s16): Remove.
30575 (__arm_vmlaq_n_s16): Remove.
30576 (__arm_vmlasq_n_u32): Remove.
30577 (__arm_vmlaq_n_u32): Remove.
30578 (__arm_vqrdmlashq_n_s32): Remove.
30579 (__arm_vqdmlashq_n_s32): Remove.
30580 (__arm_vqrdmlahq_n_s32): Remove.
30581 (__arm_vqdmlahq_n_s32): Remove.
30582 (__arm_vmlasq_n_s32): Remove.
30583 (__arm_vmlaq_n_s32): Remove.
30584 (__arm_vmlaq_m_n_s8): Remove.
30585 (__arm_vmlaq_m_n_s32): Remove.
30586 (__arm_vmlaq_m_n_s16): Remove.
30587 (__arm_vmlaq_m_n_u8): Remove.
30588 (__arm_vmlaq_m_n_u32): Remove.
30589 (__arm_vmlaq_m_n_u16): Remove.
30590 (__arm_vmlasq_m_n_s8): Remove.
30591 (__arm_vmlasq_m_n_s32): Remove.
30592 (__arm_vmlasq_m_n_s16): Remove.
30593 (__arm_vmlasq_m_n_u8): Remove.
30594 (__arm_vmlasq_m_n_u32): Remove.
30595 (__arm_vmlasq_m_n_u16): Remove.
30596 (__arm_vqdmlahq_m_n_s8): Remove.
30597 (__arm_vqdmlahq_m_n_s32): Remove.
30598 (__arm_vqdmlahq_m_n_s16): Remove.
30599 (__arm_vqrdmlahq_m_n_s8): Remove.
30600 (__arm_vqrdmlahq_m_n_s32): Remove.
30601 (__arm_vqrdmlahq_m_n_s16): Remove.
30602 (__arm_vqrdmlashq_m_n_s8): Remove.
30603 (__arm_vqrdmlashq_m_n_s32): Remove.
30604 (__arm_vqrdmlashq_m_n_s16): Remove.
30605 (__arm_vqdmlashq_m_n_s8): Remove.
30606 (__arm_vqdmlashq_m_n_s16): Remove.
30607 (__arm_vqdmlashq_m_n_s32): Remove.
30608 (__arm_vmlasq): Remove.
30609 (__arm_vmlaq): Remove.
30610 (__arm_vqrdmlashq): Remove.
30611 (__arm_vqdmlashq): Remove.
30612 (__arm_vqrdmlahq): Remove.
30613 (__arm_vqdmlahq): Remove.
30614 (__arm_vmlaq_m): Remove.
30615 (__arm_vmlasq_m): Remove.
30616 (__arm_vqdmlahq_m): Remove.
30617 (__arm_vqrdmlahq_m): Remove.
30618 (__arm_vqrdmlashq_m): Remove.
30619 (__arm_vqdmlashq_m): Remove.
30621 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30623 * config/arm/iterators.md (MVE_VMLxQ_N): New.
30624 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
30626 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
30628 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
30629 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
30630 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
30631 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
30632 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30634 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30636 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
30637 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
30639 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30641 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
30642 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
30643 (vqrdmlsdhxq): New.
30644 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
30645 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
30646 (vqrdmlsdhxq): New.
30647 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
30648 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
30649 (vqrdmlsdhxq): New.
30650 * config/arm/arm-mve-builtins.cc
30651 (function_instance::has_inactive_argument): Handle vqrdmladhq,
30652 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
30653 vqdmlsdhq, vqdmlsdhxq.
30654 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
30655 (vqrdmlsdhq): Remove.
30656 (vqrdmladhxq): Remove.
30657 (vqrdmladhq): Remove.
30658 (vqdmlsdhxq): Remove.
30659 (vqdmlsdhq): Remove.
30660 (vqdmladhxq): Remove.
30661 (vqdmladhq): Remove.
30662 (vqdmladhq_m): Remove.
30663 (vqdmladhxq_m): Remove.
30664 (vqdmlsdhq_m): Remove.
30665 (vqdmlsdhxq_m): Remove.
30666 (vqrdmladhq_m): Remove.
30667 (vqrdmladhxq_m): Remove.
30668 (vqrdmlsdhq_m): Remove.
30669 (vqrdmlsdhxq_m): Remove.
30670 (vqrdmlsdhxq_s8): Remove.
30671 (vqrdmlsdhq_s8): Remove.
30672 (vqrdmladhxq_s8): Remove.
30673 (vqrdmladhq_s8): Remove.
30674 (vqdmlsdhxq_s8): Remove.
30675 (vqdmlsdhq_s8): Remove.
30676 (vqdmladhxq_s8): Remove.
30677 (vqdmladhq_s8): Remove.
30678 (vqrdmlsdhxq_s16): Remove.
30679 (vqrdmlsdhq_s16): Remove.
30680 (vqrdmladhxq_s16): Remove.
30681 (vqrdmladhq_s16): Remove.
30682 (vqdmlsdhxq_s16): Remove.
30683 (vqdmlsdhq_s16): Remove.
30684 (vqdmladhxq_s16): Remove.
30685 (vqdmladhq_s16): Remove.
30686 (vqrdmlsdhxq_s32): Remove.
30687 (vqrdmlsdhq_s32): Remove.
30688 (vqrdmladhxq_s32): Remove.
30689 (vqrdmladhq_s32): Remove.
30690 (vqdmlsdhxq_s32): Remove.
30691 (vqdmlsdhq_s32): Remove.
30692 (vqdmladhxq_s32): Remove.
30693 (vqdmladhq_s32): Remove.
30694 (vqdmladhq_m_s8): Remove.
30695 (vqdmladhq_m_s32): Remove.
30696 (vqdmladhq_m_s16): Remove.
30697 (vqdmladhxq_m_s8): Remove.
30698 (vqdmladhxq_m_s32): Remove.
30699 (vqdmladhxq_m_s16): Remove.
30700 (vqdmlsdhq_m_s8): Remove.
30701 (vqdmlsdhq_m_s32): Remove.
30702 (vqdmlsdhq_m_s16): Remove.
30703 (vqdmlsdhxq_m_s8): Remove.
30704 (vqdmlsdhxq_m_s32): Remove.
30705 (vqdmlsdhxq_m_s16): Remove.
30706 (vqrdmladhq_m_s8): Remove.
30707 (vqrdmladhq_m_s32): Remove.
30708 (vqrdmladhq_m_s16): Remove.
30709 (vqrdmladhxq_m_s8): Remove.
30710 (vqrdmladhxq_m_s32): Remove.
30711 (vqrdmladhxq_m_s16): Remove.
30712 (vqrdmlsdhq_m_s8): Remove.
30713 (vqrdmlsdhq_m_s32): Remove.
30714 (vqrdmlsdhq_m_s16): Remove.
30715 (vqrdmlsdhxq_m_s8): Remove.
30716 (vqrdmlsdhxq_m_s32): Remove.
30717 (vqrdmlsdhxq_m_s16): Remove.
30718 (__arm_vqrdmlsdhxq_s8): Remove.
30719 (__arm_vqrdmlsdhq_s8): Remove.
30720 (__arm_vqrdmladhxq_s8): Remove.
30721 (__arm_vqrdmladhq_s8): Remove.
30722 (__arm_vqdmlsdhxq_s8): Remove.
30723 (__arm_vqdmlsdhq_s8): Remove.
30724 (__arm_vqdmladhxq_s8): Remove.
30725 (__arm_vqdmladhq_s8): Remove.
30726 (__arm_vqrdmlsdhxq_s16): Remove.
30727 (__arm_vqrdmlsdhq_s16): Remove.
30728 (__arm_vqrdmladhxq_s16): Remove.
30729 (__arm_vqrdmladhq_s16): Remove.
30730 (__arm_vqdmlsdhxq_s16): Remove.
30731 (__arm_vqdmlsdhq_s16): Remove.
30732 (__arm_vqdmladhxq_s16): Remove.
30733 (__arm_vqdmladhq_s16): Remove.
30734 (__arm_vqrdmlsdhxq_s32): Remove.
30735 (__arm_vqrdmlsdhq_s32): Remove.
30736 (__arm_vqrdmladhxq_s32): Remove.
30737 (__arm_vqrdmladhq_s32): Remove.
30738 (__arm_vqdmlsdhxq_s32): Remove.
30739 (__arm_vqdmlsdhq_s32): Remove.
30740 (__arm_vqdmladhxq_s32): Remove.
30741 (__arm_vqdmladhq_s32): Remove.
30742 (__arm_vqdmladhq_m_s8): Remove.
30743 (__arm_vqdmladhq_m_s32): Remove.
30744 (__arm_vqdmladhq_m_s16): Remove.
30745 (__arm_vqdmladhxq_m_s8): Remove.
30746 (__arm_vqdmladhxq_m_s32): Remove.
30747 (__arm_vqdmladhxq_m_s16): Remove.
30748 (__arm_vqdmlsdhq_m_s8): Remove.
30749 (__arm_vqdmlsdhq_m_s32): Remove.
30750 (__arm_vqdmlsdhq_m_s16): Remove.
30751 (__arm_vqdmlsdhxq_m_s8): Remove.
30752 (__arm_vqdmlsdhxq_m_s32): Remove.
30753 (__arm_vqdmlsdhxq_m_s16): Remove.
30754 (__arm_vqrdmladhq_m_s8): Remove.
30755 (__arm_vqrdmladhq_m_s32): Remove.
30756 (__arm_vqrdmladhq_m_s16): Remove.
30757 (__arm_vqrdmladhxq_m_s8): Remove.
30758 (__arm_vqrdmladhxq_m_s32): Remove.
30759 (__arm_vqrdmladhxq_m_s16): Remove.
30760 (__arm_vqrdmlsdhq_m_s8): Remove.
30761 (__arm_vqrdmlsdhq_m_s32): Remove.
30762 (__arm_vqrdmlsdhq_m_s16): Remove.
30763 (__arm_vqrdmlsdhxq_m_s8): Remove.
30764 (__arm_vqrdmlsdhxq_m_s32): Remove.
30765 (__arm_vqrdmlsdhxq_m_s16): Remove.
30766 (__arm_vqrdmlsdhxq): Remove.
30767 (__arm_vqrdmlsdhq): Remove.
30768 (__arm_vqrdmladhxq): Remove.
30769 (__arm_vqrdmladhq): Remove.
30770 (__arm_vqdmlsdhxq): Remove.
30771 (__arm_vqdmlsdhq): Remove.
30772 (__arm_vqdmladhxq): Remove.
30773 (__arm_vqdmladhq): Remove.
30774 (__arm_vqdmladhq_m): Remove.
30775 (__arm_vqdmladhxq_m): Remove.
30776 (__arm_vqdmlsdhq_m): Remove.
30777 (__arm_vqdmlsdhxq_m): Remove.
30778 (__arm_vqrdmladhq_m): Remove.
30779 (__arm_vqrdmladhxq_m): Remove.
30780 (__arm_vqrdmlsdhq_m): Remove.
30781 (__arm_vqrdmlsdhxq_m): Remove.
30783 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30785 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
30786 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
30787 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
30788 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
30789 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
30790 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
30791 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
30792 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
30793 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
30794 (mve_vqdmladhq_s<mode>): Merge into ...
30795 (@mve_<mve_insn>q_<supf><mode>): ... this.
30797 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30799 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
30800 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
30802 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30804 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
30805 (vmlsldavaq, vmlsldavaxq): New.
30806 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
30807 (vmlsldavaq, vmlsldavaxq): New.
30808 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
30809 (vmlsldavaq, vmlsldavaxq): New.
30810 * config/arm/arm_mve.h (vmlaldavaq): Remove.
30811 (vmlaldavaxq): Remove.
30812 (vmlsldavaq): Remove.
30813 (vmlsldavaxq): Remove.
30814 (vmlaldavaq_p): Remove.
30815 (vmlaldavaxq_p): Remove.
30816 (vmlsldavaq_p): Remove.
30817 (vmlsldavaxq_p): Remove.
30818 (vmlaldavaq_s16): Remove.
30819 (vmlaldavaxq_s16): Remove.
30820 (vmlsldavaq_s16): Remove.
30821 (vmlsldavaxq_s16): Remove.
30822 (vmlaldavaq_u16): Remove.
30823 (vmlaldavaq_s32): Remove.
30824 (vmlaldavaxq_s32): Remove.
30825 (vmlsldavaq_s32): Remove.
30826 (vmlsldavaxq_s32): Remove.
30827 (vmlaldavaq_u32): Remove.
30828 (vmlaldavaq_p_s32): Remove.
30829 (vmlaldavaq_p_s16): Remove.
30830 (vmlaldavaq_p_u32): Remove.
30831 (vmlaldavaq_p_u16): Remove.
30832 (vmlaldavaxq_p_s32): Remove.
30833 (vmlaldavaxq_p_s16): Remove.
30834 (vmlsldavaq_p_s32): Remove.
30835 (vmlsldavaq_p_s16): Remove.
30836 (vmlsldavaxq_p_s32): Remove.
30837 (vmlsldavaxq_p_s16): Remove.
30838 (__arm_vmlaldavaq_s16): Remove.
30839 (__arm_vmlaldavaxq_s16): Remove.
30840 (__arm_vmlsldavaq_s16): Remove.
30841 (__arm_vmlsldavaxq_s16): Remove.
30842 (__arm_vmlaldavaq_u16): Remove.
30843 (__arm_vmlaldavaq_s32): Remove.
30844 (__arm_vmlaldavaxq_s32): Remove.
30845 (__arm_vmlsldavaq_s32): Remove.
30846 (__arm_vmlsldavaxq_s32): Remove.
30847 (__arm_vmlaldavaq_u32): Remove.
30848 (__arm_vmlaldavaq_p_s32): Remove.
30849 (__arm_vmlaldavaq_p_s16): Remove.
30850 (__arm_vmlaldavaq_p_u32): Remove.
30851 (__arm_vmlaldavaq_p_u16): Remove.
30852 (__arm_vmlaldavaxq_p_s32): Remove.
30853 (__arm_vmlaldavaxq_p_s16): Remove.
30854 (__arm_vmlsldavaq_p_s32): Remove.
30855 (__arm_vmlsldavaq_p_s16): Remove.
30856 (__arm_vmlsldavaxq_p_s32): Remove.
30857 (__arm_vmlsldavaxq_p_s16): Remove.
30858 (__arm_vmlaldavaq): Remove.
30859 (__arm_vmlaldavaxq): Remove.
30860 (__arm_vmlsldavaq): Remove.
30861 (__arm_vmlsldavaxq): Remove.
30862 (__arm_vmlaldavaq_p): Remove.
30863 (__arm_vmlaldavaxq_p): Remove.
30864 (__arm_vmlsldavaq_p): Remove.
30865 (__arm_vmlsldavaxq_p): Remove.
30867 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30869 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
30871 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
30872 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
30873 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
30874 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
30875 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
30876 (mve_vmlaldavaxq_s<mode>): Merge into ...
30877 (@mve_<mve_insn>q_<supf><mode>): ... this.
30878 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
30879 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
30881 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
30883 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30885 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
30886 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
30888 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30890 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
30891 (vrmlsldavhq, vrmlsldavhxq): New.
30892 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
30893 (vrmlsldavhq, vrmlsldavhxq): New.
30894 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
30895 (vrmlsldavhq, vrmlsldavhxq): New.
30896 * config/arm/arm-mve-builtins-functions.h
30897 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
30898 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
30899 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
30900 (vrmlsldavhxq): Remove.
30901 (vrmlsldavhq): Remove.
30902 (vrmlaldavhxq): Remove.
30903 (vrmlaldavhq_p): Remove.
30904 (vrmlaldavhxq_p): Remove.
30905 (vrmlsldavhq_p): Remove.
30906 (vrmlsldavhxq_p): Remove.
30907 (vrmlaldavhq_u32): Remove.
30908 (vrmlsldavhxq_s32): Remove.
30909 (vrmlsldavhq_s32): Remove.
30910 (vrmlaldavhxq_s32): Remove.
30911 (vrmlaldavhq_s32): Remove.
30912 (vrmlaldavhq_p_s32): Remove.
30913 (vrmlaldavhxq_p_s32): Remove.
30914 (vrmlsldavhq_p_s32): Remove.
30915 (vrmlsldavhxq_p_s32): Remove.
30916 (vrmlaldavhq_p_u32): Remove.
30917 (__arm_vrmlaldavhq_u32): Remove.
30918 (__arm_vrmlsldavhxq_s32): Remove.
30919 (__arm_vrmlsldavhq_s32): Remove.
30920 (__arm_vrmlaldavhxq_s32): Remove.
30921 (__arm_vrmlaldavhq_s32): Remove.
30922 (__arm_vrmlaldavhq_p_s32): Remove.
30923 (__arm_vrmlaldavhxq_p_s32): Remove.
30924 (__arm_vrmlsldavhq_p_s32): Remove.
30925 (__arm_vrmlsldavhxq_p_s32): Remove.
30926 (__arm_vrmlaldavhq_p_u32): Remove.
30927 (__arm_vrmlaldavhq): Remove.
30928 (__arm_vrmlsldavhxq): Remove.
30929 (__arm_vrmlsldavhq): Remove.
30930 (__arm_vrmlaldavhxq): Remove.
30931 (__arm_vrmlaldavhq_p): Remove.
30932 (__arm_vrmlaldavhxq_p): Remove.
30933 (__arm_vrmlsldavhq_p): Remove.
30934 (__arm_vrmlsldavhxq_p): Remove.
30936 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30938 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
30940 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
30941 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
30942 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
30943 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
30944 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
30945 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
30946 (@mve_<mve_insn>q_<supf>v4si): ... this.
30947 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
30948 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
30950 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
30952 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30954 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
30955 (vmlsldavq, vmlsldavxq): New.
30956 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
30957 (vmlsldavq, vmlsldavxq): New.
30958 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
30959 (vmlsldavq, vmlsldavxq): New.
30960 * config/arm/arm_mve.h (vmlaldavq): Remove.
30961 (vmlsldavxq): Remove.
30962 (vmlsldavq): Remove.
30963 (vmlaldavxq): Remove.
30964 (vmlaldavq_p): Remove.
30965 (vmlaldavxq_p): Remove.
30966 (vmlsldavq_p): Remove.
30967 (vmlsldavxq_p): Remove.
30968 (vmlaldavq_u16): Remove.
30969 (vmlsldavxq_s16): Remove.
30970 (vmlsldavq_s16): Remove.
30971 (vmlaldavxq_s16): Remove.
30972 (vmlaldavq_s16): Remove.
30973 (vmlaldavq_u32): Remove.
30974 (vmlsldavxq_s32): Remove.
30975 (vmlsldavq_s32): Remove.
30976 (vmlaldavxq_s32): Remove.
30977 (vmlaldavq_s32): Remove.
30978 (vmlaldavq_p_s16): Remove.
30979 (vmlaldavxq_p_s16): Remove.
30980 (vmlsldavq_p_s16): Remove.
30981 (vmlsldavxq_p_s16): Remove.
30982 (vmlaldavq_p_u16): Remove.
30983 (vmlaldavq_p_s32): Remove.
30984 (vmlaldavxq_p_s32): Remove.
30985 (vmlsldavq_p_s32): Remove.
30986 (vmlsldavxq_p_s32): Remove.
30987 (vmlaldavq_p_u32): Remove.
30988 (__arm_vmlaldavq_u16): Remove.
30989 (__arm_vmlsldavxq_s16): Remove.
30990 (__arm_vmlsldavq_s16): Remove.
30991 (__arm_vmlaldavxq_s16): Remove.
30992 (__arm_vmlaldavq_s16): Remove.
30993 (__arm_vmlaldavq_u32): Remove.
30994 (__arm_vmlsldavxq_s32): Remove.
30995 (__arm_vmlsldavq_s32): Remove.
30996 (__arm_vmlaldavxq_s32): Remove.
30997 (__arm_vmlaldavq_s32): Remove.
30998 (__arm_vmlaldavq_p_s16): Remove.
30999 (__arm_vmlaldavxq_p_s16): Remove.
31000 (__arm_vmlsldavq_p_s16): Remove.
31001 (__arm_vmlsldavxq_p_s16): Remove.
31002 (__arm_vmlaldavq_p_u16): Remove.
31003 (__arm_vmlaldavq_p_s32): Remove.
31004 (__arm_vmlaldavxq_p_s32): Remove.
31005 (__arm_vmlsldavq_p_s32): Remove.
31006 (__arm_vmlsldavxq_p_s32): Remove.
31007 (__arm_vmlaldavq_p_u32): Remove.
31008 (__arm_vmlaldavq): Remove.
31009 (__arm_vmlsldavxq): Remove.
31010 (__arm_vmlsldavq): Remove.
31011 (__arm_vmlaldavxq): Remove.
31012 (__arm_vmlaldavq_p): Remove.
31013 (__arm_vmlaldavxq_p): Remove.
31014 (__arm_vmlsldavq_p): Remove.
31015 (__arm_vmlsldavxq_p): Remove.
31017 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31019 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
31020 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
31021 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
31022 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
31023 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
31024 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
31025 (mve_vmlsldavxq_s<mode>): Merge into ...
31026 (@mve_<mve_insn>q_<supf><mode>): ... this.
31027 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
31028 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
31030 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31032 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31034 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
31035 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
31037 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31039 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
31040 * config/arm/arm-mve-builtins-base.def (vabavq): New.
31041 * config/arm/arm-mve-builtins-base.h (vabavq): New.
31042 * config/arm/arm_mve.h (vabavq): Remove.
31043 (vabavq_p): Remove.
31044 (vabavq_s8): Remove.
31045 (vabavq_s16): Remove.
31046 (vabavq_s32): Remove.
31047 (vabavq_u8): Remove.
31048 (vabavq_u16): Remove.
31049 (vabavq_u32): Remove.
31050 (vabavq_p_s8): Remove.
31051 (vabavq_p_u8): Remove.
31052 (vabavq_p_s16): Remove.
31053 (vabavq_p_u16): Remove.
31054 (vabavq_p_s32): Remove.
31055 (vabavq_p_u32): Remove.
31056 (__arm_vabavq_s8): Remove.
31057 (__arm_vabavq_s16): Remove.
31058 (__arm_vabavq_s32): Remove.
31059 (__arm_vabavq_u8): Remove.
31060 (__arm_vabavq_u16): Remove.
31061 (__arm_vabavq_u32): Remove.
31062 (__arm_vabavq_p_s8): Remove.
31063 (__arm_vabavq_p_u8): Remove.
31064 (__arm_vabavq_p_s16): Remove.
31065 (__arm_vabavq_p_u16): Remove.
31066 (__arm_vabavq_p_s32): Remove.
31067 (__arm_vabavq_p_u32): Remove.
31068 (__arm_vabavq): Remove.
31069 (__arm_vabavq_p): Remove.
31071 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31073 * config/arm/iterators.md (mve_insn): Add vabav.
31074 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
31075 (@mve_<mve_insn>q_<supf><mode>): ... this,.
31076 (mve_vabavq_p_<supf><mode>): Rename into ...
31077 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
31079 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31081 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
31082 (vmlsdavaq, vmlsdavaxq): New.
31083 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
31084 (vmlsdavaq, vmlsdavaxq): New.
31085 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
31086 (vmlsdavaq, vmlsdavaxq): New.
31087 * config/arm/arm_mve.h (vmladavaq): Remove.
31088 (vmlsdavaxq): Remove.
31089 (vmlsdavaq): Remove.
31090 (vmladavaxq): Remove.
31091 (vmladavaq_p): Remove.
31092 (vmladavaxq_p): Remove.
31093 (vmlsdavaq_p): Remove.
31094 (vmlsdavaxq_p): Remove.
31095 (vmladavaq_u8): Remove.
31096 (vmlsdavaxq_s8): Remove.
31097 (vmlsdavaq_s8): Remove.
31098 (vmladavaxq_s8): Remove.
31099 (vmladavaq_s8): Remove.
31100 (vmladavaq_u16): Remove.
31101 (vmlsdavaxq_s16): Remove.
31102 (vmlsdavaq_s16): Remove.
31103 (vmladavaxq_s16): Remove.
31104 (vmladavaq_s16): Remove.
31105 (vmladavaq_u32): Remove.
31106 (vmlsdavaxq_s32): Remove.
31107 (vmlsdavaq_s32): Remove.
31108 (vmladavaxq_s32): Remove.
31109 (vmladavaq_s32): Remove.
31110 (vmladavaq_p_s8): Remove.
31111 (vmladavaq_p_s32): Remove.
31112 (vmladavaq_p_s16): Remove.
31113 (vmladavaq_p_u8): Remove.
31114 (vmladavaq_p_u32): Remove.
31115 (vmladavaq_p_u16): Remove.
31116 (vmladavaxq_p_s8): Remove.
31117 (vmladavaxq_p_s32): Remove.
31118 (vmladavaxq_p_s16): Remove.
31119 (vmlsdavaq_p_s8): Remove.
31120 (vmlsdavaq_p_s32): Remove.
31121 (vmlsdavaq_p_s16): Remove.
31122 (vmlsdavaxq_p_s8): Remove.
31123 (vmlsdavaxq_p_s32): Remove.
31124 (vmlsdavaxq_p_s16): Remove.
31125 (__arm_vmladavaq_u8): Remove.
31126 (__arm_vmlsdavaxq_s8): Remove.
31127 (__arm_vmlsdavaq_s8): Remove.
31128 (__arm_vmladavaxq_s8): Remove.
31129 (__arm_vmladavaq_s8): Remove.
31130 (__arm_vmladavaq_u16): Remove.
31131 (__arm_vmlsdavaxq_s16): Remove.
31132 (__arm_vmlsdavaq_s16): Remove.
31133 (__arm_vmladavaxq_s16): Remove.
31134 (__arm_vmladavaq_s16): Remove.
31135 (__arm_vmladavaq_u32): Remove.
31136 (__arm_vmlsdavaxq_s32): Remove.
31137 (__arm_vmlsdavaq_s32): Remove.
31138 (__arm_vmladavaxq_s32): Remove.
31139 (__arm_vmladavaq_s32): Remove.
31140 (__arm_vmladavaq_p_s8): Remove.
31141 (__arm_vmladavaq_p_s32): Remove.
31142 (__arm_vmladavaq_p_s16): Remove.
31143 (__arm_vmladavaq_p_u8): Remove.
31144 (__arm_vmladavaq_p_u32): Remove.
31145 (__arm_vmladavaq_p_u16): Remove.
31146 (__arm_vmladavaxq_p_s8): Remove.
31147 (__arm_vmladavaxq_p_s32): Remove.
31148 (__arm_vmladavaxq_p_s16): Remove.
31149 (__arm_vmlsdavaq_p_s8): Remove.
31150 (__arm_vmlsdavaq_p_s32): Remove.
31151 (__arm_vmlsdavaq_p_s16): Remove.
31152 (__arm_vmlsdavaxq_p_s8): Remove.
31153 (__arm_vmlsdavaxq_p_s32): Remove.
31154 (__arm_vmlsdavaxq_p_s16): Remove.
31155 (__arm_vmladavaq): Remove.
31156 (__arm_vmlsdavaxq): Remove.
31157 (__arm_vmlsdavaq): Remove.
31158 (__arm_vmladavaxq): Remove.
31159 (__arm_vmladavaq_p): Remove.
31160 (__arm_vmladavaxq_p): Remove.
31161 (__arm_vmlsdavaq_p): Remove.
31162 (__arm_vmlsdavaxq_p): Remove.
31164 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31166 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
31167 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
31169 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31171 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
31172 (vmlsdavq, vmlsdavxq): New.
31173 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
31174 (vmlsdavq, vmlsdavxq): New.
31175 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
31176 (vmlsdavq, vmlsdavxq): New.
31177 * config/arm/arm_mve.h (vmladavq): Remove.
31178 (vmlsdavxq): Remove.
31179 (vmlsdavq): Remove.
31180 (vmladavxq): Remove.
31181 (vmladavq_p): Remove.
31182 (vmlsdavxq_p): Remove.
31183 (vmlsdavq_p): Remove.
31184 (vmladavxq_p): Remove.
31185 (vmladavq_u8): Remove.
31186 (vmlsdavxq_s8): Remove.
31187 (vmlsdavq_s8): Remove.
31188 (vmladavxq_s8): Remove.
31189 (vmladavq_s8): Remove.
31190 (vmladavq_u16): Remove.
31191 (vmlsdavxq_s16): Remove.
31192 (vmlsdavq_s16): Remove.
31193 (vmladavxq_s16): Remove.
31194 (vmladavq_s16): Remove.
31195 (vmladavq_u32): Remove.
31196 (vmlsdavxq_s32): Remove.
31197 (vmlsdavq_s32): Remove.
31198 (vmladavxq_s32): Remove.
31199 (vmladavq_s32): Remove.
31200 (vmladavq_p_u8): Remove.
31201 (vmlsdavxq_p_s8): Remove.
31202 (vmlsdavq_p_s8): Remove.
31203 (vmladavxq_p_s8): Remove.
31204 (vmladavq_p_s8): Remove.
31205 (vmladavq_p_u16): Remove.
31206 (vmlsdavxq_p_s16): Remove.
31207 (vmlsdavq_p_s16): Remove.
31208 (vmladavxq_p_s16): Remove.
31209 (vmladavq_p_s16): Remove.
31210 (vmladavq_p_u32): Remove.
31211 (vmlsdavxq_p_s32): Remove.
31212 (vmlsdavq_p_s32): Remove.
31213 (vmladavxq_p_s32): Remove.
31214 (vmladavq_p_s32): Remove.
31215 (__arm_vmladavq_u8): Remove.
31216 (__arm_vmlsdavxq_s8): Remove.
31217 (__arm_vmlsdavq_s8): Remove.
31218 (__arm_vmladavxq_s8): Remove.
31219 (__arm_vmladavq_s8): Remove.
31220 (__arm_vmladavq_u16): Remove.
31221 (__arm_vmlsdavxq_s16): Remove.
31222 (__arm_vmlsdavq_s16): Remove.
31223 (__arm_vmladavxq_s16): Remove.
31224 (__arm_vmladavq_s16): Remove.
31225 (__arm_vmladavq_u32): Remove.
31226 (__arm_vmlsdavxq_s32): Remove.
31227 (__arm_vmlsdavq_s32): Remove.
31228 (__arm_vmladavxq_s32): Remove.
31229 (__arm_vmladavq_s32): Remove.
31230 (__arm_vmladavq_p_u8): Remove.
31231 (__arm_vmlsdavxq_p_s8): Remove.
31232 (__arm_vmlsdavq_p_s8): Remove.
31233 (__arm_vmladavxq_p_s8): Remove.
31234 (__arm_vmladavq_p_s8): Remove.
31235 (__arm_vmladavq_p_u16): Remove.
31236 (__arm_vmlsdavxq_p_s16): Remove.
31237 (__arm_vmlsdavq_p_s16): Remove.
31238 (__arm_vmladavxq_p_s16): Remove.
31239 (__arm_vmladavq_p_s16): Remove.
31240 (__arm_vmladavq_p_u32): Remove.
31241 (__arm_vmlsdavxq_p_s32): Remove.
31242 (__arm_vmlsdavq_p_s32): Remove.
31243 (__arm_vmladavxq_p_s32): Remove.
31244 (__arm_vmladavq_p_s32): Remove.
31245 (__arm_vmladavq): Remove.
31246 (__arm_vmlsdavxq): Remove.
31247 (__arm_vmlsdavq): Remove.
31248 (__arm_vmladavxq): Remove.
31249 (__arm_vmladavq_p): Remove.
31250 (__arm_vmlsdavxq_p): Remove.
31251 (__arm_vmlsdavq_p): Remove.
31252 (__arm_vmladavxq_p): Remove.
31254 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31256 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
31257 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
31258 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
31259 vmlsdavax, vmlsdav, vmlsdavx.
31260 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
31261 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
31262 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
31264 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
31265 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
31266 (mve_vmlsdavxq_s<mode>): Merge into ...
31267 (@mve_<mve_insn>q_<supf><mode>): ... this.
31268 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
31269 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
31271 (@mve_<mve_insn>q_<supf><mode>): ... this.
31272 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
31273 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
31274 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31275 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
31276 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
31278 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31280 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31282 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
31283 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
31285 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31287 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
31288 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
31289 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
31290 * config/arm/arm_mve.h (vaddlvaq): Remove.
31291 (vaddlvaq_p): Remove.
31292 (vaddlvaq_u32): Remove.
31293 (vaddlvaq_s32): Remove.
31294 (vaddlvaq_p_s32): Remove.
31295 (vaddlvaq_p_u32): Remove.
31296 (__arm_vaddlvaq_u32): Remove.
31297 (__arm_vaddlvaq_s32): Remove.
31298 (__arm_vaddlvaq_p_s32): Remove.
31299 (__arm_vaddlvaq_p_u32): Remove.
31300 (__arm_vaddlvaq): Remove.
31301 (__arm_vaddlvaq_p): Remove.
31303 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31305 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
31306 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
31308 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31310 * config/arm/iterators.md (mve_insn): Add vaddlva.
31311 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
31312 (@mve_<mve_insn>q_<supf>v4si): ... this.
31313 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
31314 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
31316 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
31319 * config/i386/i386.cc (ix86_widen_mult_cost):
31320 Handle V4HImode and V2SImode.
31322 2023-05-11 Andrew Pinski <apinski@marvell.com>
31324 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
31325 defined by a phi node with more than one uses, allow for the
31326 only uses are in that same defining statement.
31328 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
31330 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
31333 2023-05-11 Pan Li <pan2.li@intel.com>
31335 * config/riscv/vector.md: Add comments for simplifying to vmset.
31337 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
31339 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
31341 (v<optab><mode>3): Add vector shift pattern.
31342 * config/riscv/vector-iterators.md: New iterator.
31344 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
31346 * config/riscv/autovec.md: Use renamed functions.
31347 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
31348 (emit_vlmax_reg_op): To this.
31349 (emit_nonvlmax_op): Rename.
31350 (emit_len_op): To this.
31351 (emit_nonvlmax_binop): Rename.
31352 (emit_len_binop): To this.
31353 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
31354 (emit_pred_binop): Remove vlmax_p.
31355 (emit_vlmax_op): Rename.
31356 (emit_vlmax_reg_op): To this.
31357 (emit_nonvlmax_op): Rename.
31358 (emit_len_op): To this.
31359 (emit_nonvlmax_binop): Rename.
31360 (emit_len_binop): To this.
31361 (sew64_scalar_helper): Use renamed functions.
31362 (expand_tuple_move): Use renamed functions.
31363 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
31365 * config/riscv/vector.md: Use renamed functions.
31367 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
31368 Michael Collison <collison@rivosinc.com>
31370 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
31371 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
31372 * config/riscv/riscv-v.cc (emit_pred_op): New function.
31373 (set_expander_dest_and_mask): New function.
31374 (emit_pred_binop): New function.
31375 (emit_nonvlmax_binop): New function.
31377 2023-05-11 Pan Li <pan2.li@intel.com>
31379 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
31380 * gimple-loop-interchange.cc
31381 (tree_loop_interchange::map_inductions_to_loop): Ditto.
31382 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
31383 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
31384 * tree-ssa-loop-manip.cc (create_iv): Ditto.
31385 (tree_transform_and_unroll_loop): Ditto.
31386 (canonicalize_loop_ivs): Ditto.
31387 * tree-ssa-loop-manip.h (create_iv): Ditto.
31388 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
31389 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
31391 (vect_set_loop_condition_normal): Ditto.
31392 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
31393 * tree-vect-stmts.cc (vectorizable_store): Ditto.
31394 (vectorizable_load): Ditto.
31396 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31398 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
31399 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
31400 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
31401 * config/arm/arm_mve.h (vmovlbq): Remove.
31403 (vmovlbq_m): Remove.
31404 (vmovltq_m): Remove.
31405 (vmovlbq_x): Remove.
31406 (vmovltq_x): Remove.
31407 (vmovlbq_s8): Remove.
31408 (vmovlbq_s16): Remove.
31409 (vmovltq_s8): Remove.
31410 (vmovltq_s16): Remove.
31411 (vmovltq_u8): Remove.
31412 (vmovltq_u16): Remove.
31413 (vmovlbq_u8): Remove.
31414 (vmovlbq_u16): Remove.
31415 (vmovlbq_m_s8): Remove.
31416 (vmovltq_m_s8): Remove.
31417 (vmovlbq_m_u8): Remove.
31418 (vmovltq_m_u8): Remove.
31419 (vmovlbq_m_s16): Remove.
31420 (vmovltq_m_s16): Remove.
31421 (vmovlbq_m_u16): Remove.
31422 (vmovltq_m_u16): Remove.
31423 (vmovlbq_x_s8): Remove.
31424 (vmovlbq_x_s16): Remove.
31425 (vmovlbq_x_u8): Remove.
31426 (vmovlbq_x_u16): Remove.
31427 (vmovltq_x_s8): Remove.
31428 (vmovltq_x_s16): Remove.
31429 (vmovltq_x_u8): Remove.
31430 (vmovltq_x_u16): Remove.
31431 (__arm_vmovlbq_s8): Remove.
31432 (__arm_vmovlbq_s16): Remove.
31433 (__arm_vmovltq_s8): Remove.
31434 (__arm_vmovltq_s16): Remove.
31435 (__arm_vmovltq_u8): Remove.
31436 (__arm_vmovltq_u16): Remove.
31437 (__arm_vmovlbq_u8): Remove.
31438 (__arm_vmovlbq_u16): Remove.
31439 (__arm_vmovlbq_m_s8): Remove.
31440 (__arm_vmovltq_m_s8): Remove.
31441 (__arm_vmovlbq_m_u8): Remove.
31442 (__arm_vmovltq_m_u8): Remove.
31443 (__arm_vmovlbq_m_s16): Remove.
31444 (__arm_vmovltq_m_s16): Remove.
31445 (__arm_vmovlbq_m_u16): Remove.
31446 (__arm_vmovltq_m_u16): Remove.
31447 (__arm_vmovlbq_x_s8): Remove.
31448 (__arm_vmovlbq_x_s16): Remove.
31449 (__arm_vmovlbq_x_u8): Remove.
31450 (__arm_vmovlbq_x_u16): Remove.
31451 (__arm_vmovltq_x_s8): Remove.
31452 (__arm_vmovltq_x_s16): Remove.
31453 (__arm_vmovltq_x_u8): Remove.
31454 (__arm_vmovltq_x_u16): Remove.
31455 (__arm_vmovlbq): Remove.
31456 (__arm_vmovltq): Remove.
31457 (__arm_vmovlbq_m): Remove.
31458 (__arm_vmovltq_m): Remove.
31459 (__arm_vmovlbq_x): Remove.
31460 (__arm_vmovltq_x): Remove.
31462 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31464 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
31465 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
31467 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31469 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
31470 (VMOVLBQ, VMOVLTQ): Merge into ...
31471 (VMOVLxQ): ... this.
31472 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
31473 (VMOVLxQ_M): ... this.
31474 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
31475 (mve_vmovlbq_<supf><mode>): Merge into ...
31476 (@mve_<mve_insn>q_<supf><mode>): ... this.
31477 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
31479 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
31481 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31483 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
31484 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
31485 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
31486 * config/arm/arm-mve-builtins-functions.h
31487 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
31488 * config/arm/arm_mve.h (vaddlvq): Remove.
31489 (vaddlvq_p): Remove.
31490 (vaddlvq_s32): Remove.
31491 (vaddlvq_u32): Remove.
31492 (vaddlvq_p_s32): Remove.
31493 (vaddlvq_p_u32): Remove.
31494 (__arm_vaddlvq_s32): Remove.
31495 (__arm_vaddlvq_u32): Remove.
31496 (__arm_vaddlvq_p_s32): Remove.
31497 (__arm_vaddlvq_p_u32): Remove.
31498 (__arm_vaddlvq): Remove.
31499 (__arm_vaddlvq_p): Remove.
31501 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31503 * config/arm/iterators.md (mve_insn): Add vaddlv.
31504 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
31505 (@mve_<mve_insn>q_<supf>v4si): ... this.
31506 (mve_vaddlvq_p_<supf>v4si): Rename into ...
31507 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
31509 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31511 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
31512 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
31514 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31516 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
31517 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
31518 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
31519 * config/arm/arm_mve.h (vaddvaq): Remove.
31520 (vaddvaq_p): Remove.
31521 (vaddvaq_u8): Remove.
31522 (vaddvaq_s8): Remove.
31523 (vaddvaq_u16): Remove.
31524 (vaddvaq_s16): Remove.
31525 (vaddvaq_u32): Remove.
31526 (vaddvaq_s32): Remove.
31527 (vaddvaq_p_u8): Remove.
31528 (vaddvaq_p_s8): Remove.
31529 (vaddvaq_p_u16): Remove.
31530 (vaddvaq_p_s16): Remove.
31531 (vaddvaq_p_u32): Remove.
31532 (vaddvaq_p_s32): Remove.
31533 (__arm_vaddvaq_u8): Remove.
31534 (__arm_vaddvaq_s8): Remove.
31535 (__arm_vaddvaq_u16): Remove.
31536 (__arm_vaddvaq_s16): Remove.
31537 (__arm_vaddvaq_u32): Remove.
31538 (__arm_vaddvaq_s32): Remove.
31539 (__arm_vaddvaq_p_u8): Remove.
31540 (__arm_vaddvaq_p_s8): Remove.
31541 (__arm_vaddvaq_p_u16): Remove.
31542 (__arm_vaddvaq_p_s16): Remove.
31543 (__arm_vaddvaq_p_u32): Remove.
31544 (__arm_vaddvaq_p_s32): Remove.
31545 (__arm_vaddvaq): Remove.
31546 (__arm_vaddvaq_p): Remove.
31548 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31550 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
31551 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
31553 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31555 * config/arm/iterators.md (mve_insn): Add vaddva.
31556 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
31557 (@mve_<mve_insn>q_<supf><mode>): ... this.
31558 (mve_vaddvaq_p_<supf><mode>): Rename into ...
31559 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31561 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31563 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
31564 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
31565 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
31566 * config/arm/arm_mve.h (vaddvq): Remove.
31567 (vaddvq_p): Remove.
31568 (vaddvq_s8): Remove.
31569 (vaddvq_s16): Remove.
31570 (vaddvq_s32): Remove.
31571 (vaddvq_u8): Remove.
31572 (vaddvq_u16): Remove.
31573 (vaddvq_u32): Remove.
31574 (vaddvq_p_u8): Remove.
31575 (vaddvq_p_s8): Remove.
31576 (vaddvq_p_u16): Remove.
31577 (vaddvq_p_s16): Remove.
31578 (vaddvq_p_u32): Remove.
31579 (vaddvq_p_s32): Remove.
31580 (__arm_vaddvq_s8): Remove.
31581 (__arm_vaddvq_s16): Remove.
31582 (__arm_vaddvq_s32): Remove.
31583 (__arm_vaddvq_u8): Remove.
31584 (__arm_vaddvq_u16): Remove.
31585 (__arm_vaddvq_u32): Remove.
31586 (__arm_vaddvq_p_u8): Remove.
31587 (__arm_vaddvq_p_s8): Remove.
31588 (__arm_vaddvq_p_u16): Remove.
31589 (__arm_vaddvq_p_s16): Remove.
31590 (__arm_vaddvq_p_u32): Remove.
31591 (__arm_vaddvq_p_s32): Remove.
31592 (__arm_vaddvq): Remove.
31593 (__arm_vaddvq_p): Remove.
31595 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31597 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
31598 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
31600 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31602 * config/arm/iterators.md (mve_insn): Add vaddv.
31603 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
31604 (@mve_<mve_insn>q_<supf><mode>): ... this.
31605 (mve_vaddvq_p_<supf><mode>): Rename into ...
31606 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31607 * config/arm/vec-common.md: Use gen_mve_q instead of
31610 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31612 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
31614 * config/arm/arm-mve-builtins-base.def (vdupq): New.
31615 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
31616 * config/arm/arm_mve.h (vdupq_n): Remove.
31618 (vdupq_n_f16): Remove.
31619 (vdupq_n_f32): Remove.
31620 (vdupq_n_s8): Remove.
31621 (vdupq_n_s16): Remove.
31622 (vdupq_n_s32): Remove.
31623 (vdupq_n_u8): Remove.
31624 (vdupq_n_u16): Remove.
31625 (vdupq_n_u32): Remove.
31626 (vdupq_m_n_u8): Remove.
31627 (vdupq_m_n_s8): Remove.
31628 (vdupq_m_n_u16): Remove.
31629 (vdupq_m_n_s16): Remove.
31630 (vdupq_m_n_u32): Remove.
31631 (vdupq_m_n_s32): Remove.
31632 (vdupq_m_n_f16): Remove.
31633 (vdupq_m_n_f32): Remove.
31634 (vdupq_x_n_s8): Remove.
31635 (vdupq_x_n_s16): Remove.
31636 (vdupq_x_n_s32): Remove.
31637 (vdupq_x_n_u8): Remove.
31638 (vdupq_x_n_u16): Remove.
31639 (vdupq_x_n_u32): Remove.
31640 (vdupq_x_n_f16): Remove.
31641 (vdupq_x_n_f32): Remove.
31642 (__arm_vdupq_n_s8): Remove.
31643 (__arm_vdupq_n_s16): Remove.
31644 (__arm_vdupq_n_s32): Remove.
31645 (__arm_vdupq_n_u8): Remove.
31646 (__arm_vdupq_n_u16): Remove.
31647 (__arm_vdupq_n_u32): Remove.
31648 (__arm_vdupq_m_n_u8): Remove.
31649 (__arm_vdupq_m_n_s8): Remove.
31650 (__arm_vdupq_m_n_u16): Remove.
31651 (__arm_vdupq_m_n_s16): Remove.
31652 (__arm_vdupq_m_n_u32): Remove.
31653 (__arm_vdupq_m_n_s32): Remove.
31654 (__arm_vdupq_x_n_s8): Remove.
31655 (__arm_vdupq_x_n_s16): Remove.
31656 (__arm_vdupq_x_n_s32): Remove.
31657 (__arm_vdupq_x_n_u8): Remove.
31658 (__arm_vdupq_x_n_u16): Remove.
31659 (__arm_vdupq_x_n_u32): Remove.
31660 (__arm_vdupq_n_f16): Remove.
31661 (__arm_vdupq_n_f32): Remove.
31662 (__arm_vdupq_m_n_f16): Remove.
31663 (__arm_vdupq_m_n_f32): Remove.
31664 (__arm_vdupq_x_n_f16): Remove.
31665 (__arm_vdupq_x_n_f32): Remove.
31666 (__arm_vdupq_n): Remove.
31667 (__arm_vdupq_m): Remove.
31669 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31671 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
31672 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
31674 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31676 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
31677 (MVE_FP_N_VDUPQ_ONLY): New.
31678 (mve_insn): Add vdupq.
31679 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
31680 (@mve_<mve_insn>q_n_f<mode>): ... this.
31681 (mve_vdupq_n_<supf><mode>): Rename into ...
31682 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31683 (mve_vdupq_m_n_<supf><mode>): Rename into ...
31684 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
31685 (mve_vdupq_m_n_f<mode>): Rename into ...
31686 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
31688 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31690 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
31692 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
31694 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
31696 * config/arm/arm_mve.h (vrev16q): Remove.
31699 (vrev64q_m): Remove.
31700 (vrev16q_m): Remove.
31701 (vrev32q_m): Remove.
31702 (vrev16q_x): Remove.
31703 (vrev32q_x): Remove.
31704 (vrev64q_x): Remove.
31705 (vrev64q_f16): Remove.
31706 (vrev64q_f32): Remove.
31707 (vrev32q_f16): Remove.
31708 (vrev16q_s8): Remove.
31709 (vrev32q_s8): Remove.
31710 (vrev32q_s16): Remove.
31711 (vrev64q_s8): Remove.
31712 (vrev64q_s16): Remove.
31713 (vrev64q_s32): Remove.
31714 (vrev64q_u8): Remove.
31715 (vrev64q_u16): Remove.
31716 (vrev64q_u32): Remove.
31717 (vrev32q_u8): Remove.
31718 (vrev32q_u16): Remove.
31719 (vrev16q_u8): Remove.
31720 (vrev64q_m_u8): Remove.
31721 (vrev64q_m_s8): Remove.
31722 (vrev64q_m_u16): Remove.
31723 (vrev64q_m_s16): Remove.
31724 (vrev64q_m_u32): Remove.
31725 (vrev64q_m_s32): Remove.
31726 (vrev16q_m_s8): Remove.
31727 (vrev32q_m_f16): Remove.
31728 (vrev16q_m_u8): Remove.
31729 (vrev32q_m_s8): Remove.
31730 (vrev64q_m_f16): Remove.
31731 (vrev32q_m_u8): Remove.
31732 (vrev32q_m_s16): Remove.
31733 (vrev64q_m_f32): Remove.
31734 (vrev32q_m_u16): Remove.
31735 (vrev16q_x_s8): Remove.
31736 (vrev16q_x_u8): Remove.
31737 (vrev32q_x_s8): Remove.
31738 (vrev32q_x_s16): Remove.
31739 (vrev32q_x_u8): Remove.
31740 (vrev32q_x_u16): Remove.
31741 (vrev64q_x_s8): Remove.
31742 (vrev64q_x_s16): Remove.
31743 (vrev64q_x_s32): Remove.
31744 (vrev64q_x_u8): Remove.
31745 (vrev64q_x_u16): Remove.
31746 (vrev64q_x_u32): Remove.
31747 (vrev32q_x_f16): Remove.
31748 (vrev64q_x_f16): Remove.
31749 (vrev64q_x_f32): Remove.
31750 (__arm_vrev16q_s8): Remove.
31751 (__arm_vrev32q_s8): Remove.
31752 (__arm_vrev32q_s16): Remove.
31753 (__arm_vrev64q_s8): Remove.
31754 (__arm_vrev64q_s16): Remove.
31755 (__arm_vrev64q_s32): Remove.
31756 (__arm_vrev64q_u8): Remove.
31757 (__arm_vrev64q_u16): Remove.
31758 (__arm_vrev64q_u32): Remove.
31759 (__arm_vrev32q_u8): Remove.
31760 (__arm_vrev32q_u16): Remove.
31761 (__arm_vrev16q_u8): Remove.
31762 (__arm_vrev64q_m_u8): Remove.
31763 (__arm_vrev64q_m_s8): Remove.
31764 (__arm_vrev64q_m_u16): Remove.
31765 (__arm_vrev64q_m_s16): Remove.
31766 (__arm_vrev64q_m_u32): Remove.
31767 (__arm_vrev64q_m_s32): Remove.
31768 (__arm_vrev16q_m_s8): Remove.
31769 (__arm_vrev16q_m_u8): Remove.
31770 (__arm_vrev32q_m_s8): Remove.
31771 (__arm_vrev32q_m_u8): Remove.
31772 (__arm_vrev32q_m_s16): Remove.
31773 (__arm_vrev32q_m_u16): Remove.
31774 (__arm_vrev16q_x_s8): Remove.
31775 (__arm_vrev16q_x_u8): Remove.
31776 (__arm_vrev32q_x_s8): Remove.
31777 (__arm_vrev32q_x_s16): Remove.
31778 (__arm_vrev32q_x_u8): Remove.
31779 (__arm_vrev32q_x_u16): Remove.
31780 (__arm_vrev64q_x_s8): Remove.
31781 (__arm_vrev64q_x_s16): Remove.
31782 (__arm_vrev64q_x_s32): Remove.
31783 (__arm_vrev64q_x_u8): Remove.
31784 (__arm_vrev64q_x_u16): Remove.
31785 (__arm_vrev64q_x_u32): Remove.
31786 (__arm_vrev64q_f16): Remove.
31787 (__arm_vrev64q_f32): Remove.
31788 (__arm_vrev32q_f16): Remove.
31789 (__arm_vrev32q_m_f16): Remove.
31790 (__arm_vrev64q_m_f16): Remove.
31791 (__arm_vrev64q_m_f32): Remove.
31792 (__arm_vrev32q_x_f16): Remove.
31793 (__arm_vrev64q_x_f16): Remove.
31794 (__arm_vrev64q_x_f32): Remove.
31795 (__arm_vrev16q): Remove.
31796 (__arm_vrev32q): Remove.
31797 (__arm_vrev64q): Remove.
31798 (__arm_vrev64q_m): Remove.
31799 (__arm_vrev16q_m): Remove.
31800 (__arm_vrev32q_m): Remove.
31801 (__arm_vrev16q_x): Remove.
31802 (__arm_vrev32q_x): Remove.
31803 (__arm_vrev64q_x): Remove.
31805 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31807 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
31808 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
31809 (MVE_FP_M_VREV32Q_ONLY): New iterators.
31810 (mve_insn): Add vrev16q, vrev32q, vrev64q.
31811 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
31812 (@mve_<mve_insn>q_f<mode>): ... this
31813 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
31814 (mve_vrev64q_<supf><mode>): Rename into ...
31815 (@mve_<mve_insn>q_<supf><mode>): ... this.
31816 (mve_vrev32q_<supf><mode>): Rename into
31817 @mve_<mve_insn>q_<supf><mode>.
31818 (mve_vrev16q_<supf>v16qi): Rename into
31819 @mve_<mve_insn>q_<supf><mode>.
31820 (mve_vrev64q_m_<supf><mode>): Rename into
31821 @mve_<mve_insn>q_m_<supf><mode>.
31822 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
31823 (mve_vrev32q_m_<supf><mode>): Rename into
31824 @mve_<mve_insn>q_m_<supf><mode>.
31825 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
31826 (mve_vrev16q_m_<supf>v16qi): Rename into
31827 @mve_<mve_insn>q_m_<supf><mode>.
31829 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31831 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
31832 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
31833 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
31834 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
31835 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
31836 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
31837 * config/arm/arm-mve-builtins-functions.h (class
31838 unspec_based_mve_function_exact_insn_vcmp): New.
31839 * config/arm/arm-mve-builtins.cc
31840 (function_instance::has_inactive_argument): Handle vcmp.
31841 * config/arm/arm_mve.h (vcmpneq): Remove.
31849 (vcmpneq_m): Remove.
31850 (vcmphiq_m): Remove.
31851 (vcmpeqq_m): Remove.
31852 (vcmpcsq_m): Remove.
31853 (vcmpcsq_m_n): Remove.
31854 (vcmpltq_m): Remove.
31855 (vcmpleq_m): Remove.
31856 (vcmpgtq_m): Remove.
31857 (vcmpgeq_m): Remove.
31858 (vcmpneq_s8): Remove.
31859 (vcmpneq_s16): Remove.
31860 (vcmpneq_s32): Remove.
31861 (vcmpneq_u8): Remove.
31862 (vcmpneq_u16): Remove.
31863 (vcmpneq_u32): Remove.
31864 (vcmpneq_n_u8): Remove.
31865 (vcmphiq_u8): Remove.
31866 (vcmphiq_n_u8): Remove.
31867 (vcmpeqq_u8): Remove.
31868 (vcmpeqq_n_u8): Remove.
31869 (vcmpcsq_u8): Remove.
31870 (vcmpcsq_n_u8): Remove.
31871 (vcmpneq_n_s8): Remove.
31872 (vcmpltq_s8): Remove.
31873 (vcmpltq_n_s8): Remove.
31874 (vcmpleq_s8): Remove.
31875 (vcmpleq_n_s8): Remove.
31876 (vcmpgtq_s8): Remove.
31877 (vcmpgtq_n_s8): Remove.
31878 (vcmpgeq_s8): Remove.
31879 (vcmpgeq_n_s8): Remove.
31880 (vcmpeqq_s8): Remove.
31881 (vcmpeqq_n_s8): Remove.
31882 (vcmpneq_n_u16): Remove.
31883 (vcmphiq_u16): Remove.
31884 (vcmphiq_n_u16): Remove.
31885 (vcmpeqq_u16): Remove.
31886 (vcmpeqq_n_u16): Remove.
31887 (vcmpcsq_u16): Remove.
31888 (vcmpcsq_n_u16): Remove.
31889 (vcmpneq_n_s16): Remove.
31890 (vcmpltq_s16): Remove.
31891 (vcmpltq_n_s16): Remove.
31892 (vcmpleq_s16): Remove.
31893 (vcmpleq_n_s16): Remove.
31894 (vcmpgtq_s16): Remove.
31895 (vcmpgtq_n_s16): Remove.
31896 (vcmpgeq_s16): Remove.
31897 (vcmpgeq_n_s16): Remove.
31898 (vcmpeqq_s16): Remove.
31899 (vcmpeqq_n_s16): Remove.
31900 (vcmpneq_n_u32): Remove.
31901 (vcmphiq_u32): Remove.
31902 (vcmphiq_n_u32): Remove.
31903 (vcmpeqq_u32): Remove.
31904 (vcmpeqq_n_u32): Remove.
31905 (vcmpcsq_u32): Remove.
31906 (vcmpcsq_n_u32): Remove.
31907 (vcmpneq_n_s32): Remove.
31908 (vcmpltq_s32): Remove.
31909 (vcmpltq_n_s32): Remove.
31910 (vcmpleq_s32): Remove.
31911 (vcmpleq_n_s32): Remove.
31912 (vcmpgtq_s32): Remove.
31913 (vcmpgtq_n_s32): Remove.
31914 (vcmpgeq_s32): Remove.
31915 (vcmpgeq_n_s32): Remove.
31916 (vcmpeqq_s32): Remove.
31917 (vcmpeqq_n_s32): Remove.
31918 (vcmpneq_n_f16): Remove.
31919 (vcmpneq_f16): Remove.
31920 (vcmpltq_n_f16): Remove.
31921 (vcmpltq_f16): Remove.
31922 (vcmpleq_n_f16): Remove.
31923 (vcmpleq_f16): Remove.
31924 (vcmpgtq_n_f16): Remove.
31925 (vcmpgtq_f16): Remove.
31926 (vcmpgeq_n_f16): Remove.
31927 (vcmpgeq_f16): Remove.
31928 (vcmpeqq_n_f16): Remove.
31929 (vcmpeqq_f16): Remove.
31930 (vcmpneq_n_f32): Remove.
31931 (vcmpneq_f32): Remove.
31932 (vcmpltq_n_f32): Remove.
31933 (vcmpltq_f32): Remove.
31934 (vcmpleq_n_f32): Remove.
31935 (vcmpleq_f32): Remove.
31936 (vcmpgtq_n_f32): Remove.
31937 (vcmpgtq_f32): Remove.
31938 (vcmpgeq_n_f32): Remove.
31939 (vcmpgeq_f32): Remove.
31940 (vcmpeqq_n_f32): Remove.
31941 (vcmpeqq_f32): Remove.
31942 (vcmpeqq_m_f16): Remove.
31943 (vcmpeqq_m_f32): Remove.
31944 (vcmpneq_m_u8): Remove.
31945 (vcmpneq_m_n_u8): Remove.
31946 (vcmphiq_m_u8): Remove.
31947 (vcmphiq_m_n_u8): Remove.
31948 (vcmpeqq_m_u8): Remove.
31949 (vcmpeqq_m_n_u8): Remove.
31950 (vcmpcsq_m_u8): Remove.
31951 (vcmpcsq_m_n_u8): Remove.
31952 (vcmpneq_m_s8): Remove.
31953 (vcmpneq_m_n_s8): Remove.
31954 (vcmpltq_m_s8): Remove.
31955 (vcmpltq_m_n_s8): Remove.
31956 (vcmpleq_m_s8): Remove.
31957 (vcmpleq_m_n_s8): Remove.
31958 (vcmpgtq_m_s8): Remove.
31959 (vcmpgtq_m_n_s8): Remove.
31960 (vcmpgeq_m_s8): Remove.
31961 (vcmpgeq_m_n_s8): Remove.
31962 (vcmpeqq_m_s8): Remove.
31963 (vcmpeqq_m_n_s8): Remove.
31964 (vcmpneq_m_u16): Remove.
31965 (vcmpneq_m_n_u16): Remove.
31966 (vcmphiq_m_u16): Remove.
31967 (vcmphiq_m_n_u16): Remove.
31968 (vcmpeqq_m_u16): Remove.
31969 (vcmpeqq_m_n_u16): Remove.
31970 (vcmpcsq_m_u16): Remove.
31971 (vcmpcsq_m_n_u16): Remove.
31972 (vcmpneq_m_s16): Remove.
31973 (vcmpneq_m_n_s16): Remove.
31974 (vcmpltq_m_s16): Remove.
31975 (vcmpltq_m_n_s16): Remove.
31976 (vcmpleq_m_s16): Remove.
31977 (vcmpleq_m_n_s16): Remove.
31978 (vcmpgtq_m_s16): Remove.
31979 (vcmpgtq_m_n_s16): Remove.
31980 (vcmpgeq_m_s16): Remove.
31981 (vcmpgeq_m_n_s16): Remove.
31982 (vcmpeqq_m_s16): Remove.
31983 (vcmpeqq_m_n_s16): Remove.
31984 (vcmpneq_m_u32): Remove.
31985 (vcmpneq_m_n_u32): Remove.
31986 (vcmphiq_m_u32): Remove.
31987 (vcmphiq_m_n_u32): Remove.
31988 (vcmpeqq_m_u32): Remove.
31989 (vcmpeqq_m_n_u32): Remove.
31990 (vcmpcsq_m_u32): Remove.
31991 (vcmpcsq_m_n_u32): Remove.
31992 (vcmpneq_m_s32): Remove.
31993 (vcmpneq_m_n_s32): Remove.
31994 (vcmpltq_m_s32): Remove.
31995 (vcmpltq_m_n_s32): Remove.
31996 (vcmpleq_m_s32): Remove.
31997 (vcmpleq_m_n_s32): Remove.
31998 (vcmpgtq_m_s32): Remove.
31999 (vcmpgtq_m_n_s32): Remove.
32000 (vcmpgeq_m_s32): Remove.
32001 (vcmpgeq_m_n_s32): Remove.
32002 (vcmpeqq_m_s32): Remove.
32003 (vcmpeqq_m_n_s32): Remove.
32004 (vcmpeqq_m_n_f16): Remove.
32005 (vcmpgeq_m_f16): Remove.
32006 (vcmpgeq_m_n_f16): Remove.
32007 (vcmpgtq_m_f16): Remove.
32008 (vcmpgtq_m_n_f16): Remove.
32009 (vcmpleq_m_f16): Remove.
32010 (vcmpleq_m_n_f16): Remove.
32011 (vcmpltq_m_f16): Remove.
32012 (vcmpltq_m_n_f16): Remove.
32013 (vcmpneq_m_f16): Remove.
32014 (vcmpneq_m_n_f16): Remove.
32015 (vcmpeqq_m_n_f32): Remove.
32016 (vcmpgeq_m_f32): Remove.
32017 (vcmpgeq_m_n_f32): Remove.
32018 (vcmpgtq_m_f32): Remove.
32019 (vcmpgtq_m_n_f32): Remove.
32020 (vcmpleq_m_f32): Remove.
32021 (vcmpleq_m_n_f32): Remove.
32022 (vcmpltq_m_f32): Remove.
32023 (vcmpltq_m_n_f32): Remove.
32024 (vcmpneq_m_f32): Remove.
32025 (vcmpneq_m_n_f32): Remove.
32026 (__arm_vcmpneq_s8): Remove.
32027 (__arm_vcmpneq_s16): Remove.
32028 (__arm_vcmpneq_s32): Remove.
32029 (__arm_vcmpneq_u8): Remove.
32030 (__arm_vcmpneq_u16): Remove.
32031 (__arm_vcmpneq_u32): Remove.
32032 (__arm_vcmpneq_n_u8): Remove.
32033 (__arm_vcmphiq_u8): Remove.
32034 (__arm_vcmphiq_n_u8): Remove.
32035 (__arm_vcmpeqq_u8): Remove.
32036 (__arm_vcmpeqq_n_u8): Remove.
32037 (__arm_vcmpcsq_u8): Remove.
32038 (__arm_vcmpcsq_n_u8): Remove.
32039 (__arm_vcmpneq_n_s8): Remove.
32040 (__arm_vcmpltq_s8): Remove.
32041 (__arm_vcmpltq_n_s8): Remove.
32042 (__arm_vcmpleq_s8): Remove.
32043 (__arm_vcmpleq_n_s8): Remove.
32044 (__arm_vcmpgtq_s8): Remove.
32045 (__arm_vcmpgtq_n_s8): Remove.
32046 (__arm_vcmpgeq_s8): Remove.
32047 (__arm_vcmpgeq_n_s8): Remove.
32048 (__arm_vcmpeqq_s8): Remove.
32049 (__arm_vcmpeqq_n_s8): Remove.
32050 (__arm_vcmpneq_n_u16): Remove.
32051 (__arm_vcmphiq_u16): Remove.
32052 (__arm_vcmphiq_n_u16): Remove.
32053 (__arm_vcmpeqq_u16): Remove.
32054 (__arm_vcmpeqq_n_u16): Remove.
32055 (__arm_vcmpcsq_u16): Remove.
32056 (__arm_vcmpcsq_n_u16): Remove.
32057 (__arm_vcmpneq_n_s16): Remove.
32058 (__arm_vcmpltq_s16): Remove.
32059 (__arm_vcmpltq_n_s16): Remove.
32060 (__arm_vcmpleq_s16): Remove.
32061 (__arm_vcmpleq_n_s16): Remove.
32062 (__arm_vcmpgtq_s16): Remove.
32063 (__arm_vcmpgtq_n_s16): Remove.
32064 (__arm_vcmpgeq_s16): Remove.
32065 (__arm_vcmpgeq_n_s16): Remove.
32066 (__arm_vcmpeqq_s16): Remove.
32067 (__arm_vcmpeqq_n_s16): Remove.
32068 (__arm_vcmpneq_n_u32): Remove.
32069 (__arm_vcmphiq_u32): Remove.
32070 (__arm_vcmphiq_n_u32): Remove.
32071 (__arm_vcmpeqq_u32): Remove.
32072 (__arm_vcmpeqq_n_u32): Remove.
32073 (__arm_vcmpcsq_u32): Remove.
32074 (__arm_vcmpcsq_n_u32): Remove.
32075 (__arm_vcmpneq_n_s32): Remove.
32076 (__arm_vcmpltq_s32): Remove.
32077 (__arm_vcmpltq_n_s32): Remove.
32078 (__arm_vcmpleq_s32): Remove.
32079 (__arm_vcmpleq_n_s32): Remove.
32080 (__arm_vcmpgtq_s32): Remove.
32081 (__arm_vcmpgtq_n_s32): Remove.
32082 (__arm_vcmpgeq_s32): Remove.
32083 (__arm_vcmpgeq_n_s32): Remove.
32084 (__arm_vcmpeqq_s32): Remove.
32085 (__arm_vcmpeqq_n_s32): Remove.
32086 (__arm_vcmpneq_m_u8): Remove.
32087 (__arm_vcmpneq_m_n_u8): Remove.
32088 (__arm_vcmphiq_m_u8): Remove.
32089 (__arm_vcmphiq_m_n_u8): Remove.
32090 (__arm_vcmpeqq_m_u8): Remove.
32091 (__arm_vcmpeqq_m_n_u8): Remove.
32092 (__arm_vcmpcsq_m_u8): Remove.
32093 (__arm_vcmpcsq_m_n_u8): Remove.
32094 (__arm_vcmpneq_m_s8): Remove.
32095 (__arm_vcmpneq_m_n_s8): Remove.
32096 (__arm_vcmpltq_m_s8): Remove.
32097 (__arm_vcmpltq_m_n_s8): Remove.
32098 (__arm_vcmpleq_m_s8): Remove.
32099 (__arm_vcmpleq_m_n_s8): Remove.
32100 (__arm_vcmpgtq_m_s8): Remove.
32101 (__arm_vcmpgtq_m_n_s8): Remove.
32102 (__arm_vcmpgeq_m_s8): Remove.
32103 (__arm_vcmpgeq_m_n_s8): Remove.
32104 (__arm_vcmpeqq_m_s8): Remove.
32105 (__arm_vcmpeqq_m_n_s8): Remove.
32106 (__arm_vcmpneq_m_u16): Remove.
32107 (__arm_vcmpneq_m_n_u16): Remove.
32108 (__arm_vcmphiq_m_u16): Remove.
32109 (__arm_vcmphiq_m_n_u16): Remove.
32110 (__arm_vcmpeqq_m_u16): Remove.
32111 (__arm_vcmpeqq_m_n_u16): Remove.
32112 (__arm_vcmpcsq_m_u16): Remove.
32113 (__arm_vcmpcsq_m_n_u16): Remove.
32114 (__arm_vcmpneq_m_s16): Remove.
32115 (__arm_vcmpneq_m_n_s16): Remove.
32116 (__arm_vcmpltq_m_s16): Remove.
32117 (__arm_vcmpltq_m_n_s16): Remove.
32118 (__arm_vcmpleq_m_s16): Remove.
32119 (__arm_vcmpleq_m_n_s16): Remove.
32120 (__arm_vcmpgtq_m_s16): Remove.
32121 (__arm_vcmpgtq_m_n_s16): Remove.
32122 (__arm_vcmpgeq_m_s16): Remove.
32123 (__arm_vcmpgeq_m_n_s16): Remove.
32124 (__arm_vcmpeqq_m_s16): Remove.
32125 (__arm_vcmpeqq_m_n_s16): Remove.
32126 (__arm_vcmpneq_m_u32): Remove.
32127 (__arm_vcmpneq_m_n_u32): Remove.
32128 (__arm_vcmphiq_m_u32): Remove.
32129 (__arm_vcmphiq_m_n_u32): Remove.
32130 (__arm_vcmpeqq_m_u32): Remove.
32131 (__arm_vcmpeqq_m_n_u32): Remove.
32132 (__arm_vcmpcsq_m_u32): Remove.
32133 (__arm_vcmpcsq_m_n_u32): Remove.
32134 (__arm_vcmpneq_m_s32): Remove.
32135 (__arm_vcmpneq_m_n_s32): Remove.
32136 (__arm_vcmpltq_m_s32): Remove.
32137 (__arm_vcmpltq_m_n_s32): Remove.
32138 (__arm_vcmpleq_m_s32): Remove.
32139 (__arm_vcmpleq_m_n_s32): Remove.
32140 (__arm_vcmpgtq_m_s32): Remove.
32141 (__arm_vcmpgtq_m_n_s32): Remove.
32142 (__arm_vcmpgeq_m_s32): Remove.
32143 (__arm_vcmpgeq_m_n_s32): Remove.
32144 (__arm_vcmpeqq_m_s32): Remove.
32145 (__arm_vcmpeqq_m_n_s32): Remove.
32146 (__arm_vcmpneq_n_f16): Remove.
32147 (__arm_vcmpneq_f16): Remove.
32148 (__arm_vcmpltq_n_f16): Remove.
32149 (__arm_vcmpltq_f16): Remove.
32150 (__arm_vcmpleq_n_f16): Remove.
32151 (__arm_vcmpleq_f16): Remove.
32152 (__arm_vcmpgtq_n_f16): Remove.
32153 (__arm_vcmpgtq_f16): Remove.
32154 (__arm_vcmpgeq_n_f16): Remove.
32155 (__arm_vcmpgeq_f16): Remove.
32156 (__arm_vcmpeqq_n_f16): Remove.
32157 (__arm_vcmpeqq_f16): Remove.
32158 (__arm_vcmpneq_n_f32): Remove.
32159 (__arm_vcmpneq_f32): Remove.
32160 (__arm_vcmpltq_n_f32): Remove.
32161 (__arm_vcmpltq_f32): Remove.
32162 (__arm_vcmpleq_n_f32): Remove.
32163 (__arm_vcmpleq_f32): Remove.
32164 (__arm_vcmpgtq_n_f32): Remove.
32165 (__arm_vcmpgtq_f32): Remove.
32166 (__arm_vcmpgeq_n_f32): Remove.
32167 (__arm_vcmpgeq_f32): Remove.
32168 (__arm_vcmpeqq_n_f32): Remove.
32169 (__arm_vcmpeqq_f32): Remove.
32170 (__arm_vcmpeqq_m_f16): Remove.
32171 (__arm_vcmpeqq_m_f32): Remove.
32172 (__arm_vcmpeqq_m_n_f16): Remove.
32173 (__arm_vcmpgeq_m_f16): Remove.
32174 (__arm_vcmpgeq_m_n_f16): Remove.
32175 (__arm_vcmpgtq_m_f16): Remove.
32176 (__arm_vcmpgtq_m_n_f16): Remove.
32177 (__arm_vcmpleq_m_f16): Remove.
32178 (__arm_vcmpleq_m_n_f16): Remove.
32179 (__arm_vcmpltq_m_f16): Remove.
32180 (__arm_vcmpltq_m_n_f16): Remove.
32181 (__arm_vcmpneq_m_f16): Remove.
32182 (__arm_vcmpneq_m_n_f16): Remove.
32183 (__arm_vcmpeqq_m_n_f32): Remove.
32184 (__arm_vcmpgeq_m_f32): Remove.
32185 (__arm_vcmpgeq_m_n_f32): Remove.
32186 (__arm_vcmpgtq_m_f32): Remove.
32187 (__arm_vcmpgtq_m_n_f32): Remove.
32188 (__arm_vcmpleq_m_f32): Remove.
32189 (__arm_vcmpleq_m_n_f32): Remove.
32190 (__arm_vcmpltq_m_f32): Remove.
32191 (__arm_vcmpltq_m_n_f32): Remove.
32192 (__arm_vcmpneq_m_f32): Remove.
32193 (__arm_vcmpneq_m_n_f32): Remove.
32194 (__arm_vcmpneq): Remove.
32195 (__arm_vcmphiq): Remove.
32196 (__arm_vcmpeqq): Remove.
32197 (__arm_vcmpcsq): Remove.
32198 (__arm_vcmpltq): Remove.
32199 (__arm_vcmpleq): Remove.
32200 (__arm_vcmpgtq): Remove.
32201 (__arm_vcmpgeq): Remove.
32202 (__arm_vcmpneq_m): Remove.
32203 (__arm_vcmphiq_m): Remove.
32204 (__arm_vcmpeqq_m): Remove.
32205 (__arm_vcmpcsq_m): Remove.
32206 (__arm_vcmpltq_m): Remove.
32207 (__arm_vcmpleq_m): Remove.
32208 (__arm_vcmpgtq_m): Remove.
32209 (__arm_vcmpgeq_m): Remove.
32211 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32213 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
32214 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
32216 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
32218 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
32219 (MVE_CMP_M_N_F, mve_cmp_op1): New.
32222 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
32223 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
32224 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
32225 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
32226 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
32227 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
32228 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
32229 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
32230 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
32231 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
32233 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
32234 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
32235 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
32236 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
32237 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
32239 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
32240 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
32241 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
32242 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
32243 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
32245 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
32247 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
32248 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
32249 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
32252 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
32254 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
32255 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
32256 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
32257 Simplify parity(rotate(x,y)) as parity(x).
32259 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32261 * config/riscv/autovec.md (@vec_series<mode>): New pattern
32262 * config/riscv/riscv-protos.h (expand_vec_series): New function.
32263 * config/riscv/riscv-v.cc (emit_binop): Ditto.
32264 (emit_index_op): Ditto.
32265 (expand_vec_series): Ditto.
32266 (expand_const_vector): Add series vector handling.
32267 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
32269 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
32271 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
32272 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
32273 (*concat<mode><dwi>3_2): Likewise.
32274 (*concat<mode><dwi>3_3): Likewise.
32275 (*concat<mode><dwi>3_4): Likewise.
32276 (*concat<mode><dwi>3_5): Likewise.
32277 (*concat<mode><dwi>3_6): Likewise.
32278 (*concat<mode><dwi>3_7): Likewise.
32280 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
32283 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
32284 (<insn>v4qiv4hi2): New expander.
32285 (<insn>v2hiv2si2): Ditto.
32286 (<insn>v2qiv2si2): Ditto.
32287 (<insn>v2qiv2hi2): Ditto.
32289 2023-05-10 Jeff Law <jlaw@ventanamicro>
32291 * config/h8300/constraints.md (Q): Make this a special memory
32295 2023-05-10 Jakub Jelinek <jakub@redhat.com>
32298 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
32299 if t is void_list_node.
32301 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32303 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
32304 (aarch64_sqmovun<mode>_insn_be): Delete.
32305 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
32306 (aarch64_sqmovun<mode>): Delete expander.
32308 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32311 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
32313 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
32314 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
32315 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
32317 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32320 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
32322 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
32323 (aarch64_<sur>qadd<mode>): Rename to...
32324 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
32326 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32328 * config/aarch64/aarch64-simd.md
32329 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
32330 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
32331 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
32332 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
32334 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32337 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
32338 (aarch64_xtn<mode>_insn_be): Likewise.
32339 (trunc<mode><Vnarrowq>2): Rename to...
32340 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
32341 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
32342 (aarch64_<su>qmovn<mode>): Likewise.
32343 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
32344 (aarch64_<su>qmovn<mode>_insn_le): Delete.
32345 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
32347 2023-05-10 Li Xu <xuli1@eswincomputing.com>
32349 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
32350 intruction replace null avl with (const_int 0).
32352 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32354 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
32357 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32360 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
32361 (source_equal_p): Fix dead loop in vsetvl avl checking.
32363 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
32365 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
32366 of modeadjusted_dccr.
32368 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32370 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
32371 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
32372 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
32373 * config/arm/arm-mve-builtins.cc
32374 (function_instance::has_inactive_argument): Handle vmaxaq and
32376 * config/arm/arm_mve.h (vminaq): Remove.
32378 (vminaq_m): Remove.
32379 (vmaxaq_m): Remove.
32380 (vminaq_s8): Remove.
32381 (vmaxaq_s8): Remove.
32382 (vminaq_s16): Remove.
32383 (vmaxaq_s16): Remove.
32384 (vminaq_s32): Remove.
32385 (vmaxaq_s32): Remove.
32386 (vminaq_m_s8): Remove.
32387 (vmaxaq_m_s8): Remove.
32388 (vminaq_m_s16): Remove.
32389 (vmaxaq_m_s16): Remove.
32390 (vminaq_m_s32): Remove.
32391 (vmaxaq_m_s32): Remove.
32392 (__arm_vminaq_s8): Remove.
32393 (__arm_vmaxaq_s8): Remove.
32394 (__arm_vminaq_s16): Remove.
32395 (__arm_vmaxaq_s16): Remove.
32396 (__arm_vminaq_s32): Remove.
32397 (__arm_vmaxaq_s32): Remove.
32398 (__arm_vminaq_m_s8): Remove.
32399 (__arm_vmaxaq_m_s8): Remove.
32400 (__arm_vminaq_m_s16): Remove.
32401 (__arm_vmaxaq_m_s16): Remove.
32402 (__arm_vminaq_m_s32): Remove.
32403 (__arm_vmaxaq_m_s32): Remove.
32404 (__arm_vminaq): Remove.
32405 (__arm_vmaxaq): Remove.
32406 (__arm_vminaq_m): Remove.
32407 (__arm_vmaxaq_m): Remove.
32409 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32411 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
32413 (mve_insn): Add vmaxa, vmina.
32414 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
32415 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
32417 (@mve_<mve_insn>q_<supf><mode>): ... this.
32418 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
32419 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
32421 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32423 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
32424 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
32426 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32428 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
32429 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
32430 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
32431 * config/arm/arm-mve-builtins.cc
32432 (function_instance::has_inactive_argument): Handle vmaxnmaq and
32434 * config/arm/arm_mve.h (vminnmaq): Remove.
32435 (vmaxnmaq): Remove.
32436 (vmaxnmaq_m): Remove.
32437 (vminnmaq_m): Remove.
32438 (vminnmaq_f16): Remove.
32439 (vmaxnmaq_f16): Remove.
32440 (vminnmaq_f32): Remove.
32441 (vmaxnmaq_f32): Remove.
32442 (vmaxnmaq_m_f16): Remove.
32443 (vminnmaq_m_f16): Remove.
32444 (vmaxnmaq_m_f32): Remove.
32445 (vminnmaq_m_f32): Remove.
32446 (__arm_vminnmaq_f16): Remove.
32447 (__arm_vmaxnmaq_f16): Remove.
32448 (__arm_vminnmaq_f32): Remove.
32449 (__arm_vmaxnmaq_f32): Remove.
32450 (__arm_vmaxnmaq_m_f16): Remove.
32451 (__arm_vminnmaq_m_f16): Remove.
32452 (__arm_vmaxnmaq_m_f32): Remove.
32453 (__arm_vminnmaq_m_f32): Remove.
32454 (__arm_vminnmaq): Remove.
32455 (__arm_vmaxnmaq): Remove.
32456 (__arm_vmaxnmaq_m): Remove.
32457 (__arm_vminnmaq_m): Remove.
32459 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32461 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
32462 (MVE_VMAXNMA_VMINNMAQ_M): New.
32463 (mve_insn): Add vmaxnma, vminnma.
32464 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
32466 (@mve_<mve_insn>q_f<mode>): ... this.
32467 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
32468 (@mve_<mve_insn>q_m_f<mode>): ... this.
32470 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32472 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
32473 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
32474 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
32475 (vminnmavq, vminnmvq): New.
32476 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
32477 (vminnmavq, vminnmvq): New.
32478 * config/arm/arm_mve.h (vminnmvq): Remove.
32479 (vminnmavq): Remove.
32480 (vmaxnmvq): Remove.
32481 (vmaxnmavq): Remove.
32482 (vmaxnmavq_p): Remove.
32483 (vmaxnmvq_p): Remove.
32484 (vminnmavq_p): Remove.
32485 (vminnmvq_p): Remove.
32486 (vminnmvq_f16): Remove.
32487 (vminnmavq_f16): Remove.
32488 (vmaxnmvq_f16): Remove.
32489 (vmaxnmavq_f16): Remove.
32490 (vminnmvq_f32): Remove.
32491 (vminnmavq_f32): Remove.
32492 (vmaxnmvq_f32): Remove.
32493 (vmaxnmavq_f32): Remove.
32494 (vmaxnmavq_p_f16): Remove.
32495 (vmaxnmvq_p_f16): Remove.
32496 (vminnmavq_p_f16): Remove.
32497 (vminnmvq_p_f16): Remove.
32498 (vmaxnmavq_p_f32): Remove.
32499 (vmaxnmvq_p_f32): Remove.
32500 (vminnmavq_p_f32): Remove.
32501 (vminnmvq_p_f32): Remove.
32502 (__arm_vminnmvq_f16): Remove.
32503 (__arm_vminnmavq_f16): Remove.
32504 (__arm_vmaxnmvq_f16): Remove.
32505 (__arm_vmaxnmavq_f16): Remove.
32506 (__arm_vminnmvq_f32): Remove.
32507 (__arm_vminnmavq_f32): Remove.
32508 (__arm_vmaxnmvq_f32): Remove.
32509 (__arm_vmaxnmavq_f32): Remove.
32510 (__arm_vmaxnmavq_p_f16): Remove.
32511 (__arm_vmaxnmvq_p_f16): Remove.
32512 (__arm_vminnmavq_p_f16): Remove.
32513 (__arm_vminnmvq_p_f16): Remove.
32514 (__arm_vmaxnmavq_p_f32): Remove.
32515 (__arm_vmaxnmvq_p_f32): Remove.
32516 (__arm_vminnmavq_p_f32): Remove.
32517 (__arm_vminnmvq_p_f32): Remove.
32518 (__arm_vminnmvq): Remove.
32519 (__arm_vminnmavq): Remove.
32520 (__arm_vmaxnmvq): Remove.
32521 (__arm_vmaxnmavq): Remove.
32522 (__arm_vmaxnmavq_p): Remove.
32523 (__arm_vmaxnmvq_p): Remove.
32524 (__arm_vminnmavq_p): Remove.
32525 (__arm_vminnmvq_p): Remove.
32526 (__arm_vmaxnmavq_m): Remove.
32527 (__arm_vmaxnmvq_m): Remove.
32529 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32531 * config/arm/arm-mve-builtins-functions.h
32532 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
32534 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32536 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
32537 (MVE_VMAXNMxV_MINNMxVQ_P): New.
32538 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
32539 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
32540 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
32541 (@mve_<mve_insn>q_f<mode>): ... this.
32542 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
32543 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
32544 (@mve_<mve_insn>q_p_f<mode>): ... this.
32546 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32548 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
32549 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
32550 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
32551 * config/arm/arm_mve.h (vminnmq): Remove.
32553 (vmaxnmq_m): Remove.
32554 (vminnmq_m): Remove.
32555 (vminnmq_x): Remove.
32556 (vmaxnmq_x): Remove.
32557 (vminnmq_f16): Remove.
32558 (vmaxnmq_f16): Remove.
32559 (vminnmq_f32): Remove.
32560 (vmaxnmq_f32): Remove.
32561 (vmaxnmq_m_f32): Remove.
32562 (vmaxnmq_m_f16): Remove.
32563 (vminnmq_m_f32): Remove.
32564 (vminnmq_m_f16): Remove.
32565 (vminnmq_x_f16): Remove.
32566 (vminnmq_x_f32): Remove.
32567 (vmaxnmq_x_f16): Remove.
32568 (vmaxnmq_x_f32): Remove.
32569 (__arm_vminnmq_f16): Remove.
32570 (__arm_vmaxnmq_f16): Remove.
32571 (__arm_vminnmq_f32): Remove.
32572 (__arm_vmaxnmq_f32): Remove.
32573 (__arm_vmaxnmq_m_f32): Remove.
32574 (__arm_vmaxnmq_m_f16): Remove.
32575 (__arm_vminnmq_m_f32): Remove.
32576 (__arm_vminnmq_m_f16): Remove.
32577 (__arm_vminnmq_x_f16): Remove.
32578 (__arm_vminnmq_x_f32): Remove.
32579 (__arm_vmaxnmq_x_f16): Remove.
32580 (__arm_vmaxnmq_x_f32): Remove.
32581 (__arm_vminnmq): Remove.
32582 (__arm_vmaxnmq): Remove.
32583 (__arm_vmaxnmq_m): Remove.
32584 (__arm_vminnmq_m): Remove.
32585 (__arm_vminnmq_x): Remove.
32586 (__arm_vmaxnmq_x): Remove.
32588 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32590 * config/arm/iterators.md (MAX_MIN_F): New.
32591 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
32592 (mve_insn): Add vmaxnm, vminnm.
32593 (max_min_f_str): New.
32594 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
32596 (@mve_<max_min_f_str>q_f<mode>): ... this.
32597 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
32598 (@mve_<mve_insn>q_m_f<mode>): ... this.
32600 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32602 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
32603 (smax<mode>3): Likewise.
32605 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32607 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
32608 (FUNCTION_PRED_P_S): New.
32609 (vmaxavq, vminavq, vmaxvq, vminvq): New.
32610 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
32612 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
32614 * config/arm/arm_mve.h (vminvq): Remove.
32616 (vminvq_p): Remove.
32617 (vmaxvq_p): Remove.
32618 (vminvq_u8): Remove.
32619 (vmaxvq_u8): Remove.
32620 (vminvq_s8): Remove.
32621 (vmaxvq_s8): Remove.
32622 (vminvq_u16): Remove.
32623 (vmaxvq_u16): Remove.
32624 (vminvq_s16): Remove.
32625 (vmaxvq_s16): Remove.
32626 (vminvq_u32): Remove.
32627 (vmaxvq_u32): Remove.
32628 (vminvq_s32): Remove.
32629 (vmaxvq_s32): Remove.
32630 (vminvq_p_u8): Remove.
32631 (vmaxvq_p_u8): Remove.
32632 (vminvq_p_s8): Remove.
32633 (vmaxvq_p_s8): Remove.
32634 (vminvq_p_u16): Remove.
32635 (vmaxvq_p_u16): Remove.
32636 (vminvq_p_s16): Remove.
32637 (vmaxvq_p_s16): Remove.
32638 (vminvq_p_u32): Remove.
32639 (vmaxvq_p_u32): Remove.
32640 (vminvq_p_s32): Remove.
32641 (vmaxvq_p_s32): Remove.
32642 (__arm_vminvq_u8): Remove.
32643 (__arm_vmaxvq_u8): Remove.
32644 (__arm_vminvq_s8): Remove.
32645 (__arm_vmaxvq_s8): Remove.
32646 (__arm_vminvq_u16): Remove.
32647 (__arm_vmaxvq_u16): Remove.
32648 (__arm_vminvq_s16): Remove.
32649 (__arm_vmaxvq_s16): Remove.
32650 (__arm_vminvq_u32): Remove.
32651 (__arm_vmaxvq_u32): Remove.
32652 (__arm_vminvq_s32): Remove.
32653 (__arm_vmaxvq_s32): Remove.
32654 (__arm_vminvq_p_u8): Remove.
32655 (__arm_vmaxvq_p_u8): Remove.
32656 (__arm_vminvq_p_s8): Remove.
32657 (__arm_vmaxvq_p_s8): Remove.
32658 (__arm_vminvq_p_u16): Remove.
32659 (__arm_vmaxvq_p_u16): Remove.
32660 (__arm_vminvq_p_s16): Remove.
32661 (__arm_vmaxvq_p_s16): Remove.
32662 (__arm_vminvq_p_u32): Remove.
32663 (__arm_vmaxvq_p_u32): Remove.
32664 (__arm_vminvq_p_s32): Remove.
32665 (__arm_vmaxvq_p_s32): Remove.
32666 (__arm_vminvq): Remove.
32667 (__arm_vmaxvq): Remove.
32668 (__arm_vminvq_p): Remove.
32669 (__arm_vmaxvq_p): Remove.
32672 (vminavq_p): Remove.
32673 (vmaxavq_p): Remove.
32674 (vminavq_s8): Remove.
32675 (vmaxavq_s8): Remove.
32676 (vminavq_s16): Remove.
32677 (vmaxavq_s16): Remove.
32678 (vminavq_s32): Remove.
32679 (vmaxavq_s32): Remove.
32680 (vminavq_p_s8): Remove.
32681 (vmaxavq_p_s8): Remove.
32682 (vminavq_p_s16): Remove.
32683 (vmaxavq_p_s16): Remove.
32684 (vminavq_p_s32): Remove.
32685 (vmaxavq_p_s32): Remove.
32686 (__arm_vminavq_s8): Remove.
32687 (__arm_vmaxavq_s8): Remove.
32688 (__arm_vminavq_s16): Remove.
32689 (__arm_vmaxavq_s16): Remove.
32690 (__arm_vminavq_s32): Remove.
32691 (__arm_vmaxavq_s32): Remove.
32692 (__arm_vminavq_p_s8): Remove.
32693 (__arm_vmaxavq_p_s8): Remove.
32694 (__arm_vminavq_p_s16): Remove.
32695 (__arm_vmaxavq_p_s16): Remove.
32696 (__arm_vminavq_p_s32): Remove.
32697 (__arm_vmaxavq_p_s32): Remove.
32698 (__arm_vminavq): Remove.
32699 (__arm_vmaxavq): Remove.
32700 (__arm_vminavq_p): Remove.
32701 (__arm_vmaxavq_p): Remove.
32703 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32705 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
32706 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
32707 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
32708 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
32709 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
32710 (@mve_<mve_insn>q_<supf><mode>): ... this.
32711 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
32712 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
32713 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
32715 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32717 * config/arm/arm-mve-builtins-functions.h (class
32718 unspec_mve_function_exact_insn_pred_p): New.
32720 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32722 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
32723 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
32725 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32727 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
32728 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
32730 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
32732 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
32734 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
32735 (ADJUST_REG_ALLOC_ORDER): Likewise.
32736 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
32738 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
32739 Upa rather than Upl for unpredicated movprfx alternatives.
32741 2023-05-09 Jeff Law <jlaw@ventanamicro>
32743 * config/h8300/testcompare.md: Add peephole2 which uses a memory
32744 load to set flags, thus eliminating a compare against zero.
32746 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32748 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
32749 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
32750 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
32751 * config/arm/arm_mve.h (vshlltq): Remove.
32753 (vshllbq_m): Remove.
32754 (vshlltq_m): Remove.
32755 (vshllbq_x): Remove.
32756 (vshlltq_x): Remove.
32757 (vshlltq_n_u8): Remove.
32758 (vshllbq_n_u8): Remove.
32759 (vshlltq_n_s8): Remove.
32760 (vshllbq_n_s8): Remove.
32761 (vshlltq_n_u16): Remove.
32762 (vshllbq_n_u16): Remove.
32763 (vshlltq_n_s16): Remove.
32764 (vshllbq_n_s16): Remove.
32765 (vshllbq_m_n_s8): Remove.
32766 (vshllbq_m_n_s16): Remove.
32767 (vshllbq_m_n_u8): Remove.
32768 (vshllbq_m_n_u16): Remove.
32769 (vshlltq_m_n_s8): Remove.
32770 (vshlltq_m_n_s16): Remove.
32771 (vshlltq_m_n_u8): Remove.
32772 (vshlltq_m_n_u16): Remove.
32773 (vshllbq_x_n_s8): Remove.
32774 (vshllbq_x_n_s16): Remove.
32775 (vshllbq_x_n_u8): Remove.
32776 (vshllbq_x_n_u16): Remove.
32777 (vshlltq_x_n_s8): Remove.
32778 (vshlltq_x_n_s16): Remove.
32779 (vshlltq_x_n_u8): Remove.
32780 (vshlltq_x_n_u16): Remove.
32781 (__arm_vshlltq_n_u8): Remove.
32782 (__arm_vshllbq_n_u8): Remove.
32783 (__arm_vshlltq_n_s8): Remove.
32784 (__arm_vshllbq_n_s8): Remove.
32785 (__arm_vshlltq_n_u16): Remove.
32786 (__arm_vshllbq_n_u16): Remove.
32787 (__arm_vshlltq_n_s16): Remove.
32788 (__arm_vshllbq_n_s16): Remove.
32789 (__arm_vshllbq_m_n_s8): Remove.
32790 (__arm_vshllbq_m_n_s16): Remove.
32791 (__arm_vshllbq_m_n_u8): Remove.
32792 (__arm_vshllbq_m_n_u16): Remove.
32793 (__arm_vshlltq_m_n_s8): Remove.
32794 (__arm_vshlltq_m_n_s16): Remove.
32795 (__arm_vshlltq_m_n_u8): Remove.
32796 (__arm_vshlltq_m_n_u16): Remove.
32797 (__arm_vshllbq_x_n_s8): Remove.
32798 (__arm_vshllbq_x_n_s16): Remove.
32799 (__arm_vshllbq_x_n_u8): Remove.
32800 (__arm_vshllbq_x_n_u16): Remove.
32801 (__arm_vshlltq_x_n_s8): Remove.
32802 (__arm_vshlltq_x_n_s16): Remove.
32803 (__arm_vshlltq_x_n_u8): Remove.
32804 (__arm_vshlltq_x_n_u16): Remove.
32805 (__arm_vshlltq): Remove.
32806 (__arm_vshllbq): Remove.
32807 (__arm_vshllbq_m): Remove.
32808 (__arm_vshlltq_m): Remove.
32809 (__arm_vshllbq_x): Remove.
32810 (__arm_vshlltq_x): Remove.
32812 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32814 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
32815 (VSHLLBQ_N, VSHLLTQ_N): Remove.
32817 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
32818 (VSHLLxQ_M_N): New.
32819 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
32820 (mve_vshlltq_n_<supf><mode>): Merge into ...
32821 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32822 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
32824 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32826 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32828 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
32829 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
32831 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32833 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
32834 (vqmovntq, vqmovunbq, vqmovuntq): New.
32835 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
32836 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
32837 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
32838 (vqmovntq, vqmovunbq, vqmovuntq): New.
32839 * config/arm/arm-mve-builtins.cc
32840 (function_instance::has_inactive_argument): Handle vmovnbq,
32841 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
32842 * config/arm/arm_mve.h (vqmovntq): Remove.
32843 (vqmovnbq): Remove.
32844 (vqmovnbq_m): Remove.
32845 (vqmovntq_m): Remove.
32846 (vqmovntq_u16): Remove.
32847 (vqmovnbq_u16): Remove.
32848 (vqmovntq_s16): Remove.
32849 (vqmovnbq_s16): Remove.
32850 (vqmovntq_u32): Remove.
32851 (vqmovnbq_u32): Remove.
32852 (vqmovntq_s32): Remove.
32853 (vqmovnbq_s32): Remove.
32854 (vqmovnbq_m_s16): Remove.
32855 (vqmovntq_m_s16): Remove.
32856 (vqmovnbq_m_u16): Remove.
32857 (vqmovntq_m_u16): Remove.
32858 (vqmovnbq_m_s32): Remove.
32859 (vqmovntq_m_s32): Remove.
32860 (vqmovnbq_m_u32): Remove.
32861 (vqmovntq_m_u32): Remove.
32862 (__arm_vqmovntq_u16): Remove.
32863 (__arm_vqmovnbq_u16): Remove.
32864 (__arm_vqmovntq_s16): Remove.
32865 (__arm_vqmovnbq_s16): Remove.
32866 (__arm_vqmovntq_u32): Remove.
32867 (__arm_vqmovnbq_u32): Remove.
32868 (__arm_vqmovntq_s32): Remove.
32869 (__arm_vqmovnbq_s32): Remove.
32870 (__arm_vqmovnbq_m_s16): Remove.
32871 (__arm_vqmovntq_m_s16): Remove.
32872 (__arm_vqmovnbq_m_u16): Remove.
32873 (__arm_vqmovntq_m_u16): Remove.
32874 (__arm_vqmovnbq_m_s32): Remove.
32875 (__arm_vqmovntq_m_s32): Remove.
32876 (__arm_vqmovnbq_m_u32): Remove.
32877 (__arm_vqmovntq_m_u32): Remove.
32878 (__arm_vqmovntq): Remove.
32879 (__arm_vqmovnbq): Remove.
32880 (__arm_vqmovnbq_m): Remove.
32881 (__arm_vqmovntq_m): Remove.
32884 (vmovnbq_m): Remove.
32885 (vmovntq_m): Remove.
32886 (vmovntq_u16): Remove.
32887 (vmovnbq_u16): Remove.
32888 (vmovntq_s16): Remove.
32889 (vmovnbq_s16): Remove.
32890 (vmovntq_u32): Remove.
32891 (vmovnbq_u32): Remove.
32892 (vmovntq_s32): Remove.
32893 (vmovnbq_s32): Remove.
32894 (vmovnbq_m_s16): Remove.
32895 (vmovntq_m_s16): Remove.
32896 (vmovnbq_m_u16): Remove.
32897 (vmovntq_m_u16): Remove.
32898 (vmovnbq_m_s32): Remove.
32899 (vmovntq_m_s32): Remove.
32900 (vmovnbq_m_u32): Remove.
32901 (vmovntq_m_u32): Remove.
32902 (__arm_vmovntq_u16): Remove.
32903 (__arm_vmovnbq_u16): Remove.
32904 (__arm_vmovntq_s16): Remove.
32905 (__arm_vmovnbq_s16): Remove.
32906 (__arm_vmovntq_u32): Remove.
32907 (__arm_vmovnbq_u32): Remove.
32908 (__arm_vmovntq_s32): Remove.
32909 (__arm_vmovnbq_s32): Remove.
32910 (__arm_vmovnbq_m_s16): Remove.
32911 (__arm_vmovntq_m_s16): Remove.
32912 (__arm_vmovnbq_m_u16): Remove.
32913 (__arm_vmovntq_m_u16): Remove.
32914 (__arm_vmovnbq_m_s32): Remove.
32915 (__arm_vmovntq_m_s32): Remove.
32916 (__arm_vmovnbq_m_u32): Remove.
32917 (__arm_vmovntq_m_u32): Remove.
32918 (__arm_vmovntq): Remove.
32919 (__arm_vmovnbq): Remove.
32920 (__arm_vmovnbq_m): Remove.
32921 (__arm_vmovntq_m): Remove.
32922 (vqmovuntq): Remove.
32923 (vqmovunbq): Remove.
32924 (vqmovunbq_m): Remove.
32925 (vqmovuntq_m): Remove.
32926 (vqmovuntq_s16): Remove.
32927 (vqmovunbq_s16): Remove.
32928 (vqmovuntq_s32): Remove.
32929 (vqmovunbq_s32): Remove.
32930 (vqmovunbq_m_s16): Remove.
32931 (vqmovuntq_m_s16): Remove.
32932 (vqmovunbq_m_s32): Remove.
32933 (vqmovuntq_m_s32): Remove.
32934 (__arm_vqmovuntq_s16): Remove.
32935 (__arm_vqmovunbq_s16): Remove.
32936 (__arm_vqmovuntq_s32): Remove.
32937 (__arm_vqmovunbq_s32): Remove.
32938 (__arm_vqmovunbq_m_s16): Remove.
32939 (__arm_vqmovuntq_m_s16): Remove.
32940 (__arm_vqmovunbq_m_s32): Remove.
32941 (__arm_vqmovuntq_m_s32): Remove.
32942 (__arm_vqmovuntq): Remove.
32943 (__arm_vqmovunbq): Remove.
32944 (__arm_vqmovunbq_m): Remove.
32945 (__arm_vqmovuntq_m): Remove.
32947 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32949 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
32950 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
32953 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
32955 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
32956 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
32957 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
32958 (mve_vqmovuntq_s<mode>): Merge into ...
32959 (@mve_<mve_insn>q_<supf><mode>): ... this.
32960 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
32961 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
32962 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
32963 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
32965 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32967 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
32968 (binary_move_narrow_unsigned): New.
32969 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
32970 (binary_move_narrow_unsigned): New.
32972 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32974 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
32975 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
32976 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
32977 (vrndpq, vrndq, vrndxq): New.
32978 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
32979 (vrndpq, vrndq, vrndxq): New.
32980 * config/arm/arm_mve.h (vrndxq): Remove.
32986 (vrndaq_m): Remove.
32987 (vrndmq_m): Remove.
32988 (vrndnq_m): Remove.
32989 (vrndpq_m): Remove.
32991 (vrndxq_m): Remove.
32993 (vrndnq_x): Remove.
32994 (vrndmq_x): Remove.
32995 (vrndpq_x): Remove.
32996 (vrndaq_x): Remove.
32997 (vrndxq_x): Remove.
32998 (vrndxq_f16): Remove.
32999 (vrndxq_f32): Remove.
33000 (vrndq_f16): Remove.
33001 (vrndq_f32): Remove.
33002 (vrndpq_f16): Remove.
33003 (vrndpq_f32): Remove.
33004 (vrndnq_f16): Remove.
33005 (vrndnq_f32): Remove.
33006 (vrndmq_f16): Remove.
33007 (vrndmq_f32): Remove.
33008 (vrndaq_f16): Remove.
33009 (vrndaq_f32): Remove.
33010 (vrndaq_m_f16): Remove.
33011 (vrndmq_m_f16): Remove.
33012 (vrndnq_m_f16): Remove.
33013 (vrndpq_m_f16): Remove.
33014 (vrndq_m_f16): Remove.
33015 (vrndxq_m_f16): Remove.
33016 (vrndaq_m_f32): Remove.
33017 (vrndmq_m_f32): Remove.
33018 (vrndnq_m_f32): Remove.
33019 (vrndpq_m_f32): Remove.
33020 (vrndq_m_f32): Remove.
33021 (vrndxq_m_f32): Remove.
33022 (vrndq_x_f16): Remove.
33023 (vrndq_x_f32): Remove.
33024 (vrndnq_x_f16): Remove.
33025 (vrndnq_x_f32): Remove.
33026 (vrndmq_x_f16): Remove.
33027 (vrndmq_x_f32): Remove.
33028 (vrndpq_x_f16): Remove.
33029 (vrndpq_x_f32): Remove.
33030 (vrndaq_x_f16): Remove.
33031 (vrndaq_x_f32): Remove.
33032 (vrndxq_x_f16): Remove.
33033 (vrndxq_x_f32): Remove.
33034 (__arm_vrndxq_f16): Remove.
33035 (__arm_vrndxq_f32): Remove.
33036 (__arm_vrndq_f16): Remove.
33037 (__arm_vrndq_f32): Remove.
33038 (__arm_vrndpq_f16): Remove.
33039 (__arm_vrndpq_f32): Remove.
33040 (__arm_vrndnq_f16): Remove.
33041 (__arm_vrndnq_f32): Remove.
33042 (__arm_vrndmq_f16): Remove.
33043 (__arm_vrndmq_f32): Remove.
33044 (__arm_vrndaq_f16): Remove.
33045 (__arm_vrndaq_f32): Remove.
33046 (__arm_vrndaq_m_f16): Remove.
33047 (__arm_vrndmq_m_f16): Remove.
33048 (__arm_vrndnq_m_f16): Remove.
33049 (__arm_vrndpq_m_f16): Remove.
33050 (__arm_vrndq_m_f16): Remove.
33051 (__arm_vrndxq_m_f16): Remove.
33052 (__arm_vrndaq_m_f32): Remove.
33053 (__arm_vrndmq_m_f32): Remove.
33054 (__arm_vrndnq_m_f32): Remove.
33055 (__arm_vrndpq_m_f32): Remove.
33056 (__arm_vrndq_m_f32): Remove.
33057 (__arm_vrndxq_m_f32): Remove.
33058 (__arm_vrndq_x_f16): Remove.
33059 (__arm_vrndq_x_f32): Remove.
33060 (__arm_vrndnq_x_f16): Remove.
33061 (__arm_vrndnq_x_f32): Remove.
33062 (__arm_vrndmq_x_f16): Remove.
33063 (__arm_vrndmq_x_f32): Remove.
33064 (__arm_vrndpq_x_f16): Remove.
33065 (__arm_vrndpq_x_f32): Remove.
33066 (__arm_vrndaq_x_f16): Remove.
33067 (__arm_vrndaq_x_f32): Remove.
33068 (__arm_vrndxq_x_f16): Remove.
33069 (__arm_vrndxq_x_f32): Remove.
33070 (__arm_vrndxq): Remove.
33071 (__arm_vrndq): Remove.
33072 (__arm_vrndpq): Remove.
33073 (__arm_vrndnq): Remove.
33074 (__arm_vrndmq): Remove.
33075 (__arm_vrndaq): Remove.
33076 (__arm_vrndaq_m): Remove.
33077 (__arm_vrndmq_m): Remove.
33078 (__arm_vrndnq_m): Remove.
33079 (__arm_vrndpq_m): Remove.
33080 (__arm_vrndq_m): Remove.
33081 (__arm_vrndxq_m): Remove.
33082 (__arm_vrndq_x): Remove.
33083 (__arm_vrndnq_x): Remove.
33084 (__arm_vrndmq_x): Remove.
33085 (__arm_vrndpq_x): Remove.
33086 (__arm_vrndaq_x): Remove.
33087 (__arm_vrndxq_x): Remove.
33089 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33091 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
33092 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
33093 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
33094 (vclzq, vqabsq, vqnegq): New.
33095 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
33096 (vqabsq, vqnegq): New.
33097 * config/arm/arm_mve.h (vabsq): Remove.
33100 (vabsq_f16): Remove.
33101 (vabsq_f32): Remove.
33102 (vabsq_s8): Remove.
33103 (vabsq_s16): Remove.
33104 (vabsq_s32): Remove.
33105 (vabsq_m_s8): Remove.
33106 (vabsq_m_s16): Remove.
33107 (vabsq_m_s32): Remove.
33108 (vabsq_m_f16): Remove.
33109 (vabsq_m_f32): Remove.
33110 (vabsq_x_s8): Remove.
33111 (vabsq_x_s16): Remove.
33112 (vabsq_x_s32): Remove.
33113 (vabsq_x_f16): Remove.
33114 (vabsq_x_f32): Remove.
33115 (__arm_vabsq_s8): Remove.
33116 (__arm_vabsq_s16): Remove.
33117 (__arm_vabsq_s32): Remove.
33118 (__arm_vabsq_m_s8): Remove.
33119 (__arm_vabsq_m_s16): Remove.
33120 (__arm_vabsq_m_s32): Remove.
33121 (__arm_vabsq_x_s8): Remove.
33122 (__arm_vabsq_x_s16): Remove.
33123 (__arm_vabsq_x_s32): Remove.
33124 (__arm_vabsq_f16): Remove.
33125 (__arm_vabsq_f32): Remove.
33126 (__arm_vabsq_m_f16): Remove.
33127 (__arm_vabsq_m_f32): Remove.
33128 (__arm_vabsq_x_f16): Remove.
33129 (__arm_vabsq_x_f32): Remove.
33130 (__arm_vabsq): Remove.
33131 (__arm_vabsq_m): Remove.
33132 (__arm_vabsq_x): Remove.
33136 (vnegq_f16): Remove.
33137 (vnegq_f32): Remove.
33138 (vnegq_s8): Remove.
33139 (vnegq_s16): Remove.
33140 (vnegq_s32): Remove.
33141 (vnegq_m_s8): Remove.
33142 (vnegq_m_s16): Remove.
33143 (vnegq_m_s32): Remove.
33144 (vnegq_m_f16): Remove.
33145 (vnegq_m_f32): Remove.
33146 (vnegq_x_s8): Remove.
33147 (vnegq_x_s16): Remove.
33148 (vnegq_x_s32): Remove.
33149 (vnegq_x_f16): Remove.
33150 (vnegq_x_f32): Remove.
33151 (__arm_vnegq_s8): Remove.
33152 (__arm_vnegq_s16): Remove.
33153 (__arm_vnegq_s32): Remove.
33154 (__arm_vnegq_m_s8): Remove.
33155 (__arm_vnegq_m_s16): Remove.
33156 (__arm_vnegq_m_s32): Remove.
33157 (__arm_vnegq_x_s8): Remove.
33158 (__arm_vnegq_x_s16): Remove.
33159 (__arm_vnegq_x_s32): Remove.
33160 (__arm_vnegq_f16): Remove.
33161 (__arm_vnegq_f32): Remove.
33162 (__arm_vnegq_m_f16): Remove.
33163 (__arm_vnegq_m_f32): Remove.
33164 (__arm_vnegq_x_f16): Remove.
33165 (__arm_vnegq_x_f32): Remove.
33166 (__arm_vnegq): Remove.
33167 (__arm_vnegq_m): Remove.
33168 (__arm_vnegq_x): Remove.
33172 (vclsq_s8): Remove.
33173 (vclsq_s16): Remove.
33174 (vclsq_s32): Remove.
33175 (vclsq_m_s8): Remove.
33176 (vclsq_m_s16): Remove.
33177 (vclsq_m_s32): Remove.
33178 (vclsq_x_s8): Remove.
33179 (vclsq_x_s16): Remove.
33180 (vclsq_x_s32): Remove.
33181 (__arm_vclsq_s8): Remove.
33182 (__arm_vclsq_s16): Remove.
33183 (__arm_vclsq_s32): Remove.
33184 (__arm_vclsq_m_s8): Remove.
33185 (__arm_vclsq_m_s16): Remove.
33186 (__arm_vclsq_m_s32): Remove.
33187 (__arm_vclsq_x_s8): Remove.
33188 (__arm_vclsq_x_s16): Remove.
33189 (__arm_vclsq_x_s32): Remove.
33190 (__arm_vclsq): Remove.
33191 (__arm_vclsq_m): Remove.
33192 (__arm_vclsq_x): Remove.
33196 (vclzq_s8): Remove.
33197 (vclzq_s16): Remove.
33198 (vclzq_s32): Remove.
33199 (vclzq_u8): Remove.
33200 (vclzq_u16): Remove.
33201 (vclzq_u32): Remove.
33202 (vclzq_m_u8): Remove.
33203 (vclzq_m_s8): Remove.
33204 (vclzq_m_u16): Remove.
33205 (vclzq_m_s16): Remove.
33206 (vclzq_m_u32): Remove.
33207 (vclzq_m_s32): Remove.
33208 (vclzq_x_s8): Remove.
33209 (vclzq_x_s16): Remove.
33210 (vclzq_x_s32): Remove.
33211 (vclzq_x_u8): Remove.
33212 (vclzq_x_u16): Remove.
33213 (vclzq_x_u32): Remove.
33214 (__arm_vclzq_s8): Remove.
33215 (__arm_vclzq_s16): Remove.
33216 (__arm_vclzq_s32): Remove.
33217 (__arm_vclzq_u8): Remove.
33218 (__arm_vclzq_u16): Remove.
33219 (__arm_vclzq_u32): Remove.
33220 (__arm_vclzq_m_u8): Remove.
33221 (__arm_vclzq_m_s8): Remove.
33222 (__arm_vclzq_m_u16): Remove.
33223 (__arm_vclzq_m_s16): Remove.
33224 (__arm_vclzq_m_u32): Remove.
33225 (__arm_vclzq_m_s32): Remove.
33226 (__arm_vclzq_x_s8): Remove.
33227 (__arm_vclzq_x_s16): Remove.
33228 (__arm_vclzq_x_s32): Remove.
33229 (__arm_vclzq_x_u8): Remove.
33230 (__arm_vclzq_x_u16): Remove.
33231 (__arm_vclzq_x_u32): Remove.
33232 (__arm_vclzq): Remove.
33233 (__arm_vclzq_m): Remove.
33234 (__arm_vclzq_x): Remove.
33237 (vqnegq_m): Remove.
33238 (vqabsq_m): Remove.
33239 (vqabsq_s8): Remove.
33240 (vqabsq_s16): Remove.
33241 (vqabsq_s32): Remove.
33242 (vqnegq_s8): Remove.
33243 (vqnegq_s16): Remove.
33244 (vqnegq_s32): Remove.
33245 (vqnegq_m_s8): Remove.
33246 (vqabsq_m_s8): Remove.
33247 (vqnegq_m_s16): Remove.
33248 (vqabsq_m_s16): Remove.
33249 (vqnegq_m_s32): Remove.
33250 (vqabsq_m_s32): Remove.
33251 (__arm_vqabsq_s8): Remove.
33252 (__arm_vqabsq_s16): Remove.
33253 (__arm_vqabsq_s32): Remove.
33254 (__arm_vqnegq_s8): Remove.
33255 (__arm_vqnegq_s16): Remove.
33256 (__arm_vqnegq_s32): Remove.
33257 (__arm_vqnegq_m_s8): Remove.
33258 (__arm_vqabsq_m_s8): Remove.
33259 (__arm_vqnegq_m_s16): Remove.
33260 (__arm_vqabsq_m_s16): Remove.
33261 (__arm_vqnegq_m_s32): Remove.
33262 (__arm_vqabsq_m_s32): Remove.
33263 (__arm_vqabsq): Remove.
33264 (__arm_vqnegq): Remove.
33265 (__arm_vqnegq_m): Remove.
33266 (__arm_vqabsq_m): Remove.
33268 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33270 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
33271 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
33272 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
33273 vrndm, vrndn, vrndp, vrnd, vrndx.
33274 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
33275 VQABSQ_M_S, VQNEGQ_M_S.
33277 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
33278 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
33279 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
33280 (@mve_<mve_insn>q_f<mode>): ... this.
33281 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
33282 (mve_v<absneg_str>q_f<mode>): ... this.
33283 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
33284 (mve_v<absneg_str>q_s<mode>): ... this.
33285 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
33286 (@mve_<mve_insn>q_<supf><mode>): ... this.
33287 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
33288 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
33289 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
33290 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
33291 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
33292 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
33293 (mve_vrndxq_m_f<mode>): Merge into ...
33294 (@mve_<mve_insn>q_m_f<mode>): ... this.
33296 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
33298 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
33299 * config/arm/arm-mve-builtins-shapes.h (unary): New.
33301 2023-05-09 Jakub Jelinek <jakub@redhat.com>
33303 * mux-utils.h: Fix comment typo, avoides -> avoids.
33305 2023-05-09 Jakub Jelinek <jakub@redhat.com>
33307 PR tree-optimization/109778
33308 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
33309 wi::zext (x, width) rather than x if width != precision, rather
33310 than using wi::zext (right, width) after the shift.
33311 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
33312 of wi::lrotate or wi::rrotate.
33314 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
33316 * genmatch.cc (get_out_file): Make static and rename to ...
33317 (choose_output): ... this. Reimplement. Update all uses ...
33318 (decision_tree::gen): ... here and ...
33321 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
33323 * genmatch.cc (showUsage): Reimplement as ...
33324 (usage): ...this. Adjust all uses.
33325 (main): Print usage when no arguments. Add missing 'return 1'.
33327 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
33329 * genmatch.cc (header_file): Make static.
33330 (emit_func): Rename to...
33331 (fp_decl): ... this. Adjust all uses.
33332 (fp_decl_done): New function. Use it...
33333 (decision_tree::gen): ... here and...
33334 (write_predicate): ... here.
33337 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
33339 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
33342 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
33343 Uros Bizjak <ubizjak@gmail.com>
33345 * config/i386/i386.md (any_or_plus): Move definition earlier.
33346 (*insvti_highpart_1): New define_insn_and_split to overwrite
33347 (insv) the highpart of a TImode register/memory.
33349 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
33351 * auto-profile.cc (auto_profile): Check todo from early_inline
33352 to see if cleanup_tree_vfg needs to be called.
33353 (early_inline): Return todo from early_inliner.
33355 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
33357 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
33359 (pass_vsetvl::get_block_info): New.
33360 (pass_vsetvl::update_vector_info): New.
33361 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
33362 (pass_vsetvl::compute_local_backward_infos): Ditto.
33363 (pass_vsetvl::transfer_before): Ditto.
33364 (pass_vsetvl::transfer_after): Ditto.
33365 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
33366 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
33367 (pass_vsetvl::cleanup_insns): Ditto.
33368 (pass_vsetvl::compute_local_backward_infos): Use
33369 update_vector_info.
33371 2023-05-08 Jeff Law <jlaw@ventanamicro>
33373 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
33375 2023-05-08 Richard Biener <rguenther@suse.de>
33376 Michael Meissner <meissner@linux.ibm.com>
33378 PR middle-end/108623
33379 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
33380 Align bit fields > 1 bit to at least an 8-bit boundary.
33382 2023-05-08 Andrew Pinski <apinski@marvell.com>
33384 PR tree-optimization/109424
33385 PR tree-optimization/59424
33386 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
33387 (factor_out_conditional_operation): This and add support for all unary
33389 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
33390 to call factor_out_conditional_operation instead.
33392 2023-05-08 Andrew Pinski <apinski@marvell.com>
33394 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
33395 over factor_out_conditional_conversion.
33397 2023-05-08 Andrew Pinski <apinski@marvell.com>
33399 PR tree-optimization/49959
33400 PR tree-optimization/103771
33401 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
33402 Diamond shapped bb form for factor_out_conditional_conversion.
33404 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33406 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
33407 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
33408 (riscv_vector_get_mask_mode): Ditto.
33409 (get_mask_policy_no_pred): Ditto.
33410 (get_tail_policy_no_pred): Ditto.
33411 (get_mask_mode): New function.
33412 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
33413 (get_tail_policy_no_pred): Ditto.
33414 (riscv_vector_mask_mode_p): Ditto.
33415 (riscv_vector_get_mask_mode): Ditto.
33416 (get_mask_mode): New function.
33417 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
33419 (get_tail_policy_for_pred): Ditto.
33420 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
33421 (get_mask_policy_for_pred): Ditto
33422 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
33424 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
33426 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
33427 (riscv_select_multilib): New.
33428 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
33429 also handle select_by_abi.
33430 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
33431 to select_by_abi_arch_cmodel from 1.
33432 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
33433 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
33435 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
33437 * Makefile.in: (gimple-match-head.o-warn): Remove.
33438 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
33439 gimple-match-exports.cc.
33440 (gimple-match-auto.h): Only depend on s-gimple-match.
33441 (generic-match-auto.h): Likewise.
33443 2023-05-08 Andrew Pinski <apinski@marvell.com>
33445 PR tree-optimization/109691
33446 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
33448 If the removed statement can throw, have need_eh_cleanup
33449 include the bb of that statement.
33450 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
33451 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
33453 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
33454 Initialize dceworklist instead of stmts_to_remove.
33455 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
33456 Destore dceworklist instead of stmts_to_remove.
33457 (substitute_and_fold_dom_walker::before_dom_children):
33458 Set dceworklist instead of adding to stmts_to_remove.
33459 (substitute_and_fold_engine::substitute_and_fold):
33460 Call simple_dce_from_worklist instead of poping
33462 Don't update the stat on removal statements.
33464 2023-05-07 Andrew Pinski <apinski@marvell.com>
33467 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
33468 Change argument type to aarch64_feature_flags.
33469 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
33470 constructor argument type to aarch64_feature_flags.
33471 Change m_old_asm_isa_flags to be aarch64_feature_flags.
33473 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
33475 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
33476 more parallel code if can_create_pseudo_p.
33478 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
33481 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
33482 immediately before moving a multi-word register by parts.
33484 2023-05-06 Jeff Law <jlaw@ventanamicro>
33486 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
33488 2023-05-06 Michael Collison <collison@rivosinc.com>
33490 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
33491 Check that GET_MODE_NUNITS is a multiple of 2.
33493 2023-05-06 Michael Collison <collison@rivosinc.com>
33495 * config/riscv/riscv.cc
33496 (riscv_estimated_poly_value): Implement
33497 TARGET_ESTIMATED_POLY_VALUE.
33498 (riscv_preferred_simd_mode): Implement
33499 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
33500 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
33501 (riscv_empty_mask_is_expensive): Implement
33502 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
33503 (riscv_vectorize_create_costs): Implement
33504 TARGET_VECTORIZE_CREATE_COSTS.
33505 (riscv_support_vector_misalignment): Implement
33506 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
33507 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
33508 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
33509 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
33510 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
33512 2023-05-06 Jeff Law <jlaw@ventanamicro>
33514 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
33515 duplicate definition.
33517 2023-05-06 Michael Collison <collison@rivosinc.com>
33519 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
33520 (riscv_vector_preferred_simd_mode): Ditto.
33521 (get_mask_policy_no_pred): Ditto.
33522 (get_tail_policy_no_pred): Ditto.
33523 (riscv_vector_mask_mode_p): Ditto.
33524 (riscv_vector_get_mask_mode): Ditto.
33526 2023-05-06 Michael Collison <collison@rivosinc.com>
33528 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
33529 Remove static declaration to to make externally visible.
33530 (get_mask_policy_for_pred): Ditto.
33531 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
33532 New external declaration.
33533 (get_mask_policy_for_pred): Ditto.
33535 2023-05-06 Michael Collison <collison@rivosinc.com>
33537 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
33538 (riscv_vector_get_mask_mode): Ditto.
33539 (get_mask_policy_no_pred): Ditto.
33540 (get_tail_policy_no_pred): Ditto.
33542 2023-05-06 Xi Ruoyao <xry111@xry111.site>
33544 * config/loongarch/loongarch.h (struct machine_function): Add
33545 reg_is_wrapped_separately array for register wrapping
33547 * config/loongarch/loongarch.cc
33548 (loongarch_get_separate_components): New function.
33549 (loongarch_components_for_bb): Likewise.
33550 (loongarch_disqualify_components): Likewise.
33551 (loongarch_process_components): Likewise.
33552 (loongarch_emit_prologue_components): Likewise.
33553 (loongarch_emit_epilogue_components): Likewise.
33554 (loongarch_set_handled_components): Likewise.
33555 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
33556 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
33557 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
33558 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
33559 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
33560 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
33561 (loongarch_for_each_saved_reg): Skip registers that are wrapped
33564 2023-05-06 Xi Ruoyao <xry111@xry111.site>
33567 * Makefile.in (s-macro_list): Pass -nostdinc to
33570 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33572 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
33573 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
33574 (preferred_simd_mode): Ditto.
33575 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
33576 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
33577 (riscv_preferred_simd_mode): New function.
33578 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
33579 * config/riscv/vector.md: Add autovec.md.
33580 * config/riscv/autovec.md: New file.
33582 2023-05-06 Jakub Jelinek <jakub@redhat.com>
33584 * real.h (dconst_pi): Define.
33585 (dconst_e_ptr): Formatting fix.
33586 (dconst_pi_ptr): Declare.
33587 * real.cc (dconst_pi_ptr): New function.
33588 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
33589 boundaries range with range computed from sin/cos of the particular
33590 bounds if the argument range is shorter than 2*pi.
33591 (cfn_sincos::op1_range): Take bulps into account when determining
33592 which result ranges are always invalid or behave like known NAN.
33594 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
33596 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
33597 pass type to vrange_storage::equal_p.
33598 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
33599 (irange_storage::equal_p): Same.
33600 (frange_storage::equal_p): Same.
33601 * value-range-storage.h (class frange_storage): Same.
33603 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33606 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
33607 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
33609 2023-05-06 liuhongt <hongtao.liu@intel.com>
33611 * combine.cc (maybe_swap_commutative_operands): Canonicalize
33612 vec_merge when mask is constant.
33613 * doc/md.texi: Document vec_merge canonicalization.
33615 2023-05-06 Jakub Jelinek <jakub@redhat.com>
33617 * value-range.h (frange_arithmetic): Declare.
33618 * range-op-float.cc (frange_arithmetic): No longer static.
33619 * gimple-range-op.cc (frange_mpfr_arg1): New function.
33620 (cfn_sqrt::fold_range): Intersect the generic boundaries range
33621 with range computed from sqrt of the particular bounds.
33622 (cfn_sqrt::op1_range): Intersect the generic boundaries range
33623 with range computed from squared particular bounds.
33625 2023-05-06 Jakub Jelinek <jakub@redhat.com>
33627 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
33628 earlier with helper variables also renamed.
33629 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
33630 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
33631 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
33633 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
33635 * config/cris/cris.md (splitop): Add PLUS.
33636 * config/cris/cris.cc (cris_split_constant): Also handle
33637 PLUS when a split into two insns may be useful.
33639 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
33641 * config/cris/cris.md (movandsplit1): New define_peephole2.
33643 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
33645 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
33647 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
33649 * doc/md.texi (define_peephole2): Document order of scanning.
33651 2023-05-05 Pan Li <pan2.li@intel.com>
33652 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33654 * config/riscv/vector.md: Allow const as the operand of RVV
33655 indexed load/store.
33657 2023-05-05 Pan Li <pan2.li@intel.com>
33659 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
33660 consumed by simplify_rtx.
33662 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33664 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
33665 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
33666 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
33667 * config/arm/arm_mve.h (vshrq): Remove.
33669 (vrshrq_m): Remove.
33671 (vrshrq_x): Remove.
33673 (vshrq_n_s8): Remove.
33674 (vshrq_n_s16): Remove.
33675 (vshrq_n_s32): Remove.
33676 (vshrq_n_u8): Remove.
33677 (vshrq_n_u16): Remove.
33678 (vshrq_n_u32): Remove.
33679 (vrshrq_n_u8): Remove.
33680 (vrshrq_n_s8): Remove.
33681 (vrshrq_n_u16): Remove.
33682 (vrshrq_n_s16): Remove.
33683 (vrshrq_n_u32): Remove.
33684 (vrshrq_n_s32): Remove.
33685 (vrshrq_m_n_s8): Remove.
33686 (vrshrq_m_n_s32): Remove.
33687 (vrshrq_m_n_s16): Remove.
33688 (vrshrq_m_n_u8): Remove.
33689 (vrshrq_m_n_u32): Remove.
33690 (vrshrq_m_n_u16): Remove.
33691 (vshrq_m_n_s8): Remove.
33692 (vshrq_m_n_s32): Remove.
33693 (vshrq_m_n_s16): Remove.
33694 (vshrq_m_n_u8): Remove.
33695 (vshrq_m_n_u32): Remove.
33696 (vshrq_m_n_u16): Remove.
33697 (vrshrq_x_n_s8): Remove.
33698 (vrshrq_x_n_s16): Remove.
33699 (vrshrq_x_n_s32): Remove.
33700 (vrshrq_x_n_u8): Remove.
33701 (vrshrq_x_n_u16): Remove.
33702 (vrshrq_x_n_u32): Remove.
33703 (vshrq_x_n_s8): Remove.
33704 (vshrq_x_n_s16): Remove.
33705 (vshrq_x_n_s32): Remove.
33706 (vshrq_x_n_u8): Remove.
33707 (vshrq_x_n_u16): Remove.
33708 (vshrq_x_n_u32): Remove.
33709 (__arm_vshrq_n_s8): Remove.
33710 (__arm_vshrq_n_s16): Remove.
33711 (__arm_vshrq_n_s32): Remove.
33712 (__arm_vshrq_n_u8): Remove.
33713 (__arm_vshrq_n_u16): Remove.
33714 (__arm_vshrq_n_u32): Remove.
33715 (__arm_vrshrq_n_u8): Remove.
33716 (__arm_vrshrq_n_s8): Remove.
33717 (__arm_vrshrq_n_u16): Remove.
33718 (__arm_vrshrq_n_s16): Remove.
33719 (__arm_vrshrq_n_u32): Remove.
33720 (__arm_vrshrq_n_s32): Remove.
33721 (__arm_vrshrq_m_n_s8): Remove.
33722 (__arm_vrshrq_m_n_s32): Remove.
33723 (__arm_vrshrq_m_n_s16): Remove.
33724 (__arm_vrshrq_m_n_u8): Remove.
33725 (__arm_vrshrq_m_n_u32): Remove.
33726 (__arm_vrshrq_m_n_u16): Remove.
33727 (__arm_vshrq_m_n_s8): Remove.
33728 (__arm_vshrq_m_n_s32): Remove.
33729 (__arm_vshrq_m_n_s16): Remove.
33730 (__arm_vshrq_m_n_u8): Remove.
33731 (__arm_vshrq_m_n_u32): Remove.
33732 (__arm_vshrq_m_n_u16): Remove.
33733 (__arm_vrshrq_x_n_s8): Remove.
33734 (__arm_vrshrq_x_n_s16): Remove.
33735 (__arm_vrshrq_x_n_s32): Remove.
33736 (__arm_vrshrq_x_n_u8): Remove.
33737 (__arm_vrshrq_x_n_u16): Remove.
33738 (__arm_vrshrq_x_n_u32): Remove.
33739 (__arm_vshrq_x_n_s8): Remove.
33740 (__arm_vshrq_x_n_s16): Remove.
33741 (__arm_vshrq_x_n_s32): Remove.
33742 (__arm_vshrq_x_n_u8): Remove.
33743 (__arm_vshrq_x_n_u16): Remove.
33744 (__arm_vshrq_x_n_u32): Remove.
33745 (__arm_vshrq): Remove.
33746 (__arm_vrshrq): Remove.
33747 (__arm_vrshrq_m): Remove.
33748 (__arm_vshrq_m): Remove.
33749 (__arm_vrshrq_x): Remove.
33750 (__arm_vshrq_x): Remove.
33752 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33754 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
33755 (mve_insn): Add vrshr, vshr.
33756 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
33757 (mve_vrshrq_n_<supf><mode>): Merge into ...
33758 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
33759 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
33761 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
33763 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33765 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
33766 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
33768 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33770 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
33771 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
33772 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
33773 (vqrshrunbq, vqrshruntq): New.
33774 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
33775 (vqrshrunbq, vqrshruntq): New.
33776 * config/arm/arm-mve-builtins.cc
33777 (function_instance::has_inactive_argument): Handle vqshrunbq,
33778 vqshruntq, vqrshrunbq, vqrshruntq.
33779 * config/arm/arm_mve.h (vqrshrunbq): Remove.
33780 (vqrshruntq): Remove.
33781 (vqrshrunbq_m): Remove.
33782 (vqrshruntq_m): Remove.
33783 (vqrshrunbq_n_s16): Remove.
33784 (vqrshrunbq_n_s32): Remove.
33785 (vqrshruntq_n_s16): Remove.
33786 (vqrshruntq_n_s32): Remove.
33787 (vqrshrunbq_m_n_s32): Remove.
33788 (vqrshrunbq_m_n_s16): Remove.
33789 (vqrshruntq_m_n_s32): Remove.
33790 (vqrshruntq_m_n_s16): Remove.
33791 (__arm_vqrshrunbq_n_s16): Remove.
33792 (__arm_vqrshrunbq_n_s32): Remove.
33793 (__arm_vqrshruntq_n_s16): Remove.
33794 (__arm_vqrshruntq_n_s32): Remove.
33795 (__arm_vqrshrunbq_m_n_s32): Remove.
33796 (__arm_vqrshrunbq_m_n_s16): Remove.
33797 (__arm_vqrshruntq_m_n_s32): Remove.
33798 (__arm_vqrshruntq_m_n_s16): Remove.
33799 (__arm_vqrshrunbq): Remove.
33800 (__arm_vqrshruntq): Remove.
33801 (__arm_vqrshrunbq_m): Remove.
33802 (__arm_vqrshruntq_m): Remove.
33803 (vqshrunbq): Remove.
33804 (vqshruntq): Remove.
33805 (vqshrunbq_m): Remove.
33806 (vqshruntq_m): Remove.
33807 (vqshrunbq_n_s16): Remove.
33808 (vqshruntq_n_s16): Remove.
33809 (vqshrunbq_n_s32): Remove.
33810 (vqshruntq_n_s32): Remove.
33811 (vqshrunbq_m_n_s32): Remove.
33812 (vqshrunbq_m_n_s16): Remove.
33813 (vqshruntq_m_n_s32): Remove.
33814 (vqshruntq_m_n_s16): Remove.
33815 (__arm_vqshrunbq_n_s16): Remove.
33816 (__arm_vqshruntq_n_s16): Remove.
33817 (__arm_vqshrunbq_n_s32): Remove.
33818 (__arm_vqshruntq_n_s32): Remove.
33819 (__arm_vqshrunbq_m_n_s32): Remove.
33820 (__arm_vqshrunbq_m_n_s16): Remove.
33821 (__arm_vqshruntq_m_n_s32): Remove.
33822 (__arm_vqshruntq_m_n_s16): Remove.
33823 (__arm_vqshrunbq): Remove.
33824 (__arm_vqshruntq): Remove.
33825 (__arm_vqshrunbq_m): Remove.
33826 (__arm_vqshruntq_m): Remove.
33828 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33830 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
33831 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
33832 (MVE_SHRN_M_N): Likewise.
33833 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
33834 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
33836 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
33837 (mve_vqrshruntq_n_s<mode>): Remove.
33838 (mve_vqshrunbq_n_s<mode>): Remove.
33839 (mve_vqshruntq_n_s<mode>): Remove.
33840 (mve_vqrshrunbq_m_n_s<mode>): Remove.
33841 (mve_vqrshruntq_m_n_s<mode>): Remove.
33842 (mve_vqshrunbq_m_n_s<mode>): Remove.
33843 (mve_vqshruntq_m_n_s<mode>): Remove.
33845 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33847 * config/arm/arm-mve-builtins-shapes.cc
33848 (binary_rshift_narrow_unsigned): New.
33849 * config/arm/arm-mve-builtins-shapes.h
33850 (binary_rshift_narrow_unsigned): New.
33852 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33854 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
33855 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
33856 (vqrshrnbq, vqrshrntq): New.
33857 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
33858 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
33860 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
33861 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
33862 * config/arm/arm-mve-builtins.cc
33863 (function_instance::has_inactive_argument): Handle vshrnbq,
33864 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
33866 * config/arm/arm_mve.h (vshrnbq): Remove.
33868 (vshrnbq_m): Remove.
33869 (vshrntq_m): Remove.
33870 (vshrnbq_n_s16): Remove.
33871 (vshrntq_n_s16): Remove.
33872 (vshrnbq_n_u16): Remove.
33873 (vshrntq_n_u16): Remove.
33874 (vshrnbq_n_s32): Remove.
33875 (vshrntq_n_s32): Remove.
33876 (vshrnbq_n_u32): Remove.
33877 (vshrntq_n_u32): Remove.
33878 (vshrnbq_m_n_s32): Remove.
33879 (vshrnbq_m_n_s16): Remove.
33880 (vshrnbq_m_n_u32): Remove.
33881 (vshrnbq_m_n_u16): Remove.
33882 (vshrntq_m_n_s32): Remove.
33883 (vshrntq_m_n_s16): Remove.
33884 (vshrntq_m_n_u32): Remove.
33885 (vshrntq_m_n_u16): Remove.
33886 (__arm_vshrnbq_n_s16): Remove.
33887 (__arm_vshrntq_n_s16): Remove.
33888 (__arm_vshrnbq_n_u16): Remove.
33889 (__arm_vshrntq_n_u16): Remove.
33890 (__arm_vshrnbq_n_s32): Remove.
33891 (__arm_vshrntq_n_s32): Remove.
33892 (__arm_vshrnbq_n_u32): Remove.
33893 (__arm_vshrntq_n_u32): Remove.
33894 (__arm_vshrnbq_m_n_s32): Remove.
33895 (__arm_vshrnbq_m_n_s16): Remove.
33896 (__arm_vshrnbq_m_n_u32): Remove.
33897 (__arm_vshrnbq_m_n_u16): Remove.
33898 (__arm_vshrntq_m_n_s32): Remove.
33899 (__arm_vshrntq_m_n_s16): Remove.
33900 (__arm_vshrntq_m_n_u32): Remove.
33901 (__arm_vshrntq_m_n_u16): Remove.
33902 (__arm_vshrnbq): Remove.
33903 (__arm_vshrntq): Remove.
33904 (__arm_vshrnbq_m): Remove.
33905 (__arm_vshrntq_m): Remove.
33906 (vrshrnbq): Remove.
33907 (vrshrntq): Remove.
33908 (vrshrnbq_m): Remove.
33909 (vrshrntq_m): Remove.
33910 (vrshrnbq_n_s16): Remove.
33911 (vrshrntq_n_s16): Remove.
33912 (vrshrnbq_n_u16): Remove.
33913 (vrshrntq_n_u16): Remove.
33914 (vrshrnbq_n_s32): Remove.
33915 (vrshrntq_n_s32): Remove.
33916 (vrshrnbq_n_u32): Remove.
33917 (vrshrntq_n_u32): Remove.
33918 (vrshrnbq_m_n_s32): Remove.
33919 (vrshrnbq_m_n_s16): Remove.
33920 (vrshrnbq_m_n_u32): Remove.
33921 (vrshrnbq_m_n_u16): Remove.
33922 (vrshrntq_m_n_s32): Remove.
33923 (vrshrntq_m_n_s16): Remove.
33924 (vrshrntq_m_n_u32): Remove.
33925 (vrshrntq_m_n_u16): Remove.
33926 (__arm_vrshrnbq_n_s16): Remove.
33927 (__arm_vrshrntq_n_s16): Remove.
33928 (__arm_vrshrnbq_n_u16): Remove.
33929 (__arm_vrshrntq_n_u16): Remove.
33930 (__arm_vrshrnbq_n_s32): Remove.
33931 (__arm_vrshrntq_n_s32): Remove.
33932 (__arm_vrshrnbq_n_u32): Remove.
33933 (__arm_vrshrntq_n_u32): Remove.
33934 (__arm_vrshrnbq_m_n_s32): Remove.
33935 (__arm_vrshrnbq_m_n_s16): Remove.
33936 (__arm_vrshrnbq_m_n_u32): Remove.
33937 (__arm_vrshrnbq_m_n_u16): Remove.
33938 (__arm_vrshrntq_m_n_s32): Remove.
33939 (__arm_vrshrntq_m_n_s16): Remove.
33940 (__arm_vrshrntq_m_n_u32): Remove.
33941 (__arm_vrshrntq_m_n_u16): Remove.
33942 (__arm_vrshrnbq): Remove.
33943 (__arm_vrshrntq): Remove.
33944 (__arm_vrshrnbq_m): Remove.
33945 (__arm_vrshrntq_m): Remove.
33946 (vqshrnbq): Remove.
33947 (vqshrntq): Remove.
33948 (vqshrnbq_m): Remove.
33949 (vqshrntq_m): Remove.
33950 (vqshrnbq_n_s16): Remove.
33951 (vqshrntq_n_s16): Remove.
33952 (vqshrnbq_n_u16): Remove.
33953 (vqshrntq_n_u16): Remove.
33954 (vqshrnbq_n_s32): Remove.
33955 (vqshrntq_n_s32): Remove.
33956 (vqshrnbq_n_u32): Remove.
33957 (vqshrntq_n_u32): Remove.
33958 (vqshrnbq_m_n_s32): Remove.
33959 (vqshrnbq_m_n_s16): Remove.
33960 (vqshrnbq_m_n_u32): Remove.
33961 (vqshrnbq_m_n_u16): Remove.
33962 (vqshrntq_m_n_s32): Remove.
33963 (vqshrntq_m_n_s16): Remove.
33964 (vqshrntq_m_n_u32): Remove.
33965 (vqshrntq_m_n_u16): Remove.
33966 (__arm_vqshrnbq_n_s16): Remove.
33967 (__arm_vqshrntq_n_s16): Remove.
33968 (__arm_vqshrnbq_n_u16): Remove.
33969 (__arm_vqshrntq_n_u16): Remove.
33970 (__arm_vqshrnbq_n_s32): Remove.
33971 (__arm_vqshrntq_n_s32): Remove.
33972 (__arm_vqshrnbq_n_u32): Remove.
33973 (__arm_vqshrntq_n_u32): Remove.
33974 (__arm_vqshrnbq_m_n_s32): Remove.
33975 (__arm_vqshrnbq_m_n_s16): Remove.
33976 (__arm_vqshrnbq_m_n_u32): Remove.
33977 (__arm_vqshrnbq_m_n_u16): Remove.
33978 (__arm_vqshrntq_m_n_s32): Remove.
33979 (__arm_vqshrntq_m_n_s16): Remove.
33980 (__arm_vqshrntq_m_n_u32): Remove.
33981 (__arm_vqshrntq_m_n_u16): Remove.
33982 (__arm_vqshrnbq): Remove.
33983 (__arm_vqshrntq): Remove.
33984 (__arm_vqshrnbq_m): Remove.
33985 (__arm_vqshrntq_m): Remove.
33986 (vqrshrnbq): Remove.
33987 (vqrshrntq): Remove.
33988 (vqrshrnbq_m): Remove.
33989 (vqrshrntq_m): Remove.
33990 (vqrshrnbq_n_s16): Remove.
33991 (vqrshrnbq_n_u16): Remove.
33992 (vqrshrnbq_n_s32): Remove.
33993 (vqrshrnbq_n_u32): Remove.
33994 (vqrshrntq_n_s16): Remove.
33995 (vqrshrntq_n_u16): Remove.
33996 (vqrshrntq_n_s32): Remove.
33997 (vqrshrntq_n_u32): Remove.
33998 (vqrshrnbq_m_n_s32): Remove.
33999 (vqrshrnbq_m_n_s16): Remove.
34000 (vqrshrnbq_m_n_u32): Remove.
34001 (vqrshrnbq_m_n_u16): Remove.
34002 (vqrshrntq_m_n_s32): Remove.
34003 (vqrshrntq_m_n_s16): Remove.
34004 (vqrshrntq_m_n_u32): Remove.
34005 (vqrshrntq_m_n_u16): Remove.
34006 (__arm_vqrshrnbq_n_s16): Remove.
34007 (__arm_vqrshrnbq_n_u16): Remove.
34008 (__arm_vqrshrnbq_n_s32): Remove.
34009 (__arm_vqrshrnbq_n_u32): Remove.
34010 (__arm_vqrshrntq_n_s16): Remove.
34011 (__arm_vqrshrntq_n_u16): Remove.
34012 (__arm_vqrshrntq_n_s32): Remove.
34013 (__arm_vqrshrntq_n_u32): Remove.
34014 (__arm_vqrshrnbq_m_n_s32): Remove.
34015 (__arm_vqrshrnbq_m_n_s16): Remove.
34016 (__arm_vqrshrnbq_m_n_u32): Remove.
34017 (__arm_vqrshrnbq_m_n_u16): Remove.
34018 (__arm_vqrshrntq_m_n_s32): Remove.
34019 (__arm_vqrshrntq_m_n_s16): Remove.
34020 (__arm_vqrshrntq_m_n_u32): Remove.
34021 (__arm_vqrshrntq_m_n_u16): Remove.
34022 (__arm_vqrshrnbq): Remove.
34023 (__arm_vqrshrntq): Remove.
34024 (__arm_vqrshrnbq_m): Remove.
34025 (__arm_vqrshrntq_m): Remove.
34027 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34029 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
34030 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
34031 vrshrnt, vshrnb, vshrnt.
34033 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
34034 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
34035 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
34036 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
34037 (mve_vshrntq_n_<supf><mode>): Merge into ...
34038 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34039 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
34040 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
34041 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
34042 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
34044 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34046 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34048 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
34050 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
34052 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34054 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
34055 (vmaxq, vminq): New.
34056 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
34057 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
34058 * config/arm/arm_mve.h (vminq): Remove.
34064 (vminq_u8): Remove.
34065 (vmaxq_u8): Remove.
34066 (vminq_s8): Remove.
34067 (vmaxq_s8): Remove.
34068 (vminq_u16): Remove.
34069 (vmaxq_u16): Remove.
34070 (vminq_s16): Remove.
34071 (vmaxq_s16): Remove.
34072 (vminq_u32): Remove.
34073 (vmaxq_u32): Remove.
34074 (vminq_s32): Remove.
34075 (vmaxq_s32): Remove.
34076 (vmaxq_m_s8): Remove.
34077 (vmaxq_m_s32): Remove.
34078 (vmaxq_m_s16): Remove.
34079 (vmaxq_m_u8): Remove.
34080 (vmaxq_m_u32): Remove.
34081 (vmaxq_m_u16): Remove.
34082 (vminq_m_s8): Remove.
34083 (vminq_m_s32): Remove.
34084 (vminq_m_s16): Remove.
34085 (vminq_m_u8): Remove.
34086 (vminq_m_u32): Remove.
34087 (vminq_m_u16): Remove.
34088 (vminq_x_s8): Remove.
34089 (vminq_x_s16): Remove.
34090 (vminq_x_s32): Remove.
34091 (vminq_x_u8): Remove.
34092 (vminq_x_u16): Remove.
34093 (vminq_x_u32): Remove.
34094 (vmaxq_x_s8): Remove.
34095 (vmaxq_x_s16): Remove.
34096 (vmaxq_x_s32): Remove.
34097 (vmaxq_x_u8): Remove.
34098 (vmaxq_x_u16): Remove.
34099 (vmaxq_x_u32): Remove.
34100 (__arm_vminq_u8): Remove.
34101 (__arm_vmaxq_u8): Remove.
34102 (__arm_vminq_s8): Remove.
34103 (__arm_vmaxq_s8): Remove.
34104 (__arm_vminq_u16): Remove.
34105 (__arm_vmaxq_u16): Remove.
34106 (__arm_vminq_s16): Remove.
34107 (__arm_vmaxq_s16): Remove.
34108 (__arm_vminq_u32): Remove.
34109 (__arm_vmaxq_u32): Remove.
34110 (__arm_vminq_s32): Remove.
34111 (__arm_vmaxq_s32): Remove.
34112 (__arm_vmaxq_m_s8): Remove.
34113 (__arm_vmaxq_m_s32): Remove.
34114 (__arm_vmaxq_m_s16): Remove.
34115 (__arm_vmaxq_m_u8): Remove.
34116 (__arm_vmaxq_m_u32): Remove.
34117 (__arm_vmaxq_m_u16): Remove.
34118 (__arm_vminq_m_s8): Remove.
34119 (__arm_vminq_m_s32): Remove.
34120 (__arm_vminq_m_s16): Remove.
34121 (__arm_vminq_m_u8): Remove.
34122 (__arm_vminq_m_u32): Remove.
34123 (__arm_vminq_m_u16): Remove.
34124 (__arm_vminq_x_s8): Remove.
34125 (__arm_vminq_x_s16): Remove.
34126 (__arm_vminq_x_s32): Remove.
34127 (__arm_vminq_x_u8): Remove.
34128 (__arm_vminq_x_u16): Remove.
34129 (__arm_vminq_x_u32): Remove.
34130 (__arm_vmaxq_x_s8): Remove.
34131 (__arm_vmaxq_x_s16): Remove.
34132 (__arm_vmaxq_x_s32): Remove.
34133 (__arm_vmaxq_x_u8): Remove.
34134 (__arm_vmaxq_x_u16): Remove.
34135 (__arm_vmaxq_x_u32): Remove.
34136 (__arm_vminq): Remove.
34137 (__arm_vmaxq): Remove.
34138 (__arm_vmaxq_m): Remove.
34139 (__arm_vminq_m): Remove.
34140 (__arm_vminq_x): Remove.
34141 (__arm_vmaxq_x): Remove.
34143 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34145 * config/arm/iterators.md (MAX_MIN_SU): New.
34146 (max_min_su_str): New.
34147 (max_min_supf): New.
34148 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
34149 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
34150 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
34152 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34154 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
34155 (vqshlq, vshlq): New.
34156 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
34157 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
34158 * config/arm/arm_mve.h (vshlq): Remove.
34161 (vshlq_m_r): Remove.
34163 (vshlq_m_n): Remove.
34165 (vshlq_x_n): Remove.
34166 (vshlq_s8): Remove.
34167 (vshlq_s16): Remove.
34168 (vshlq_s32): Remove.
34169 (vshlq_u8): Remove.
34170 (vshlq_u16): Remove.
34171 (vshlq_u32): Remove.
34172 (vshlq_r_u8): Remove.
34173 (vshlq_n_u8): Remove.
34174 (vshlq_r_s8): Remove.
34175 (vshlq_n_s8): Remove.
34176 (vshlq_r_u16): Remove.
34177 (vshlq_n_u16): Remove.
34178 (vshlq_r_s16): Remove.
34179 (vshlq_n_s16): Remove.
34180 (vshlq_r_u32): Remove.
34181 (vshlq_n_u32): Remove.
34182 (vshlq_r_s32): Remove.
34183 (vshlq_n_s32): Remove.
34184 (vshlq_m_r_u8): Remove.
34185 (vshlq_m_r_s8): Remove.
34186 (vshlq_m_r_u16): Remove.
34187 (vshlq_m_r_s16): Remove.
34188 (vshlq_m_r_u32): Remove.
34189 (vshlq_m_r_s32): Remove.
34190 (vshlq_m_u8): Remove.
34191 (vshlq_m_s8): Remove.
34192 (vshlq_m_u16): Remove.
34193 (vshlq_m_s16): Remove.
34194 (vshlq_m_u32): Remove.
34195 (vshlq_m_s32): Remove.
34196 (vshlq_m_n_s8): Remove.
34197 (vshlq_m_n_s32): Remove.
34198 (vshlq_m_n_s16): Remove.
34199 (vshlq_m_n_u8): Remove.
34200 (vshlq_m_n_u32): Remove.
34201 (vshlq_m_n_u16): Remove.
34202 (vshlq_x_s8): Remove.
34203 (vshlq_x_s16): Remove.
34204 (vshlq_x_s32): Remove.
34205 (vshlq_x_u8): Remove.
34206 (vshlq_x_u16): Remove.
34207 (vshlq_x_u32): Remove.
34208 (vshlq_x_n_s8): Remove.
34209 (vshlq_x_n_s16): Remove.
34210 (vshlq_x_n_s32): Remove.
34211 (vshlq_x_n_u8): Remove.
34212 (vshlq_x_n_u16): Remove.
34213 (vshlq_x_n_u32): Remove.
34214 (__arm_vshlq_s8): Remove.
34215 (__arm_vshlq_s16): Remove.
34216 (__arm_vshlq_s32): Remove.
34217 (__arm_vshlq_u8): Remove.
34218 (__arm_vshlq_u16): Remove.
34219 (__arm_vshlq_u32): Remove.
34220 (__arm_vshlq_r_u8): Remove.
34221 (__arm_vshlq_n_u8): Remove.
34222 (__arm_vshlq_r_s8): Remove.
34223 (__arm_vshlq_n_s8): Remove.
34224 (__arm_vshlq_r_u16): Remove.
34225 (__arm_vshlq_n_u16): Remove.
34226 (__arm_vshlq_r_s16): Remove.
34227 (__arm_vshlq_n_s16): Remove.
34228 (__arm_vshlq_r_u32): Remove.
34229 (__arm_vshlq_n_u32): Remove.
34230 (__arm_vshlq_r_s32): Remove.
34231 (__arm_vshlq_n_s32): Remove.
34232 (__arm_vshlq_m_r_u8): Remove.
34233 (__arm_vshlq_m_r_s8): Remove.
34234 (__arm_vshlq_m_r_u16): Remove.
34235 (__arm_vshlq_m_r_s16): Remove.
34236 (__arm_vshlq_m_r_u32): Remove.
34237 (__arm_vshlq_m_r_s32): Remove.
34238 (__arm_vshlq_m_u8): Remove.
34239 (__arm_vshlq_m_s8): Remove.
34240 (__arm_vshlq_m_u16): Remove.
34241 (__arm_vshlq_m_s16): Remove.
34242 (__arm_vshlq_m_u32): Remove.
34243 (__arm_vshlq_m_s32): Remove.
34244 (__arm_vshlq_m_n_s8): Remove.
34245 (__arm_vshlq_m_n_s32): Remove.
34246 (__arm_vshlq_m_n_s16): Remove.
34247 (__arm_vshlq_m_n_u8): Remove.
34248 (__arm_vshlq_m_n_u32): Remove.
34249 (__arm_vshlq_m_n_u16): Remove.
34250 (__arm_vshlq_x_s8): Remove.
34251 (__arm_vshlq_x_s16): Remove.
34252 (__arm_vshlq_x_s32): Remove.
34253 (__arm_vshlq_x_u8): Remove.
34254 (__arm_vshlq_x_u16): Remove.
34255 (__arm_vshlq_x_u32): Remove.
34256 (__arm_vshlq_x_n_s8): Remove.
34257 (__arm_vshlq_x_n_s16): Remove.
34258 (__arm_vshlq_x_n_s32): Remove.
34259 (__arm_vshlq_x_n_u8): Remove.
34260 (__arm_vshlq_x_n_u16): Remove.
34261 (__arm_vshlq_x_n_u32): Remove.
34262 (__arm_vshlq): Remove.
34263 (__arm_vshlq_r): Remove.
34264 (__arm_vshlq_n): Remove.
34265 (__arm_vshlq_m_r): Remove.
34266 (__arm_vshlq_m): Remove.
34267 (__arm_vshlq_m_n): Remove.
34268 (__arm_vshlq_x): Remove.
34269 (__arm_vshlq_x_n): Remove.
34271 (vqshlq_r): Remove.
34272 (vqshlq_n): Remove.
34273 (vqshlq_m_r): Remove.
34274 (vqshlq_m_n): Remove.
34275 (vqshlq_m): Remove.
34276 (vqshlq_u8): Remove.
34277 (vqshlq_r_u8): Remove.
34278 (vqshlq_n_u8): Remove.
34279 (vqshlq_s8): Remove.
34280 (vqshlq_r_s8): Remove.
34281 (vqshlq_n_s8): Remove.
34282 (vqshlq_u16): Remove.
34283 (vqshlq_r_u16): Remove.
34284 (vqshlq_n_u16): Remove.
34285 (vqshlq_s16): Remove.
34286 (vqshlq_r_s16): Remove.
34287 (vqshlq_n_s16): Remove.
34288 (vqshlq_u32): Remove.
34289 (vqshlq_r_u32): Remove.
34290 (vqshlq_n_u32): Remove.
34291 (vqshlq_s32): Remove.
34292 (vqshlq_r_s32): Remove.
34293 (vqshlq_n_s32): Remove.
34294 (vqshlq_m_r_u8): Remove.
34295 (vqshlq_m_r_s8): Remove.
34296 (vqshlq_m_r_u16): Remove.
34297 (vqshlq_m_r_s16): Remove.
34298 (vqshlq_m_r_u32): Remove.
34299 (vqshlq_m_r_s32): Remove.
34300 (vqshlq_m_n_s8): Remove.
34301 (vqshlq_m_n_s32): Remove.
34302 (vqshlq_m_n_s16): Remove.
34303 (vqshlq_m_n_u8): Remove.
34304 (vqshlq_m_n_u32): Remove.
34305 (vqshlq_m_n_u16): Remove.
34306 (vqshlq_m_s8): Remove.
34307 (vqshlq_m_s32): Remove.
34308 (vqshlq_m_s16): Remove.
34309 (vqshlq_m_u8): Remove.
34310 (vqshlq_m_u32): Remove.
34311 (vqshlq_m_u16): Remove.
34312 (__arm_vqshlq_u8): Remove.
34313 (__arm_vqshlq_r_u8): Remove.
34314 (__arm_vqshlq_n_u8): Remove.
34315 (__arm_vqshlq_s8): Remove.
34316 (__arm_vqshlq_r_s8): Remove.
34317 (__arm_vqshlq_n_s8): Remove.
34318 (__arm_vqshlq_u16): Remove.
34319 (__arm_vqshlq_r_u16): Remove.
34320 (__arm_vqshlq_n_u16): Remove.
34321 (__arm_vqshlq_s16): Remove.
34322 (__arm_vqshlq_r_s16): Remove.
34323 (__arm_vqshlq_n_s16): Remove.
34324 (__arm_vqshlq_u32): Remove.
34325 (__arm_vqshlq_r_u32): Remove.
34326 (__arm_vqshlq_n_u32): Remove.
34327 (__arm_vqshlq_s32): Remove.
34328 (__arm_vqshlq_r_s32): Remove.
34329 (__arm_vqshlq_n_s32): Remove.
34330 (__arm_vqshlq_m_r_u8): Remove.
34331 (__arm_vqshlq_m_r_s8): Remove.
34332 (__arm_vqshlq_m_r_u16): Remove.
34333 (__arm_vqshlq_m_r_s16): Remove.
34334 (__arm_vqshlq_m_r_u32): Remove.
34335 (__arm_vqshlq_m_r_s32): Remove.
34336 (__arm_vqshlq_m_n_s8): Remove.
34337 (__arm_vqshlq_m_n_s32): Remove.
34338 (__arm_vqshlq_m_n_s16): Remove.
34339 (__arm_vqshlq_m_n_u8): Remove.
34340 (__arm_vqshlq_m_n_u32): Remove.
34341 (__arm_vqshlq_m_n_u16): Remove.
34342 (__arm_vqshlq_m_s8): Remove.
34343 (__arm_vqshlq_m_s32): Remove.
34344 (__arm_vqshlq_m_s16): Remove.
34345 (__arm_vqshlq_m_u8): Remove.
34346 (__arm_vqshlq_m_u32): Remove.
34347 (__arm_vqshlq_m_u16): Remove.
34348 (__arm_vqshlq): Remove.
34349 (__arm_vqshlq_r): Remove.
34350 (__arm_vqshlq_n): Remove.
34351 (__arm_vqshlq_m_r): Remove.
34352 (__arm_vqshlq_m_n): Remove.
34353 (__arm_vqshlq_m): Remove.
34355 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34357 * config/arm/arm-mve-builtins-functions.h (class
34358 unspec_mve_function_exact_insn_vshl): New.
34360 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34362 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
34363 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
34365 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34367 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
34368 (finish_opt_n_resolution): Handle MODE_r.
34369 * config/arm/arm-mve-builtins.def (r): New mode.
34371 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34373 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
34374 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
34376 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34378 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
34380 * config/arm/arm-mve-builtins-base.def (vabdq): New.
34381 * config/arm/arm-mve-builtins-base.h (vabdq): New.
34382 * config/arm/arm_mve.h (vabdq): Remove.
34385 (vabdq_u8): Remove.
34386 (vabdq_s8): Remove.
34387 (vabdq_u16): Remove.
34388 (vabdq_s16): Remove.
34389 (vabdq_u32): Remove.
34390 (vabdq_s32): Remove.
34391 (vabdq_f16): Remove.
34392 (vabdq_f32): Remove.
34393 (vabdq_m_s8): Remove.
34394 (vabdq_m_s32): Remove.
34395 (vabdq_m_s16): Remove.
34396 (vabdq_m_u8): Remove.
34397 (vabdq_m_u32): Remove.
34398 (vabdq_m_u16): Remove.
34399 (vabdq_m_f32): Remove.
34400 (vabdq_m_f16): Remove.
34401 (vabdq_x_s8): Remove.
34402 (vabdq_x_s16): Remove.
34403 (vabdq_x_s32): Remove.
34404 (vabdq_x_u8): Remove.
34405 (vabdq_x_u16): Remove.
34406 (vabdq_x_u32): Remove.
34407 (vabdq_x_f16): Remove.
34408 (vabdq_x_f32): Remove.
34409 (__arm_vabdq_u8): Remove.
34410 (__arm_vabdq_s8): Remove.
34411 (__arm_vabdq_u16): Remove.
34412 (__arm_vabdq_s16): Remove.
34413 (__arm_vabdq_u32): Remove.
34414 (__arm_vabdq_s32): Remove.
34415 (__arm_vabdq_m_s8): Remove.
34416 (__arm_vabdq_m_s32): Remove.
34417 (__arm_vabdq_m_s16): Remove.
34418 (__arm_vabdq_m_u8): Remove.
34419 (__arm_vabdq_m_u32): Remove.
34420 (__arm_vabdq_m_u16): Remove.
34421 (__arm_vabdq_x_s8): Remove.
34422 (__arm_vabdq_x_s16): Remove.
34423 (__arm_vabdq_x_s32): Remove.
34424 (__arm_vabdq_x_u8): Remove.
34425 (__arm_vabdq_x_u16): Remove.
34426 (__arm_vabdq_x_u32): Remove.
34427 (__arm_vabdq_f16): Remove.
34428 (__arm_vabdq_f32): Remove.
34429 (__arm_vabdq_m_f32): Remove.
34430 (__arm_vabdq_m_f16): Remove.
34431 (__arm_vabdq_x_f16): Remove.
34432 (__arm_vabdq_x_f32): Remove.
34433 (__arm_vabdq): Remove.
34434 (__arm_vabdq_m): Remove.
34435 (__arm_vabdq_x): Remove.
34437 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34439 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
34440 (MVE_FP_VABDQ_ONLY): New.
34441 (mve_insn): Add vabd.
34442 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
34443 (@mve_<mve_insn>q_f<mode>): ... this.
34444 (mve_vabdq_m_f<mode>): Remove.
34446 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34448 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
34449 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
34450 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
34451 * config/arm/arm_mve.h (vqrdmulhq): Remove.
34452 (vqrdmulhq_m): Remove.
34453 (vqrdmulhq_s8): Remove.
34454 (vqrdmulhq_n_s8): Remove.
34455 (vqrdmulhq_s16): Remove.
34456 (vqrdmulhq_n_s16): Remove.
34457 (vqrdmulhq_s32): Remove.
34458 (vqrdmulhq_n_s32): Remove.
34459 (vqrdmulhq_m_n_s8): Remove.
34460 (vqrdmulhq_m_n_s32): Remove.
34461 (vqrdmulhq_m_n_s16): Remove.
34462 (vqrdmulhq_m_s8): Remove.
34463 (vqrdmulhq_m_s32): Remove.
34464 (vqrdmulhq_m_s16): Remove.
34465 (__arm_vqrdmulhq_s8): Remove.
34466 (__arm_vqrdmulhq_n_s8): Remove.
34467 (__arm_vqrdmulhq_s16): Remove.
34468 (__arm_vqrdmulhq_n_s16): Remove.
34469 (__arm_vqrdmulhq_s32): Remove.
34470 (__arm_vqrdmulhq_n_s32): Remove.
34471 (__arm_vqrdmulhq_m_n_s8): Remove.
34472 (__arm_vqrdmulhq_m_n_s32): Remove.
34473 (__arm_vqrdmulhq_m_n_s16): Remove.
34474 (__arm_vqrdmulhq_m_s8): Remove.
34475 (__arm_vqrdmulhq_m_s32): Remove.
34476 (__arm_vqrdmulhq_m_s16): Remove.
34477 (__arm_vqrdmulhq): Remove.
34478 (__arm_vqrdmulhq_m): Remove.
34480 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34482 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
34483 (MVE_SHIFT_N, MVE_SHIFT_R): New.
34484 (mve_insn): Add vqshl, vshl.
34485 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
34486 (mve_vshlq_n_<supf><mode>): Merge into ...
34487 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34488 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
34490 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
34491 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
34493 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
34494 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
34496 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34497 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
34499 (@mve_<mve_insn>q_<supf><mode>): ... this.
34501 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34503 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
34504 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
34505 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
34506 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
34508 * config/arm/arm_mve.h (vrshlq): Remove.
34509 (vrshlq_m_n): Remove.
34510 (vrshlq_m): Remove.
34511 (vrshlq_x): Remove.
34512 (vrshlq_u8): Remove.
34513 (vrshlq_n_u8): Remove.
34514 (vrshlq_s8): Remove.
34515 (vrshlq_n_s8): Remove.
34516 (vrshlq_u16): Remove.
34517 (vrshlq_n_u16): Remove.
34518 (vrshlq_s16): Remove.
34519 (vrshlq_n_s16): Remove.
34520 (vrshlq_u32): Remove.
34521 (vrshlq_n_u32): Remove.
34522 (vrshlq_s32): Remove.
34523 (vrshlq_n_s32): Remove.
34524 (vrshlq_m_n_u8): Remove.
34525 (vrshlq_m_n_s8): Remove.
34526 (vrshlq_m_n_u16): Remove.
34527 (vrshlq_m_n_s16): Remove.
34528 (vrshlq_m_n_u32): Remove.
34529 (vrshlq_m_n_s32): Remove.
34530 (vrshlq_m_s8): Remove.
34531 (vrshlq_m_s32): Remove.
34532 (vrshlq_m_s16): Remove.
34533 (vrshlq_m_u8): Remove.
34534 (vrshlq_m_u32): Remove.
34535 (vrshlq_m_u16): Remove.
34536 (vrshlq_x_s8): Remove.
34537 (vrshlq_x_s16): Remove.
34538 (vrshlq_x_s32): Remove.
34539 (vrshlq_x_u8): Remove.
34540 (vrshlq_x_u16): Remove.
34541 (vrshlq_x_u32): Remove.
34542 (__arm_vrshlq_u8): Remove.
34543 (__arm_vrshlq_n_u8): Remove.
34544 (__arm_vrshlq_s8): Remove.
34545 (__arm_vrshlq_n_s8): Remove.
34546 (__arm_vrshlq_u16): Remove.
34547 (__arm_vrshlq_n_u16): Remove.
34548 (__arm_vrshlq_s16): Remove.
34549 (__arm_vrshlq_n_s16): Remove.
34550 (__arm_vrshlq_u32): Remove.
34551 (__arm_vrshlq_n_u32): Remove.
34552 (__arm_vrshlq_s32): Remove.
34553 (__arm_vrshlq_n_s32): Remove.
34554 (__arm_vrshlq_m_n_u8): Remove.
34555 (__arm_vrshlq_m_n_s8): Remove.
34556 (__arm_vrshlq_m_n_u16): Remove.
34557 (__arm_vrshlq_m_n_s16): Remove.
34558 (__arm_vrshlq_m_n_u32): Remove.
34559 (__arm_vrshlq_m_n_s32): Remove.
34560 (__arm_vrshlq_m_s8): Remove.
34561 (__arm_vrshlq_m_s32): Remove.
34562 (__arm_vrshlq_m_s16): Remove.
34563 (__arm_vrshlq_m_u8): Remove.
34564 (__arm_vrshlq_m_u32): Remove.
34565 (__arm_vrshlq_m_u16): Remove.
34566 (__arm_vrshlq_x_s8): Remove.
34567 (__arm_vrshlq_x_s16): Remove.
34568 (__arm_vrshlq_x_s32): Remove.
34569 (__arm_vrshlq_x_u8): Remove.
34570 (__arm_vrshlq_x_u16): Remove.
34571 (__arm_vrshlq_x_u32): Remove.
34572 (__arm_vrshlq): Remove.
34573 (__arm_vrshlq_m_n): Remove.
34574 (__arm_vrshlq_m): Remove.
34575 (__arm_vrshlq_x): Remove.
34577 (vqrshlq_m_n): Remove.
34578 (vqrshlq_m): Remove.
34579 (vqrshlq_u8): Remove.
34580 (vqrshlq_n_u8): Remove.
34581 (vqrshlq_s8): Remove.
34582 (vqrshlq_n_s8): Remove.
34583 (vqrshlq_u16): Remove.
34584 (vqrshlq_n_u16): Remove.
34585 (vqrshlq_s16): Remove.
34586 (vqrshlq_n_s16): Remove.
34587 (vqrshlq_u32): Remove.
34588 (vqrshlq_n_u32): Remove.
34589 (vqrshlq_s32): Remove.
34590 (vqrshlq_n_s32): Remove.
34591 (vqrshlq_m_n_u8): Remove.
34592 (vqrshlq_m_n_s8): Remove.
34593 (vqrshlq_m_n_u16): Remove.
34594 (vqrshlq_m_n_s16): Remove.
34595 (vqrshlq_m_n_u32): Remove.
34596 (vqrshlq_m_n_s32): Remove.
34597 (vqrshlq_m_s8): Remove.
34598 (vqrshlq_m_s32): Remove.
34599 (vqrshlq_m_s16): Remove.
34600 (vqrshlq_m_u8): Remove.
34601 (vqrshlq_m_u32): Remove.
34602 (vqrshlq_m_u16): Remove.
34603 (__arm_vqrshlq_u8): Remove.
34604 (__arm_vqrshlq_n_u8): Remove.
34605 (__arm_vqrshlq_s8): Remove.
34606 (__arm_vqrshlq_n_s8): Remove.
34607 (__arm_vqrshlq_u16): Remove.
34608 (__arm_vqrshlq_n_u16): Remove.
34609 (__arm_vqrshlq_s16): Remove.
34610 (__arm_vqrshlq_n_s16): Remove.
34611 (__arm_vqrshlq_u32): Remove.
34612 (__arm_vqrshlq_n_u32): Remove.
34613 (__arm_vqrshlq_s32): Remove.
34614 (__arm_vqrshlq_n_s32): Remove.
34615 (__arm_vqrshlq_m_n_u8): Remove.
34616 (__arm_vqrshlq_m_n_s8): Remove.
34617 (__arm_vqrshlq_m_n_u16): Remove.
34618 (__arm_vqrshlq_m_n_s16): Remove.
34619 (__arm_vqrshlq_m_n_u32): Remove.
34620 (__arm_vqrshlq_m_n_s32): Remove.
34621 (__arm_vqrshlq_m_s8): Remove.
34622 (__arm_vqrshlq_m_s32): Remove.
34623 (__arm_vqrshlq_m_s16): Remove.
34624 (__arm_vqrshlq_m_u8): Remove.
34625 (__arm_vqrshlq_m_u32): Remove.
34626 (__arm_vqrshlq_m_u16): Remove.
34627 (__arm_vqrshlq): Remove.
34628 (__arm_vqrshlq_m_n): Remove.
34629 (__arm_vqrshlq_m): Remove.
34631 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34633 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
34634 (mve_insn): Add vqrshl, vrshl.
34635 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
34636 (mve_vrshlq_n_<supf><mode>): Merge into ...
34637 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34638 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
34640 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34642 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34644 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
34645 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
34647 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34650 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
34651 denegrate PHI optmization.
34653 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
34655 * config/i386/predicates.md (register_no_SP_operand):
34656 Rename from index_register_operand.
34657 (call_register_operand): Update for rename.
34658 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
34660 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34663 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
34664 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
34665 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
34666 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
34667 (s-match): Split into s-generic-match and s-gimple-match.
34668 * configure.ac (with-matchpd-partitions,
34669 DEFAULT_MATCHPD_PARTITIONS): New.
34670 * configure: Regenerate.
34672 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34675 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
34676 (decision_tree::gen): Accept list of files instead of single and update
34677 to write function definition to header and main file.
34678 (write_predicate): Likewise.
34679 (write_header): Emit pragmas and new includes.
34680 (main): Create file buffers and cleanup.
34681 (showUsage, write_header_includes): New.
34683 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34686 * Makefile.in (OBJS): Add gimple-match-exports.o.
34687 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
34688 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
34689 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
34690 gimple_resimplify5, constant_for_folding, convert_conditional_op,
34691 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
34692 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
34693 do_valueize, try_conditional_simplification, gimple_extract,
34694 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
34695 commutative_ternary_op_p, first_commutative_argument,
34696 associative_binary_op_p, directly_supported_p,
34697 get_conditional_internal_fn): Moved to gimple-match-exports.cc
34698 * gimple-match-exports.cc: New file.
34700 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34703 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
34705 (dt_simplify::gen_1): Use it.
34707 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34710 * genmatch.cc (output_line_directive): Only emit commented directive
34713 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34716 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
34718 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
34720 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
34721 unused in_mode/in_n variables.
34723 2023-05-05 Richard Biener <rguenther@suse.de>
34725 PR tree-optimization/109735
34726 * tree-vect-stmts.cc (vectorizable_operation): Perform
34727 conversion for POINTER_DIFF_EXPR unconditionally.
34729 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
34731 * config/i386/mmx.md (mulv2si3): New expander.
34732 (*mulv2si3): New insn pattern.
34734 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
34735 Thomas Schwinge <thomas@codesourcery.com>
34738 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
34739 alongside reverse-offload function table to prevent NULL values
34740 of the function addresses.
34742 2023-05-05 Jakub Jelinek <jakub@redhat.com>
34744 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
34746 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
34748 2023-05-05 Andrew Pinski <apinski@marvell.com>
34750 PR tree-optimization/109732
34751 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
34752 of the argtrue/argfalse.
34754 2023-05-05 Andrew Pinski <apinski@marvell.com>
34756 PR tree-optimization/109722
34757 * match.pd: Extend the `ABS<a> == 0` pattern
34758 to cover `ABSU<a> == 0` too.
34760 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
34763 * config/i386/predicates.md (index_reg_operand): New predicate.
34764 * config/i386/i386.md (ashift to lea spliter): Use
34765 general_reg_operand and index_reg_operand predicates.
34767 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34769 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
34770 Rename and reimplement with RTL codes to...
34771 (aarch64_<optab>hn2<mode>_insn_le): .. This.
34772 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
34773 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
34775 (aarch64_<optab>hn2<mode>_insn_be): ... This.
34776 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
34777 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
34778 (aarch64_<optab>hn2<mode>): ... This.
34779 (aarch64_r<optab>hn2<mode>): New expander.
34780 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
34781 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
34782 (ADDSUBHN): Delete.
34783 (sur): Remove handling of the above.
34784 (addsub): Likewise.
34786 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34788 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
34790 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
34791 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
34792 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
34793 (aarch64_<sur><addsub>hn<mode>): Delete.
34794 (aarch64_<optab>hn<mode>): New define_expand.
34795 (aarch64_r<optab>hn<mode>): Likewise.
34796 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
34799 2023-05-04 Andrew Pinski <apinski@marvell.com>
34801 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
34802 diamond form bb with forwarder only empty blocks better.
34804 2023-05-04 Andrew Pinski <apinski@marvell.com>
34806 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
34807 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
34808 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
34809 of an inline version of it.
34810 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
34811 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
34813 2023-05-04 Andrew Pinski <apinski@marvell.com>
34815 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
34816 the default argument value for dce_ssa_names to nullptr.
34817 Check to make sure dce_ssa_names is a non-nullptr before
34818 calling simple_dce_from_worklist.
34820 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
34822 * config/i386/predicates.md (index_register_operand): Reject
34823 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
34824 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
34825 (call_register_no_elim_operand): Rewrite as ...
34826 (call_register_operand): ... this.
34827 (call_insn_operand): Use call_register_operand predicate.
34829 2023-05-04 Richard Biener <rguenther@suse.de>
34831 PR tree-optimization/109721
34832 * tree-vect-stmts.cc (vectorizable_operation): Make sure
34833 to test word_mode for all !target_support_p operations.
34835 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34838 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
34839 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
34840 (aarch64_mla<mode>): Rename to...
34841 (aarch64_mla<mode><vczle><vczbe>): ... This.
34842 (*aarch64_mla_elt<mode>): Rename to...
34843 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
34844 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
34845 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34846 (aarch64_mla_n<mode>): Rename to...
34847 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
34848 (aarch64_mls<mode>): Rename to...
34849 (aarch64_mls<mode><vczle><vczbe>): ... This.
34850 (*aarch64_mls_elt<mode>): Rename to...
34851 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
34852 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
34853 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34854 (aarch64_mls_n<mode>): Rename to...
34855 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
34856 (fma<mode>4): Rename to...
34857 (fma<mode>4<vczle><vczbe>): ... This.
34858 (*aarch64_fma4_elt<mode>): Rename to...
34859 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
34860 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
34861 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34862 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
34863 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
34864 (fnma<mode>4): Rename to...
34865 (fnma<mode>4<vczle><vczbe>): ... This.
34866 (*aarch64_fnma4_elt<mode>): Rename to...
34867 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
34868 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
34869 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34870 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
34871 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
34872 (aarch64_simd_bsl<mode>_internal): Rename to...
34873 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
34874 (*aarch64_simd_bsl<mode>_alt): Rename to...
34875 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
34877 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34880 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
34881 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
34882 (fabd<mode>3): Rename to...
34883 (fabd<mode>3<vczle><vczbe>): ... This.
34884 (aarch64_<optab>p<mode>): Rename to...
34885 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
34886 (aarch64_faddp<mode>): Rename to...
34887 (aarch64_faddp<mode><vczle><vczbe>): ... This.
34889 2023-05-04 Martin Liska <mliska@suse.cz>
34891 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
34892 (print_version): Use it.
34893 (generate_results): Likewise.
34895 2023-05-04 Richard Biener <rguenther@suse.de>
34897 * tree-cfg.h (last_stmt): Rename to ...
34898 (last_nondebug_stmt): ... this.
34899 * tree-cfg.cc (last_stmt): Rename to ...
34900 (last_nondebug_stmt): ... this.
34901 (assign_discriminators): Adjust.
34902 (group_case_labels_stmt): Likewise.
34903 (gimple_can_duplicate_bb_p): Likewise.
34904 (execute_fixup_cfg): Likewise.
34905 * auto-profile.cc (afdo_propagate_circuit): Likewise.
34906 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
34907 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
34908 (determine_parallel_type): Likewise.
34909 (adjust_context_and_scope): Likewise.
34910 (expand_task_call): Likewise.
34911 (remove_exit_barrier): Likewise.
34912 (expand_omp_taskreg): Likewise.
34913 (expand_omp_for_init_counts): Likewise.
34914 (expand_omp_for_init_vars): Likewise.
34915 (expand_omp_for_static_chunk): Likewise.
34916 (expand_omp_simd): Likewise.
34917 (expand_oacc_for): Likewise.
34918 (expand_omp_for): Likewise.
34919 (expand_omp_sections): Likewise.
34920 (expand_omp_atomic_fetch_op): Likewise.
34921 (expand_omp_atomic_cas): Likewise.
34922 (expand_omp_atomic): Likewise.
34923 (expand_omp_target): Likewise.
34924 (expand_omp): Likewise.
34925 (omp_make_gimple_edges): Likewise.
34926 * trans-mem.cc (tm_region_init): Likewise.
34927 * tree-inline.cc (redirect_all_calls): Likewise.
34928 * tree-parloops.cc (gen_parallel_loop): Likewise.
34929 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
34930 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
34932 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
34933 (may_eliminate_iv): Likewise.
34934 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
34935 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
34937 (estimate_numbers_of_iterations): Likewise.
34938 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
34939 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
34940 (set_predicates_for_bb): Likewise.
34941 (init_loop_unswitch_info): Likewise.
34942 (hoist_guard): Likewise.
34943 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
34944 (minmax_replacement): Likewise.
34945 * tree-ssa-reassoc.cc (update_range_test): Likewise.
34946 (optimize_range_tests_to_bit_test): Likewise.
34947 (optimize_range_tests_var_bound): Likewise.
34948 (optimize_range_tests): Likewise.
34949 (no_side_effect_bb): Likewise.
34950 (suitable_cond_bb): Likewise.
34951 (maybe_optimize_range_tests): Likewise.
34952 (reassociate_bb): Likewise.
34953 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
34955 2023-05-04 Jakub Jelinek <jakub@redhat.com>
34958 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
34959 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
34960 for it only if it still has TImode. Don't decide whether to call
34961 fix_debug_reg_uses based on whether SRC is ever set or not.
34963 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
34965 * config/cris/cris.cc (cris_split_constant): New function.
34966 * config/cris/cris.md (splitop): New iterator.
34967 (opsplit1): New define_peephole2.
34968 * config/cris/cris-protos.h (cris_split_constant): Declare.
34969 (cris_splittable_constant_p): New macro.
34971 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
34973 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
34976 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
34978 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
34979 lra_in_progress, not reload_in_progress.
34980 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
34981 * config/cris/constraints.md ("Q"): Ditto.
34983 2023-05-03 Andrew Pinski <apinski@marvell.com>
34985 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
34986 stats on removed number of statements and phis.
34988 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
34990 PR tree-optimization/109711
34991 * value-range.cc (irange::verify_range): Allow types of
34994 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
34997 * calls.cc (can_implement_as_sibling_call_p): Reject calls
34998 to __sanitizer_cov_trace_pc.
35000 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
35003 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
35004 a new ABI break parameter for GCC 14. Set it to the alignment
35005 of enums that have an underlying type. Take the true alignment
35006 of such enums from the TYPE_ALIGN of the underlying type's
35008 (aarch64_function_arg_boundary): Update accordingly.
35009 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
35010 Warn about ABI differences.
35012 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
35015 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
35016 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
35017 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
35018 (aarch64_gimplify_va_arg_expr): Likewise.
35020 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35022 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
35023 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
35024 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
35026 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
35027 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
35028 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
35029 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
35030 * config/arm/arm_mve.h (vhsubq): Remove.
35032 (vhaddq_m): Remove.
35033 (vhsubq_m): Remove.
35034 (vhaddq_x): Remove.
35035 (vhsubq_x): Remove.
35036 (vhsubq_u8): Remove.
35037 (vhsubq_n_u8): Remove.
35038 (vhaddq_u8): Remove.
35039 (vhaddq_n_u8): Remove.
35040 (vhsubq_s8): Remove.
35041 (vhsubq_n_s8): Remove.
35042 (vhaddq_s8): Remove.
35043 (vhaddq_n_s8): Remove.
35044 (vhsubq_u16): Remove.
35045 (vhsubq_n_u16): Remove.
35046 (vhaddq_u16): Remove.
35047 (vhaddq_n_u16): Remove.
35048 (vhsubq_s16): Remove.
35049 (vhsubq_n_s16): Remove.
35050 (vhaddq_s16): Remove.
35051 (vhaddq_n_s16): Remove.
35052 (vhsubq_u32): Remove.
35053 (vhsubq_n_u32): Remove.
35054 (vhaddq_u32): Remove.
35055 (vhaddq_n_u32): Remove.
35056 (vhsubq_s32): Remove.
35057 (vhsubq_n_s32): Remove.
35058 (vhaddq_s32): Remove.
35059 (vhaddq_n_s32): Remove.
35060 (vhaddq_m_n_s8): Remove.
35061 (vhaddq_m_n_s32): Remove.
35062 (vhaddq_m_n_s16): Remove.
35063 (vhaddq_m_n_u8): Remove.
35064 (vhaddq_m_n_u32): Remove.
35065 (vhaddq_m_n_u16): Remove.
35066 (vhaddq_m_s8): Remove.
35067 (vhaddq_m_s32): Remove.
35068 (vhaddq_m_s16): Remove.
35069 (vhaddq_m_u8): Remove.
35070 (vhaddq_m_u32): Remove.
35071 (vhaddq_m_u16): Remove.
35072 (vhsubq_m_n_s8): Remove.
35073 (vhsubq_m_n_s32): Remove.
35074 (vhsubq_m_n_s16): Remove.
35075 (vhsubq_m_n_u8): Remove.
35076 (vhsubq_m_n_u32): Remove.
35077 (vhsubq_m_n_u16): Remove.
35078 (vhsubq_m_s8): Remove.
35079 (vhsubq_m_s32): Remove.
35080 (vhsubq_m_s16): Remove.
35081 (vhsubq_m_u8): Remove.
35082 (vhsubq_m_u32): Remove.
35083 (vhsubq_m_u16): Remove.
35084 (vhaddq_x_n_s8): Remove.
35085 (vhaddq_x_n_s16): Remove.
35086 (vhaddq_x_n_s32): Remove.
35087 (vhaddq_x_n_u8): Remove.
35088 (vhaddq_x_n_u16): Remove.
35089 (vhaddq_x_n_u32): Remove.
35090 (vhaddq_x_s8): Remove.
35091 (vhaddq_x_s16): Remove.
35092 (vhaddq_x_s32): Remove.
35093 (vhaddq_x_u8): Remove.
35094 (vhaddq_x_u16): Remove.
35095 (vhaddq_x_u32): Remove.
35096 (vhsubq_x_n_s8): Remove.
35097 (vhsubq_x_n_s16): Remove.
35098 (vhsubq_x_n_s32): Remove.
35099 (vhsubq_x_n_u8): Remove.
35100 (vhsubq_x_n_u16): Remove.
35101 (vhsubq_x_n_u32): Remove.
35102 (vhsubq_x_s8): Remove.
35103 (vhsubq_x_s16): Remove.
35104 (vhsubq_x_s32): Remove.
35105 (vhsubq_x_u8): Remove.
35106 (vhsubq_x_u16): Remove.
35107 (vhsubq_x_u32): Remove.
35108 (__arm_vhsubq_u8): Remove.
35109 (__arm_vhsubq_n_u8): Remove.
35110 (__arm_vhaddq_u8): Remove.
35111 (__arm_vhaddq_n_u8): Remove.
35112 (__arm_vhsubq_s8): Remove.
35113 (__arm_vhsubq_n_s8): Remove.
35114 (__arm_vhaddq_s8): Remove.
35115 (__arm_vhaddq_n_s8): Remove.
35116 (__arm_vhsubq_u16): Remove.
35117 (__arm_vhsubq_n_u16): Remove.
35118 (__arm_vhaddq_u16): Remove.
35119 (__arm_vhaddq_n_u16): Remove.
35120 (__arm_vhsubq_s16): Remove.
35121 (__arm_vhsubq_n_s16): Remove.
35122 (__arm_vhaddq_s16): Remove.
35123 (__arm_vhaddq_n_s16): Remove.
35124 (__arm_vhsubq_u32): Remove.
35125 (__arm_vhsubq_n_u32): Remove.
35126 (__arm_vhaddq_u32): Remove.
35127 (__arm_vhaddq_n_u32): Remove.
35128 (__arm_vhsubq_s32): Remove.
35129 (__arm_vhsubq_n_s32): Remove.
35130 (__arm_vhaddq_s32): Remove.
35131 (__arm_vhaddq_n_s32): Remove.
35132 (__arm_vhaddq_m_n_s8): Remove.
35133 (__arm_vhaddq_m_n_s32): Remove.
35134 (__arm_vhaddq_m_n_s16): Remove.
35135 (__arm_vhaddq_m_n_u8): Remove.
35136 (__arm_vhaddq_m_n_u32): Remove.
35137 (__arm_vhaddq_m_n_u16): Remove.
35138 (__arm_vhaddq_m_s8): Remove.
35139 (__arm_vhaddq_m_s32): Remove.
35140 (__arm_vhaddq_m_s16): Remove.
35141 (__arm_vhaddq_m_u8): Remove.
35142 (__arm_vhaddq_m_u32): Remove.
35143 (__arm_vhaddq_m_u16): Remove.
35144 (__arm_vhsubq_m_n_s8): Remove.
35145 (__arm_vhsubq_m_n_s32): Remove.
35146 (__arm_vhsubq_m_n_s16): Remove.
35147 (__arm_vhsubq_m_n_u8): Remove.
35148 (__arm_vhsubq_m_n_u32): Remove.
35149 (__arm_vhsubq_m_n_u16): Remove.
35150 (__arm_vhsubq_m_s8): Remove.
35151 (__arm_vhsubq_m_s32): Remove.
35152 (__arm_vhsubq_m_s16): Remove.
35153 (__arm_vhsubq_m_u8): Remove.
35154 (__arm_vhsubq_m_u32): Remove.
35155 (__arm_vhsubq_m_u16): Remove.
35156 (__arm_vhaddq_x_n_s8): Remove.
35157 (__arm_vhaddq_x_n_s16): Remove.
35158 (__arm_vhaddq_x_n_s32): Remove.
35159 (__arm_vhaddq_x_n_u8): Remove.
35160 (__arm_vhaddq_x_n_u16): Remove.
35161 (__arm_vhaddq_x_n_u32): Remove.
35162 (__arm_vhaddq_x_s8): Remove.
35163 (__arm_vhaddq_x_s16): Remove.
35164 (__arm_vhaddq_x_s32): Remove.
35165 (__arm_vhaddq_x_u8): Remove.
35166 (__arm_vhaddq_x_u16): Remove.
35167 (__arm_vhaddq_x_u32): Remove.
35168 (__arm_vhsubq_x_n_s8): Remove.
35169 (__arm_vhsubq_x_n_s16): Remove.
35170 (__arm_vhsubq_x_n_s32): Remove.
35171 (__arm_vhsubq_x_n_u8): Remove.
35172 (__arm_vhsubq_x_n_u16): Remove.
35173 (__arm_vhsubq_x_n_u32): Remove.
35174 (__arm_vhsubq_x_s8): Remove.
35175 (__arm_vhsubq_x_s16): Remove.
35176 (__arm_vhsubq_x_s32): Remove.
35177 (__arm_vhsubq_x_u8): Remove.
35178 (__arm_vhsubq_x_u16): Remove.
35179 (__arm_vhsubq_x_u32): Remove.
35180 (__arm_vhsubq): Remove.
35181 (__arm_vhaddq): Remove.
35182 (__arm_vhaddq_m): Remove.
35183 (__arm_vhsubq_m): Remove.
35184 (__arm_vhaddq_x): Remove.
35185 (__arm_vhsubq_x): Remove.
35187 (vmulhq_m): Remove.
35188 (vmulhq_x): Remove.
35189 (vmulhq_u8): Remove.
35190 (vmulhq_s8): Remove.
35191 (vmulhq_u16): Remove.
35192 (vmulhq_s16): Remove.
35193 (vmulhq_u32): Remove.
35194 (vmulhq_s32): Remove.
35195 (vmulhq_m_s8): Remove.
35196 (vmulhq_m_s32): Remove.
35197 (vmulhq_m_s16): Remove.
35198 (vmulhq_m_u8): Remove.
35199 (vmulhq_m_u32): Remove.
35200 (vmulhq_m_u16): Remove.
35201 (vmulhq_x_s8): Remove.
35202 (vmulhq_x_s16): Remove.
35203 (vmulhq_x_s32): Remove.
35204 (vmulhq_x_u8): Remove.
35205 (vmulhq_x_u16): Remove.
35206 (vmulhq_x_u32): Remove.
35207 (__arm_vmulhq_u8): Remove.
35208 (__arm_vmulhq_s8): Remove.
35209 (__arm_vmulhq_u16): Remove.
35210 (__arm_vmulhq_s16): Remove.
35211 (__arm_vmulhq_u32): Remove.
35212 (__arm_vmulhq_s32): Remove.
35213 (__arm_vmulhq_m_s8): Remove.
35214 (__arm_vmulhq_m_s32): Remove.
35215 (__arm_vmulhq_m_s16): Remove.
35216 (__arm_vmulhq_m_u8): Remove.
35217 (__arm_vmulhq_m_u32): Remove.
35218 (__arm_vmulhq_m_u16): Remove.
35219 (__arm_vmulhq_x_s8): Remove.
35220 (__arm_vmulhq_x_s16): Remove.
35221 (__arm_vmulhq_x_s32): Remove.
35222 (__arm_vmulhq_x_u8): Remove.
35223 (__arm_vmulhq_x_u16): Remove.
35224 (__arm_vmulhq_x_u32): Remove.
35225 (__arm_vmulhq): Remove.
35226 (__arm_vmulhq_m): Remove.
35227 (__arm_vmulhq_x): Remove.
35230 (vqaddq_m): Remove.
35231 (vqsubq_m): Remove.
35232 (vqsubq_u8): Remove.
35233 (vqsubq_n_u8): Remove.
35234 (vqaddq_u8): Remove.
35235 (vqaddq_n_u8): Remove.
35236 (vqsubq_s8): Remove.
35237 (vqsubq_n_s8): Remove.
35238 (vqaddq_s8): Remove.
35239 (vqaddq_n_s8): Remove.
35240 (vqsubq_u16): Remove.
35241 (vqsubq_n_u16): Remove.
35242 (vqaddq_u16): Remove.
35243 (vqaddq_n_u16): Remove.
35244 (vqsubq_s16): Remove.
35245 (vqsubq_n_s16): Remove.
35246 (vqaddq_s16): Remove.
35247 (vqaddq_n_s16): Remove.
35248 (vqsubq_u32): Remove.
35249 (vqsubq_n_u32): Remove.
35250 (vqaddq_u32): Remove.
35251 (vqaddq_n_u32): Remove.
35252 (vqsubq_s32): Remove.
35253 (vqsubq_n_s32): Remove.
35254 (vqaddq_s32): Remove.
35255 (vqaddq_n_s32): Remove.
35256 (vqaddq_m_n_s8): Remove.
35257 (vqaddq_m_n_s32): Remove.
35258 (vqaddq_m_n_s16): Remove.
35259 (vqaddq_m_n_u8): Remove.
35260 (vqaddq_m_n_u32): Remove.
35261 (vqaddq_m_n_u16): Remove.
35262 (vqaddq_m_s8): Remove.
35263 (vqaddq_m_s32): Remove.
35264 (vqaddq_m_s16): Remove.
35265 (vqaddq_m_u8): Remove.
35266 (vqaddq_m_u32): Remove.
35267 (vqaddq_m_u16): Remove.
35268 (vqsubq_m_n_s8): Remove.
35269 (vqsubq_m_n_s32): Remove.
35270 (vqsubq_m_n_s16): Remove.
35271 (vqsubq_m_n_u8): Remove.
35272 (vqsubq_m_n_u32): Remove.
35273 (vqsubq_m_n_u16): Remove.
35274 (vqsubq_m_s8): Remove.
35275 (vqsubq_m_s32): Remove.
35276 (vqsubq_m_s16): Remove.
35277 (vqsubq_m_u8): Remove.
35278 (vqsubq_m_u32): Remove.
35279 (vqsubq_m_u16): Remove.
35280 (__arm_vqsubq_u8): Remove.
35281 (__arm_vqsubq_n_u8): Remove.
35282 (__arm_vqaddq_u8): Remove.
35283 (__arm_vqaddq_n_u8): Remove.
35284 (__arm_vqsubq_s8): Remove.
35285 (__arm_vqsubq_n_s8): Remove.
35286 (__arm_vqaddq_s8): Remove.
35287 (__arm_vqaddq_n_s8): Remove.
35288 (__arm_vqsubq_u16): Remove.
35289 (__arm_vqsubq_n_u16): Remove.
35290 (__arm_vqaddq_u16): Remove.
35291 (__arm_vqaddq_n_u16): Remove.
35292 (__arm_vqsubq_s16): Remove.
35293 (__arm_vqsubq_n_s16): Remove.
35294 (__arm_vqaddq_s16): Remove.
35295 (__arm_vqaddq_n_s16): Remove.
35296 (__arm_vqsubq_u32): Remove.
35297 (__arm_vqsubq_n_u32): Remove.
35298 (__arm_vqaddq_u32): Remove.
35299 (__arm_vqaddq_n_u32): Remove.
35300 (__arm_vqsubq_s32): Remove.
35301 (__arm_vqsubq_n_s32): Remove.
35302 (__arm_vqaddq_s32): Remove.
35303 (__arm_vqaddq_n_s32): Remove.
35304 (__arm_vqaddq_m_n_s8): Remove.
35305 (__arm_vqaddq_m_n_s32): Remove.
35306 (__arm_vqaddq_m_n_s16): Remove.
35307 (__arm_vqaddq_m_n_u8): Remove.
35308 (__arm_vqaddq_m_n_u32): Remove.
35309 (__arm_vqaddq_m_n_u16): Remove.
35310 (__arm_vqaddq_m_s8): Remove.
35311 (__arm_vqaddq_m_s32): Remove.
35312 (__arm_vqaddq_m_s16): Remove.
35313 (__arm_vqaddq_m_u8): Remove.
35314 (__arm_vqaddq_m_u32): Remove.
35315 (__arm_vqaddq_m_u16): Remove.
35316 (__arm_vqsubq_m_n_s8): Remove.
35317 (__arm_vqsubq_m_n_s32): Remove.
35318 (__arm_vqsubq_m_n_s16): Remove.
35319 (__arm_vqsubq_m_n_u8): Remove.
35320 (__arm_vqsubq_m_n_u32): Remove.
35321 (__arm_vqsubq_m_n_u16): Remove.
35322 (__arm_vqsubq_m_s8): Remove.
35323 (__arm_vqsubq_m_s32): Remove.
35324 (__arm_vqsubq_m_s16): Remove.
35325 (__arm_vqsubq_m_u8): Remove.
35326 (__arm_vqsubq_m_u32): Remove.
35327 (__arm_vqsubq_m_u16): Remove.
35328 (__arm_vqsubq): Remove.
35329 (__arm_vqaddq): Remove.
35330 (__arm_vqaddq_m): Remove.
35331 (__arm_vqsubq_m): Remove.
35332 (vqdmulhq): Remove.
35333 (vqdmulhq_m): Remove.
35334 (vqdmulhq_s8): Remove.
35335 (vqdmulhq_n_s8): Remove.
35336 (vqdmulhq_s16): Remove.
35337 (vqdmulhq_n_s16): Remove.
35338 (vqdmulhq_s32): Remove.
35339 (vqdmulhq_n_s32): Remove.
35340 (vqdmulhq_m_n_s8): Remove.
35341 (vqdmulhq_m_n_s32): Remove.
35342 (vqdmulhq_m_n_s16): Remove.
35343 (vqdmulhq_m_s8): Remove.
35344 (vqdmulhq_m_s32): Remove.
35345 (vqdmulhq_m_s16): Remove.
35346 (__arm_vqdmulhq_s8): Remove.
35347 (__arm_vqdmulhq_n_s8): Remove.
35348 (__arm_vqdmulhq_s16): Remove.
35349 (__arm_vqdmulhq_n_s16): Remove.
35350 (__arm_vqdmulhq_s32): Remove.
35351 (__arm_vqdmulhq_n_s32): Remove.
35352 (__arm_vqdmulhq_m_n_s8): Remove.
35353 (__arm_vqdmulhq_m_n_s32): Remove.
35354 (__arm_vqdmulhq_m_n_s16): Remove.
35355 (__arm_vqdmulhq_m_s8): Remove.
35356 (__arm_vqdmulhq_m_s32): Remove.
35357 (__arm_vqdmulhq_m_s16): Remove.
35358 (__arm_vqdmulhq): Remove.
35359 (__arm_vqdmulhq_m): Remove.
35361 (vrhaddq_m): Remove.
35362 (vrhaddq_x): Remove.
35363 (vrhaddq_u8): Remove.
35364 (vrhaddq_s8): Remove.
35365 (vrhaddq_u16): Remove.
35366 (vrhaddq_s16): Remove.
35367 (vrhaddq_u32): Remove.
35368 (vrhaddq_s32): Remove.
35369 (vrhaddq_m_s8): Remove.
35370 (vrhaddq_m_s32): Remove.
35371 (vrhaddq_m_s16): Remove.
35372 (vrhaddq_m_u8): Remove.
35373 (vrhaddq_m_u32): Remove.
35374 (vrhaddq_m_u16): Remove.
35375 (vrhaddq_x_s8): Remove.
35376 (vrhaddq_x_s16): Remove.
35377 (vrhaddq_x_s32): Remove.
35378 (vrhaddq_x_u8): Remove.
35379 (vrhaddq_x_u16): Remove.
35380 (vrhaddq_x_u32): Remove.
35381 (__arm_vrhaddq_u8): Remove.
35382 (__arm_vrhaddq_s8): Remove.
35383 (__arm_vrhaddq_u16): Remove.
35384 (__arm_vrhaddq_s16): Remove.
35385 (__arm_vrhaddq_u32): Remove.
35386 (__arm_vrhaddq_s32): Remove.
35387 (__arm_vrhaddq_m_s8): Remove.
35388 (__arm_vrhaddq_m_s32): Remove.
35389 (__arm_vrhaddq_m_s16): Remove.
35390 (__arm_vrhaddq_m_u8): Remove.
35391 (__arm_vrhaddq_m_u32): Remove.
35392 (__arm_vrhaddq_m_u16): Remove.
35393 (__arm_vrhaddq_x_s8): Remove.
35394 (__arm_vrhaddq_x_s16): Remove.
35395 (__arm_vrhaddq_x_s32): Remove.
35396 (__arm_vrhaddq_x_u8): Remove.
35397 (__arm_vrhaddq_x_u16): Remove.
35398 (__arm_vrhaddq_x_u32): Remove.
35399 (__arm_vrhaddq): Remove.
35400 (__arm_vrhaddq_m): Remove.
35401 (__arm_vrhaddq_x): Remove.
35403 (vrmulhq_m): Remove.
35404 (vrmulhq_x): Remove.
35405 (vrmulhq_u8): Remove.
35406 (vrmulhq_s8): Remove.
35407 (vrmulhq_u16): Remove.
35408 (vrmulhq_s16): Remove.
35409 (vrmulhq_u32): Remove.
35410 (vrmulhq_s32): Remove.
35411 (vrmulhq_m_s8): Remove.
35412 (vrmulhq_m_s32): Remove.
35413 (vrmulhq_m_s16): Remove.
35414 (vrmulhq_m_u8): Remove.
35415 (vrmulhq_m_u32): Remove.
35416 (vrmulhq_m_u16): Remove.
35417 (vrmulhq_x_s8): Remove.
35418 (vrmulhq_x_s16): Remove.
35419 (vrmulhq_x_s32): Remove.
35420 (vrmulhq_x_u8): Remove.
35421 (vrmulhq_x_u16): Remove.
35422 (vrmulhq_x_u32): Remove.
35423 (__arm_vrmulhq_u8): Remove.
35424 (__arm_vrmulhq_s8): Remove.
35425 (__arm_vrmulhq_u16): Remove.
35426 (__arm_vrmulhq_s16): Remove.
35427 (__arm_vrmulhq_u32): Remove.
35428 (__arm_vrmulhq_s32): Remove.
35429 (__arm_vrmulhq_m_s8): Remove.
35430 (__arm_vrmulhq_m_s32): Remove.
35431 (__arm_vrmulhq_m_s16): Remove.
35432 (__arm_vrmulhq_m_u8): Remove.
35433 (__arm_vrmulhq_m_u32): Remove.
35434 (__arm_vrmulhq_m_u16): Remove.
35435 (__arm_vrmulhq_x_s8): Remove.
35436 (__arm_vrmulhq_x_s16): Remove.
35437 (__arm_vrmulhq_x_s32): Remove.
35438 (__arm_vrmulhq_x_u8): Remove.
35439 (__arm_vrmulhq_x_u16): Remove.
35440 (__arm_vrmulhq_x_u32): Remove.
35441 (__arm_vrmulhq): Remove.
35442 (__arm_vrmulhq_m): Remove.
35443 (__arm_vrmulhq_x): Remove.
35445 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35447 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
35448 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
35449 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
35450 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
35451 * config/arm/mve.md (mve_vabdq_<supf><mode>)
35452 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
35453 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
35454 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
35455 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
35456 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
35457 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
35459 (@mve_<mve_insn>q_<supf><mode>): ... this.
35460 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
35461 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
35462 gen_mve_vhaddq / gen_mve_vrhaddq.
35464 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35466 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
35467 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
35468 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
35469 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
35470 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
35471 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
35472 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
35473 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
35474 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
35475 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
35476 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
35477 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
35478 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35480 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35482 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
35483 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
35485 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
35486 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
35487 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
35488 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
35489 (mve_vqsubq_n_<supf><mode>): Merge into ...
35490 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35492 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35494 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
35495 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
35496 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
35497 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
35498 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
35499 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
35500 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
35501 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
35502 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
35503 (mve_vshlq_m_<supf><mode>): Merged into
35504 @mve_<mve_insn>q_m_<supf><mode>.
35505 (mve_vabdq_m_<supf><mode>): Likewise.
35506 (mve_vhaddq_m_<supf><mode>): Likewise.
35507 (mve_vhsubq_m_<supf><mode>): Likewise.
35508 (mve_vmaxq_m_<supf><mode>): Likewise.
35509 (mve_vminq_m_<supf><mode>): Likewise.
35510 (mve_vmulhq_m_<supf><mode>): Likewise.
35511 (mve_vqaddq_m_<supf><mode>): Likewise.
35512 (mve_vqrshlq_m_<supf><mode>): Likewise.
35513 (mve_vqshlq_m_<supf><mode>): Likewise.
35514 (mve_vqsubq_m_<supf><mode>): Likewise.
35515 (mve_vrhaddq_m_<supf><mode>): Likewise.
35516 (mve_vrmulhq_m_<supf><mode>): Likewise.
35517 (mve_vrshlq_m_<supf><mode>): Likewise.
35518 (mve_vqdmladhq_m_s<mode>): Likewise.
35519 (mve_vqdmladhxq_m_s<mode>): Likewise.
35520 (mve_vqdmlsdhq_m_s<mode>): Likewise.
35521 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
35522 (mve_vqdmulhq_m_s<mode>): Likewise.
35523 (mve_vqrdmladhq_m_s<mode>): Likewise.
35524 (mve_vqrdmladhxq_m_s<mode>): Likewise.
35525 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
35526 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
35527 (mve_vqrdmulhq_m_s<mode>): Likewise.
35529 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35531 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
35532 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
35533 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
35534 * config/arm/arm_mve.h (vcreateq_f16): Remove.
35535 (vcreateq_f32): Remove.
35536 (vcreateq_u8): Remove.
35537 (vcreateq_u16): Remove.
35538 (vcreateq_u32): Remove.
35539 (vcreateq_u64): Remove.
35540 (vcreateq_s8): Remove.
35541 (vcreateq_s16): Remove.
35542 (vcreateq_s32): Remove.
35543 (vcreateq_s64): Remove.
35544 (__arm_vcreateq_u8): Remove.
35545 (__arm_vcreateq_u16): Remove.
35546 (__arm_vcreateq_u32): Remove.
35547 (__arm_vcreateq_u64): Remove.
35548 (__arm_vcreateq_s8): Remove.
35549 (__arm_vcreateq_s16): Remove.
35550 (__arm_vcreateq_s32): Remove.
35551 (__arm_vcreateq_s64): Remove.
35552 (__arm_vcreateq_f16): Remove.
35553 (__arm_vcreateq_f32): Remove.
35555 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35557 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
35558 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
35559 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
35560 (@mve_<mve_insn>q_f<mode>): ... this.
35561 (mve_vcreateq_<supf><mode>): Rename into ...
35562 (@mve_<mve_insn>q_<supf><mode>): ... this.
35564 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35566 * config/arm/arm-mve-builtins-shapes.cc (create): New.
35567 * config/arm/arm-mve-builtins-shapes.h: (create): New.
35569 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35571 * config/arm/arm-mve-builtins-functions.h (class
35572 unspec_mve_function_exact_insn): New.
35574 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35576 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
35578 * config/arm/arm-mve-builtins-base.def (vorrq): New.
35579 * config/arm/arm-mve-builtins-base.h (vorrq): New.
35580 * config/arm/arm-mve-builtins.cc
35581 (function_instance::has_inactive_argument): Handle vorrq.
35582 * config/arm/arm_mve.h (vorrq): Remove.
35583 (vorrq_m_n): Remove.
35586 (vorrq_u8): Remove.
35587 (vorrq_s8): Remove.
35588 (vorrq_u16): Remove.
35589 (vorrq_s16): Remove.
35590 (vorrq_u32): Remove.
35591 (vorrq_s32): Remove.
35592 (vorrq_n_u16): Remove.
35593 (vorrq_f16): Remove.
35594 (vorrq_n_s16): Remove.
35595 (vorrq_n_u32): Remove.
35596 (vorrq_f32): Remove.
35597 (vorrq_n_s32): Remove.
35598 (vorrq_m_n_s16): Remove.
35599 (vorrq_m_n_u16): Remove.
35600 (vorrq_m_n_s32): Remove.
35601 (vorrq_m_n_u32): Remove.
35602 (vorrq_m_s8): Remove.
35603 (vorrq_m_s32): Remove.
35604 (vorrq_m_s16): Remove.
35605 (vorrq_m_u8): Remove.
35606 (vorrq_m_u32): Remove.
35607 (vorrq_m_u16): Remove.
35608 (vorrq_m_f32): Remove.
35609 (vorrq_m_f16): Remove.
35610 (vorrq_x_s8): Remove.
35611 (vorrq_x_s16): Remove.
35612 (vorrq_x_s32): Remove.
35613 (vorrq_x_u8): Remove.
35614 (vorrq_x_u16): Remove.
35615 (vorrq_x_u32): Remove.
35616 (vorrq_x_f16): Remove.
35617 (vorrq_x_f32): Remove.
35618 (__arm_vorrq_u8): Remove.
35619 (__arm_vorrq_s8): Remove.
35620 (__arm_vorrq_u16): Remove.
35621 (__arm_vorrq_s16): Remove.
35622 (__arm_vorrq_u32): Remove.
35623 (__arm_vorrq_s32): Remove.
35624 (__arm_vorrq_n_u16): Remove.
35625 (__arm_vorrq_n_s16): Remove.
35626 (__arm_vorrq_n_u32): Remove.
35627 (__arm_vorrq_n_s32): Remove.
35628 (__arm_vorrq_m_n_s16): Remove.
35629 (__arm_vorrq_m_n_u16): Remove.
35630 (__arm_vorrq_m_n_s32): Remove.
35631 (__arm_vorrq_m_n_u32): Remove.
35632 (__arm_vorrq_m_s8): Remove.
35633 (__arm_vorrq_m_s32): Remove.
35634 (__arm_vorrq_m_s16): Remove.
35635 (__arm_vorrq_m_u8): Remove.
35636 (__arm_vorrq_m_u32): Remove.
35637 (__arm_vorrq_m_u16): Remove.
35638 (__arm_vorrq_x_s8): Remove.
35639 (__arm_vorrq_x_s16): Remove.
35640 (__arm_vorrq_x_s32): Remove.
35641 (__arm_vorrq_x_u8): Remove.
35642 (__arm_vorrq_x_u16): Remove.
35643 (__arm_vorrq_x_u32): Remove.
35644 (__arm_vorrq_f16): Remove.
35645 (__arm_vorrq_f32): Remove.
35646 (__arm_vorrq_m_f32): Remove.
35647 (__arm_vorrq_m_f16): Remove.
35648 (__arm_vorrq_x_f16): Remove.
35649 (__arm_vorrq_x_f32): Remove.
35650 (__arm_vorrq): Remove.
35651 (__arm_vorrq_m_n): Remove.
35652 (__arm_vorrq_m): Remove.
35653 (__arm_vorrq_x): Remove.
35655 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35657 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
35658 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
35659 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
35660 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
35662 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35664 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
35665 (vandq,veorq): New.
35666 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
35667 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
35668 * config/arm/arm_mve.h (vandq): Remove.
35671 (vandq_u8): Remove.
35672 (vandq_s8): Remove.
35673 (vandq_u16): Remove.
35674 (vandq_s16): Remove.
35675 (vandq_u32): Remove.
35676 (vandq_s32): Remove.
35677 (vandq_f16): Remove.
35678 (vandq_f32): Remove.
35679 (vandq_m_s8): Remove.
35680 (vandq_m_s32): Remove.
35681 (vandq_m_s16): Remove.
35682 (vandq_m_u8): Remove.
35683 (vandq_m_u32): Remove.
35684 (vandq_m_u16): Remove.
35685 (vandq_m_f32): Remove.
35686 (vandq_m_f16): Remove.
35687 (vandq_x_s8): Remove.
35688 (vandq_x_s16): Remove.
35689 (vandq_x_s32): Remove.
35690 (vandq_x_u8): Remove.
35691 (vandq_x_u16): Remove.
35692 (vandq_x_u32): Remove.
35693 (vandq_x_f16): Remove.
35694 (vandq_x_f32): Remove.
35695 (__arm_vandq_u8): Remove.
35696 (__arm_vandq_s8): Remove.
35697 (__arm_vandq_u16): Remove.
35698 (__arm_vandq_s16): Remove.
35699 (__arm_vandq_u32): Remove.
35700 (__arm_vandq_s32): Remove.
35701 (__arm_vandq_m_s8): Remove.
35702 (__arm_vandq_m_s32): Remove.
35703 (__arm_vandq_m_s16): Remove.
35704 (__arm_vandq_m_u8): Remove.
35705 (__arm_vandq_m_u32): Remove.
35706 (__arm_vandq_m_u16): Remove.
35707 (__arm_vandq_x_s8): Remove.
35708 (__arm_vandq_x_s16): Remove.
35709 (__arm_vandq_x_s32): Remove.
35710 (__arm_vandq_x_u8): Remove.
35711 (__arm_vandq_x_u16): Remove.
35712 (__arm_vandq_x_u32): Remove.
35713 (__arm_vandq_f16): Remove.
35714 (__arm_vandq_f32): Remove.
35715 (__arm_vandq_m_f32): Remove.
35716 (__arm_vandq_m_f16): Remove.
35717 (__arm_vandq_x_f16): Remove.
35718 (__arm_vandq_x_f32): Remove.
35719 (__arm_vandq): Remove.
35720 (__arm_vandq_m): Remove.
35721 (__arm_vandq_x): Remove.
35724 (veorq_u8): Remove.
35725 (veorq_s8): Remove.
35726 (veorq_u16): Remove.
35727 (veorq_s16): Remove.
35728 (veorq_u32): Remove.
35729 (veorq_s32): Remove.
35730 (veorq_f16): Remove.
35731 (veorq_f32): Remove.
35732 (veorq_m_s8): Remove.
35733 (veorq_m_s32): Remove.
35734 (veorq_m_s16): Remove.
35735 (veorq_m_u8): Remove.
35736 (veorq_m_u32): Remove.
35737 (veorq_m_u16): Remove.
35738 (veorq_m_f32): Remove.
35739 (veorq_m_f16): Remove.
35740 (veorq_x_s8): Remove.
35741 (veorq_x_s16): Remove.
35742 (veorq_x_s32): Remove.
35743 (veorq_x_u8): Remove.
35744 (veorq_x_u16): Remove.
35745 (veorq_x_u32): Remove.
35746 (veorq_x_f16): Remove.
35747 (veorq_x_f32): Remove.
35748 (__arm_veorq_u8): Remove.
35749 (__arm_veorq_s8): Remove.
35750 (__arm_veorq_u16): Remove.
35751 (__arm_veorq_s16): Remove.
35752 (__arm_veorq_u32): Remove.
35753 (__arm_veorq_s32): Remove.
35754 (__arm_veorq_m_s8): Remove.
35755 (__arm_veorq_m_s32): Remove.
35756 (__arm_veorq_m_s16): Remove.
35757 (__arm_veorq_m_u8): Remove.
35758 (__arm_veorq_m_u32): Remove.
35759 (__arm_veorq_m_u16): Remove.
35760 (__arm_veorq_x_s8): Remove.
35761 (__arm_veorq_x_s16): Remove.
35762 (__arm_veorq_x_s32): Remove.
35763 (__arm_veorq_x_u8): Remove.
35764 (__arm_veorq_x_u16): Remove.
35765 (__arm_veorq_x_u32): Remove.
35766 (__arm_veorq_f16): Remove.
35767 (__arm_veorq_f32): Remove.
35768 (__arm_veorq_m_f32): Remove.
35769 (__arm_veorq_m_f16): Remove.
35770 (__arm_veorq_x_f16): Remove.
35771 (__arm_veorq_x_f32): Remove.
35772 (__arm_veorq): Remove.
35773 (__arm_veorq_m): Remove.
35774 (__arm_veorq_x): Remove.
35776 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35778 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
35779 (MVE_FP_M_BINARY_LOGIC): New.
35780 (MVE_INT_M_N_BINARY_LOGIC): New.
35781 (MVE_INT_N_BINARY_LOGIC): New.
35782 (mve_insn): Add vand, veor, vorr, vbic.
35783 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
35784 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
35785 (mve_vbicq_m_<supf><mode>): Merge into ...
35786 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
35787 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
35788 (mve_vbicq_m_f<mode>): Merge into ...
35789 (@mve_<mve_insn>q_m_f<mode>): ... this.
35790 (mve_vorrq_n_<supf><mode>)
35791 (mve_vbicq_n_<supf><mode>): Merge into ...
35792 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35793 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
35795 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35797 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35799 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
35800 * config/arm/arm-mve-builtins-shapes.h (binary): New.
35802 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35804 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
35806 (vaddq, vmulq, vsubq): New.
35807 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
35808 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
35809 * config/arm/arm_mve.h (vaddq): Remove.
35812 (vaddq_n_u8): Remove.
35813 (vaddq_n_s8): Remove.
35814 (vaddq_n_u16): Remove.
35815 (vaddq_n_s16): Remove.
35816 (vaddq_n_u32): Remove.
35817 (vaddq_n_s32): Remove.
35818 (vaddq_n_f16): Remove.
35819 (vaddq_n_f32): Remove.
35820 (vaddq_m_n_s8): Remove.
35821 (vaddq_m_n_s32): Remove.
35822 (vaddq_m_n_s16): Remove.
35823 (vaddq_m_n_u8): Remove.
35824 (vaddq_m_n_u32): Remove.
35825 (vaddq_m_n_u16): Remove.
35826 (vaddq_m_s8): Remove.
35827 (vaddq_m_s32): Remove.
35828 (vaddq_m_s16): Remove.
35829 (vaddq_m_u8): Remove.
35830 (vaddq_m_u32): Remove.
35831 (vaddq_m_u16): Remove.
35832 (vaddq_m_f32): Remove.
35833 (vaddq_m_f16): Remove.
35834 (vaddq_m_n_f32): Remove.
35835 (vaddq_m_n_f16): Remove.
35836 (vaddq_s8): Remove.
35837 (vaddq_s16): Remove.
35838 (vaddq_s32): Remove.
35839 (vaddq_u8): Remove.
35840 (vaddq_u16): Remove.
35841 (vaddq_u32): Remove.
35842 (vaddq_f16): Remove.
35843 (vaddq_f32): Remove.
35844 (vaddq_x_s8): Remove.
35845 (vaddq_x_s16): Remove.
35846 (vaddq_x_s32): Remove.
35847 (vaddq_x_n_s8): Remove.
35848 (vaddq_x_n_s16): Remove.
35849 (vaddq_x_n_s32): Remove.
35850 (vaddq_x_u8): Remove.
35851 (vaddq_x_u16): Remove.
35852 (vaddq_x_u32): Remove.
35853 (vaddq_x_n_u8): Remove.
35854 (vaddq_x_n_u16): Remove.
35855 (vaddq_x_n_u32): Remove.
35856 (vaddq_x_f16): Remove.
35857 (vaddq_x_f32): Remove.
35858 (vaddq_x_n_f16): Remove.
35859 (vaddq_x_n_f32): Remove.
35860 (__arm_vaddq_n_u8): Remove.
35861 (__arm_vaddq_n_s8): Remove.
35862 (__arm_vaddq_n_u16): Remove.
35863 (__arm_vaddq_n_s16): Remove.
35864 (__arm_vaddq_n_u32): Remove.
35865 (__arm_vaddq_n_s32): Remove.
35866 (__arm_vaddq_m_n_s8): Remove.
35867 (__arm_vaddq_m_n_s32): Remove.
35868 (__arm_vaddq_m_n_s16): Remove.
35869 (__arm_vaddq_m_n_u8): Remove.
35870 (__arm_vaddq_m_n_u32): Remove.
35871 (__arm_vaddq_m_n_u16): Remove.
35872 (__arm_vaddq_m_s8): Remove.
35873 (__arm_vaddq_m_s32): Remove.
35874 (__arm_vaddq_m_s16): Remove.
35875 (__arm_vaddq_m_u8): Remove.
35876 (__arm_vaddq_m_u32): Remove.
35877 (__arm_vaddq_m_u16): Remove.
35878 (__arm_vaddq_s8): Remove.
35879 (__arm_vaddq_s16): Remove.
35880 (__arm_vaddq_s32): Remove.
35881 (__arm_vaddq_u8): Remove.
35882 (__arm_vaddq_u16): Remove.
35883 (__arm_vaddq_u32): Remove.
35884 (__arm_vaddq_x_s8): Remove.
35885 (__arm_vaddq_x_s16): Remove.
35886 (__arm_vaddq_x_s32): Remove.
35887 (__arm_vaddq_x_n_s8): Remove.
35888 (__arm_vaddq_x_n_s16): Remove.
35889 (__arm_vaddq_x_n_s32): Remove.
35890 (__arm_vaddq_x_u8): Remove.
35891 (__arm_vaddq_x_u16): Remove.
35892 (__arm_vaddq_x_u32): Remove.
35893 (__arm_vaddq_x_n_u8): Remove.
35894 (__arm_vaddq_x_n_u16): Remove.
35895 (__arm_vaddq_x_n_u32): Remove.
35896 (__arm_vaddq_n_f16): Remove.
35897 (__arm_vaddq_n_f32): Remove.
35898 (__arm_vaddq_m_f32): Remove.
35899 (__arm_vaddq_m_f16): Remove.
35900 (__arm_vaddq_m_n_f32): Remove.
35901 (__arm_vaddq_m_n_f16): Remove.
35902 (__arm_vaddq_f16): Remove.
35903 (__arm_vaddq_f32): Remove.
35904 (__arm_vaddq_x_f16): Remove.
35905 (__arm_vaddq_x_f32): Remove.
35906 (__arm_vaddq_x_n_f16): Remove.
35907 (__arm_vaddq_x_n_f32): Remove.
35908 (__arm_vaddq): Remove.
35909 (__arm_vaddq_m): Remove.
35910 (__arm_vaddq_x): Remove.
35914 (vmulq_u8): Remove.
35915 (vmulq_n_u8): Remove.
35916 (vmulq_s8): Remove.
35917 (vmulq_n_s8): Remove.
35918 (vmulq_u16): Remove.
35919 (vmulq_n_u16): Remove.
35920 (vmulq_s16): Remove.
35921 (vmulq_n_s16): Remove.
35922 (vmulq_u32): Remove.
35923 (vmulq_n_u32): Remove.
35924 (vmulq_s32): Remove.
35925 (vmulq_n_s32): Remove.
35926 (vmulq_n_f16): Remove.
35927 (vmulq_f16): Remove.
35928 (vmulq_n_f32): Remove.
35929 (vmulq_f32): Remove.
35930 (vmulq_m_n_s8): Remove.
35931 (vmulq_m_n_s32): Remove.
35932 (vmulq_m_n_s16): Remove.
35933 (vmulq_m_n_u8): Remove.
35934 (vmulq_m_n_u32): Remove.
35935 (vmulq_m_n_u16): Remove.
35936 (vmulq_m_s8): Remove.
35937 (vmulq_m_s32): Remove.
35938 (vmulq_m_s16): Remove.
35939 (vmulq_m_u8): Remove.
35940 (vmulq_m_u32): Remove.
35941 (vmulq_m_u16): Remove.
35942 (vmulq_m_f32): Remove.
35943 (vmulq_m_f16): Remove.
35944 (vmulq_m_n_f32): Remove.
35945 (vmulq_m_n_f16): Remove.
35946 (vmulq_x_s8): Remove.
35947 (vmulq_x_s16): Remove.
35948 (vmulq_x_s32): Remove.
35949 (vmulq_x_n_s8): Remove.
35950 (vmulq_x_n_s16): Remove.
35951 (vmulq_x_n_s32): Remove.
35952 (vmulq_x_u8): Remove.
35953 (vmulq_x_u16): Remove.
35954 (vmulq_x_u32): Remove.
35955 (vmulq_x_n_u8): Remove.
35956 (vmulq_x_n_u16): Remove.
35957 (vmulq_x_n_u32): Remove.
35958 (vmulq_x_f16): Remove.
35959 (vmulq_x_f32): Remove.
35960 (vmulq_x_n_f16): Remove.
35961 (vmulq_x_n_f32): Remove.
35962 (__arm_vmulq_u8): Remove.
35963 (__arm_vmulq_n_u8): Remove.
35964 (__arm_vmulq_s8): Remove.
35965 (__arm_vmulq_n_s8): Remove.
35966 (__arm_vmulq_u16): Remove.
35967 (__arm_vmulq_n_u16): Remove.
35968 (__arm_vmulq_s16): Remove.
35969 (__arm_vmulq_n_s16): Remove.
35970 (__arm_vmulq_u32): Remove.
35971 (__arm_vmulq_n_u32): Remove.
35972 (__arm_vmulq_s32): Remove.
35973 (__arm_vmulq_n_s32): Remove.
35974 (__arm_vmulq_m_n_s8): Remove.
35975 (__arm_vmulq_m_n_s32): Remove.
35976 (__arm_vmulq_m_n_s16): Remove.
35977 (__arm_vmulq_m_n_u8): Remove.
35978 (__arm_vmulq_m_n_u32): Remove.
35979 (__arm_vmulq_m_n_u16): Remove.
35980 (__arm_vmulq_m_s8): Remove.
35981 (__arm_vmulq_m_s32): Remove.
35982 (__arm_vmulq_m_s16): Remove.
35983 (__arm_vmulq_m_u8): Remove.
35984 (__arm_vmulq_m_u32): Remove.
35985 (__arm_vmulq_m_u16): Remove.
35986 (__arm_vmulq_x_s8): Remove.
35987 (__arm_vmulq_x_s16): Remove.
35988 (__arm_vmulq_x_s32): Remove.
35989 (__arm_vmulq_x_n_s8): Remove.
35990 (__arm_vmulq_x_n_s16): Remove.
35991 (__arm_vmulq_x_n_s32): Remove.
35992 (__arm_vmulq_x_u8): Remove.
35993 (__arm_vmulq_x_u16): Remove.
35994 (__arm_vmulq_x_u32): Remove.
35995 (__arm_vmulq_x_n_u8): Remove.
35996 (__arm_vmulq_x_n_u16): Remove.
35997 (__arm_vmulq_x_n_u32): Remove.
35998 (__arm_vmulq_n_f16): Remove.
35999 (__arm_vmulq_f16): Remove.
36000 (__arm_vmulq_n_f32): Remove.
36001 (__arm_vmulq_f32): Remove.
36002 (__arm_vmulq_m_f32): Remove.
36003 (__arm_vmulq_m_f16): Remove.
36004 (__arm_vmulq_m_n_f32): Remove.
36005 (__arm_vmulq_m_n_f16): Remove.
36006 (__arm_vmulq_x_f16): Remove.
36007 (__arm_vmulq_x_f32): Remove.
36008 (__arm_vmulq_x_n_f16): Remove.
36009 (__arm_vmulq_x_n_f32): Remove.
36010 (__arm_vmulq): Remove.
36011 (__arm_vmulq_m): Remove.
36012 (__arm_vmulq_x): Remove.
36016 (vsubq_n_f16): Remove.
36017 (vsubq_n_f32): Remove.
36018 (vsubq_u8): Remove.
36019 (vsubq_n_u8): Remove.
36020 (vsubq_s8): Remove.
36021 (vsubq_n_s8): Remove.
36022 (vsubq_u16): Remove.
36023 (vsubq_n_u16): Remove.
36024 (vsubq_s16): Remove.
36025 (vsubq_n_s16): Remove.
36026 (vsubq_u32): Remove.
36027 (vsubq_n_u32): Remove.
36028 (vsubq_s32): Remove.
36029 (vsubq_n_s32): Remove.
36030 (vsubq_f16): Remove.
36031 (vsubq_f32): Remove.
36032 (vsubq_m_s8): Remove.
36033 (vsubq_m_u8): Remove.
36034 (vsubq_m_s16): Remove.
36035 (vsubq_m_u16): Remove.
36036 (vsubq_m_s32): Remove.
36037 (vsubq_m_u32): Remove.
36038 (vsubq_m_n_s8): Remove.
36039 (vsubq_m_n_s32): Remove.
36040 (vsubq_m_n_s16): Remove.
36041 (vsubq_m_n_u8): Remove.
36042 (vsubq_m_n_u32): Remove.
36043 (vsubq_m_n_u16): Remove.
36044 (vsubq_m_f32): Remove.
36045 (vsubq_m_f16): Remove.
36046 (vsubq_m_n_f32): Remove.
36047 (vsubq_m_n_f16): Remove.
36048 (vsubq_x_s8): Remove.
36049 (vsubq_x_s16): Remove.
36050 (vsubq_x_s32): Remove.
36051 (vsubq_x_n_s8): Remove.
36052 (vsubq_x_n_s16): Remove.
36053 (vsubq_x_n_s32): Remove.
36054 (vsubq_x_u8): Remove.
36055 (vsubq_x_u16): Remove.
36056 (vsubq_x_u32): Remove.
36057 (vsubq_x_n_u8): Remove.
36058 (vsubq_x_n_u16): Remove.
36059 (vsubq_x_n_u32): Remove.
36060 (vsubq_x_f16): Remove.
36061 (vsubq_x_f32): Remove.
36062 (vsubq_x_n_f16): Remove.
36063 (vsubq_x_n_f32): Remove.
36064 (__arm_vsubq_u8): Remove.
36065 (__arm_vsubq_n_u8): Remove.
36066 (__arm_vsubq_s8): Remove.
36067 (__arm_vsubq_n_s8): Remove.
36068 (__arm_vsubq_u16): Remove.
36069 (__arm_vsubq_n_u16): Remove.
36070 (__arm_vsubq_s16): Remove.
36071 (__arm_vsubq_n_s16): Remove.
36072 (__arm_vsubq_u32): Remove.
36073 (__arm_vsubq_n_u32): Remove.
36074 (__arm_vsubq_s32): Remove.
36075 (__arm_vsubq_n_s32): Remove.
36076 (__arm_vsubq_m_s8): Remove.
36077 (__arm_vsubq_m_u8): Remove.
36078 (__arm_vsubq_m_s16): Remove.
36079 (__arm_vsubq_m_u16): Remove.
36080 (__arm_vsubq_m_s32): Remove.
36081 (__arm_vsubq_m_u32): Remove.
36082 (__arm_vsubq_m_n_s8): Remove.
36083 (__arm_vsubq_m_n_s32): Remove.
36084 (__arm_vsubq_m_n_s16): Remove.
36085 (__arm_vsubq_m_n_u8): Remove.
36086 (__arm_vsubq_m_n_u32): Remove.
36087 (__arm_vsubq_m_n_u16): Remove.
36088 (__arm_vsubq_x_s8): Remove.
36089 (__arm_vsubq_x_s16): Remove.
36090 (__arm_vsubq_x_s32): Remove.
36091 (__arm_vsubq_x_n_s8): Remove.
36092 (__arm_vsubq_x_n_s16): Remove.
36093 (__arm_vsubq_x_n_s32): Remove.
36094 (__arm_vsubq_x_u8): Remove.
36095 (__arm_vsubq_x_u16): Remove.
36096 (__arm_vsubq_x_u32): Remove.
36097 (__arm_vsubq_x_n_u8): Remove.
36098 (__arm_vsubq_x_n_u16): Remove.
36099 (__arm_vsubq_x_n_u32): Remove.
36100 (__arm_vsubq_n_f16): Remove.
36101 (__arm_vsubq_n_f32): Remove.
36102 (__arm_vsubq_f16): Remove.
36103 (__arm_vsubq_f32): Remove.
36104 (__arm_vsubq_m_f32): Remove.
36105 (__arm_vsubq_m_f16): Remove.
36106 (__arm_vsubq_m_n_f32): Remove.
36107 (__arm_vsubq_m_n_f16): Remove.
36108 (__arm_vsubq_x_f16): Remove.
36109 (__arm_vsubq_x_f32): Remove.
36110 (__arm_vsubq_x_n_f16): Remove.
36111 (__arm_vsubq_x_n_f32): Remove.
36112 (__arm_vsubq): Remove.
36113 (__arm_vsubq_m): Remove.
36114 (__arm_vsubq_x): Remove.
36115 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
36117 (vmulq_u, vmulq_s, vmulq_f): Remove.
36118 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
36119 (mve_vmulq_<supf><mode>): Remove.
36121 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36123 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
36124 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
36125 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
36127 * config/arm/mve.md
36128 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
36130 (@mve_<mve_insn>q_n_f<mode>): ... this.
36131 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
36132 (mve_vsubq_n_<supf><mode>): Factorize into ...
36133 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
36134 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
36136 (mve_<mve_addsubmul>q<mode>): ... this.
36137 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
36139 (mve_<mve_addsubmul>q_f<mode>): ... this.
36140 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
36141 (mve_vsubq_m_<supf><mode>): Factorize into ...
36142 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
36143 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
36144 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
36145 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
36146 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
36148 (@mve_<mve_insn>q_m_f<mode>): ... this.
36149 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
36150 (mve_vsubq_m_n_f<mode>): Factorize into ...
36151 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
36153 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36155 * config/arm/arm-mve-builtins-functions.h (class
36156 unspec_based_mve_function_base): New.
36157 (class unspec_based_mve_function_exact_insn): New.
36159 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
36161 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
36162 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
36164 2023-05-03 Murray Steele <murray.steele@arm.com>
36165 Christophe Lyon <christophe.lyon@arm.com>
36167 * config/arm/arm-mve-builtins-base.cc (class
36168 vuninitializedq_impl): New.
36169 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
36170 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
36172 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
36173 * config/arm/arm-mve-builtins-shapes.h (inherent): New
36175 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
36176 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
36177 (__arm_vuninitializedq_u8): Remove.
36178 (__arm_vuninitializedq_u16): Remove.
36179 (__arm_vuninitializedq_u32): Remove.
36180 (__arm_vuninitializedq_u64): Remove.
36181 (__arm_vuninitializedq_s8): Remove.
36182 (__arm_vuninitializedq_s16): Remove.
36183 (__arm_vuninitializedq_s32): Remove.
36184 (__arm_vuninitializedq_s64): Remove.
36185 (__arm_vuninitializedq_f16): Remove.
36186 (__arm_vuninitializedq_f32): Remove.
36188 2023-05-03 Murray Steele <murray.steele@arm.com>
36189 Christophe Lyon <christophe.lyon@arm.com>
36191 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
36192 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
36193 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
36194 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
36195 (parse_type): Likewise.
36196 (parse_signature): Likewise.
36197 (build_one): Likewise.
36198 (build_all): Likewise.
36199 (overloaded_base): New struct.
36200 (unary_convert_def): Likewise.
36201 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
36202 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
36204 (TYPES_reinterpret_unsigned1): Likewise.
36205 (TYPES_reinterpret_integer): Likewise.
36206 (TYPES_reinterpret_integer1): Likewise.
36207 (TYPES_reinterpret_float1): Likewise.
36208 (TYPES_reinterpret_float): Likewise.
36209 (reinterpret_integer): New.
36210 (reinterpret_float): New.
36211 (handle_arm_mve_h): Register builtins.
36212 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
36213 (vreinterpretq_s32): Likewise.
36214 (vreinterpretq_s64): Likewise.
36215 (vreinterpretq_s8): Likewise.
36216 (vreinterpretq_u16): Likewise.
36217 (vreinterpretq_u32): Likewise.
36218 (vreinterpretq_u64): Likewise.
36219 (vreinterpretq_u8): Likewise.
36220 (vreinterpretq_f16): Likewise.
36221 (vreinterpretq_f32): Likewise.
36222 (vreinterpretq_s16_s32): Likewise.
36223 (vreinterpretq_s16_s64): Likewise.
36224 (vreinterpretq_s16_s8): Likewise.
36225 (vreinterpretq_s16_u16): Likewise.
36226 (vreinterpretq_s16_u32): Likewise.
36227 (vreinterpretq_s16_u64): Likewise.
36228 (vreinterpretq_s16_u8): Likewise.
36229 (vreinterpretq_s32_s16): Likewise.
36230 (vreinterpretq_s32_s64): Likewise.
36231 (vreinterpretq_s32_s8): Likewise.
36232 (vreinterpretq_s32_u16): Likewise.
36233 (vreinterpretq_s32_u32): Likewise.
36234 (vreinterpretq_s32_u64): Likewise.
36235 (vreinterpretq_s32_u8): Likewise.
36236 (vreinterpretq_s64_s16): Likewise.
36237 (vreinterpretq_s64_s32): Likewise.
36238 (vreinterpretq_s64_s8): Likewise.
36239 (vreinterpretq_s64_u16): Likewise.
36240 (vreinterpretq_s64_u32): Likewise.
36241 (vreinterpretq_s64_u64): Likewise.
36242 (vreinterpretq_s64_u8): Likewise.
36243 (vreinterpretq_s8_s16): Likewise.
36244 (vreinterpretq_s8_s32): Likewise.
36245 (vreinterpretq_s8_s64): Likewise.
36246 (vreinterpretq_s8_u16): Likewise.
36247 (vreinterpretq_s8_u32): Likewise.
36248 (vreinterpretq_s8_u64): Likewise.
36249 (vreinterpretq_s8_u8): Likewise.
36250 (vreinterpretq_u16_s16): Likewise.
36251 (vreinterpretq_u16_s32): Likewise.
36252 (vreinterpretq_u16_s64): Likewise.
36253 (vreinterpretq_u16_s8): Likewise.
36254 (vreinterpretq_u16_u32): Likewise.
36255 (vreinterpretq_u16_u64): Likewise.
36256 (vreinterpretq_u16_u8): Likewise.
36257 (vreinterpretq_u32_s16): Likewise.
36258 (vreinterpretq_u32_s32): Likewise.
36259 (vreinterpretq_u32_s64): Likewise.
36260 (vreinterpretq_u32_s8): Likewise.
36261 (vreinterpretq_u32_u16): Likewise.
36262 (vreinterpretq_u32_u64): Likewise.
36263 (vreinterpretq_u32_u8): Likewise.
36264 (vreinterpretq_u64_s16): Likewise.
36265 (vreinterpretq_u64_s32): Likewise.
36266 (vreinterpretq_u64_s64): Likewise.
36267 (vreinterpretq_u64_s8): Likewise.
36268 (vreinterpretq_u64_u16): Likewise.
36269 (vreinterpretq_u64_u32): Likewise.
36270 (vreinterpretq_u64_u8): Likewise.
36271 (vreinterpretq_u8_s16): Likewise.
36272 (vreinterpretq_u8_s32): Likewise.
36273 (vreinterpretq_u8_s64): Likewise.
36274 (vreinterpretq_u8_s8): Likewise.
36275 (vreinterpretq_u8_u16): Likewise.
36276 (vreinterpretq_u8_u32): Likewise.
36277 (vreinterpretq_u8_u64): Likewise.
36278 (vreinterpretq_s32_f16): Likewise.
36279 (vreinterpretq_s32_f32): Likewise.
36280 (vreinterpretq_u16_f16): Likewise.
36281 (vreinterpretq_u16_f32): Likewise.
36282 (vreinterpretq_u32_f16): Likewise.
36283 (vreinterpretq_u32_f32): Likewise.
36284 (vreinterpretq_u64_f16): Likewise.
36285 (vreinterpretq_u64_f32): Likewise.
36286 (vreinterpretq_u8_f16): Likewise.
36287 (vreinterpretq_u8_f32): Likewise.
36288 (vreinterpretq_f16_f32): Likewise.
36289 (vreinterpretq_f16_s16): Likewise.
36290 (vreinterpretq_f16_s32): Likewise.
36291 (vreinterpretq_f16_s64): Likewise.
36292 (vreinterpretq_f16_s8): Likewise.
36293 (vreinterpretq_f16_u16): Likewise.
36294 (vreinterpretq_f16_u32): Likewise.
36295 (vreinterpretq_f16_u64): Likewise.
36296 (vreinterpretq_f16_u8): Likewise.
36297 (vreinterpretq_f32_f16): Likewise.
36298 (vreinterpretq_f32_s16): Likewise.
36299 (vreinterpretq_f32_s32): Likewise.
36300 (vreinterpretq_f32_s64): Likewise.
36301 (vreinterpretq_f32_s8): Likewise.
36302 (vreinterpretq_f32_u16): Likewise.
36303 (vreinterpretq_f32_u32): Likewise.
36304 (vreinterpretq_f32_u64): Likewise.
36305 (vreinterpretq_f32_u8): Likewise.
36306 (vreinterpretq_s16_f16): Likewise.
36307 (vreinterpretq_s16_f32): Likewise.
36308 (vreinterpretq_s64_f16): Likewise.
36309 (vreinterpretq_s64_f32): Likewise.
36310 (vreinterpretq_s8_f16): Likewise.
36311 (vreinterpretq_s8_f32): Likewise.
36312 (__arm_vreinterpretq_f16): Likewise.
36313 (__arm_vreinterpretq_f32): Likewise.
36314 (__arm_vreinterpretq_s16): Likewise.
36315 (__arm_vreinterpretq_s32): Likewise.
36316 (__arm_vreinterpretq_s64): Likewise.
36317 (__arm_vreinterpretq_s8): Likewise.
36318 (__arm_vreinterpretq_u16): Likewise.
36319 (__arm_vreinterpretq_u32): Likewise.
36320 (__arm_vreinterpretq_u64): Likewise.
36321 (__arm_vreinterpretq_u8): Likewise.
36322 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
36323 (__arm_vreinterpretq_s16_s64): Likewise.
36324 (__arm_vreinterpretq_s16_s8): Likewise.
36325 (__arm_vreinterpretq_s16_u16): Likewise.
36326 (__arm_vreinterpretq_s16_u32): Likewise.
36327 (__arm_vreinterpretq_s16_u64): Likewise.
36328 (__arm_vreinterpretq_s16_u8): Likewise.
36329 (__arm_vreinterpretq_s32_s16): Likewise.
36330 (__arm_vreinterpretq_s32_s64): Likewise.
36331 (__arm_vreinterpretq_s32_s8): Likewise.
36332 (__arm_vreinterpretq_s32_u16): Likewise.
36333 (__arm_vreinterpretq_s32_u32): Likewise.
36334 (__arm_vreinterpretq_s32_u64): Likewise.
36335 (__arm_vreinterpretq_s32_u8): Likewise.
36336 (__arm_vreinterpretq_s64_s16): Likewise.
36337 (__arm_vreinterpretq_s64_s32): Likewise.
36338 (__arm_vreinterpretq_s64_s8): Likewise.
36339 (__arm_vreinterpretq_s64_u16): Likewise.
36340 (__arm_vreinterpretq_s64_u32): Likewise.
36341 (__arm_vreinterpretq_s64_u64): Likewise.
36342 (__arm_vreinterpretq_s64_u8): Likewise.
36343 (__arm_vreinterpretq_s8_s16): Likewise.
36344 (__arm_vreinterpretq_s8_s32): Likewise.
36345 (__arm_vreinterpretq_s8_s64): Likewise.
36346 (__arm_vreinterpretq_s8_u16): Likewise.
36347 (__arm_vreinterpretq_s8_u32): Likewise.
36348 (__arm_vreinterpretq_s8_u64): Likewise.
36349 (__arm_vreinterpretq_s8_u8): Likewise.
36350 (__arm_vreinterpretq_u16_s16): Likewise.
36351 (__arm_vreinterpretq_u16_s32): Likewise.
36352 (__arm_vreinterpretq_u16_s64): Likewise.
36353 (__arm_vreinterpretq_u16_s8): Likewise.
36354 (__arm_vreinterpretq_u16_u32): Likewise.
36355 (__arm_vreinterpretq_u16_u64): Likewise.
36356 (__arm_vreinterpretq_u16_u8): Likewise.
36357 (__arm_vreinterpretq_u32_s16): Likewise.
36358 (__arm_vreinterpretq_u32_s32): Likewise.
36359 (__arm_vreinterpretq_u32_s64): Likewise.
36360 (__arm_vreinterpretq_u32_s8): Likewise.
36361 (__arm_vreinterpretq_u32_u16): Likewise.
36362 (__arm_vreinterpretq_u32_u64): Likewise.
36363 (__arm_vreinterpretq_u32_u8): Likewise.
36364 (__arm_vreinterpretq_u64_s16): Likewise.
36365 (__arm_vreinterpretq_u64_s32): Likewise.
36366 (__arm_vreinterpretq_u64_s64): Likewise.
36367 (__arm_vreinterpretq_u64_s8): Likewise.
36368 (__arm_vreinterpretq_u64_u16): Likewise.
36369 (__arm_vreinterpretq_u64_u32): Likewise.
36370 (__arm_vreinterpretq_u64_u8): Likewise.
36371 (__arm_vreinterpretq_u8_s16): Likewise.
36372 (__arm_vreinterpretq_u8_s32): Likewise.
36373 (__arm_vreinterpretq_u8_s64): Likewise.
36374 (__arm_vreinterpretq_u8_s8): Likewise.
36375 (__arm_vreinterpretq_u8_u16): Likewise.
36376 (__arm_vreinterpretq_u8_u32): Likewise.
36377 (__arm_vreinterpretq_u8_u64): Likewise.
36378 (__arm_vreinterpretq_s32_f16): Likewise.
36379 (__arm_vreinterpretq_s32_f32): Likewise.
36380 (__arm_vreinterpretq_s16_f16): Likewise.
36381 (__arm_vreinterpretq_s16_f32): Likewise.
36382 (__arm_vreinterpretq_s64_f16): Likewise.
36383 (__arm_vreinterpretq_s64_f32): Likewise.
36384 (__arm_vreinterpretq_s8_f16): Likewise.
36385 (__arm_vreinterpretq_s8_f32): Likewise.
36386 (__arm_vreinterpretq_u16_f16): Likewise.
36387 (__arm_vreinterpretq_u16_f32): Likewise.
36388 (__arm_vreinterpretq_u32_f16): Likewise.
36389 (__arm_vreinterpretq_u32_f32): Likewise.
36390 (__arm_vreinterpretq_u64_f16): Likewise.
36391 (__arm_vreinterpretq_u64_f32): Likewise.
36392 (__arm_vreinterpretq_u8_f16): Likewise.
36393 (__arm_vreinterpretq_u8_f32): Likewise.
36394 (__arm_vreinterpretq_f16_f32): Likewise.
36395 (__arm_vreinterpretq_f16_s16): Likewise.
36396 (__arm_vreinterpretq_f16_s32): Likewise.
36397 (__arm_vreinterpretq_f16_s64): Likewise.
36398 (__arm_vreinterpretq_f16_s8): Likewise.
36399 (__arm_vreinterpretq_f16_u16): Likewise.
36400 (__arm_vreinterpretq_f16_u32): Likewise.
36401 (__arm_vreinterpretq_f16_u64): Likewise.
36402 (__arm_vreinterpretq_f16_u8): Likewise.
36403 (__arm_vreinterpretq_f32_f16): Likewise.
36404 (__arm_vreinterpretq_f32_s16): Likewise.
36405 (__arm_vreinterpretq_f32_s32): Likewise.
36406 (__arm_vreinterpretq_f32_s64): Likewise.
36407 (__arm_vreinterpretq_f32_s8): Likewise.
36408 (__arm_vreinterpretq_f32_u16): Likewise.
36409 (__arm_vreinterpretq_f32_u32): Likewise.
36410 (__arm_vreinterpretq_f32_u64): Likewise.
36411 (__arm_vreinterpretq_f32_u8): Likewise.
36412 (__arm_vreinterpretq_s16): Likewise.
36413 (__arm_vreinterpretq_s32): Likewise.
36414 (__arm_vreinterpretq_s64): Likewise.
36415 (__arm_vreinterpretq_s8): Likewise.
36416 (__arm_vreinterpretq_u16): Likewise.
36417 (__arm_vreinterpretq_u32): Likewise.
36418 (__arm_vreinterpretq_u64): Likewise.
36419 (__arm_vreinterpretq_u8): Likewise.
36420 (__arm_vreinterpretq_f16): Likewise.
36421 (__arm_vreinterpretq_f32): Likewise.
36422 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
36423 * config/arm/unspecs.md: (REINTERPRET): New unspec.
36425 2023-05-03 Murray Steele <murray.steele@arm.com>
36426 Christophe Lyon <christophe.lyon@arm.com>
36427 Christophe Lyon <christophe.lyon@arm.com
36429 * config.gcc: Add arm-mve-builtins-base.o and
36430 arm-mve-builtins-shapes.o to extra_objs.
36431 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
36433 (arm_expand_builtin): Likewise
36434 (arm_check_builtin_call): Likewise
36435 (arm_describe_resolver): Likewise.
36436 * config/arm/arm-builtins.h (enum resolver_ident): Add
36438 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
36439 (arm_resolve_overloaded_builtin): Handle MVE builtins.
36440 (arm_register_target_pragmas): Register arm_check_builtin_call.
36441 * config/arm/arm-mve-builtins.cc (class registered_function): New
36443 (struct registered_function_hasher): New struct.
36444 (pred_suffixes): New table.
36445 (mode_suffixes): New table.
36446 (type_suffix_info): New table.
36447 (TYPES_float16): New.
36448 (TYPES_all_float): New.
36449 (TYPES_integer_8): New.
36450 (TYPES_integer_8_16): New.
36451 (TYPES_integer_16_32): New.
36452 (TYPES_integer_32): New.
36453 (TYPES_signed_16_32): New.
36454 (TYPES_signed_32): New.
36455 (TYPES_all_signed): New.
36456 (TYPES_all_unsigned): New.
36457 (TYPES_all_integer): New.
36458 (TYPES_all_integer_with_64): New.
36459 (DEF_VECTOR_TYPE): New.
36460 (DEF_DOUBLE_TYPE): New.
36461 (DEF_MVE_TYPES_ARRAY): New.
36462 (all_integer): New.
36463 (all_integer_with_64): New.
36467 (all_unsigned): New.
36469 (integer_8_16): New.
36470 (integer_16_32): New.
36472 (signed_16_32): New.
36474 (register_vector_type): Use void_type_node for mve.fp-only types when
36475 mve.fp is not enabled.
36476 (register_builtin_tuple_types): Likewise.
36477 (handle_arm_mve_h): New function..
36478 (matches_type_p): Likewise..
36479 (report_out_of_range): Likewise.
36480 (report_not_enum): Likewise.
36481 (report_missing_float): Likewise.
36482 (report_non_ice): Likewise.
36483 (check_requires_float): Likewise.
36484 (function_instance::hash): Likewise
36485 (function_instance::call_properties): Likewise.
36486 (function_instance::reads_global_state_p): Likewise.
36487 (function_instance::modifies_global_state_p): Likewise.
36488 (function_instance::could_trap_p): Likewise.
36489 (function_instance::has_inactive_argument): Likewise.
36490 (registered_function_hasher::hash): Likewise.
36491 (registered_function_hasher::equal): Likewise.
36492 (function_builder::function_builder): Likewise.
36493 (function_builder::~function_builder): Likewise.
36494 (function_builder::append_name): Likewise.
36495 (function_builder::finish_name): Likewise.
36496 (function_builder::get_name): Likewise.
36497 (add_attribute): Likewise.
36498 (function_builder::get_attributes): Likewise.
36499 (function_builder::add_function): Likewise.
36500 (function_builder::add_unique_function): Likewise.
36501 (function_builder::add_overloaded_function): Likewise.
36502 (function_builder::add_overloaded_functions): Likewise.
36503 (function_builder::register_function_group): Likewise.
36504 (function_call_info::function_call_info): Likewise.
36505 (function_resolver::function_resolver): Likewise.
36506 (function_resolver::get_vector_type): Likewise.
36507 (function_resolver::get_scalar_type_name): Likewise.
36508 (function_resolver::get_argument_type): Likewise.
36509 (function_resolver::scalar_argument_p): Likewise.
36510 (function_resolver::report_no_such_form): Likewise.
36511 (function_resolver::lookup_form): Likewise.
36512 (function_resolver::resolve_to): Likewise.
36513 (function_resolver::infer_vector_or_tuple_type): Likewise.
36514 (function_resolver::infer_vector_type): Likewise.
36515 (function_resolver::require_vector_or_scalar_type): Likewise.
36516 (function_resolver::require_vector_type): Likewise.
36517 (function_resolver::require_matching_vector_type): Likewise.
36518 (function_resolver::require_derived_vector_type): Likewise.
36519 (function_resolver::require_derived_scalar_type): Likewise.
36520 (function_resolver::require_integer_immediate): Likewise.
36521 (function_resolver::require_scalar_type): Likewise.
36522 (function_resolver::check_num_arguments): Likewise.
36523 (function_resolver::check_gp_argument): Likewise.
36524 (function_resolver::finish_opt_n_resolution): Likewise.
36525 (function_resolver::resolve_unary): Likewise.
36526 (function_resolver::resolve_unary_n): Likewise.
36527 (function_resolver::resolve_uniform): Likewise.
36528 (function_resolver::resolve_uniform_opt_n): Likewise.
36529 (function_resolver::resolve): Likewise.
36530 (function_checker::function_checker): Likewise.
36531 (function_checker::argument_exists_p): Likewise.
36532 (function_checker::require_immediate): Likewise.
36533 (function_checker::require_immediate_enum): Likewise.
36534 (function_checker::require_immediate_range): Likewise.
36535 (function_checker::check): Likewise.
36536 (gimple_folder::gimple_folder): Likewise.
36537 (gimple_folder::fold): Likewise.
36538 (function_expander::function_expander): Likewise.
36539 (function_expander::direct_optab_handler): Likewise.
36540 (function_expander::get_fallback_value): Likewise.
36541 (function_expander::get_reg_target): Likewise.
36542 (function_expander::add_output_operand): Likewise.
36543 (function_expander::add_input_operand): Likewise.
36544 (function_expander::add_integer_operand): Likewise.
36545 (function_expander::generate_insn): Likewise.
36546 (function_expander::use_exact_insn): Likewise.
36547 (function_expander::use_unpred_insn): Likewise.
36548 (function_expander::use_pred_x_insn): Likewise.
36549 (function_expander::use_cond_insn): Likewise.
36550 (function_expander::map_to_rtx_codes): Likewise.
36551 (function_expander::expand): Likewise.
36552 (resolve_overloaded_builtin): Likewise.
36553 (check_builtin_call): Likewise.
36554 (gimple_fold_builtin): Likewise.
36555 (expand_builtin): Likewise.
36556 (gt_ggc_mx): Likewise.
36557 (gt_pch_nx): Likewise.
36558 (gt_pch_nx): Likewise.
36559 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
36570 (offset): New mode.
36571 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
36572 (CP_READ_FPCR): Likewise.
36573 (CP_RAISE_FP_EXCEPTIONS): Likewise.
36574 (CP_READ_MEMORY): Likewise.
36575 (CP_WRITE_MEMORY): Likewise.
36576 (enum units_index): New enum.
36577 (enum predication_index): New.
36578 (enum type_class_index): New.
36579 (enum mode_suffix_index): New enum.
36580 (enum type_suffix_index): New.
36581 (struct mode_suffix_info): New struct.
36582 (struct type_suffix_info): New.
36583 (struct function_group_info): Likewise.
36584 (class function_instance): Likewise.
36585 (class registered_function): Likewise.
36586 (class function_builder): Likewise.
36587 (class function_call_info): Likewise.
36588 (class function_resolver): Likewise.
36589 (class function_checker): Likewise.
36590 (class gimple_folder): Likewise.
36591 (class function_expander): Likewise.
36592 (get_mve_pred16_t): Likewise.
36593 (find_mode_suffix): New function.
36594 (class function_base): Likewise.
36595 (class function_shape): Likewise.
36596 (function_instance::operator==): New function.
36597 (function_instance::operator!=): Likewise.
36598 (function_instance::vectors_per_tuple): Likewise.
36599 (function_instance::mode_suffix): Likewise.
36600 (function_instance::type_suffix): Likewise.
36601 (function_instance::scalar_type): Likewise.
36602 (function_instance::vector_type): Likewise.
36603 (function_instance::tuple_type): Likewise.
36604 (function_instance::vector_mode): Likewise.
36605 (function_call_info::function_returns_void_p): Likewise.
36606 (function_base::call_properties): Likewise.
36607 * config/arm/arm-protos.h (enum arm_builtin_class): Add
36609 (handle_arm_mve_h): New.
36610 (resolve_overloaded_builtin): New.
36611 (check_builtin_call): New.
36612 (gimple_fold_builtin): New.
36613 (expand_builtin): New.
36614 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
36615 arm_gimple_fold_builtin.
36616 (arm_gimple_fold_builtin): New function.
36617 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
36618 * config/arm/predicates.md (arm_any_register_operand): New predicate.
36619 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
36620 (arm-mve-builtins-shapes.o): New target.
36621 (arm-mve-builtins-base.o): New target.
36622 * config/arm/arm-mve-builtins-base.cc: New file.
36623 * config/arm/arm-mve-builtins-base.def: New file.
36624 * config/arm/arm-mve-builtins-base.h: New file.
36625 * config/arm/arm-mve-builtins-functions.h: New file.
36626 * config/arm/arm-mve-builtins-shapes.cc: New file.
36627 * config/arm/arm-mve-builtins-shapes.h: New file.
36629 2023-05-03 Murray Steele <murray.steele@arm.com>
36630 Christophe Lyon <christophe.lyon@arm.com>
36631 Christophe Lyon <christophe.lyon@arm.com>
36633 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
36635 (arm_init_builtin): Use arm_general_add_builtin_function instead
36636 of arm_add_builtin_function.
36637 (arm_init_acle_builtins): Likewise.
36638 (arm_init_mve_builtins): Likewise.
36639 (arm_init_crypto_builtins): Likewise.
36640 (arm_init_builtins): Likewise.
36641 (arm_general_builtin_decl): New function.
36642 (arm_builtin_decl): Defer to numberspace-specialized functions.
36643 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
36644 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
36645 (arm_general_expand_builtin_1): ... specialize for general builtins.
36646 (arm_expand_acle_builtin): Use arm_general_expand_builtin
36647 instead of arm_expand_builtin.
36648 (arm_expand_mve_builtin): Likewise.
36649 (arm_expand_neon_builtin): Likewise.
36650 (arm_expand_vfp_builtin): Likewise.
36651 (arm_general_expand_builtin): New function.
36652 (arm_expand_builtin): Specialize for general builtins.
36653 (arm_general_check_builtin_call): New function.
36654 (arm_check_builtin_call): Specialize for general builtins.
36655 (arm_describe_resolver): Validate numberspace.
36656 (arm_cde_end_args): Likewise.
36657 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
36658 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
36660 2023-05-03 Martin Liska <mliska@suse.cz>
36663 * config/riscv/sync.md: Add gcc_unreachable to a switch.
36665 2023-05-03 Richard Biener <rguenther@suse.de>
36667 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
36668 (patch_loop_exit): Likewise.
36669 (connect_loops): Likewise.
36670 (split_loop): Likewise.
36671 (control_dep_semi_invariant_p): Likewise.
36672 (do_split_loop_on_cond): Likewise.
36673 (split_loop_on_cond): Likewise.
36674 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
36676 (simplify_loop_version): Likewise.
36677 (evaluate_bbs): Likewise.
36678 (find_loop_guard): Likewise.
36679 (clean_up_after_unswitching): Likewise.
36680 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
36682 (optimize_spaceship): Take a gcond * argument, avoid
36684 (math_opts_dom_walker::after_dom_children): Adjust call to
36685 optimize_spaceship.
36686 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
36687 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
36690 2023-05-03 Andreas Schwab <schwab@suse.de>
36692 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
36694 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36696 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
36698 (class vlseg): New class.
36699 (class vsseg): Ditto.
36700 (class vlsseg): Ditto.
36701 (class vssseg): Ditto.
36702 (class seg_indexed_load): Ditto.
36703 (class seg_indexed_store): Ditto.
36704 (class vlsegff): Ditto.
36706 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36707 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
36717 * config/riscv/riscv-vector-builtins-shapes.cc (struct
36718 seg_loadstore_def): Ditto.
36719 (struct seg_indexed_loadstore_def): Ditto.
36720 (struct seg_fault_load_def): Ditto.
36722 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36723 * config/riscv/riscv-vector-builtins.cc
36724 (function_builder::append_nf): New function.
36725 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
36726 Change ptr from double into float.
36727 (vfloat32m1x3_t): Ditto.
36728 (vfloat32m1x4_t): Ditto.
36729 (vfloat32m1x5_t): Ditto.
36730 (vfloat32m1x6_t): Ditto.
36731 (vfloat32m1x7_t): Ditto.
36732 (vfloat32m1x8_t): Ditto.
36733 (vfloat32m2x2_t): Ditto.
36734 (vfloat32m2x3_t): Ditto.
36735 (vfloat32m2x4_t): Ditto.
36736 (vfloat32m4x2_t): Ditto.
36737 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
36738 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
36740 * config/riscv/riscv.md: Add segment instructions.
36741 * config/riscv/vector-iterators.md: Support segment intrinsics.
36742 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
36744 (@pred_unit_strided_store<mode>): Ditto.
36745 (@pred_strided_load<mode>): Ditto.
36746 (@pred_strided_store<mode>): Ditto.
36747 (@pred_fault_load<mode>): Ditto.
36748 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
36749 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
36750 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
36751 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
36752 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
36753 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
36754 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
36755 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
36756 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
36757 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
36758 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
36759 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
36760 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
36761 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
36763 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36765 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
36766 tuple type support.
36768 (floattype): Ditto.
36770 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
36771 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
36773 (vget): Add tuple type vget.
36774 * config/riscv/riscv-vector-builtins-types.def
36775 (DEF_RVV_TUPLE_OPS): New macro.
36776 (vint8mf8x2_t): Ditto.
36777 (vuint8mf8x2_t): Ditto.
36778 (vint8mf8x3_t): Ditto.
36779 (vuint8mf8x3_t): Ditto.
36780 (vint8mf8x4_t): Ditto.
36781 (vuint8mf8x4_t): Ditto.
36782 (vint8mf8x5_t): Ditto.
36783 (vuint8mf8x5_t): Ditto.
36784 (vint8mf8x6_t): Ditto.
36785 (vuint8mf8x6_t): Ditto.
36786 (vint8mf8x7_t): Ditto.
36787 (vuint8mf8x7_t): Ditto.
36788 (vint8mf8x8_t): Ditto.
36789 (vuint8mf8x8_t): Ditto.
36790 (vint8mf4x2_t): Ditto.
36791 (vuint8mf4x2_t): Ditto.
36792 (vint8mf4x3_t): Ditto.
36793 (vuint8mf4x3_t): Ditto.
36794 (vint8mf4x4_t): Ditto.
36795 (vuint8mf4x4_t): Ditto.
36796 (vint8mf4x5_t): Ditto.
36797 (vuint8mf4x5_t): Ditto.
36798 (vint8mf4x6_t): Ditto.
36799 (vuint8mf4x6_t): Ditto.
36800 (vint8mf4x7_t): Ditto.
36801 (vuint8mf4x7_t): Ditto.
36802 (vint8mf4x8_t): Ditto.
36803 (vuint8mf4x8_t): Ditto.
36804 (vint8mf2x2_t): Ditto.
36805 (vuint8mf2x2_t): Ditto.
36806 (vint8mf2x3_t): Ditto.
36807 (vuint8mf2x3_t): Ditto.
36808 (vint8mf2x4_t): Ditto.
36809 (vuint8mf2x4_t): Ditto.
36810 (vint8mf2x5_t): Ditto.
36811 (vuint8mf2x5_t): Ditto.
36812 (vint8mf2x6_t): Ditto.
36813 (vuint8mf2x6_t): Ditto.
36814 (vint8mf2x7_t): Ditto.
36815 (vuint8mf2x7_t): Ditto.
36816 (vint8mf2x8_t): Ditto.
36817 (vuint8mf2x8_t): Ditto.
36818 (vint8m1x2_t): Ditto.
36819 (vuint8m1x2_t): Ditto.
36820 (vint8m1x3_t): Ditto.
36821 (vuint8m1x3_t): Ditto.
36822 (vint8m1x4_t): Ditto.
36823 (vuint8m1x4_t): Ditto.
36824 (vint8m1x5_t): Ditto.
36825 (vuint8m1x5_t): Ditto.
36826 (vint8m1x6_t): Ditto.
36827 (vuint8m1x6_t): Ditto.
36828 (vint8m1x7_t): Ditto.
36829 (vuint8m1x7_t): Ditto.
36830 (vint8m1x8_t): Ditto.
36831 (vuint8m1x8_t): Ditto.
36832 (vint8m2x2_t): Ditto.
36833 (vuint8m2x2_t): Ditto.
36834 (vint8m2x3_t): Ditto.
36835 (vuint8m2x3_t): Ditto.
36836 (vint8m2x4_t): Ditto.
36837 (vuint8m2x4_t): Ditto.
36838 (vint8m4x2_t): Ditto.
36839 (vuint8m4x2_t): Ditto.
36840 (vint16mf4x2_t): Ditto.
36841 (vuint16mf4x2_t): Ditto.
36842 (vint16mf4x3_t): Ditto.
36843 (vuint16mf4x3_t): Ditto.
36844 (vint16mf4x4_t): Ditto.
36845 (vuint16mf4x4_t): Ditto.
36846 (vint16mf4x5_t): Ditto.
36847 (vuint16mf4x5_t): Ditto.
36848 (vint16mf4x6_t): Ditto.
36849 (vuint16mf4x6_t): Ditto.
36850 (vint16mf4x7_t): Ditto.
36851 (vuint16mf4x7_t): Ditto.
36852 (vint16mf4x8_t): Ditto.
36853 (vuint16mf4x8_t): Ditto.
36854 (vint16mf2x2_t): Ditto.
36855 (vuint16mf2x2_t): Ditto.
36856 (vint16mf2x3_t): Ditto.
36857 (vuint16mf2x3_t): Ditto.
36858 (vint16mf2x4_t): Ditto.
36859 (vuint16mf2x4_t): Ditto.
36860 (vint16mf2x5_t): Ditto.
36861 (vuint16mf2x5_t): Ditto.
36862 (vint16mf2x6_t): Ditto.
36863 (vuint16mf2x6_t): Ditto.
36864 (vint16mf2x7_t): Ditto.
36865 (vuint16mf2x7_t): Ditto.
36866 (vint16mf2x8_t): Ditto.
36867 (vuint16mf2x8_t): Ditto.
36868 (vint16m1x2_t): Ditto.
36869 (vuint16m1x2_t): Ditto.
36870 (vint16m1x3_t): Ditto.
36871 (vuint16m1x3_t): Ditto.
36872 (vint16m1x4_t): Ditto.
36873 (vuint16m1x4_t): Ditto.
36874 (vint16m1x5_t): Ditto.
36875 (vuint16m1x5_t): Ditto.
36876 (vint16m1x6_t): Ditto.
36877 (vuint16m1x6_t): Ditto.
36878 (vint16m1x7_t): Ditto.
36879 (vuint16m1x7_t): Ditto.
36880 (vint16m1x8_t): Ditto.
36881 (vuint16m1x8_t): Ditto.
36882 (vint16m2x2_t): Ditto.
36883 (vuint16m2x2_t): Ditto.
36884 (vint16m2x3_t): Ditto.
36885 (vuint16m2x3_t): Ditto.
36886 (vint16m2x4_t): Ditto.
36887 (vuint16m2x4_t): Ditto.
36888 (vint16m4x2_t): Ditto.
36889 (vuint16m4x2_t): Ditto.
36890 (vint32mf2x2_t): Ditto.
36891 (vuint32mf2x2_t): Ditto.
36892 (vint32mf2x3_t): Ditto.
36893 (vuint32mf2x3_t): Ditto.
36894 (vint32mf2x4_t): Ditto.
36895 (vuint32mf2x4_t): Ditto.
36896 (vint32mf2x5_t): Ditto.
36897 (vuint32mf2x5_t): Ditto.
36898 (vint32mf2x6_t): Ditto.
36899 (vuint32mf2x6_t): Ditto.
36900 (vint32mf2x7_t): Ditto.
36901 (vuint32mf2x7_t): Ditto.
36902 (vint32mf2x8_t): Ditto.
36903 (vuint32mf2x8_t): Ditto.
36904 (vint32m1x2_t): Ditto.
36905 (vuint32m1x2_t): Ditto.
36906 (vint32m1x3_t): Ditto.
36907 (vuint32m1x3_t): Ditto.
36908 (vint32m1x4_t): Ditto.
36909 (vuint32m1x4_t): Ditto.
36910 (vint32m1x5_t): Ditto.
36911 (vuint32m1x5_t): Ditto.
36912 (vint32m1x6_t): Ditto.
36913 (vuint32m1x6_t): Ditto.
36914 (vint32m1x7_t): Ditto.
36915 (vuint32m1x7_t): Ditto.
36916 (vint32m1x8_t): Ditto.
36917 (vuint32m1x8_t): Ditto.
36918 (vint32m2x2_t): Ditto.
36919 (vuint32m2x2_t): Ditto.
36920 (vint32m2x3_t): Ditto.
36921 (vuint32m2x3_t): Ditto.
36922 (vint32m2x4_t): Ditto.
36923 (vuint32m2x4_t): Ditto.
36924 (vint32m4x2_t): Ditto.
36925 (vuint32m4x2_t): Ditto.
36926 (vint64m1x2_t): Ditto.
36927 (vuint64m1x2_t): Ditto.
36928 (vint64m1x3_t): Ditto.
36929 (vuint64m1x3_t): Ditto.
36930 (vint64m1x4_t): Ditto.
36931 (vuint64m1x4_t): Ditto.
36932 (vint64m1x5_t): Ditto.
36933 (vuint64m1x5_t): Ditto.
36934 (vint64m1x6_t): Ditto.
36935 (vuint64m1x6_t): Ditto.
36936 (vint64m1x7_t): Ditto.
36937 (vuint64m1x7_t): Ditto.
36938 (vint64m1x8_t): Ditto.
36939 (vuint64m1x8_t): Ditto.
36940 (vint64m2x2_t): Ditto.
36941 (vuint64m2x2_t): Ditto.
36942 (vint64m2x3_t): Ditto.
36943 (vuint64m2x3_t): Ditto.
36944 (vint64m2x4_t): Ditto.
36945 (vuint64m2x4_t): Ditto.
36946 (vint64m4x2_t): Ditto.
36947 (vuint64m4x2_t): Ditto.
36948 (vfloat32mf2x2_t): Ditto.
36949 (vfloat32mf2x3_t): Ditto.
36950 (vfloat32mf2x4_t): Ditto.
36951 (vfloat32mf2x5_t): Ditto.
36952 (vfloat32mf2x6_t): Ditto.
36953 (vfloat32mf2x7_t): Ditto.
36954 (vfloat32mf2x8_t): Ditto.
36955 (vfloat32m1x2_t): Ditto.
36956 (vfloat32m1x3_t): Ditto.
36957 (vfloat32m1x4_t): Ditto.
36958 (vfloat32m1x5_t): Ditto.
36959 (vfloat32m1x6_t): Ditto.
36960 (vfloat32m1x7_t): Ditto.
36961 (vfloat32m1x8_t): Ditto.
36962 (vfloat32m2x2_t): Ditto.
36963 (vfloat32m2x3_t): Ditto.
36964 (vfloat32m2x4_t): Ditto.
36965 (vfloat32m4x2_t): Ditto.
36966 (vfloat64m1x2_t): Ditto.
36967 (vfloat64m1x3_t): Ditto.
36968 (vfloat64m1x4_t): Ditto.
36969 (vfloat64m1x5_t): Ditto.
36970 (vfloat64m1x6_t): Ditto.
36971 (vfloat64m1x7_t): Ditto.
36972 (vfloat64m1x8_t): Ditto.
36973 (vfloat64m2x2_t): Ditto.
36974 (vfloat64m2x3_t): Ditto.
36975 (vfloat64m2x4_t): Ditto.
36976 (vfloat64m4x2_t): Ditto.
36977 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
36979 (DEF_RVV_TYPE_INDEX): Ditto.
36980 (rvv_arg_type_info::get_tuple_subpart_type): New function.
36981 (DEF_RVV_TUPLE_TYPE): New macro.
36982 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
36983 Adapt for tuple vget/vset support.
36984 (vint8mf4_t): Ditto.
36985 (vuint8mf4_t): Ditto.
36986 (vint8mf2_t): Ditto.
36987 (vuint8mf2_t): Ditto.
36988 (vint8m1_t): Ditto.
36989 (vuint8m1_t): Ditto.
36990 (vint8m2_t): Ditto.
36991 (vuint8m2_t): Ditto.
36992 (vint8m4_t): Ditto.
36993 (vuint8m4_t): Ditto.
36994 (vint8m8_t): Ditto.
36995 (vuint8m8_t): Ditto.
36996 (vint16mf4_t): Ditto.
36997 (vuint16mf4_t): Ditto.
36998 (vint16mf2_t): Ditto.
36999 (vuint16mf2_t): Ditto.
37000 (vint16m1_t): Ditto.
37001 (vuint16m1_t): Ditto.
37002 (vint16m2_t): Ditto.
37003 (vuint16m2_t): Ditto.
37004 (vint16m4_t): Ditto.
37005 (vuint16m4_t): Ditto.
37006 (vint16m8_t): Ditto.
37007 (vuint16m8_t): Ditto.
37008 (vint32mf2_t): Ditto.
37009 (vuint32mf2_t): Ditto.
37010 (vint32m1_t): Ditto.
37011 (vuint32m1_t): Ditto.
37012 (vint32m2_t): Ditto.
37013 (vuint32m2_t): Ditto.
37014 (vint32m4_t): Ditto.
37015 (vuint32m4_t): Ditto.
37016 (vint32m8_t): Ditto.
37017 (vuint32m8_t): Ditto.
37018 (vint64m1_t): Ditto.
37019 (vuint64m1_t): Ditto.
37020 (vint64m2_t): Ditto.
37021 (vuint64m2_t): Ditto.
37022 (vint64m4_t): Ditto.
37023 (vuint64m4_t): Ditto.
37024 (vint64m8_t): Ditto.
37025 (vuint64m8_t): Ditto.
37026 (vfloat32mf2_t): Ditto.
37027 (vfloat32m1_t): Ditto.
37028 (vfloat32m2_t): Ditto.
37029 (vfloat32m4_t): Ditto.
37030 (vfloat32m8_t): Ditto.
37031 (vfloat64m1_t): Ditto.
37032 (vfloat64m2_t): Ditto.
37033 (vfloat64m4_t): Ditto.
37034 (vfloat64m8_t): Ditto.
37035 (tuple_subpart): Add tuple subpart base type.
37036 * config/riscv/riscv-vector-builtins.h (struct
37037 rvv_arg_type_info): Ditto.
37038 (tuple_type_field): New function.
37040 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37042 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
37043 (RVV_TUPLE_PARTIAL_MODES): Ditto.
37044 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
37047 (get_subpart_mode): Ditto.
37048 (get_tuple_mode): Ditto.
37049 (expand_tuple_move): Ditto.
37050 * config/riscv/riscv-v.cc (ENTRY): New macro.
37051 (TUPLE_ENTRY): Ditto.
37052 (get_nf): New function.
37053 (get_subpart_mode): Ditto.
37054 (get_tuple_mode): Ditto.
37055 (expand_tuple_move): Ditto.
37056 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
37058 (register_tuple_type): New function
37059 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
37061 (vint8mf8x2_t): New macro.
37062 (vuint8mf8x2_t): Ditto.
37063 (vint8mf8x3_t): Ditto.
37064 (vuint8mf8x3_t): Ditto.
37065 (vint8mf8x4_t): Ditto.
37066 (vuint8mf8x4_t): Ditto.
37067 (vint8mf8x5_t): Ditto.
37068 (vuint8mf8x5_t): Ditto.
37069 (vint8mf8x6_t): Ditto.
37070 (vuint8mf8x6_t): Ditto.
37071 (vint8mf8x7_t): Ditto.
37072 (vuint8mf8x7_t): Ditto.
37073 (vint8mf8x8_t): Ditto.
37074 (vuint8mf8x8_t): Ditto.
37075 (vint8mf4x2_t): Ditto.
37076 (vuint8mf4x2_t): Ditto.
37077 (vint8mf4x3_t): Ditto.
37078 (vuint8mf4x3_t): Ditto.
37079 (vint8mf4x4_t): Ditto.
37080 (vuint8mf4x4_t): Ditto.
37081 (vint8mf4x5_t): Ditto.
37082 (vuint8mf4x5_t): Ditto.
37083 (vint8mf4x6_t): Ditto.
37084 (vuint8mf4x6_t): Ditto.
37085 (vint8mf4x7_t): Ditto.
37086 (vuint8mf4x7_t): Ditto.
37087 (vint8mf4x8_t): Ditto.
37088 (vuint8mf4x8_t): Ditto.
37089 (vint8mf2x2_t): Ditto.
37090 (vuint8mf2x2_t): Ditto.
37091 (vint8mf2x3_t): Ditto.
37092 (vuint8mf2x3_t): Ditto.
37093 (vint8mf2x4_t): Ditto.
37094 (vuint8mf2x4_t): Ditto.
37095 (vint8mf2x5_t): Ditto.
37096 (vuint8mf2x5_t): Ditto.
37097 (vint8mf2x6_t): Ditto.
37098 (vuint8mf2x6_t): Ditto.
37099 (vint8mf2x7_t): Ditto.
37100 (vuint8mf2x7_t): Ditto.
37101 (vint8mf2x8_t): Ditto.
37102 (vuint8mf2x8_t): Ditto.
37103 (vint8m1x2_t): Ditto.
37104 (vuint8m1x2_t): Ditto.
37105 (vint8m1x3_t): Ditto.
37106 (vuint8m1x3_t): Ditto.
37107 (vint8m1x4_t): Ditto.
37108 (vuint8m1x4_t): Ditto.
37109 (vint8m1x5_t): Ditto.
37110 (vuint8m1x5_t): Ditto.
37111 (vint8m1x6_t): Ditto.
37112 (vuint8m1x6_t): Ditto.
37113 (vint8m1x7_t): Ditto.
37114 (vuint8m1x7_t): Ditto.
37115 (vint8m1x8_t): Ditto.
37116 (vuint8m1x8_t): Ditto.
37117 (vint8m2x2_t): Ditto.
37118 (vuint8m2x2_t): Ditto.
37119 (vint8m2x3_t): Ditto.
37120 (vuint8m2x3_t): Ditto.
37121 (vint8m2x4_t): Ditto.
37122 (vuint8m2x4_t): Ditto.
37123 (vint8m4x2_t): Ditto.
37124 (vuint8m4x2_t): Ditto.
37125 (vint16mf4x2_t): Ditto.
37126 (vuint16mf4x2_t): Ditto.
37127 (vint16mf4x3_t): Ditto.
37128 (vuint16mf4x3_t): Ditto.
37129 (vint16mf4x4_t): Ditto.
37130 (vuint16mf4x4_t): Ditto.
37131 (vint16mf4x5_t): Ditto.
37132 (vuint16mf4x5_t): Ditto.
37133 (vint16mf4x6_t): Ditto.
37134 (vuint16mf4x6_t): Ditto.
37135 (vint16mf4x7_t): Ditto.
37136 (vuint16mf4x7_t): Ditto.
37137 (vint16mf4x8_t): Ditto.
37138 (vuint16mf4x8_t): Ditto.
37139 (vint16mf2x2_t): Ditto.
37140 (vuint16mf2x2_t): Ditto.
37141 (vint16mf2x3_t): Ditto.
37142 (vuint16mf2x3_t): Ditto.
37143 (vint16mf2x4_t): Ditto.
37144 (vuint16mf2x4_t): Ditto.
37145 (vint16mf2x5_t): Ditto.
37146 (vuint16mf2x5_t): Ditto.
37147 (vint16mf2x6_t): Ditto.
37148 (vuint16mf2x6_t): Ditto.
37149 (vint16mf2x7_t): Ditto.
37150 (vuint16mf2x7_t): Ditto.
37151 (vint16mf2x8_t): Ditto.
37152 (vuint16mf2x8_t): Ditto.
37153 (vint16m1x2_t): Ditto.
37154 (vuint16m1x2_t): Ditto.
37155 (vint16m1x3_t): Ditto.
37156 (vuint16m1x3_t): Ditto.
37157 (vint16m1x4_t): Ditto.
37158 (vuint16m1x4_t): Ditto.
37159 (vint16m1x5_t): Ditto.
37160 (vuint16m1x5_t): Ditto.
37161 (vint16m1x6_t): Ditto.
37162 (vuint16m1x6_t): Ditto.
37163 (vint16m1x7_t): Ditto.
37164 (vuint16m1x7_t): Ditto.
37165 (vint16m1x8_t): Ditto.
37166 (vuint16m1x8_t): Ditto.
37167 (vint16m2x2_t): Ditto.
37168 (vuint16m2x2_t): Ditto.
37169 (vint16m2x3_t): Ditto.
37170 (vuint16m2x3_t): Ditto.
37171 (vint16m2x4_t): Ditto.
37172 (vuint16m2x4_t): Ditto.
37173 (vint16m4x2_t): Ditto.
37174 (vuint16m4x2_t): Ditto.
37175 (vint32mf2x2_t): Ditto.
37176 (vuint32mf2x2_t): Ditto.
37177 (vint32mf2x3_t): Ditto.
37178 (vuint32mf2x3_t): Ditto.
37179 (vint32mf2x4_t): Ditto.
37180 (vuint32mf2x4_t): Ditto.
37181 (vint32mf2x5_t): Ditto.
37182 (vuint32mf2x5_t): Ditto.
37183 (vint32mf2x6_t): Ditto.
37184 (vuint32mf2x6_t): Ditto.
37185 (vint32mf2x7_t): Ditto.
37186 (vuint32mf2x7_t): Ditto.
37187 (vint32mf2x8_t): Ditto.
37188 (vuint32mf2x8_t): Ditto.
37189 (vint32m1x2_t): Ditto.
37190 (vuint32m1x2_t): Ditto.
37191 (vint32m1x3_t): Ditto.
37192 (vuint32m1x3_t): Ditto.
37193 (vint32m1x4_t): Ditto.
37194 (vuint32m1x4_t): Ditto.
37195 (vint32m1x5_t): Ditto.
37196 (vuint32m1x5_t): Ditto.
37197 (vint32m1x6_t): Ditto.
37198 (vuint32m1x6_t): Ditto.
37199 (vint32m1x7_t): Ditto.
37200 (vuint32m1x7_t): Ditto.
37201 (vint32m1x8_t): Ditto.
37202 (vuint32m1x8_t): Ditto.
37203 (vint32m2x2_t): Ditto.
37204 (vuint32m2x2_t): Ditto.
37205 (vint32m2x3_t): Ditto.
37206 (vuint32m2x3_t): Ditto.
37207 (vint32m2x4_t): Ditto.
37208 (vuint32m2x4_t): Ditto.
37209 (vint32m4x2_t): Ditto.
37210 (vuint32m4x2_t): Ditto.
37211 (vint64m1x2_t): Ditto.
37212 (vuint64m1x2_t): Ditto.
37213 (vint64m1x3_t): Ditto.
37214 (vuint64m1x3_t): Ditto.
37215 (vint64m1x4_t): Ditto.
37216 (vuint64m1x4_t): Ditto.
37217 (vint64m1x5_t): Ditto.
37218 (vuint64m1x5_t): Ditto.
37219 (vint64m1x6_t): Ditto.
37220 (vuint64m1x6_t): Ditto.
37221 (vint64m1x7_t): Ditto.
37222 (vuint64m1x7_t): Ditto.
37223 (vint64m1x8_t): Ditto.
37224 (vuint64m1x8_t): Ditto.
37225 (vint64m2x2_t): Ditto.
37226 (vuint64m2x2_t): Ditto.
37227 (vint64m2x3_t): Ditto.
37228 (vuint64m2x3_t): Ditto.
37229 (vint64m2x4_t): Ditto.
37230 (vuint64m2x4_t): Ditto.
37231 (vint64m4x2_t): Ditto.
37232 (vuint64m4x2_t): Ditto.
37233 (vfloat32mf2x2_t): Ditto.
37234 (vfloat32mf2x3_t): Ditto.
37235 (vfloat32mf2x4_t): Ditto.
37236 (vfloat32mf2x5_t): Ditto.
37237 (vfloat32mf2x6_t): Ditto.
37238 (vfloat32mf2x7_t): Ditto.
37239 (vfloat32mf2x8_t): Ditto.
37240 (vfloat32m1x2_t): Ditto.
37241 (vfloat32m1x3_t): Ditto.
37242 (vfloat32m1x4_t): Ditto.
37243 (vfloat32m1x5_t): Ditto.
37244 (vfloat32m1x6_t): Ditto.
37245 (vfloat32m1x7_t): Ditto.
37246 (vfloat32m1x8_t): Ditto.
37247 (vfloat32m2x2_t): Ditto.
37248 (vfloat32m2x3_t): Ditto.
37249 (vfloat32m2x4_t): Ditto.
37250 (vfloat32m4x2_t): Ditto.
37251 (vfloat64m1x2_t): Ditto.
37252 (vfloat64m1x3_t): Ditto.
37253 (vfloat64m1x4_t): Ditto.
37254 (vfloat64m1x5_t): Ditto.
37255 (vfloat64m1x6_t): Ditto.
37256 (vfloat64m1x7_t): Ditto.
37257 (vfloat64m1x8_t): Ditto.
37258 (vfloat64m2x2_t): Ditto.
37259 (vfloat64m2x3_t): Ditto.
37260 (vfloat64m2x4_t): Ditto.
37261 (vfloat64m4x2_t): Ditto.
37262 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
37264 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
37265 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
37267 (TUPLE_ENTRY): Ditto.
37268 (riscv_v_ext_mode_p): New function.
37269 (riscv_v_adjust_nunits): Add tuple mode adjustment.
37270 (riscv_classify_address): Ditto.
37271 (riscv_binary_cost): Ditto.
37272 (riscv_rtx_costs): Ditto.
37273 (riscv_secondary_memory_needed): Ditto.
37274 (riscv_hard_regno_nregs): Ditto.
37275 (riscv_hard_regno_mode_ok): Ditto.
37276 (riscv_vector_mode_supported_p): Ditto.
37277 (riscv_regmode_natural_size): Ditto.
37278 (riscv_array_mode): New function.
37279 (TARGET_ARRAY_MODE): New target hook.
37280 * config/riscv/riscv.md: Add tuple modes.
37281 * config/riscv/vector-iterators.md: Ditto.
37282 * config/riscv/vector.md (mov<mode>): Add tuple modes data
37284 (*mov<VT:mode>_<P:mode>): Ditto.
37286 2023-05-03 Richard Biener <rguenther@suse.de>
37288 * cse.cc (cse_insn): Track an equivalence to the destination
37289 separately and delay using src_related for it.
37291 2023-05-03 Richard Biener <rguenther@suse.de>
37293 * cse.cc (HASH): Turn into inline function and mix
37294 in another HASH_SHIFT bits.
37295 (SAFE_HASH): Likewise.
37297 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37300 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
37301 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
37303 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37306 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
37307 (add<mode>3<vczle><vczbe>): ... This.
37308 (sub<mode>3): Rename to...
37309 (sub<mode>3<vczle><vczbe>): ... This.
37310 (mul<mode>3): Rename to...
37311 (mul<mode>3<vczle><vczbe>): ... This.
37312 (*div<mode>3): Rename to...
37313 (*div<mode>3<vczle><vczbe>): ... This.
37314 (neg<mode>2): Rename to...
37315 (neg<mode>2<vczle><vczbe>): ... This.
37316 (abs<mode>2): Rename to...
37317 (abs<mode>2<vczle><vczbe>): ... This.
37318 (<frint_pattern><mode>2): Rename to...
37319 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
37320 (<fmaxmin><mode>3): Rename to...
37321 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
37322 (*sqrt<mode>2): Rename to...
37323 (*sqrt<mode>2<vczle><vczbe>): ... This.
37325 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
37327 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
37329 2023-05-03 Martin Liska <mliska@suse.cz>
37331 PR tree-optimization/109693
37332 * value-range-storage.cc (vrange_allocator::vrange_allocator):
37333 Remove unused field.
37334 * value-range-storage.h: Likewise.
37336 2023-05-02 Andrew Pinski <apinski@marvell.com>
37338 * tree-ssa-phiopt.cc (move_stmt): New function.
37339 (match_simplify_replacement): Use move_stmt instead
37340 of the inlined version.
37342 2023-05-02 Andrew Pinski <apinski@marvell.com>
37344 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
37347 2023-05-02 Andrew Pinski <apinski@marvell.com>
37349 PR tree-optimization/109702
37350 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
37351 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
37353 2023-05-02 Andrew Pinski <apinski@marvell.com>
37356 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
37357 insn_and_split pattern.
37359 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37361 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
37364 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37366 * config/riscv/sync.md (mem_thread_fence_1): Change fence
37367 depending on the given memory model.
37369 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37371 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
37372 riscv_union_memmodels function to sync.md.
37373 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
37374 get the union of two memmodels in sync.md.
37375 (riscv_print_operand): Add %I and %J flags that output the
37376 optimal LR/SC flag bits for a given memory model.
37377 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
37378 bits on SC op and replace with optimized %I, %J flags.
37380 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37382 * config/riscv/riscv.cc
37383 (riscv_memmodel_needs_amo_release): Change function name.
37384 (riscv_print_operand): Remove unneeded %F case.
37385 * config/riscv/sync.md: Remove unneeded fences.
37387 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37390 * config/riscv/sync.md (atomic_store<mode>): Use simple store
37391 instruction in combination with fence(s).
37393 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37395 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
37396 of %A to include release bits.
37398 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37400 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
37401 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
37404 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37406 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
37407 sequentially consistent LR.aqrl/SC.rl pairs.
37409 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37411 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
37412 sanitize memmodel input with memmodel_base.
37414 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
37415 Pan Li <pan2.li@intel.com>
37418 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
37420 2023-05-02 Romain Naour <romain.naour@gmail.com>
37422 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
37425 2023-05-02 Martin Liska <mliska@suse.cz>
37427 * doc/invoke.texi: Update documentation based on param.opt file.
37429 2023-05-02 Richard Biener <rguenther@suse.de>
37431 PR tree-optimization/109672
37432 * tree-vect-stmts.cc (vectorizable_operation): For plus,
37433 minus and negate always check the vector mode is word mode.
37435 2023-05-01 Andrew Pinski <apinski@marvell.com>
37437 * tree-ssa-phiopt.cc: Update comment about
37438 how the transformation are implemented.
37440 2023-05-01 Jeff Law <jlaw@ventanamicro>
37442 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
37444 2023-05-01 Jeff Law <jlaw@ventanamicro>
37446 * config/cris/cris.cc (TARGET_LRA_P): Remove.
37447 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
37448 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
37449 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
37450 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
37451 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
37453 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
37455 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
37456 * print-tree.cc (print_decl_identifier): Implement it.
37457 * toplev.cc (output_stack_usage_1): Use it.
37459 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37461 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
37464 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37466 * value-range.h (irange::set_nonzero): Inline.
37468 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37470 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
37472 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
37473 invalid_range, as it is an inverse range.
37474 * tree-vrp.cc (find_case_label_range): Avoid trees.
37475 * value-range.cc (irange::irange_set): Delete.
37476 (irange::irange_set_1bit_anti_range): Delete.
37477 (irange::irange_set_anti_range): Delete.
37478 (irange::set): Cleanup.
37479 * value-range.h (class irange): Remove irange_set,
37480 irange_set_anti_range, irange_set_1bit_anti_range.
37481 (irange::set_undefined): Remove set to m_type.
37483 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37485 * range-op.cc (update_known_bitmask): Adjust for irange containing
37486 wide_ints internally.
37487 * tree-ssanames.cc (set_nonzero_bits): Same.
37488 * tree-ssanames.h (set_nonzero_bits): Same.
37489 * value-range-storage.cc (irange_storage::set_irange): Same.
37490 (irange_storage::get_irange): Same.
37491 * value-range.cc (irange::operator=): Same.
37492 (irange::irange_set): Same.
37493 (irange::irange_set_1bit_anti_range): Same.
37494 (irange::irange_set_anti_range): Same.
37495 (irange::set): Same.
37496 (irange::verify_range): Same.
37497 (irange::contains_p): Same.
37498 (irange::irange_single_pair_union): Same.
37499 (irange::union_): Same.
37500 (irange::irange_contains_p): Same.
37501 (irange::intersect): Same.
37502 (irange::invert): Same.
37503 (irange::set_range_from_nonzero_bits): Same.
37504 (irange::set_nonzero_bits): Same.
37505 (mask_to_wi): Same.
37506 (irange::intersect_nonzero_bits): Same.
37507 (irange::union_nonzero_bits): Same.
37510 (tree_range): Same.
37511 (range_tests_strict_enum): Same.
37512 (range_tests_misc): Same.
37513 (range_tests_nonzero_bits): Same.
37514 * value-range.h (irange::type): Same.
37515 (irange::varying_compatible_p): Same.
37516 (irange::irange): Same.
37517 (int_range::int_range): Same.
37518 (irange::set_undefined): Same.
37519 (irange::set_varying): Same.
37520 (irange::lower_bound): Same.
37521 (irange::upper_bound): Same.
37523 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37525 * gimple-range-fold.cc (tree_lower_bound): Delete.
37526 (tree_upper_bound): Delete.
37527 (vrp_val_max): Delete.
37528 (vrp_val_min): Delete.
37529 (fold_using_range::range_of_ssa_name_with_loop_info): Call
37530 range_of_var_in_loop.
37531 * vr-values.cc (valid_value_p): Delete.
37532 (fix_overflow): Delete.
37533 (get_scev_info): New.
37534 (bounds_of_var_in_loop): Refactor into...
37535 (induction_variable_may_overflow_p): ...this,
37536 (range_from_loop_direction): ...and this,
37537 (range_of_var_in_loop): ...and this.
37538 * vr-values.h (bounds_of_var_in_loop): Delete.
37539 (range_of_var_in_loop): New.
37541 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37543 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
37545 (vrp_val_max): New.
37546 (vrp_val_min): New.
37547 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
37548 * range-op.cc (max_limit): Same.
37550 (plus_minus_ranges): Same.
37551 (operator_rshift::op1_range): Same.
37552 (operator_cast::inside_domain_p): Same.
37553 * value-range.cc (vrp_val_is_max): Delete.
37554 (vrp_val_is_min): Delete.
37555 (range_tests_misc): Use irange_val_*.
37556 * value-range.h (vrp_val_is_min): Delete.
37557 (vrp_val_is_max): Delete.
37558 (vrp_val_max): Delete.
37559 (irange_val_min): New.
37560 (vrp_val_min): Delete.
37561 (irange_val_max): New.
37562 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
37564 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37566 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
37567 * gimple-fold.cc (size_must_be_zero_p): Same.
37568 * gimple-loop-versioning.cc
37569 (loop_versioning::prune_loop_conditions): Same.
37570 * gimple-range-edge.cc (gcond_edge_range): Same.
37571 (gimple_outgoing_range::calc_switch_ranges): Same.
37572 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
37573 (adjust_realpart_expr): Same.
37574 (fold_using_range::range_of_address): Same.
37575 (fold_using_range::relation_fold_and_or): Same.
37576 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
37577 (range_is_either_true_or_false): Same.
37578 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
37579 (cfn_clz::fold_range): Same.
37580 (cfn_ctz::fold_range): Same.
37581 * gimple-range-tests.cc (class test_expr_eval): Same.
37582 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
37583 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
37584 (propagate_vr_across_jump_function): Same.
37585 (decide_whether_version_node): Same.
37586 * ipa-prop.cc (ipa_get_value_range): Same.
37587 * ipa-prop.h (ipa_range_set_and_normalize): Same.
37588 * range-op.cc (get_shift_range): Same.
37589 (value_range_from_overflowed_bounds): Same.
37590 (value_range_with_overflow): Same.
37591 (create_possibly_reversed_range): Same.
37592 (equal_op1_op2_relation): Same.
37593 (not_equal_op1_op2_relation): Same.
37594 (lt_op1_op2_relation): Same.
37595 (le_op1_op2_relation): Same.
37596 (gt_op1_op2_relation): Same.
37597 (ge_op1_op2_relation): Same.
37598 (operator_mult::op1_range): Same.
37599 (operator_exact_divide::op1_range): Same.
37600 (operator_lshift::op1_range): Same.
37601 (operator_rshift::op1_range): Same.
37602 (operator_cast::op1_range): Same.
37603 (operator_logical_and::fold_range): Same.
37604 (set_nonzero_range_from_mask): Same.
37605 (operator_bitwise_or::op1_range): Same.
37606 (operator_bitwise_xor::op1_range): Same.
37607 (operator_addr_expr::fold_range): Same.
37608 (pointer_plus_operator::wi_fold): Same.
37609 (pointer_or_operator::op1_range): Same.
37616 (range_op_cast_tests): Same.
37617 (range_op_lshift_tests): Same.
37618 (range_op_rshift_tests): Same.
37619 (range_op_bitwise_and_tests): Same.
37620 (range_relational_tests): Same.
37621 * range.cc (range_zero): Same.
37622 (range_nonzero): Same.
37623 * range.h (range_true): Same.
37624 (range_false): Same.
37625 (range_true_and_false): Same.
37626 * tree-data-ref.cc (split_constant_offset_1): Same.
37627 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
37628 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
37629 (find_unswitching_predicates_for_bb): Same.
37630 * tree-ssa-phiopt.cc (value_replacement): Same.
37631 * tree-ssa-threadbackward.cc
37632 (back_threader::find_taken_edge_cond): Same.
37633 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
37634 * tree-vrp.cc (find_case_label_range): Same.
37635 * value-query.cc (range_query::get_tree_range): Same.
37636 * value-range.cc (irange::set_nonnegative): Same.
37637 (frange::contains_p): Same.
37638 (frange::singleton_p): Same.
37639 (frange::internal_singleton_p): Same.
37640 (irange::irange_set): Same.
37641 (irange::irange_set_1bit_anti_range): Same.
37642 (irange::irange_set_anti_range): Same.
37643 (irange::set): Same.
37644 (irange::operator==): Same.
37645 (irange::singleton_p): Same.
37646 (irange::contains_p): Same.
37647 (irange::set_range_from_nonzero_bits): Same.
37648 (DEFINE_INT_RANGE_INSTANCE): Same.
37658 (range_uint128): New.
37659 (range_uchar): New.
37661 (build_range3): Convert to irange wide_int API.
37662 (range_tests_irange3): Same.
37663 (range_tests_int_range_max): Same.
37664 (range_tests_strict_enum): Same.
37665 (range_tests_misc): Same.
37666 (range_tests_nonzero_bits): Same.
37667 (range_tests_nan): Same.
37668 (range_tests_signed_zeros): Same.
37669 * value-range.h (Value_Range::Value_Range): Same.
37670 (irange::set): Same.
37671 (irange::nonzero_p): Same.
37672 (irange::contains_p): Same.
37673 (range_includes_zero_p): Same.
37674 (irange::set_nonzero): Same.
37675 (irange::set_zero): Same.
37676 (contains_zero_p): Same.
37677 (frange::contains_p): Same.
37679 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
37680 (bounds_of_var_in_loop): Same.
37681 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
37683 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37685 * value-range.cc (irange::irange_union): Rename to...
37686 (irange::union_): ...this.
37687 (irange::irange_intersect): Rename to...
37688 (irange::intersect): ...this.
37689 * value-range.h (irange::union_): Delete.
37690 (irange::intersect): Delete.
37692 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37694 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
37696 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37698 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
37700 (compare_ranges): Delete.
37701 (compare_range_with_value): Delete.
37702 (bounds_of_var_in_loop): Tidy up by using ranger API.
37703 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
37704 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
37705 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
37706 strict_overflow_p and only_ranges.
37707 (simplify_using_ranges::legacy_fold_cond): Adjust call to
37708 legacy_fold_cond_overflow.
37709 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
37711 (range_fits_type_p): Rename value_range to irange.
37712 * vr-values.h (range_fits_type_p): Adjust prototype.
37714 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37716 * value-range.cc (irange::irange_set_anti_range): Remove uses of
37717 tree_lower_bound and tree_upper_bound.
37718 (irange::verify_range): Same.
37719 (irange::operator==): Same.
37720 (irange::singleton_p): Same.
37721 * value-range.h (irange::tree_lower_bound): Delete.
37722 (irange::tree_upper_bound): Delete.
37723 (irange::lower_bound): Delete.
37724 (irange::upper_bound): Delete.
37725 (irange::zero_p): Remove uses of tree_lower_bound and
37728 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37730 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
37732 (determine_value_range): Same.
37733 (record_nonwrapping_iv): Same.
37734 (infer_loop_bounds_from_signedness): Same.
37735 (scev_var_range_cant_overflow): Same.
37736 * tree-vrp.cc (operand_less_p): Delete.
37737 * tree-vrp.h (operand_less_p): Delete.
37738 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
37739 (irange::value_inside_range): Delete.
37740 * value-range.h (vrange::kind): Delete.
37741 (irange::num_pairs): Remove check of m_kind.
37742 (irange::min): Delete.
37743 (irange::max): Delete.
37745 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37747 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
37748 for vrange_storage.
37749 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
37750 (sbr_vector::grow): Same.
37751 (sbr_vector::set_bb_range): Same.
37752 (sbr_vector::get_bb_range): Same.
37753 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
37754 (sbr_sparse_bitmap::set_bb_range): Same.
37755 (sbr_sparse_bitmap::get_bb_range): Same.
37756 (block_range_cache::block_range_cache): Same.
37757 (ssa_global_cache::ssa_global_cache): Same.
37758 (ssa_global_cache::get_global_range): Same.
37759 (ssa_global_cache::set_global_range): Same.
37760 * gimple-range-cache.h: Same.
37761 * gimple-range-edge.cc
37762 (gimple_outgoing_range::gimple_outgoing_range): Same.
37763 (gimple_outgoing_range::switch_edge_range): Same.
37764 (gimple_outgoing_range::calc_switch_ranges): Same.
37765 * gimple-range-edge.h: Same.
37766 * gimple-range-infer.cc
37767 (infer_range_manager::infer_range_manager): Same.
37768 (infer_range_manager::get_nonzero): Same.
37769 (infer_range_manager::maybe_adjust_range): Same.
37770 (infer_range_manager::add_range): Same.
37771 * gimple-range-infer.h: Rename obstack_vrange_allocator to
37773 * tree-core.h (struct irange_storage_slot): Remove.
37774 (struct tree_ssa_name): Remove irange_info and frange_info. Make
37775 range_info a pointer to vrange_storage.
37776 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
37777 (range_info_alloc): Same.
37778 (range_info_free): Same.
37779 (range_info_get_range): Same.
37780 (range_info_set_range): Same.
37781 (get_nonzero_bits): Same.
37782 * value-query.cc (get_ssa_name_range_info): Same.
37783 * value-range-storage.cc (class vrange_internal_alloc): New.
37784 (class vrange_obstack_alloc): New.
37785 (class vrange_ggc_alloc): New.
37786 (vrange_allocator::vrange_allocator): New.
37787 (vrange_allocator::~vrange_allocator): New.
37788 (vrange_storage::alloc_slot): New.
37789 (vrange_allocator::alloc): New.
37790 (vrange_allocator::free): New.
37791 (vrange_allocator::clone): New.
37792 (vrange_allocator::clone_varying): New.
37793 (vrange_allocator::clone_undefined): New.
37794 (vrange_storage::alloc): New.
37795 (vrange_storage::set_vrange): Remove slot argument.
37796 (vrange_storage::get_vrange): Same.
37797 (vrange_storage::fits_p): Same.
37798 (vrange_storage::equal_p): New.
37799 (irange_storage::write_lengths_address): New.
37800 (irange_storage::lengths_address): New.
37801 (irange_storage_slot::alloc_slot): Remove.
37802 (irange_storage::alloc): New.
37803 (irange_storage_slot::irange_storage_slot): Remove.
37804 (irange_storage::irange_storage): New.
37805 (write_wide_int): New.
37806 (irange_storage_slot::set_irange): Remove.
37807 (irange_storage::set_irange): New.
37808 (read_wide_int): New.
37809 (irange_storage_slot::get_irange): Remove.
37810 (irange_storage::get_irange): New.
37811 (irange_storage_slot::size): Remove.
37812 (irange_storage::equal_p): New.
37813 (irange_storage_slot::num_wide_ints_needed): Remove.
37814 (irange_storage::size): New.
37815 (irange_storage_slot::fits_p): Remove.
37816 (irange_storage::fits_p): New.
37817 (irange_storage_slot::dump): Remove.
37818 (irange_storage::dump): New.
37819 (frange_storage_slot::alloc_slot): Remove.
37820 (frange_storage::alloc): New.
37821 (frange_storage_slot::set_frange): Remove.
37822 (frange_storage::set_frange): New.
37823 (frange_storage_slot::get_frange): Remove.
37824 (frange_storage::get_frange): New.
37825 (frange_storage_slot::fits_p): Remove.
37826 (frange_storage::equal_p): New.
37827 (frange_storage::fits_p): New.
37828 (ggc_vrange_allocator): New.
37829 (ggc_alloc_vrange_storage): New.
37830 * value-range-storage.h (class vrange_storage): Rewrite.
37831 (class irange_storage): Rewrite.
37832 (class frange_storage): Rewrite.
37833 (class obstack_vrange_allocator): Remove.
37834 (class ggc_vrange_allocator): Remove.
37835 (vrange_allocator::alloc_vrange): Remove.
37836 (vrange_allocator::alloc_irange): Remove.
37837 (vrange_allocator::alloc_frange): Remove.
37838 (ggc_alloc_vrange_storage): New.
37839 * value-range.h (class irange): Rename vrange_allocator to
37841 (class frange): Same.
37843 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
37845 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
37846 inc to avoid clobbering the carry flag.
37848 2023-04-30 Andrew Pinski <apinski@marvell.com>
37850 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
37851 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
37853 2023-04-30 Andrew Pinski <apinski@marvell.com>
37855 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
37856 Allow some builtin/internal function calls which
37857 are known not to trap/throw.
37858 (phiopt_worker::match_simplify_replacement):
37859 Use name instead of getting the lhs again.
37861 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
37863 * configure: Regenerate.
37864 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
37866 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
37868 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
37869 emit_insn_if_valid_for_reload.
37870 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
37871 to be recognized, also try emitting a parallel that clobbers
37872 TARGET_FLAGS_REGNUM, as applicable.
37874 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
37876 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
37878 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
37879 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
37881 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
37883 * config/stormy16/stormy16.md (any_lshift): New code iterator.
37884 (any_or_plus): Likewise.
37885 (any_rotate): Likewise.
37886 (*<any_lshift>_and_internal): New define_insn_and_split to
37887 recognize a logical shift followed by an AND, and split it
37888 again after reload.
37889 (*swpn): New define_insn matching xstormy16's swpn.
37890 (*swpn_zext): New define_insn recognizing swpn followed by
37891 zero_extendqihi2, i.e. with the high byte set to zero.
37892 (*swpn_sext): Likewise, for swpn followed by cbw.
37893 (*swpn_sext_2): Likewise, for an alternate RTL form.
37894 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
37895 sequence is split in the correct place to recognize the *swpn_zext
37896 followed by any_or_plus (ior, xor or plus) instruction.
37898 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
37901 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
37902 (lm32-*-uclinux*): Likewise.
37904 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
37906 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
37907 for riscv_use_save_libcall.
37908 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
37909 (riscv_compute_frame_info): restructure to decouple stack allocation
37910 for rv32e w/o save-restore.
37912 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
37914 * doc/install.texi: Fix documentation typo
37916 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
37918 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
37919 (u): Add div/udiv cases.
37920 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
37921 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
37923 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
37924 (thead_c906_tune_info): Likewise.
37925 (optimize_size_tune_info): Likewise.
37926 (riscv_use_divmod_expander): New function.
37927 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
37929 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
37931 * config/riscv/bitmanip.md: Added clmulr instruction.
37932 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
37933 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
37935 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
37936 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
37937 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
37938 functions to riscv-cmo.def.
37939 * config/riscv/generic.md: Add clmul to list of instructions
37940 using the generic_imul reservation.
37942 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
37944 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
37946 2023-04-28 Andrew Pinski <apinski@marvell.com>
37948 PR tree-optimization/100958
37949 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
37950 (pass_phiopt::execute): Don't call two_value_replacement.
37951 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
37952 handle what two_value_replacement did.
37954 2023-04-28 Andrew Pinski <apinski@marvell.com>
37956 * match.pd: Add patterns for
37957 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
37959 2023-04-28 Andrew Pinski <apinski@marvell.com>
37961 * match.pd: Factor out the deciding the min/max from
37962 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
37964 * fold-const.cc (minmax_from_comparison): this new function.
37965 * fold-const.h (minmax_from_comparison): New prototype.
37967 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
37969 PR rtl-optimization/109476
37970 * lower-subreg.cc: Include explow.h for force_reg.
37971 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
37972 If decomposing a suitable LSHIFTRT and we're not splitting
37973 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
37974 instead of setting a high part SUBREG to zero, which helps combine.
37975 (decompose_multiword_subregs): Update call to resolve_shift_zext.
37977 2023-04-28 Richard Biener <rguenther@suse.de>
37979 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
37981 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
37982 gather-scatter info and cost emulated scatters accordingly.
37983 (get_load_store_type): Support emulated scatters.
37984 (vectorizable_store): Likewise. Emulate them by extracting
37985 scalar offsets and data, doing scalar stores.
37987 2023-04-28 Richard Biener <rguenther@suse.de>
37989 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
37990 Tame down element extracts and scalar loads for gather/scatter
37991 similar to elementwise strided accesses.
37993 2023-04-28 Pan Li <pan2.li@intel.com>
37994 kito-cheng <kito.cheng@sifive.com>
37996 * config/riscv/vector.md: Add new define split to perform
37997 the simplification.
37999 2023-04-28 Richard Biener <rguenther@suse.de>
38002 * ipa-param-manipulation.cc
38003 (ipa_param_body_adjustments::modify_expression): Allow
38004 conversion of a register to a non-register type. Elide
38005 conversions inside BIT_FIELD_REFs.
38007 2023-04-28 Richard Biener <rguenther@suse.de>
38009 PR tree-optimization/109644
38010 * tree-cfg.cc (verify_types_in_gimple_reference): Check
38011 register constraints on the outermost VIEW_CONVERT_EXPR
38012 only. Do not allow register or invariant bases on
38013 multi-level or possibly variable index handled components.
38015 2023-04-28 Richard Biener <rguenther@suse.de>
38017 * gimplify.cc (gimplify_compound_lval): When there's a
38018 non-register type produced by one of the handled component
38019 operations make sure we get a non-register base.
38021 2023-04-28 Richard Biener <rguenther@suse.de>
38023 PR tree-optimization/108752
38024 * tree-vect-generic.cc (build_replicated_const): Rename
38025 to build_replicated_int_cst and move to tree.{h,cc}.
38026 (do_plus_minus): Adjust.
38027 (do_negate): Likewise.
38028 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
38029 arithmetic vector operations in lowered form.
38030 * tree.h (build_replicated_int_cst): Declare.
38031 * tree.cc (build_replicated_int_cst): Moved from
38032 tree-vect-generic.cc build_replicated_const.
38034 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38037 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
38038 (aarch64_rbit<mode><vczle><vczbe>): ... This.
38039 (neg<mode>2): Rename to...
38040 (neg<mode>2<vczle><vczbe>): ... This.
38041 (abs<mode>2): Rename to...
38042 (abs<mode>2<vczle><vczbe>): ... This.
38043 (aarch64_abs<mode>): Rename to...
38044 (aarch64_abs<mode><vczle><vczbe>): ... This.
38045 (one_cmpl<mode>2): Rename to...
38046 (one_cmpl<mode>2<vczle><vczbe>): ... This.
38047 (clrsb<mode>2): Rename to...
38048 (clrsb<mode>2<vczle><vczbe>): ... This.
38049 (clz<mode>2): Rename to...
38050 (clz<mode>2<vczle><vczbe>): ... This.
38051 (popcount<mode>2): Rename to...
38052 (popcount<mode>2<vczle><vczbe>): ... This.
38054 2023-04-28 Jakub Jelinek <jakub@redhat.com>
38056 * gimple-range-op.cc (class cfn_sqrt): New type.
38057 (op_cfn_sqrt): New variable.
38058 (gimple_range_op_handler::maybe_builtin_call): Handle
38059 CASE_CFN_SQRT{,_FN}.
38061 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
38062 Jakub Jelinek <jakub@redhat.com>
38064 * value-range.h (frange_nextafter): Declare.
38065 * gimple-range-op.cc (class cfn_sincos): New.
38066 (op_cfn_sin, op_cfn_cos): New variables.
38067 (gimple_range_op_handler::maybe_builtin_call): Handle
38068 CASE_CFN_{SIN,COS}{,_FN}.
38070 2023-04-28 Jakub Jelinek <jakub@redhat.com>
38072 * target.def (libm_function_max_error): New target hook.
38073 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
38074 * doc/tm.texi: Regenerated.
38075 * targhooks.h (default_libm_function_max_error,
38076 glibc_linux_libm_function_max_error): Declare.
38077 * targhooks.cc: Include case-cfn-macros.h.
38078 (default_libm_function_max_error,
38079 glibc_linux_libm_function_max_error): New functions.
38080 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38081 * config/linux-protos.h (linux_libm_function_max_error): Declare.
38082 * config/linux.cc: Include target.h and targhooks.h.
38083 (linux_libm_function_max_error): New function.
38084 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
38085 (arc_libm_function_max_error): New function.
38086 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38087 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
38088 (ix86_libm_function_max_error): New function.
38089 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38090 * config/rs6000/rs6000-protos.h
38091 (rs6000_linux_libm_function_max_error): Declare.
38092 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
38093 and case-cfn-macros.h.
38094 (rs6000_linux_libm_function_max_error): New function.
38095 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38096 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38097 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
38098 (or1k_libm_function_max_error): New function.
38099 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
38101 2023-04-28 Alexandre Oliva <oliva@adacore.com>
38103 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
38104 Move detach value calls...
38105 (pass_harden_conditional_branches::execute): ... here.
38106 (pass_harden_compares::execute): Detach values before
38109 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
38111 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
38112 (cml<addsub_as><mode>4): Likewise.
38113 (vec_addsub<mode>3): Likewise.
38114 (cadd<rot><mode>3): Likewise.
38115 (vec_fmaddsub<mode>4): Likewise.
38116 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
38118 2023-04-27 Andrew Pinski <apinski@marvell.com>
38120 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
38121 up to 2 min/max expressions in the sequence/match code.
38123 2023-04-27 Andrew Pinski <apinski@marvell.com>
38125 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
38127 * tree-eh.cc (operation_could_trap_helper_p): Treate
38128 MIN_EXPR/MAX_EXPR similar as other comparisons.
38130 2023-04-27 Andrew Pinski <apinski@marvell.com>
38132 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
38134 (cond_if_else_store_replacement): Likewise.
38135 (get_non_trapping): Likewise.
38136 (store_elim_worker): Move into ...
38137 (pass_cselim::execute): This.
38139 2023-04-27 Andrew Pinski <apinski@marvell.com>
38141 * tree-ssa-phiopt.cc (two_value_replacement): Remove
38143 (match_simplify_replacement): Likewise.
38144 (factor_out_conditional_conversion): Likewise.
38145 (value_replacement): Likewise.
38146 (minmax_replacement): Likewise.
38147 (spaceship_replacement): Likewise.
38148 (cond_removal_in_builtin_zero_pattern): Likewise.
38149 (hoist_adjacent_loads): Likewise.
38150 (tree_ssa_phiopt_worker): Move into ...
38151 (pass_phiopt::execute): this.
38153 2023-04-27 Andrew Pinski <apinski@marvell.com>
38155 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
38156 do_store_elim argument and split that part out to ...
38157 (store_elim_worker): This new function.
38158 (pass_cselim::execute): Call store_elim_worker.
38159 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
38161 2023-04-27 Jan Hubicka <jh@suse.cz>
38163 * cfgloopmanip.h (unloop_loops): Export.
38164 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
38165 that no longer loop.
38166 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
38167 vectors of loops to unloop.
38168 (canonicalize_induction_variables): Free vectors here.
38169 (tree_unroll_loops_completely): Free vectors here.
38171 2023-04-27 Richard Biener <rguenther@suse.de>
38173 PR tree-optimization/109170
38174 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
38175 Handle __builtin_expect and similar via cfn_pass_through_arg1
38176 and inspecting the calls fnspec.
38177 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
38178 and BUILT_IN_EXPECT_WITH_PROBABILITY.
38180 2023-04-27 Alexandre Oliva <oliva@adacore.com>
38182 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
38184 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
38186 PR tree-optimization/109639
38187 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
38188 (propagate_vr_across_jump_function): Same.
38189 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
38190 * ipa-prop.h (ipa_range_set_and_normalize): New.
38191 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
38193 2023-04-27 Richard Biener <rguenther@suse.de>
38195 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
38196 create a CTOR operand in the result when simplifying GIMPLE.
38198 2023-04-27 Richard Biener <rguenther@suse.de>
38200 * gimplify.cc (gimplify_compound_lval): When the base
38201 gimplified to a register make sure to split up chains
38204 2023-04-27 Richard Biener <rguenther@suse.de>
38207 * ipa-param-manipulation.h
38208 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
38210 * ipa-param-manipulation.cc
38211 (ipa_param_body_adjustments::modify_expression): Likewise.
38212 When we need a conversion and the replacement is a register
38213 split the conversion out.
38214 (ipa_param_body_adjustments::modify_assignment): Pass
38215 extra_stmts to RHS modify_expression.
38217 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
38219 * doc/extend.texi (Zero Length): Describe example.
38221 2023-04-27 Richard Biener <rguenther@suse.de>
38223 PR tree-optimization/109594
38224 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
38225 what we rewrite to a register based on the above.
38227 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
38229 * config/riscv/riscv.cc: Fix whitespace.
38230 * config/riscv/sync.md: Fix whitespace.
38232 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
38234 PR tree-optimization/108697
38235 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
38236 not clear the vector on an out of range query.
38237 (ssa_cache::dump): Use dump_range_query instead of get_range.
38238 (ssa_cache::dump_range_query): New.
38239 (ssa_lazy_cache::dump_range_query): New.
38240 (ssa_lazy_cache::set_range): New.
38241 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
38242 (class ssa_lazy_cache): New.
38243 (ssa_lazy_cache::ssa_lazy_cache): New.
38244 (ssa_lazy_cache::~ssa_lazy_cache): New.
38245 (ssa_lazy_cache::get_range): New.
38246 (ssa_lazy_cache::clear_range): New.
38247 (ssa_lazy_cache::clear): New.
38248 (ssa_lazy_cache::dump): New.
38249 * gimple-range-path.cc (path_range_query::path_range_query): Do
38250 not allocate a ssa_cache object nor has_cache bitmap.
38251 (path_range_query::~path_range_query): Do not free objects.
38252 (path_range_query::clear_cache): Remove.
38253 (path_range_query::get_cache): Adjust.
38254 (path_range_query::set_cache): Remove.
38255 (path_range_query::dump): Don't call through a pointer.
38256 (path_range_query::internal_range_of_expr): Set cache directly.
38257 (path_range_query::reset_path): Clear cache directly.
38258 (path_range_query::ssa_range_in_phi): Fold with globals only.
38259 (path_range_query::compute_ranges_in_phis): Simply set range.
38260 (path_range_query::compute_ranges_in_block): Call cache directly.
38261 * gimple-range-path.h (class path_range_query): Replace bitmap
38262 and cache pointer with lazy cache object.
38263 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
38265 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
38267 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
38268 (ssa_cache::~ssa_cache): Rename.
38269 (ssa_cache::has_range): New.
38270 (ssa_cache::get_range): Rename.
38271 (ssa_cache::set_range): Rename.
38272 (ssa_cache::clear_range): Rename.
38273 (ssa_cache::clear): Rename.
38274 (ssa_cache::dump): Rename and use get_range.
38275 (ranger_cache::get_global_range): Use get_range and set_range.
38276 (ranger_cache::range_of_def): Use get_range.
38277 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
38278 (class ranger_cache): Use ssa_cache.
38279 * gimple-range-path.cc (path_range_query::path_range_query): Use
38281 (path_range_query::get_cache): Use get_range.
38282 (path_range_query::set_cache): Use set_range.
38283 * gimple-range-path.h (class path_range_query): Use ssa_cache.
38284 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
38285 (assume_query::range_of_expr): Use get_range.
38286 (assume_query::assume_query): Use set_range.
38287 (assume_query::calculate_op): Use get_range and set_range.
38288 * gimple-range.h (class assume_query): Use ssa_cache.
38290 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
38292 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
38293 and local to optionally zero memory.
38294 (br_vector::grow): Only zero memory if flag is set.
38295 (class sbr_lazy_vector): New.
38296 (sbr_lazy_vector::sbr_lazy_vector): New.
38297 (sbr_lazy_vector::set_bb_range): New.
38298 (sbr_lazy_vector::get_bb_range): New.
38299 (sbr_lazy_vector::bb_range_p): New.
38300 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
38301 * gimple-range-gori.cc (gori_map::calculate_gori): Use
38302 param_vrp_switch_limit.
38303 (gori_compute::gori_compute): Use param_vrp_switch_limit.
38304 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
38305 (vrp_switch_limit): Rename from evrp_switch_limit.
38306 (vrp_vector_threshold): New.
38308 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
38310 * value-relation.cc (dom_oracle::query_relation): Check early for lack
38312 * value-relation.h (equiv_oracle::has_equiv_p): New.
38314 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
38316 PR tree-optimization/109417
38317 * gimple-range-gori.cc (range_def_chain::register_dependency):
38318 Save the ssa version number, not the pointer.
38319 (gori_compute::may_recompute_p): No need to check if a dependency
38320 is in the free list.
38321 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
38322 fields to be unsigned int instead of trees.
38323 (ange_def_chain::depend1): Adjust.
38324 (ange_def_chain::depend2): Adjust.
38325 * gimple-range.h: Include "ssa.h" to inline ssa_name().
38327 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
38329 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
38330 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
38331 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
38333 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
38336 * config/riscv/riscv-protos.h: Add helper function stubs.
38337 * config/riscv/riscv.cc: Add helper functions for subword masking.
38338 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
38339 -mno-inline-atomics.
38340 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
38341 fetch_and_nand, CAS, and exchange ops.
38342 * doc/invoke.texi: Add blurb regarding new command-line flags
38343 -minline-atomics and -mno-inline-atomics.
38345 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38347 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
38348 Reimplement using standard RTL codes instead of unspec.
38349 (aarch64_rshrn2<mode>_insn_be): Likewise.
38350 (aarch64_rshrn2<mode>): Adjust for the above.
38351 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
38353 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38355 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
38356 with standard RTL codes instead of an UNSPEC.
38357 (aarch64_rshrn<mode>_insn_be): Likewise.
38358 (aarch64_rshrn<mode>): Adjust for the above.
38359 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
38361 2023-04-26 Pan Li <pan2.li@intel.com>
38362 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38364 * config/riscv/riscv.cc (riscv_classify_address): Allow
38365 const0_rtx for the RVV load/store.
38367 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38369 * range-op.cc (range_op_cast_tests): Remove legacy support.
38370 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
38371 * value-range.cc (irange::operator=): Same.
38372 (get_legacy_range): Same.
38373 (irange::copy_legacy_to_multi_range): Delete.
38374 (irange::copy_to_legacy): Delete.
38375 (irange::irange_set_anti_range): Delete.
38376 (irange::set): Remove legacy support.
38377 (irange::verify_range): Same.
38378 (irange::legacy_lower_bound): Delete.
38379 (irange::legacy_upper_bound): Delete.
38380 (irange::legacy_equal_p): Delete.
38381 (irange::operator==): Remove legacy support.
38382 (irange::singleton_p): Same.
38383 (irange::value_inside_range): Same.
38384 (irange::contains_p): Same.
38385 (intersect_ranges): Delete.
38386 (irange::legacy_intersect): Delete.
38387 (union_ranges): Delete.
38388 (irange::legacy_union): Delete.
38389 (irange::legacy_verbose_union_): Delete.
38390 (irange::legacy_verbose_intersect): Delete.
38391 (irange::irange_union): Remove legacy support.
38392 (irange::irange_intersect): Same.
38393 (irange::intersect): Same.
38394 (irange::invert): Same.
38395 (ranges_from_anti_range): Delete.
38396 (gt_pch_nx): Adjust for legacy removal.
38398 (range_tests_legacy): Delete.
38399 (range_tests_misc): Adjust for legacy removal.
38400 (range_tests): Same.
38401 * value-range.h (class irange): Same.
38402 (irange::legacy_mode_p): Delete.
38403 (ranges_from_anti_range): Delete.
38404 (irange::nonzero_p): Adjust for legacy removal.
38405 (irange::lower_bound): Same.
38406 (irange::upper_bound): Same.
38407 (irange::union_): Same.
38408 (irange::intersect): Same.
38409 (irange::set_nonzero): Same.
38410 (irange::set_zero): Same.
38411 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
38413 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38415 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
38416 of range_has_numeric_bounds_p with irange API.
38417 (range_has_numeric_bounds_p): Delete.
38418 * value-range.h (range_has_numeric_bounds_p): Delete.
38420 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38422 * tree-data-ref.cc (compute_distributive_range): Replace uses of
38423 range_int_cst_p with irange API.
38424 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
38425 * tree-vrp.h (range_int_cst_p): Delete.
38426 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
38427 range_int_cst_p with irange API.
38428 (vr_set_zero_nonzero_bits): Same.
38429 (range_fits_type_p): Same.
38430 (simplify_using_ranges::simplify_casted_cond): Same.
38431 * tree-vrp.cc (range_int_cst_p): Remove.
38433 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38435 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
38437 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38439 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
38440 API uses to new API.
38441 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
38442 * internal-fn.cc (get_min_precision): Same.
38444 * tree-affine.cc (expr_to_aff_combination): Same.
38445 * tree-data-ref.cc (dr_step_indicator): Same.
38446 * tree-dfa.cc (get_ref_base_and_extent): Same.
38447 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
38448 * tree-ssa-phiopt.cc (two_value_replacement): Same.
38449 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
38450 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
38451 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
38452 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
38453 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
38454 * tree.cc (get_range_pos_neg): Same.
38456 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38458 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
38459 vrange::dump instead of ad-hoc dumper.
38460 * tree-ssa-strlen.cc (dump_strlen_info): Same.
38461 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
38464 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38466 * range-op.cc (operator_cast::op1_range): Use
38467 create_possibly_reversed_range.
38468 (operator_bitwise_and::simple_op1_range_solver): Same.
38469 * value-range.cc (swap_out_of_order_endpoints): Delete.
38470 (irange::set): Remove call to swap_out_of_order_endpoints.
38472 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38474 * builtins.cc (determine_block_size): Convert use of legacy API to
38476 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
38477 (array_bounds_checker::check_array_ref): Same.
38478 * gimple-ssa-warn-restrict.cc
38479 (builtin_memref::extend_offset_range): Same.
38480 * ipa-cp.cc (ipcp_store_vr_results): Same.
38481 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
38482 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
38483 (ipa_write_jump_function): Same.
38484 * pointer-query.cc (get_size_range): Same.
38485 * tree-data-ref.cc (split_constant_offset): Same.
38486 * tree-ssa-strlen.cc (get_range): Same.
38487 (maybe_diag_stxncpy_trunc): Same.
38488 (strlen_pass::get_len_or_size): Same.
38489 (strlen_pass::count_nonzero_bytes_addr): Same.
38490 * tree-vect-patterns.cc (vect_get_range_info): Same.
38491 * value-range.cc (irange::maybe_anti_range): Remove.
38492 (get_legacy_range): New.
38493 (irange::copy_to_legacy): Use get_legacy_range.
38494 (ranges_from_anti_range): Same.
38495 * value-range.h (class irange): Remove maybe_anti_range.
38496 (get_legacy_range): New.
38497 * vr-values.cc (check_for_binary_op_overflow): Convert use of
38498 legacy API to get_legacy_range.
38499 (compare_ranges): Same.
38500 (compare_range_with_value): Same.
38501 (bounds_of_var_in_loop): Same.
38502 (find_case_label_ranges): Same.
38503 (simplify_using_ranges::simplify_switch_using_ranges): Same.
38505 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38507 * value-range-pretty-print.cc (vrange_printer::visit): Remove
38509 * value-range.cc (irange::constant_p): Remove.
38510 (irange::get_nonzero_bits_from_range): Remove constant_p use.
38511 * value-range.h (class irange): Remove constant_p.
38512 (irange::num_pairs): Remove constant_p use.
38514 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38516 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
38518 (irange::set): Same.
38519 (irange::legacy_lower_bound): Same.
38520 (irange::legacy_upper_bound): Same.
38521 (irange::contains_p): Same.
38522 (range_tests_legacy): Same.
38523 (irange::normalize_addresses): Remove.
38524 (irange::normalize_symbolics): Remove.
38525 (irange::symbolic_p): Remove.
38526 * value-range.h (class irange): Remove symbolic_p,
38527 normalize_symbolics, and normalize_addresses.
38528 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
38529 Remove symbolics support.
38531 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38533 * value-range.cc (irange::may_contain_p): Remove.
38534 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
38535 usage with contains_p.
38536 * vr-values.cc (compare_range_with_value): Same.
38538 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38540 * tree-vrp.cc (supported_types_p): Remove.
38541 (defined_ranges_p): Remove.
38542 (range_fold_binary_expr): Remove.
38543 (range_fold_unary_expr): Remove.
38544 * tree-vrp.h (range_fold_unary_expr): Remove.
38545 (range_fold_binary_expr): Remove.
38547 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38549 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
38550 (ipa_value_range_from_jfunc): Same.
38551 (propagate_vr_across_jump_function): Same.
38552 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
38553 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
38554 * vr-values.cc (bounds_of_var_in_loop): Same.
38556 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38558 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
38559 Add irange argument.
38560 (check_out_of_bounds_and_warn): Remove check for vr.
38561 (array_bounds_checker::check_array_ref): Remove pointer qualifier
38562 for vr and adjust accordingly.
38563 * gimple-array-bounds.h (get_value_range): Add irange argument.
38564 * value-query.cc (class equiv_allocator): Delete.
38565 (range_query::get_value_range): Delete.
38566 (range_query::range_query): Remove allocator access.
38567 (range_query::~range_query): Same.
38568 * value-query.h (get_value_range): Delete.
38570 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
38571 call to get_value_range.
38572 (check_for_binary_op_overflow): Same.
38573 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
38574 (simplify_using_ranges::simplify_abs_using_ranges): Same.
38575 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
38576 (simplify_using_ranges::simplify_casted_cond): Same.
38577 (simplify_using_ranges::simplify_switch_using_ranges): Same.
38578 (simplify_using_ranges::two_valued_val_range_p): Same.
38580 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38583 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
38585 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
38586 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
38587 (simplify_using_ranges::legacy_fold_cond): ...this.
38588 (simplify_using_ranges::fold_cond): Rename
38589 vrp_evaluate_conditional_warnv_with_ops to
38590 legacy_fold_cond_overflow.
38591 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
38592 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
38593 legacy_fold_cond_overflow respectively.
38595 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38597 * vr-values.cc (get_vr_for_comparison): Remove.
38598 (compare_name_with_value): Same.
38599 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
38600 compare_name_with_value.
38601 * vr-values.h: Remove compare_name_with_value.
38602 Remove get_vr_for_comparison.
38604 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
38606 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
38607 (bswapsi2): New define_insn.
38608 (swaphi): New define_insn to exchange two registers (swpw).
38609 (define_peephole2): Recognize exchange of registers as swaphi.
38611 2023-04-26 Richard Biener <rguenther@suse.de>
38613 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
38615 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
38616 * predict.cc (apply_return_prediction): Likewise.
38617 * sese.cc (set_ifsese_condition): Likewise. Simplify.
38618 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
38619 (make_edges_bb): Likewise.
38620 (make_cond_expr_edges): Likewise.
38621 (end_recording_case_labels): Likewise.
38622 (make_gimple_asm_edges): Likewise.
38623 (cleanup_dead_labels): Likewise.
38624 (group_case_labels): Likewise.
38625 (gimple_can_merge_blocks_p): Likewise.
38626 (gimple_merge_blocks): Likewise.
38627 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
38628 (gimple_duplicate_sese_tail): Avoid last_stmt.
38629 (find_loop_dist_alias): Likewise.
38630 (gimple_block_ends_with_condjump_p): Likewise.
38631 (gimple_purge_dead_eh_edges): Likewise.
38632 (gimple_purge_dead_abnormal_call_edges): Likewise.
38633 (pass_warn_function_return::execute): Likewise.
38634 (execute_fixup_cfg): Likewise.
38635 * tree-eh.cc (redirect_eh_edge_1): Likewise.
38636 (pass_lower_resx::execute): Likewise.
38637 (pass_lower_eh_dispatch::execute): Likewise.
38638 (cleanup_empty_eh): Likewise.
38639 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
38640 (predicate_bbs): Likewise.
38641 (ifcvt_split_critical_edges): Likewise.
38642 * tree-loop-distribution.cc (create_edge_for_control_dependence):
38644 (loop_distribution::transform_reduction_loop): Likewise.
38645 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
38646 (try_transform_to_exit_first_loop_alt): Likewise.
38647 (transform_to_exit_first_loop): Likewise.
38648 (create_parallel_loop): Likewise.
38649 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
38650 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
38651 (eliminate_unnecessary_stmts): Likewise.
38653 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
38655 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
38656 (pass_tree_ifcombine::execute): Likewise.
38657 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
38658 (should_duplicate_loop_header_p): Likewise.
38659 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
38660 (tree_estimate_loop_size): Likewise.
38661 (try_unroll_loop_completely): Likewise.
38662 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
38663 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
38664 (canonicalize_loop_ivs): Likewise.
38665 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
38666 (bound_difference): Likewise.
38667 (number_of_iterations_popcount): Likewise.
38668 (number_of_iterations_cltz): Likewise.
38669 (number_of_iterations_cltz_complement): Likewise.
38670 (simplify_using_initial_conditions): Likewise.
38671 (number_of_iterations_exit_assumptions): Likewise.
38672 (loop_niter_by_eval): Likewise.
38673 (estimate_numbers_of_iterations): Likewise.
38675 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38677 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
38679 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
38682 * config/rs6000/rs6000-builtins.def
38683 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
38684 __builtin_vsx_scalar_cmp_exp_qp_lt,
38685 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
38688 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
38691 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
38692 easy_vector_constant with const_vector_each_byte_same, add
38693 handlings in preparation for !easy_vector_constant, and update
38694 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
38695 * config/rs6000/predicates.md (const_vector_each_byte_same): New
38698 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38700 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
38701 (*pred_ltge<mode>_merge_tie_mask): Ditto.
38702 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
38703 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
38704 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
38705 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
38706 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
38708 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38710 * config/riscv/vector.md: Fix redundant vmv1r.v.
38712 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38714 * config/riscv/vector.md: Fix RA constraint.
38716 2023-04-26 Pan Li <pan2.li@intel.com>
38719 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
38720 check for vn_reference equal.
38722 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38724 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
38725 auto-vectorization preference.
38726 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
38727 auto-vectorization.
38728 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
38730 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
38732 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
38733 and bclridisi_nottwobits patterns.
38734 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
38735 predicate to avoid splitting arith constants.
38736 (const_nottwobits_not_arith_operand): New predicate.
38738 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
38740 * recog.cc (peep2_attempt, peep2_update_life): Correct
38741 head-comment description of parameter match_len.
38743 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
38745 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
38746 riscv_split_symbol() drop in_splitter arg.
38747 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
38748 riscv_split_symbol() drop in_splitter arg.
38749 riscv_force_temporary() drop in_splitter arg.
38750 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
38751 riscv_split_symbol() drop in_splitter arg.
38753 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
38755 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
38756 superfluous debug temporaries for single GIMPLE assignments.
38758 2023-04-25 Richard Biener <rguenther@suse.de>
38760 PR tree-optimization/109609
38761 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
38763 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
38764 the size given by arg_max_access_size_given_by_arg_p as
38765 maximum, not exact, size.
38767 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38770 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
38771 (orn<mode>3<vczle><vczbe>): ... This.
38772 (bic<mode>3): Rename to...
38773 (bic<mode>3<vczle><vczbe>): ... This.
38774 (<su><maxmin><mode>3): Rename to...
38775 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
38777 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38779 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
38780 * config/aarch64/iterators.md (VQDIV): New mode iterator.
38781 (vnx2di): New mode attribute.
38783 2023-04-25 Richard Biener <rguenther@suse.de>
38785 PR rtl-optimization/109585
38786 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
38788 2023-04-25 Jakub Jelinek <jakub@redhat.com>
38791 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
38792 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
38793 is larger than signed int maximum.
38795 2023-04-25 Martin Liska <mliska@suse.cz>
38797 * doc/gcov.texi: Document the new "calls" field and document
38798 the API bump. Mention also "block_ids" for lines.
38799 * gcov.cc (output_intermediate_json_line): Output info about
38800 calls and extend branches as well.
38801 (generate_results): Bump version to 2.
38802 (output_line_details): Use block ID instead of a non-sensual
38805 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
38807 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
38808 length attribute for the first (memory operand) alternative.
38810 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
38812 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
38813 * config/aarch64/constraints.md: Make "Umn" relaxed memory
38815 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
38817 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
38819 * value-range.cc (frange::set): Adjust constructor.
38820 * value-range.h (nan_state::nan_state): Replace default
38821 constructor with one taking an argument.
38823 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
38825 * ipa-cp.cc (ipa_range_contains_p): New.
38826 (decide_whether_version_node): Use it.
38828 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
38830 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
38831 simplify two successive VEC_PERM_EXPRs with same VLA mask,
38832 where mask chooses elements in reverse order.
38834 2023-04-24 Andrew Pinski <apinski@marvell.com>
38836 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
38837 and support diamond shaped basic block form.
38838 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
38840 2023-04-24 Andrew Pinski <apinski@marvell.com>
38842 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
38843 Instead of calling last_and_only_stmt, look for the last statement
38846 2023-04-24 Andrew Pinski <apinski@marvell.com>
38848 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
38850 (match_simplify_replacement): Call
38851 empty_bb_or_one_feeding_into_p instead of doing it inline.
38853 2023-04-24 Andrew Pinski <apinski@marvell.com>
38855 PR tree-optimization/68894
38856 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
38857 continue for the do_hoist_loads diamond case.
38859 2023-04-24 Andrew Pinski <apinski@marvell.com>
38861 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
38862 code for better code readability.
38864 2023-04-24 Andrew Pinski <apinski@marvell.com>
38866 PR tree-optimization/109604
38867 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
38868 diamond form check from ...
38869 (minmax_replacement): Here.
38871 2023-04-24 Patrick Palka <ppalka@redhat.com>
38873 * tree.cc (strip_array_types): Don't define here.
38874 (is_typedef_decl): Don't define here.
38875 (typedef_variant_p): Don't define here.
38876 * tree.h (strip_array_types): Define here.
38877 (is_typedef_decl): Define here.
38878 (typedef_variant_p): Define here.
38880 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
38882 * doc/generic.texi (OpenMP): Add != to allowed
38883 conditions and state that vars can be unsigned.
38884 * tree.def (OMP_FOR): Likewise.
38886 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38888 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
38890 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
38892 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
38893 Remove explicit Solaris 11 references.
38895 (Options specification, --with-gnu-as): as and gas always differ
38897 Remove /usr/ccs/bin reference.
38898 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
38899 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
38900 (*-*-solaris2*): ... here.
38901 Update bundled GCC versions.
38902 Don't refer to pre-built binaries.
38903 Remove /bin/sh warning.
38904 Update assembler, linker recommendations.
38905 Document GNAT bootstrap compiler.
38906 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
38907 (sparc64-*-solaris2*): Move content...
38908 (sparcv9-*-solaris2*): ...here.
38909 Add GDC for 64-bit bootstrap compilers.
38911 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38914 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
38916 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
38919 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38921 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
38922 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
38923 (aarch64_<su>abal2<mode>): New define_expand.
38924 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
38925 (aarch64_rtx_costs): Handle ABD rtxes.
38926 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
38927 * config/aarch64/iterators.md (ABAL2): Delete.
38928 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
38930 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38932 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
38933 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
38934 (<sur>sadv16qi): Rename to...
38935 (<su>sadv16qi): ... This. Adjust for the above.
38936 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
38937 (<su>sad<vsi2qi>): ... This. Adjust for the above.
38938 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
38939 * config/aarch64/iterators.md (ABAL): Delete.
38940 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
38942 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38944 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
38945 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
38946 (aarch64_<su>abdl2<mode>): New define_expand.
38947 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
38948 * config/aarch64/iterators.md (ABDL2): Delete.
38949 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
38951 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38953 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
38954 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
38956 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
38957 * config/aarch64/iterators.md (ABDL): Delete.
38958 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
38960 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38962 * config/aarch64/aarch64-simd.md
38963 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
38965 2023-04-24 Richard Biener <rguenther@suse.de>
38967 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
38969 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
38971 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
38972 (set_switch_stmt_execution_predicate): Likewise.
38973 (phi_result_unknown_predicate): Likewise.
38974 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
38975 (ipa_analyze_indirect_call_uses): Likewise.
38976 * predict.cc (predict_iv_comparison): Likewise.
38977 (predict_extra_loop_exits): Likewise.
38978 (predict_loops): Likewise.
38979 (tree_predict_by_opcode): Likewise.
38980 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
38982 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
38983 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
38984 (replace_phi_edge_with_variable): Likewise.
38985 (two_value_replacement): Likewise.
38986 (value_replacement): Likewise.
38987 (minmax_replacement): Likewise.
38988 (spaceship_replacement): Likewise.
38989 (cond_removal_in_builtin_zero_pattern): Likewise.
38990 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
38991 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
38992 (vn_phi_lookup): Likewise.
38993 (vn_phi_insert): Likewise.
38994 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
38995 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
38997 (back_threader_profitability::possibly_profitable_path_p):
38999 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
39001 * tree-switch-conversion.cc (pass_convert_switch::execute):
39003 (pass_lower_switch<O0>::execute): Likewise.
39004 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
39005 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
39006 * tree-vect-slp.cc (vect_slp_function): Likewise.
39007 * tree-vect-stmts.cc (cfun_returns): Likewise.
39008 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
39009 (vect_loop_dist_alias_call): Likewise.
39011 2023-04-24 Richard Biener <rguenther@suse.de>
39013 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
39015 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39017 * config/riscv/riscv-vsetvl.cc
39018 (vector_infos_manager::all_avail_in_compatible_p): New function.
39019 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
39020 * config/riscv/riscv-vsetvl.h: New function.
39022 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39024 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
39025 comment for cleanup_insns.
39027 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39029 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
39030 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
39031 with the fault first load property.
39033 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39035 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
39036 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
39038 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39041 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
39042 (aarch64_addp<mode><vczle><vczbe>): ... This.
39044 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
39046 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
39047 provide reasonable values for common arithmetic operations and
39048 immediate operands (in several machine modes).
39050 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
39052 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
39053 format specifier to output high_part register name of SImode reg.
39054 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
39055 (zero_extendqihi2): Fix lengths, consistent formatting and add
39056 "and Rx,#255" alternative, for documentation purposes.
39057 (zero_extendhisi2): New define_insn.
39059 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
39061 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
39062 SImode shifts by two by performing a single bit SImode shift twice.
39064 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
39066 PR tree-optimization/109593
39067 * value-range.cc (frange::operator==): Handle NANs.
39069 2023-04-23 liuhongt <hongtao.liu@intel.com>
39071 PR rtl-optimization/108707
39072 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
39073 GENERAL_REGS when preferred reg_class is not known.
39075 2023-04-22 Andrew Pinski <apinski@marvell.com>
39077 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
39078 Change the code around slightly to move diamond
39079 handling for do_store_elim/do_hoist_loads out of
39082 2023-04-22 Andrew Pinski <apinski@marvell.com>
39084 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
39085 Remove check on empty_block_p.
39087 2023-04-22 Jakub Jelinek <jakub@redhat.com>
39089 PR bootstrap/109589
39090 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
39091 * realmpfr.h (class auto_mpfr): Likewise.
39093 2023-04-22 Jakub Jelinek <jakub@redhat.com>
39095 PR tree-optimization/109583
39096 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
39097 if vec_mode is not VECTOR_MODE_P.
39099 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
39100 Ondrej Kubanek <kubanek0ondrej@gmail.com>
39102 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
39103 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
39104 loop profile and bounds after header duplication.
39105 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
39106 Break out from try_peel_loop; fix handling of 0 iterations.
39107 (try_peel_loop): Use adjust_loop_info_after_peeling.
39109 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
39111 PR tree-optimization/109546
39112 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
39113 not fold conditions with ADDR_EXPR early.
39115 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39117 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
39118 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
39120 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
39121 (*aarch64_<optab><mode>3_zero): Define.
39122 (*aarch64_<optab><mode>3_cssc): Likewise.
39123 * config/aarch64/iterators.md (maxminand): New code attribute.
39125 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39128 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
39129 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
39131 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
39132 (aarch64_override_options_internal): Handle the above.
39133 (aarch64_output_load_tp): New function.
39134 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
39135 aarch64_output_load_tp.
39136 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
39137 (mtp=): New option.
39138 * doc/invoke.texi (AArch64 Options): Document -mtp=.
39140 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39143 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
39144 (add_vec_concat_subst_be): Likewise.
39147 (add<mode>3): Rename to...
39148 (add<mode>3<vczle><vczbe>): ... This.
39149 (sub<mode>3): Rename to...
39150 (sub<mode>3<vczle><vczbe>): ... This.
39151 (mul<mode>3): Rename to...
39152 (mul<mode>3<vczle><vczbe>): ... This.
39153 (and<mode>3): Rename to...
39154 (and<mode>3<vczle><vczbe>): ... This.
39155 (ior<mode>3): Rename to...
39156 (ior<mode>3<vczle><vczbe>): ... This.
39157 (xor<mode>3): Rename to...
39158 (xor<mode>3<vczle><vczbe>): ... This.
39159 * config/aarch64/iterators.md (VDZ): Define.
39161 2023-04-21 Patrick Palka <ppalka@redhat.com>
39163 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
39166 2023-04-21 Jan Hubicka <jh@suse.cz>
39168 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
39171 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
39173 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
39174 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
39176 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39178 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
39179 force_reg instead of copy_to_mode_reg.
39180 (aarch64_expand_vector_init): Likewise.
39182 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
39184 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
39185 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
39186 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
39187 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
39188 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
39189 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
39190 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
39191 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
39192 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
39193 * config/i386/predicates.md (index_register_operand):
39194 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
39195 * config/i386/i386.cc (ix86_legitimate_address_p): Use
39196 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
39197 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
39199 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
39200 Ondrej Kubanek <kubanek0ondrej@gmail.com>
39202 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
39205 2023-04-21 Richard Biener <rguenther@suse.de>
39207 * is-a.h (safe_is_a): New.
39209 2023-04-21 Richard Biener <rguenther@suse.de>
39211 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
39212 (gphi_iterator::operator*): Likewise.
39214 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
39215 Michal Jires <michal@jires.eu>
39217 * ipa-inline.cc (class inline_badness): New class.
39218 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
39220 (update_edge_key): Update.
39221 (lookup_recursive_calls): Likewise.
39222 (recursive_inlining): Likewise.
39223 (add_new_edges_to_heap): Likewise.
39224 (inline_small_functions): Likewise.
39226 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
39228 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
39230 2023-04-21 Richard Biener <rguenther@suse.de>
39232 PR tree-optimization/109573
39233 * tree-vect-loop.cc (vectorizable_live_operation): Allow
39234 unhandled SSA copy as well. Demote assert to checking only.
39236 2023-04-21 Richard Biener <rguenther@suse.de>
39238 * df-core.cc (df_analyze): Compute RPO on the reverse graph
39239 for DF_BACKWARD problems.
39240 (loop_post_order_compute): Rename to ...
39241 (loop_rev_post_order_compute): ... this, compute a RPO.
39242 (loop_inverted_post_order_compute): Rename to ...
39243 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
39244 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
39245 problems, RPO on the inverted graph for DF_BACKWARD.
39247 2023-04-21 Richard Biener <rguenther@suse.de>
39249 * cfganal.h (inverted_rev_post_order_compute): Rename
39251 (inverted_post_order_compute): ... this. Add struct function
39252 argument, change allocation to a C array.
39253 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
39254 * lcm.cc (compute_antinout_edge): Adjust.
39255 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
39256 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
39257 * tree-ssa-pre.cc (compute_antic): Likewise.
39259 2023-04-21 Richard Biener <rguenther@suse.de>
39261 * df.h (df_d::postorder_inverted): Change back to int *,
39263 * df-core.cc (rest_of_handle_df_finish): Adjust.
39264 (df_analyze_1): Likewise.
39265 (df_analyze): For DF_FORWARD problems use RPO on the forward
39267 (loop_inverted_post_order_compute): Adjust API.
39268 (df_analyze_loop): Adjust.
39269 (df_get_n_blocks): Likewise.
39270 (df_get_postorder): Likewise.
39272 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39275 * config/riscv/riscv-vsetvl.cc
39276 (vector_infos_manager::all_empty_predecessor_p): New function.
39277 (pass_vsetvl::backward_demand_fusion): Ditto.
39278 * config/riscv/riscv-vsetvl.h: Ditto.
39280 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
39283 * config/riscv/generic.md: Change standard names to insn names.
39285 2023-04-21 Richard Biener <rguenther@suse.de>
39287 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
39288 (compute_laterin): Use RPO.
39289 (compute_available): Likewise.
39291 2023-04-21 Peng Fan <fanpeng@loongson.cn>
39293 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
39295 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39298 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
39299 (vector_insn_info::skip_avl_compatible_p): Ditto.
39300 (vector_insn_info::merge): Remove default value.
39301 (pass_vsetvl::compute_local_backward_infos): Ditto.
39302 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
39303 * config/riscv/riscv-vsetvl.h: Ditto.
39305 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
39307 * doc/extend.texi (Common Function Attributes): Remove duplicate
39310 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
39312 PR tree-optimization/109564
39313 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
39314 UNDEFINED range names when deciding if all PHI arguments are the same,
39316 2023-04-20 Jakub Jelinek <jakub@redhat.com>
39318 PR tree-optimization/109011
39319 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
39320 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
39321 .CTZ (X) = PREC - .POPCOUNT (X | -X).
39323 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
39325 * lra-constraints.cc (match_reload): Exclude some hard regs for
39326 multi-reg inout reload pseudos used in asm in different mode.
39328 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
39330 * config/arm/arm.cc (thumb1_legitimate_address_p):
39331 Use VIRTUAL_REGISTER_P predicate.
39332 (arm_eliminable_register): Ditto.
39333 * config/avr/avr.md (push<mode>_1): Ditto.
39334 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
39335 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
39336 * config/i386/predicates.md (register_no_elim_operand): Ditto.
39337 * config/iq2000/predicates.md (call_insn_operand): Ditto.
39338 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
39340 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
39343 * config/i386/predicates.md (extract_operator): New predicate.
39344 * config/i386/i386.md (any_extract): Remove code iterator.
39345 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
39346 (*cmpqi_ext<mode>_1): Ditto.
39347 (*cmpqi_ext<mode>_2): Ditto.
39348 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
39349 (*cmpqi_ext<mode>_3): Ditto.
39350 (*cmpqi_ext<mode>_4): Ditto.
39351 (*extzvqi_mem_rex64): Ditto.
39353 (*insvqi_2): Ditto.
39354 (*extendqi<SWI24:mode>_ext_1): Ditto.
39355 (*addqi_ext<mode>_0): Ditto.
39356 (*addqi_ext<mode>_1): Ditto.
39357 (*addqi_ext<mode>_2): Ditto.
39358 (*subqi_ext<mode>_0): Ditto.
39359 (*subqi_ext<mode>_2): Ditto.
39360 (*testqi_ext<mode>_1): Ditto.
39361 (*testqi_ext<mode>_2): Ditto.
39362 (*andqi_ext<mode>_0): Ditto.
39363 (*andqi_ext<mode>_1): Ditto.
39364 (*andqi_ext<mode>_1_cc): Ditto.
39365 (*andqi_ext<mode>_2): Ditto.
39366 (*<any_or:code>qi_ext<mode>_0): Ditto.
39367 (*<any_or:code>qi_ext<mode>_1): Ditto.
39368 (*<any_or:code>qi_ext<mode>_2): Ditto.
39369 (*xorqi_ext<mode>_1_cc): Ditto.
39370 (*negqi_ext<mode>_2): Ditto.
39371 (*ashlqi_ext<mode>_2): Ditto.
39372 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
39374 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
39377 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
39378 <bitmanip_insn> as the type to allow for fine grained control of
39379 scheduling these insns.
39380 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
39382 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
39383 pcnt, signed and unsigned min/max.
39385 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39386 kito-cheng <kito.cheng@sifive.com>
39388 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
39390 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39391 kito-cheng <kito.cheng@sifive.com>
39394 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
39395 (pass_vsetvl::cleanup_insns): Fix bug.
39397 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
39399 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
39400 (ldexp<mode>3): Delete.
39401 (ldexp<mode>3<exec>): Change "B" to "A".
39403 2023-04-20 Jakub Jelinek <jakub@redhat.com>
39404 Jonathan Wakely <jwakely@redhat.com>
39406 * tree.h (built_in_function_equal_p): New helper function.
39407 (fndecl_built_in_p): Turn into variadic template to support
39408 1 or more built_in_function arguments.
39409 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
39410 * gimplify.cc (goa_stabilize_expr): Likewise.
39411 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
39412 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
39413 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
39414 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
39415 cgraph_update_edges_for_call_stmt_node,
39416 cgraph_edge::verify_corresponds_to_fndecl,
39417 cgraph_node::verify_node): Likewise.
39418 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
39419 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
39420 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
39422 2023-04-20 Jakub Jelinek <jakub@redhat.com>
39424 PR tree-optimization/109011
39425 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
39426 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
39427 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
39428 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
39429 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
39431 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
39433 2023-04-20 Richard Biener <rguenther@suse.de>
39435 * df-core.cc (rest_of_handle_df_initialize): Remove
39436 computation of df->postorder, df->postorder_inverted and
39439 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39441 * common/config/i386/i386-common.cc
39442 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
39443 (ix86_handle_option): Set AVX flag for VAES.
39444 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
39445 Add OPTION_MASK_ISA2_VAES_UNSET.
39446 (def_builtin): Share builtin between AES and VAES.
39447 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
39449 * config/i386/i386.md (aes): New isa attribute.
39450 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
39451 (aesenclast): Ditto.
39453 (aesdeclast): Ditto.
39454 * config/i386/vaesintrin.h: Remove redundant avx target push.
39455 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
39456 (_mm_aesdeclast_si128): Ditto.
39457 (_mm_aesenc_si128): Ditto.
39458 (_mm_aesenclast_si128): Ditto.
39460 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
39462 * config/i386/avx2intrin.h
39463 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
39464 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
39465 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
39466 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
39467 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
39468 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
39469 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
39470 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
39471 (_mm_reduce_add_epi16): New instrinsics.
39472 (_mm_reduce_mul_epi16): Ditto.
39473 (_mm_reduce_and_epi16): Ditto.
39474 (_mm_reduce_or_epi16): Ditto.
39475 (_mm_reduce_max_epi16): Ditto.
39476 (_mm_reduce_max_epu16): Ditto.
39477 (_mm_reduce_min_epi16): Ditto.
39478 (_mm_reduce_min_epu16): Ditto.
39479 (_mm256_reduce_add_epi16): Ditto.
39480 (_mm256_reduce_mul_epi16): Ditto.
39481 (_mm256_reduce_and_epi16): Ditto.
39482 (_mm256_reduce_or_epi16): Ditto.
39483 (_mm256_reduce_max_epi16): Ditto.
39484 (_mm256_reduce_max_epu16): Ditto.
39485 (_mm256_reduce_min_epi16): Ditto.
39486 (_mm256_reduce_min_epu16): Ditto.
39487 (_mm_reduce_add_epi8): Ditto.
39488 (_mm_reduce_mul_epi8): Ditto.
39489 (_mm_reduce_and_epi8): Ditto.
39490 (_mm_reduce_or_epi8): Ditto.
39491 (_mm_reduce_max_epi8): Ditto.
39492 (_mm_reduce_max_epu8): Ditto.
39493 (_mm_reduce_min_epi8): Ditto.
39494 (_mm_reduce_min_epu8): Ditto.
39495 (_mm256_reduce_add_epi8): Ditto.
39496 (_mm256_reduce_mul_epi8): Ditto.
39497 (_mm256_reduce_and_epi8): Ditto.
39498 (_mm256_reduce_or_epi8): Ditto.
39499 (_mm256_reduce_max_epi8): Ditto.
39500 (_mm256_reduce_max_epu8): Ditto.
39501 (_mm256_reduce_min_epi8): Ditto.
39502 (_mm256_reduce_min_epu8): Ditto.
39503 * config/i386/avx512vlbwintrin.h:
39504 (_mm_mask_reduce_add_epi16): Ditto.
39505 (_mm_mask_reduce_mul_epi16): Ditto.
39506 (_mm_mask_reduce_and_epi16): Ditto.
39507 (_mm_mask_reduce_or_epi16): Ditto.
39508 (_mm_mask_reduce_max_epi16): Ditto.
39509 (_mm_mask_reduce_max_epu16): Ditto.
39510 (_mm_mask_reduce_min_epi16): Ditto.
39511 (_mm_mask_reduce_min_epu16): Ditto.
39512 (_mm256_mask_reduce_add_epi16): Ditto.
39513 (_mm256_mask_reduce_mul_epi16): Ditto.
39514 (_mm256_mask_reduce_and_epi16): Ditto.
39515 (_mm256_mask_reduce_or_epi16): Ditto.
39516 (_mm256_mask_reduce_max_epi16): Ditto.
39517 (_mm256_mask_reduce_max_epu16): Ditto.
39518 (_mm256_mask_reduce_min_epi16): Ditto.
39519 (_mm256_mask_reduce_min_epu16): Ditto.
39520 (_mm_mask_reduce_add_epi8): Ditto.
39521 (_mm_mask_reduce_mul_epi8): Ditto.
39522 (_mm_mask_reduce_and_epi8): Ditto.
39523 (_mm_mask_reduce_or_epi8): Ditto.
39524 (_mm_mask_reduce_max_epi8): Ditto.
39525 (_mm_mask_reduce_max_epu8): Ditto.
39526 (_mm_mask_reduce_min_epi8): Ditto.
39527 (_mm_mask_reduce_min_epu8): Ditto.
39528 (_mm256_mask_reduce_add_epi8): Ditto.
39529 (_mm256_mask_reduce_mul_epi8): Ditto.
39530 (_mm256_mask_reduce_and_epi8): Ditto.
39531 (_mm256_mask_reduce_or_epi8): Ditto.
39532 (_mm256_mask_reduce_max_epi8): Ditto.
39533 (_mm256_mask_reduce_max_epu8): Ditto.
39534 (_mm256_mask_reduce_min_epi8): Ditto.
39535 (_mm256_mask_reduce_min_epu8): Ditto.
39537 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39539 * common/config/i386/i386-common.cc
39540 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
39541 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
39542 (OPTION_MASK_ISA_AVX_UNSET):
39543 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
39544 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
39545 * config/i386/i386.md (vpclmulqdqvl): New.
39546 * config/i386/sse.md (pclmulqdq): Add evex encoding.
39547 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
39550 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39552 * config/i386/avx512vlbwintrin.h
39553 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
39554 (_mm_mask_blend_epi8): Ditto.
39555 (_mm256_mask_blend_epi16): Ditto.
39556 (_mm256_mask_blend_epi8): Ditto.
39557 * config/i386/avx512vlintrin.h
39558 (_mm256_mask_blend_pd): Ditto.
39559 (_mm256_mask_blend_ps): Ditto.
39560 (_mm256_mask_blend_epi64): Ditto.
39561 (_mm256_mask_blend_epi32): Ditto.
39562 (_mm_mask_blend_pd): Ditto.
39563 (_mm_mask_blend_ps): Ditto.
39564 (_mm_mask_blend_epi64): Ditto.
39565 (_mm_mask_blend_epi32): Ditto.
39566 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
39567 (VF_AVX512HFBFVL): Move it before the first usage.
39568 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
39569 to VF_AVX512HFBFVL.
39571 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39573 * common/config/i386/i386-common.cc
39574 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
39575 to OPTION_MASK_ISA_AVX512BW_SET.
39576 (OPTION_MASK_ISA_AVX512F_UNSET):
39577 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
39578 (OPTION_MASK_ISA_AVX512BW_UNSET):
39579 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
39580 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
39581 * config/i386/avx512vbmi2vlintrin.h: Ditto.
39582 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
39583 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
39584 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
39585 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
39587 (compressstore<mode>_mask): Ditto.
39588 (expand<mode>_mask): Ditto.
39589 (expand<mode>_maskz): Ditto.
39590 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
39591 VI12_VI48F_AVX512VL.
39593 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39595 * common/config/i386/i386-common.cc
39596 (OPTION_MASK_ISA_AVX512BITALG_SET):
39597 Change OPTION_MASK_ISA_AVX512F_SET
39598 to OPTION_MASK_ISA_AVX512BW_SET.
39599 (OPTION_MASK_ISA_AVX512F_UNSET):
39600 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
39601 (OPTION_MASK_ISA_AVX512BW_UNSET):
39602 Add OPTION_MASK_ISA_AVX512BITALG_SET.
39603 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
39604 * config/i386/i386-builtin.def:
39605 Remove redundant OPTION_MASK_ISA_AVX512BW.
39606 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
39607 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
39608 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
39610 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39612 * config/i386/i386-expand.cc
39613 (ix86_check_builtin_isa_match): Correct wrong comments.
39614 Add a new macro SHARE_BUILTIN and refactor the current if
39617 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
39619 * config/i386/cpuid.h: Open a new section for Extended Features
39620 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
39623 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
39625 * config/i386/sse.md: Modify insn vperm{i,f}
39628 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
39630 * config/xtensa/xtensa-opts.h: New header.
39631 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
39632 xtensa_strict_align.
39633 * config/xtensa/xtensa.cc (xtensa_option_override): When
39634 -m[no-]strict-align is not specified in the command line set
39635 xtensa_strict_align to 0 if the hardware supports both unaligned
39636 loads and stores or to 1 otherwise.
39637 * config/xtensa/xtensa.opt (mstrict-align): New option.
39638 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
39640 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
39642 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
39645 2023-04-19 Andrew Pinski <apinski@marvell.com>
39647 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
39649 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39651 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
39652 (VECTOR_BOOL_MODE): Ditto.
39653 (ADJUST_NUNITS): Ditto.
39654 (ADJUST_ALIGNMENT): Ditto.
39655 (ADJUST_BYTESIZE): Ditto.
39656 (ADJUST_PRECISION): Ditto.
39657 (RVV_MODES): Ditto.
39658 (VECTOR_MODE_WITH_PREFIX): Ditto.
39659 * config/riscv/riscv-v.cc (ENTRY): Ditto.
39660 (get_vlmul): Ditto.
39661 (get_ratio): Ditto.
39662 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
39663 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
39664 (vbool64_t): Ditto.
39665 (vbool32_t): Ditto.
39666 (vbool16_t): Ditto.
39671 (vint8mf8_t): Ditto.
39672 (vuint8mf8_t): Ditto.
39673 (vint8mf4_t): Ditto.
39674 (vuint8mf4_t): Ditto.
39675 (vint8mf2_t): Ditto.
39676 (vuint8mf2_t): Ditto.
39677 (vint8m1_t): Ditto.
39678 (vuint8m1_t): Ditto.
39679 (vint8m2_t): Ditto.
39680 (vuint8m2_t): Ditto.
39681 (vint8m4_t): Ditto.
39682 (vuint8m4_t): Ditto.
39683 (vint8m8_t): Ditto.
39684 (vuint8m8_t): Ditto.
39685 (vint16mf4_t): Ditto.
39686 (vuint16mf4_t): Ditto.
39687 (vint16mf2_t): Ditto.
39688 (vuint16mf2_t): Ditto.
39689 (vint16m1_t): Ditto.
39690 (vuint16m1_t): Ditto.
39691 (vint16m2_t): Ditto.
39692 (vuint16m2_t): Ditto.
39693 (vint16m4_t): Ditto.
39694 (vuint16m4_t): Ditto.
39695 (vint16m8_t): Ditto.
39696 (vuint16m8_t): Ditto.
39697 (vint32mf2_t): Ditto.
39698 (vuint32mf2_t): Ditto.
39699 (vint32m1_t): Ditto.
39700 (vuint32m1_t): Ditto.
39701 (vint32m2_t): Ditto.
39702 (vuint32m2_t): Ditto.
39703 (vint32m4_t): Ditto.
39704 (vuint32m4_t): Ditto.
39705 (vint32m8_t): Ditto.
39706 (vuint32m8_t): Ditto.
39707 (vint64m1_t): Ditto.
39708 (vuint64m1_t): Ditto.
39709 (vint64m2_t): Ditto.
39710 (vuint64m2_t): Ditto.
39711 (vint64m4_t): Ditto.
39712 (vuint64m4_t): Ditto.
39713 (vint64m8_t): Ditto.
39714 (vuint64m8_t): Ditto.
39715 (vfloat32mf2_t): Ditto.
39716 (vfloat32m1_t): Ditto.
39717 (vfloat32m2_t): Ditto.
39718 (vfloat32m4_t): Ditto.
39719 (vfloat32m8_t): Ditto.
39720 (vfloat64m1_t): Ditto.
39721 (vfloat64m2_t): Ditto.
39722 (vfloat64m4_t): Ditto.
39723 (vfloat64m8_t): Ditto.
39724 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
39725 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
39726 (riscv_convert_vector_bits): Ditto.
39727 * config/riscv/riscv.md:
39728 * config/riscv/vector-iterators.md:
39729 * config/riscv/vector.md
39730 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
39731 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
39732 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
39733 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
39734 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
39735 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
39736 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
39737 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
39738 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
39740 2023-04-19 Pan Li <pan2.li@intel.com>
39742 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
39743 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
39745 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
39749 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
39750 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
39751 for operand 0. Use any_extract code iterator.
39752 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
39753 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
39754 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
39755 (*cmpqi_ext<mode>_1): Use general_operand predicate
39756 for operand 1. Use any_extract code iterator.
39757 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
39758 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
39760 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39762 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
39763 (aarch64_uaddw2<mode>): Delete.
39764 (aarch64_ssubw2<mode>): Delete.
39765 (aarch64_usubw2<mode>): Delete.
39766 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
39768 2023-04-19 Richard Biener <rguenther@suse.de>
39770 * tree-ssa-structalias.cc (do_ds_constraint): Use
39771 solve_add_graph_edge.
39773 2023-04-19 Richard Biener <rguenther@suse.de>
39775 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
39777 (do_sd_constraint): ... here.
39779 2023-04-19 Richard Biener <rguenther@suse.de>
39781 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
39782 rejecting the merge when A contains only a non-local label.
39784 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
39786 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
39787 (VIRTUAL_REGISTER_NUM_P): Ditto.
39788 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
39789 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
39790 * function.cc (instantiate_decl_rtl): Ditto.
39791 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
39792 (nonzero_address_p): Ditto.
39793 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
39795 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
39797 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
39799 2023-04-19 Richard Biener <rguenther@suse.de>
39801 * system.h (auto_mpz::operator->()): New.
39802 * realmpfr.h (auto_mpfr::operator->()): New.
39803 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
39804 * real.cc (real_from_string): Likewise.
39805 (dconst_e_ptr): Likewise.
39806 (dconst_sqrt2_ptr): Likewise.
39807 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
39809 (bound_difference_of_offsetted_base): Likewise.
39810 (number_of_iterations_ne): Likewise.
39811 (number_of_iterations_lt_to_ne): Likewise.
39812 * ubsan.cc: Include realmpfr.h.
39813 (ubsan_instrument_float_cast): Use auto_mpfr.
39815 2023-04-19 Richard Biener <rguenther@suse.de>
39817 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
39818 edges, remove edges from escaped after special-casing them.
39820 2023-04-19 Richard Biener <rguenther@suse.de>
39822 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
39825 2023-04-19 Richard Biener <rguenther@suse.de>
39827 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
39828 to the LHS varinfo solution member.
39830 2023-04-19 Richard Biener <rguenther@suse.de>
39832 * tree-ssa-structalias.cc (topo_visit): Look at the real
39833 destination of edges.
39835 2023-04-19 Richard Biener <rguenther@suse.de>
39837 PR tree-optimization/44794
39838 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
39839 If an epilogue loop is required set its iteration upper bound.
39841 2023-04-19 Xi Ruoyao <xry111@xry111.site>
39844 * config/loongarch/loongarch-protos.h
39845 (loongarch_expand_block_move): Add a parameter as alignment RTX.
39846 * config/loongarch/loongarch.h:
39847 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
39848 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
39849 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
39850 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
39851 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
39852 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
39853 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
39854 Take the alignment from the parameter, but set it to
39855 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
39856 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
39857 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
39858 (loongarch_block_move_straight): When there are left-over bytes,
39859 half the mode size instead of falling back to byte mode at once.
39860 (loongarch_block_move_loop): Limit the length of loop body with
39861 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
39862 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
39863 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
39864 to loongarch_expand_block_move.
39866 2023-04-19 Xi Ruoyao <xry111@xry111.site>
39868 * config/loongarch/loongarch.cc
39869 (loongarch_setup_incoming_varargs): Don't save more GARs than
39870 cfun->va_list_gpr_size / UNITS_PER_WORD.
39872 2023-04-19 Richard Biener <rguenther@suse.de>
39874 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
39875 no epilogue condition.
39877 2023-04-19 Richard Biener <rguenther@suse.de>
39879 * gimple.h (gimple_assign_load): Outline...
39880 * gimple.cc (gimple_assign_load): ... here. Avoid
39881 get_base_address and instead just strip the outermost
39882 handled component, treating a remaining handled component
39885 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39887 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
39889 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
39891 2023-04-19 Jakub Jelinek <jakub@redhat.com>
39893 PR tree-optimization/109011
39894 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
39895 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
39896 CLZ, CTZ and FFS. Remove vargs variable, use
39897 gimple_build_call_internal rather than gimple_build_call_internal_vec.
39898 (vect_vect_recog_func_ptrs): Adjust popcount entry.
39900 2023-04-19 Jakub Jelinek <jakub@redhat.com>
39903 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
39904 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
39905 a new REG rather than the SUBREG.
39907 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39909 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
39912 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39915 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
39916 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
39918 2023-04-19 Richard Biener <rguenther@suse.de>
39920 PR rtl-optimization/109237
39921 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
39922 TREE_VISITED on INSN_VAR_LOCATION_DECL.
39923 (delete_trivially_dead_insns): Maintain TREE_VISITED on
39924 active debug bind INSN_VAR_LOCATION_DECL.
39926 2023-04-19 Richard Biener <rguenther@suse.de>
39928 PR rtl-optimization/109237
39929 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
39931 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
39933 * doc/install.texi (enable-decimal-float): Add AArch64.
39935 2023-04-19 liuhongt <hongtao.liu@intel.com>
39937 PR rtl-optimization/109351
39938 * ira.cc (setup_class_subset_and_memory_move_costs): Check
39939 hard_regno_mode_ok before setting lowest memory move cost for
39940 the mode with different reg classes.
39942 2023-04-18 Jason Merrill <jason@redhat.com>
39944 * doc/invoke.texi: Remove stray @gol.
39946 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39948 * ifcvt.cc (cond_move_process_if_block): Consider the result of
39949 targetm.noce_conversion_profitable_p() when replacing the original
39950 sequence with the converted one.
39952 2023-04-18 Mark Harmstone <mark@harmstone.com>
39954 * common.opt (gcodeview): Add new option.
39955 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
39956 * opts.cc (command_handle_option): Similarly.
39957 * doc/invoke.texi: Add documentation for -gcodeview.
39959 2023-04-18 Andrew Pinski <apinski@marvell.com>
39961 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
39962 (make_pass_phiopt): Make execute out of line.
39963 (tree_ssa_cs_elim): Move code into ...
39964 (pass_cselim::execute): here.
39966 2023-04-18 Sam James <sam@gentoo.org>
39968 * system.h: Drop unused INCLUDE_PTHREAD_H.
39970 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
39972 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
39975 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
39977 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
39978 (bswapdi2, bswapsi2): Similarly.
39980 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
39983 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
39984 Use CODE_FOR_sse4_1_insertps_v4sf.
39985 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
39986 (expand_vec_perm_1): Call expand_vec_per_insertps.
39987 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
39988 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
39989 (@sse4_1_insertps_<mode>): New insn pattern.
39990 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
39991 pattern from sse4_1_insertps using VI4F_128 mode iterator.
39993 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39995 * value-range.cc (gt_ggc_mx): New.
39997 * value-range.h (class vrange): Add GTY marker.
39998 (class frange): Same.
39999 (gt_ggc_mx): Remove.
40000 (gt_pch_nx): Remove.
40002 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
40004 * lra-constraints.cc (constraint_unique): New.
40005 (process_address_1): Apply constraint_unique test.
40006 * recog.cc (constrain_operands): Allow relaxed memory
40009 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
40011 * doc/extend.texi (Target Builtins): Add RISC-V Vector
40013 (RISC-V Vector Intrinsics): Document GCC implemented which
40014 version of RISC-V vector intrinsics and its reference.
40016 2023-04-18 Richard Biener <rguenther@suse.de>
40018 PR middle-end/108786
40019 * bitmap.h (bitmap_clear_first_set_bit): New.
40020 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
40021 bitmap_first_set_bit and add optional clearing of the bit.
40022 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
40023 (bitmap_clear_first_set_bit): Likewise.
40024 * df-core.cc (df_worklist_dataflow_doublequeue): Use
40025 bitmap_clear_first_set_bit.
40026 * graphite-scop-detection.cc (scop_detection::merge_sese):
40028 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
40029 (sanitize_asan_mark_poison): Likewise.
40030 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
40031 * tree-into-ssa.cc (rewrite_blocks): Likewise.
40032 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
40033 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
40035 2023-04-18 Richard Biener <rguenther@suse.de>
40037 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
40038 (dump_sa_points_to_info): ... this function.
40039 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
40040 and call dump_sa_stats guarded with TDF_STATS.
40041 (ipa_pta_execute): Likewise.
40042 (compute_may_aliases): Guard dump_alias_info with
40043 TDF_DETAILS|TDF_ALIAS.
40045 2023-04-18 Andrew Pinski <apinski@marvell.com>
40047 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
40048 the expression that is being tried when TDF_FOLDING
40050 (phiopt_worker::match_simplify_replacement): Dump
40051 the sequence which was created by gimple_simplify_phiopt
40052 when TDF_FOLDING is true.
40054 2023-04-18 Andrew Pinski <apinski@marvell.com>
40056 * tree-ssa-phiopt.cc (match_simplify_replacement):
40057 Simplify code that does the movement slightly.
40059 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40061 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
40063 (rev16<mode>2): Rename to...
40064 (aarch64_rev16<mode>2_alt1): ... This.
40065 (rev16<mode>2_alt): Rename to...
40066 (*aarch64_rev16<mode>2_alt2): ... This.
40068 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40070 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
40071 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
40073 * range-op-float.cc (zero_range): Use dconstm0.
40074 (zero_to_inf_range): Same.
40075 * real.h (dconstm0): New.
40076 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
40077 (frange::set_zero): Do not declare dconstm0.
40079 2023-04-18 Richard Biener <rguenther@suse.de>
40081 * system.h (class auto_mpz): New,
40082 * realmpfr.h (class auto_mpfr): Likewise.
40083 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
40084 (do_mpfr_arg2): Likewise.
40085 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
40087 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40089 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
40090 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
40092 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40094 * value-range.cc (frange::operator==): Adjust for NAN.
40095 (range_tests_nan): Remove some NAN tests.
40097 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40099 * inchash.cc (hash::add_real_value): New.
40100 * inchash.h (class hash): Add add_real_value.
40101 * value-range.cc (add_vrange): New.
40102 * value-range.h (inchash::add_vrange): New.
40104 2023-04-18 Richard Biener <rguenther@suse.de>
40106 PR tree-optimization/109539
40107 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
40108 Re-implement pointer relatedness for PHIs.
40110 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
40112 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
40113 (SV_FP): New iterator.
40114 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
40115 (recip<mode>2): Unify the two patterns using SV_FP.
40116 (div_scale<mode><exec_vcc>): New insn.
40117 (div_fmas<mode><exec>): New insn.
40118 (div_fixup<mode><exec>): New insn.
40119 (div<mode>3): Unify the two expanders and rewrite using hardfp.
40120 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
40121 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
40122 and UNSPEC_DIV_FIXUP.
40123 (vccwait): New attribute.
40125 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40127 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
40128 if the argument matches that.
40130 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40132 * config/aarch64/atomics.md
40133 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
40134 Use SD_HSDI for destination mode iterator.
40136 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
40138 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
40139 of z-extensions and s-extensions.
40140 (riscv_subset_list::parse): Likewise.
40142 2023-04-18 Jakub Jelinek <jakub@redhat.com>
40144 PR tree-optimization/109240
40145 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
40146 first vec_perm operand and minus as second using fneg/fadd and
40147 minus as first vec_perm operand and plus as second using fneg/fsub.
40149 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40151 * data-streamer.cc (bp_pack_real_value): New.
40152 (bp_unpack_real_value): New.
40153 * data-streamer.h (bp_pack_real_value): New.
40154 (bp_unpack_real_value): New.
40155 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
40156 bp_unpack_real_value.
40157 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
40158 bp_pack_real_value.
40160 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40162 * wide-int.h (WIDE_INT_MAX_HWIS): New.
40163 (class fixed_wide_int_storage): Use it.
40164 (trailing_wide_ints <N>::set_precision): Use it.
40165 (trailing_wide_ints <N>::extra_size): Use it.
40167 2023-04-18 Xi Ruoyao <xry111@xry111.site>
40169 * config/loongarch/loongarch-protos.h
40170 (loongarch_addu16i_imm12_operand_p): New function prototype.
40171 (loongarch_split_plus_constant): Likewise.
40172 * config/loongarch/loongarch.cc
40173 (loongarch_addu16i_imm12_operand_p): New function.
40174 (loongarch_split_plus_constant): Likewise.
40175 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
40176 (DUAL_IMM12_OPERAND): Likewise.
40177 (DUAL_ADDU16I_OPERAND): Likewise.
40178 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
40180 * config/loongarch/predicates.md (const_dual_imm12_operand): New
40182 (const_addu16i_operand): Likewise.
40183 (const_addu16i_imm12_di_operand): Likewise.
40184 (const_addu16i_imm12_si_operand): Likewise.
40185 (plus_di_operand): Likewise.
40186 (plus_si_operand): Likewise.
40187 (plus_si_extend_operand): Likewise.
40188 * config/loongarch/loongarch.md (add<mode>3): Convert to
40189 define_insn_and_split. Use plus_<mode>_operand predicate
40190 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
40191 and Le constraints.
40192 (*addsi3_extended): Convert to define_insn_and_split. Use
40193 plus_si_extend_operand instead of arith_operand. Add
40194 alternatives for La and Le alternatives.
40196 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40198 * value-range.h (Value_Range::Value_Range): New.
40199 (Value_Range::contains_p): New.
40201 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
40203 * value-range.h (class vrange): Make m_discriminator const.
40204 (class irange): Make m_max_ranges const. Adjust constructors
40206 (class unsupported_range): Construct vrange appropriately.
40207 (class frange): Same.
40209 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
40211 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
40214 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
40216 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
40218 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
40220 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
40222 (riscv_expand_epilogue): Likewise.
40224 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
40226 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
40228 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
40230 2023-04-17 Andrew Pinski <apinski@marvell.com>
40232 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
40235 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
40237 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
40240 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
40242 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
40243 parameter remaining_size.
40244 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
40245 (riscv_expand_prologue): Likewise.
40246 (riscv_expand_epilogue): Likewise.
40248 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
40250 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
40251 roriw for constant counts.
40252 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
40253 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
40254 (simplify_context::simplify_binary_operation_1): Use it.
40255 * expmed.cc (expand_shift_1): Likewise.
40257 2023-04-17 Martin Jambor <mjambor@suse.cz>
40261 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
40262 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
40263 (ipa_zap_jf_refdesc): New function.
40264 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
40265 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
40266 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
40267 the new parameter of find_reference.
40268 (adjust_references_in_caller): Likewise. Make sure the constant jump
40269 function is not used to decrement a refdec counter again. Only
40270 decrement refdesc counters when the pass_through jump function allows
40271 it. Added a detailed dump when decrementing refdesc counters.
40272 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
40273 (ipa_set_jf_simple_pass_through): Initialize the new flag.
40274 (ipa_set_jf_unary_pass_through): Likewise.
40275 (ipa_set_jf_arith_pass_through): Likewise.
40276 (remove_described_reference): Provide a value for the new parameter of
40278 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
40279 the previous pass_through had a flag mandating that we do so.
40280 (propagate_controlled_uses): Likewise. Only decrement refdesc
40281 counters when the pass_through jump function allows it.
40282 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
40283 parameter of find_reference.
40284 (ipa_write_jump_function): Assert the new flag does not have to be
40286 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
40289 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
40290 Di Zhao <di.zhao@amperecomputing.com>
40292 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
40293 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
40294 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
40295 Check for the above tuning option when processing loads.
40297 2023-04-17 Richard Biener <rguenther@suse.de>
40299 PR tree-optimization/109524
40300 * tree-vrp.cc (remove_unreachable::m_list): Change to a
40301 vector of pairs of block indices.
40302 (remove_unreachable::maybe_register_block): Adjust.
40303 (remove_unreachable::remove_and_update_globals): Likewise.
40304 Deal with removed blocks.
40306 2023-04-16 Jeff Law <jlaw@ventanamicro>
40309 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
40310 TARGET_SFB_ALU, force the true arm into a register.
40312 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
40315 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
40316 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
40318 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
40319 (pa_function_arg_size): Change return type to int. Return zero
40320 for arguments larger than 1 GB. Update comments.
40322 2023-04-15 Jakub Jelinek <jakub@redhat.com>
40324 PR tree-optimization/109154
40325 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
40326 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
40328 2023-04-15 Jason Merrill <jason@redhat.com>
40331 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
40332 Overhaul lhs_ref.ref analysis.
40334 2023-04-14 Richard Biener <rguenther@suse.de>
40336 PR tree-optimization/109502
40337 * tree-vect-stmts.cc (vectorizable_assignment): Fix
40338 check for conversion between mask and non-mask types.
40340 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
40341 Jakub Jelinek <jakub@redhat.com>
40345 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
40346 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
40347 smaller than word_mode.
40348 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
40349 <case AND>: Likewise.
40351 2023-04-14 Jakub Jelinek <jakub@redhat.com>
40353 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
40356 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
40358 PR tree-optimization/108139
40359 PR tree-optimization/109462
40360 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
40361 equivalency check for PHI nodes.
40362 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
40363 does not dominate single-arg equivalency edges.
40365 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
40368 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
40369 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
40371 2023-04-13 Richard Biener <rguenther@suse.de>
40373 PR tree-optimization/109491
40374 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
40375 NULL operands test.
40377 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40380 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
40381 (vint16mf4_t): Ditto.
40382 (vint32mf2_t): Ditto.
40383 (vint64m1_t): Ditto.
40384 (vint64m2_t): Ditto.
40385 (vint64m4_t): Ditto.
40386 (vint64m8_t): Ditto.
40387 (vuint8mf8_t): Ditto.
40388 (vuint16mf4_t): Ditto.
40389 (vuint32mf2_t): Ditto.
40390 (vuint64m1_t): Ditto.
40391 (vuint64m2_t): Ditto.
40392 (vuint64m4_t): Ditto.
40393 (vuint64m8_t): Ditto.
40394 (vfloat32mf2_t): Ditto.
40395 (vbool64_t): Ditto.
40396 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
40397 (register_vector_type): Ditto.
40398 (check_required_extensions): Fix condition.
40399 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
40400 (RVV_REQUIRE_ELEN_64): New define.
40401 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
40402 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
40403 (TARGET_VECTOR_FP64): Ditto.
40404 (ENTRY): Fix predicate.
40405 * config/riscv/vector-iterators.md: Fix predicate.
40407 2023-04-12 Jakub Jelinek <jakub@redhat.com>
40409 PR tree-optimization/109410
40410 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
40411 block if first statement of the function is a call to returns_twice
40414 2023-04-12 Jakub Jelinek <jakub@redhat.com>
40417 * config/i386/i386.cc: Include rtl-error.h.
40418 (ix86_print_operand): For z modifier warning, use warning_for_asm
40419 if this_is_asm_operands. For Z modifier errors, use %c and code
40420 instead of hardcoded Z.
40422 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
40424 * config/i386/x-mingw32-utf8: Remove extrataneous $@
40426 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
40428 PR tree-optimization/109462
40429 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
40430 check for equivalences if NAME is a phi node.
40432 2023-04-12 Richard Biener <rguenther@suse.de>
40434 PR tree-optimization/109473
40435 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
40436 Convert scalar result to the computation type before performing
40437 the reduction adjustment.
40439 2023-04-12 Richard Biener <rguenther@suse.de>
40441 PR tree-optimization/109469
40442 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
40443 a returns-twice call.
40445 2023-04-12 Richard Biener <rguenther@suse.de>
40447 PR tree-optimization/109434
40448 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
40449 handle possibly throwing calls when processing the LHS
40450 and may-defs are not OK.
40452 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
40454 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
40455 predicate to avoid splitting arith constants.
40457 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
40458 Pan Li <pan2.li@intel.com>
40459 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40460 Kito Cheng <kito.cheng@sifive.com>
40463 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
40464 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
40465 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
40466 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
40467 (riscv_zero_call_used_regs): New.
40468 (TARGET_ZERO_CALL_USED_REGS): New.
40470 2023-04-11 Martin Liska <mliska@suse.cz>
40473 * opts.cc (finish_options): Drop also
40474 x_flag_var_tracking_assignments.
40476 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
40478 PR tree-optimization/108888
40479 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
40481 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
40484 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
40485 (vsx_sign_extend_v16qi_<mode>): ... this.
40486 (vsx_sign_extend_hi_<mode>): Rename to...
40487 (vsx_sign_extend_v8hi_<mode>): ... this.
40488 (vsx_sign_extend_si_v2di): Rename to...
40489 (vsx_sign_extend_v4si_v2di): ... this.
40490 (vsignextend_qi_<mode>): Remove.
40491 (vsignextend_hi_<mode>): Remove.
40492 (vsignextend_si_v2di): Remove.
40493 (vsignextend_v2di_v1ti): Remove.
40494 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
40495 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
40496 with gen_vsx_sign_extend_v16qi_v4si.
40497 * config/rs6000/rs6000.md (split for DI constant generation):
40498 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
40499 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
40500 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
40501 with gen_vsx_sign_extend_v16qi_si.
40502 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
40503 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
40504 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
40505 vsx_sign_extend_v16qi_v4si.
40506 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
40507 vsx_sign_extend_v8hi_v2di.
40508 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
40509 vsx_sign_extend_v8hi_v4si.
40510 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
40511 vsx_sign_extend_si_v2di.
40512 (__builtin_altivec_vsignext): Set bif-pattern to
40513 vsx_sign_extend_v2di_v1ti.
40514 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
40515 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
40516 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
40517 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
40519 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
40522 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
40523 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
40525 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
40527 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
40529 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
40531 * common/config/i386/cpuinfo.h (get_available_features):
40532 Detect AMX-COMPLEX.
40533 * common/config/i386/i386-common.cc
40534 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
40535 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
40536 (ix86_handle_option): Handle -mamx-complex.
40537 * common/config/i386/i386-cpuinfo.h (enum processor_features):
40538 Add FEATURE_AMX_COMPLEX.
40539 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
40541 * config.gcc: Add amxcomplexintrin.h.
40542 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
40543 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
40545 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
40546 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
40547 Handle amx-complex.
40548 * config/i386/i386.opt: Add option -mamx-complex.
40549 * config/i386/immintrin.h: Include amxcomplexintrin.h.
40550 * doc/extend.texi: Document amx-complex.
40551 * doc/invoke.texi: Document -mamx-complex.
40552 * doc/sourcebuild.texi: Document target amx-complex.
40553 * config/i386/amxcomplexintrin.h: New file.
40555 2023-04-08 Jakub Jelinek <jakub@redhat.com>
40557 PR tree-optimization/109392
40558 * tree-vect-generic.cc (tree_vec_extract): Handle failure
40559 of maybe_push_res_to_seq better.
40561 2023-04-08 Jakub Jelinek <jakub@redhat.com>
40563 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
40565 (SYSTEM_H): Depend on $(HASHTAB_H).
40566 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
40567 dependency on $(RTL_BASE_H), remove redundant dependency on
40570 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
40573 * config/arm/arm.cc (arm_effective_regno): New function.
40574 (mve_vector_mem_operand): Use it.
40576 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
40578 PR tree-optimization/109417
40579 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
40580 dependency is in SSA_NAME_FREE_LIST.
40582 2023-04-06 Andrew Pinski <apinski@marvell.com>
40584 PR tree-optimization/109427
40585 * params.opt (-param=vect-induction-float=):
40586 Fix option attribute typo for IntegerRange.
40588 2023-04-05 Jeff Law <jlaw@ventanamicro>
40591 * combine.cc (combine_instructions): Force re-recognition when
40592 after restoring the body of an insn to its original form.
40594 2023-04-05 Martin Jambor <mjambor@suse.cz>
40597 * ipa-sra.cc (zap_useless_ipcp_results): New function.
40598 (process_isra_node_results): Call it.
40600 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40602 * config/riscv/vector.md: Fix incorrect operand order.
40604 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40606 * config/riscv/riscv-vsetvl.cc
40607 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
40610 2023-04-05 Li Xu <xuli1@eswincomputing.com>
40612 * config/riscv/riscv-vector-builtins.def: Fix typo.
40613 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
40614 * config/riscv/vector-iterators.md: Ditto.
40616 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
40618 * doc/md.texi (Including Patterns): Fix page break.
40620 2023-04-04 Jakub Jelinek <jakub@redhat.com>
40622 PR tree-optimization/109386
40623 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
40624 foperator_le::op1_range, foperator_le::op2_range,
40625 foperator_gt::op1_range, foperator_gt::op2_range,
40626 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
40627 BRS_FALSE case even if the other op is maybe_isnan, not just
40629 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
40630 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
40631 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
40632 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
40633 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
40634 not just known_isnan.
40636 2023-04-04 Marek Polacek <polacek@redhat.com>
40638 PR sanitizer/109107
40639 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
40641 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
40643 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
40645 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
40646 (mve_vcreateq_f<mode>): Swap operands.
40648 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
40650 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
40652 2023-04-04 Jakub Jelinek <jakub@redhat.com>
40655 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
40656 Reword diagnostics about zfinx conflict with f, formatting fixes.
40658 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
40660 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
40662 2023-04-04 Richard Biener <rguenther@suse.de>
40664 PR tree-optimization/109304
40665 * tree-profile.cc (tree_profiling): Use symtab node
40666 availability to decide whether to skip adjusting calls.
40667 Do not adjust calls to internal functions.
40669 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
40672 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
40673 function for permutation control vector by considering big endianness.
40675 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
40678 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
40679 (rs6000_vprtyb<mode>2): ... this.
40680 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
40681 rs6000_vprtybv2di2.
40682 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
40683 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
40684 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
40685 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
40687 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
40688 Sandra Loosemore <sandra@codesourcery.com>
40690 * doc/md.texi (Insn Splitting): Tweak wording for readability.
40692 2023-04-03 Martin Jambor <mjambor@suse.cz>
40695 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
40696 offset + size will be representable in unsigned int.
40698 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
40700 * configure.ac (ZSTD_LIB): Move before zstd.h check.
40701 Unset gcc_cv_header_zstd_h without libzstd.
40702 * configure: Regenerate.
40704 2023-04-03 Martin Liska <mliska@suse.cz>
40706 * doc/invoke.texi: Document new param.
40708 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
40710 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
40711 new check_effective_target function.
40713 2023-04-03 Li Xu <xuli1@eswincomputing.com>
40715 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
40716 (vfloat32m8_t): Likewise
40718 2023-04-03 liuhongt <hongtao.liu@intel.com>
40720 * doc/md.texi: Document signbitm2.
40722 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40723 kito-cheng <kito.cheng@sifive.com>
40725 * config/riscv/vector.md: Fix RA constraint.
40727 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40729 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
40730 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
40731 * config/riscv/vector.md: Fix scalar move bug.
40733 2023-04-01 Jakub Jelinek <jakub@redhat.com>
40735 * range-op-float.cc (foperator_equal::fold_range): If at least
40736 one of the op ranges is not singleton and neither is NaN and all
40737 4 bounds are zero, return [1, 1].
40738 (foperator_not_equal::fold_range): In the same case return [0, 0].
40740 2023-04-01 Jakub Jelinek <jakub@redhat.com>
40742 * range-op-float.cc (foperator_equal::fold_range): Perform the
40743 non-singleton handling regardless of maybe_isnan (op1, op2).
40744 (foperator_not_equal::fold_range): Likewise.
40745 (foperator_lt::fold_range, foperator_le::fold_range,
40746 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
40747 real_* comparison check which results in range_false (type)
40748 even if maybe_isnan (op1, op2). Simplify.
40749 (foperator_ltgt): New class.
40750 (fop_ltgt): New variable.
40751 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
40754 2023-04-01 Jakub Jelinek <jakub@redhat.com>
40757 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
40758 returns VOIDmode, handle it like if the register isn't used for
40759 passing arguments at all.
40760 (apply_result_size): If targetm.calls.get_raw_result_mode returns
40761 VOIDmode, handle it like if the register isn't used for returning
40763 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
40764 means to return VOIDmode.
40765 * doc/tm.texi: Regenerated.
40766 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
40767 TARGET_SVE for P0_REGNUM.
40768 (aarch64_function_arg_regno_p): Also return true for p0-p3.
40769 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
40771 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
40773 * lra-constraints.cc: (combine_reload_insn): New function.
40775 2023-03-31 Jakub Jelinek <jakub@redhat.com>
40777 PR tree-optimization/91645
40778 * range-op-float.cc (foperator_unordered_lt::fold_range,
40779 foperator_unordered_le::fold_range,
40780 foperator_unordered_gt::fold_range,
40781 foperator_unordered_ge::fold_range,
40782 foperator_unordered_equal::fold_range): Call the ordered
40783 fold_range on ranges with cleared NaNs.
40784 * value-query.cc (range_query::get_tree_range): Handle also
40785 COMPARISON_CLASS_P trees.
40787 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
40788 Andrew Pinski <pinskia@gmail.com>
40791 * config/riscv/t-riscv: Add missing dependencies.
40793 2023-03-31 liuhongt <hongtao.liu@intel.com>
40795 * config/i386/i386.cc (inline_memory_move_cost): Return 100
40796 for MASK_REGS when MODE_SIZE > 8.
40798 2023-03-31 liuhongt <hongtao.liu@intel.com>
40801 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
40802 ufloat/ufix to floatuns/fixuns.
40803 * config/i386/i386-expand.cc
40804 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
40805 * config/i386/sse.md
40806 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
40808 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
40809 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
40811 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
40813 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
40815 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
40816 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
40817 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
40818 (ufloatv2siv2df2<mask_name>): Renamed to ..
40819 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
40820 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
40822 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
40824 (ufix_notruncv2dfv2si2): Renamed to ..
40825 (fixuns_notruncv2dfv2si2):.. this.
40826 (ufix_notruncv2dfv2si2_mask): Renamed to ..
40827 (fixuns_notruncv2dfv2si2_mask): .. this.
40828 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
40829 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
40830 (ufix_truncv2dfv2si2): Renamed to ..
40831 (*fixuns_truncv2dfv2si2): .. this.
40832 (ufix_truncv2dfv2si2_mask): Renamed to ..
40833 (fixuns_truncv2dfv2si2_mask): .. this.
40834 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
40835 (*fixuns_truncv2dfv2si2_mask_1): .. this.
40836 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
40837 (fixuns_truncv4dfv4si2<mask_name>): .. this.
40838 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
40840 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
40842 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
40843 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
40846 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
40848 PR tree-optimization/109154
40849 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
40850 * gimple-range-gori.h (may_recompute_p): Add depth param.
40851 * params.opt (ranger-recompute-depth): New param.
40853 2023-03-30 Jason Merrill <jason@redhat.com>
40857 * cgraph.h: Move reset() from cgraph_node to symtab_node.
40858 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
40859 remove_from_same_comdat_group.
40861 2023-03-30 Richard Biener <rguenther@suse.de>
40863 PR tree-optimization/107561
40864 * gimple-ssa-warn-access.cc (get_size_range): Add flags
40865 argument and pass it on.
40866 (check_access): When querying for the size range pass
40867 SR_ALLOW_ZERO when the known destination size is zero.
40869 2023-03-30 Richard Biener <rguenther@suse.de>
40871 PR tree-optimization/109342
40872 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
40873 overload for edge. When that edge is a backedge use
40874 dominated_by_p directly.
40876 2023-03-30 liuhongt <hongtao.liu@intel.com>
40878 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
40879 vpblendd instead of vpblendw for V4SI under avx2.
40881 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
40883 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
40884 for many quick operands, for register-sized modes.
40886 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
40888 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
40891 2023-03-29 Martin Liska <mliska@suse.cz>
40893 PR bootstrap/109310
40894 * configure.ac: Emit a warning for deprecated option
40895 --enable-link-mutex.
40896 * configure: Regenerate.
40898 2023-03-29 Richard Biener <rguenther@suse.de>
40900 PR tree-optimization/109331
40901 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
40902 discover a taken edge make sure to cleanup the CFG.
40904 2023-03-29 Richard Biener <rguenther@suse.de>
40906 PR tree-optimization/109327
40907 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
40908 already removed stmts when draining to_remove.
40910 2023-03-29 Richard Biener <rguenther@suse.de>
40913 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
40914 so we can re-create the DIE for the type if required.
40916 2023-03-29 Jakub Jelinek <jakub@redhat.com>
40917 Richard Biener <rguenther@suse.de>
40919 PR tree-optimization/109301
40920 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
40921 properties_provided from PROP_gimple_opt_math to 0.
40922 (pass_data_expand_powcabs): Change properties_provided from 0 to
40923 PROP_gimple_opt_math.
40925 2023-03-29 Richard Biener <rguenther@suse.de>
40927 PR tree-optimization/109154
40928 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
40929 inverted condition specially by inverting at the caller.
40930 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
40932 2023-03-28 David Malcolm <dmalcolm@redhat.com>
40935 * diagnostic-show-locus.cc (column_range::column_range): Factor
40936 out assertion conditional into...
40937 (column_range::valid_p): ...this new function.
40938 (line_corrections::add_hint): Don't attempt to consolidate hints
40939 if it would lead to invalid column_range instances.
40941 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
40944 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
40945 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
40948 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
40950 PR rtl-optimization/109187
40951 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
40952 subtraction in three-way comparison.
40954 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
40956 PR tree-optimization/109265
40957 PR tree-optimization/109274
40958 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
40959 not create a relation record is op1 and op2 are the same symbol.
40960 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
40961 handler for this stmt, but create a new record only if this statement
40962 generates a relation based on the ranges.
40963 (gori_compute::compute_operand2_range): Ditto.
40964 * value-relation.h (value_relation::set_relation): Always create the
40965 record that is requested.
40967 2023-03-28 Richard Biener <rguenther@suse.de>
40969 PR tree-optimization/107087
40970 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
40971 executable regions to avoid useless work and to better
40972 propagate degenerate PHIs.
40974 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
40976 * config/i386/x-mingw32-utf8: update comments.
40978 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
40981 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
40982 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
40984 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
40986 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
40987 after inlining. Record which decls are loaded from. Fix handling
40988 of vops for loads and stores.
40989 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
40990 (aarch64_accesses_vector_load_decl_p): Likewise.
40991 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
40993 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
40994 that loads from a decl, treat vector stores to those decls as
40996 (aarch64_vector_costs::finish_cost): ...and in that case,
40997 if the vector code does nothing more than a store, give the
40998 prologue a zero cost as well.
41000 2023-03-28 Richard Biener <rguenther@suse.de>
41003 PR tree-optimization/108129
41004 * genmatch.cc (lower_for): For (match ...) delay
41005 substituting into the match operator if possible.
41006 (dt_operand::gen_gimple_expr): For user_id look at the
41007 first substitute for determining how to access operands.
41008 (dt_operand::gen_generic_expr): Likewise.
41009 (dt_node::gen_kids): Properly sort user_ids according
41010 to their substitutes.
41011 (dt_node::gen_kids_1): Code-generate user_id matching.
41013 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41014 Jonathan Wakely <jwakely@redhat.com>
41016 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
41017 Use subcommand rather than sub-command in function comments.
41019 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41021 PR tree-optimization/109154
41022 * value-range.h (frange::flush_denormals_to_zero): Make it public
41023 rather than private.
41024 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
41026 * range-op-float.cc (range_operator_float::fold_range): Call
41027 flush_denormals_to_zero.
41029 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41031 PR middle-end/106190
41032 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
41033 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
41035 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41037 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
41038 as 4th argument to set to avoid clear_nan and union_ calls.
41040 2023-03-28 Jakub Jelinek <jakub@redhat.com>
41043 * config/i386/i386.cc (assign_386_stack_local): For DImode
41044 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
41045 align 32 rather than 0 to assign_stack_local.
41047 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
41050 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
41051 on operand #3 to get the final condition code. Use std::swap.
41052 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
41053 (fucmp<gcond:code>8<P:mode>_vis): Move around.
41054 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
41055 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
41057 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
41059 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
41060 top-level sections.
41062 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
41064 * config.host: Pull in i386/x-mingw32-utf8 Makefile
41065 fragment and reference utf8rc-mingw32.o explicitly
41067 * config/i386/sym-mingw32.cc: prevent name mangling of
41069 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
41070 depend on manifest file explicitly.
41072 2023-03-28 Richard Biener <rguenther@suse.de>
41075 2023-03-27 Richard Biener <rguenther@suse.de>
41077 PR rtl-optimization/109237
41078 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
41080 2023-03-28 Richard Biener <rguenther@suse.de>
41082 * common.opt (gdwarf): Remove Negative(gdwarf-).
41084 2023-03-28 Richard Biener <rguenther@suse.de>
41086 * common.opt (gdwarf): Add RejectNegative.
41087 (gdwarf-): Likewise.
41091 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41093 * config/cris/constraints.md ("T"): Correct to
41094 define_memory_constraint.
41096 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41098 * config/cris/cris.md (BW2): New mode-iterator.
41099 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
41102 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41104 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
41105 for possible eliminable compares.
41107 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
41109 * config/cris/constraints.md ("R"): Remove unused constraint.
41111 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
41113 PR gcov-profile/109297
41114 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
41115 (merge_stream_usage): Likewise.
41116 (overlap_usage): Likewise.
41118 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
41121 * config/riscv/thead.md: Add missing mode specifiers.
41123 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
41124 Jiangning Liu <jiangning.liu@amperecomputing.com>
41125 Manolis Tsamis <manolis.tsamis@vrull.eu>
41127 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
41129 2023-03-27 Richard Biener <rguenther@suse.de>
41131 PR rtl-optimization/109237
41132 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
41134 2023-03-27 Richard Biener <rguenther@suse.de>
41137 * lto-wrapper.cc (run_gcc): Parse alternate debug options
41138 as well, they always enable debug.
41140 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
41143 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
41145 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
41147 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
41150 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
41151 than zero when calling vec_sld.
41152 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
41153 zero when calling vec_sld.
41154 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
41155 than zero when calling vec_sld.
41157 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
41159 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
41160 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
41161 loops are represented and which fields are vectors. Add
41162 documentation for OMP_FOR_PRE_BODY field. Document internal
41163 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
41164 * tree.def (OMP_FOR): Make documentation consistent with the
41165 Texinfo manual, to fill some gaps and correct errors.
41167 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
41170 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
41171 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
41172 (handle_move_double): Call it before handle_movsi.
41173 * config/m68k/m68k-protos.h: Declare it.
41175 2023-03-26 Jakub Jelinek <jakub@redhat.com>
41177 PR tree-optimization/109230
41178 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
41180 2023-03-26 Jakub Jelinek <jakub@redhat.com>
41183 * predict.cc (compute_function_frequency): Don't call
41184 warn_function_cold if function already has cold attribute.
41186 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
41188 * doc/install.texi: Remove anachronistic note
41189 related to languages built and separate source tarballs.
41191 2023-03-25 David Malcolm <dmalcolm@redhat.com>
41194 * diagnostic-format-sarif.cc (read_until_eof): Delete.
41195 (maybe_read_file): Delete.
41196 (sarif_builder::maybe_make_artifact_content_object): Use
41197 get_source_file_content rather than maybe_read_file.
41198 Reject it if it's not valid UTF-8.
41199 * input.cc (file_cache_slot::get_full_file_content): New.
41200 (get_source_file_content): New.
41201 (selftest::check_cpp_valid_utf8_p): New.
41202 (selftest::test_cpp_valid_utf8_p): New.
41203 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
41204 * input.h (get_source_file_content): New prototype.
41206 2023-03-24 David Malcolm <dmalcolm@redhat.com>
41208 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
41210 (Special Functions for Debugging the Analyzer): Convert to a
41211 table, and rewrite in places.
41212 (Other Debugging Techniques): Add notes on how to compare two
41213 different exploded graphs.
41215 2023-03-24 David Malcolm <dmalcolm@redhat.com>
41218 * json.cc: Update comments to indicate that we now preserve
41219 insertion order of keys within objects.
41220 (object::print): Traverse keys in insertion order.
41221 (object::set): Preserve insertion order of keys.
41222 (selftest::test_writing_objects): Add an additional key to verify
41223 that we preserve insertion order.
41224 * json.h (object::m_keys): New field.
41226 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
41228 PR tree-optimization/109238
41229 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
41230 predecessors which this block dominates.
41232 2023-03-24 Richard Biener <rguenther@suse.de>
41234 PR tree-optimization/106912
41235 * tree-profile.cc (tree_profiling): Update stmts only when
41236 profiling or testing coverage. Make sure to update calls
41237 fntype, stripping 'const' there.
41239 2023-03-24 Jakub Jelinek <jakub@redhat.com>
41241 PR middle-end/109258
41242 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
41243 if target == const0_rtx.
41245 2023-03-24 Alexandre Oliva <oliva@adacore.com>
41247 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
41248 Document options and effective targets.
41250 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
41252 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
41255 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
41257 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
41258 non-earlyclobber alternative.
41260 2023-03-23 Andrew Pinski <apinski@marvell.com>
41263 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
41266 2023-03-23 Richard Biener <rguenther@suse.de>
41268 PR tree-optimization/107569
41269 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
41270 Do not push SSA names with zero uses as available leader.
41271 (process_bb): Likewise.
41273 2023-03-23 Richard Biener <rguenther@suse.de>
41275 PR tree-optimization/109262
41276 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
41277 combining a piecewise complex load avoid touching loads
41278 that throw internally. Use fun, not cfun throughout.
41280 2023-03-23 Jakub Jelinek <jakub@redhat.com>
41282 * value-range.cc (irange::irange_union, irange::intersect): Fix
41283 comment spelling bugs.
41284 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
41285 * gimple-range-trace.h: Likewise.
41286 * gimple-range-edge.cc: Likewise.
41287 (gimple_outgoing_range_stmt_p,
41288 gimple_outgoing_range::switch_edge_range,
41289 gimple_outgoing_range::edge_range_p): Likewise.
41290 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
41291 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
41292 assume_query::assume_query, assume_query::calculate_phi): Likewise.
41293 * gimple-range-edge.h: Likewise.
41294 * value-range.h (Value_Range::set, Value_Range::lower_bound,
41295 Value_Range::upper_bound, frange::set_undefined): Likewise.
41296 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
41297 gori_compute): Likewise.
41298 * gimple-range-fold.h (fold_using_range): Likewise.
41299 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
41301 * gimple-range-gori.cc (range_def_chain::in_chain_p,
41302 range_def_chain::dump, gori_map::calculate_gori,
41303 gori_compute::compute_operand_range_switch,
41304 gori_compute::logical_combine, gori_compute::refine_using_relation,
41305 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
41307 * gimple-range.h: Likewise.
41308 (enable_ranger): Likewise.
41309 * range-op.h (empty_range_varying): Likewise.
41310 * value-query.h (value_query): Likewise.
41311 * gimple-range-cache.cc (block_range_cache::set_bb_range,
41312 block_range_cache::dump, ssa_global_cache::clear_global_range,
41313 temporal_cache::temporal_value, temporal_cache::current_p,
41314 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
41315 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
41317 * gimple-range-fold.cc (fur_edge::get_phi_operand,
41318 fur_stmt::get_operand, gimple_range_adjustment,
41319 fold_using_range::range_of_phi,
41320 fold_using_range::relation_fold_and_or): Likewise.
41321 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
41322 * value-query.cc (range_query::value_of_expr,
41323 range_query::value_on_edge, range_query::query_relation): Likewise.
41324 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
41325 intersect_range_with_nonzero_bits): Likewise.
41326 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
41327 exit_range): Likewise.
41328 * value-relation.h: Likewise.
41329 (equiv_oracle, relation_trio::relation_trio, value_relation,
41330 value_relation::value_relation, pe_min): Likewise.
41331 * range-op-float.cc (range_operator_float::rv_fold,
41332 frange_arithmetic, foperator_unordered_equal::op1_range,
41333 foperator_div::rv_fold): Likewise.
41334 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
41335 * value-relation.cc (equiv_oracle::query_relation,
41336 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
41337 value_relation::apply_transitive, relation_chain_head::find_relation,
41338 dom_oracle::query_relation, dom_oracle::find_relation_block,
41339 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
41340 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
41341 create_possibly_reversed_range, adjust_op1_for_overflow,
41342 operator_mult::wi_fold, operator_exact_divide::op1_range,
41343 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
41344 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
41345 range_op_lshift_tests): Likewise.
41347 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
41349 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
41350 (move_callee_saved_registers): Detect the bug condition early.
41352 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
41354 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
41355 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
41357 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
41358 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
41359 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
41360 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
41361 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
41363 2023-03-23 Jakub Jelinek <jakub@redhat.com>
41365 PR tree-optimization/109176
41366 * tree-vect-generic.cc (expand_vector_condition): If a has
41367 vector boolean type and is a comparison, also check if both
41368 the comparison and VEC_COND_EXPR could be successfully expanded
41371 2023-03-23 Pan Li <pan2.li@intel.com>
41372 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41376 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
41377 for vector mask modes.
41378 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
41379 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
41381 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
41383 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
41385 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41388 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
41389 (emit_vlmax_op): Ditto.
41390 * config/riscv/riscv-v.cc (get_sew): New function.
41391 (emit_vlmax_vsetvl): Adapt function.
41392 (emit_pred_op): Ditto.
41393 (emit_vlmax_op): Ditto.
41394 (emit_nonvlmax_op): Ditto.
41395 (legitimize_move): Fix LRA ICE.
41396 (gen_no_side_effects_vsetvl_rtx): Adapt function.
41397 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
41398 (@mov<VB:mode><P:mode>_lra): Ditto.
41399 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
41400 (*mov<VB:mode><P:mode>_lra): Ditto.
41402 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41405 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
41406 __riscv_vlenb support.
41408 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41409 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
41410 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
41412 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41413 * config/riscv/riscv-vector-builtins.cc: Ditto.
41415 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41416 kito-cheng <kito.cheng@sifive.com>
41418 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
41419 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
41420 (pass_vsetvl::need_vsetvl): Fix bugs.
41421 (pass_vsetvl::backward_demand_fusion): Fix bugs.
41422 (pass_vsetvl::demand_fusion): Fix bugs.
41423 (eliminate_insn): Fix bugs.
41424 (insert_vsetvl): Ditto.
41425 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
41426 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
41427 * config/riscv/vector.md: Ditto.
41429 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41430 kito-cheng <kito.cheng@sifive.com>
41432 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
41433 * config/riscv/vector-iterators.md (nmsac): Ditto.
41439 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
41440 (@pred_mul_plus<mode>): Ditto.
41441 (*pred_madd<mode>): Ditto.
41442 (*pred_macc<mode>): Ditto.
41443 (*pred_mul_plus<mode>): Ditto.
41444 (@pred_mul_plus<mode>_scalar): Ditto.
41445 (*pred_madd<mode>_scalar): Ditto.
41446 (*pred_macc<mode>_scalar): Ditto.
41447 (*pred_mul_plus<mode>_scalar): Ditto.
41448 (*pred_madd<mode>_extended_scalar): Ditto.
41449 (*pred_macc<mode>_extended_scalar): Ditto.
41450 (*pred_mul_plus<mode>_extended_scalar): Ditto.
41451 (@pred_minus_mul<mode>): Ditto.
41452 (*pred_<madd_nmsub><mode>): Ditto.
41453 (*pred_nmsub<mode>): Ditto.
41454 (*pred_<macc_nmsac><mode>): Ditto.
41455 (*pred_nmsac<mode>): Ditto.
41456 (*pred_mul_<optab><mode>): Ditto.
41457 (*pred_minus_mul<mode>): Ditto.
41458 (@pred_mul_<optab><mode>_scalar): Ditto.
41459 (@pred_minus_mul<mode>_scalar): Ditto.
41460 (*pred_<madd_nmsub><mode>_scalar): Ditto.
41461 (*pred_nmsub<mode>_scalar): Ditto.
41462 (*pred_<macc_nmsac><mode>_scalar): Ditto.
41463 (*pred_nmsac<mode>_scalar): Ditto.
41464 (*pred_mul_<optab><mode>_scalar): Ditto.
41465 (*pred_minus_mul<mode>_scalar): Ditto.
41466 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
41467 (*pred_nmsub<mode>_extended_scalar): Ditto.
41468 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
41469 (*pred_nmsac<mode>_extended_scalar): Ditto.
41470 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
41471 (*pred_minus_mul<mode>_extended_scalar): Ditto.
41472 (*pred_<madd_msub><mode>): Ditto.
41473 (*pred_<macc_msac><mode>): Ditto.
41474 (*pred_<madd_msub><mode>_scalar): Ditto.
41475 (*pred_<macc_msac><mode>_scalar): Ditto.
41476 (@pred_neg_mul_<optab><mode>): Ditto.
41477 (@pred_mul_neg_<optab><mode>): Ditto.
41478 (*pred_<nmadd_msub><mode>): Ditto.
41479 (*pred_<nmsub_nmadd><mode>): Ditto.
41480 (*pred_<nmacc_msac><mode>): Ditto.
41481 (*pred_<nmsac_nmacc><mode>): Ditto.
41482 (*pred_neg_mul_<optab><mode>): Ditto.
41483 (*pred_mul_neg_<optab><mode>): Ditto.
41484 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
41485 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
41486 (*pred_<nmadd_msub><mode>_scalar): Ditto.
41487 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
41488 (*pred_<nmacc_msac><mode>_scalar): Ditto.
41489 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
41490 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
41491 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
41492 (@pred_widen_neg_mul_<optab><mode>): Ditto.
41493 (@pred_widen_mul_neg_<optab><mode>): Ditto.
41494 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
41495 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
41497 2023-03-23 liuhongt <hongtao.liu@intel.com>
41499 * builtins.cc (builtin_memset_read_str): Replace
41500 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
41501 (builtin_memset_gen_str): Ditto.
41502 * config/i386/i386-expand.cc
41503 (ix86_convert_const_wide_int_to_broadcast): Replace
41504 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
41505 (ix86_expand_vector_move): Ditto.
41506 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
41508 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
41509 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
41510 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
41511 * doc/tm.texi.in: Ditto.
41512 * target.def: Ditto.
41514 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
41516 * lra.cc (lra): Do not repeat inheritance and live range splitting
41517 when asm error is found.
41519 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
41521 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
41522 (gcn_expand_dpp_distribute_even_insn)
41523 (gcn_expand_dpp_distribute_odd_insn): Declare.
41524 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
41525 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
41526 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
41527 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
41528 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
41529 (fms<mode>4_negop2): New patterns.
41530 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
41531 (gcn_expand_dpp_distribute_even_insn)
41532 (gcn_expand_dpp_distribute_odd_insn): New functions.
41533 * config/gcn/gcn.md: Add entries to unspec enum.
41535 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
41537 PR tree-optimization/109008
41538 * value-range.cc (frange::set): Add nan_state argument.
41539 * value-range.h (class nan_state): New.
41540 (frange::get_nan_state): New.
41542 2023-03-22 Martin Liska <mliska@suse.cz>
41544 * configure: Regenerate.
41546 2023-03-21 Joseph Myers <joseph@codesourcery.com>
41548 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
41551 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
41553 PR tree-optimization/109192
41554 * gimple-range-gori.cc (gori_compute::compute_operand_range):
41555 Terminate gori calculations if a relation is not relevant.
41556 * value-relation.h (value_relation::set_relation): Allow
41557 equality between op1 and op2 if they are the same.
41559 2023-03-21 Richard Biener <rguenther@suse.de>
41561 PR tree-optimization/109219
41562 * tree-vect-loop.cc (vectorizable_reduction): Check
41563 slp_node, not STMT_SLP_TYPE.
41564 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
41565 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
41566 Remove assertion on STMT_SLP_TYPE.
41568 2023-03-21 Jakub Jelinek <jakub@redhat.com>
41570 PR tree-optimization/109215
41571 * tree.h (enum special_array_member): Adjust comments for int_0
41573 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
41574 has zero sized element type and the array has variable number of
41575 elements or constant one or more elements.
41576 (component_ref_size): Adjust comments, formatting fix.
41578 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41580 * configure.ac: Add check for the Texinfo 6.8
41581 CONTENTS_OUTPUT_LOCATION customization variable and set it if
41583 * configure: Regenerate.
41584 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
41585 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
41586 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
41587 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
41589 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41591 * doc/extend.texi: Associate use_hazard_barrier_return index
41592 entry with its attribute.
41593 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
41596 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41598 * doc/implement-c.texi: Remove usage of @gol.
41599 * doc/invoke.texi: Ditto.
41600 * doc/sourcebuild.texi: Ditto.
41601 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
41602 texinfo.tex versions, the bug it was working around appears to
41605 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41607 * doc/include/texinfo.tex: Update to 2023-01-17.19.
41609 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41611 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
41612 @enddefbuiltin for defining built-in functions.
41613 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
41614 places where it should be used.
41616 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41618 * doc/extend.texi (Formatted Output Function Checking): New
41619 subsection for grouping together printf et al.
41620 (Exception handling) Fix missing @ sign before copyright
41621 header, which lead to the copyright line leaking into
41622 '(gcc)Exception handling'.
41623 * doc/gcc.texi: Set document language to en_US.
41624 (@copying): Wrap front cover texts in quotations, move in manual
41627 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41629 * doc/gcc.texi: Add the Indices appendix, to make texinfo
41630 generate nice indices overview page.
41632 2023-03-21 Richard Biener <rguenther@suse.de>
41634 PR tree-optimization/109170
41635 * gimple-range-op.cc (cfn_pass_through_arg1): New.
41636 (gimple_range_op_handler::maybe_builtin_call): Handle
41637 __builtin_expect via cfn_pass_through_arg1.
41639 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
41642 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
41643 (init_float128_ieee): Delete code to switch complex multiply and divide
41645 (complex_multiply_builtin_code): New helper function.
41646 (complex_divide_builtin_code): Likewise.
41647 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
41648 of complex 128-bit multiply and divide built-in functions.
41650 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
41653 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
41655 2023-03-19 Jonny Grant <jg@jguk.org>
41657 * doc/extend.texi (Common Function Attributes) <nonnull>:
41660 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
41662 PR rtl-optimization/109179
41663 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
41664 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
41666 2023-03-17 Jakub Jelinek <jakub@redhat.com>
41669 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
41671 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
41672 to allocate_struct_function instead of false.
41673 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
41674 nor DECL_RESULT here. Pass true as ABSTRACT_P to
41675 push_struct_function. Call targetm.target_option.relayout_function
41677 (tree_function_versioning): Formatting fix.
41679 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
41681 * lra-constraints.cc: Include hooks.h.
41682 (combine_reload_insn): New function.
41683 (lra_constraints): Call it.
41685 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41686 kito-cheng <kito.cheng@sifive.com>
41688 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
41689 as legitimate value.
41690 * config/riscv/riscv-vector-builtins.cc
41691 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
41692 (function_expander::use_widen_ternop_insn): Ditto.
41693 * config/riscv/vector.md (@vundefined<mode>): New pattern.
41694 (pred_mul_<optab><mode>_undef_merge): Remove.
41695 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
41696 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
41697 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
41698 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
41700 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41703 * config/riscv/riscv.md: Fix subreg bug.
41705 2023-03-17 Jakub Jelinek <jakub@redhat.com>
41707 PR middle-end/108685
41708 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
41709 use its loop_father rather than BODY_BB's loop_father.
41710 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
41711 If broken_loop with ordered > collapse and at least one of those
41712 extra loops aren't guaranteed to have at least one iteration, change
41713 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
41714 loop_father to l0_bb's loop_father rather than l1_bb's.
41716 2023-03-17 Jakub Jelinek <jakub@redhat.com>
41719 * gdbhooks.py (TreePrinter.to_string): Wrap
41720 gdb.parse_and_eval('tree_code_type') in a try block, parse
41721 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
41722 raises exception. Update comments for the recent tree_code_type
41725 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
41727 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
41728 issues. Add more line breaks to example so it doesn't overflow
41731 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
41733 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
41734 line breaks in examples.
41735 <malloc>: Fix bad line breaks in running text, also copy-edit
41737 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
41738 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
41740 (C++ Dialect Options) <-fcontracts>: Add line break in example.
41741 <-Wctad-maybe-unsupported>: Likewise.
41742 <-Winvalid-constexpr>: Likewise.
41743 (Warning Options) <-Wdangling-pointer>: Likewise.
41744 <-Winterference-size>: Likewise.
41745 <-Wvla-parameter>: Likewise.
41746 (Static Analyzer Options): Fix bad line breaks in running text,
41747 plus add some missing markup.
41748 (Optimize Options) <openacc-privatization>: Fix more bad line
41749 breaks in running text.
41751 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
41753 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
41754 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
41755 (expand_vec_perm_2perm_pblendv): Ditto.
41757 2023-03-16 Martin Liska <mliska@suse.cz>
41759 PR middle-end/106133
41760 * gcc.cc (driver_handle_option): Use x_main_input_basename
41761 if x_dump_base_name is null.
41762 * opts.cc (common_handle_option): Likewise.
41764 2023-03-16 Richard Biener <rguenther@suse.de>
41766 PR tree-optimization/109123
41767 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
41768 Do not emit -Wuse-after-free late.
41769 (pass_waccess::check_call): Always check call pointer uses.
41771 2023-03-16 Richard Biener <rguenther@suse.de>
41773 PR tree-optimization/109141
41774 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
41775 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
41777 (renumber_gimple_stmt_uids): ... here and
41778 (renumber_gimple_stmt_uids_in_blocks): ... here.
41779 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
41780 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
41782 (pass_waccess::check_pointer_uses): Process all PHIs.
41784 2023-03-15 David Malcolm <dmalcolm@redhat.com>
41787 * diagnostic-format-sarif.cc (class sarif_invocation): New.
41788 (class sarif_ice_notification): New.
41789 (sarif_builder::m_invocation_obj): New field.
41790 (sarif_invocation::add_notification_for_ice): New.
41791 (sarif_invocation::prepare_to_flush): New.
41792 (sarif_ice_notification::sarif_ice_notification): New.
41793 (sarif_builder::sarif_builder): Add m_invocation_obj.
41794 (sarif_builder::end_diagnostic): Special-case DK_ICE and
41796 (sarif_builder::flush_to_file): Call prepare_to_flush on
41797 m_invocation_obj. Pass the latter to make_top_level_object.
41798 (sarif_builder::make_result_object): Move creation of "locations"
41800 (sarif_builder::make_locations_arr): ...this new function.
41801 (sarif_builder::make_top_level_object): Add "invocation_obj" param
41802 and pass it to make_run_object.
41803 (sarif_builder::make_run_object): Add "invocation_obj" param and
41805 (sarif_ice_handler): New callback.
41806 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
41807 * diagnostic.cc (diagnostic_initialize): Initialize new field
41809 (diagnostic_action_after_output): If it is set, make one attempt
41810 to call ice_handler_cb.
41811 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
41813 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
41815 * config/i386/i386-expand.cc (expand_vec_perm_blend):
41816 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
41817 and fix V2HImode handling.
41818 (expand_vec_perm_1): Try to emit BLEND instruction
41819 before MOVSS/MOVSD.
41820 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
41822 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
41824 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
41826 2023-03-15 Richard Biener <rguenther@suse.de>
41828 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
41829 Do not diagnose clobbers.
41831 2023-03-15 Richard Biener <rguenther@suse.de>
41833 PR tree-optimization/109139
41834 * tree-ssa-live.cc (remove_unused_locals): Look at the
41835 base address for unused decls on the LHS of .DEFERRED_INIT.
41837 2023-03-15 Xi Ruoyao <xry111@xry111.site>
41840 * builtins.cc (inline_string_cmp): Force the character
41841 difference into "result" pseudo-register, instead of reassign
41842 the pseudo-register.
41844 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41846 * config.gcc: Add thead.o to RISC-V extra_objs.
41847 * config/riscv/peephole.md: Add mempair peephole passes.
41848 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
41850 (th_mempair_operands_p): Likewise.
41851 (th_mempair_order_operands): Likewise.
41852 (th_mempair_prepare_save_restore_operands): Likewise.
41853 (th_mempair_save_restore_regs): Likewise.
41854 (th_mempair_output_move): Likewise.
41855 * config/riscv/riscv.cc (riscv_save_reg): Move code.
41856 (riscv_restore_reg): Move code.
41857 (riscv_for_each_saved_reg): Add code to emit mempair insns.
41858 * config/riscv/t-riscv: Add thead.cc.
41859 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
41861 (*th_mempair_store_<GPR:mode>2): Likewise.
41862 (*th_mempair_load_extendsidi2): Likewise.
41863 (*th_mempair_load_zero_extendsidi2): Likewise.
41864 * config/riscv/thead.cc: New file.
41866 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41868 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
41869 New constraint "th_f_fmv".
41870 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
41872 * config/riscv/riscv.cc (riscv_split_doubleword_move):
41873 Add split code for XTheadFmv.
41874 (riscv_secondary_memory_needed): XTheadFmv does not need
41876 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
41877 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
41878 movdf_hardfloat_rv32.
41879 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
41880 (th_fmv_x_w): New INSN.
41881 (th_fmv_x_hw): New INSN.
41883 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41885 * config/riscv/riscv.md (maddhisi4): New expand.
41886 (msubhisi4): New expand.
41887 * config/riscv/thead.md (*th_mula<mode>): New pattern.
41888 (*th_mulawsi): New pattern.
41889 (*th_mulawsi2): New pattern.
41890 (*th_maddhisi4): New pattern.
41891 (*th_sextw_maddhisi4): New pattern.
41892 (*th_muls<mode>): New pattern.
41893 (*th_mulswsi): New pattern.
41894 (*th_mulswsi2): New pattern.
41895 (*th_msubhisi4): New pattern.
41896 (*th_sextw_msubhisi4): New pattern.
41898 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41900 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
41901 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
41903 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
41905 (riscv_expand_conditional_move): New function.
41906 (riscv_expand_conditional_move_onesided): New function.
41907 * config/riscv/riscv.md: Add support for XTheadCondMov.
41908 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
41909 support for XTheadCondMov.
41910 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
41912 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41914 * config/riscv/bitmanip.md (clzdi2): New expand.
41915 (clzsi2): New expand.
41916 (ctz<mode>2): New expand.
41917 (popcount<mode>2): New expand.
41918 (<bitmanip_optab>si2): Rename INSN.
41919 (*<bitmanip_optab>si2): Hide INSN name.
41920 (<bitmanip_optab>di2): Rename INSN.
41921 (*<bitmanip_optab>di2): Hide INSN name.
41922 (rotrsi3): Remove INSN.
41923 (rotr<mode>3): Add expand.
41924 (*rotrsi3): New INSN.
41925 (rotrdi3): Rename INSN.
41926 (*rotrdi3): Hide INSN name.
41927 (rotrsi3_sext): Rename INSN.
41928 (*rotrsi3_sext): Hide INSN name.
41929 (bswap<mode>2): Remove INSN.
41930 (bswapdi2): Add expand.
41931 (bswapsi2): Add expand.
41932 (*bswap<mode>2): Hide INSN name.
41933 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
41935 * config/riscv/riscv.md (extv<mode>): New expand.
41936 (extzv<mode>): New expand.
41937 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
41938 (*th_ext<mode>): New INSN.
41939 (*th_extu<mode>): New INSN.
41940 (*th_clz<mode>2): New INSN.
41941 (*th_rev<mode>2): New INSN.
41943 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41945 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
41946 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
41948 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41950 * config/riscv/riscv.md: Include thead.md
41951 * config/riscv/thead.md: New file.
41953 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41955 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
41957 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41959 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
41960 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
41961 (MASK_XTHEADBB): New.
41962 (MASK_XTHEADBS): New.
41963 (MASK_XTHEADCMO): New.
41964 (MASK_XTHEADCONDMOV): New.
41965 (MASK_XTHEADFMEMIDX): New.
41966 (MASK_XTHEADFMV): New.
41967 (MASK_XTHEADINT): New.
41968 (MASK_XTHEADMAC): New.
41969 (MASK_XTHEADMEMIDX): New.
41970 (MASK_XTHEADMEMPAIR): New.
41971 (MASK_XTHEADSYNC): New.
41972 (TARGET_XTHEADBA): New.
41973 (TARGET_XTHEADBB): New.
41974 (TARGET_XTHEADBS): New.
41975 (TARGET_XTHEADCMO): New.
41976 (TARGET_XTHEADCONDMOV): New.
41977 (TARGET_XTHEADFMEMIDX): New.
41978 (TARGET_XTHEADFMV): New.
41979 (TARGET_XTHEADINT): New.
41980 (TARGET_XTHEADMAC): New.
41981 (TARGET_XTHEADMEMIDX): New.
41982 (TARGET_XTHEADMEMPAIR): new.
41983 (TARGET_XTHEADSYNC): New.
41984 * config/riscv/riscv.opt: Add riscv_xthead_subext.
41986 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
41989 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
41990 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
41991 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
41993 2023-03-14 Jakub Jelinek <jakub@redhat.com>
41996 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
41997 when lo is equal to dhi and hi is a MEM which uses dlo register.
41999 2023-03-14 Martin Jambor <mjambor@suse.cz>
42002 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
42003 global0 instead of zeroing when it does not have as many counts as
42006 2023-03-14 Martin Jambor <mjambor@suse.cz>
42009 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
42010 ipa count, remove assert, lenient_count_portion_handling, dump
42011 also orig_node_count.
42013 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
42015 * config/i386/i386-expand.cc (expand_vec_perm_movs):
42016 Handle V2SImode for TARGET_MMX_WITH_SSE.
42017 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
42018 using V2FI mode iterator to handle both V2SI and V2SF modes.
42020 2023-03-14 Sam James <sam@gentoo.org>
42022 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
42023 including <sstream> earlier.
42024 * system.h: Add INCLUDE_SSTREAM.
42026 2023-03-14 Richard Biener <rguenther@suse.de>
42028 * tree-ssa-live.cc (remove_unused_locals): Do not treat
42029 the .DEFERRED_INIT of a variable as use, instead remove
42030 that if it is the only use.
42032 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
42034 PR rtl-optimization/107762
42035 * expr.cc (emit_group_store): Revert latest change.
42037 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
42039 PR tree-optimization/109005
42040 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
42041 aggregate type check.
42043 2023-03-14 Jakub Jelinek <jakub@redhat.com>
42045 PR tree-optimization/109115
42046 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
42047 r.upper_bound () on r.undefined_p () range.
42049 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
42051 PR tree-optimization/106896
42052 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
42053 implementatoin with probability_in; avoid some asserts.
42055 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
42057 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
42059 2023-03-13 Sean Bright <sean@seanbright.com>
42061 * doc/invoke.texi (Warning Options): Remove errant 'See'
42064 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
42066 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
42067 REG_OK_FOR_BASE_P): Remove.
42069 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42071 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
42072 (=vd,vd,vr,vr): Ditto.
42073 * config/riscv/vector.md: Ditto.
42075 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42077 * config/riscv/riscv-vector-builtins.cc
42078 (function_expander::use_compare_insn): Add operand predicate check.
42080 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42082 * config/riscv/vector.md: Fine tune RA constraints.
42084 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
42086 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
42087 hsaco assemble/link.
42089 2023-03-13 Richard Biener <rguenther@suse.de>
42091 PR tree-optimization/109046
42092 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
42093 piecewise complex loads.
42095 2023-03-12 Jakub Jelinek <jakub@redhat.com>
42097 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
42098 (aarch64_bf16_ptr_type_node): Adjust comment.
42099 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
42100 bfloat16_type_node rather than aarch64_bf16_type_node.
42101 (aarch64_libgcc_floating_mode_supported_p,
42102 aarch64_scalar_mode_supported_p): Also support BFmode.
42103 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
42104 (aarch64_invalid_binary_op): Remove BFmode related rejections.
42105 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
42106 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
42107 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
42108 aarch64_bf16_type_node.
42109 (aarch64_init_simd_builtin_types): Likewise.
42110 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
42111 which is created in tree.cc already.
42112 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
42114 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
42116 PR middle-end/109031
42117 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
42118 ensure that the type of x is as wide or wider than the type of a.
42120 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42123 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
42124 (*bitmask_shift_plus<mode>): New.
42125 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
42126 (@aarch64_bitmask_udiv<mode>3): Remove.
42127 * config/aarch64/aarch64.cc
42128 (aarch64_vectorize_can_special_div_by_constant,
42129 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
42130 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
42131 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
42133 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42136 * target.def (preferred_div_as_shifts_over_mult): New.
42137 * doc/tm.texi.in: Document it.
42138 * doc/tm.texi: Regenerate.
42139 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
42140 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
42141 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
42143 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42144 Richard Sandiford <richard.sandiford@arm.com>
42147 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
42150 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42151 Andrew MacLeod <amacleod@redhat.com>
42154 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
42155 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
42157 (gimple_range_op_handler::maybe_non_standard): New.
42158 * range-op.cc (class operator_widen_plus_signed,
42159 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
42160 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
42161 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
42162 operator_widen_mult_unsigned::wi_fold,
42163 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
42164 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
42165 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
42166 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
42168 2023-03-12 Tamar Christina <tamar.christina@arm.com>
42171 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
42172 * doc/tm.texi.in: Likewise.
42173 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
42174 * expmed.cc (expand_divmod): Likewise.
42175 * expmed.h (expand_divmod): Likewise.
42176 * expr.cc (force_operand, expand_expr_divmod): Likewise.
42177 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
42178 * target.def (can_special_div_by_const): Remove.
42179 * target.h: Remove tree-core.h include
42180 * targhooks.cc (default_can_special_div_by_const): Remove.
42181 * targhooks.h (default_can_special_div_by_const): Remove.
42182 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
42183 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
42184 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
42186 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
42188 * doc/install.texi2html: Fix issue number typo in comment.
42190 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
42192 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
42195 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
42197 * doc/invoke.texi (Optimize Options): Add markup to
42198 description of asan-kernel-mem-intrinsic-prefix, and clarify
42201 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
42203 * doc/extend.texi (Named Address Spaces): Drop a redundant link
42206 2023-03-11 Jeff Law <jlaw@ventanamicro>
42209 * doc/extend.texi: Clarify Attribute Syntax a bit.
42211 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
42213 * doc/install.texi (Prerequisites): Suggest using newer versions
42215 (Final install): Clean up and modernize discussion of how to
42216 build or obtain the GCC manuals.
42217 * doc/install.texi2html: Update comment to point to the PR instead
42218 of "makeinfo 4.7 brokenness" (it's not specific to that version).
42220 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42223 * optabs.cc (expand_fix): For conversions from BFmode to integral,
42224 use shifts to convert it to SFmode first and then convert SFmode
42227 2023-03-10 Andrew Pinski <apinski@marvell.com>
42229 * config/aarch64/aarch64.md: Add a new define_split
42232 2023-03-10 Richard Biener <rguenther@suse.de>
42234 * tree-ssa-structalias.cc (solve_graph): Immediately
42235 iterate self-cycles.
42237 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42239 PR tree-optimization/109008
42240 * range-op-float.cc (float_widen_lhs_range): If not
42241 -frounding-math and not IBM double double format, extend lhs
42242 range just by 0.5ulp rather than 1ulp in each direction.
42244 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42247 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
42249 * config/i386/t-cygwin-w64: Remove.
42251 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42254 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
42255 C++14, don't declare as extern const arrays.
42256 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
42257 static constexpr member arrays for C++11 or C++14.
42258 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
42259 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
42260 (TREE_CODE_LENGTH): For C++11 or C++14 use
42261 tree_code_length_tmpl <0>::tree_code_length instead of
42263 * tree.cc (tree_code_type, tree_code_length): Remove.
42265 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42268 * common.opt (fcanon-prefix-map): New option.
42269 * opts.cc: Include file-prefix-map.h.
42270 (flag_canon_prefix_map): New variable.
42271 (common_handle_option): Handle OPT_fcanon_prefix_map.
42272 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
42273 * file-prefix-map.h (flag_canon_prefix_map): Declare.
42274 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
42276 (add_prefix_map): Initialize canonicalize member from
42277 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
42278 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
42279 use lrealpath result only for map->canonicalize map entries.
42280 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
42281 * opts-global.cc (handle_common_deferred_options): Clear
42282 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
42283 * doc/invoke.texi (-fcanon-prefix-map): Document.
42284 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
42285 see also for -fcanon-prefix-map.
42286 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
42288 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42291 * cgraphunit.cc (check_global_declaration): Don't warn for unused
42292 variables which have OPT_Wunused_variable warning suppressed.
42294 2023-03-10 Jakub Jelinek <jakub@redhat.com>
42296 PR tree-optimization/109008
42297 * range-op-float.cc (float_widen_lhs_range): If lb is
42298 minimum representable finite number or ub is maximum
42299 representable finite number, instead of widening it to
42300 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
42301 Temporarily clear flag_finite_math_only when canonicalizing
42304 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42306 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
42307 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
42308 (gimple_fold_builtin): Ditto.
42309 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
42310 (class vleff): Ditto.
42312 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42313 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
42315 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
42316 (struct fault_load_def): Ditto.
42318 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42319 * config/riscv/riscv-vector-builtins.cc
42320 (rvv_arg_type_info::get_tree_type): Add size_ptr.
42321 (gimple_folder::gimple_folder): New class.
42322 (gimple_folder::fold): Ditto.
42323 (gimple_fold_builtin): New function.
42324 (get_read_vl_instance): Ditto.
42325 (get_read_vl_decl): Ditto.
42326 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
42327 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
42328 (get_read_vl_instance): New function.
42329 (get_read_vl_decl): Ditto.
42330 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
42331 (read_vl_insn_p): Ditto.
42332 (available_occurrence_p): Ditto.
42333 (backward_propagate_worthwhile_p): Ditto.
42334 (gen_vsetvl_pat): Adapt for vleff support.
42335 (get_forward_read_vl_insn): New function.
42336 (get_backward_fault_first_load_insn): Ditto.
42337 (source_equal_p): Adapt for vleff support.
42338 (first_ratio_invalid_for_second_sew_p): Remove.
42339 (first_ratio_invalid_for_second_lmul_p): Ditto.
42340 (first_lmul_less_than_second_lmul_p): Ditto.
42341 (first_ratio_less_than_second_ratio_p): Ditto.
42342 (support_relaxed_compatible_p): New function.
42343 (vector_insn_info::operator>): Remove.
42344 (vector_insn_info::operator>=): Refine.
42345 (vector_insn_info::parse_insn): Adapt for vleff support.
42346 (vector_insn_info::compatible_p): Ditto.
42347 (vector_insn_info::update_fault_first_load_avl): New function.
42348 (pass_vsetvl::transfer_after): Adapt for vleff support.
42349 (pass_vsetvl::demand_fusion): Ditto.
42350 (pass_vsetvl::cleanup_insns): Ditto.
42351 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
42352 redundant condtions.
42353 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
42354 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
42355 * config/riscv/riscv.md: Adapt for vleff support.
42356 * config/riscv/t-riscv: Ditto.
42357 * config/riscv/vector-iterators.md: New iterator.
42358 * config/riscv/vector.md (read_vlsi): New pattern.
42359 (read_vldi_zero_extend): Ditto.
42360 (@pred_fault_load<mode>): Ditto.
42362 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42364 * config/riscv/riscv-vector-builtins.cc
42365 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
42366 (function_expander::use_widen_ternop_insn): Ditto.
42367 * optabs.cc (maybe_gen_insn): Extend nops handling.
42369 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42371 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
42372 patterns according to RVV ISA.
42373 * config/riscv/vector-iterators.md: New iterators.
42374 * config/riscv/vector.md
42375 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
42376 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
42377 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
42378 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
42379 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
42380 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
42381 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
42382 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
42383 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
42384 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
42385 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
42386 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
42387 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
42388 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
42390 2023-03-10 Michael Collison <collison@rivosinc.com>
42392 * tree-vect-loop-manip.cc (vect_do_peeling): Use
42393 result of constant_lower_bound instead of vf for the lower
42394 bound of the epilog loop trip count.
42396 2023-03-09 Tamar Christina <tamar.christina@arm.com>
42398 * passes.cc (emergency_dump_function): Finish graph generation.
42400 2023-03-09 Tamar Christina <tamar.christina@arm.com>
42402 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
42403 and bottom bit only.
42405 2023-03-09 Andrew Pinski <apinski@marvell.com>
42407 PR tree-optimization/108980
42408 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
42409 Reorgnize the call to warning for not strict flexible arrays
42410 to be before the check of warned.
42412 2023-03-09 Jason Merrill <jason@redhat.com>
42414 * doc/extend.texi: Comment out __is_deducible docs.
42416 2023-03-09 Jason Merrill <jason@redhat.com>
42419 * doc/extend.texi (Type Traits):: Document __is_deducible.
42421 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
42424 * config.host: add object for x86_64-*-mingw*.
42425 * config/i386/sym-mingw32.cc: dummy file to attach
42427 * config/i386/utf8-mingw32.rc: windres resource file.
42428 * config/i386/winnt-utf8.manifest: XML manifest to
42430 * config/i386/x-mingw32: reference to x-mingw32-utf8.
42431 * config/i386/x-mingw32-utf8: Makefile fragment to
42432 embed UTF-8 manifest.
42434 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
42436 * lra-constraints.cc (process_alt_operands): Use operand modes for
42437 clobbered regs instead of the biggest access mode.
42439 2023-03-09 Richard Biener <rguenther@suse.de>
42441 PR middle-end/108995
42442 * fold-const.cc (extract_muldiv_1): Avoid folding
42443 (CST * b) / CST2 when sanitizing overflow and we rely on
42444 overflow being undefined.
42446 2023-03-09 Jakub Jelinek <jakub@redhat.com>
42447 Richard Biener <rguenther@suse.de>
42449 PR tree-optimization/109008
42450 * range-op-float.cc (float_widen_lhs_range): New function.
42451 (foperator_plus::op1_range, foperator_minus::op1_range,
42452 foperator_minus::op2_range, foperator_mult::op1_range,
42453 foperator_div::op1_range, foperator_div::op2_range): Use it.
42455 2023-03-07 Jonathan Grant <jg@jguk.org>
42458 * doc/invoke.texi (Instrumentation Options): Clarify
42459 LeakSanitizer behavior.
42461 2023-03-07 Benson Muite <benson_muite@emailplus.org>
42463 * doc/install.texi (Prerequisites): Add link to gmplib.org.
42465 2023-03-07 Pan Li <pan2.li@intel.com>
42466 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42470 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
42472 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
42473 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
42474 * genmodes.cc (adj_precision): New.
42475 (ADJUST_PRECISION): New.
42476 (emit_mode_adjustments): Handle ADJUST_PRECISION.
42478 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
42480 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
42482 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
42484 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
42485 {s|u}{max|min} in QI, HI and DI modes.
42486 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
42487 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
42488 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
42489 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
42492 2023-03-06 Richard Biener <rguenther@suse.de>
42494 PR tree-optimization/109025
42495 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
42496 the inner LC PHI use is the inner loop PHI latch definition
42497 before classifying an outer PHI as double reduction.
42499 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
42502 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
42504 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
42505 (X86_TUNE_USE_SCATTER): Likewise.
42507 2023-03-06 Xi Ruoyao <xry111@xry111.site>
42510 * config/loongarch/loongarch.h (FP_RETURN): Use
42511 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
42512 (UNITS_PER_FP_ARG): Likewise.
42514 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42516 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
42517 (pass_vsetvl::backward_demand_fusion): Ditto.
42519 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42520 SiYu Wu <siyu@isrc.iscas.ac.cn>
42522 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
42524 (riscv_sm3p1_<mode>): New.
42525 (riscv_sm4ed_<mode>): New.
42526 (riscv_sm4ks_<mode>): New.
42527 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
42528 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
42529 ZKSH's built-in functions.
42531 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42532 SiYu Wu <siyu@isrc.iscas.ac.cn>
42534 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
42535 (riscv_sha256sig1_<mode>): New.
42536 (riscv_sha256sum0_<mode>): New.
42537 (riscv_sha256sum1_<mode>): New.
42538 (riscv_sha512sig0h): New.
42539 (riscv_sha512sig0l): New.
42540 (riscv_sha512sig1h): New.
42541 (riscv_sha512sig1l): New.
42542 (riscv_sha512sum0r): New.
42543 (riscv_sha512sum1r): New.
42544 (riscv_sha512sig0): New.
42545 (riscv_sha512sig1): New.
42546 (riscv_sha512sum0): New.
42547 (riscv_sha512sum1): New.
42548 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
42549 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
42550 built-in functions.
42551 (DIRECT_BUILTIN): Add new.
42553 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42554 SiYu Wu <siyu@isrc.iscas.ac.cn>
42556 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
42558 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
42559 (riscv_aes32dsmi): New.
42560 (riscv_aes64ds): New.
42561 (riscv_aes64dsm): New.
42562 (riscv_aes64im): New.
42563 (riscv_aes64ks1i): New.
42564 (riscv_aes64ks2): New.
42565 (riscv_aes32esi): New.
42566 (riscv_aes32esmi): New.
42567 (riscv_aes64es): New.
42568 (riscv_aes64esm): New.
42569 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
42570 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
42571 ZKNE's built-in functions.
42573 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42574 SiYu Wu <siyu@isrc.iscas.ac.cn>
42576 * config/riscv/bitmanip.md: Add ZBKB's instructions.
42577 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
42578 * config/riscv/riscv.md: Add new type for crypto instructions.
42579 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
42581 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
42582 extension's built-in function file.
42584 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42585 SiYu Wu <siyu@isrc.iscas.ac.cn>
42587 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
42588 (RISCV_FTYPE_NAME3): New.
42589 (RISCV_ATYPE_QI): New.
42590 (RISCV_ATYPE_HI): New.
42591 (RISCV_FTYPE_ATYPES2): New.
42592 (RISCV_FTYPE_ATYPES3): New.
42593 * config/riscv/riscv-ftypes.def (2): New.
42596 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
42598 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
42601 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42602 kito-cheng <kito.cheng@sifive.com>
42604 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
42605 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
42606 (riscv_register_pragmas): Add builtin function check call.
42607 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
42608 (check_builtin_call): New function.
42609 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
42610 (class vreinterpret): Ditto.
42611 (class vlmul_ext): Ditto.
42612 (class vlmul_trunc): Ditto.
42613 (class vset): Ditto.
42614 (class vget): Ditto.
42616 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42617 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
42633 (vundefined): Add new intrinsic.
42634 (vreinterpret): Ditto.
42635 (vlmul_ext): Ditto.
42636 (vlmul_trunc): Ditto.
42639 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
42640 (struct narrow_alu_def): Ditto.
42641 (struct reduc_alu_def): Ditto.
42642 (struct vundefined_def): Ditto.
42643 (struct misc_def): Ditto.
42644 (struct vset_def): Ditto.
42645 (struct vget_def): Ditto.
42647 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42648 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
42649 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
42650 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
42651 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
42652 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
42653 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
42654 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
42655 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
42656 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
42657 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
42658 (DEF_RVV_LMUL1_OPS): Ditto.
42659 (DEF_RVV_LMUL2_OPS): Ditto.
42660 (DEF_RVV_LMUL4_OPS): Ditto.
42661 (vint16mf4_t): Ditto.
42662 (vint16mf2_t): Ditto.
42663 (vint16m1_t): Ditto.
42664 (vint16m2_t): Ditto.
42665 (vint16m4_t): Ditto.
42666 (vint16m8_t): Ditto.
42667 (vint32mf2_t): Ditto.
42668 (vint32m1_t): Ditto.
42669 (vint32m2_t): Ditto.
42670 (vint32m4_t): Ditto.
42671 (vint32m8_t): Ditto.
42672 (vint64m1_t): Ditto.
42673 (vint64m2_t): Ditto.
42674 (vint64m4_t): Ditto.
42675 (vint64m8_t): Ditto.
42676 (vuint16mf4_t): Ditto.
42677 (vuint16mf2_t): Ditto.
42678 (vuint16m1_t): Ditto.
42679 (vuint16m2_t): Ditto.
42680 (vuint16m4_t): Ditto.
42681 (vuint16m8_t): Ditto.
42682 (vuint32mf2_t): Ditto.
42683 (vuint32m1_t): Ditto.
42684 (vuint32m2_t): Ditto.
42685 (vuint32m4_t): Ditto.
42686 (vuint32m8_t): Ditto.
42687 (vuint64m1_t): Ditto.
42688 (vuint64m2_t): Ditto.
42689 (vuint64m4_t): Ditto.
42690 (vuint64m8_t): Ditto.
42691 (vint8mf4_t): Ditto.
42692 (vint8mf2_t): Ditto.
42693 (vint8m1_t): Ditto.
42694 (vint8m2_t): Ditto.
42695 (vint8m4_t): Ditto.
42696 (vint8m8_t): Ditto.
42697 (vuint8mf4_t): Ditto.
42698 (vuint8mf2_t): Ditto.
42699 (vuint8m1_t): Ditto.
42700 (vuint8m2_t): Ditto.
42701 (vuint8m4_t): Ditto.
42702 (vuint8m8_t): Ditto.
42703 (vint8mf8_t): Ditto.
42704 (vuint8mf8_t): Ditto.
42705 (vfloat32mf2_t): Ditto.
42706 (vfloat32m1_t): Ditto.
42707 (vfloat32m2_t): Ditto.
42708 (vfloat32m4_t): Ditto.
42709 (vfloat64m1_t): Ditto.
42710 (vfloat64m2_t): Ditto.
42711 (vfloat64m4_t): Ditto.
42712 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
42713 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
42714 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
42715 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
42716 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
42717 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
42718 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
42719 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
42720 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
42721 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
42722 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
42723 (DEF_RVV_LMUL1_OPS): Ditto.
42724 (DEF_RVV_LMUL2_OPS): Ditto.
42725 (DEF_RVV_LMUL4_OPS): Ditto.
42726 (DEF_RVV_TYPE_INDEX): Ditto.
42727 (required_extensions_p): Adapt for new intrinsic support/
42728 (get_required_extensions): New function.
42729 (check_required_extensions): Ditto.
42730 (unsigned_base_type_p): Remove.
42731 (rvv_arg_type_info::get_scalar_ptr_type): New function.
42732 (get_mode_for_bitsize): Remove.
42733 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
42734 (rvv_arg_type_info::get_base_vector_type): Ditto.
42735 (rvv_arg_type_info::get_function_type_index): Ditto.
42736 (DEF_RVV_BASE_TYPE): New def.
42737 (function_builder::apply_predication): New class.
42738 (function_expander::mask_mode): Ditto.
42739 (function_checker::function_checker): Ditto.
42740 (function_checker::report_non_ice): Ditto.
42741 (function_checker::report_out_of_range): Ditto.
42742 (function_checker::require_immediate): Ditto.
42743 (function_checker::require_immediate_range): Ditto.
42744 (function_checker::check): Ditto.
42745 (check_builtin_call): Ditto.
42746 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
42747 (DEF_RVV_BASE_TYPE): Ditto.
42748 (DEF_RVV_TYPE_INDEX): Ditto.
42749 (vbool64_t): Ditto.
42750 (vbool32_t): Ditto.
42751 (vbool16_t): Ditto.
42756 (vuint8mf8_t): Ditto.
42757 (vuint8mf4_t): Ditto.
42758 (vuint8mf2_t): Ditto.
42759 (vuint8m1_t): Ditto.
42760 (vuint8m2_t): Ditto.
42761 (vint8m4_t): Ditto.
42762 (vuint8m4_t): Ditto.
42763 (vint8m8_t): Ditto.
42764 (vuint8m8_t): Ditto.
42765 (vint16mf4_t): Ditto.
42766 (vuint16mf2_t): Ditto.
42767 (vuint16m1_t): Ditto.
42768 (vuint16m2_t): Ditto.
42769 (vuint16m4_t): Ditto.
42770 (vuint16m8_t): Ditto.
42771 (vint32mf2_t): Ditto.
42772 (vuint32m1_t): Ditto.
42773 (vuint32m2_t): Ditto.
42774 (vuint32m4_t): Ditto.
42775 (vuint32m8_t): Ditto.
42776 (vuint64m1_t): Ditto.
42777 (vuint64m2_t): Ditto.
42778 (vuint64m4_t): Ditto.
42779 (vuint64m8_t): Ditto.
42780 (vfloat32mf2_t): Ditto.
42781 (vfloat32m1_t): Ditto.
42782 (vfloat32m2_t): Ditto.
42783 (vfloat32m4_t): Ditto.
42784 (vfloat32m8_t): Ditto.
42785 (vfloat64m1_t): Ditto.
42786 (vfloat64m4_t): Ditto.
42787 (vector): Move it def.
42790 (signed_vector): Ditto.
42791 (unsigned_vector): Ditto.
42792 (unsigned_scalar): Ditto.
42793 (vector_ptr): Ditto.
42794 (scalar_ptr): Ditto.
42795 (scalar_const_ptr): Ditto.
42799 (unsigned_long): Ditto.
42801 (eew8_index): Ditto.
42802 (eew16_index): Ditto.
42803 (eew32_index): Ditto.
42804 (eew64_index): Ditto.
42805 (shift_vector): Ditto.
42806 (double_trunc_vector): Ditto.
42807 (quad_trunc_vector): Ditto.
42808 (oct_trunc_vector): Ditto.
42809 (double_trunc_scalar): Ditto.
42810 (double_trunc_signed_vector): Ditto.
42811 (double_trunc_unsigned_vector): Ditto.
42812 (double_trunc_unsigned_scalar): Ditto.
42813 (double_trunc_float_vector): Ditto.
42814 (float_vector): Ditto.
42815 (lmul1_vector): Ditto.
42816 (widen_lmul1_vector): Ditto.
42817 (eew8_interpret): Ditto.
42818 (eew16_interpret): Ditto.
42819 (eew32_interpret): Ditto.
42820 (eew64_interpret): Ditto.
42821 (vlmul_ext_x2): Ditto.
42822 (vlmul_ext_x4): Ditto.
42823 (vlmul_ext_x8): Ditto.
42824 (vlmul_ext_x16): Ditto.
42825 (vlmul_ext_x32): Ditto.
42826 (vlmul_ext_x64): Ditto.
42827 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
42828 (struct function_type_info): New function.
42829 (struct rvv_arg_type_info): Ditto.
42830 (class function_checker): New class.
42831 (rvv_arg_type_info::get_scalar_type): New function.
42832 (rvv_arg_type_info::get_vector_type): Ditto.
42833 (function_expander::ret_mode): New function.
42834 (function_checker::arg_mode): Ditto.
42835 (function_checker::ret_mode): Ditto.
42836 * config/riscv/t-riscv: Add generator.
42837 * config/riscv/vector-iterators.md: New iterators.
42838 * config/riscv/vector.md (vundefined<mode>): New pattern.
42839 (@vundefined<mode>): Ditto.
42840 (@vreinterpret<mode>): Ditto.
42841 (@vlmul_extx2<mode>): Ditto.
42842 (@vlmul_extx4<mode>): Ditto.
42843 (@vlmul_extx8<mode>): Ditto.
42844 (@vlmul_extx16<mode>): Ditto.
42845 (@vlmul_extx32<mode>): Ditto.
42846 (@vlmul_extx64<mode>): Ditto.
42847 (*vlmul_extx2<mode>): Ditto.
42848 (*vlmul_extx4<mode>): Ditto.
42849 (*vlmul_extx8<mode>): Ditto.
42850 (*vlmul_extx16<mode>): Ditto.
42851 (*vlmul_extx32<mode>): Ditto.
42852 (*vlmul_extx64<mode>): Ditto.
42853 * config/riscv/genrvv-type-indexer.cc: New file.
42855 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42857 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
42858 (slide1_sew64_helper): New function.
42859 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
42860 (get_unknown_min_value): Ditto.
42861 (force_vector_length_operand): Ditto.
42862 (gen_no_side_effects_vsetvl_rtx): Ditto.
42863 (get_vl_x2_rtx): Ditto.
42864 (slide1_sew64_helper): Ditto.
42865 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
42866 (class vrgather): Ditto.
42867 (class vrgatherei16): Ditto.
42868 (class vcompress): Ditto.
42870 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42871 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
42872 (vslidedown): Ditto.
42873 (vslide1up): Ditto.
42874 (vslide1down): Ditto.
42875 (vfslide1up): Ditto.
42876 (vfslide1down): Ditto.
42878 (vrgatherei16): Ditto.
42879 (vcompress): Ditto.
42880 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
42881 (vint8mf8_t): Ditto.
42882 (vint8mf4_t): Ditto.
42883 (vint8mf2_t): Ditto.
42884 (vint8m1_t): Ditto.
42885 (vint8m2_t): Ditto.
42886 (vint8m4_t): Ditto.
42887 (vint16mf4_t): Ditto.
42888 (vint16mf2_t): Ditto.
42889 (vint16m1_t): Ditto.
42890 (vint16m2_t): Ditto.
42891 (vint16m4_t): Ditto.
42892 (vint16m8_t): Ditto.
42893 (vint32mf2_t): Ditto.
42894 (vint32m1_t): Ditto.
42895 (vint32m2_t): Ditto.
42896 (vint32m4_t): Ditto.
42897 (vint32m8_t): Ditto.
42898 (vint64m1_t): Ditto.
42899 (vint64m2_t): Ditto.
42900 (vint64m4_t): Ditto.
42901 (vint64m8_t): Ditto.
42902 (vuint8mf8_t): Ditto.
42903 (vuint8mf4_t): Ditto.
42904 (vuint8mf2_t): Ditto.
42905 (vuint8m1_t): Ditto.
42906 (vuint8m2_t): Ditto.
42907 (vuint8m4_t): Ditto.
42908 (vuint16mf4_t): Ditto.
42909 (vuint16mf2_t): Ditto.
42910 (vuint16m1_t): Ditto.
42911 (vuint16m2_t): Ditto.
42912 (vuint16m4_t): Ditto.
42913 (vuint16m8_t): Ditto.
42914 (vuint32mf2_t): Ditto.
42915 (vuint32m1_t): Ditto.
42916 (vuint32m2_t): Ditto.
42917 (vuint32m4_t): Ditto.
42918 (vuint32m8_t): Ditto.
42919 (vuint64m1_t): Ditto.
42920 (vuint64m2_t): Ditto.
42921 (vuint64m4_t): Ditto.
42922 (vuint64m8_t): Ditto.
42923 (vfloat32mf2_t): Ditto.
42924 (vfloat32m1_t): Ditto.
42925 (vfloat32m2_t): Ditto.
42926 (vfloat32m4_t): Ditto.
42927 (vfloat32m8_t): Ditto.
42928 (vfloat64m1_t): Ditto.
42929 (vfloat64m2_t): Ditto.
42930 (vfloat64m4_t): Ditto.
42931 (vfloat64m8_t): Ditto.
42932 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
42933 * config/riscv/riscv.md: Adjust RVV instruction types.
42934 * config/riscv/vector-iterators.md (down): New iterator.
42935 (=vd,vr): New attribute.
42936 (UNSPEC_VSLIDE1UP): New unspec.
42937 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
42938 (*pred_slide<ud><mode>): Ditto.
42939 (*pred_slide<ud><mode>_extended): Ditto.
42940 (@pred_gather<mode>): Ditto.
42941 (@pred_gather<mode>_scalar): Ditto.
42942 (@pred_gatherei16<mode>): Ditto.
42943 (@pred_compress<mode>): Ditto.
42945 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42947 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
42949 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42951 * config/riscv/constraints.md (Wb1): New constraint.
42952 * config/riscv/predicates.md
42953 (vector_least_significant_set_mask_operand): New predicate.
42954 (vector_broadcast_mask_operand): Ditto.
42955 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
42956 (gen_scalar_move_mask): New function.
42957 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
42958 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
42959 (class vmv_s): Ditto.
42961 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42962 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
42966 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
42968 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42969 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
42970 (function_expander::use_exact_insn): New function.
42971 (function_expander::use_contiguous_load_insn): New function.
42972 (function_expander::use_contiguous_store_insn): New function.
42973 (function_expander::use_ternop_insn): New function.
42974 (function_expander::use_widen_ternop_insn): New function.
42975 (function_expander::use_scalar_move_insn): New function.
42976 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
42977 * config/riscv/riscv-vector-builtins.h
42978 (function_expander::add_scalar_move_mask_operand): New class.
42979 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
42980 (scalar_move_insn_p): Ditto.
42981 (has_vsetvl_killed_avl_p): Ditto.
42982 (anticipatable_occurrence_p): Ditto.
42983 (insert_vsetvl): Ditto.
42984 (get_vl_vtype_info): Ditto.
42985 (calculate_sew): Ditto.
42986 (calculate_vlmul): Ditto.
42987 (incompatible_avl_p): Ditto.
42988 (different_sew_p): Ditto.
42989 (different_lmul_p): Ditto.
42990 (different_ratio_p): Ditto.
42991 (different_tail_policy_p): Ditto.
42992 (different_mask_policy_p): Ditto.
42993 (possible_zero_avl_p): Ditto.
42994 (first_ratio_invalid_for_second_sew_p): Ditto.
42995 (first_ratio_invalid_for_second_lmul_p): Ditto.
42996 (second_ratio_invalid_for_first_sew_p): Ditto.
42997 (second_ratio_invalid_for_first_lmul_p): Ditto.
42998 (second_sew_less_than_first_sew_p): Ditto.
42999 (first_sew_less_than_second_sew_p): Ditto.
43000 (compare_lmul): Ditto.
43001 (second_lmul_less_than_first_lmul_p): Ditto.
43002 (first_lmul_less_than_second_lmul_p): Ditto.
43003 (first_ratio_less_than_second_ratio_p): Ditto.
43004 (second_ratio_less_than_first_ratio_p): Ditto.
43005 (DEF_INCOMPATIBLE_COND): Ditto.
43006 (greatest_sew): Ditto.
43007 (first_sew): Ditto.
43008 (second_sew): Ditto.
43009 (first_vlmul): Ditto.
43010 (second_vlmul): Ditto.
43011 (first_ratio): Ditto.
43012 (second_ratio): Ditto.
43013 (vlmul_for_first_sew_second_ratio): Ditto.
43014 (ratio_for_second_sew_first_vlmul): Ditto.
43015 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
43016 (always_unavailable): Ditto.
43017 (avl_unavailable_p): Ditto.
43018 (sew_unavailable_p): Ditto.
43019 (lmul_unavailable_p): Ditto.
43020 (ge_sew_unavailable_p): Ditto.
43021 (ge_sew_lmul_unavailable_p): Ditto.
43022 (ge_sew_ratio_unavailable_p): Ditto.
43023 (DEF_UNAVAILABLE_COND): Ditto.
43024 (same_sew_lmul_demand_p): Ditto.
43025 (propagate_avl_across_demands_p): Ditto.
43026 (reg_available_p): Ditto.
43027 (avl_info::has_non_zero_avl): Ditto.
43028 (vl_vtype_info::has_non_zero_avl): Ditto.
43029 (vector_insn_info::operator>=): Refactor.
43030 (vector_insn_info::parse_insn): Adjust for scalar move.
43031 (vector_insn_info::demand_vl_vtype): Remove.
43032 (vector_insn_info::compatible_p): New function.
43033 (vector_insn_info::compatible_avl_p): Ditto.
43034 (vector_insn_info::compatible_vtype_p): Ditto.
43035 (vector_insn_info::available_p): Ditto.
43036 (vector_insn_info::merge): Ditto.
43037 (vector_insn_info::fuse_avl): Ditto.
43038 (vector_insn_info::fuse_sew_lmul): Ditto.
43039 (vector_insn_info::fuse_tail_policy): Ditto.
43040 (vector_insn_info::fuse_mask_policy): Ditto.
43041 (vector_insn_info::dump): Ditto.
43042 (vector_infos_manager::release): Ditto.
43043 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
43044 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
43045 (pass_vsetvl::hard_empty_block_p): Ditto.
43046 (pass_vsetvl::backward_demand_fusion): Ditto.
43047 (pass_vsetvl::forward_demand_fusion): Ditto.
43048 (pass_vsetvl::refine_vsetvls): Ditto.
43049 (pass_vsetvl::cleanup_vsetvls): Ditto.
43050 (pass_vsetvl::commit_vsetvls): Ditto.
43051 (pass_vsetvl::propagate_avl): Ditto.
43052 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
43053 (struct demands_pair): Ditto.
43054 (struct demands_cond): Ditto.
43055 (struct demands_fuse_rule): Ditto.
43056 * config/riscv/vector-iterators.md: New iterator.
43057 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
43058 (*pred_broadcast<mode>): Ditto.
43059 (*pred_broadcast<mode>_extended_scalar): Ditto.
43060 (@pred_extract_first<mode>): Ditto.
43061 (*pred_extract_first<mode>): Ditto.
43062 (@pred_extract_first_trunc<mode>): Ditto.
43063 * config/riscv/riscv-vsetvl.def: New file.
43065 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
43067 * config/riscv/bitmanip.md: allow 0 constant in max/min
43070 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
43072 * config/riscv/bitmanip.md: Fix wrong index in the check.
43074 2023-03-04 Jakub Jelinek <jakub@redhat.com>
43076 PR middle-end/109006
43077 * vec.cc (test_auto_alias): Adjust comment for removal of
43079 * read-rtl-function.cc (function_reader::parse_block): Likewise.
43080 * gdbhooks.py: Likewise.
43082 2023-03-04 Jakub Jelinek <jakub@redhat.com>
43084 PR testsuite/108973
43085 * selftest-diagnostic.cc
43086 (test_diagnostic_context::test_diagnostic_context): Set
43087 caret_max_width to 80.
43089 2023-03-03 Alexandre Oliva <oliva@adacore.com>
43091 * gimple-ssa-warn-access.cc
43092 (pass_waccess::check_dangling_stores): Skip non-stores.
43094 2023-03-03 Alexandre Oliva <oliva@adacore.com>
43096 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
43097 after vmsr and vmrs, and lower the case of P0.
43099 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
43101 PR middle-end/109006
43102 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
43104 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
43106 PR middle-end/109006
43107 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
43109 2023-03-03 Jakub Jelinek <jakub@redhat.com>
43112 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
43113 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
43114 suppressed on stmt. For [static %E] warning, print access_nelts
43115 rather than access_size. Fix up comment wording.
43117 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
43119 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
43120 arch14 instead of z16.
43122 2023-03-03 Anthony Green <green@moxielogic.com>
43124 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
43126 2023-03-03 Anthony Green <green@moxielogic.com>
43128 * config/moxie/constraints.md (A, B, W): Change
43129 define_constraint to define_memory_constraint.
43131 2023-03-03 Xi Ruoyao <xry111@xry111.site>
43133 * toplev.cc (process_options): Fix the spelling of
43134 "-fstack-clash-protection".
43136 2023-03-03 Richard Biener <rguenther@suse.de>
43138 PR tree-optimization/109002
43139 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
43140 PHI-translate ANTIC_IN.
43142 2023-03-03 Jakub Jelinek <jakub@redhat.com>
43144 PR tree-optimization/108988
43145 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
43146 size_type_node before passing it as argument to fwrite. Formatting
43149 2023-03-03 Richard Biener <rguenther@suse.de>
43152 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
43153 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
43154 * config/i386/i386-features.h (scalar_chain::max_visits): New.
43155 (scalar_chain::build): Add bitmap parameter, return boolean.
43156 (scalar_chain::add_insn): Likewise.
43157 (scalar_chain::analyze_register_chain): Likewise.
43158 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
43159 Initialize max_visits.
43160 (scalar_chain::analyze_register_chain): When we exhaust
43161 max_visits, abort. Also abort when running into any
43163 (scalar_chain::add_insn): Propagate abort.
43164 (scalar_chain::build): Likewise. When aborting amend
43165 the set of disallowed insn with the insns set.
43166 (convert_scalars_to_vector): Adjust. Do not convert aborted
43169 2023-03-03 Richard Biener <rguenther@suse.de>
43172 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
43173 generate a DIE for a function scope static.
43175 2023-03-03 Alexandre Oliva <oliva@adacore.com>
43177 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
43179 2023-03-02 Jakub Jelinek <jakub@redhat.com>
43182 * target.h (emit_support_tinfos_callback): New typedef.
43183 * targhooks.h (default_emit_support_tinfos): Declare.
43184 * targhooks.cc (default_emit_support_tinfos): New function.
43185 * target.def (emit_support_tinfos): New target hook.
43186 * doc/tm.texi.in (emit_support_tinfos): Document it.
43187 * doc/tm.texi: Regenerated.
43188 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
43189 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
43191 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
43193 * ira-costs.cc: Include print-rtl.h.
43194 (record_reg_classes, scan_one_insn): Add code to print debug info.
43195 (record_operand_costs): Find and use smaller cost for hard reg
43198 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
43199 Paul-Antoine Arras <pa@codesourcery.com>
43201 * builtins.cc (mathfn_built_in_explicit): New.
43202 * config/gcn/gcn.cc: Include case-cfn-macros.h.
43203 (mathfn_built_in_explicit): Add prototype.
43204 (gcn_vectorize_builtin_vectorized_function): New.
43205 (gcn_libc_has_function): New.
43206 (TARGET_LIBC_HAS_FUNCTION): Define.
43207 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
43209 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
43211 PR tree-optimization/108979
43212 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
43213 operations on invariants.
43215 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
43217 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
43218 * config/s390/s390.cc (s390_option_override_internal): Make
43219 partial vector usage the default from z13 on.
43220 * config/s390/vector.md (len_load_v16qi): Add.
43221 (len_store_v16qi): Add.
43223 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
43225 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
43226 of constant 0 offset.
43228 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
43230 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
43232 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
43234 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
43236 * config.gcc: add -with-{no-}msa build option.
43237 * config/mips/mips.h: Likewise.
43238 * doc/install.texi: Likewise.
43240 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
43242 PR tree-optimization/108603
43243 * explow.cc (convert_memory_address_addr_space_1): Only wrap
43244 the result of a recursive call in a CONST if no instructions
43247 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
43249 PR tree-optimization/108430
43250 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
43251 of inverted condition.
43253 2023-03-02 Jakub Jelinek <jakub@redhat.com>
43256 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
43257 comparison copy the bytes from ptr to a temporary buffer and clearing
43258 padding bits in there.
43260 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
43262 PR middle-end/108545
43263 * gimplify.cc (struct tree_operand_hash_no_se): New.
43264 (omp_index_mapping_groups_1, omp_index_mapping_groups,
43265 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
43266 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
43267 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
43268 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
43269 of tree_operand_hash.
43271 2023-03-01 LIU Hao <lh_mouse@126.com>
43274 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
43275 Remove the size limit `pch_VA_max_size`
43277 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
43279 PR middle-end/108546
43280 * omp-low.cc (lower_omp_target): Remove optional handling
43281 on the receiver side, i.e. inside target (data), for
43284 2023-03-01 Jakub Jelinek <jakub@redhat.com>
43287 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
43288 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
43290 2023-03-01 Richard Biener <rguenther@suse.de>
43292 PR tree-optimization/108970
43293 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
43294 Check we can copy the BBs.
43295 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
43297 (vect_do_peeling): Streamline error handling.
43299 2023-03-01 Richard Biener <rguenther@suse.de>
43301 PR tree-optimization/108950
43302 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
43303 Check oprnd0 is defined in the loop.
43304 * tree-vect-loop.cc (vectorizable_reduction): Record all
43305 operands vector types, compute that of invariants and
43306 properly update their SLP nodes.
43308 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
43311 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
43312 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
43314 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
43316 PR middle-end/107411
43317 PR middle-end/107411
43318 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
43320 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
43321 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
43323 2023-02-28 Jakub Jelinek <jakub@redhat.com>
43325 PR sanitizer/108894
43326 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
43327 comparison rather than index > bound.
43328 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
43329 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
43330 * doc/invoke.texi (-fsanitize=bounds): Document that whether
43331 flexible array member-like arrays are instrumented or not depends
43332 on -fstrict-flex-arrays* options of strict_flex_array attributes.
43333 (-fsanitize=bounds-strict): Document that flexible array members
43334 are not instrumented.
43336 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
43340 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
43341 (fmod<mode>3): Ditto.
43342 (fpremxf4_i387): Ditto.
43343 (reminderxf3): Ditto.
43344 (reminder<mode>3): Ditto.
43345 (fprem1xf4_i387): Ditto.
43347 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
43349 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
43350 generating FFS with mismatched operand and result modes, by using
43351 an explicit SIGN_EXTEND/ZERO_EXTEND.
43352 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
43353 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
43355 2023-02-27 Patrick Palka <ppalka@redhat.com>
43357 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
43358 * lra-int.h (lra_change_class): Likewise.
43359 * recog.h (which_op_alt): Likewise.
43360 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
43363 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43365 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
43367 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
43369 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
43370 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
43372 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
43374 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
43375 (xtensa_get_config_v3): New functions.
43377 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43379 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
43381 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
43383 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
43384 the macro to 0x1000000000.
43386 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
43389 * doc/gm2.texi (-fm2-pathname): New option documented.
43390 (-fm2-pathnameI): New option documented.
43391 (-fm2-prefix=): New option documented.
43392 (-fruntime-modules=): Update default module list.
43394 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
43397 * config/xtensa/xtensa-protos.h
43398 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
43399 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
43400 to xtensa_expand_call.
43401 (xtensa_expand_call): Emit the call and add a clobber expression
43402 for the static chain to it in case of windowed ABI.
43403 * config/xtensa/xtensa.md (call, call_value, sibcall)
43404 (sibcall_value): Call xtensa_expand_call and complete expansion
43405 right after that call.
43407 2023-02-24 Richard Biener <rguenther@suse.de>
43409 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
43410 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
43411 changing alignment of vec<T, A, vl_embed> and simplifying
43413 (vec<T, A, vl_embed>::address): Compute as this + 1.
43414 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
43415 vector instead of the offset of the m_vecdata member.
43416 (auto_vec<T, N>::m_data): Turn storage into
43417 uninitialized unsigned char.
43418 (auto_vec<T, N>::auto_vec): Allow allocation of one
43419 stack member. Initialize m_vec in a special way to
43420 avoid later stringop overflow diagnostics.
43421 * vec.cc (test_auto_alias): New.
43422 (vec_cc_tests): Call it.
43424 2023-02-24 Richard Biener <rguenther@suse.de>
43426 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
43427 take a const reference to the object, use address to
43429 (vec<T, A, vl_embed>::contains): Use address to access data.
43430 (vec<T, A, vl_embed>::operator[]): Use address instead of
43431 m_vecdata to access data.
43432 (vec<T, A, vl_embed>::iterate): Likewise.
43433 (vec<T, A, vl_embed>::copy): Likewise.
43434 (vec<T, A, vl_embed>::quick_push): Likewise.
43435 (vec<T, A, vl_embed>::pop): Likewise.
43436 (vec<T, A, vl_embed>::quick_insert): Likewise.
43437 (vec<T, A, vl_embed>::ordered_remove): Likewise.
43438 (vec<T, A, vl_embed>::unordered_remove): Likewise.
43439 (vec<T, A, vl_embed>::block_remove): Likewise.
43440 (vec<T, A, vl_heap>::address): Likewise.
43442 2023-02-24 Martin Liska <mliska@suse.cz>
43444 PR sanitizer/108834
43445 * asan.cc (asan_add_global): Use proper TU name for normal
43446 global variables (and aux_base_name for the artificial one).
43448 2023-02-24 Jakub Jelinek <jakub@redhat.com>
43450 * config/i386/i386-builtin.def: Update description of BDESC
43451 and BDESC_FIRST in file comment to include mask2.
43453 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43455 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
43457 2023-02-24 Jakub Jelinek <jakub@redhat.com>
43459 PR middle-end/108854
43460 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
43461 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
43462 nodes and adjust their DECL_CONTEXT.
43464 2023-02-24 Jakub Jelinek <jakub@redhat.com>
43467 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
43468 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
43469 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
43470 __builtin_ia32_cvtne2ps2bf16_v8bf,
43471 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
43472 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
43473 __builtin_ia32_cvtneps2bf16_v8sf_mask,
43474 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
43475 __builtin_ia32_cvtneps2bf16_v4sf_mask,
43476 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
43477 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
43478 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
43479 __builtin_ia32_dpbf16ps_v4sf_mask,
43480 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
43481 OPTION_MASK_ISA_AVX512VL.
43483 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
43485 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
43486 Add non-compact 32-bit multilibs.
43488 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
43490 * config/mips/mips.md (*clo<mode>2): New pattern.
43492 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
43494 * config/mips/mips.h (machine_function): New variable
43495 use_hazard_barrier_return_p.
43496 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
43497 (mips_hb_return_internal): New insn pattern.
43498 * config/mips/mips.cc (mips_attribute_table): Add attribute
43499 use_hazard_barrier_return.
43500 (mips_use_hazard_barrier_return_p): New static function.
43501 (mips_function_attr_inlinable_p): Likewise.
43502 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
43503 Emit error for unsupported architecture choice.
43504 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
43505 Return false for use_hazard_barrier_return.
43506 (mips_expand_epilogue): Emit hazard barrier return.
43507 * doc/extend.texi: Document use_hazard_barrier_return.
43509 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43511 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
43512 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
43513 for the gcc-internal headers.
43515 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43517 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
43518 and $(POSTCOMPILE) instead of manual dependency listing.
43519 * config/xtensa/xtensa-dynconfig.c: Rename to ...
43520 * config/xtensa/xtensa-dynconfig.cc: ... this.
43522 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
43524 * doc/cfg.texi: Reorder index entries around @items.
43525 * doc/cpp.texi: Ditto.
43526 * doc/cppenv.texi: Ditto.
43527 * doc/cppopts.texi: Ditto.
43528 * doc/generic.texi: Ditto.
43529 * doc/install.texi: Ditto.
43530 * doc/extend.texi: Ditto.
43531 * doc/invoke.texi: Ditto.
43532 * doc/md.texi: Ditto.
43533 * doc/rtl.texi: Ditto.
43534 * doc/tm.texi.in: Ditto.
43535 * doc/trouble.texi: Ditto.
43536 * doc/tm.texi: Regenerate.
43538 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43540 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
43541 the occurrence of general-purpose register used only once and for
43542 transferring intermediate value.
43544 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43546 * config/xtensa/xtensa.cc (machine_function): Add new member
43547 'eliminated_callee_saved_bmp'.
43548 (xtensa_can_eliminate_callee_saved_reg_p): New function to
43549 determine whether the register can be eliminated or not.
43550 (xtensa_expand_prologue): Add invoking the above function and
43551 elimination the use of callee-saved register by using its stack
43552 slot through the stack pointer (or the frame pointer if needed)
43554 (xtensa_expand_prologue): Modify to not emit register restoration
43555 insn from its stack slot if the register is already eliminated.
43557 2023-02-23 Jakub Jelinek <jakub@redhat.com>
43559 PR translation/108890
43560 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
43561 around fatal_error format strings.
43563 2023-02-23 Richard Biener <rguenther@suse.de>
43565 * tree-ssa-structalias.cc (handle_lhs_call): Do not
43566 re-create rhsc, only truncate it.
43568 2023-02-23 Jakub Jelinek <jakub@redhat.com>
43570 PR middle-end/106258
43571 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
43572 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
43574 2023-02-23 Richard Biener <rguenther@suse.de>
43576 * tree-if-conv.cc (tree_if_conversion): Properly manage
43577 memory of refs and the contained data references.
43579 2023-02-23 Richard Biener <rguenther@suse.de>
43581 PR tree-optimization/108888
43582 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
43583 calls to predicate.
43584 (predicate_statements): Only predicate calls with PLF_2.
43586 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43588 * config/xtensa/xtensa.md
43589 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
43590 Add missing "SI:" to PLUS RTXes.
43592 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43595 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
43596 Emit (use (reg:SI A0_REG)) at the end in the sibling call
43597 (i.e. the same place as (return) in the normal call).
43599 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43602 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
43605 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
43607 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
43608 (sibcall_value, sibcall_value_internal): Add 'use' expression
43611 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
43613 * doc/cppdiropts.texi: Reorder @opindex commands to precede
43614 @items they relate to.
43615 * doc/cppopts.texi: Ditto.
43616 * doc/cppwarnopts.texi: Ditto.
43617 * doc/invoke.texi: Ditto.
43618 * doc/lto.texi: Ditto.
43620 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
43622 * internal-fn.cc (expand_MASK_CALL): New.
43623 * internal-fn.def (MASK_CALL): New.
43624 * internal-fn.h (expand_MASK_CALL): New prototype.
43625 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
43626 for mask arguments also.
43627 * tree-if-conv.cc: Include cgraph.h.
43628 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
43629 (predicate_statements): Convert functions to IFN_MASK_CALL.
43630 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
43631 IFN_MASK_CALL as a SIMD function call.
43632 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
43633 IFN_MASK_CALL as an inbranch SIMD function call.
43634 Generate the mask vector arguments.
43636 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43638 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
43639 (class widen_reducop): Ditto.
43640 (class freducop): Ditto.
43641 (class widen_freducop): Ditto.
43643 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43644 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
43653 (vwredsumu): Ditto.
43654 (vfredusum): Ditto.
43655 (vfredosum): Ditto.
43658 (vfwredosum): Ditto.
43659 (vfwredusum): Ditto.
43660 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
43662 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43663 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
43664 (DEF_RVV_WU_OPS): Ditto.
43665 (DEF_RVV_WF_OPS): Ditto.
43666 (vint8mf8_t): Ditto.
43667 (vint8mf4_t): Ditto.
43668 (vint8mf2_t): Ditto.
43669 (vint8m1_t): Ditto.
43670 (vint8m2_t): Ditto.
43671 (vint8m4_t): Ditto.
43672 (vint8m8_t): Ditto.
43673 (vint16mf4_t): Ditto.
43674 (vint16mf2_t): Ditto.
43675 (vint16m1_t): Ditto.
43676 (vint16m2_t): Ditto.
43677 (vint16m4_t): Ditto.
43678 (vint16m8_t): Ditto.
43679 (vint32mf2_t): Ditto.
43680 (vint32m1_t): Ditto.
43681 (vint32m2_t): Ditto.
43682 (vint32m4_t): Ditto.
43683 (vint32m8_t): Ditto.
43684 (vuint8mf8_t): Ditto.
43685 (vuint8mf4_t): Ditto.
43686 (vuint8mf2_t): Ditto.
43687 (vuint8m1_t): Ditto.
43688 (vuint8m2_t): Ditto.
43689 (vuint8m4_t): Ditto.
43690 (vuint8m8_t): Ditto.
43691 (vuint16mf4_t): Ditto.
43692 (vuint16mf2_t): Ditto.
43693 (vuint16m1_t): Ditto.
43694 (vuint16m2_t): Ditto.
43695 (vuint16m4_t): Ditto.
43696 (vuint16m8_t): Ditto.
43697 (vuint32mf2_t): Ditto.
43698 (vuint32m1_t): Ditto.
43699 (vuint32m2_t): Ditto.
43700 (vuint32m4_t): Ditto.
43701 (vuint32m8_t): Ditto.
43702 (vfloat32mf2_t): Ditto.
43703 (vfloat32m1_t): Ditto.
43704 (vfloat32m2_t): Ditto.
43705 (vfloat32m4_t): Ditto.
43706 (vfloat32m8_t): Ditto.
43707 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
43708 (DEF_RVV_WU_OPS): Ditto.
43709 (DEF_RVV_WF_OPS): Ditto.
43710 (required_extensions_p): Add reduction support.
43711 (rvv_arg_type_info::get_base_vector_type): Ditto.
43712 (rvv_arg_type_info::get_tree_type): Ditto.
43713 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
43714 * config/riscv/riscv.md: Ditto.
43715 * config/riscv/vector-iterators.md (minu): Ditto.
43716 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
43717 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
43718 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
43719 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
43720 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
43721 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
43722 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
43724 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43726 * config/riscv/iterators.md: New iterator.
43727 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
43728 (enum ternop_type): New enum.
43729 (class vmacc): New class.
43730 (class imac): Ditto.
43731 (class vnmsac): Ditto.
43732 (enum widen_ternop_type): New enum.
43733 (class vmadd): Ditto.
43734 (class vnmsub): Ditto.
43735 (class iwmac): Ditto.
43736 (class vwmacc): Ditto.
43737 (class vwmaccu): Ditto.
43738 (class vwmaccsu): Ditto.
43739 (class vwmaccus): Ditto.
43740 (class reverse_binop): Ditto.
43741 (class vfmacc): Ditto.
43742 (class vfnmsac): Ditto.
43743 (class vfmadd): Ditto.
43744 (class vfnmsub): Ditto.
43745 (class vfnmacc): Ditto.
43746 (class vfmsac): Ditto.
43747 (class vfnmadd): Ditto.
43748 (class vfmsub): Ditto.
43749 (class vfwmacc): Ditto.
43750 (class vfwnmacc): Ditto.
43751 (class vfwmsac): Ditto.
43752 (class vfwnmsac): Ditto.
43753 (class float_misc): Ditto.
43754 (class fcmp): Ditto.
43755 (class vfclass): Ditto.
43756 (class vfcvt_x): Ditto.
43757 (class vfcvt_rtz_x): Ditto.
43758 (class vfcvt_f): Ditto.
43759 (class vfwcvt_x): Ditto.
43760 (class vfwcvt_rtz_x): Ditto.
43761 (class vfwcvt_f): Ditto.
43762 (class vfncvt_x): Ditto.
43763 (class vfncvt_rtz_x): Ditto.
43764 (class vfncvt_f): Ditto.
43765 (class vfncvt_rod_f): Ditto.
43767 * config/riscv/riscv-vector-builtins-bases.h:
43768 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
43812 (vfcvt_rtz_x): Ditto.
43813 (vfcvt_rtz_xu): Ditto.
43816 (vfwcvt_xu): Ditto.
43817 (vfwcvt_rtz_x): Ditto.
43818 (vfwcvt_rtz_xu): Ditto.
43821 (vfncvt_xu): Ditto.
43822 (vfncvt_rtz_x): Ditto.
43823 (vfncvt_rtz_xu): Ditto.
43825 (vfncvt_rod_f): Ditto.
43826 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
43827 (struct move_def): Ditto.
43828 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
43829 (DEF_RVV_CONVERT_I_OPS): Ditto.
43830 (DEF_RVV_CONVERT_U_OPS): Ditto.
43831 (DEF_RVV_WCONVERT_I_OPS): Ditto.
43832 (DEF_RVV_WCONVERT_U_OPS): Ditto.
43833 (DEF_RVV_WCONVERT_F_OPS): Ditto.
43834 (vfloat64m1_t): Ditto.
43835 (vfloat64m2_t): Ditto.
43836 (vfloat64m4_t): Ditto.
43837 (vfloat64m8_t): Ditto.
43838 (vint32mf2_t): Ditto.
43839 (vint32m1_t): Ditto.
43840 (vint32m2_t): Ditto.
43841 (vint32m4_t): Ditto.
43842 (vint32m8_t): Ditto.
43843 (vint64m1_t): Ditto.
43844 (vint64m2_t): Ditto.
43845 (vint64m4_t): Ditto.
43846 (vint64m8_t): Ditto.
43847 (vuint32mf2_t): Ditto.
43848 (vuint32m1_t): Ditto.
43849 (vuint32m2_t): Ditto.
43850 (vuint32m4_t): Ditto.
43851 (vuint32m8_t): Ditto.
43852 (vuint64m1_t): Ditto.
43853 (vuint64m2_t): Ditto.
43854 (vuint64m4_t): Ditto.
43855 (vuint64m8_t): Ditto.
43856 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
43857 (DEF_RVV_CONVERT_U_OPS): Ditto.
43858 (DEF_RVV_WCONVERT_I_OPS): Ditto.
43859 (DEF_RVV_WCONVERT_U_OPS): Ditto.
43860 (DEF_RVV_WCONVERT_F_OPS): Ditto.
43861 (DEF_RVV_F_OPS): Ditto.
43862 (DEF_RVV_WEXTF_OPS): Ditto.
43863 (required_extensions_p): Adjust for floating-point support.
43864 (check_required_extensions): Ditto.
43865 (unsigned_base_type_p): Ditto.
43866 (get_mode_for_bitsize): Ditto.
43867 (rvv_arg_type_info::get_base_vector_type): Ditto.
43868 (rvv_arg_type_info::get_tree_type): Ditto.
43869 * config/riscv/riscv-vector-builtins.def (v_f): New define.
43872 (xu_v): New define.
43874 (xu_w): New define.
43875 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
43876 (function_expander::arg_mode): New function.
43877 * config/riscv/vector-iterators.md (sof): New iterator.
43883 (fixuns_trunc): Ditto.
43885 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
43886 (@pred_<optab><mode>): Ditto.
43887 (@pred_<optab><mode>_scalar): Ditto.
43888 (@pred_<optab><mode>_reverse_scalar): Ditto.
43889 (@pred_<copysign><mode>): Ditto.
43890 (@pred_<copysign><mode>_scalar): Ditto.
43891 (@pred_mul_<optab><mode>): Ditto.
43892 (pred_mul_<optab><mode>_undef_merge): Ditto.
43893 (*pred_<madd_nmsub><mode>): Ditto.
43894 (*pred_<macc_nmsac><mode>): Ditto.
43895 (*pred_mul_<optab><mode>): Ditto.
43896 (@pred_mul_<optab><mode>_scalar): Ditto.
43897 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
43898 (*pred_<madd_nmsub><mode>_scalar): Ditto.
43899 (*pred_<macc_nmsac><mode>_scalar): Ditto.
43900 (*pred_mul_<optab><mode>_scalar): Ditto.
43901 (@pred_neg_mul_<optab><mode>): Ditto.
43902 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
43903 (*pred_<nmadd_msub><mode>): Ditto.
43904 (*pred_<nmacc_msac><mode>): Ditto.
43905 (*pred_neg_mul_<optab><mode>): Ditto.
43906 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
43907 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
43908 (*pred_<nmadd_msub><mode>_scalar): Ditto.
43909 (*pred_<nmacc_msac><mode>_scalar): Ditto.
43910 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
43911 (@pred_<misc_op><mode>): Ditto.
43912 (@pred_class<mode>): Ditto.
43913 (@pred_dual_widen_<optab><mode>): Ditto.
43914 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
43915 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
43916 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
43917 (@pred_widen_mul_<optab><mode>): Ditto.
43918 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
43919 (@pred_widen_neg_mul_<optab><mode>): Ditto.
43920 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
43921 (@pred_cmp<mode>): Ditto.
43922 (*pred_cmp<mode>): Ditto.
43923 (*pred_cmp<mode>_narrow): Ditto.
43924 (@pred_cmp<mode>_scalar): Ditto.
43925 (*pred_cmp<mode>_scalar): Ditto.
43926 (*pred_cmp<mode>_scalar_narrow): Ditto.
43927 (@pred_eqne<mode>_scalar): Ditto.
43928 (*pred_eqne<mode>_scalar): Ditto.
43929 (*pred_eqne<mode>_scalar_narrow): Ditto.
43930 (@pred_merge<mode>_scalar): Ditto.
43931 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
43932 (@pred_<fix_cvt><mode>): Ditto.
43933 (@pred_<float_cvt><mode>): Ditto.
43934 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
43935 (@pred_widen_<fix_cvt><mode>): Ditto.
43936 (@pred_widen_<float_cvt><mode>): Ditto.
43937 (@pred_extend<mode>): Ditto.
43938 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
43939 (@pred_narrow_<fix_cvt><mode>): Ditto.
43940 (@pred_narrow_<float_cvt><mode>): Ditto.
43941 (@pred_trunc<mode>): Ditto.
43942 (@pred_rod_trunc<mode>): Ditto.
43944 2023-02-22 Jakub Jelinek <jakub@redhat.com>
43946 PR middle-end/106258
43947 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
43948 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
43949 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
43950 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
43952 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
43954 * common.opt (-Wcomplain-wrong-lang): New.
43955 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
43956 * opts-common.cc (prune_options): Handle it.
43957 * opts-global.cc (complain_wrong_lang): Use it.
43959 2023-02-21 David Malcolm <dmalcolm@redhat.com>
43962 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
43964 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
43967 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
43969 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
43970 (sibcall_value, sibcall_value_internal): Add 'use' expression
43973 2023-02-21 Richard Biener <rguenther@suse.de>
43975 PR tree-optimization/108691
43976 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
43977 assert about calls_setjmp not becoming true when it was false.
43979 2023-02-21 Richard Biener <rguenther@suse.de>
43981 PR tree-optimization/108793
43982 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
43983 Use convert operands to niter_type when computing num.
43985 2023-02-21 Richard Biener <rguenther@suse.de>
43988 2023-02-13 Richard Biener <rguenther@suse.de>
43990 PR tree-optimization/108691
43991 * tree-cfg.cc (notice_special_calls): When the CFG is built
43992 honor gimple_call_ctrl_altering_p.
43993 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
43994 temporarily if the call is not control-altering.
43995 * calls.cc (emit_call_1): Do not add REG_SETJMP if
43996 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
43998 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44000 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
44001 true if register A0 (return address register) when -Og is specified.
44003 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
44005 * config/i386/predicates.md
44006 (general_x64constmem_operand): New predicate.
44007 * config/i386/i386.md (*cmpqi_ext<mode>_1):
44008 Use nonimm_x64constmem_operand.
44009 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
44010 (*addqi_ext<mode>_1): Ditto.
44011 (*testqi_ext<mode>_1): Ditto.
44012 (*andqi_ext<mode>_1): Ditto.
44013 (*andqi_ext<mode>_1_cc): Ditto.
44014 (*<any_or:code>qi_ext<mode>_1): Ditto.
44015 (*xorqi_ext<mode>_1_cc): Ditto.
44017 2023-02-20 Jakub Jelinek <jakub2redhat.com>
44020 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
44021 gen_umadddi4_highpart{,_le}.
44023 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
44025 * config/riscv/riscv.md (prefetch): Use r instead of p for the
44027 (riscv_prefetchi_<mode>): Ditto.
44029 2023-02-20 Richard Biener <rguenther@suse.de>
44031 PR tree-optimization/108816
44032 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
44033 versioning condition split prerequesite, assert required
44036 2023-02-20 Richard Biener <rguenther@suse.de>
44038 PR tree-optimization/108825
44039 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
44040 loop-local verfication only verify there's no pending SSA
44043 2023-02-20 Richard Biener <rguenther@suse.de>
44045 PR tree-optimization/108819
44046 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
44047 we have an SSA name as iv_2 as expected.
44049 2023-02-18 Jakub Jelinek <jakub@redhat.com>
44051 PR tree-optimization/108819
44052 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
44054 2023-02-18 Jakub Jelinek <jakub@redhat.com>
44057 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
44058 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
44060 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
44061 with ix86_replace_reg_with_reg.
44063 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
44065 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
44067 2023-02-18 Xi Ruoyao <xry111@xry111.site>
44069 * config.gcc (triplet_abi): Set its value based on $with_abi,
44070 instead of $target.
44071 (la_canonical_triplet): Set it after $triplet_abi is set
44073 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
44074 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
44077 2023-02-18 Andrew Pinski <apinski@marvell.com>
44079 * match.pd: Remove #if GIMPLE around the
44082 2023-02-18 Andrew Pinski <apinski@marvell.com>
44084 * value-query.h (get_range_query): Return the global ranges
44085 for a nullptr func.
44087 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
44089 * doc/invoke.texi (@item -Wall): Fix typo in
44092 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
44095 * config/i386/predicates.md
44096 (nonimm_x64constmem_operand): New predicate.
44097 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
44098 (*subqi_ext<mode>_0): Ditto.
44099 (*andqi_ext<mode>_0): Ditto.
44100 (*<any_or:code>qi_ext<mode>_0): Ditto.
44102 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
44105 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
44106 int_outermode instead of GET_MODE (tem) to prevent
44107 VOIDmode from entering simplify_gen_subreg.
44109 2023-02-17 Richard Biener <rguenther@suse.de>
44111 PR tree-optimization/108821
44112 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
44113 move volatile accesses.
44115 2023-02-17 Richard Biener <rguenther@suse.de>
44117 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
44118 called on virtual operands.
44119 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
44120 ssa_undefined_value_p calls.
44121 (vn_phi_insert): Likewise.
44122 (set_ssa_val_to): Likewise.
44123 (visit_phi): Avoid extra work with equivalences for
44124 virtual operand PHIs.
44126 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44128 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
44130 (class mask_nlogic): Ditto.
44131 (class mask_notlogic): Ditto.
44132 (class vmmv): Ditto.
44133 (class vmclr): Ditto.
44134 (class vmset): Ditto.
44135 (class vmnot): Ditto.
44136 (class vcpop): Ditto.
44137 (class vfirst): Ditto.
44138 (class mask_misc): Ditto.
44139 (class viota): Ditto.
44140 (class vid): Ditto.
44142 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44143 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
44162 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
44163 (struct mask_alu_def): Ditto.
44165 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44166 * config/riscv/riscv-vector-builtins.cc: Ditto.
44167 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
44168 for dest it scalar RVV intrinsics.
44169 * config/riscv/vector-iterators.md (sof): New iterator.
44170 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
44171 (@pred_<optab>not<mode>): New pattern.
44172 (@pred_popcount<VB:mode><P:mode>): New pattern.
44173 (@pred_ffs<VB:mode><P:mode>): New pattern.
44174 (@pred_<misc_op><mode>): New pattern.
44175 (@pred_iota<mode>): New pattern.
44176 (@pred_series<mode>): New pattern.
44178 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44180 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
44184 * config/riscv/riscv-vector-builtins.cc: Ditto.
44186 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44187 kito-cheng <kito.cheng@sifive.com>
44189 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
44190 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
44191 (sew64_scalar_helper): New function.
44192 * config/riscv/vector.md: Normalization.
44194 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44196 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
44258 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44260 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
44261 (@pred_<optab><mode>_scalar): Ditto.
44262 (*pred_<optab><mode>_scalar): Ditto.
44263 (*pred_<optab><mode>_extended_scalar): Ditto.
44265 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44267 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
44268 (init_builtins): Ditto.
44269 (mangle_builtin_type): Ditto.
44270 (verify_type_context): Ditto.
44271 (handle_pragma_vector): Ditto.
44272 (builtin_decl): Ditto.
44273 (expand_builtin): Ditto.
44274 (const_vec_all_same_in_range_p): Ditto.
44275 (legitimize_move): Ditto.
44276 (emit_vlmax_op): Ditto.
44277 (emit_nonvlmax_op): Ditto.
44278 (get_vlmul): Ditto.
44279 (get_ratio): Ditto.
44282 (get_avl_type): Ditto.
44283 (calculate_ratio): Ditto.
44284 (enum vlmul_type): Ditto.
44286 (neg_simm5_p): Ditto.
44287 (has_vi_variant_p): Ditto.
44289 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44291 * config/riscv/riscv-protos.h (simm32_p): Remove.
44292 * config/riscv/riscv-v.cc (simm32_p): Ditto.
44293 * config/riscv/vector.md: Use immediate_operand
44294 instead of riscv_vector::simm32_p.
44296 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
44298 * doc/invoke.texi (Optimize Options): Reword the explanation
44299 getting minimal, maximal and default values of a parameter.
44301 2023-02-16 Patrick Palka <ppalka@redhat.com>
44303 * addresses.h: Mechanically drop 'static' from 'static inline'
44304 functions via s/^static inline/inline/g.
44305 * asan.h: Likewise.
44306 * attribs.h: Likewise.
44307 * basic-block.h: Likewise.
44308 * bitmap.h: Likewise.
44309 * cfghooks.h: Likewise.
44310 * cfgloop.h: Likewise.
44311 * cgraph.h: Likewise.
44312 * cselib.h: Likewise.
44313 * data-streamer.h: Likewise.
44314 * debug.h: Likewise.
44316 * diagnostic.h: Likewise.
44317 * dominance.h: Likewise.
44318 * dumpfile.h: Likewise.
44319 * emit-rtl.h: Likewise.
44320 * except.h: Likewise.
44321 * expmed.h: Likewise.
44322 * expr.h: Likewise.
44323 * fixed-value.h: Likewise.
44324 * gengtype.h: Likewise.
44325 * gimple-expr.h: Likewise.
44326 * gimple-iterator.h: Likewise.
44327 * gimple-predict.h: Likewise.
44328 * gimple-range-fold.h: Likewise.
44329 * gimple-ssa.h: Likewise.
44330 * gimple.h: Likewise.
44331 * graphite.h: Likewise.
44332 * hard-reg-set.h: Likewise.
44333 * hash-map.h: Likewise.
44334 * hash-set.h: Likewise.
44335 * hash-table.h: Likewise.
44336 * hwint.h: Likewise.
44337 * input.h: Likewise.
44338 * insn-addr.h: Likewise.
44339 * internal-fn.h: Likewise.
44340 * ipa-fnsummary.h: Likewise.
44341 * ipa-icf-gimple.h: Likewise.
44342 * ipa-inline.h: Likewise.
44343 * ipa-modref.h: Likewise.
44344 * ipa-prop.h: Likewise.
44345 * ira-int.h: Likewise.
44347 * lra-int.h: Likewise.
44349 * lto-streamer.h: Likewise.
44350 * memmodel.h: Likewise.
44351 * omp-general.h: Likewise.
44352 * optabs-query.h: Likewise.
44353 * optabs.h: Likewise.
44354 * plugin.h: Likewise.
44355 * pretty-print.h: Likewise.
44356 * range.h: Likewise.
44357 * read-md.h: Likewise.
44358 * recog.h: Likewise.
44359 * regs.h: Likewise.
44360 * rtl-iter.h: Likewise.
44362 * sbitmap.h: Likewise.
44363 * sched-int.h: Likewise.
44364 * sel-sched-ir.h: Likewise.
44365 * sese.h: Likewise.
44366 * sparseset.h: Likewise.
44367 * ssa-iterators.h: Likewise.
44368 * system.h: Likewise.
44369 * target-globals.h: Likewise.
44370 * target.h: Likewise.
44371 * timevar.h: Likewise.
44372 * tree-chrec.h: Likewise.
44373 * tree-data-ref.h: Likewise.
44374 * tree-iterator.h: Likewise.
44375 * tree-outof-ssa.h: Likewise.
44376 * tree-phinodes.h: Likewise.
44377 * tree-scalar-evolution.h: Likewise.
44378 * tree-sra.h: Likewise.
44379 * tree-ssa-alias.h: Likewise.
44380 * tree-ssa-live.h: Likewise.
44381 * tree-ssa-loop-manip.h: Likewise.
44382 * tree-ssa-loop.h: Likewise.
44383 * tree-ssa-operands.h: Likewise.
44384 * tree-ssa-propagate.h: Likewise.
44385 * tree-ssa-sccvn.h: Likewise.
44386 * tree-ssa.h: Likewise.
44387 * tree-ssanames.h: Likewise.
44388 * tree-streamer.h: Likewise.
44389 * tree-switch-conversion.h: Likewise.
44390 * tree-vectorizer.h: Likewise.
44391 * tree.h: Likewise.
44392 * wide-int.h: Likewise.
44394 2023-02-16 Jakub Jelinek <jakub@redhat.com>
44396 PR tree-optimization/108657
44397 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
44398 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
44399 is a call to internal or builtin function.
44401 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
44403 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
44404 using-declaration to unhide functions.
44406 2023-02-16 Jakub Jelinek <jakub@redhat.com>
44408 PR tree-optimization/108783
44409 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
44410 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
44411 t to curr->op. Otherwise, punt if either newop1 or newop2 are
44412 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
44414 2023-02-16 Richard Biener <rguenther@suse.de>
44416 PR tree-optimization/108791
44417 * tree-ssa-forwprop.cc (optimize_vector_load): Build
44418 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
44421 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
44424 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
44425 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
44426 (ix86_expand_prologue): Likewise.
44428 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
44430 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
44432 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
44434 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
44435 int248_register_operand predicate in zero_extract sub-RTX.
44436 (*cmpqi_ext<mode>_2): Ditto.
44437 (*cmpqi_ext<mode>_3): Ditto.
44438 (*cmpqi_ext<mode>_4): Ditto.
44439 (*extzvqi_mem_rex64): Ditto.
44441 (*insvqi_1_mem_rex64): Ditto.
44442 (@insv<mode>_1): Ditto.
44443 (*insvqi_1): Ditto.
44444 (*insvqi_2): Ditto.
44445 (*insvqi_3): Ditto.
44446 (*extendqi<SWI24:mode>_ext_1): Ditto.
44447 (*addqi_ext<mode>_1): Ditto.
44448 (*addqi_ext<mode>_2): Ditto.
44449 (*subqi_ext<mode>_2): Ditto.
44450 (*testqi_ext<mode>_1): Ditto.
44451 (*testqi_ext<mode>_2): Ditto.
44452 (*andqi_ext<mode>_1): Ditto.
44453 (*andqi_ext<mode>_1_cc): Ditto.
44454 (*andqi_ext<mode>_2): Ditto.
44455 (*<any_or:code>qi_ext<mode>_1): Ditto.
44456 (*<any_or:code>qi_ext<mode>_2): Ditto.
44457 (*xorqi_ext<mode>_1_cc): Ditto.
44458 (*negqi_ext<mode>_2): Ditto.
44459 (*ashlqi_ext<mode>_2): Ditto.
44460 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
44462 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
44464 * config/i386/predicates.md (int248_register_operand):
44465 Rename from extr_register_operand.
44466 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
44467 (*extzx<mode>): Ditto.
44468 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
44469 (*ashl<mode>3_mask): Ditto.
44470 (*<any_shiftrt:insn><mode>3_mask): Ditto.
44471 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
44472 (*<any_rotate:insn><mode>3_mask): Ditto.
44473 (*<btsc><mode>_mask): Ditto.
44474 (*btr<mode>_mask): Ditto.
44475 (*jcc_bt<mode>_mask_1): Ditto.
44477 2023-02-15 Richard Biener <rguenther@suse.de>
44479 PR middle-end/26854
44480 * df-core.cc (df_worklist_propagate_forward): Put later
44481 blocks on worklist and only earlier blocks on pending.
44482 (df_worklist_propagate_backward): Likewise.
44483 (df_worklist_dataflow_doublequeue): Change the iteration
44484 to process new blocks in the same iteration if that
44485 maintains the iteration order.
44487 2023-02-15 Marek Polacek <polacek@redhat.com>
44489 PR middle-end/106080
44490 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
44493 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44495 * config/riscv/predicates.md: Refine codes.
44496 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
44497 * config/riscv/riscv-v.cc: Refine codes.
44498 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
44500 (class imac): New class.
44501 (enum widen_ternop_type): New enum.
44502 (class iwmac): New class.
44504 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44505 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
44513 * config/riscv/riscv-vector-builtins.cc
44514 (function_builder::apply_predication): Adjust for multiply-add support.
44515 (function_expander::add_vundef_operand): Refine codes.
44516 (function_expander::use_ternop_insn): New function.
44517 (function_expander::use_widen_ternop_insn): Ditto.
44518 * config/riscv/riscv-vector-builtins.h: New function.
44519 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
44520 (pred_mul_<optab><mode>_undef_merge): Ditto.
44521 (*pred_<madd_nmsub><mode>): Ditto.
44522 (*pred_<macc_nmsac><mode>): Ditto.
44523 (*pred_mul_<optab><mode>): Ditto.
44524 (@pred_mul_<optab><mode>_scalar): Ditto.
44525 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
44526 (*pred_<madd_nmsub><mode>_scalar): Ditto.
44527 (*pred_<macc_nmsac><mode>_scalar): Ditto.
44528 (*pred_mul_<optab><mode>_scalar): Ditto.
44529 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
44530 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
44531 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
44532 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
44533 (@pred_widen_mul_plus<su><mode>): Ditto.
44534 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
44535 (@pred_widen_mul_plussu<mode>): Ditto.
44536 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
44537 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
44539 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44541 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
44542 (vector_all_trues_mask_operand): New predicate.
44543 (vector_undef_operand): New predicate.
44544 (ltge_operator): New predicate.
44545 (comparison_except_ltge_operator): New predicate.
44546 (comparison_except_eqge_operator): New predicate.
44547 (ge_operator): New predicate.
44548 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
44549 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
44551 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44552 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
44562 * config/riscv/riscv-vector-builtins-shapes.cc
44563 (struct return_mask_def): Adjust for compare support.
44564 * config/riscv/riscv-vector-builtins.cc
44565 (function_expander::use_compare_insn): New function.
44566 * config/riscv/riscv-vector-builtins.h
44567 (function_expander::add_integer_operand): Ditto.
44568 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
44569 * config/riscv/riscv.md: Add vector min/max attributes.
44570 * config/riscv/vector-iterators.md (xnor): New iterator.
44571 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
44572 (*pred_cmp<mode>): Ditto.
44573 (*pred_cmp<mode>_narrow): Ditto.
44574 (@pred_ltge<mode>): Ditto.
44575 (*pred_ltge<mode>): Ditto.
44576 (*pred_ltge<mode>_narrow): Ditto.
44577 (@pred_cmp<mode>_scalar): Ditto.
44578 (*pred_cmp<mode>_scalar): Ditto.
44579 (*pred_cmp<mode>_scalar_narrow): Ditto.
44580 (@pred_eqne<mode>_scalar): Ditto.
44581 (*pred_eqne<mode>_scalar): Ditto.
44582 (*pred_eqne<mode>_scalar_narrow): Ditto.
44583 (*pred_cmp<mode>_extended_scalar): Ditto.
44584 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
44585 (*pred_eqne<mode>_extended_scalar): Ditto.
44586 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
44587 (@pred_ge<mode>_scalar): Ditto.
44588 (@pred_<optab><mode>): Ditto.
44589 (@pred_n<optab><mode>): Ditto.
44590 (@pred_<optab>n<mode>): Ditto.
44591 (@pred_not<mode>): Ditto.
44593 2023-02-15 Martin Jambor <mjambor@suse.cz>
44596 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
44597 creation of non-scalar replacements even if IPA-CP knows their
44600 2023-02-15 Jakub Jelinek <jakub@redhat.com>
44604 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
44605 expander, change operand 3 to be TImode, emit maddlddi4 and
44606 umadddi4_highpart{,_le} with its low half and finally add the high
44607 half to the result.
44609 2023-02-15 Martin Liska <mliska@suse.cz>
44611 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
44613 2023-02-15 Richard Biener <rguenther@suse.de>
44615 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
44616 for with_poison and alias worklist to it.
44617 (sanitize_asan_mark_poison): Likewise.
44619 2023-02-15 Richard Biener <rguenther@suse.de>
44622 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
44623 Combine bitmap test and set.
44624 (scalar_chain::add_insn): Likewise.
44625 (scalar_chain::analyze_register_chain): Remove redundant
44626 attempt to add to queue and instead strengthen assert.
44627 Sink common attempts to mark the def dual-mode.
44628 (scalar_chain::add_to_queue): Remove redundant insn bitmap
44631 2023-02-15 Richard Biener <rguenther@suse.de>
44634 * config/i386/i386-features.cc (convert_scalars_to_vector):
44635 Switch candidates bitmaps to tree view before building the chains.
44637 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
44639 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
44640 "failure trying to reload" call.
44642 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
44644 * gdbinit.in (phrs): New command.
44645 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
44646 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
44648 2023-02-14 David Faust <david.faust@oracle.com>
44651 * config/bpf/constraints.md (q): New memory constraint.
44652 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
44653 (zero_extendqidi2): Likewise.
44654 (zero_extendsidi2): Likewise.
44655 (*mov<MM:mode>): Likewise.
44657 2023-02-14 Andrew Pinski <apinski@marvell.com>
44659 PR tree-optimization/108355
44660 PR tree-optimization/96921
44661 * match.pd: Add pattern for "1 - bool_val".
44663 2023-02-14 Richard Biener <rguenther@suse.de>
44665 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
44666 basic block index hashing on the availability of ->cclhs.
44667 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
44668 rely on ->cclhs availability.
44669 (vn_phi_lookup): Set ->cclhs only when we are eventually
44670 going to CSE the PHI.
44671 (vn_phi_insert): Likewise.
44673 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
44675 * gimplify.cc (gimplify_save_expr): Add missing guard.
44677 2023-02-14 Richard Biener <rguenther@suse.de>
44679 PR tree-optimization/108782
44680 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
44681 Make sure we're not vectorizing an inner loop.
44683 2023-02-14 Jakub Jelinek <jakub@redhat.com>
44685 PR sanitizer/108777
44686 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
44687 * asan.h (asan_memfn_rtl): Declare.
44688 * asan.cc (asan_memfn_rtls): New variable.
44689 (asan_memfn_rtl): New function.
44690 * builtins.cc (expand_builtin): If
44691 param_asan_kernel_mem_intrinsic_prefix and function is
44692 kernel-{,hw}address sanitized, emit calls to
44693 __{,hw}asan_{memcpy,memmove,memset} rather than
44694 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
44695 instead of flag_sanitize & SANITIZE_ADDRESS to check if
44696 asan_intercepted_p functions shouldn't be expanded inline.
44698 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
44700 PR tree-optimization/96373
44701 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
44702 operations on the loop mask. Reject partial vectors if this isn't
44705 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
44707 PR rtl-optimization/108681
44708 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
44709 code to handle bare uses and clobbers.
44711 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
44713 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
44714 caller_save_p flag when clearing defined_p flag.
44715 (setup_reg_equiv): Ditto.
44716 * lra-constraints.cc (lra_constraints): Ditto.
44718 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
44721 * config/i386/predicates.md (extr_register_operand):
44722 New special predicate.
44723 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
44724 as operand 1 predicate.
44725 (*exzv<mode>): Ditto.
44726 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
44728 2023-02-13 Richard Biener <rguenther@suse.de>
44730 PR tree-optimization/28614
44731 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
44732 walking all edges in most cases.
44733 (vn_nary_op_insert_pieces_predicated): Avoid repeated
44734 calls to can_track_predicate_on_edge unless checking is
44736 (process_bb): Instead call it once here for each edge
44737 we register possibly multiple predicates on.
44739 2023-02-13 Richard Biener <rguenther@suse.de>
44741 PR tree-optimization/108691
44742 * tree-cfg.cc (notice_special_calls): When the CFG is built
44743 honor gimple_call_ctrl_altering_p.
44744 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
44745 temporarily if the call is not control-altering.
44746 * calls.cc (emit_call_1): Do not add REG_SETJMP if
44747 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
44749 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
44752 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
44753 (struct s390_sched_state): Initialise to zero.
44754 (s390_sched_variable_issue): For better debuggability also emit
44756 (s390_sched_init): Unconditionally reset scheduler state.
44758 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
44760 * ifcvt.h (noce_if_info::cond_inverted): New field.
44761 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
44762 values when cond_inverted is true.
44763 (noce_find_if_block): Allow the condition to be inverted when
44764 handling conditional moves.
44766 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
44768 * config/s390/predicates.md (execute_operation): Use
44769 constrain_operands instead of extract_constrain_insn in order to
44770 determine wheter there exists a valid alternative.
44772 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
44774 * common/config/arc/arc-common.cc (arc_option_optimization_table):
44775 Remove millicode from list.
44777 2023-02-13 Martin Liska <mliska@suse.cz>
44779 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
44781 2023-02-13 Richard Biener <rguenther@suse.de>
44783 PR tree-optimization/106722
44784 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
44785 whether we marked a stmt.
44786 (mark_control_dependent_edges_necessary): When
44787 mark_last_stmt_necessary didn't mark any stmt make sure
44788 to mark its control dependent edges.
44789 (propagate_necessity): Likewise.
44791 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
44793 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
44794 (DWARF_FRAME_REGISTERS): New.
44795 (DWARF_REG_TO_UNWIND_COLUMN): New.
44797 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
44799 * doc/sourcebuild.texi: Remove (broken) direct reference to
44800 "The GNU configure and build system".
44802 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
44804 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
44805 gen_add3_insn to gen_rtx_SET.
44806 (riscv_adjust_libcall_cfi_epilogue): Likewise.
44808 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44810 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
44811 (class vnclip): Ditto.
44813 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44814 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
44823 * config/riscv/vector-iterators.md (su): Add instruction.
44826 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
44827 (@pred_<sat_op><mode>_scalar): Ditto.
44828 (*pred_<sat_op><mode>_scalar): Ditto.
44829 (*pred_<sat_op><mode>_extended_scalar): Ditto.
44830 (@pred_narrow_clip<v_su><mode>): Ditto.
44831 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
44833 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44835 * config/riscv/constraints.md (Wbr): Remove unused constraint.
44836 * config/riscv/predicates.md: Fix move operand predicate.
44837 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
44838 (class vncvt_x): Ditto.
44839 (class vmerge): Ditto.
44840 (class vmv_v): Ditto.
44842 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44843 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
44850 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
44851 (struct move_def): Ditto.
44853 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44854 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
44855 (DEF_RVV_WEXTU_OPS): Ditto
44856 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
44861 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
44862 * config/riscv/vector-iterators.md (nmsac):New iterator.
44863 (nmsub): New iterator.
44864 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
44865 (@pred_merge<mode>_scalar): New pattern.
44866 (*pred_merge<mode>_scalar): New pattern.
44867 (*pred_merge<mode>_extended_scalar): New pattern.
44868 (@pred_narrow_<optab><mode>): New pattern.
44869 (@pred_narrow_<optab><mode>_scalar): New pattern.
44870 (@pred_trunc<mode>): New pattern.
44872 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44874 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
44875 (class vmsbc): Ditto.
44876 (BASE): Define new class.
44877 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44878 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
44880 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
44883 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44884 * config/riscv/riscv-vector-builtins.cc
44885 (function_expander::use_exact_insn): Adjust for new support
44886 * config/riscv/riscv-vector-builtins.h
44887 (function_base::has_merge_operand_p): New function.
44888 * config/riscv/vector-iterators.md: New iterator.
44889 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
44890 (@pred_msbc<mode>): Ditto.
44891 (@pred_madc<mode>_scalar): Ditto.
44892 (@pred_msbc<mode>_scalar): Ditto.
44893 (*pred_madc<mode>_scalar): Ditto.
44894 (*pred_madc<mode>_extended_scalar): Ditto.
44895 (*pred_msbc<mode>_scalar): Ditto.
44896 (*pred_msbc<mode>_extended_scalar): Ditto.
44897 (@pred_madc<mode>_overflow): Ditto.
44898 (@pred_msbc<mode>_overflow): Ditto.
44899 (@pred_madc<mode>_overflow_scalar): Ditto.
44900 (@pred_msbc<mode>_overflow_scalar): Ditto.
44901 (*pred_madc<mode>_overflow_scalar): Ditto.
44902 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
44903 (*pred_msbc<mode>_overflow_scalar): Ditto.
44904 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
44906 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44908 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
44909 * config/riscv/riscv-v.cc (simm32_p): Ditto.
44910 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
44911 (class vsbc): Ditto.
44913 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44914 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
44916 * config/riscv/riscv-vector-builtins-shapes.cc
44917 (struct no_mask_policy_def): Ditto.
44919 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44920 * config/riscv/riscv-vector-builtins.cc
44921 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
44922 (rvv_arg_type_info::get_tree_type): Ditto.
44923 (function_expander::use_exact_insn): Ditto.
44924 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
44925 (function_base::use_mask_predication_p): New function.
44926 * config/riscv/vector-iterators.md: New iterator.
44927 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
44928 (@pred_sbc<mode>): Ditto.
44929 (@pred_adc<mode>_scalar): Ditto.
44930 (@pred_sbc<mode>_scalar): Ditto.
44931 (*pred_adc<mode>_scalar): Ditto.
44932 (*pred_adc<mode>_extended_scalar): Ditto.
44933 (*pred_sbc<mode>_scalar): Ditto.
44934 (*pred_sbc<mode>_extended_scalar): Ditto.
44936 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44938 * config/riscv/vector.md: use "zero" reg.
44940 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44942 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
44944 (class vwmulsu): Ditto.
44945 (class vwcvt): Ditto.
44946 (BASE): Add integer widening support.
44947 * config/riscv/riscv-vector-builtins-bases.h: Ditto
44948 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
44949 (vwsub): New class.
44950 (vwmul): New class.
44951 (vwmulu): New class.
44952 (vwmulsu): New class.
44953 (vwaddu): New class.
44954 (vwsubu): New class.
44955 (vwcvt_x): New class.
44956 (vwcvtu_x): New class.
44957 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
44959 (struct widen_alu_def): New class.
44960 (SHAPE): New class.
44961 * config/riscv/riscv-vector-builtins-shapes.h: New class.
44962 * config/riscv/riscv-vector-builtins.cc
44963 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
44964 (rvv_arg_type_info::get_tree_type): Ditto.
44965 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
44967 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
44969 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
44970 * config/riscv/riscv.h (X0_REGNUM): New constant.
44971 * config/riscv/vector-iterators.md: New iterators.
44972 * config/riscv/vector.md
44973 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
44975 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
44977 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
44978 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
44980 (@pred_widen_mulsu<mode>): Ditto.
44981 (@pred_widen_mulsu<mode>_scalar): Ditto.
44982 (@pred_<optab><mode>): Ditto.
44984 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44985 kito-cheng <kito.cheng@sifive.com>
44987 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
44988 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
44990 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44991 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
44995 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
44997 (DEF_RVV_FULL_V_U_OPS): Ditto.
44998 (vint8mf8_t): Ditto.
44999 (vint8mf4_t): Ditto.
45000 (vint8mf2_t): Ditto.
45001 (vint8m1_t): Ditto.
45002 (vint8m2_t): Ditto.
45003 (vint8m4_t): Ditto.
45004 (vint8m8_t): Ditto.
45005 (vint16mf4_t): Ditto.
45006 (vint16mf2_t): Ditto.
45007 (vint16m1_t): Ditto.
45008 (vint16m2_t): Ditto.
45009 (vint16m4_t): Ditto.
45010 (vint16m8_t): Ditto.
45011 (vint32mf2_t): Ditto.
45012 (vint32m1_t): Ditto.
45013 (vint32m2_t): Ditto.
45014 (vint32m4_t): Ditto.
45015 (vint32m8_t): Ditto.
45016 (vint64m1_t): Ditto.
45017 (vint64m2_t): Ditto.
45018 (vint64m4_t): Ditto.
45019 (vint64m8_t): Ditto.
45020 (vuint8mf8_t): Ditto.
45021 (vuint8mf4_t): Ditto.
45022 (vuint8mf2_t): Ditto.
45023 (vuint8m1_t): Ditto.
45024 (vuint8m2_t): Ditto.
45025 (vuint8m4_t): Ditto.
45026 (vuint8m8_t): Ditto.
45027 (vuint16mf4_t): Ditto.
45028 (vuint16mf2_t): Ditto.
45029 (vuint16m1_t): Ditto.
45030 (vuint16m2_t): Ditto.
45031 (vuint16m4_t): Ditto.
45032 (vuint16m8_t): Ditto.
45033 (vuint32mf2_t): Ditto.
45034 (vuint32m1_t): Ditto.
45035 (vuint32m2_t): Ditto.
45036 (vuint32m4_t): Ditto.
45037 (vuint32m8_t): Ditto.
45038 (vuint64m1_t): Ditto.
45039 (vuint64m2_t): Ditto.
45040 (vuint64m4_t): Ditto.
45041 (vuint64m8_t): Ditto.
45042 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
45043 (DEF_RVV_FULL_V_U_OPS): Ditto.
45044 (check_required_extensions): Add vmulh support.
45045 (rvv_arg_type_info::get_tree_type): Ditto.
45046 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
45047 (enum rvv_base_type): Ditto.
45048 * config/riscv/riscv.opt: Add 'V' extension flag.
45049 * config/riscv/vector-iterators.md (su): New iterator.
45050 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
45051 (@pred_mulh<v_su><mode>_scalar): Ditto.
45052 (*pred_mulh<v_su><mode>_scalar): Ditto.
45053 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
45055 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45057 * config/riscv/iterators.md: Add sign_extend/zero_extend.
45058 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
45060 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
45061 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
45064 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
45065 for vsext/vzext support.
45066 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
45068 (DEF_RVV_QEXTI_OPS): Ditto.
45069 (DEF_RVV_OEXTI_OPS): Ditto.
45070 (DEF_RVV_WEXTU_OPS): Ditto.
45071 (DEF_RVV_QEXTU_OPS): Ditto.
45072 (DEF_RVV_OEXTU_OPS): Ditto.
45073 (vint16mf4_t): Ditto.
45074 (vint16mf2_t): Ditto.
45075 (vint16m1_t): Ditto.
45076 (vint16m2_t): Ditto.
45077 (vint16m4_t): Ditto.
45078 (vint16m8_t): Ditto.
45079 (vint32mf2_t): Ditto.
45080 (vint32m1_t): Ditto.
45081 (vint32m2_t): Ditto.
45082 (vint32m4_t): Ditto.
45083 (vint32m8_t): Ditto.
45084 (vint64m1_t): Ditto.
45085 (vint64m2_t): Ditto.
45086 (vint64m4_t): Ditto.
45087 (vint64m8_t): Ditto.
45088 (vuint16mf4_t): Ditto.
45089 (vuint16mf2_t): Ditto.
45090 (vuint16m1_t): Ditto.
45091 (vuint16m2_t): Ditto.
45092 (vuint16m4_t): Ditto.
45093 (vuint16m8_t): Ditto.
45094 (vuint32mf2_t): Ditto.
45095 (vuint32m1_t): Ditto.
45096 (vuint32m2_t): Ditto.
45097 (vuint32m4_t): Ditto.
45098 (vuint32m8_t): Ditto.
45099 (vuint64m1_t): Ditto.
45100 (vuint64m2_t): Ditto.
45101 (vuint64m4_t): Ditto.
45102 (vuint64m8_t): Ditto.
45103 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
45104 (DEF_RVV_QEXTI_OPS): Ditto.
45105 (DEF_RVV_OEXTI_OPS): Ditto.
45106 (DEF_RVV_WEXTU_OPS): Ditto.
45107 (DEF_RVV_QEXTU_OPS): Ditto.
45108 (DEF_RVV_OEXTU_OPS): Ditto.
45109 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
45111 (rvv_arg_type_info::get_tree_type): Ditto.
45112 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
45113 * config/riscv/vector-iterators.md (z): New attribute.
45114 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
45115 (@pred_<optab><mode>_vf4): Ditto.
45116 (@pred_<optab><mode>_vf8): Ditto.
45118 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45120 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
45121 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
45122 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
45123 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45124 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
45128 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
45133 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
45134 (@pred_<optab><mode>_scalar): New pattern.
45135 (*pred_<optab><mode>_scalar): New pattern.
45136 (*pred_<optab><mode>_extended_scalar): New pattern.
45138 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45140 * config/riscv/iterators.md: Add neg and not.
45141 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
45143 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45144 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
45165 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
45166 (struct alu_def): Ditto.
45168 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
45169 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
45170 * config/riscv/vector-iterators.md: New iterator.
45171 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
45173 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45175 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
45177 2023-02-11 Jakub Jelinek <jakub@redhat.com>
45180 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
45181 item->offset bit position is too large to be representable as
45182 unsigned int byte position.
45184 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
45186 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
45188 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
45190 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
45191 valid_combine only when ira_use_lra_p is true.
45193 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
45195 * params.opt (ira-simple-lra-insn-threshold): Add new param.
45196 * ira.cc (ira): Use the param to switch on simple LRA.
45198 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
45200 PR tree-optimization/108687
45201 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
45202 back to RFD_NONE mode for calculations.
45203 (ranger_cache::propagate_cache): Call the internal edge range API
45204 with RFD_READ_ONLY instead of changing the external routine.
45206 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
45208 PR tree-optimization/108520
45209 * gimple-range-infer.cc (check_assume_func): Invoke
45210 gimple_range_global directly instead using global_range_query.
45211 * value-query.cc (get_range_global): Add function context and
45212 avoid calling nonnull_arg_p if not cfun.
45213 (gimple_range_global): Add function context pointer.
45214 * value-query.h (imple_range_global): Add function context.
45216 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45218 * config/riscv/constraints.md (Wdm): Adjust constraint.
45219 (Wbr): New constraint.
45220 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
45221 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
45222 (emit_vlmax_op): New function.
45223 (emit_nonvlmax_op): Ditto.
45225 (neg_simm5_p): Ditto.
45226 (has_vi_variant_p): Ditto.
45227 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
45228 (emit_vlmax_op): New function.
45229 (emit_nonvlmax_op): Ditto.
45230 (expand_const_vector): Adjust function.
45231 (legitimize_move): Ditto.
45232 (simm32_p): New function.
45234 (neg_simm5_p): Ditto.
45235 (has_vi_variant_p): Ditto.
45236 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
45238 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45239 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
45242 (vminu): Remove signed cases.
45244 (vdiv): Remove unsigned cases.
45246 (vdivu): Remove signed cases.
45250 (vrsub): New class.
45255 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
45256 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
45257 * config/riscv/vector-iterators.md: New iterators.
45258 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
45260 (@pred_<optab><mode>_scalar): New pattern.
45261 (@pred_sub<mode>_reverse_scalar): Ditto.
45262 (*pred_<optab><mode>_scalar): Ditto.
45263 (*pred_<optab><mode>_extended_scalar): Ditto.
45264 (*pred_sub<mode>_reverse_scalar): Ditto.
45265 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
45267 2023-02-10 Richard Biener <rguenther@suse.de>
45269 PR tree-optimization/108724
45270 * tree-vect-stmts.cc (vectorizable_operation): Avoid
45271 using word_mode vectors when vector lowering will
45272 decompose them to elementwise operations.
45274 2023-02-10 Jakub Jelinek <jakub@redhat.com>
45277 2023-02-09 Martin Liska <mliska@suse.cz>
45280 * doc/extend.texi: Document that the function
45281 does not work correctly for old VIA processors.
45283 2023-02-10 Andrew Pinski <apinski@marvell.com>
45284 Andrew Macleod <amacleod@redhat.com>
45286 PR tree-optimization/108684
45287 * tree-ssa-dce.cc (simple_dce_from_worklist):
45288 Check all ssa names and not just non-vdef ones
45289 before accepting the inline-asm.
45290 Call unlink_stmt_vdef on the statement before
45293 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
45295 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
45296 * ira.cc (validate_equiv_mem): Check memref address variance.
45297 (no_equiv): Clear caller_save_p flag.
45298 (update_equiv_regs): Define caller save equivalence for
45300 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
45301 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
45302 call_save_p. Use caller save equivalence depending on the arg.
45303 (split_reg): Adjust the call.
45305 2023-02-09 Jakub Jelinek <jakub@redhat.com>
45308 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
45309 (cpu_indicator_init): Call get_available_features for all CPUs with
45310 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
45313 2023-02-09 Jakub Jelinek <jakub@redhat.com>
45315 PR tree-optimization/108688
45316 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
45317 of BIT_INSERT_EXPR extracting exactly all inserted bits even
45318 when without mode precision. Formatting fixes.
45320 2023-02-09 Andrew Pinski <apinski@marvell.com>
45322 PR tree-optimization/108688
45323 * match.pd (bit_field_ref [bit_insert]): Avoid generating
45324 BIT_FIELD_REFs of non-mode-precision integral operands.
45326 2023-02-09 Martin Liska <mliska@suse.cz>
45329 * doc/extend.texi: Document that the function
45330 does not work correctly for old VIA processors.
45332 2023-02-09 Andreas Schwab <schwab@suse.de>
45334 * lto-wrapper.cc (merge_and_complain): Handle
45335 -funwind-tables and -fasynchronous-unwind-tables.
45336 (append_compiler_options): Likewise.
45338 2023-02-09 Richard Biener <rguenther@suse.de>
45340 PR tree-optimization/26854
45341 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
45342 view around insert_updated_phi_nodes_for.
45343 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
45345 (walk_aliased_vdefs_1): Likewise.
45347 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
45349 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
45351 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
45354 * config.gcc (tm_mlib_file): Define new variable.
45356 2023-02-08 Jakub Jelinek <jakub@redhat.com>
45358 PR tree-optimization/108692
45359 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
45360 widened_code which is different from code, don't call
45361 vect_look_through_possible_promotion but instead just check op is
45362 SSA_NAME with integral type for which vect_is_simple_use is true
45363 and call set_op on this_unprom.
45365 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
45367 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
45369 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
45371 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
45372 to 'aarch_ra_sign_key'.
45373 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
45375 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
45376 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
45377 * config/arm/arm.opt: Define.
45379 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
45381 PR tree-optimization/108316
45382 * tree-vect-stmts.cc (get_load_store_type): When using
45383 internal functions for gather/scatter, make sure that the type
45384 of the offset argument is consistent with the offset vector type.
45386 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
45389 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
45391 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
45392 * ira.cc (validate_equiv_mem): Check memref address variance.
45393 (update_equiv_regs): Define caller save equivalence for
45395 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
45396 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
45397 call_save_p. Use caller save equivalence depending on the arg.
45398 (split_reg): Adjust the call.
45400 2023-02-08 Jakub Jelinek <jakub@redhat.com>
45402 * tree.def (SAD_EXPR): Remove outdated comment about missing
45405 2023-02-07 Marek Polacek <polacek@redhat.com>
45407 * doc/invoke.texi: Update -fchar8_t documentation.
45409 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
45411 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
45412 * ira.cc (validate_equiv_mem): Check memref address variance.
45413 (update_equiv_regs): Define caller save equivalence for
45415 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
45416 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
45417 call_save_p. Use caller save equivalence depending on the arg.
45418 (split_reg): Adjust the call.
45420 2023-02-07 Richard Biener <rguenther@suse.de>
45422 PR tree-optimization/26854
45423 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
45424 instead of immediate uses.
45426 2023-02-07 Jakub Jelinek <jakub@redhat.com>
45428 PR tree-optimization/106923
45429 * ipa-split.cc (execute_split_functions): Don't split returns_twice
45432 2023-02-07 Jakub Jelinek <jakub@redhat.com>
45434 PR tree-optimization/106433
45435 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
45436 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
45438 2023-02-07 Jan Hubicka <jh@suse.cz>
45440 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
45443 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
45445 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
45446 (process_asm): Create a constructor for GCN_STACK_SIZE.
45447 (main): Parse the -mstack-size option.
45449 2023-02-06 Alex Coplan <alex.coplan@arm.com>
45452 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
45453 Use correct constraint for operand 3.
45455 2023-02-06 Martin Jambor <mjambor@suse.cz>
45457 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
45459 2023-02-06 Xi Ruoyao <xry111@xry111.site>
45461 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
45462 New define_int_iterator.
45463 (bytepick_d_ashift_amount): Likewise.
45464 (bytepick_imm): New define_int_attr.
45465 (bytepick_w_lshiftrt_amount): Likewise.
45466 (bytepick_d_lshiftrt_amount): Likewise.
45467 (bytepick_w_<bytepick_imm>): New define_insn template.
45468 (bytepick_w_<bytepick_imm>_extend): Likewise.
45469 (bytepick_d_<bytepick_imm>): Likewise.
45470 (bytepick_w): Remove unused define_insn.
45471 (bytepick_d): Likewise.
45472 (UNSPEC_BYTEPICK_W): Remove unused unspec.
45473 (UNSPEC_BYTEPICK_D): Likewise.
45474 * config/loongarch/predicates.md (const_0_to_3_operand):
45475 Remove unused define_predicate.
45476 (const_0_to_7_operand): Likewise.
45478 2023-02-06 Jakub Jelinek <jakub@redhat.com>
45480 PR tree-optimization/108655
45481 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
45482 or -fsanitize=unreachable -fsanitize-trap=unreachable return
45483 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
45485 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
45487 * doc/install.texi (Specific): Remove PW32.
45489 2023-02-03 Jakub Jelinek <jakub@redhat.com>
45491 PR tree-optimization/108647
45492 * range-op.cc (operator_equal::op1_range,
45493 operator_not_equal::op1_range): Don't test op2 bound
45494 equality if op2.undefined_p (), instead set_varying.
45495 (operator_lt::op1_range, operator_le::op1_range,
45496 operator_gt::op1_range, operator_ge::op1_range): Return false if
45497 op2.undefined_p ().
45498 (operator_lt::op2_range, operator_le::op2_range,
45499 operator_gt::op2_range, operator_ge::op2_range): Return false if
45500 op1.undefined_p ().
45502 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
45504 PR tree-optimization/108639
45505 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
45507 (irange::operator==): Same.
45509 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
45511 PR tree-optimization/108647
45512 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
45513 (foperator_lt::op2_range): Same.
45514 (foperator_le::op1_range): Same.
45515 (foperator_le::op2_range): Same.
45516 (foperator_gt::op1_range): Same.
45517 (foperator_gt::op2_range): Same.
45518 (foperator_ge::op1_range): Same.
45519 (foperator_ge::op2_range): Same.
45520 (foperator_unordered_lt::op1_range): Same.
45521 (foperator_unordered_lt::op2_range): Same.
45522 (foperator_unordered_le::op1_range): Same.
45523 (foperator_unordered_le::op2_range): Same.
45524 (foperator_unordered_gt::op1_range): Same.
45525 (foperator_unordered_gt::op2_range): Same.
45526 (foperator_unordered_ge::op1_range): Same.
45527 (foperator_unordered_ge::op2_range): Same.
45529 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
45531 PR tree-optimization/107570
45532 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
45534 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
45536 * doc/gm2.texi (Internals): Remove from menu.
45537 (Using): Comment out ifnohtml conditional.
45538 (Documentation): Use gcc url.
45539 (License): Node simplified.
45540 (Copying): New node. Include gpl_v3_without_node.
45541 (Contributing): Node simplified.
45542 (Internals): Commented out.
45543 (Libraries): Node simplified.
45546 (Functions): Ditto.
45548 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
45550 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
45552 (mve_vqshluq_m_n_s<mode>): Likewise.
45553 (mve_vshlq_m_<supf><mode>): Likewise.
45554 (mve_vsriq_m_n_<supf><mode>): Likewise.
45555 (mve_vsubq_m_<supf><mode>): Likewise.
45557 2023-02-03 Martin Jambor <mjambor@suse.cz>
45560 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
45561 when comparing to an IPA-CP value.
45562 (dump_list_of_param_indices): New function.
45563 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
45564 Dump removed candidates using dump_list_of_param_indices.
45565 * ipa-param-manipulation.cc
45566 (ipa_param_body_adjustments::modify_expression): Add assert checking
45567 sizes of a VIEW_CONVERT_EXPR will match.
45568 (ipa_param_body_adjustments::modify_assignment): Likewise.
45570 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
45572 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
45573 * config/riscv/riscv.cc: Ditto.
45575 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45577 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
45581 * config/riscv/vector.md: Ditto.
45583 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45585 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
45586 * config/riscv/riscv-vector-builtins-bases.cc: New class.
45587 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
45590 * config/riscv/riscv-vector-builtins.cc: Ditto.
45591 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
45593 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
45595 * toplev.cc (toplev::main): Only print the version information header
45596 from toplevel main().
45598 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
45600 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
45601 cond_{ashl|ashr|lshr}
45603 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
45605 PR rtl-optimization/108086
45606 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
45607 Adjust size-related commentary accordingly.
45609 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
45611 PR rtl-optimization/108508
45612 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
45613 the splay tree search gives the first clobber in the second group,
45614 make sure that the root of the first clobber group is updated
45615 correctly. Enter the new clobber group into the definition splay
45618 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
45620 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
45621 Fix finding best match score.
45623 2023-02-02 Jakub Jelinek <jakub@redhat.com>
45626 PR rtl-optimization/108463
45628 * cselib.cc (cselib_current_insn): Move declaration earlier.
45629 (cselib_hasher::equal): For debug only locs, temporarily override
45630 cselib_current_insn to their l->setting_insn for the
45631 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
45632 promote some debug locs.
45633 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
45634 when using cselib call cselib_lookup_from_insn on the address but
45635 don't substitute it.
45637 2023-02-02 Richard Biener <rguenther@suse.de>
45639 PR middle-end/108625
45640 * genmatch.cc (expr::gen_transform): Also disallow resimplification
45641 from pushing to lseq with force_leaf.
45642 (dt_simplify::gen_1): Likewise.
45644 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
45646 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
45647 (struct kernargs): Replace the common content with kernargs_abi.
45648 (struct heap): Delete.
45649 (main): Read GCN_STACK_SIZE envvar.
45650 Allocate space for the device stacks.
45651 Write the new kernargs fields.
45652 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
45653 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
45654 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
45655 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
45656 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
45657 Set up the stacks from the values in the kernargs, not private.
45658 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
45659 (gcn_hsa_declare_function_name): Turn off the private segment.
45660 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
45661 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
45662 * config/gcn/gcn.opt (mstack-size): Change the description.
45664 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
45667 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
45668 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
45669 addressing MVE predicate modes.
45670 (mve_bool_vec_to_const): Change to represent correct MVE predicate
45672 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
45674 (arm_vector_mode_supported_p): Likewise.
45675 (arm_mode_to_pred_mode): Add V2QI.
45676 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
45678 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
45679 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
45680 (v2qi_UP): New macro.
45681 (v4bi_UP): New macro.
45682 (v8bi_UP): New macro.
45683 (v16bi_UP): New macro.
45684 (arm_expand_builtin_args): Make it able to expand the new predicate
45686 * config/arm/arm-modes.def (V2QI): New mode.
45687 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
45688 Pred4x4_t): Remove unused predicate builtin types.
45689 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
45690 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
45691 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
45692 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
45693 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
45694 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
45695 of MODE_VECTOR_BOOL.
45696 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
45697 (MVE_VPRED): Likewise.
45698 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
45699 (MVE_vctp): New mode attribute.
45703 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
45704 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
45706 (mve_vpnothi): Rename this...
45707 (mve_vpnotv16bi): ... to this.
45708 (mve_vctp<mode1>q_mhi): Rename this...
45709 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
45710 (mve_vldrdq_gather_base_z_<supf>v2di,
45711 mve_vldrdq_gather_offset_z_<supf>v2di,
45712 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
45713 mve_vstrdq_scatter_base_p_<supf>v2di,
45714 mve_vstrdq_scatter_offset_p_<supf>v2di,
45715 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
45716 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
45717 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
45718 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
45719 mve_vldrdq_gather_base_wb_z_<supf>v2di,
45720 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
45721 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
45723 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
45725 (VCTP): ... with this.
45726 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
45727 (VCTP_M): ... with this.
45728 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
45729 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
45731 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
45734 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
45735 (arm_modes_tieable_p): Make MVE predicate modes tieable.
45736 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
45737 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
45738 simplify_subreg to simplify subregs where the outermode is not scalar.
45740 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
45743 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
45744 new qualifiers parameter and use unsigned short type for MVE predicate.
45745 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
45747 (arm_init_crypto_builtins): Likewise.
45749 2023-02-02 Jakub Jelinek <jakub@redhat.com>
45752 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
45753 * internal-fn.def (TRAP): Remove.
45754 * internal-fn.cc (expand_TRAP): Remove.
45755 * tree.cc (build_common_builtin_nodes): Define
45756 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
45757 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
45758 instead of BUILT_IN_TRAP.
45759 * gimple.cc (gimple_build_builtin_unreachable): Remove
45760 emitting internal function for BUILT_IN_TRAP.
45761 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
45762 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
45763 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
45764 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
45765 BUILT_IN_UNREACHABLE_TRAP.
45766 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
45767 * tree-cfg.cc (verify_gimple_call,
45768 pass_warn_function_return::execute): Likewise.
45769 * attribs.cc (decl_attributes): Don't report exclusions on
45770 BUILT_IN_UNREACHABLE_TRAP either.
45772 2023-02-02 liuhongt <hongtao.liu@intel.com>
45774 PR tree-optimization/108601
45775 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
45776 * tree-vect-loop.cc
45777 (vectorizable_nonlinear_induction): Remove
45778 vect_can_peel_nonlinear_iv_p.
45779 (vect_can_peel_nonlinear_iv_p): Don't peel
45780 nonlinear iv(mult or shift) for epilog when vf is not
45781 constant and moved the defination to ..
45782 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
45785 2023-02-02 Jakub Jelinek <jakub@redhat.com>
45787 PR middle-end/108435
45788 * tree-nested.cc (convert_nonlocal_omp_clauses)
45789 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
45790 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
45791 before calling declare_vars.
45792 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
45793 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
45794 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
45795 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
45797 2023-02-01 Tamar Christina <tamar.christina@arm.com>
45799 * common/config/aarch64/aarch64-common.cc
45800 (struct aarch64_option_extension): Add native_detect and document struct
45802 (all_extensions): Set new field native_detect.
45803 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
45806 2023-02-01 Martin Liska <mliska@suse.cz>
45808 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
45811 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
45813 PR tree-optimization/108356
45814 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
45815 do a search of the DOM tree for a range.
45817 2023-02-01 Martin Liska <mliska@suse.cz>
45820 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
45821 ony non-null values.
45822 * ipa.cc (walk_polymorphic_call_targets): Likewise.
45824 2023-02-01 Martin Liska <mliska@suse.cz>
45827 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
45830 2023-02-01 Jakub Jelinek <jakub@redhat.com>
45833 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
45834 subregs in DEBUG_INSNs.
45836 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
45838 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
45840 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
45842 * config/s390/s390.cc (s390_restore_gpr_p): New function.
45843 (s390_preserve_gpr_arg_in_range_p): New function.
45844 (s390_preserve_gpr_arg_p): New function.
45845 (s390_preserve_fpr_arg_p): New function.
45846 (s390_register_info_stdarg_fpr): Rename to ...
45847 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
45848 (s390_register_info_stdarg_gpr): Rename to ...
45849 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
45850 (s390_register_info): Use the renamed functions above.
45851 (s390_optimize_register_info): Likewise.
45852 (save_fpr): Generate CFI for -mpreserve-args.
45853 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
45854 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
45855 (s390_optimize_prologue): Likewise.
45856 * config/s390/s390.opt: New option -mpreserve-args
45858 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
45860 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
45861 (restore_gprs): Likewise.
45862 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
45863 frame pointer if a frame-pointer is used.
45864 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
45865 * config/s390/s390.md (stack_tie): Add a register operand and
45867 (@stack_tie<mode>): ... this.
45869 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
45871 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
45872 EMIT_CFI parameter.
45873 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
45874 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
45876 2023-02-01 Richard Biener <rguenther@suse.de>
45878 PR middle-end/108500
45879 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
45880 with tree traversal algorithm.
45882 2023-02-01 Jason Merrill <jason@redhat.com>
45884 * doc/invoke.texi: Document -Wno-changes-meaning.
45886 2023-02-01 David Malcolm <dmalcolm@redhat.com>
45888 * doc/invoke.texi (Static Analyzer Options): Add notes about
45889 limitations of -fanalyzer.
45891 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45893 * config/riscv/constraints.md (vj): New.
45895 * config/riscv/iterators.md: Add more opcode.
45896 * config/riscv/predicates.md (vector_arith_operand): New.
45897 (vector_neg_arith_operand): New.
45898 (vector_shift_operand): New.
45899 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
45900 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
45917 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
45934 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
45935 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
45936 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
45937 (DEF_RVV_U_OPS): New.
45938 (rvv_arg_type_info::get_base_vector_type): Handle
45939 RVV_BASE_shift_vector.
45940 (rvv_arg_type_info::get_tree_type): Ditto.
45941 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
45942 RVV_BASE_shift_vector.
45943 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
45944 * config/riscv/vector-iterators.md: Handle more opcode.
45945 * config/riscv/vector.md (@pred_<optab><mode>): New.
45947 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
45950 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
45953 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
45955 PR tree-optimization/108608
45956 * tree-vect-loop.cc (vect_transform_reduction): Handle single
45957 def-use cycles that involve function calls rather than tree codes.
45959 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
45961 PR tree-optimization/108385
45962 * gimple-range-gori.cc (gori_compute::compute_operand_range):
45963 Allow VARYING computations to continue if there is a relation.
45964 * range-op.cc (pointer_plus_operator::op2_range): New.
45966 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
45968 PR tree-optimization/108359
45969 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
45970 (range_operator::fold_range): If op1 is equivalent to op2 then
45971 invoke new fold_in_parts_equiv to operate on sub-components.
45972 * range-op.h (wi_fold_in_parts_equiv): New prototype.
45974 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
45976 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
45977 not abort calculations if there is a valid relation available.
45978 (gori_compute::refine_using_relation): Pass correct relation trio.
45979 (gori_compute::compute_operand1_range): Create trio and use it.
45980 (gori_compute::compute_operand2_range): Ditto.
45981 * range-op.cc (operator_plus::op1_range): Use correct trio member.
45982 (operator_minus::op1_range): Use correct trio member.
45983 * value-relation.cc (value_relation::create_trio): New.
45984 * value-relation.h (value_relation::create_trio): New prototype.
45986 2023-01-31 Jakub Jelinek <jakub@redhat.com>
45989 * config/i386/i386-expand.cc
45990 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
45991 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
45992 equal to bitsize of mode.
45994 2023-01-31 Jakub Jelinek <jakub@redhat.com>
45996 PR rtl-optimization/108596
45997 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
45998 ends with asm goto and has a crossing fallthrough edge to the same bb
45999 that contains at least one of its labels by restoring EDGE_CROSSING
46000 flag even on possible edge from cur_bb to new_bb successor.
46002 2023-01-31 Jakub Jelinek <jakub@redhat.com>
46005 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
46006 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
46007 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
46008 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
46009 uninitialized automatic variable __W.
46011 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
46013 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
46015 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46017 * config/riscv/riscv-protos.h (get_vector_mode): New function.
46018 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
46019 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
46020 (class loadstore): Adjust for indexed loads/stores support.
46022 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
46023 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
46039 * config/riscv/riscv-vector-builtins-shapes.cc
46040 (struct indexed_loadstore_def): New class.
46042 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
46043 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
46044 for indexed loads/stores support.
46045 (check_required_extensions): Ditto.
46046 (rvv_arg_type_info::get_base_vector_type): New function.
46047 (rvv_arg_type_info::get_tree_type): Ditto.
46048 (function_builder::add_unique_function): Adjust for indexed loads/stores
46050 (function_expander::use_exact_insn): New function.
46051 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
46052 indexed loads/stores support.
46053 (struct rvv_arg_type_info): Ditto.
46054 (function_expander::index_mode): New function.
46055 (function_base::apply_tail_policy_p): Ditto.
46056 (function_base::apply_mask_policy_p): Ditto.
46057 * config/riscv/vector-iterators.md (unspec): New unspec.
46058 * config/riscv/vector.md (unspec): Ditto.
46059 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
46061 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
46062 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
46063 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
46064 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
46065 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
46066 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
46067 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
46068 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
46069 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
46070 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
46071 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
46072 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
46073 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
46075 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
46077 * config.gcc: Recognize x86_64-*-gnu* targets and include
46079 * config/i386/gnu64.h: Define configuration for new target
46080 including ld.so location.
46082 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
46084 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
46085 ampere1a to include SM4.
46087 2023-01-30 Andrew Pinski <apinski@marvell.com>
46089 PR tree-optimization/108582
46090 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
46091 for middlebb to have no phi nodes.
46093 2023-01-30 Richard Biener <rguenther@suse.de>
46095 PR tree-optimization/108574
46096 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
46097 sameval and def, ignore the equivalence if there's the
46098 danger of oscillating between two values.
46100 2023-01-30 Andreas Schwab <schwab@suse.de>
46102 * common/config/riscv/riscv-common.cc
46103 (riscv_option_optimization_table)
46104 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
46105 -fasynchronous-unwind-tables and -funwind-tables.
46106 * config.gcc (riscv*-*-linux*): Define
46107 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
46109 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
46111 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
46112 value of includedir.
46114 2023-01-30 Richard Biener <rguenther@suse.de>
46117 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
46120 2023-01-30 liuhongt <hongtao.liu@intel.com>
46122 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
46123 * doc/invoke.texi: Ditto.
46125 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
46127 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
46128 (stmt_may_terminate_function_p): If assuming return or EH
46129 volatile asm is safe.
46130 (find_always_executed_bbs): Fix handling of terminating BBS and
46131 infinite loops; add debug output.
46132 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
46134 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
46136 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
46137 off-by-one in checking the permissible shift-amount.
46139 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46141 * doc/extend.texi (Named Address Spaces): Update link to the
46144 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46146 * doc/standards.texi (Standards): Fix markup.
46148 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46150 * doc/standards.texi (Standards): Update link to Objective-C book.
46152 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46154 * doc/invoke.texi (Instrumentation Options): Update reference to
46157 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
46159 * doc/standards.texi: Update Go1 link.
46161 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46163 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
46164 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
46167 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
46168 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
46170 * config/riscv/riscv-vector-builtins.cc
46171 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
46172 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
46173 (@pred_strided_store<mode>): Ditto.
46175 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46177 * config/riscv/vector.md (tail_policy_op_idx): Remove.
46178 (mask_policy_op_idx): Remove.
46179 (avl_type_op_idx): Remove.
46181 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
46183 PR tree-optimization/96373
46184 * tree.h (sign_mask_for): Declare.
46185 * tree.cc (sign_mask_for): New function.
46186 (signed_or_unsigned_type_for): For vector types, try to use the
46187 related_int_vector_mode.
46188 * genmatch.cc (commutative_op): Handle conditional internal functions.
46189 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
46191 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
46193 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
46194 Use the likely minimum VF when bounding the denominators to
46195 the estimated number of iterations.
46197 2023-01-27 Richard Biener <rguenther@suse.de>
46200 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
46201 and -Ofast FP environment side-effects.
46203 2023-01-27 Richard Biener <rguenther@suse.de>
46206 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
46207 Don't add crtfastmath.o for -shared.
46209 2023-01-27 Richard Biener <rguenther@suse.de>
46212 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
46215 2023-01-27 Richard Biener <rguenther@suse.de>
46218 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
46219 crtfastmath.o for -shared.
46221 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
46223 PR tree-optimization/108306
46224 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
46225 varying for shifts that are always out of void range.
46226 (operator_rshift::fold_range): Return [0, 0] not
46227 varying for shifts that are always out of void range.
46229 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
46231 PR tree-optimization/108447
46232 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
46233 Do not attempt to fold HONOR_NAN types.
46235 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46237 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
46238 Remove _m suffix for "vop_m" C++ overloaded API name.
46240 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46242 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
46243 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
46244 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
46246 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
46247 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
46248 (vbool64_t): Ditto.
46249 (vbool32_t): Ditto.
46250 (vbool16_t): Ditto.
46255 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
46256 (rvv_arg_type_info::get_tree_type): Ditto.
46257 (function_expander::use_contiguous_load_insn): Ditto.
46258 * config/riscv/vector.md (@pred_store<mode>): Ditto.
46260 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46262 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
46263 (vsetvl_discard_result_insn_p): New function.
46264 (reg_killed_by_bb_p): rename to find_reg_killed_by.
46265 (find_reg_killed_by): New name.
46266 (get_vl): allow it to be called by more functions.
46267 (has_vsetvl_killed_avl_p): Add condition.
46268 (get_avl): allow it to be called by more functions.
46269 (insn_should_be_added_p): New function.
46270 (get_all_nonphi_defs): Refine function.
46271 (get_all_sets): Ditto.
46272 (get_same_bb_set): New function.
46273 (any_insn_in_bb_p): Ditto.
46274 (any_set_in_bb_p): Ditto.
46275 (get_vl_vtype_info): Add VLMAX forward optimization.
46276 (source_equal_p): Fix issues.
46277 (extract_single_source): Refine.
46278 (avl_info::multiple_source_equal_p): New function.
46279 (avl_info::operator==): Adjust for final version.
46280 (vl_vtype_info::operator==): Ditto.
46281 (vl_vtype_info::same_avl_p): Ditto.
46282 (vector_insn_info::parse_insn): Ditto.
46283 (vector_insn_info::available_p): New function.
46284 (vector_insn_info::merge): Adjust for final version.
46285 (vector_insn_info::dump): Add hard_empty.
46286 (pass_vsetvl::hard_empty_block_p): New function.
46287 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
46288 (pass_vsetvl::forward_demand_fusion): Ditto.
46289 (pass_vsetvl::demand_fusion): Ditto.
46290 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
46291 (pass_vsetvl::compute_local_properties): Adjust for final version.
46292 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
46293 (pass_vsetvl::refine_vsetvls): Ditto.
46294 (pass_vsetvl::commit_vsetvls): Ditto.
46295 (pass_vsetvl::propagate_avl): New function.
46296 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
46297 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
46299 2023-01-27 Jakub Jelinek <jakub@redhat.com>
46302 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
46303 from size_t to int.
46305 2023-01-27 Jakub Jelinek <jakub@redhat.com>
46308 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
46309 redirection of calls to __builtin_trap in addition to redirection
46310 to __builtin_unreachable.
46312 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46314 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
46316 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46318 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
46319 (emit_vsetvl_insn): Ditto.
46321 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46323 * config/riscv/vector.md: Fix constraints.
46325 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46327 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
46329 2023-01-27 Patrick Palka <ppalka@redhat.com>
46330 Jakub Jelinek <jakub@redhat.com>
46332 * tree-core.h (tree_code_type, tree_code_length): For
46333 C++17 and later, add inline keyword, otherwise don't define
46334 the arrays, but declare extern arrays.
46335 * tree.cc (tree_code_type, tree_code_length): Define these
46336 arrays for C++14 and older.
46338 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46340 * config/riscv/riscv-vsetvl.h: Change it into public.
46342 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46344 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
46347 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46349 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
46351 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46353 * config/riscv/vector.md: Fix incorrect attributes.
46355 2023-01-27 Richard Biener <rguenther@suse.de>
46358 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
46359 Don't add crtfastmath.o for -shared.
46361 2023-01-27 Alexandre Oliva <oliva@gnu.org>
46363 * doc/options.texi (option, RejectNegative): Mention that
46364 -g-started options are also implicitly negatable.
46366 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
46368 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
46369 Use get_typenode_from_name to get fixed-width integer type
46371 * config/riscv/riscv-vector-builtins.def: Update define with
46372 fixed-width integer type nodes.
46374 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46376 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
46377 (real_insn_and_same_bb_p): New function.
46378 (same_bb_and_after_or_equal_p): Remove it.
46379 (before_p): New function.
46380 (reg_killed_by_bb_p): Ditto.
46381 (has_vsetvl_killed_avl_p): Ditto.
46382 (get_vl): Move location so that we can call it.
46383 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
46384 (available_occurrence_p): Ditto.
46385 (dominate_probability_p): Remove it.
46386 (can_backward_propagate_p): Remove it.
46387 (get_all_nonphi_defs): New function.
46388 (get_all_predecessors): Ditto.
46389 (any_insn_in_bb_p): Ditto.
46390 (insert_vsetvl): Adjust AVL REG.
46391 (source_equal_p): New function.
46392 (extract_single_source): Ditto.
46393 (avl_info::single_source_equal_p): Ditto.
46394 (avl_info::operator==): Adjust for AVL=REG.
46395 (vl_vtype_info::same_avl_p): Ditto.
46396 (vector_insn_info::set_demand_info): Remove it.
46397 (vector_insn_info::compatible_p): Adjust for AVL=REG.
46398 (vector_insn_info::compatible_avl_p): New function.
46399 (vector_insn_info::merge): Adjust AVL=REG.
46400 (vector_insn_info::dump): Ditto.
46401 (pass_vsetvl::merge_successors): Remove it.
46402 (enum fusion_type): New enum.
46403 (pass_vsetvl::get_backward_fusion_type): New function.
46404 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
46405 (pass_vsetvl::forward_demand_fusion): Ditto.
46406 (pass_vsetvl::demand_fusion): Ditto.
46407 (pass_vsetvl::prune_expressions): Ditto.
46408 (pass_vsetvl::compute_local_properties): Ditto.
46409 (pass_vsetvl::cleanup_vsetvls): Ditto.
46410 (pass_vsetvl::commit_vsetvls): Ditto.
46411 (pass_vsetvl::init): Ditto.
46412 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
46413 (enum merge_type): New enum.
46415 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46417 * config/riscv/riscv-vsetvl.cc
46418 (vector_infos_manager::vector_infos_manager): Add probability.
46419 (vector_infos_manager::dump): Ditto.
46420 (pass_vsetvl::compute_probabilities): Ditto.
46421 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
46423 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46425 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
46426 (vector_insn_info::merge): Ditto.
46427 (vector_insn_info::dump): Ditto.
46428 (pass_vsetvl::merge_successors): Ditto.
46429 (pass_vsetvl::backward_demand_fusion): Ditto.
46430 (pass_vsetvl::forward_demand_fusion): Ditto.
46431 (pass_vsetvl::commit_vsetvls): Ditto.
46432 * config/riscv/riscv-vsetvl.h: Ditto.
46434 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46436 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
46439 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46441 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
46443 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46445 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
46446 Add pre-check for redundant flow.
46448 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46450 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
46451 (vector_infos_manager::free_bitmap_vectors): Ditto.
46452 (pass_vsetvl::pre_vsetvl): Adjust codes.
46453 * config/riscv/riscv-vsetvl.h: New function declaration.
46455 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46457 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
46458 (vector_insn_info::set_demand_info): New function.
46459 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
46460 (pass_vsetvl::merge_successors): Ditto.
46461 (pass_vsetvl::compute_global_backward_infos): Ditto.
46462 (pass_vsetvl::backward_demand_fusion): Ditto.
46463 (pass_vsetvl::forward_demand_fusion): Ditto.
46464 (pass_vsetvl::demand_fusion): New function.
46465 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
46466 * config/riscv/riscv-vsetvl.h: New function declaration.
46468 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46470 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
46472 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46474 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
46475 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
46477 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46479 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
46480 (backward_propagate_worthwhile_p): Fix non-worthwhile.
46482 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46484 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
46486 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46488 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
46489 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
46490 (pass_vsetvl::commit_vsetvls): Ditto.
46491 * config/riscv/riscv-vsetvl.h: New function declaration.
46493 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46495 * config/riscv/vector.md:
46497 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46499 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
46500 pred_store for vse.
46501 * config/riscv/riscv-vector-builtins.cc
46502 (function_expander::add_mem_operand): Refine function.
46503 (function_expander::use_contiguous_load_insn): Adjust new
46505 (function_expander::use_contiguous_store_insn): Ditto.
46506 * config/riscv/riscv-vector-builtins.h: Refine function.
46507 * config/riscv/vector.md (@pred_store<mode>): New pattern.
46509 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46511 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
46513 2023-01-26 Marek Polacek <polacek@redhat.com>
46515 PR middle-end/108543
46516 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
46517 if it was previously set.
46519 2023-01-26 Jakub Jelinek <jakub@redhat.com>
46521 PR tree-optimization/108540
46522 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
46523 are singletons, use range_true even if op1 != op2
46524 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
46525 even if intersection of the ranges is empty and one has
46526 zero low bound and another zero high bound, use range_true_and_false
46527 rather than range_false.
46528 (foperator_not_equal::fold_range): If both op1 and op2
46529 are singletons, use range_false even if op1 != op2
46530 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
46531 even if intersection of the ranges is empty and one has
46532 zero low bound and another zero high bound, use range_true_and_false
46533 rather than range_true.
46535 2023-01-26 Jakub Jelinek <jakub@redhat.com>
46537 * value-relation.cc (kind_string): Add const.
46538 (rr_negate_table, rr_swap_table, rr_intersect_table,
46539 rr_union_table, rr_transitive_table): Add static const, change
46540 element type from relation_kind to unsigned char.
46541 (relation_negate, relation_swap, relation_intersect, relation_union,
46542 relation_transitive): Cast rr_*_table element to relation_kind.
46543 (relation_to_code): Add static const.
46544 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
46546 2023-01-26 Richard Biener <rguenther@suse.de>
46548 PR tree-optimization/108547
46549 * gimple-predicate-analysis.cc (value_sat_pred_p):
46552 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
46554 PR tree-optimization/108522
46555 * tree-object-size.cc (compute_object_offset): Make EXPR
46556 argument non-const. Call component_ref_field_offset.
46558 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46560 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
46561 FEATURE_STRING field.
46563 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
46565 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
46567 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
46571 * gcc.cc: Provide default specs for Modula-2 so that when the
46572 language is not built-in better diagnostics are emitted for
46573 attempts to use .mod or .m2i file extensions.
46575 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46577 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
46579 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46581 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
46583 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46585 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
46588 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46590 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
46592 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46594 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
46596 2023-01-25 Richard Biener <rguenther@suse.de>
46598 PR tree-optimization/108523
46599 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
46600 backedge value for the result when using predication to
46603 2023-01-25 Richard Biener <rguenther@suse.de>
46605 * doc/lto.texi (Command line options): Reword and update reference
46606 to removed lto_read_all_file_options.
46608 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
46610 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
46613 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
46615 * doc/contrib.texi: Add Jose E. Marchesi.
46617 2023-01-25 Jakub Jelinek <jakub@redhat.com>
46619 PR tree-optimization/108498
46620 * gimple-ssa-store-merging.cc (class store_operand_info):
46621 End coment with full stop rather than comma.
46622 (split_group): Likewise.
46623 (merged_store_group::apply_stores): Clear string_concatenation if
46624 start or end aren't on a byte boundary.
46626 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
46627 Jakub Jelinek <jakub@redhat.com>
46629 PR tree-optimization/108522
46630 * tree-object-size.cc (compute_object_offset): Use
46631 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
46633 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46635 * config/xtensa/xtensa.md:
46636 Fix exit from loops detecting references before overwriting in the
46639 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
46641 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
46642 do elimination but only for hard register.
46643 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
46644 calls of get_hard_regno.
46646 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
46648 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
46651 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
46654 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
46655 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
46658 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
46660 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
46661 and only include 'csky/t-csky-linux' when enable multilib.
46662 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
46663 define it when disable multilib.
46665 2023-01-24 Richard Biener <rguenther@suse.de>
46667 PR tree-optimization/108500
46668 * dominance.h (calculate_dominance_info): Add parameter
46669 to indicate fast-query compute, defaulted to true.
46670 * dominance.cc (calculate_dominance_info): Honor
46671 fast-query compute parameter.
46672 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
46673 not compute the dominator fast-query DFS numbers.
46675 2023-01-24 Eric Biggers <ebiggers@google.com>
46678 * optc-save-gen.awk: Fix copy-and-paste error.
46680 2023-01-24 Jakub Jelinek <jakub@redhat.com>
46683 * cgraphbuild.cc: Include gimplify.h.
46684 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
46685 their corresponding DECL_VALUE_EXPR expressions after unsharing.
46687 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46690 * config.gcc (tm_file): Move the variable out of loop.
46692 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
46693 Yang Yujie <yangyujie@loongson.cn>
46696 * config/loongarch/loongarch.cc (loongarch_classify_address):
46697 Add precessint for CONST_INT.
46698 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
46699 (loongarch_print_operand): Increase the processing of '%c'.
46700 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
46701 And port the public operand modifiers information to this document.
46703 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46705 * doc/invoke.texi (-mbranch-protection): Update documentation.
46707 2023-01-23 Richard Biener <rguenther@suse.de>
46710 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
46712 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
46713 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
46714 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
46715 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
46717 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46719 * config/arm/aout.h (ra_auth_code): Add entry in enum.
46720 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
46721 to dwarf frame expression.
46722 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
46723 (arm_expand_prologue): Update frame related information and reg notes
46724 for pac/pacbit insn.
46725 (arm_regno_class): Check for pac pseudo reigster.
46726 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
46727 (arm_init_machine_status): Set pacspval_needed to zero.
46728 (arm_debugger_regno): Check for PAC register.
46729 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
46731 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
46732 (arm_unwind_emit): Update REG_CFA_REGISTER case._
46733 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
46734 (DWARF_PAC_REGNUM): Define.
46735 (IS_PAC_REGNUM): Likewise.
46736 (enum reg_class): Add PAC_REG entry.
46737 (machine_function): Add pacbti_needed state to structure.
46738 * config/arm/arm.md (RA_AUTH_CODE): Define.
46740 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46742 * config.gcc ($tm_file): Update variable.
46743 * config/arm/arm-mlib.h: Create new header file.
46744 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
46745 multilib arch directory.
46746 (MULTILIB_REUSE): Add multilib reuse rules.
46747 (MULTILIB_MATCHES): Add multilib match rules.
46749 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46751 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
46752 * config/arm/arm-tables.opt: Regenerate.
46753 * config/arm/arm-tune.md: Likewise.
46754 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
46755 * (-mfix-cmse-cve-2021-35465): Likewise.
46757 2023-01-23 Richard Biener <rguenther@suse.de>
46759 PR tree-optimization/108482
46760 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
46761 .LOOP_DIST_ALIAS calls.
46763 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46765 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
46766 * config/arm/arm-protos.h: Update.
46767 * config/arm/aarch-common-protos.h: Declare
46768 'aarch_bti_arch_check'.
46769 * config/arm/arm.cc (aarch_bti_enabled) Update.
46770 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
46771 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
46772 * config/arm/arm.md (bti_nop): New insn.
46773 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
46774 (aarch-bti-insert.o): New target.
46775 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
46776 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
46778 (gate): Make use of 'aarch_bti_arch_check'.
46779 * config/arm/arm-passes.def: New file.
46780 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
46782 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46784 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
46785 'aarch-bti-insert.o'.
46786 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
46788 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
46789 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
46790 (aarch64_output_mi_thunk)
46791 (aarch64_print_patchable_function_entry)
46792 (aarch64_file_end_indicate_exec_stack): Update renamed function
46793 calls to renamed functions.
46794 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
46795 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
46797 * config/aarch64/aarch64-bti-insert.cc: Delete.
46798 * config/arm/aarch-bti-insert.cc: New file including and
46799 generalizing code from aarch64-bti-insert.cc.
46800 * config/arm/aarch-common-protos.h: Update.
46802 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46804 * config/arm/arm.h (arm_arch8m_main): Declare it.
46805 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
46807 * config/arm/arm.cc (arm_arch8m_main): Define it.
46808 (arm_option_reconfigure_globals): Set arm_arch8m_main.
46809 (arm_compute_frame_layout, arm_expand_prologue)
46810 (thumb2_expand_return, arm_expand_epilogue)
46811 (arm_conditional_register_usage): Update for pac codegen.
46812 (arm_current_function_pac_enabled_p): New function.
46813 (aarch_bti_enabled) New function.
46814 (use_return_insn): Return zero when pac is enabled.
46815 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
46817 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
46818 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
46820 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46822 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
46823 mbranch-protection.
46825 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46826 Tejas Belagod <tbelagod@arm.com>
46828 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
46829 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
46831 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46832 Tejas Belagod <tbelagod@arm.com>
46833 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46835 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
46836 new pseudo register class _UVRSC_PAC.
46838 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46839 Tejas Belagod <tbelagod@arm.com>
46841 * config/arm/arm-c.cc (arm_cpu_builtins): Define
46842 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
46843 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
46845 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46846 Tejas Belagod <tbelagod@arm.com>
46848 * doc/sourcebuild.texi: Document arm_pacbti_hw.
46850 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46851 Tejas Belagod <tbelagod@arm.com>
46852 Richard Earnshaw <Richard.Earnshaw@arm.com>
46854 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
46855 -mbranch-protection option and initialize appropriate data structures.
46856 * config/arm/arm.opt (-mbranch-protection): New option.
46857 * doc/invoke.texi (Arm Options): Document it.
46859 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46860 Tejas Belagod <tbelagod@arm.com>
46862 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
46863 * config/arm/arm-cpus.in (pacbti): New feature.
46864 * doc/invoke.texi (Arm Options): Document it.
46866 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46867 Tejas Belagod <tbelagod@arm.com>
46869 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
46870 (all_architectures): Fix comment.
46871 (aarch64_parse_extension): Rename return type, enum value names.
46872 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
46873 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
46874 Also rename corresponding enum values.
46875 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
46876 out aarch64_function_type and move it to common code as
46877 aarch_function_type in aarch-common.h.
46878 * config/aarch64/aarch64-protos.h: Include common types header,
46879 move out types aarch64_parse_opt_result and aarch64_key_type to
46881 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
46882 and functions out into aarch-common.h and aarch-common.cc. Fix up
46883 all the name changes resulting from the move.
46884 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
46886 * config/aarch64/aarch64.opt: Include aarch-common.h to import
46887 type move. Fix up name changes from factoring out common code and
46889 * config/arm/aarch-common-protos.h: Export factored out routines to both
46891 * config/arm/aarch-common.cc: Include newly factored out types.
46892 Move all mbranch-protection code and data structures from
46894 * config/arm/aarch-common.h: New header that declares types shared
46895 between aarch32 and aarch64 backends.
46896 * config/arm/arm-protos.h: Declare types and variables that are
46897 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
46898 aarch_ra_sign_scope and aarch_enable_bti.
46899 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
46900 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
46901 * config/arm/arm.cc: Add missing includes.
46903 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
46905 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
46907 2023-01-23 Richard Biener <rguenther@suse.de>
46909 PR tree-optimization/108449
46910 * cgraphunit.cc (check_global_declaration): Do not turn
46911 undefined statics into externs.
46913 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
46915 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
46916 and HI input modes.
46917 * config/pru/pru.md (clz): Fix generated code for QI and HI
46920 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
46922 * config/v850/v850.cc (v850_select_section): Put const volatile
46923 objects into read-only sections.
46925 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
46927 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
46928 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
46929 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
46931 2023-01-20 Jakub Jelinek <jakub@redhat.com>
46933 PR tree-optimization/108457
46934 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
46935 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
46936 argument instead of a temporary. Formatting fixes.
46938 2023-01-19 Jakub Jelinek <jakub@redhat.com>
46940 PR tree-optimization/108447
46941 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
46942 (relation_tests): Add self-tests for relation_{intersect,union}
46944 * selftest.h (relation_tests): Declare.
46945 * function-tests.cc (test_ranges): Call it.
46947 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
46950 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
46951 invalid third argument to __builtin_ia32_prefetch.
46953 2023-01-19 Jakub Jelinek <jakub@redhat.com>
46955 PR middle-end/108459
46956 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
46957 than fold_unary for NEGATE_EXPR.
46959 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
46962 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
46963 comment. Move assert about alignment a bit later.
46965 2023-01-19 Jakub Jelinek <jakub@redhat.com>
46967 PR tree-optimization/108440
46968 * tree-ssa-forwprop.cc: Include gimple-range.h.
46969 (simplify_rotate): For the forms with T2 wider than T and shift counts of
46970 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
46971 to B. For the forms with T2 wider than T and shift counts of
46972 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
46973 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
46974 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
46975 pass specific ranger instead of get_global_range_query.
46976 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
46979 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
46981 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
46982 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
46984 (aarch64_simd_vec_copy_lane<mode>): Likewise.
46985 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
46987 2023-01-19 Alexandre Oliva <oliva@adacore.com>
46990 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
46991 within debug insns.
46993 2023-01-18 Martin Jambor <mjambor@suse.cz>
46996 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
46997 lcone_of chain also do not need the body.
46999 2023-01-18 Richard Biener <rguenther@suse.de>
47002 2022-12-16 Richard Biener <rguenther@suse.de>
47004 PR middle-end/108086
47005 * tree-inline.cc (remap_ssa_name): Do not unshare the
47006 result from the decl_map.
47008 2023-01-18 Murray Steele <murray.steele@arm.com>
47011 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
47013 (__arm_vst1q_p_s8): Likewise.
47014 (__arm_vld1q_z_u8): Likewise.
47015 (__arm_vld1q_z_s8): Likewise.
47016 (__arm_vst1q_p_u16): Likewise.
47017 (__arm_vst1q_p_s16): Likewise.
47018 (__arm_vld1q_z_u16): Likewise.
47019 (__arm_vld1q_z_s16): Likewise.
47020 (__arm_vst1q_p_u32): Likewise.
47021 (__arm_vst1q_p_s32): Likewise.
47022 (__arm_vld1q_z_u32): Likewise.
47023 (__arm_vld1q_z_s32): Likewise.
47024 (__arm_vld1q_z_f16): Likewise.
47025 (__arm_vst1q_p_f16): Likewise.
47026 (__arm_vld1q_z_f32): Likewise.
47027 (__arm_vst1q_p_f32): Likewise.
47029 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47031 * config/xtensa/xtensa.md (xorsi3_internal):
47032 Rename from the original of "xorsi3".
47033 (xorsi3): New expansion pattern that emits addition rather than
47034 bitwise-XOR when the second source is a constant of -2147483648
47037 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
47038 Andrew Pinski <apinski@marvell.com>
47041 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
47042 vec_vsubcuqP with vec_vsubcuq.
47044 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
47047 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
47048 support for invalid uses of MMA opaque type in function arguments.
47050 2023-01-18 liuhongt <hongtao.liu@intel.com>
47053 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
47054 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
47055 -share or -mno-daz-ftz is specified.
47056 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
47057 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
47059 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
47061 * config/bpf/bpf.cc (bpf_option_override): Disable
47064 2023-01-17 Jakub Jelinek <jakub@redhat.com>
47066 PR tree-optimization/106523
47067 * tree-ssa-forwprop.cc (simplify_rotate): For the
47068 patterns with (-Y) & (B - 1) in one operand's shift
47069 count and Y in another, if T2 has wider precision than T,
47070 punt if Y could have a value in [B, B2 - 1] range.
47072 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
47075 * config/i386/i386.cc (x86_output_mi_thunk): Disable
47076 -mforce-indirect-call for PIC in 32-bit mode.
47078 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
47081 * ipa-modref.cc (modref_access_analysis::analyze): Use
47082 find_always_executed_bbs.
47083 * ipa-sra.cc (process_scan_results): Likewise.
47084 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
47085 (find_always_executed_bbs): New function.
47086 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
47087 (find_always_executed_bbs): Declare.
47089 2023-01-16 Jan Hubicka <jh@suse.cz>
47091 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
47092 by TARGET_USE_SCATTER.
47093 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
47094 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
47095 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
47096 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
47097 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
47098 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
47100 2023-01-16 Richard Biener <rguenther@suse.de>
47103 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
47105 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
47109 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
47110 (__ARM_mve_coerce3): Likewise.
47112 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47114 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
47116 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47118 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
47119 (number_of_iterations_bitcount): Add call to the above.
47120 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
47121 c[lt]z idiom recognition.
47123 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47125 * doc/sourcebuild.texi: Add missing target attributes.
47127 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
47129 PR tree-optimization/94793
47130 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
47132 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
47133 (number_of_iterations_cltz_complement): New.
47134 (number_of_iterations_bitcount): Add call to the above.
47136 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
47138 * doc/extend.texi (Common Function Attributes): Fix grammar.
47140 2023-01-16 Jakub Jelinek <jakub@redhat.com>
47143 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
47144 * config/riscv/riscv-vsetvl.cc: Likewise.
47146 2023-01-16 Jakub Jelinek <jakub@redhat.com>
47149 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
47150 disable -Winit-self using pragma GCC diagnostic ignored.
47151 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
47153 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
47154 _mm256_undefined_si256): Likewise.
47155 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
47156 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
47157 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
47158 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
47160 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
47163 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
47164 support for invalid uses in inline asm, factor out the checking and
47165 erroring to lambda function check_and_error_invalid_use.
47167 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
47169 PR tree-optimization/107608
47170 * range-op-float.cc (range_operator_float::fold_range): Avoid
47171 folding into INF when flag_trapping_math.
47172 * value-range.h (frange::known_isinf): Return false for possible NANs.
47174 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47176 * config.gcc (csky-*-*): Support --with-float=softfp.
47178 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47180 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
47181 Rename to xtensa_adjust_reg_alloc_order.
47182 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
47183 Ditto. And also remove code to reorder register numbers for
47184 leaf functions, rename the tables, and adjust the allocation
47185 order for the call0 ABI to use register A0 more.
47186 (xtensa_leaf_regs): Remove.
47187 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
47188 (order_regs_for_local_alloc): Rename as the above.
47189 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
47191 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
47193 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
47194 Change to define_insn_and_split to fold ldr+dup to ld1rq.
47195 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
47197 2023-01-14 Alexandre Oliva <oliva@adacore.com>
47199 * hash-table.h (is_deleted): Precheck !is_empty.
47200 (mark_deleted): Postcheck !is_empty.
47201 (copy constructor): Test is_empty before is_deleted.
47203 2023-01-14 Alexandre Oliva <oliva@adacore.com>
47206 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
47209 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
47211 PR rtl-optimization/108274
47212 * function.cc (thread_prologue_and_epilogue_insns): Also update the
47213 DF information for calls in a few more cases.
47215 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
47217 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
47218 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
47220 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
47221 (MAX_SYNC_LIBFUNC_SIZE): Define.
47222 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
47224 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
47225 libcall when sync libcalls are disabled.
47226 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
47227 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
47228 are disabled on 32-bit target.
47229 * config/pa/pa.opt (matomic-libcalls): New option.
47230 * doc/invoke.texi (HPPA Options): Update.
47232 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
47234 PR rtl-optimization/108117
47235 PR rtl-optimization/108132
47236 * sched-deps.cc (deps_analyze_insn): Do not schedule across
47237 calls before reload.
47239 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
47241 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
47242 options for -mlibarch.
47243 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
47244 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
47246 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
47248 * attribs.cc (strict_flex_array_level_of): Move this function to ...
47249 * attribs.h (strict_flex_array_level_of): Remove the declaration.
47250 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
47251 replace the referece to strict_flex_array_level_of with
47252 DECL_NOT_FLEXARRAY.
47253 * tree.cc (component_ref_size): Likewise.
47255 2023-01-13 Richard Biener <rguenther@suse.de>
47258 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
47259 crtfastmath.o for -shared.
47260 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
47262 2023-01-13 Richard Biener <rguenther@suse.de>
47265 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
47266 crtfastmath.o for -shared.
47267 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
47269 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
47272 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
47274 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
47276 (TARGET_DWARF_FRAME_REG_MODE): Define.
47278 2023-01-13 Richard Biener <rguenther@suse.de>
47281 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
47282 update EH info on the fly.
47284 2023-01-13 Richard Biener <rguenther@suse.de>
47286 PR tree-optimization/108387
47287 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
47288 value before inserting expression into the tables.
47290 2023-01-12 Andrew Pinski <apinski@marvell.com>
47291 Roger Sayle <roger@nextmovesoftware.com>
47293 PR tree-optimization/92342
47294 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
47295 Use tcc_comparison and :c for the multiply.
47296 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
47298 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
47299 Richard Sandiford <richard.sandiford@arm.com>
47302 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
47303 Check DECL_PACKED for bitfield.
47304 (aarch64_layout_arg): Warn when parameter passing ABI changes.
47305 (aarch64_function_arg_boundary): Do not warn here.
47306 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
47309 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
47310 Richard Sandiford <richard.sandiford@arm.com>
47312 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
47314 (aarch64_layout_arg): Factorize warning conditions.
47315 (aarch64_function_arg_boundary): Fix typo.
47316 * function.cc (currently_expanding_function_start): New variable.
47317 (expand_function_start): Handle
47318 currently_expanding_function_start.
47319 * function.h (currently_expanding_function_start): Declare.
47321 2023-01-12 Richard Biener <rguenther@suse.de>
47323 PR tree-optimization/99412
47324 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
47325 (swap_ops_for_binary_stmt): Remove reduction handling.
47326 (rewrite_expr_tree_parallel): Adjust.
47327 (reassociate_bb): Likewise.
47328 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
47330 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47332 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
47333 Rearrange the emitting codes.
47335 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47337 * config/xtensa/xtensa.md (*btrue):
47338 Correct value of the attribute "length" that depends on
47339 TARGET_DENSITY and operands, and add '?' character to the register
47340 constraint of the compared operand.
47342 2023-01-12 Alexandre Oliva <oliva@adacore.com>
47344 * hash-table.h (expand): Check elements and deleted counts.
47345 (verify): Likewise.
47347 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
47349 PR tree-optimization/71343
47350 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
47351 the value number of the expression X << C the same as the value
47352 number for the multiplication X * (1<<C).
47354 2023-01-11 David Faust <david.faust@oracle.com>
47357 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
47358 floating point modes.
47360 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
47362 PR tree-optimization/108199
47363 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
47364 for bit-field references.
47366 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
47368 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
47369 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
47370 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
47371 OPTION_MASK_P10_FUSION.
47373 2023-01-11 Richard Biener <rguenther@suse.de>
47375 PR tree-optimization/107767
47376 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
47377 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
47378 * tree-switch-conversion.cc (switch_conversion::collect):
47379 Count unique non-default targets accounting for later
47380 merging opportunities.
47382 2023-01-11 Martin Liska <mliska@suse.cz>
47384 PR middle-end/107976
47385 * params.opt: Limit JT params.
47386 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
47388 2023-01-11 Richard Biener <rguenther@suse.de>
47390 PR tree-optimization/108352
47391 * tree-ssa-threadbackward.cc
47392 (back_threader_profitability::profitable_path_p): Adjust
47393 heuristic that allows non-multi-way branch threads creating
47395 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
47396 (--param fsm-scale-path-stmts): Adjust.
47397 * params.opt (--param=fsm-scale-path-blocks=): Remove.
47398 (-param=fsm-scale-path-stmts=): Adjust description.
47400 2023-01-11 Richard Biener <rguenther@suse.de>
47402 PR tree-optimization/108353
47403 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
47405 (add_ssa_edge): Simplify.
47406 (add_control_edge): Likewise.
47407 (ssa_prop_init): Likewise.
47408 (ssa_prop_fini): Likewise.
47409 (ssa_propagation_engine::ssa_propagate): Likewise.
47411 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
47413 * config/s390/s390.md (*not<mode>): New pattern.
47415 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47417 * config/xtensa/xtensa.cc (xtensa_insn_cost):
47418 Let insn cost for size be obtained by applying COSTS_N_INSNS()
47419 to instruction length and then dividing by 3.
47421 2023-01-10 Richard Biener <rguenther@suse.de>
47423 PR tree-optimization/106293
47424 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
47425 process degenerate PHI defs.
47427 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
47429 PR rtl-optimization/106421
47430 * cprop.cc (bypass_block): Check that DEST is local to this
47431 function (non-NULL) before calling find_edge.
47433 2023-01-10 Martin Jambor <mjambor@suse.cz>
47436 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
47437 sort_replacements, lookup_first_base_replacement and
47438 m_sorted_replacements_p.
47439 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
47440 (ipa_param_body_adjustments::register_replacement): Set
47441 m_sorted_replacements_p to false.
47442 (compare_param_body_replacement): New function.
47443 (ipa_param_body_adjustments::sort_replacements): Likewise.
47444 (ipa_param_body_adjustments::common_initialization): Call
47446 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
47447 m_sorted_replacements_p.
47448 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
47450 (ipa_param_body_adjustments::lookup_first_base_replacement): New
47452 (ipa_param_body_adjustments::modify_call_stmt): Use
47453 lookup_first_base_replacement.
47454 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
47455 adjustments->sort_replacements.
47457 2023-01-10 Richard Biener <rguenther@suse.de>
47459 PR tree-optimization/108314
47460 * tree-vect-stmts.cc (vectorizable_condition): Do not
47461 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
47463 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47465 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
47467 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47469 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
47471 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47473 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
47474 defines for soft float abi.
47476 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47478 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
47479 (smart_bclri): Likewise.
47480 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
47481 (fast_bclri): Likewise.
47482 (fast_cmpnesi_i): Likewise.
47483 (*fast_cmpltsi_i): Likewise.
47484 (*fast_cmpgeusi_i): Likewise.
47486 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47488 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
47489 flag_fp_int_builtin_inexact || !flag_trapping_math.
47490 (<frm_pattern><mode>2): Likewise.
47492 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
47494 * config/s390/s390.cc (s390_register_info): Check call_used_regs
47495 instead of hard-coding the register numbers for call saved
47497 (s390_optimize_register_info): Likewise.
47499 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
47501 * doc/gm2.texi (Overview): Fix @node markers.
47502 (Using): Likewise. Remove subsections that were moved to Overview
47503 from the menu and move others around.
47505 2023-01-09 Richard Biener <rguenther@suse.de>
47507 PR middle-end/108209
47508 * genmatch.cc (commutative_op): Fix return value for
47509 user-id with non-commutative first replacement.
47511 2023-01-09 Jakub Jelinek <jakub@redhat.com>
47514 * calls.cc (expand_call): For calls with
47515 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
47518 2023-01-09 Richard Biener <rguenther@suse.de>
47520 PR middle-end/69482
47521 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
47522 qualified accesses also force objects to memory.
47524 2023-01-09 Martin Liska <mliska@suse.cz>
47527 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
47528 NULL (deleleted value) to a hash_set.
47530 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47532 * config/xtensa/xtensa.md (*splice_bits):
47533 New insn_and_split pattern.
47535 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47537 * config/xtensa/xtensa.cc
47538 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
47539 New helper functions.
47540 (xtensa_set_return_address, xtensa_output_mi_thunk):
47541 Change to use the helper function.
47542 (xtensa_emit_adjust_stack_ptr): Ditto.
47543 And also change to try reusing the content of scratch register
47544 A9 if the register is not modified in the function body.
47546 2023-01-07 LIU Hao <lh_mouse@126.com>
47548 PR middle-end/108300
47549 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
47550 before <windows.h>.
47551 * diagnostic-color.cc: Likewise.
47552 * plugin.cc: Likewise.
47553 * prefix.cc: Likewise.
47555 2023-01-06 Joseph Myers <joseph@codesourcery.com>
47557 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
47558 for handling real integer types.
47560 2023-01-06 Tamar Christina <tamar.christina@arm.com>
47563 2022-12-12 Tamar Christina <tamar.christina@arm.com>
47565 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
47566 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
47567 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
47568 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
47569 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
47570 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
47571 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
47572 (aarch64_simd_dupv2hf): New.
47573 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
47575 * config/aarch64/iterators.md (VHSDF_P): New.
47576 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
47577 Vel, q, vp): Add V2HF.
47578 * config/arm/types.md (neon_fp_reduc_add_h): New.
47580 2023-01-06 Martin Liska <mliska@suse.cz>
47582 PR middle-end/107966
47583 * doc/options.texi: Fix Var documentation in internal manual.
47585 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
47588 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
47590 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
47591 RTL expansion to allow condition (mask) to be shared/reused,
47592 by avoiding overwriting pseudos and adding REG_EQUAL notes.
47594 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
47596 * common.opt: Add -static-libgm2.
47597 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
47598 * doc/gm2.texi: Document static-libgm2.
47599 * gcc.cc (driver_handle_option): Allow static-libgm2.
47601 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
47603 * common/config/i386/i386-common.cc (processor_alias_table):
47604 Use CPU_ZNVER4 for znver4.
47605 * config/i386/i386.md: Add znver4.md.
47606 * config/i386/znver4.md: New.
47608 2023-01-04 Jakub Jelinek <jakub@redhat.com>
47610 PR tree-optimization/108253
47611 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
47614 2023-01-04 Jakub Jelinek <jakub@redhat.com>
47616 PR middle-end/108237
47617 * generic-match-head.cc: Include tree-pass.h.
47618 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
47619 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
47620 resp. PROP_gimple_lvec property set.
47622 2023-01-04 Jakub Jelinek <jakub@redhat.com>
47624 PR sanitizer/108256
47625 * convert.cc (do_narrow): Punt for MULT_EXPR if original
47626 type doesn't wrap around and -fsanitize=signed-integer-overflow
47628 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
47630 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
47632 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
47633 * common/config/i386/i386-common.cc: Add Emeraldrapids.
47635 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
47637 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
47640 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
47642 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
47643 default constructor to initialize it.
47644 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
47645 for last and iterate to handle recursive calls. Delete leftover
47646 candidates at the end.
47647 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
47649 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
47650 gc_candidate bit when a clone is used.
47652 2023-01-03 Florian Weimer <fweimer@redhat.com>
47655 2023-01-02 Florian Weimer <fweimer@redhat.com>
47657 * dwarf2cfi.cc (init_return_column_size): Remove.
47658 (init_one_dwarf_reg_size): Adjust.
47659 (generate_dwarf_reg_sizes): New function. Extracted
47660 from expand_builtin_init_dwarf_reg_sizes.
47661 (expand_builtin_init_dwarf_reg_sizes): Call
47662 generate_dwarf_reg_sizes.
47663 * target.def (init_dwarf_reg_sizes_extra): Adjust
47665 * config/msp430/msp430.cc
47666 (msp430_init_dwarf_reg_sizes_extra): Adjust.
47667 * config/rs6000/rs6000.cc
47668 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
47669 * doc/tm.texi: Update.
47671 2023-01-03 Florian Weimer <fweimer@redhat.com>
47674 2023-01-02 Florian Weimer <fweimer@redhat.com>
47676 * debug.h (dwarf_reg_sizes_constant): Declare.
47677 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
47679 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
47681 PR tree-optimization/105043
47682 * doc/extend.texi (Object Size Checking): Split out into two
47683 subsections and mention _FORTIFY_SOURCE.
47685 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
47687 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
47688 RTL expansion to allow condition (mask) to be shared/reused,
47689 by avoiding overwriting pseudos and adding REG_EQUAL notes.
47691 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
47694 * config/i386/i386-features.cc
47695 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
47696 the gain/cost of converting a MEM operand.
47698 2023-01-03 Jakub Jelinek <jakub@redhat.com>
47700 PR middle-end/108264
47701 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
47702 from source which doesn't have scalar integral mode first convert
47705 2023-01-03 Jakub Jelinek <jakub@redhat.com>
47707 PR rtl-optimization/108263
47708 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
47711 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
47714 * config/i386/lujiazui.md (lujiazui_div): New automaton.
47715 (lua_div): New unit.
47716 (lua_idiv_qi): Correct unit in the reservation.
47717 (lua_idiv_qi_load): Ditto.
47718 (lua_idiv_hi): Ditto.
47719 (lua_idiv_hi_load): Ditto.
47720 (lua_idiv_si): Ditto.
47721 (lua_idiv_si_load): Ditto.
47722 (lua_idiv_di): Ditto.
47723 (lua_idiv_di_load): Ditto.
47724 (lua_fdiv_SF): Ditto.
47725 (lua_fdiv_SF_load): Ditto.
47726 (lua_fdiv_DF): Ditto.
47727 (lua_fdiv_DF_load): Ditto.
47728 (lua_fdiv_XF): Ditto.
47729 (lua_fdiv_XF_load): Ditto.
47730 (lua_ssediv_SF): Ditto.
47731 (lua_ssediv_load_SF): Ditto.
47732 (lua_ssediv_V4SF): Ditto.
47733 (lua_ssediv_load_V4SF): Ditto.
47734 (lua_ssediv_V8SF): Ditto.
47735 (lua_ssediv_load_V8SF): Ditto.
47736 (lua_ssediv_SD): Ditto.
47737 (lua_ssediv_load_SD): Ditto.
47738 (lua_ssediv_V2DF): Ditto.
47739 (lua_ssediv_load_V2DF): Ditto.
47740 (lua_ssediv_V4DF): Ditto.
47741 (lua_ssediv_load_V4DF): Ditto.
47743 2023-01-02 Florian Weimer <fweimer@redhat.com>
47745 * debug.h (dwarf_reg_sizes_constant): Declare.
47746 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
47748 2023-01-02 Florian Weimer <fweimer@redhat.com>
47750 * dwarf2cfi.cc (init_return_column_size): Remove.
47751 (init_one_dwarf_reg_size): Adjust.
47752 (generate_dwarf_reg_sizes): New function. Extracted
47753 from expand_builtin_init_dwarf_reg_sizes.
47754 (expand_builtin_init_dwarf_reg_sizes): Call
47755 generate_dwarf_reg_sizes.
47756 * target.def (init_dwarf_reg_sizes_extra): Adjust
47758 * config/msp430/msp430.cc
47759 (msp430_init_dwarf_reg_sizes_extra): Adjust.
47760 * config/rs6000/rs6000.cc
47761 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
47762 * doc/tm.texi: Update.
47764 2023-01-02 Jakub Jelinek <jakub@redhat.com>
47766 * gcc.cc (process_command): Update copyright notice dates.
47767 * gcov-dump.cc (print_version): Ditto.
47768 * gcov.cc (print_version): Ditto.
47769 * gcov-tool.cc (print_version): Ditto.
47770 * gengtype.cc (create_file): Ditto.
47771 * doc/cpp.texi: Bump @copying's copyright year.
47772 * doc/cppinternals.texi: Ditto.
47773 * doc/gcc.texi: Ditto.
47774 * doc/gccint.texi: Ditto.
47775 * doc/gcov.texi: Ditto.
47776 * doc/install.texi: Ditto.
47777 * doc/invoke.texi: Ditto.
47779 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
47780 Uroš Bizjak <ubizjak@gmail.com>
47782 * config/i386/i386.md (extendditi2): New define_insn.
47783 (define_split): Use DWIH mode iterator to treat new extendditi2
47784 identically to existing extendsidi2_1.
47785 (define_peephole2): Likewise.
47786 (define_peephole2): Likewise.
47787 (define_Split): Likewise.
47790 Copyright (C) 2023 Free Software Foundation, Inc.
47792 Copying and distribution of this file, with or without modification,
47793 are permitted in any medium without royalty provided the copyright
47794 notice and this notice are preserved.