PR tree-optimization/81303
[official-gcc.git] / gcc / testsuite / gcc.dg / tree-ssa / ssa-thread-13.c
blob061f2235533405bf3821872550e3e7dfdc38c9e6
1 /* { dg-do compile } */
2 /* { dg-options "-O2 -fdump-tree-ethread-details" } */
3 /* { dg-final { scan-tree-dump "FSM" "ethread" } } */
5 typedef struct rtx_def *rtx;
6 typedef const struct rtx_def *const_rtx;
7 enum rtx_code
9 UNKNOWN, VALUE, DEBUG_EXPR, EXPR_LIST, INSN_LIST, SEQUENCE, ADDRESS,
10 DEBUG_INSN, INSN, JUMP_INSN, CALL_INSN, BARRIER, CODE_LABEL, NOTE,
11 COND_EXEC, PARALLEL, ASM_INPUT, ASM_OPERANDS, UNSPEC, UNSPEC_VOLATILE,
12 ADDR_VEC, ADDR_DIFF_VEC, PREFETCH, SET, USE, CLOBBER, CALL, RETURN,
13 EH_RETURN, TRAP_IF, CONST_INT, CONST_FIXED, CONST_DOUBLE, CONST_VECTOR,
14 CONST_STRING, CONST, PC, REG, SCRATCH, SUBREG, STRICT_LOW_PART, CONCAT,
15 CONCATN, MEM, LABEL_REF, SYMBOL_REF, CC0, IF_THEN_ELSE, COMPARE, PLUS,
16 MINUS, NEG, MULT, SS_MULT, US_MULT, DIV, SS_DIV, US_DIV, MOD, UDIV, UMOD,
17 AND, IOR, XOR, NOT, ASHIFT, ROTATE, ASHIFTRT, LSHIFTRT, ROTATERT, SMIN,
18 SMAX, UMIN, UMAX, PRE_DEC, PRE_INC, POST_DEC, POST_INC, PRE_MODIFY,
19 POST_MODIFY, NE, EQ, GE, GT, LE, LT, GEU, GTU, LEU, LTU, UNORDERED,
20 ORDERED, UNEQ, UNGE, UNGT, UNLE, UNLT, LTGT, SIGN_EXTEND, ZERO_EXTEND,
21 TRUNCATE, FLOAT_EXTEND, FLOAT_TRUNCATE, FLOAT, FIX, UNSIGNED_FLOAT,
22 UNSIGNED_FIX, FRACT_CONVERT, UNSIGNED_FRACT_CONVERT, SAT_FRACT,
23 UNSIGNED_SAT_FRACT, ABS, SQRT, BSWAP, FFS, CLZ, CTZ, POPCOUNT, PARITY,
24 SIGN_EXTRACT, ZERO_EXTRACT, HIGH, LO_SUM, VEC_MERGE, VEC_SELECT,
25 VEC_CONCAT, VEC_DUPLICATE, SS_PLUS, US_PLUS, SS_MINUS, SS_NEG, US_NEG,
26 SS_ABS, SS_ASHIFT, US_ASHIFT, US_MINUS, SS_TRUNCATE, US_TRUNCATE, FMA,
27 VAR_LOCATION, DEBUG_IMPLICIT_PTR, ENTRY_VALUE, LAST_AND_UNUSED_RTX_CODE
29 union rtunion_def
31 rtx rt_rtx;
33 typedef union rtunion_def rtunion;
34 struct rtx_def
36 int code;
37 union u
39 rtunion fld[1];
44 unsigned int rtx_cost (rtx, enum rtx_code, unsigned char);
45 rtx single_set_2 (const_rtx, rtx);
47 unsigned
48 seq_cost (const_rtx seq, unsigned char speed)
50 unsigned cost = 0;
51 rtx set;
52 for (; seq; seq = (((seq)->u.fld[2]).rt_rtx))
54 set =
55 (((((enum rtx_code) (seq)->code) == INSN)
56 || (((enum rtx_code) (seq)->code) == DEBUG_INSN)
57 || (((enum rtx_code) (seq)->code) == JUMP_INSN)
58 || (((enum rtx_code) (seq)->code) ==
59 CALL_INSN)) ? (((enum rtx_code) ((((seq)->u.fld[4]).rt_rtx))->
60 code) ==
61 SET ? (((seq)->u.fld[4]).
62 rt_rtx) : single_set_2 (seq,
63 (((seq)->u.
64 fld[4]).
65 rt_rtx))) : (rtx)
66 0);
67 if (set)
68 cost += rtx_cost (set, SET, speed);