Merge -r 127928:132243 from trunk
[official-gcc.git] / gcc / global.c
blob3728f6d40f322005d53a11d6e13140dc53ae45a4
1 /* Allocate registers for pseudo-registers that span basic blocks.
2 Copyright (C) 1987, 1988, 1991, 1994, 1996, 1997, 1998,
3 1999, 2000, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "machmode.h"
28 #include "hard-reg-set.h"
29 #include "rtl.h"
30 #include "tm_p.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "reload.h"
37 #include "output.h"
38 #include "toplev.h"
39 #include "tree-pass.h"
40 #include "timevar.h"
41 #include "df.h"
42 #include "vecprim.h"
43 #include "dbgcnt.h"
44 #include "ra.h"
46 /* This pass of the compiler performs global register allocation.
47 It assigns hard register numbers to all the pseudo registers
48 that were not handled in local_alloc. Assignments are recorded
49 in the vector reg_renumber, not by changing the rtl code.
50 (Such changes are made by final). The entry point is
51 the function global_alloc.
53 After allocation is complete, the reload pass is run as a subroutine
54 of this pass, so that when a pseudo reg loses its hard reg due to
55 spilling it is possible to make a second attempt to find a hard
56 reg for it. The reload pass is independent in other respects
57 and it is run even when stupid register allocation is in use.
59 1. Assign allocation-numbers (allocnos) to the pseudo-registers
60 still needing allocations and to the pseudo-registers currently
61 allocated by local-alloc which may be spilled by reload.
62 Set up tables reg_allocno and allocno_reg to map
63 reg numbers to allocnos and vice versa.
64 max_allocno gets the number of allocnos in use.
66 2. Allocate a max_allocno by max_allocno compressed triangular conflict
67 bit matrix (a triangular bit matrix with portions removed for which we
68 can guarantee there are no conflicts, example: two local pseudos that
69 live in different basic blocks) and clear it. This is called "conflict".
70 Note that for triangular bit matrices, there are two possible equations
71 for computing the bit number for two allocnos: LOW and HIGH (LOW < HIGH):
73 1) BITNUM = f(HIGH) + LOW, where
74 f(HIGH) = (HIGH * (HIGH - 1)) / 2
76 2) BITNUM = f(LOW) + HIGH, where
77 f(LOW) = LOW * (max_allocno - LOW) + (LOW * (LOW - 1)) / 2 - LOW - 1
79 We use the second (and less common) equation as this gives us better
80 cache locality for local allocnos that are live within the same basic
81 block. Also note that f(HIGH) and f(LOW) can be precalculated for all
82 values of HIGH and LOW, so all that is necessary to compute the bit
83 number for two allocnos LOW and HIGH is a load followed by an addition.
85 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix for
86 conflicts between allocnos and explicit hard register use (which
87 includes use of pseudo-registers allocated by local_alloc). This
88 is the hard_reg_conflicts inside each allocno.
90 3. For each basic block, walk backward through the block, recording
91 which pseudo-registers and which hardware registers are live.
92 Build the conflict matrix between the pseudo-registers and another of
93 pseudo-registers versus hardware registers.
95 4. For each basic block, walk backward through the block, recording
96 the preferred hardware registers for each pseudo-register.
98 5. Sort a table of the allocnos into order of desirability of the variables.
100 6. Allocate the variables in that order; each if possible into
101 a preferred register, else into another register. */
103 /* A vector of the integers from 0 to max_allocno-1,
104 sorted in the order of first-to-be-allocated first. */
106 static int *allocno_order;
108 /* Set of registers that global-alloc isn't supposed to use. */
110 static HARD_REG_SET no_global_alloc_regs;
112 /* Set of registers used so far. */
114 static HARD_REG_SET regs_used_so_far;
116 /* Number of refs to each hard reg, as used by local alloc.
117 It is zero for a reg that contains global pseudos or is explicitly used. */
119 static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
121 /* Frequency of uses of given hard reg. */
122 static int local_reg_freq[FIRST_PSEUDO_REGISTER];
124 /* Guess at live length of each hard reg, as used by local alloc.
125 This is actually the sum of the live lengths of the specific regs. */
127 static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
129 /* Set to 1 a bit in a vector TABLE of HARD_REG_SETs, for vector
130 element I, and hard register number J. */
132 #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (allocno[I].TABLE, J)
134 /* This is turned off because it doesn't work right for DImode.
135 (And it is only used for DImode, so the other cases are worthless.)
136 The problem is that it isn't true that there is NO possibility of conflict;
137 only that there is no conflict if the two pseudos get the exact same regs.
138 If they were allocated with a partial overlap, there would be a conflict.
139 We can't safely turn off the conflict unless we have another way to
140 prevent the partial overlap.
142 Idea: change hard_reg_conflicts so that instead of recording which
143 hard regs the allocno may not overlap, it records where the allocno
144 may not start. Change both where it is used and where it is updated.
145 Then there is a way to record that (reg:DI 108) may start at 10
146 but not at 9 or 11. There is still the question of how to record
147 this semi-conflict between two pseudos. */
148 #if 0
149 /* Reg pairs for which conflict after the current insn
150 is inhibited by a REG_NO_CONFLICT note.
151 If the table gets full, we ignore any other notes--that is conservative. */
152 #define NUM_NO_CONFLICT_PAIRS 4
153 /* Number of pairs in use in this insn. */
154 int n_no_conflict_pairs;
155 static struct { int allocno1, allocno2;}
156 no_conflict_pairs[NUM_NO_CONFLICT_PAIRS];
157 #endif /* 0 */
159 /* Return true if *LOC contains an asm. */
161 static int
162 insn_contains_asm_1 (rtx *loc, void *data ATTRIBUTE_UNUSED)
164 if ( !*loc)
165 return 0;
166 if (GET_CODE (*loc) == ASM_OPERANDS)
167 return 1;
168 return 0;
172 /* Return true if INSN contains an ASM. */
174 static int
175 insn_contains_asm (rtx insn)
177 return for_each_rtx (&insn, insn_contains_asm_1, NULL);
181 static void
182 compute_regs_asm_clobbered (char *regs_asm_clobbered)
184 basic_block bb;
186 memset (regs_asm_clobbered, 0, sizeof (char) * FIRST_PSEUDO_REGISTER);
188 FOR_EACH_BB (bb)
190 rtx insn;
191 FOR_BB_INSNS_REVERSE (bb, insn)
193 struct df_ref **def_rec;
194 if (insn_contains_asm (insn))
195 for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
197 struct df_ref *def = *def_rec;
198 unsigned int dregno = DF_REF_REGNO (def);
199 if (dregno < FIRST_PSEUDO_REGISTER)
201 unsigned int i;
202 enum machine_mode mode = GET_MODE (DF_REF_REAL_REG (def));
203 unsigned int end = dregno
204 + hard_regno_nregs[dregno][mode] - 1;
205 for (i = dregno; i <= end; ++i)
206 regs_asm_clobbered[i] = 1;
214 /* All registers that can be eliminated. */
216 HARD_REG_SET eliminable_regset;
218 static int regno_compare (const void *, const void *);
219 static int allocno_compare (const void *, const void *);
220 static void expand_preferences (void);
221 static void prune_preferences (void);
222 static void set_preferences (void);
223 static void find_reg (int, HARD_REG_SET, int, int, int);
224 static void dump_conflicts (FILE *);
225 void build_insn_chain (void);
228 /* Look through the list of eliminable registers. Set ELIM_SET to the
229 set of registers which may be eliminated. Set NO_GLOBAL_SET to the
230 set of registers which may not be used across blocks.
232 This will normally be called with ELIM_SET as the file static
233 variable eliminable_regset, and NO_GLOBAL_SET as the file static
234 variable NO_GLOBAL_ALLOC_REGS. */
236 static void
237 compute_regsets (HARD_REG_SET *elim_set,
238 HARD_REG_SET *no_global_set)
241 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
242 Unlike regs_ever_live, elements of this array corresponding to
243 eliminable regs like the frame pointer are set if an asm sets them. */
244 char *regs_asm_clobbered = alloca (FIRST_PSEUDO_REGISTER * sizeof (char));
246 #ifdef ELIMINABLE_REGS
247 static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
248 size_t i;
249 #endif
250 int need_fp
251 = (! flag_omit_frame_pointer
252 || (current_function_calls_alloca && EXIT_IGNORE_STACK)
253 || FRAME_POINTER_REQUIRED);
255 max_regno = max_reg_num ();
256 compact_blocks ();
258 max_allocno = 0;
260 /* A machine may have certain hard registers that
261 are safe to use only within a basic block. */
263 CLEAR_HARD_REG_SET (*no_global_set);
264 CLEAR_HARD_REG_SET (*elim_set);
266 compute_regs_asm_clobbered (regs_asm_clobbered);
267 /* Build the regset of all eliminable registers and show we can't use those
268 that we already know won't be eliminated. */
269 #ifdef ELIMINABLE_REGS
270 for (i = 0; i < ARRAY_SIZE (eliminables); i++)
272 bool cannot_elim
273 = (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
274 || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp));
276 if (!regs_asm_clobbered[eliminables[i].from])
278 SET_HARD_REG_BIT (*elim_set, eliminables[i].from);
280 if (cannot_elim)
281 SET_HARD_REG_BIT (*no_global_set, eliminables[i].from);
283 else if (cannot_elim)
284 error ("%s cannot be used in asm here",
285 reg_names[eliminables[i].from]);
286 else
287 df_set_regs_ever_live (eliminables[i].from, true);
289 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
290 if (!regs_asm_clobbered[HARD_FRAME_POINTER_REGNUM])
292 SET_HARD_REG_BIT (*elim_set, HARD_FRAME_POINTER_REGNUM);
293 if (need_fp)
294 SET_HARD_REG_BIT (*no_global_set, HARD_FRAME_POINTER_REGNUM);
296 else if (need_fp)
297 error ("%s cannot be used in asm here",
298 reg_names[HARD_FRAME_POINTER_REGNUM]);
299 else
300 df_set_regs_ever_live (HARD_FRAME_POINTER_REGNUM, true);
301 #endif
303 #else
304 if (!regs_asm_clobbered[FRAME_POINTER_REGNUM])
306 SET_HARD_REG_BIT (*elim_set, FRAME_POINTER_REGNUM);
307 if (need_fp)
308 SET_HARD_REG_BIT (*no_global_set, FRAME_POINTER_REGNUM);
310 else if (need_fp)
311 error ("%s cannot be used in asm here", reg_names[FRAME_POINTER_REGNUM]);
312 else
313 df_set_regs_ever_live (FRAME_POINTER_REGNUM, true);
314 #endif
317 /* Perform allocation of pseudo-registers not allocated by local_alloc.
319 Return value is nonzero if reload failed
320 and we must not do any more for this function. */
322 static int
323 global_alloc (void)
325 int retval;
326 size_t i;
327 int max_blk;
328 int *num_allocnos_per_blk;
330 compute_regsets (&eliminable_regset, &no_global_alloc_regs);
332 /* Track which registers have already been used. Start with registers
333 explicitly in the rtl, then registers allocated by local register
334 allocation. */
336 CLEAR_HARD_REG_SET (regs_used_so_far);
337 #ifdef LEAF_REGISTERS
338 /* If we are doing the leaf function optimization, and this is a leaf
339 function, it means that the registers that take work to save are those
340 that need a register window. So prefer the ones that can be used in
341 a leaf function. */
343 const char *cheap_regs;
344 const char *const leaf_regs = LEAF_REGISTERS;
346 if (only_leaf_regs_used () && leaf_function_p ())
347 cheap_regs = leaf_regs;
348 else
349 cheap_regs = call_used_regs;
350 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
351 if (df_regs_ever_live_p (i) || cheap_regs[i])
352 SET_HARD_REG_BIT (regs_used_so_far, i);
354 #else
355 /* We consider registers that do not have to be saved over calls as if
356 they were already used since there is no cost in using them. */
357 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
358 if (df_regs_ever_live_p (i) || call_used_regs[i])
359 SET_HARD_REG_BIT (regs_used_so_far, i);
360 #endif
362 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
363 if (reg_renumber[i] >= 0)
364 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
366 /* Establish mappings from register number to allocation number
367 and vice versa. In the process, count the allocnos. */
369 reg_allocno = XNEWVEC (int, max_regno);
371 /* Initially fill the reg_allocno array with regno's... */
372 max_blk = 0;
373 max_allocno = 0;
374 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
375 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
376 that we are supposed to refrain from putting in a hard reg.
377 -2 means do make an allocno but don't allocate it. */
378 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
379 /* Don't allocate pseudos that cross calls,
380 if this function receives a nonlocal goto. */
381 && (! current_function_has_nonlocal_label
382 || REG_N_CALLS_CROSSED (i) == 0))
384 int blk = regno_basic_block (i);
385 reg_allocno[max_allocno++] = i;
386 if (blk > max_blk)
387 max_blk = blk;
388 gcc_assert (REG_LIVE_LENGTH (i));
391 allocno = XCNEWVEC (struct allocno, max_allocno);
392 partial_bitnum = XNEWVEC (HOST_WIDE_INT, max_allocno);
393 num_allocnos_per_blk = XCNEWVEC (int, max_blk + 1);
395 /* ...so we can sort them in the order we want them to receive
396 their allocnos. */
397 qsort (reg_allocno, max_allocno, sizeof (int), regno_compare);
399 for (i = 0; i < (size_t) max_allocno; i++)
401 int regno = reg_allocno[i];
402 int blk = regno_basic_block (regno);
403 num_allocnos_per_blk[blk]++;
404 allocno[i].reg = regno;
405 allocno[i].size = PSEUDO_REGNO_SIZE (regno);
406 allocno[i].calls_crossed += REG_N_CALLS_CROSSED (regno);
407 allocno[i].freq_calls_crossed += REG_FREQ_CALLS_CROSSED (regno);
408 allocno[i].throwing_calls_crossed
409 += REG_N_THROWING_CALLS_CROSSED (regno);
410 allocno[i].n_refs += REG_N_REFS (regno);
411 allocno[i].freq += REG_FREQ (regno);
412 if (allocno[i].live_length < REG_LIVE_LENGTH (regno))
413 allocno[i].live_length = REG_LIVE_LENGTH (regno);
416 /* The "global" block must contain all allocnos. */
417 num_allocnos_per_blk[0] = max_allocno;
419 /* Now reinitialize the reg_allocno array in terms of the
420 optimized regno to allocno mapping we created above. */
421 for (i = 0; i < (size_t) max_regno; i++)
422 reg_allocno[i] = -1;
424 max_bitnum = 0;
425 for (i = 0; i < (size_t) max_allocno; i++)
427 int regno = allocno[i].reg;
428 int blk = regno_basic_block (regno);
429 int row_size = --num_allocnos_per_blk[blk];
430 reg_allocno[regno] = (int) i;
431 partial_bitnum[i] = (row_size > 0) ? max_bitnum - ((int) i + 1) : -1;
432 max_bitnum += row_size;
435 #ifdef ENABLE_CHECKING
436 gcc_assert (max_bitnum <=
437 (((HOST_WIDE_INT) max_allocno *
438 ((HOST_WIDE_INT) max_allocno - 1)) / 2));
439 #endif
441 if (dump_file)
443 HOST_WIDE_INT num_bits, num_bytes, actual_bytes;
445 fprintf (dump_file, "## max_blk: %d\n", max_blk);
446 fprintf (dump_file, "## max_regno: %d\n", max_regno);
447 fprintf (dump_file, "## max_allocno: %d\n", max_allocno);
449 num_bits = max_bitnum;
450 num_bytes = CEIL (num_bits, 8);
451 actual_bytes = num_bytes;
452 fprintf (dump_file, "## Compressed triangular bitmatrix size: ");
453 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
454 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes\n", num_bytes);
456 num_bits = ((HOST_WIDE_INT) max_allocno *
457 ((HOST_WIDE_INT) max_allocno - 1)) / 2;
458 num_bytes = CEIL (num_bits, 8);
459 fprintf (dump_file, "## Standard triangular bitmatrix size: ");
460 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
461 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes [%.2f%%]\n",
462 num_bytes, 100.0 * ((double) actual_bytes / (double) num_bytes));
464 num_bits = (HOST_WIDE_INT) max_allocno * (HOST_WIDE_INT) max_allocno;
465 num_bytes = CEIL (num_bits, 8);
466 fprintf (dump_file, "## Square bitmatrix size: ");
467 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
468 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes [%.2f%%]\n",
469 num_bytes, 100.0 * ((double) actual_bytes / (double) num_bytes));
472 /* Calculate amount of usage of each hard reg by pseudos
473 allocated by local-alloc. This is to see if we want to
474 override it. */
475 memset (local_reg_live_length, 0, sizeof local_reg_live_length);
476 memset (local_reg_n_refs, 0, sizeof local_reg_n_refs);
477 memset (local_reg_freq, 0, sizeof local_reg_freq);
478 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
479 if (reg_renumber[i] >= 0)
481 int regno = reg_renumber[i];
482 int endregno = end_hard_regno (PSEUDO_REGNO_MODE (i), regno);
483 int j;
485 for (j = regno; j < endregno; j++)
487 local_reg_n_refs[j] += REG_N_REFS (i);
488 local_reg_freq[j] += REG_FREQ (i);
489 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
493 /* We can't override local-alloc for a reg used not just by local-alloc. */
494 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
495 if (df_regs_ever_live_p (i))
496 local_reg_n_refs[i] = 0, local_reg_freq[i] = 0;
498 if (dump_file)
500 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
502 fprintf (dump_file, "%d REG_N_REFS=%d, REG_FREQ=%d, REG_LIVE_LENGTH=%d\n",
503 (int)i, REG_N_REFS (i), REG_FREQ (i), REG_LIVE_LENGTH (i));
505 fprintf (dump_file, "regs_ever_live =");
506 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
507 if (df_regs_ever_live_p (i))
508 fprintf (dump_file, " %d", (int)i);
509 fprintf (dump_file, "\n");
512 conflicts = NULL;
513 adjacency = NULL;
514 adjacency_pool = NULL;
516 /* If there is work to be done (at least one reg to allocate),
517 perform global conflict analysis and allocate the regs. */
519 if (max_allocno > 0)
521 /* We used to use alloca here, but the size of what it would try to
522 allocate would occasionally cause it to exceed the stack limit and
523 cause unpredictable core dumps. Some examples were > 2Mb in size. */
524 conflicts = XCNEWVEC (HOST_WIDEST_FAST_INT,
525 CEIL(max_bitnum, HOST_BITS_PER_WIDEST_FAST_INT));
527 adjacency = XCNEWVEC (adjacency_t *, max_allocno);
528 adjacency_pool = create_alloc_pool ("global_alloc adjacency list pool",
529 sizeof (adjacency_t), 1024);
531 /* Scan all the insns and compute the conflicts among allocnos
532 and between allocnos and hard regs. */
534 global_conflicts ();
536 /* There is just too much going on in the register allocators to
537 keep things up to date. At the end we have to rescan anyway
538 because things change when the reload_completed flag is set.
539 So we just turn off scanning and we will rescan by hand.
541 However, we needed to do the rescanning before this point to
542 get the new insns scanned inserted by local_alloc scanned for
543 global_conflicts. */
544 df_set_flags (DF_NO_INSN_RESCAN);
546 /* Eliminate conflicts between pseudos and eliminable registers. If
547 the register is not eliminated, the pseudo won't really be able to
548 live in the eliminable register, so the conflict doesn't matter.
549 If we do eliminate the register, the conflict will no longer exist.
550 So in either case, we can ignore the conflict. Likewise for
551 preferences. */
553 set_preferences ();
555 for (i = 0; i < (size_t) max_allocno; i++)
557 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_conflicts,
558 eliminable_regset);
559 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_copy_preferences,
560 eliminable_regset);
561 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_preferences,
562 eliminable_regset);
565 /* Try to expand the preferences by merging them between allocnos. */
567 expand_preferences ();
569 /* Determine the order to allocate the remaining pseudo registers. */
571 allocno_order = XNEWVEC (int, max_allocno);
572 for (i = 0; i < (size_t) max_allocno; i++)
573 allocno_order[i] = i;
575 /* Default the size to 1, since allocno_compare uses it to divide by.
576 Also convert allocno_live_length of zero to -1. A length of zero
577 can occur when all the registers for that allocno have reg_live_length
578 equal to -2. In this case, we want to make an allocno, but not
579 allocate it. So avoid the divide-by-zero and set it to a low
580 priority. */
582 for (i = 0; i < (size_t) max_allocno; i++)
584 if (allocno[i].size == 0)
585 allocno[i].size = 1;
586 if (allocno[i].live_length == 0)
587 allocno[i].live_length = -1;
590 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
592 prune_preferences ();
594 if (dump_file)
595 dump_conflicts (dump_file);
597 /* Try allocating them, one by one, in that order,
598 except for parameters marked with reg_live_length[regno] == -2. */
600 for (i = 0; i < (size_t) max_allocno; i++)
601 if (reg_renumber[allocno[allocno_order[i]].reg] < 0
602 && REG_LIVE_LENGTH (allocno[allocno_order[i]].reg) >= 0)
604 if (!dbg_cnt (global_alloc_at_reg))
605 break;
606 /* If we have more than one register class,
607 first try allocating in the class that is cheapest
608 for this pseudo-reg. If that fails, try any reg. */
609 if (N_REG_CLASSES > 1)
611 find_reg (allocno_order[i], 0, 0, 0, 0);
612 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
614 if (dump_file)
615 fprintf (dump_file, "Assign %d to %d\n",
616 reg_renumber[allocno[allocno_order[i]].reg],
617 allocno[allocno_order[i]].reg);
618 continue;
621 if (reg_alternate_class (allocno[allocno_order[i]].reg) != NO_REGS)
623 find_reg (allocno_order[i], 0, 1, 0, 0);
624 if (dump_file)
625 fprintf (dump_file, "Assign %d to %d\n",
626 reg_renumber[allocno[allocno_order[i]].reg],
627 allocno[allocno_order[i]].reg);
631 free (allocno_order);
632 free (conflicts);
635 /* Do the reloads now while the allocno data still exists, so that we can
636 try to assign new hard regs to any pseudo regs that are spilled. */
638 #if 0 /* We need to eliminate regs even if there is no rtl code,
639 for the sake of debugging information. */
640 if (n_basic_blocks > NUM_FIXED_BLOCKS)
641 #endif
643 build_insn_chain ();
644 retval = reload (get_insns (), 1);
647 /* Clean up. */
648 free (reg_allocno);
649 free (num_allocnos_per_blk);
650 free (partial_bitnum);
651 free (allocno);
652 if (adjacency != NULL)
654 free_alloc_pool (adjacency_pool);
655 free (adjacency);
658 return retval;
661 /* Sort predicate for ordering the regnos. We want the regno to allocno
662 mapping to have the property that all "global" regnos (ie, regnos that
663 are referenced in more than one basic block) have smaller allocno values
664 than "local" regnos (ie, regnos referenced in only one basic block).
665 In addition, for two basic blocks "i" and "j" with i < j, all regnos
666 local to basic block i should have smaller allocno values than regnos
667 local to basic block j.
668 Returns -1 (1) if *v1p should be allocated before (after) *v2p. */
670 static int
671 regno_compare (const void *v1p, const void *v2p)
673 int regno1 = *(const int *)v1p;
674 int regno2 = *(const int *)v2p;
675 int blk1 = REG_BASIC_BLOCK (regno1);
676 int blk2 = REG_BASIC_BLOCK (regno2);
678 /* Prefer lower numbered basic blocks. Note that global and unknown
679 blocks have negative values, giving them high precedence. */
680 if (blk1 - blk2)
681 return blk1 - blk2;
683 /* If both regs are referenced from the same block, sort by regno. */
684 return regno1 - regno2;
687 /* Sort predicate for ordering the allocnos.
688 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
690 static int
691 allocno_compare (const void *v1p, const void *v2p)
693 int v1 = *(const int *)v1p, v2 = *(const int *)v2p;
694 /* Note that the quotient will never be bigger than
695 the value of floor_log2 times the maximum number of
696 times a register can occur in one insn (surely less than 100)
697 weighted by the frequency (maximally REG_FREQ_MAX).
698 Multiplying this by 10000/REG_FREQ_MAX can't overflow. */
699 int pri1
700 = (((double) (floor_log2 (allocno[v1].n_refs) * allocno[v1].freq)
701 / allocno[v1].live_length)
702 * (10000 / REG_FREQ_MAX) * allocno[v1].size);
703 int pri2
704 = (((double) (floor_log2 (allocno[v2].n_refs) * allocno[v2].freq)
705 / allocno[v2].live_length)
706 * (10000 / REG_FREQ_MAX) * allocno[v2].size);
707 if (pri2 - pri1)
708 return pri2 - pri1;
710 /* If regs are equally good, sort by allocno,
711 so that the results of qsort leave nothing to chance. */
712 return v1 - v2;
715 /* Expand the preference information by looking for cases where one allocno
716 dies in an insn that sets an allocno. If those two allocnos don't conflict,
717 merge any preferences between those allocnos. */
719 static void
720 expand_preferences (void)
722 rtx insn;
723 rtx link;
724 rtx set;
726 /* We only try to handle the most common cases here. Most of the cases
727 where this wins are reg-reg copies. */
729 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
730 if (INSN_P (insn)
731 && (set = single_set (insn)) != 0
732 && REG_P (SET_DEST (set))
733 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
734 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
735 if (REG_NOTE_KIND (link) == REG_DEAD
736 && REG_P (XEXP (link, 0))
737 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
738 && ! conflict_p (reg_allocno[REGNO (SET_DEST (set))],
739 reg_allocno[REGNO (XEXP (link, 0))]))
741 int a1 = reg_allocno[REGNO (SET_DEST (set))];
742 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
744 if (XEXP (link, 0) == SET_SRC (set))
746 IOR_HARD_REG_SET (allocno[a1].hard_reg_copy_preferences,
747 allocno[a2].hard_reg_copy_preferences);
748 IOR_HARD_REG_SET (allocno[a2].hard_reg_copy_preferences,
749 allocno[a1].hard_reg_copy_preferences);
752 IOR_HARD_REG_SET (allocno[a1].hard_reg_preferences,
753 allocno[a2].hard_reg_preferences);
754 IOR_HARD_REG_SET (allocno[a2].hard_reg_preferences,
755 allocno[a1].hard_reg_preferences);
756 IOR_HARD_REG_SET (allocno[a1].hard_reg_full_preferences,
757 allocno[a2].hard_reg_full_preferences);
758 IOR_HARD_REG_SET (allocno[a2].hard_reg_full_preferences,
759 allocno[a1].hard_reg_full_preferences);
764 /* Try to set a preference for an allocno to a hard register.
765 We are passed DEST and SRC which are the operands of a SET. It is known
766 that SRC is a register. If SRC or the first operand of SRC is a register,
767 try to set a preference. If one of the two is a hard register and the other
768 is a pseudo-register, mark the preference.
770 Note that we are not as aggressive as local-alloc in trying to tie a
771 pseudo-register to a hard register. */
773 static void
774 set_preference (rtx dest, rtx src)
776 unsigned int src_regno, dest_regno, end_regno;
777 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
778 to compensate for subregs in SRC or DEST. */
779 int offset = 0;
780 unsigned int i;
781 int copy = 1;
783 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
784 src = XEXP (src, 0), copy = 0;
786 /* Get the reg number for both SRC and DEST.
787 If neither is a reg, give up. */
789 if (REG_P (src))
790 src_regno = REGNO (src);
791 else if (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)))
793 src_regno = REGNO (SUBREG_REG (src));
795 if (REGNO (SUBREG_REG (src)) < FIRST_PSEUDO_REGISTER)
796 offset += subreg_regno_offset (REGNO (SUBREG_REG (src)),
797 GET_MODE (SUBREG_REG (src)),
798 SUBREG_BYTE (src),
799 GET_MODE (src));
800 else
801 offset += (SUBREG_BYTE (src)
802 / REGMODE_NATURAL_SIZE (GET_MODE (src)));
804 else
805 return;
807 if (REG_P (dest))
808 dest_regno = REGNO (dest);
809 else if (GET_CODE (dest) == SUBREG && REG_P (SUBREG_REG (dest)))
811 dest_regno = REGNO (SUBREG_REG (dest));
813 if (REGNO (SUBREG_REG (dest)) < FIRST_PSEUDO_REGISTER)
814 offset -= subreg_regno_offset (REGNO (SUBREG_REG (dest)),
815 GET_MODE (SUBREG_REG (dest)),
816 SUBREG_BYTE (dest),
817 GET_MODE (dest));
818 else
819 offset -= (SUBREG_BYTE (dest)
820 / REGMODE_NATURAL_SIZE (GET_MODE (dest)));
822 else
823 return;
825 /* Convert either or both to hard reg numbers. */
827 if (reg_renumber[src_regno] >= 0)
828 src_regno = reg_renumber[src_regno];
830 if (reg_renumber[dest_regno] >= 0)
831 dest_regno = reg_renumber[dest_regno];
833 /* Now if one is a hard reg and the other is a global pseudo
834 then give the other a preference. */
836 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
837 && reg_allocno[src_regno] >= 0)
839 dest_regno -= offset;
840 if (dest_regno < FIRST_PSEUDO_REGISTER)
842 if (copy)
843 SET_REGBIT (hard_reg_copy_preferences,
844 reg_allocno[src_regno], dest_regno);
846 SET_REGBIT (hard_reg_preferences,
847 reg_allocno[src_regno], dest_regno);
848 end_regno = end_hard_regno (GET_MODE (dest), dest_regno);
849 for (i = dest_regno; i < end_regno; i++)
850 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
854 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
855 && reg_allocno[dest_regno] >= 0)
857 src_regno += offset;
858 if (src_regno < FIRST_PSEUDO_REGISTER)
860 if (copy)
861 SET_REGBIT (hard_reg_copy_preferences,
862 reg_allocno[dest_regno], src_regno);
864 SET_REGBIT (hard_reg_preferences,
865 reg_allocno[dest_regno], src_regno);
866 end_regno = end_hard_regno (GET_MODE (src), src_regno);
867 for (i = src_regno; i < end_regno; i++)
868 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
873 /* Helper function for set_preferences. */
874 static void
875 set_preferences_1 (rtx reg, const_rtx setter, void *data ATTRIBUTE_UNUSED)
877 if (GET_CODE (reg) == SUBREG)
878 reg = SUBREG_REG (reg);
880 if (!REG_P (reg))
881 return;
883 gcc_assert (setter);
884 if (GET_CODE (setter) != CLOBBER)
885 set_preference (reg, SET_SRC (setter));
888 /* Scan all of the insns and initialize the preferences. */
890 static void
891 set_preferences (void)
893 basic_block bb;
894 rtx insn;
895 FOR_EACH_BB (bb)
896 FOR_BB_INSNS_REVERSE (bb, insn)
898 if (!INSN_P (insn))
899 continue;
901 note_stores (PATTERN (insn), set_preferences_1, NULL);
907 /* Prune the preferences for global registers to exclude registers that cannot
908 be used.
910 Compute `regs_someone_prefers', which is a bitmask of the hard registers
911 that are preferred by conflicting registers of lower priority. If possible,
912 we will avoid using these registers. */
914 static void
915 prune_preferences (void)
917 int i;
918 int num;
919 int *allocno_to_order = XNEWVEC (int, max_allocno);
921 /* Scan least most important to most important.
922 For each allocno, remove from preferences registers that cannot be used,
923 either because of conflicts or register type. Then compute all registers
924 preferred by each lower-priority register that conflicts. */
926 for (i = max_allocno - 1; i >= 0; i--)
928 HARD_REG_SET temp;
930 num = allocno_order[i];
931 allocno_to_order[num] = i;
932 COPY_HARD_REG_SET (temp, allocno[num].hard_reg_conflicts);
934 if (allocno[num].calls_crossed == 0)
935 IOR_HARD_REG_SET (temp, fixed_reg_set);
936 else
937 IOR_HARD_REG_SET (temp, call_used_reg_set);
939 IOR_COMPL_HARD_REG_SET
940 (temp,
941 reg_class_contents[(int) reg_preferred_class (allocno[num].reg)]);
943 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, temp);
944 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, temp);
945 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_full_preferences, temp);
948 for (i = max_allocno - 1; i >= 0; i--)
950 /* Merge in the preferences of lower-priority registers (they have
951 already been pruned). If we also prefer some of those registers,
952 don't exclude them unless we are of a smaller size (in which case
953 we want to give the lower-priority allocno the first chance for
954 these registers). */
955 HARD_REG_SET temp, temp2;
956 int allocno2;
957 adjacency_iter ai;
959 num = allocno_order[i];
961 CLEAR_HARD_REG_SET (temp);
962 CLEAR_HARD_REG_SET (temp2);
964 FOR_EACH_CONFLICT (num, allocno2, ai)
966 if (allocno_to_order[allocno2] > i)
968 if (allocno[allocno2].size <= allocno[num].size)
969 IOR_HARD_REG_SET (temp,
970 allocno[allocno2].hard_reg_full_preferences);
971 else
972 IOR_HARD_REG_SET (temp2,
973 allocno[allocno2].hard_reg_full_preferences);
977 AND_COMPL_HARD_REG_SET (temp, allocno[num].hard_reg_full_preferences);
978 IOR_HARD_REG_SET (temp, temp2);
979 COPY_HARD_REG_SET (allocno[num].regs_someone_prefers, temp);
981 free (allocno_to_order);
984 /* Assign a hard register to allocno NUM; look for one that is the beginning
985 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
986 The registers marked in PREFREGS are tried first.
988 LOSERS, if nonzero, is a HARD_REG_SET indicating registers that cannot
989 be used for this allocation.
991 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
992 Otherwise ignore that preferred class and use the alternate class.
994 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
995 will have to be saved and restored at calls.
997 RETRYING is nonzero if this is called from retry_global_alloc.
999 If we find one, record it in reg_renumber.
1000 If not, do nothing. */
1002 static void
1003 find_reg (int num, HARD_REG_SET losers, int alt_regs_p, int accept_call_clobbered, int retrying)
1005 int i, best_reg, pass;
1006 HARD_REG_SET used, used1, used2;
1008 enum reg_class class = (alt_regs_p
1009 ? reg_alternate_class (allocno[num].reg)
1010 : reg_preferred_class (allocno[num].reg));
1011 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno[num].reg);
1013 if (accept_call_clobbered)
1014 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
1015 else if (allocno[num].calls_crossed == 0)
1016 COPY_HARD_REG_SET (used1, fixed_reg_set);
1017 else
1018 COPY_HARD_REG_SET (used1, call_used_reg_set);
1020 /* Some registers should not be allocated in global-alloc. */
1021 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
1022 if (losers)
1023 IOR_HARD_REG_SET (used1, losers);
1025 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
1027 #ifdef EH_RETURN_DATA_REGNO
1028 if (allocno[num].no_eh_reg)
1030 unsigned int j;
1031 for (j = 0; ; ++j)
1033 unsigned int regno = EH_RETURN_DATA_REGNO (j);
1034 if (regno == INVALID_REGNUM)
1035 break;
1036 SET_HARD_REG_BIT (used1, regno);
1039 #endif
1041 COPY_HARD_REG_SET (used2, used1);
1043 IOR_HARD_REG_SET (used1, allocno[num].hard_reg_conflicts);
1045 #ifdef CANNOT_CHANGE_MODE_CLASS
1046 cannot_change_mode_set_regs (&used1, mode, allocno[num].reg);
1047 #endif
1049 /* Try each hard reg to see if it fits. Do this in two passes.
1050 In the first pass, skip registers that are preferred by some other pseudo
1051 to give it a better chance of getting one of those registers. Only if
1052 we can't get a register when excluding those do we take one of them.
1053 However, we never allocate a register for the first time in pass 0. */
1055 COPY_HARD_REG_SET (used, used1);
1056 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
1057 IOR_HARD_REG_SET (used, allocno[num].regs_someone_prefers);
1059 best_reg = -1;
1060 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
1061 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
1062 pass++)
1064 if (pass == 1)
1065 COPY_HARD_REG_SET (used, used1);
1066 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1068 #ifdef REG_ALLOC_ORDER
1069 int regno = reg_alloc_order[i];
1070 #else
1071 int regno = i;
1072 #endif
1073 if (! TEST_HARD_REG_BIT (used, regno)
1074 && HARD_REGNO_MODE_OK (regno, mode)
1075 && (allocno[num].calls_crossed == 0
1076 || accept_call_clobbered
1077 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
1079 int j;
1080 int lim = end_hard_regno (mode, regno);
1081 for (j = regno + 1;
1082 (j < lim
1083 && ! TEST_HARD_REG_BIT (used, j));
1084 j++);
1085 if (j == lim)
1087 best_reg = regno;
1088 break;
1090 #ifndef REG_ALLOC_ORDER
1091 i = j; /* Skip starting points we know will lose */
1092 #endif
1097 /* See if there is a preferred register with the same class as the register
1098 we allocated above. Making this restriction prevents register
1099 preferencing from creating worse register allocation.
1101 Remove from the preferred registers and conflicting registers. Note that
1102 additional conflicts may have been added after `prune_preferences' was
1103 called.
1105 First do this for those register with copy preferences, then all
1106 preferred registers. */
1108 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, used);
1109 if (!hard_reg_set_empty_p (allocno[num].hard_reg_copy_preferences)
1110 && best_reg >= 0)
1112 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1113 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_copy_preferences, i)
1114 && HARD_REGNO_MODE_OK (i, mode)
1115 && (allocno[num].calls_crossed == 0
1116 || accept_call_clobbered
1117 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1118 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1119 || reg_class_subset_p (REGNO_REG_CLASS (i),
1120 REGNO_REG_CLASS (best_reg))
1121 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1122 REGNO_REG_CLASS (i))))
1124 int j;
1125 int lim = end_hard_regno (mode, i);
1126 for (j = i + 1;
1127 (j < lim
1128 && ! TEST_HARD_REG_BIT (used, j)
1129 && (REGNO_REG_CLASS (j)
1130 == REGNO_REG_CLASS (best_reg + (j - i))
1131 || reg_class_subset_p (REGNO_REG_CLASS (j),
1132 REGNO_REG_CLASS (best_reg + (j - i)))
1133 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1134 REGNO_REG_CLASS (j))));
1135 j++);
1136 if (j == lim)
1138 best_reg = i;
1139 goto no_prefs;
1144 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, used);
1145 if (!hard_reg_set_empty_p (allocno[num].hard_reg_preferences)
1146 && best_reg >= 0)
1148 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1149 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_preferences, i)
1150 && HARD_REGNO_MODE_OK (i, mode)
1151 && (allocno[num].calls_crossed == 0
1152 || accept_call_clobbered
1153 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1154 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1155 || reg_class_subset_p (REGNO_REG_CLASS (i),
1156 REGNO_REG_CLASS (best_reg))
1157 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1158 REGNO_REG_CLASS (i))))
1160 int j;
1161 int lim = end_hard_regno (mode, i);
1162 for (j = i + 1;
1163 (j < lim
1164 && ! TEST_HARD_REG_BIT (used, j)
1165 && (REGNO_REG_CLASS (j)
1166 == REGNO_REG_CLASS (best_reg + (j - i))
1167 || reg_class_subset_p (REGNO_REG_CLASS (j),
1168 REGNO_REG_CLASS (best_reg + (j - i)))
1169 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1170 REGNO_REG_CLASS (j))));
1171 j++);
1172 if (j == lim)
1174 best_reg = i;
1175 break;
1179 no_prefs:
1181 /* If we haven't succeeded yet, try with caller-saves.
1182 We need not check to see if the current function has nonlocal
1183 labels because we don't put any pseudos that are live over calls in
1184 registers in that case. */
1186 if (flag_caller_saves && best_reg < 0)
1188 /* Did not find a register. If it would be profitable to
1189 allocate a call-clobbered register and save and restore it
1190 around calls, do that. Don't do this if it crosses any calls
1191 that might throw. */
1192 if (! accept_call_clobbered
1193 && allocno[num].calls_crossed != 0
1194 && allocno[num].throwing_calls_crossed == 0
1195 && CALLER_SAVE_PROFITABLE (optimize_size ? allocno[num].n_refs : allocno[num].freq,
1196 optimize_size ? allocno[num].calls_crossed
1197 : allocno[num].freq_calls_crossed))
1199 HARD_REG_SET new_losers;
1200 if (! losers)
1201 CLEAR_HARD_REG_SET (new_losers);
1202 else
1203 COPY_HARD_REG_SET (new_losers, losers);
1205 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
1206 find_reg (num, new_losers, alt_regs_p, 1, retrying);
1207 if (reg_renumber[allocno[num].reg] >= 0)
1209 caller_save_needed = 1;
1210 return;
1215 /* If we haven't succeeded yet,
1216 see if some hard reg that conflicts with us
1217 was utilized poorly by local-alloc.
1218 If so, kick out the regs that were put there by local-alloc
1219 so we can use it instead. */
1220 if (best_reg < 0 && !retrying
1221 /* Let's not bother with multi-reg allocnos. */
1222 && allocno[num].size == 1
1223 && REG_BASIC_BLOCK (allocno[num].reg) == REG_BLOCK_GLOBAL)
1225 /* Count from the end, to find the least-used ones first. */
1226 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
1228 #ifdef REG_ALLOC_ORDER
1229 int regno = reg_alloc_order[i];
1230 #else
1231 int regno = i;
1232 #endif
1234 if (local_reg_n_refs[regno] != 0
1235 /* Don't use a reg no good for this pseudo. */
1236 && ! TEST_HARD_REG_BIT (used2, regno)
1237 && HARD_REGNO_MODE_OK (regno, mode)
1238 /* The code below assumes that we need only a single
1239 register, but the check of allocno[num].size above
1240 was not enough. Sometimes we need more than one
1241 register for a single-word value. */
1242 && hard_regno_nregs[regno][mode] == 1
1243 && (allocno[num].calls_crossed == 0
1244 || accept_call_clobbered
1245 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
1246 #ifdef CANNOT_CHANGE_MODE_CLASS
1247 && ! invalid_mode_change_p (regno, REGNO_REG_CLASS (regno),
1248 mode)
1249 #endif
1250 #ifdef STACK_REGS
1251 && (!allocno[num].no_stack_reg
1252 || regno < FIRST_STACK_REG || regno > LAST_STACK_REG)
1253 #endif
1256 /* We explicitly evaluate the divide results into temporary
1257 variables so as to avoid excess precision problems that occur
1258 on an i386-unknown-sysv4.2 (unixware) host. */
1260 double tmp1 = ((double) local_reg_freq[regno] * local_reg_n_refs[regno]
1261 / local_reg_live_length[regno]);
1262 double tmp2 = ((double) allocno[num].freq * allocno[num].n_refs
1263 / allocno[num].live_length);
1265 if (tmp1 < tmp2)
1267 /* Hard reg REGNO was used less in total by local regs
1268 than it would be used by this one allocno! */
1269 int k;
1270 if (dump_file)
1272 fprintf (dump_file, "Regno %d better for global %d, ",
1273 regno, allocno[num].reg);
1274 fprintf (dump_file, "fr:%d, ll:%d, nr:%d ",
1275 allocno[num].freq, allocno[num].live_length,
1276 allocno[num].n_refs);
1277 fprintf (dump_file, "(was: fr:%d, ll:%d, nr:%d)\n",
1278 local_reg_freq[regno],
1279 local_reg_live_length[regno],
1280 local_reg_n_refs[regno]);
1283 for (k = 0; k < max_regno; k++)
1284 if (reg_renumber[k] >= 0)
1286 int r = reg_renumber[k];
1287 int endregno
1288 = end_hard_regno (PSEUDO_REGNO_MODE (k), r);
1290 if (regno >= r && regno < endregno)
1292 if (dump_file)
1293 fprintf (dump_file,
1294 "Local Reg %d now on stack\n", k);
1295 reg_renumber[k] = -1;
1299 best_reg = regno;
1300 break;
1306 /* Did we find a register? */
1308 if (best_reg >= 0)
1310 int lim, j;
1311 HARD_REG_SET this_reg;
1312 adjacency_iter ai;
1314 /* Yes. Record it as the hard register of this pseudo-reg. */
1315 reg_renumber[allocno[num].reg] = best_reg;
1317 /* Make a set of the hard regs being allocated. */
1318 CLEAR_HARD_REG_SET (this_reg);
1319 lim = end_hard_regno (mode, best_reg);
1320 for (j = best_reg; j < lim; j++)
1322 SET_HARD_REG_BIT (this_reg, j);
1323 SET_HARD_REG_BIT (regs_used_so_far, j);
1324 /* This is no longer a reg used just by local regs. */
1325 local_reg_n_refs[j] = 0;
1326 local_reg_freq[j] = 0;
1328 /* For each other pseudo-reg conflicting with this one,
1329 mark it as conflicting with the hard regs this one occupies. */
1330 FOR_EACH_CONFLICT (num, j, ai)
1332 IOR_HARD_REG_SET (allocno[j].hard_reg_conflicts, this_reg);
1337 /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1338 Perhaps it had previously seemed not worth a hard reg,
1339 or perhaps its old hard reg has been commandeered for reloads.
1340 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1341 they do not appear to be allocated.
1342 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1344 void
1345 retry_global_alloc (int regno, HARD_REG_SET forbidden_regs)
1347 int alloc_no = reg_allocno[regno];
1348 if (alloc_no >= 0)
1350 /* If we have more than one register class,
1351 first try allocating in the class that is cheapest
1352 for this pseudo-reg. If that fails, try any reg. */
1353 if (N_REG_CLASSES > 1)
1354 find_reg (alloc_no, forbidden_regs, 0, 0, 1);
1355 if (reg_renumber[regno] < 0
1356 && reg_alternate_class (regno) != NO_REGS)
1357 find_reg (alloc_no, forbidden_regs, 1, 0, 1);
1359 /* If we found a register, modify the RTL for the register to
1360 show the hard register, and mark that register live. */
1361 if (reg_renumber[regno] >= 0)
1363 SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]);
1364 mark_home_live (regno);
1369 /* Indicate that hard register number FROM was eliminated and replaced with
1370 an offset from hard register number TO. The status of hard registers live
1371 at the start of a basic block is updated by replacing a use of FROM with
1372 a use of TO. */
1374 void
1375 mark_elimination (int from, int to)
1377 basic_block bb;
1379 FOR_EACH_BB (bb)
1381 regset r = (flag_ira ? DF_LR_IN (bb) : DF_LIVE_IN (bb));
1382 if (REGNO_REG_SET_P (r, from))
1384 CLEAR_REGNO_REG_SET (r, from);
1385 SET_REGNO_REG_SET (r, to);
1390 /* Print chain C to FILE. */
1392 static void
1393 print_insn_chain (FILE *file, struct insn_chain *c)
1395 fprintf (file, "insn=%d, ", INSN_UID(c->insn));
1396 bitmap_print (file, &c->live_throughout, "live_throughout: ", ", ");
1397 bitmap_print (file, &c->dead_or_set, "dead_or_set: ", "\n");
1401 /* Print all reload_insn_chains to FILE. */
1403 static void
1404 print_insn_chains (FILE *file)
1406 struct insn_chain *c;
1407 for (c = reload_insn_chain; c ; c = c->next)
1408 print_insn_chain (file, c);
1412 /* Walk the insns of the current function and build reload_insn_chain,
1413 and record register life information. */
1415 void
1416 build_insn_chain (void)
1418 unsigned int i;
1419 struct insn_chain **p = &reload_insn_chain;
1420 basic_block bb;
1421 struct insn_chain *c = NULL;
1422 struct insn_chain *next = NULL;
1423 bitmap live_relevant_regs = BITMAP_ALLOC (NULL);
1424 bitmap elim_regset = BITMAP_ALLOC (NULL);
1425 /* live_subregs is a vector used to keep accurate information about
1426 which hardregs are live in multiword pseudos. live_subregs and
1427 live_subregs_used are indexed by pseudo number. The live_subreg
1428 entry for a particular pseudo is only used if the corresponding
1429 element is non zero in live_subregs_used. The value in
1430 live_subregs_used is number of bytes that the pseudo can
1431 occupy. */
1432 sbitmap *live_subregs = XCNEWVEC (sbitmap, max_regno);
1433 int *live_subregs_used = XNEWVEC (int, max_regno);
1435 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1436 if (TEST_HARD_REG_BIT (eliminable_regset, i))
1437 bitmap_set_bit (elim_regset, i);
1438 FOR_EACH_BB_REVERSE (bb)
1440 bitmap_iterator bi;
1441 rtx insn;
1443 CLEAR_REG_SET (live_relevant_regs);
1444 memset (live_subregs_used, 0, max_regno * sizeof (int));
1446 EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), 0, i, bi)
1448 if (i >= FIRST_PSEUDO_REGISTER)
1449 break;
1450 bitmap_set_bit (live_relevant_regs, i);
1453 EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), FIRST_PSEUDO_REGISTER, i, bi)
1455 if (reg_renumber[i] >= 0 || flag_ira)
1456 bitmap_set_bit (live_relevant_regs, i);
1459 FOR_BB_INSNS_REVERSE (bb, insn)
1461 if (!NOTE_P (insn) && !BARRIER_P (insn))
1463 unsigned int uid = INSN_UID (insn);
1464 struct df_ref **def_rec;
1465 struct df_ref **use_rec;
1467 c = new_insn_chain ();
1468 c->next = next;
1469 next = c;
1470 *p = c;
1471 p = &c->prev;
1473 c->insn = insn;
1474 c->block = bb->index;
1476 if (INSN_P (insn))
1477 for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
1479 struct df_ref *def = *def_rec;
1480 unsigned int regno = DF_REF_REGNO (def);
1482 /* Ignore may clobbers because these are generated
1483 from calls. However, every other kind of def is
1484 added to dead_or_set. */
1485 if (!DF_REF_FLAGS_IS_SET (def, DF_REF_MAY_CLOBBER))
1487 if (regno < FIRST_PSEUDO_REGISTER)
1489 if (!fixed_regs[regno])
1490 bitmap_set_bit (&c->dead_or_set, regno);
1492 else if (reg_renumber[regno] >= 0 || flag_ira)
1493 bitmap_set_bit (&c->dead_or_set, regno);
1496 if ((regno < FIRST_PSEUDO_REGISTER
1497 || reg_renumber[regno] >= 0 || flag_ira)
1498 && (!DF_REF_FLAGS_IS_SET (def, DF_REF_CONDITIONAL)))
1500 rtx reg = DF_REF_REG (def);
1502 /* We can model subregs, but not if they are
1503 wrapped in ZERO_EXTRACTS. */
1504 if (GET_CODE (reg) == SUBREG
1505 && !DF_REF_FLAGS_IS_SET (def, DF_REF_EXTRACT))
1507 unsigned int start = SUBREG_BYTE (reg);
1508 unsigned int last = start
1509 + GET_MODE_SIZE (GET_MODE (reg));
1511 ra_init_live_subregs (bitmap_bit_p (live_relevant_regs,
1512 regno),
1513 live_subregs,
1514 live_subregs_used,
1515 regno, reg);
1517 if (!DF_REF_FLAGS_IS_SET
1518 (def, DF_REF_STRICT_LOWER_PART))
1520 /* Expand the range to cover entire words.
1521 Bytes added here are "don't care". */
1522 start = start / UNITS_PER_WORD * UNITS_PER_WORD;
1523 last = ((last + UNITS_PER_WORD - 1)
1524 / UNITS_PER_WORD * UNITS_PER_WORD);
1527 /* Ignore the paradoxical bits. */
1528 if ((int)last > live_subregs_used[regno])
1529 last = live_subregs_used[regno];
1531 while (start < last)
1533 RESET_BIT (live_subregs[regno], start);
1534 start++;
1537 if (sbitmap_empty_p (live_subregs[regno]))
1539 live_subregs_used[regno] = 0;
1540 bitmap_clear_bit (live_relevant_regs, regno);
1542 else
1543 /* Set live_relevant_regs here because
1544 that bit has to be true to get us to
1545 look at the live_subregs fields. */
1546 bitmap_set_bit (live_relevant_regs, regno);
1548 else
1550 /* DF_REF_PARTIAL is generated for
1551 subregs, STRICT_LOW_PART, and
1552 ZERO_EXTRACT. We handle the subreg
1553 case above so here we have to keep from
1554 modeling the def as a killing def. */
1555 if (!DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL))
1557 bitmap_clear_bit (live_relevant_regs, regno);
1558 live_subregs_used[regno] = 0;
1564 bitmap_and_compl_into (live_relevant_regs, elim_regset);
1565 bitmap_copy (&c->live_throughout, live_relevant_regs);
1567 if (INSN_P (insn))
1568 for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
1570 struct df_ref *use = *use_rec;
1571 unsigned int regno = DF_REF_REGNO (use);
1572 rtx reg = DF_REF_REG (use);
1574 /* DF_REF_READ_WRITE on a use means that this use
1575 is fabricated from a def that is a partial set
1576 to a multiword reg. Here, we only model the
1577 subreg case that is not wrapped in ZERO_EXTRACT
1578 precisely so we do not need to look at the
1579 fabricated use. */
1580 if (DF_REF_FLAGS_IS_SET (use, DF_REF_READ_WRITE)
1581 && !DF_REF_FLAGS_IS_SET (use, DF_REF_EXTRACT)
1582 && DF_REF_FLAGS_IS_SET (use, DF_REF_SUBREG))
1583 continue;
1585 /* Add the last use of each var to dead_or_set. */
1586 if (!bitmap_bit_p (live_relevant_regs, regno))
1588 if (regno < FIRST_PSEUDO_REGISTER)
1590 if (!fixed_regs[regno])
1591 bitmap_set_bit (&c->dead_or_set, regno);
1593 else if (reg_renumber[regno] >= 0 || flag_ira)
1594 bitmap_set_bit (&c->dead_or_set, regno);
1597 if (regno < FIRST_PSEUDO_REGISTER
1598 || reg_renumber[regno] >= 0 || flag_ira)
1600 if (GET_CODE (reg) == SUBREG
1601 && !DF_REF_FLAGS_IS_SET (use, DF_REF_EXTRACT))
1603 unsigned int start = SUBREG_BYTE (reg);
1604 unsigned int last = start
1605 + GET_MODE_SIZE (GET_MODE (reg));
1607 ra_init_live_subregs (bitmap_bit_p (live_relevant_regs,
1608 regno),
1609 live_subregs,
1610 live_subregs_used,
1611 regno, reg);
1613 /* Ignore the paradoxical bits. */
1614 if ((int)last > live_subregs_used[regno])
1615 last = live_subregs_used[regno];
1617 while (start < last)
1619 SET_BIT (live_subregs[regno], start);
1620 start++;
1623 else
1624 /* Resetting the live_subregs_used is
1625 effectively saying do not use the subregs
1626 because we are reading the whole
1627 pseudo. */
1628 live_subregs_used[regno] = 0;
1629 bitmap_set_bit (live_relevant_regs, regno);
1635 /* FIXME!! The following code is a disaster. Reload needs to see the
1636 labels and jump tables that are just hanging out in between
1637 the basic blocks. See pr33676. */
1638 insn = BB_HEAD (bb);
1640 /* Skip over the barriers and cruft. */
1641 while (insn && (BARRIER_P (insn) || NOTE_P (insn)
1642 || BLOCK_FOR_INSN (insn) == bb))
1643 insn = PREV_INSN (insn);
1645 /* While we add anything except barriers and notes, the focus is
1646 to get the labels and jump tables into the
1647 reload_insn_chain. */
1648 while (insn)
1650 if (!NOTE_P (insn) && !BARRIER_P (insn))
1652 if (BLOCK_FOR_INSN (insn))
1653 break;
1655 c = new_insn_chain ();
1656 c->next = next;
1657 next = c;
1658 *p = c;
1659 p = &c->prev;
1661 /* The block makes no sense here, but it is what the old
1662 code did. */
1663 c->block = bb->index;
1664 c->insn = insn;
1665 bitmap_copy (&c->live_throughout, live_relevant_regs);
1667 insn = PREV_INSN (insn);
1671 for (i = 0; i < (unsigned int) max_regno; i++)
1672 if (live_subregs[i])
1673 free (live_subregs[i]);
1675 reload_insn_chain = c;
1676 *p = NULL;
1678 free (live_subregs);
1679 free (live_subregs_used);
1680 BITMAP_FREE (live_relevant_regs);
1681 BITMAP_FREE (elim_regset);
1683 if (dump_file)
1684 print_insn_chains (dump_file);
1687 /* Print debugging trace information if -dg switch is given,
1688 showing the information on which the allocation decisions are based. */
1690 static void
1691 dump_conflicts (FILE *file)
1693 int i;
1694 int regno;
1695 int has_preferences;
1696 int nregs;
1697 nregs = 0;
1698 for (i = 0; i < max_allocno; i++)
1700 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1701 continue;
1702 nregs++;
1704 fprintf (file, ";; %d regs to allocate:", nregs);
1705 for (regno = 0; regno < max_regno; regno++)
1706 if ((i = reg_allocno[regno]) >= 0)
1708 int j;
1709 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1710 continue;
1711 fprintf (file, " %d", allocno[allocno_order[i]].reg);
1712 for (j = 0; j < max_regno; j++)
1713 if (reg_allocno[j] == allocno_order[i]
1714 && j != allocno[allocno_order[i]].reg)
1715 fprintf (file, "+%d", j);
1716 if (allocno[allocno_order[i]].size != 1)
1717 fprintf (file, " (%d)", allocno[allocno_order[i]].size);
1719 fprintf (file, "\n");
1721 for (regno = 0; regno < max_regno; regno++)
1722 if ((i = reg_allocno[regno]) >= 0)
1724 int j;
1725 adjacency_iter ai;
1726 fprintf (file, ";; %d conflicts:", allocno[i].reg);
1727 FOR_EACH_CONFLICT (i, j, ai)
1729 fprintf (file, " %d", allocno[j].reg);
1731 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1732 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_conflicts, j)
1733 && !fixed_regs[j])
1734 fprintf (file, " %d", j);
1735 fprintf (file, "\n");
1737 has_preferences = 0;
1738 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1739 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1740 has_preferences = 1;
1742 if (!has_preferences)
1743 continue;
1744 fprintf (file, ";; %d preferences:", allocno[i].reg);
1745 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1746 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1747 fprintf (file, " %d", j);
1748 fprintf (file, "\n");
1750 fprintf (file, "\n");
1753 void
1754 dump_global_regs (FILE *file)
1756 int i, j;
1758 fprintf (file, ";; Register dispositions:\n");
1759 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1760 if (reg_renumber[i] >= 0)
1762 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1763 if (++j % 6 == 0)
1764 fprintf (file, "\n");
1767 fprintf (file, "\n\n;; Hard regs used: ");
1768 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1769 if (df_regs_ever_live_p (i))
1770 fprintf (file, " %d", i);
1771 fprintf (file, "\n\n");
1775 static bool
1776 gate_handle_global_alloc (void)
1778 return ! flag_ira;
1781 /* Run old register allocator. Return TRUE if we must exit
1782 rest_of_compilation upon return. */
1783 static unsigned int
1784 rest_of_handle_global_alloc (void)
1786 bool failure;
1788 /* If optimizing, allocate remaining pseudo-regs. Do the reload
1789 pass fixing up any insns that are invalid. */
1790 if (optimize && dbg_cnt (global_alloc_at_func))
1791 failure = global_alloc ();
1792 else
1794 /* There is just too much going on in the register allocators to
1795 keep things up to date. At the end we have to rescan anyway
1796 because things change when the reload_completed flag is set.
1797 So we just turn off scanning and we will rescan by hand. */
1798 df_set_flags (DF_NO_INSN_RESCAN);
1799 compute_regsets (&eliminable_regset, &no_global_alloc_regs);
1800 build_insn_chain ();
1801 df_set_flags (DF_NO_INSN_RESCAN);
1802 failure = reload (get_insns (), 0);
1805 if (dump_enabled_p (pass_global_alloc.static_pass_number))
1807 timevar_push (TV_DUMP);
1808 dump_global_regs (dump_file);
1809 timevar_pop (TV_DUMP);
1812 /* FIXME: This appears on the surface to be wrong thing to be doing.
1813 So much of the compiler is designed to check reload_completed to
1814 see if it is running after reload that seems doomed to failure.
1815 We should be returning a value that says that we have found
1816 errors so that nothing but the cleanup passes are run
1817 afterwards. */
1818 gcc_assert (reload_completed || failure);
1819 reload_completed = !failure;
1821 /* The world has changed so much that at this point we might as well
1822 just rescan everything. Note that df_rescan_all_insns is not
1823 going to help here because it does not touch the artificial uses
1824 and defs. */
1825 df_finish_pass (true);
1826 if (optimize > 1)
1827 df_live_add_problem ();
1828 df_scan_alloc (NULL);
1829 df_scan_blocks ();
1831 if (optimize)
1832 df_analyze ();
1834 regstat_free_n_sets_and_refs ();
1835 regstat_free_ri ();
1836 return 0;
1839 struct tree_opt_pass pass_global_alloc =
1841 "greg", /* name */
1842 gate_handle_global_alloc, /* gate */
1843 rest_of_handle_global_alloc, /* execute */
1844 NULL, /* sub */
1845 NULL, /* next */
1846 0, /* static_pass_number */
1847 TV_GLOBAL_ALLOC, /* tv_id */
1848 0, /* properties_required */
1849 0, /* properties_provided */
1850 0, /* properties_destroyed */
1851 0, /* todo_flags_start */
1852 TODO_dump_func | TODO_verify_rtl_sharing
1853 | TODO_ggc_collect, /* todo_flags_finish */
1854 'g' /* letter */