gcc/config/spu/spu.h

   1 /* Copyright (C) 2006, 2007 Free Software Foundation, Inc.
   2
   3    This file is free software; you can redistribute it and/or modify it under
   4    the terms of the GNU General Public License as published by the Free
   5    Software Foundation; either version 3 of the License, or (at your option)
   6    any later version.
   7
   8    This file is distributed in the hope that it will be useful, but WITHOUT
   9    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11    for more details.
  12
  13    You should have received a copy of the GNU General Public License
  14    along with GCC; see the file COPYING3.  If not see
  15    <http://www.gnu.org/licenses/>.  */
  16
  17 \f
  18 /* Run-time Target */
  19 #define TARGET_CPU_CPP_BUILTINS()       spu_cpu_cpp_builtins(pfile)
  20
  21 #define TARGET_VERSION fprintf (stderr, " (spu %s)", __DATE__);
  22
  23 #define OVERRIDE_OPTIONS spu_override_options()
  24 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options()
  25
  26 #define OPTIMIZATION_OPTIONS(level,size) \
  27           spu_optimization_options(level,size)
  28
  29 #define INIT_EXPANDERS spu_init_expanders()
  30
  31 extern int target_flags;
  32 extern const char *spu_fixed_range_string;
  33
  34 /* Which processor to generate code or schedule for.  */
  35 enum processor_type
  36 {
  37   PROCESSOR_CELL,
  38   PROCESSOR_CELLEDP
  39 };
  40
  41 extern GTY(()) int spu_arch;
  42 extern GTY(()) int spu_tune;
  43
  44 /* Support for a compile-time default architecture and tuning.  The rules are:
  45    --with-arch is ignored if -march is specified.
  46    --with-tune is ignored if -mtune is specified.  */
  47 #define OPTION_DEFAULT_SPECS \
  48   {"arch", "%{!march=*:-march=%(VALUE)}" }, \
  49   {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
  50
  51 /* Default target_flags if no switches specified.  */
  52 #ifndef TARGET_DEFAULT
  53 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS)
  54 #endif
  55
  56 \f
  57 /* Storage Layout */
  58
  59 #define BITS_BIG_ENDIAN 1
  60
  61 #define BYTES_BIG_ENDIAN 1
  62
  63 #define WORDS_BIG_ENDIAN 1
  64
  65 #define BITS_PER_UNIT 8
  66
  67 /* GCC uses word_mode in many places, assuming that it is the fastest
  68    integer mode.  That is not the case for SPU though.  We can't use
  69    32 here because (of some reason I can't remember.) */
  70 #define BITS_PER_WORD 128
  71
  72 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT)
  73
  74 /* We never actually change UNITS_PER_WORD, but defining this causes
  75    libgcc to use some different sizes of types when compiling. */
  76 #define MIN_UNITS_PER_WORD 4
  77
  78 #define POINTER_SIZE 32
  79
  80 #define PARM_BOUNDARY 128
  81
  82 #define STACK_BOUNDARY 128
  83
  84 /* We want it 8-byte aligned so we can properly use dual-issue
  85    instructions, which can only happen on an 8-byte aligned address. */
  86 #define FUNCTION_BOUNDARY 64
  87
  88 /* We would like to allow a larger alignment for data objects (for DMA)
  89    but the aligned attribute is limited by BIGGEST_ALIGNMENT.  We don't
  90    define BIGGEST_ALIGNMENT as larger because it is used in other places
  91    and would end up wasting space.  (Is this still true?)  */
  92 #define BIGGEST_ALIGNMENT 128
  93
  94 #define MINIMUM_ATOMIC_ALIGNMENT 128
  95
  96 /* Make all static objects 16-byte aligned.  This allows us to assume
  97    they are also padded to 16-bytes, which means we can use a single
  98    load or store instruction to access them.  Do the same for objects
  99    on the stack.  (Except a bug (?) allows some stack objects to be
 100    unaligned.)  */
 101 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
 102 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
 103 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
 104
 105 #define EMPTY_FIELD_BOUNDARY 32
 106
 107 #define STRICT_ALIGNMENT 1
 108
 109 /* symbol_ref's of functions are not aligned to 16 byte boundary. */
 110 #define ALIGNED_SYMBOL_REF_P(X) \
 111         (GET_CODE (X) == SYMBOL_REF \
 112           && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \
 113           && (! SYMBOL_REF_FUNCTION_P (X) \
 114               || align_functions >= 16))
 115
 116 #define PCC_BITFIELD_TYPE_MATTERS 1
 117
 118 #define MAX_FIXED_MODE_SIZE 128
 119
 120 #define STACK_SAVEAREA_MODE(save_level) \
 121   (save_level == SAVE_FUNCTION ? VOIDmode \
 122     : save_level == SAVE_NONLOCAL ? SImode \
 123       : Pmode)
 124
 125 #define STACK_SIZE_MODE SImode
 126
 127 /* #define TARGET_FLOAT_FORMAT          SPU_FLOAT_FORMAT */
 128
 129 #ifndef MODE_HAS_NANS
 130 #define MODE_HAS_NANS(MODE)                                     \
 131   (FLOAT_MODE_P (MODE)                                          \
 132    && MODE != SFmode                                            \
 133    && !LARGEST_EXPONENT_IS_NORMAL (GET_MODE_BITSIZE (MODE)))
 134 #endif
 135
 136 #ifndef MODE_HAS_INFINITIES
 137 #define MODE_HAS_INFINITIES(MODE)                               \
 138   (FLOAT_MODE_P (MODE)                                          \
 139    && MODE != SFmode                                            \
 140    && !LARGEST_EXPONENT_IS_NORMAL (GET_MODE_BITSIZE (MODE)))
 141 #endif
 142
 143 #ifndef MODE_HAS_SIGN_DEPENDENT_ROUNDING
 144 #define MODE_HAS_SIGN_DEPENDENT_ROUNDING(MODE)                  \
 145   (FLOAT_MODE_P (MODE)                                          \
 146     && MODE != SFmode                                           \
 147    && !ROUND_TOWARDS_ZERO)
 148 #endif
 149
 150 #define ROUND_TOWARDS_ZERO 1
 151
 152 /* This is certainly true.  Should it be defined?  (It wasn't before.) */
 153 /* #define LARGEST_EXPONENT_IS_NORMAL(size) (size != 32) */
 154
 155 \f
 156 /* Type Layout */
 157
 158 #define INT_TYPE_SIZE 32
 159
 160 #define LONG_TYPE_SIZE 32
 161
 162 #define LONG_LONG_TYPE_SIZE 64
 163
 164 #define FLOAT_TYPE_SIZE 32
 165
 166 #define DOUBLE_TYPE_SIZE 64
 167
 168 #define LONG_DOUBLE_TYPE_SIZE 64
 169
 170 #define DEFAULT_SIGNED_CHAR 0
 171
 172 \f
 173 /* Register Basics */
 174
 175 /* 128-130 are special registers that never appear in assembly code. */
 176 #define FIRST_PSEUDO_REGISTER 131
 177
 178 #define FIXED_REGISTERS {                           \
 179     1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 180     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 181     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 182     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 183     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 184     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 185     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 186     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 187     1, 1, 1 \
 188 }
 189
 190 #define CALL_USED_REGISTERS {                       \
 191     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 192     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 193     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 194     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 195     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 196     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 197     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 198     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 199     1, 1, 1 \
 200 }
 201
 202 #define CONDITIONAL_REGISTER_USAGE \
 203         spu_conditional_register_usage()
 204
 205 \f
 206 /* Values in Registers */
 207
 208 #define HARD_REGNO_NREGS(REGNO, MODE)   \
 209     ((GET_MODE_BITSIZE(MODE)+MAX_FIXED_MODE_SIZE-1)/MAX_FIXED_MODE_SIZE)
 210
 211 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
 212
 213 #define MODES_TIEABLE_P(MODE1, MODE2) \
 214   (GET_MODE_BITSIZE (MODE1) <= MAX_FIXED_MODE_SIZE \
 215    && GET_MODE_BITSIZE (MODE2) <= MAX_FIXED_MODE_SIZE)
 216
 217 \f
 218 /* Register Classes */
 219
 220 enum reg_class {
 221    NO_REGS,
 222    GENERAL_REGS,
 223    ALL_REGS,
 224    LIM_REG_CLASSES
 225 };
 226
 227 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 228
 229 #define REG_CLASS_NAMES \
 230 {  "NO_REGS", \
 231    "GENERAL_REGS", \
 232    "ALL_REGS" \
 233 }
 234
 235 #define REG_CLASS_CONTENTS { \
 236     {0, 0, 0, 0, 0}, /* no regs */ \
 237     {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \
 238     {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */
 239
 240 #define REGNO_REG_CLASS(REGNO) (GENERAL_REGS)
 241
 242 #define BASE_REG_CLASS GENERAL_REGS
 243
 244 #define INDEX_REG_CLASS GENERAL_REGS
 245
 246 #define REGNO_OK_FOR_BASE_P(regno) \
 247    ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
 248
 249 #define REGNO_OK_FOR_INDEX_P(regno)  \
 250    ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
 251
 252 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \
 253         ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
 254 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \
 255         ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
 256
 257 #define PREFERRED_RELOAD_CLASS(X,CLASS)  (CLASS)
 258
 259 #define CLASS_MAX_NREGS(CLASS, MODE)    \
 260         ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 261
 262 /* GCC assumes that modes are in the lowpart of a register, which is
 263    only true for SPU. */
 264 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
 265         ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \
 266          && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
 267
 268 #define REGISTER_TARGET_PRAGMAS() do {                                  \
 269 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin;    \
 270 }while (0);
 271
 272 \f
 273 /* Frame Layout */
 274
 275 #define STACK_GROWS_DOWNWARD
 276
 277 #define STARTING_FRAME_OFFSET (0)
 278
 279 #define STACK_POINTER_OFFSET 32
 280
 281 #define FIRST_PARM_OFFSET(FNDECL) (0)
 282
 283 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant ((FP), -16)
 284
 285 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP))
 286
 287 /* Should this be defined?  Would it simplify our implementation. */
 288 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */
 289
 290 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM)
 291
 292 #define ARG_POINTER_CFA_OFFSET(FNDECL) (-STACK_POINTER_OFFSET)
 293
 294 \f
 295 /* Stack Checking */
 296
 297 /* We store the Available Stack Size in the second slot of the stack
 298    register.   We emit stack checking code during the prologue.  */
 299 #define STACK_CHECK_BUILTIN 1
 300
 301 \f
 302 /* Frame Registers, and other registers */
 303
 304 #define STACK_POINTER_REGNUM 1
 305
 306 /* Will be eliminated. */
 307 #define FRAME_POINTER_REGNUM 128
 308
 309 /* This is not specified in any ABI, so could be set to anything. */
 310 #define HARD_FRAME_POINTER_REGNUM 127
 311
 312 /* Will be eliminated. */
 313 #define ARG_POINTER_REGNUM 129
 314
 315 #define STATIC_CHAIN_REGNUM 2
 316
 317 #define LINK_REGISTER_REGNUM 0
 318
 319 /* Used to keep track of instructions that have clobbered the hint
 320  * buffer.  Users can also specify it in inline asm. */
 321 #define HBR_REGNUM 130
 322
 323 #define MAX_REGISTER_ARGS    72
 324 #define FIRST_ARG_REGNUM     3
 325 #define LAST_ARG_REGNUM      (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1)
 326
 327 #define MAX_REGISTER_RETURN  72
 328 #define FIRST_RETURN_REGNUM  3
 329 #define LAST_RETURN_REGNUM   (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1)
 330
 331 \f
 332 /* Elimination */
 333
 334 #define FRAME_POINTER_REQUIRED 0
 335
 336 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) ((DEPTH) = 0)
 337
 338 #define ELIMINABLE_REGS  \
 339   {{ARG_POINTER_REGNUM,  STACK_POINTER_REGNUM},                         \
 340   {ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \
 341   {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 342   {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 343
 344 #define CAN_ELIMINATE(FROM,TO) 1
 345
 346 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 347   ((OFFSET) = spu_initial_elimination_offset((FROM),(TO)))
 348
 349 \f
 350 /* Stack Arguments */
 351
 352 #define ACCUMULATE_OUTGOING_ARGS 1
 353
 354 #define REG_PARM_STACK_SPACE(FNDECL) 0
 355
 356 #define OUTGOING_REG_PARM_STACK_SPACE 1
 357
 358 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (0)
 359
 360 \f
 361 /* Register Arguments */
 362
 363 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 364         (spu_function_arg((CUM),(MODE),(TYPE),(NAMED)))
 365
 366 #define CUMULATIVE_ARGS int
 367
 368 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
 369                 ((CUM) = 0)
 370
 371 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)    \
 372         ((CUM) += \
 373          (TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST ? 1 \
 374          : (MODE) == BLKmode ? ((int_size_in_bytes(TYPE)+15) / 16) \
 375          : (MODE) == VOIDmode ? 1 \
 376          : HARD_REGNO_NREGS(CUM,MODE))
 377
 378 #define FUNCTION_ARG_PADDING(MODE,TYPE) upward
 379
 380 #define PAD_VARARGS_DOWN 0
 381
 382 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM))
 383 \f
 384 /* Scalar Return */
 385
 386 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 387         (spu_function_value((VALTYPE),(FUNC)))
 388
 389 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM)
 390
 391 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM))
 392
 393 \f
 394 /* Machine-specific symbol_ref flags.  */
 395 #define SYMBOL_FLAG_ALIGN1      (SYMBOL_FLAG_MACH_DEP << 0)
 396 \f
 397 /* Aggregate Return */
 398
 399 #define DEFAULT_PCC_STRUCT_RETURN 0
 400
 401 \f
 402 /* Function Entry */
 403
 404 #define EXIT_IGNORE_STACK 0
 405
 406 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0)
 407
 408 \f
 409 /* Profiling */
 410
 411 /* Nothing, for now. */
 412 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 413    fprintf (FILE, "\t\n")
 414
 415 \f
 416 /* Trampolines */
 417
 418 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16)
 419
 420 #define TRAMPOLINE_ALIGNMENT 128
 421
 422 #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \
 423           spu_initialize_trampoline(TRAMP,FNADDR,CXT)
 424
 425 \f
 426 /* Addressing Modes */
 427
 428 #define CONSTANT_ADDRESS_P(X)   spu_constant_address_p(X)
 429
 430 #define MAX_REGS_PER_ADDRESS 2
 431
 432 #ifdef REG_OK_STRICT
 433 # define REG_OK_STRICT_FLAG 1
 434 #else
 435 # define REG_OK_STRICT_FLAG 0
 436 #endif
 437
 438 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                 \
 439     { if (spu_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \
 440         goto ADDR;                                              \
 441     }
 442
 443 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
 444   {  rtx result = spu_legitimize_address (X, OLDX, MODE);       \
 445      if (result != NULL_RTX)                                    \
 446        {                                                        \
 447          (X) = result;                                          \
 448          goto WIN;                                              \
 449        }                                                        \
 450   }
 451
 452 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
 453
 454 #define LEGITIMATE_CONSTANT_P(X) spu_legitimate_constant_p(X)
 455
 456 \f
 457 /* Costs */
 458
 459 #define BRANCH_COST spu_branch_cost
 460
 461 #define SLOW_BYTE_ACCESS 0
 462
 463 #define MOVE_RATIO 32
 464
 465 #define NO_FUNCTION_CSE
 466
 467 \f
 468 /* Sections */
 469
 470 #define TEXT_SECTION_ASM_OP ".text"
 471
 472 #define DATA_SECTION_ASM_OP ".data"
 473
 474 #define JUMP_TABLES_IN_TEXT_SECTION 1
 475
 476 \f
 477 /* PIC */
 478 #define PIC_OFFSET_TABLE_REGNUM 126
 479
 480 \f
 481 /* File Framework */
 482
 483 #define ASM_APP_ON ""
 484
 485 #define ASM_APP_OFF ""
 486
 487 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
 488   do {  fprintf (STREAM, "\t.file\t");                  \
 489         output_quoted_string (STREAM, NAME);            \
 490         fprintf (STREAM, "\n");                         \
 491   } while (0)
 492
 493 \f
 494 /* Uninitialized Data */
 495 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)  \
 496 ( fputs (".comm ", (FILE)),                     \
 497   assemble_name ((FILE), (NAME)),               \
 498   fprintf ((FILE), ",%d\n", (ROUNDED)))
 499
 500 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
 501 ( fputs (".lcomm ", (FILE)),                    \
 502   assemble_name ((FILE), (NAME)),               \
 503   fprintf ((FILE), ",%d\n", (ROUNDED)))
 504
 505 \f
 506 /* Label Output */
 507 #define ASM_OUTPUT_LABEL(FILE,NAME)     \
 508   do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
 509
 510 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
 511   asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME))
 512
 513 \f
 514 /* Instruction Output */
 515 #define REGISTER_NAMES \
 516 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
 517  "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \
 518  "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \
 519  "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \
 520  "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \
 521  "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \
 522  "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \
 523  "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \
 524  "$vfp", "$vap", "hbr" \
 525 }
 526
 527 #define PRINT_OPERAND(FILE, X, CODE)  print_operand(FILE, X, CODE)
 528
 529 #define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
 530  print_operand_address (FILE, ADDR)
 531
 532 #define LOCAL_LABEL_PREFIX "."
 533
 534 #define USER_LABEL_PREFIX ""
 535
 536 \f
 537 /* Dispatch Tables */
 538
 539 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
 540   fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
 541
 542 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
 543   fprintf (FILE, "\t.word .L%d\n", VALUE)
 544
 545 \f
 546 /* Alignment Output */
 547
 548 #define ASM_OUTPUT_ALIGN(FILE,LOG)  \
 549   do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0)
 550
 551 \f
 552 /* Model costs for the vectorizer.  */
 553
 554 /* Cost of conditional branch.  */
 555 #ifndef TARG_COND_BRANCH_COST
 556 #define TARG_COND_BRANCH_COST        6
 557 #endif
 558
 559 /* Cost of any scalar operation, excluding load and store.  */
 560 #ifndef TARG_SCALAR_STMT_COST
 561 #define TARG_SCALAR_STMT_COST        1
 562 #endif
 563
 564 /* Cost of scalar load. */
 565 #undef TARG_SCALAR_LOAD_COST
 566 #define TARG_SCALAR_LOAD_COST        2 /* load + rotate */
 567
 568 /* Cost of scalar store.  */
 569 #undef TARG_SCALAR_STORE_COST
 570 #define TARG_SCALAR_STORE_COST       10
 571
 572 /* Cost of any vector operation, excluding load, store,
 573    or vector to scalar operation.  */
 574 #undef TARG_VEC_STMT_COST
 575 #define TARG_VEC_STMT_COST           1
 576
 577 /* Cost of vector to scalar operation.  */
 578 #undef TARG_VEC_TO_SCALAR_COST
 579 #define TARG_VEC_TO_SCALAR_COST      1
 580
 581 /* Cost of scalar to vector operation.  */
 582 #undef TARG_SCALAR_TO_VEC_COST
 583 #define TARG_SCALAR_TO_VEC_COST      1
 584
 585 /* Cost of aligned vector load.  */
 586 #undef TARG_VEC_LOAD_COST
 587 #define TARG_VEC_LOAD_COST           1
 588
 589 /* Cost of misaligned vector load.  */
 590 #undef TARG_VEC_UNALIGNED_LOAD_COST
 591 #define TARG_VEC_UNALIGNED_LOAD_COST 2
 592
 593 /* Cost of vector store.  */
 594 #undef TARG_VEC_STORE_COST
 595 #define TARG_VEC_STORE_COST          1
 596
 597 \f
 598 /* Misc */
 599
 600 #define CASE_VECTOR_MODE SImode
 601
 602 #define MOVE_MAX 16
 603
 604 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC))
 605
 606 #define STORE_FLAG_VALUE -1
 607
 608 #define Pmode SImode
 609
 610 #define FUNCTION_MODE QImode
 611
 612 #define NO_IMPLICIT_EXTERN_C 1
 613
 614 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
 615
 616 /* Canonicalize a comparison from one we don't have to one we do have.  */
 617 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
 618   do {                                                                    \
 619     if (((CODE) == LE || (CODE) == LT || (CODE) == LEU || (CODE) == LTU)) \
 620       {                                                                   \
 621         rtx tem = (OP0);                                                  \
 622         (OP0) = (OP1);                                                    \
 623         (OP1) = tem;                                                      \
 624         (CODE) = swap_condition (CODE);                                   \
 625       }                                                                   \
 626   } while (0)
 627
 628 /* These are set by the cmp patterns and used while expanding
 629    conditional branches. */
 630 extern GTY(()) rtx spu_compare_op0;
 631 extern GTY(()) rtx spu_compare_op1;
 632