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Merge -r 127928:132243 from trunk
[official-gcc.git] / gcc / config / score / score.h
blob8a1efb6f4f571627dd1a825b03464efaa3f6e0a7
1 /* score.h for Sunplus S+CORE processor
2 Copyright (C) 2005, 2007 Free Software Foundation, Inc.
3 Contributed by Sunnorth.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "score-conv.h"
22
23 /* Controlling the Compilation Driver. */
24 #undef SWITCH_TAKES_ARG
25 #define SWITCH_TAKES_ARG(CHAR) \
26 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
27
28 #undef CPP_SPEC
29 #define CPP_SPEC "%{mscore3:-D__score3__} %{G*}"
30
31 #undef CC1_SPEC
32 #define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \
33 %{!mscore*:-mscore7} \
34 %{mscore3:-mscore3} \
35 %{mscore3d:-mscore3d} \
36 %{mscore7:-mscore7} \
37 %{mscore7d:-mscore7d} \
38 %{G*}"
39
40 #undef ASM_SPEC
41 #define ASM_SPEC "%{!mel:-EB} %{mel:-EL} \
42 %{!mscore*:-march=score7} \
43 %{mscore7:-march=score7} \
44 %{mscore7d:-march=score7} \
45 %{mscore3:-march=score3} \
46 %{mscore3d:-march=score3} \
47 %{march=score5:-march=score7} \
48 %{march=score5u:-march=score7} \
49 %{march=score7:-march=score7} \
50 %{march=score7d:-march=score7} \
51 %{march=score3:-march=score3} \
52 %{march=score3d:-march=score3} \
53 %{G*}"
54
55 #undef LINK_SPEC
56 #define LINK_SPEC "%{!mel:-EB} %{mel:-EL} \
57 %{!mscore*:-mscore7_elf} \
58 %{mscore7:-mscore7_elf} \
59 %{mscore7d:-mscore7_elf} \
60 %{mscore3:-mscore3_elf} \
61 %{mscore3d:-mscore3_elf} \
62 %{march=score5:-mscore7_elf} \
63 %{march=score5u:-mscore7_elf} \
64 %{march=score7:-mscore7_elf} \
65 %{march=score7d:-mscore7_elf} \
66 %{march=score3:-mscore3_elf} \
67 %{march=score3d:-mscore3_elf} \
68 %{G*}"
69
70 /* Run-time Target Specification. */
71 #define TARGET_CPU_CPP_BUILTINS() \
72 do { \
73 builtin_define ("SUNPLUS"); \
74 builtin_define ("__SCORE__"); \
75 builtin_define ("__score__"); \
76 if (TARGET_LITTLE_ENDIAN) \
77 builtin_define ("__scorele__"); \
78 else \
79 builtin_define ("__scorebe__"); \
80 if (TARGET_SCORE5) \
81 builtin_define ("__score5__"); \
82 if (TARGET_SCORE5U) \
83 builtin_define ("__score5u__"); \
84 if (TARGET_SCORE7) \
85 builtin_define ("__score7__"); \
86 if (TARGET_SCORE7D) \
87 builtin_define ("__score7d__"); \
88 if (TARGET_SCORE3) \
89 builtin_define ("__score3__"); \
90 if (TARGET_SCORE3D) \
91 builtin_define ("__score3d__"); \
92 } while (0)
93
94 #define TARGET_DEFAULT 0
95
96 #define SCORE_GCC_VERSION "1.6"
97
98 #define TARGET_VERSION \
99 fprintf (stderr, "Sunplus S+core rev=%s", SCORE_GCC_VERSION);
100
101 #define OVERRIDE_OPTIONS score_override_options ()
102
103 /* Show we can debug even without a frame pointer. */
104 #define CAN_DEBUG_WITHOUT_FP
105
106 /* Target machine storage layout. */
107 #define BITS_BIG_ENDIAN 0
108 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
109 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
110
111 /* Define this to set the endianness to use in libgcc2.c, which can
112 not depend on target_flags. */
113 #if defined(__scorele__)
114 #define LIBGCC2_WORDS_BIG_ENDIAN 0
115 #else
116 #define LIBGCC2_WORDS_BIG_ENDIAN 1
117 #endif
118
119 /* Width of a word, in units (bytes). */
120 #define UNITS_PER_WORD 4
121
122 /* Define this macro if it is advisable to hold scalars in registers
123 in a wider mode than that declared by the program. In such cases,
124 the value is constrained to be within the bounds of the declared
125 type, but kept valid in the wider mode. The signedness of the
126 extension may differ from that of the type. */
127 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
128 if (GET_MODE_CLASS (MODE) == MODE_INT \
129 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
130 (MODE) = SImode;
131
132 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
133 #define PARM_BOUNDARY BITS_PER_WORD
134 #define STACK_BOUNDARY BITS_PER_WORD
135
136 /* Allocation boundary (in *bits*) for the code of a function. */
137 #define FUNCTION_BOUNDARY BITS_PER_WORD
138
139 /* There is no point aligning anything to a rounder boundary than this. */
140 #define BIGGEST_ALIGNMENT LONG_DOUBLE_TYPE_SIZE
141
142 /* If defined, a C expression to compute the alignment for a static
143 variable. TYPE is the data type, and ALIGN is the alignment that
144 the object would ordinarily have. The value of this macro is used
145 instead of that alignment to align the object.
146
147 If this macro is not defined, then ALIGN is used.
148
149 One use of this macro is to increase alignment of medium-size
150 data to make it all fit in fewer cache lines. Another is to
151 cause character arrays to be word-aligned so that `strcpy' calls
152 that copy constants to character arrays can be done inline. */
153 #define DATA_ALIGNMENT(TYPE, ALIGN) \
154 ((((ALIGN) < BITS_PER_WORD) \
155 && (TREE_CODE (TYPE) == ARRAY_TYPE \
156 || TREE_CODE (TYPE) == UNION_TYPE \
157 || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
158
159 /* If defined, a C expression to compute the alignment given to a
160 constant that is being placed in memory. EXP is the constant
161 and ALIGN is the alignment that the object would ordinarily have.
162 The value of this macro is used instead of that alignment to align
163 the object.
164
165 If this macro is not defined, then ALIGN is used.
166
167 The typical use of this macro is to increase alignment for string
168 constants to be word aligned so that `strcpy' calls that copy
169 constants can be done inline. */
170 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
171 ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
172 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
173
174 /* If defined, a C expression to compute the alignment for a local
175 variable. TYPE is the data type, and ALIGN is the alignment that
176 the object would ordinarily have. The value of this macro is used
177 instead of that alignment to align the object.
178
179 If this macro is not defined, then ALIGN is used.
180
181 One use of this macro is to increase alignment of medium-size
182 data to make it all fit in fewer cache lines. */
183 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
184 ((TREE_CODE (TYPE) == ARRAY_TYPE \
185 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
186 && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
187
188 /* Alignment of field after `int : 0' in a structure. */
189 #define EMPTY_FIELD_BOUNDARY 32
190
191 /* All accesses must be aligned. */
192 #define STRICT_ALIGNMENT 1
193
194 /* Score requires that structure alignment is affected by bitfields. */
195 #define PCC_BITFIELD_TYPE_MATTERS 1
196
197 /* long double is not a fixed mode, but the idea is that, if we
198 support long double, we also want a 128-bit integer type. */
199 #define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE
200
201 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
202
203 /* Layout of Data Type. */
204 /* Set the sizes of the core types. */
205 #define INT_TYPE_SIZE 32
206 #define SHORT_TYPE_SIZE 16
207 #define LONG_TYPE_SIZE 32
208 #define LONG_LONG_TYPE_SIZE 64
209 #define CHAR_TYPE_SIZE 8
210 #define FLOAT_TYPE_SIZE 32
211 #define DOUBLE_TYPE_SIZE 64
212 #define LONG_DOUBLE_TYPE_SIZE 64
213
214 /* Define this as 1 if `char' should by default be signed; else as 0. */
215 #undef DEFAULT_SIGNED_CHAR
216 #define DEFAULT_SIGNED_CHAR 1
217
218 /* Default definitions for size_t and ptrdiff_t. */
219 #define SIZE_TYPE "unsigned int"
220
221 /* Register Usage
222
223 S+core have:
224 - 32 integer registers
225 - 16 control registers (cond)
226 - 16 special registers (ceh/cel/cnt/lcr/scr/arg/fp)
227 - 32 coprocessors 1 registers
228 - 32 coprocessors 2 registers
229 - 32 coprocessors 3 registers. */
230 #define FIRST_PSEUDO_REGISTER 160
231
232 /* By default, fix the kernel registers (r30 and r31), the global
233 pointer (r28) and the stack pointer (r0). This can change
234 depending on the command-line options.
235
236 Regarding coprocessor registers: without evidence to the contrary,
237 it's best to assume that each coprocessor register has a unique
238 use. This can be overridden, in, e.g., override_options() or
239 CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
240 for a particular target. */
241
242 /* Control Registers, use mfcr/mtcr insn
243 32 cr0 PSR
244 33 cr1 Condition
245 34 cr2 ECR
246 35 cr3 EXCPVec
247 36 cr4 CCR
248 37 cr5 EPC
249 38 cr6 EMA
250 39 cr7 TLBLock
251 40 cr8 TLBPT
252 41 cr8 PEADDR
253 42 cr10 TLBRPT
254 43 cr11 PEVN
255 44 cr12 PECTX
256 45 cr13
257 46 cr14
258 47 cr15
259
260 Custom Engine Register, use mfce/mtce
261 48 CEH CEH
262 49 CEL CEL
263
264 Special-Purpose Register, use mfsr/mtsr
265 50 sr0 CNT
266 51 sr1 LCR
267 52 sr2 SCR
268
269 53 ARG_POINTER_REGNUM
270 54 FRAME_POINTER_REGNUM
271 but Control register have 32 registers, cr16-cr31. */
272 #define FIXED_REGISTERS \
273 { \
274 /* General Purpose Registers */ \
275 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
276 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
277 /* Control Registers */ \
278 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
279 /* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
280 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
281 /* CP 1 Registers */ \
282 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
283 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
284 /* CP 2 Registers */ \
285 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
286 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
287 /* CP 3 Registers */ \
288 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
289 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
290 }
291
292 #define CALL_USED_REGISTERS \
293 { \
294 /* General purpose register */ \
295 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
296 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
297 /* Control Registers */ \
298 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
299 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
300 /* CP 1 Registers */ \
301 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
302 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
303 /* CP 2 Registers */ \
304 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
305 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
306 /* CP 3 Registers */ \
307 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
308 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
309 }
310
311 #define REG_ALLOC_ORDER \
312 { 0, 1, 6, 7, 8, 9, 10, 11, 4, 5, 22, 23, 24, 25, 26, 27, \
313 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 28, 29, 30, 31, 2, 3, \
314 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
315 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, \
316 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
317 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \
318 96, 97, 98, 99,100,101,102,103,104,105,106,107,108,109,110,111, \
319 112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127, \
320 128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \
321 144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159 }
322
323 /* Macro to conditionally modify fixed_regs/call_used_regs. */
324 #define PIC_OFFSET_TABLE_REGNUM 29
325
326 #define CONDITIONAL_REGISTER_USAGE \
327 { \
328 if (!flag_pic) \
329 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
330 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0; \
331 }
332
333 #define HARD_REGNO_NREGS(REGNO, MODE) \
334 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
335
336 /* Return true if REGNO is suitable for holding a quantity of type MODE. */
337 #define HARD_REGNO_MODE_OK(REGNO, MODE) score_hard_regno_mode_ok (REGNO, MODE)
338
339 /* Value is 1 if it is a good idea to tie two pseudo registers
340 when one has mode MODE1 and one has mode MODE2.
341 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
342 for any hard reg, then this must be 0 for correct output. */
343 #define MODES_TIEABLE_P(MODE1, MODE2) \
344 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
345 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
346 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
347 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
348
349 /* Register Classes. */
350 /* Define the classes of registers for register constraints in the
351 machine description. Also define ranges of constants. */
352 enum reg_class
353 {
354 NO_REGS,
355 G16_REGS, /* r0 ~ r15 */
356 G32_REGS, /* r0 ~ r31 */
357 T32_REGS, /* r8 ~ r11 | r22 ~ r27 */
358
359 HI_REG, /* hi */
360 LO_REG, /* lo */
361 CE_REGS, /* hi + lo */
362
363 CN_REG, /* cnt */
364 LC_REG, /* lcb */
365 SC_REG, /* scb */
366 SP_REGS, /* cnt + lcb + scb */
367
368 CR_REGS, /* cr0 - cr15 */
369
370 CP1_REGS, /* cp1 */
371 CP2_REGS, /* cp2 */
372 CP3_REGS, /* cp3 */
373 CPA_REGS, /* cp1 + cp2 + cp3 */
374
375 ALL_REGS,
376 LIM_REG_CLASSES
377 };
378
379 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
380
381 #define GENERAL_REGS G32_REGS
382
383 /* Give names of register classes as strings for dump file. */
384 #define REG_CLASS_NAMES \
385 { \
386 "NO_REGS", \
387 "G16_REGS", \
388 "G32_REGS", \
389 "T32_REGS", \
390 \
391 "HI_REG", \
392 "LO_REG", \
393 "CE_REGS", \
394 \
395 "CN_REG", \
396 "LC_REG", \
397 "SC_REG", \
398 "SP_REGS", \
399 \
400 "CR_REGS", \
401 \
402 "CP1_REGS", \
403 "CP2_REGS", \
404 "CP3_REGS", \
405 "CPA_REGS", \
406 \
407 "ALL_REGS", \
408 }
409
410 /* Define which registers fit in which classes. */
411 #define REG_CLASS_CONTENTS \
412 { \
413 /* NO_REGS/G16/G32/T32 */ \
414 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
415 { 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
416 { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
417 { 0x0fc00f00, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
418 /* HI/LO/CE */ \
419 { 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000}, \
420 { 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000}, \
421 { 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000}, \
422 /* CN/LC/SC/SP/CR */ \
423 { 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000}, \
424 { 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000}, \
425 { 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000}, \
426 { 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000}, \
427 { 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000}, \
428 /* CP1/CP2/CP3/CPA */ \
429 { 0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000}, \
430 { 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000}, \
431 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff}, \
432 { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}, \
433 /* ALL_REGS */ \
434 { 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff}, \
435 }
436
437 /* A C expression whose value is a register class containing hard
438 register REGNO. In general there is more that one such class;
439 choose a class which is "minimal", meaning that no smaller class
440 also contains the register. */
441 #define REGNO_REG_CLASS(REGNO) score_reg_class (REGNO)
442
443 /* A macro whose definition is the name of the class to which a
444 valid base register must belong. A base register is one used in
445 an address which is the register value plus a displacement. */
446 #define BASE_REG_CLASS G16_REGS
447
448 /* The class value for index registers. */
449 #define INDEX_REG_CLASS NO_REGS
450
451 extern enum reg_class score_char_to_class[256];
452 #define REG_CLASS_FROM_LETTER(C) score_char_to_class[(unsigned char) (C)]
453
454 /* Addressing modes, and classification of registers for them. */
455 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
456 score_regno_mode_ok_for_base_p (REGNO, 1)
457
458 #define REGNO_OK_FOR_INDEX_P(NUM) 0
459
460 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
461 score_preferred_reload_class (X, CLASS)
462
463 /* If we need to load shorts byte-at-a-time, then we need a scratch. */
464 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
465 score_secondary_reload_class (CLASS, MODE, X)
466
467 /* Return the register class of a scratch register needed to copy IN into
468 or out of a register in CLASS in MODE. If it can be done directly,
469 NO_REGS is returned. */
470 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
471 score_secondary_reload_class (CLASS, MODE, X)
472
473 /* Return the maximum number of consecutive registers
474 needed to represent mode MODE in a register of class CLASS. */
475 #define CLASS_MAX_NREGS(CLASS, MODE) \
476 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
477
478 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
479 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
480 ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
481
482 /* The letters I, J, K, L, M, N, O, and P in a register constraint
483 string can be used to stand for particular ranges of immediate
484 operands. This macro defines what the ranges are. C is the
485 letter, and VALUE is a constant value. Return 1 if VALUE is
486 in the range specified by C. */
487 #define CONST_OK_FOR_LETTER_P(VALUE, C) score_const_ok_for_letter_p (VALUE, C)
488
489 /* Similar, but for floating constants, and defining letters G and H.
490 Here VALUE is the CONST_DOUBLE rtx itself. */
491
492 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
493 ((C) == 'G' && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
494
495 /* Letters in the range `Q' through `U' may be defined in a
496 machine-dependent fashion to stand for arbitrary operand types.
497 The machine description macro `EXTRA_CONSTRAINT' is passed the
498 operand as its first argument and the constraint letter as its
499 second operand. */
500 #define EXTRA_CONSTRAINT(VALUE, C) score_extra_constraint (VALUE, C)
501
502 /* Basic Stack Layout. */
503 /* Stack layout; function entry, exit and calling. */
504 #define STACK_GROWS_DOWNWARD
505
506 #define STACK_PUSH_CODE PRE_DEC
507 #define STACK_POP_CODE POST_INC
508
509 /* The offset of the first local variable from the beginning of the frame.
510 See compute_frame_size for details about the frame layout. */
511 #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
512
513 /* The argument pointer always points to the first argument. */
514 #define FIRST_PARM_OFFSET(FUNDECL) 0
515
516 /* A C expression whose value is RTL representing the value of the return
517 address for the frame COUNT steps up from the current frame. */
518 #define RETURN_ADDR_RTX(count, frame) score_return_addr (count, frame)
519
520 /* Pick up the return address upon entry to a procedure. */
521 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNUM)
522
523 /* Exception handling Support. */
524 /* Use r0 to r3 to pass exception handling information. */
525 #define EH_RETURN_DATA_REGNO(N) \
526 ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM)
527
528 /* The register that holds the return address in exception handlers. */
529 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM)
530
531 /* Registers That Address the Stack Frame. */
532 /* Register to use for pushing function arguments. */
533 #define STACK_POINTER_REGNUM SP_REGNUM
534
535 /* These two registers don't really exist: they get eliminated to either
536 the stack or hard frame pointer. */
537 #define FRAME_POINTER_REGNUM 53
538
539 /* we use r2 as the frame pointer. */
540 #define HARD_FRAME_POINTER_REGNUM FP_REGNUM
541
542 #define ARG_POINTER_REGNUM 54
543
544 /* Register in which static-chain is passed to a function. */
545 #define STATIC_CHAIN_REGNUM 23
546
547 /* Elimination Frame Pointer and Arg Pointer */
548 /* Value should be nonzero if functions must have frame pointers.
549 Zero means the frame pointer need not be set up (and parms
550 may be accessed via the stack pointer) in functions that seem suitable.
551 This is computed in `reload', in reload1.c. */
552 #define FRAME_POINTER_REQUIRED current_function_calls_alloca
553
554 #define ELIMINABLE_REGS \
555 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
556 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
557 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
558 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
559
560 /* We can always eliminate to the hard frame pointer. We can eliminate
561 to the stack pointer unless a frame pointer is needed. */
562 #define CAN_ELIMINATE(FROM, TO) \
563 (((TO) == HARD_FRAME_POINTER_REGNUM) \
564 || ((TO) == STACK_POINTER_REGNUM \
565 && !frame_pointer_needed))
566
567 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
568 (OFFSET) = score_initial_elimination_offset ((FROM), (TO))
569
570 /* Passing Function Arguments on the Stack. */
571 /* Allocate stack space for arguments at the beginning of each function. */
572 #define ACCUMULATE_OUTGOING_ARGS 1
573
574 /* reserve stack space for all argument registers. */
575 #define REG_PARM_STACK_SPACE(FNDECL) UNITS_PER_WORD
576
577 /* Define this if it is the responsibility of the caller to
578 allocate the area reserved for arguments passed in registers.
579 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
580 of this macro is to determine whether the space is included in
581 `current_function_outgoing_args_size'. */
582 #define OUTGOING_REG_PARM_STACK_SPACE 1
583
584 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
585
586 /* Passing Arguments in Registers */
587 /* Determine where to put an argument to a function.
588 Value is zero to push the argument on the stack,
589 or a hard register in which to store the argument.
590
591 MODE is the argument's machine mode.
592 TYPE is the data type of the argument (as a tree).
593 This is null for libcalls where that information may
594 not be available.
595 CUM is a variable of type CUMULATIVE_ARGS which gives info about
596 the preceding args and about the function being called.
597 NAMED is nonzero if this argument is a named parameter
598 (otherwise it is an extra parameter matching an ellipsis). */
599 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
600 score_function_arg (&CUM, MODE, TYPE, NAMED)
601
602 /* A C type for declaring a variable that is used as the first argument of
603 `FUNCTION_ARG' and other related values. For some target machines, the
604 type `int' suffices and can hold the number of bytes of argument so far. */
605 typedef struct score_args
606 {
607 unsigned int arg_number; /* how many arguments have been seen */
608 unsigned int num_gprs; /* number of gprs in use */
609 unsigned int stack_words; /* number of words in stack */
610 } score_args_t;
611
612 #define CUMULATIVE_ARGS score_args_t
613
614 /* Initialize a variable CUM of type CUMULATIVE_ARGS
615 for a call to a function whose data type is FNTYPE.
616 For a library call, FNTYPE is 0. */
617 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \
618 score_init_cumulative_args (&CUM, FNTYPE, LIBNAME)
619
620 /* Update the data in CUM to advance over an argument
621 of mode MODE and data type TYPE.
622 (TYPE is null for libcalls where that information may not be available.) */
623 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
624 score_function_arg_advance (&CUM, MODE, TYPE, NAMED)
625
626 /* 1 if N is a possible register number for function argument passing.
627 We have no FP argument registers when soft-float. When FP registers
628 are 32 bits, we can't directly reference the odd numbered ones. */
629 #define FUNCTION_ARG_REGNO_P(REGNO) \
630 REG_CONTAIN (REGNO, ARG_REG_FIRST, ARG_REG_NUM)
631
632 /* How Scalar Function Values Are Returned. */
633 #define FUNCTION_VALUE(VALTYPE, FUNC) \
634 score_function_value ((VALTYPE), (FUNC), VOIDmode)
635
636 #define LIBCALL_VALUE(MODE) score_function_value (NULL_TREE, NULL, (MODE))
637
638 /* 1 if N is a possible register number for a function value. */
639 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == (ARG_REG_FIRST))
640
641 #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
642
643 /* How Large Values Are Returned. */
644 #define STRUCT_VALUE 0
645
646 /* Function Entry and Exit */
647 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
648 the stack pointer does not matter. The value is tested only in
649 functions that have frame pointers.
650 No definition is equivalent to always zero. */
651 #define EXIT_IGNORE_STACK 1
652
653 /* Generating Code for Profiling */
654 /* Output assembler code to FILE to increment profiler label # LABELNO
655 for profiling a function entry. */
656 #define FUNCTION_PROFILER(FILE, LABELNO) \
657 do { \
658 if (TARGET_SCORE7) \
659 { \
660 fprintf (FILE, " .set r1 \n"); \
661 fprintf (FILE, " mv r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
662 fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8); \
663 fprintf (FILE, " jl _mcount \n"); \
664 fprintf (FILE, " .set nor1 \n"); \
665 } \
666 else if (TARGET_SCORE3) \
667 { \
668 fprintf (FILE, " .set r1 \n"); \
669 fprintf (FILE, " mv! r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
670 fprintf (FILE, " addi! r%d, %d \n", STACK_POINTER_REGNUM, -8);\
671 fprintf (FILE, " jl _mcount \n"); \
672 fprintf (FILE, " .set nor1 \n"); \
673 } \
674 } while (0)
675
676 #define TRAMPOLINE_TEMPLATE(STREAM) \
677 do { \
678 if (TARGET_SCORE7) \
679 { \
680 fprintf (STREAM, "\t.set r1\n"); \
681 fprintf (STREAM, "\tmv r31, r3\n"); \
682 fprintf (STREAM, "\tbl nextinsn\n"); \
683 fprintf (STREAM, "nextinsn:\n"); \
684 fprintf (STREAM, "\tlw r1, [r3, 6*4-8]\n"); \
685 fprintf (STREAM, "\tlw r23, [r3, 6*4-4]\n"); \
686 fprintf (STREAM, "\tmv r3, r31\n"); \
687 fprintf (STREAM, "\tbr! r1\n"); \
688 fprintf (STREAM, "\tnop!\n"); \
689 fprintf (STREAM, "\t.set nor1\n"); \
690 } \
691 else if (TARGET_SCORE3) \
692 { \
693 fprintf (STREAM, "\t.set r1\n"); \
694 fprintf (STREAM, "\tmv! r31, r3\n"); \
695 fprintf (STREAM, "\tnop!\n"); \
696 fprintf (STREAM, "\tbl nextinsn\n"); \
697 fprintf (STREAM, "nextinsn:\n"); \
698 fprintf (STREAM, "\tlw! r1, [r3, 6*4-8]\n"); \
699 fprintf (STREAM, "\tnop!\n"); \
700 fprintf (STREAM, "\tlw r23, [r3, 6*4-4]\n"); \
701 fprintf (STREAM, "\tmv! r3, r31\n"); \
702 fprintf (STREAM, "\tnop!\n"); \
703 fprintf (STREAM, "\tbr! r1\n"); \
704 fprintf (STREAM, "\tnop!\n"); \
705 fprintf (STREAM, "\t.set nor1\n"); \
706 } \
707 } while (0)
708
709 /* Trampolines for Nested Functions. */
710 #define TRAMPOLINE_INSNS 6
711
712 /* A C expression for the size in bytes of the trampoline, as an integer. */
713 #define TRAMPOLINE_SIZE (24 + GET_MODE_SIZE (ptr_mode) * 2)
714
715 /* A C statement to initialize the variable parts of a trampoline.
716 ADDR is an RTX for the address of the trampoline; FNADDR is an
717 RTX for the address of the nested function; STATIC_CHAIN is an
718 RTX for the static chain value that should be passed to the
719 function when it is called. */
720
721 #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
722 score_initialize_trampoline (ADDR, FUNC, CHAIN)
723
724 #define HAVE_PRE_INCREMENT 1
725 #define HAVE_PRE_DECREMENT 1
726 #define HAVE_POST_INCREMENT 1
727 #define HAVE_POST_DECREMENT 1
728 #define HAVE_PRE_MODIFY_DISP 1
729 #define HAVE_POST_MODIFY_DISP 1
730 #define HAVE_PRE_MODIFY_REG 0
731 #define HAVE_POST_MODIFY_REG 0
732
733 /* Recognize any constant value that is a valid address. */
734 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
735
736 /* Maximum number of registers that can appear in a valid memory address. */
737 #define MAX_REGS_PER_ADDRESS 1
738
739 #ifdef REG_OK_STRICT
740 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
741 if (score_address_p (MODE, X, 1)) \
742 goto LABEL;
743 #else
744 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
745 if (score_address_p (MODE, X, 0)) \
746 goto LABEL;
747 #endif
748
749 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
750 and check its validity for a certain class.
751 We have two alternate definitions for each of them.
752 The usual definition accepts all pseudo regs; the other rejects them all.
753 The symbol REG_OK_STRICT causes the latter definition to be used.
754
755 Most source files want to accept pseudo regs in the hope that
756 they will get allocated to the class that the insn wants them to be in.
757 Some source files that are used after register allocation
758 need to be strict. */
759 #ifndef REG_OK_STRICT
760 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
761 score_regno_mode_ok_for_base_p (REGNO (X), 0)
762 #else
763 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
764 score_regno_mode_ok_for_base_p (REGNO (X), 1)
765 #endif
766
767 #define REG_OK_FOR_INDEX_P(X) 0
768
769 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
770 do { \
771 if (score_legitimize_address (&(X))) \
772 goto WIN; \
773 } while (0)
774
775 /* Go to LABEL if ADDR (a legitimate address expression)
776 has an effect that depends on the machine mode it is used for. */
777 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) {}
778
779 #define LEGITIMATE_CONSTANT_P(X) 1
780
781 /* Condition Code Status. */
782 #define SELECT_CC_MODE(OP, X, Y) score_select_cc_mode (OP, X, Y)
783
784 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
785 floating point inequality comparison. */
786 #define REVERSIBLE_CC_MODE(MODE) 1
787
788 /* Describing Relative Costs of Operations */
789 /* Compute extra cost of moving data between one register class and another. */
790 #define REGISTER_MOVE_COST(MODE, FROM, TO) \
791 score_register_move_cost (MODE, FROM, TO)
792
793 /* Moves to and from memory are quite expensive */
794 #define MEMORY_MOVE_COST(MODE, CLASS, TO_P) \
795 (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
796
797 /* Try to generate sequences that don't involve branches. */
798 #define BRANCH_COST 2
799
800 /* Nonzero if access to memory by bytes is slow and undesirable. */
801 #define SLOW_BYTE_ACCESS 1
802
803 /* Define this macro if it is as good or better to call a constant
804 function address than to call an address kept in a register. */
805 #define NO_FUNCTION_CSE 1
806
807 /* Dividing the Output into Sections (Texts, Data, ...). */
808 /* Define the strings to put out for each section in the object file. */
809 #define TEXT_SECTION_ASM_OP "\t.text"
810 #define DATA_SECTION_ASM_OP "\t.data"
811 #define SDATA_SECTION_ASM_OP "\t.sdata"
812
813 #undef READONLY_DATA_SECTION_ASM_OP
814 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
815
816 /* The Overall Framework of an Assembler File */
817 /* How to start an assembler comment.
818 The leading space is important. */
819 #define ASM_COMMENT_START "#"
820
821 /* Output to assembler file text saying following lines
822 may contain character constants, extra white space, comments, etc. */
823 #define ASM_APP_ON "#APP\n\t.set volatile\n"
824
825 /* Output to assembler file text saying following lines
826 no longer contain unusual constructs. */
827 #define ASM_APP_OFF "#NO_APP\n\t.set optimize\n"
828
829 /* Output of Uninitialized Variables. */
830 /* This says how to define a global common symbol. */
831 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
832 do { \
833 fputs ("\n\t.comm\t", STREAM); \
834 assemble_name (STREAM, NAME); \
835 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
836 SIZE, ALIGN / BITS_PER_UNIT); \
837 } while (0)
838
839 /* This says how to define a local common symbol (i.e., not visible to
840 linker). */
841 #undef ASM_OUTPUT_ALIGNED_LOCAL
842 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
843 do { \
844 fputs ("\n\t.lcomm\t", STREAM); \
845 assemble_name (STREAM, NAME); \
846 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
847 SIZE, ALIGN / BITS_PER_UNIT); \
848 } while (0)
849
850 /* Globalizing directive for a label. */
851 #define GLOBAL_ASM_OP "\t.globl\t"
852
853 /* Output and Generation of Labels */
854 /* This is how to declare a function name. The actual work of
855 emitting the label is moved to function_prologue, so that we can
856 get the line number correctly emitted before the .ent directive,
857 and after any .file directives. Define as empty so that the function
858 is not declared before the .ent directive elsewhere. */
859 #undef ASM_DECLARE_FUNCTION_NAME
860 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)
861
862 #undef ASM_DECLARE_OBJECT_NAME
863 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
864 do { \
865 assemble_name (STREAM, NAME); \
866 fprintf (STREAM, ":\n"); \
867 } while (0)
868
869 /* This says how to output an external. It would be possible not to
870 output anything and let undefined symbol become external. However
871 the assembler uses length information on externals to allocate in
872 data/sdata bss/sbss, thereby saving exec time. */
873 #undef ASM_OUTPUT_EXTERNAL
874 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \
875 score_output_external (STREAM, DECL, NAME)
876
877 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means
878 'the start of the function that this code is output in'. */
879 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
880 fprintf ((STREAM), "%s", (NAME))
881
882 /* Local compiler-generated symbols must have a prefix that the assembler
883 understands. */
884 #define LOCAL_LABEL_PREFIX (TARGET_SCORE7 ? "." : "$")
885
886 #undef ASM_GENERATE_INTERNAL_LABEL
887 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
888 sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
889
890 /* Output of Assembler Instructions. */
891 #define REGISTER_NAMES \
892 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
893 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
894 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
895 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
896 \
897 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
898 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15", \
899 \
900 "ceh", "cel", "sr0", "sr1", "sr2", "_arg", "_frame", "", \
901 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", \
902 \
903 "c1r0", "c1r1", "c1r2", "c1r3", "c1r4", "c1r5", "c1r6", "c1r7", \
904 "c1r8", "c1r9", "c1r10", "c1r11", "c1r12", "c1r13", "c1r14", "c1r15", \
905 "c1r16", "c1r17", "c1r18", "c1r19", "c1r20", "c1r21", "c1r22", "c1r23", \
906 "c1r24", "c1r25", "c1r26", "c1r27", "c1r28", "c1r29", "c1r30", "c1r31", \
907 \
908 "c2r0", "c2r1", "c2r2", "c2r3", "c2r4", "c2r5", "c2r6", "c2r7", \
909 "c2r8", "c2r9", "c2r10", "c2r11", "c2r12", "c2r13", "c2r14", "c2r15", \
910 "c2r16", "c2r17", "c2r18", "c2r19", "c2r20", "c2r21", "c2r22", "c2r23", \
911 "c2r24", "c2r25", "c2r26", "c2r27", "c2r28", "c2r29", "c2r30", "c2r31", \
912 \
913 "c3r0", "c3r1", "c3r2", "c3r3", "c3r4", "c3r5", "c3r6", "c3r7", \
914 "c3r8", "c3r9", "c3r10", "c3r11", "c3r12", "c3r13", "c3r14", "c3r15", \
915 "c3r16", "c3r17", "c3r18", "c3r19", "c3r20", "c3r21", "c3r22", "c3r23", \
916 "c3r24", "c3r25", "c3r26", "c3r27", "c3r28", "c3r29", "c3r30", "c3r31", \
917 }
918
919 /* Print operand X (an rtx) in assembler syntax to file FILE. */
920 #define PRINT_OPERAND(STREAM, X, CODE) score_print_operand (STREAM, X, CODE)
921
922 /* A C expression which evaluates to true if CODE is a valid
923 punctuation character for use in the `PRINT_OPERAND' macro. */
924 #define PRINT_OPERAND_PUNCT_VALID_P(C) ((C) == '[' || (C) == ']')
925
926 /* Print a memory address as an operand to reference that memory location. */
927 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
928 score_print_operand_address (STREAM, X)
929
930 /* By default on the S+core, external symbols do not have an underscore
931 prepended. */
932 #define USER_LABEL_PREFIX ""
933
934 /* This is how to output an insn to push a register on the stack. */
935 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
936 do { \
937 if (TARGET_SCORE7) \
938 fprintf (STREAM, "\tpush! %s,[%s]\n", \
939 reg_names[REGNO], \
940 reg_names[STACK_POINTER_REGNUM]); \
941 else if (TARGET_SCORE3) \
942 fprintf (STREAM, "\tpush!\t%s\n", \
943 reg_names[REGNO]); \
944 } while (0)
945
946 /* This is how to output an insn to pop a register from the stack. */
947 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
948 do { \
949 if (TARGET_SCORE7) \
950 fprintf (STREAM, "\tpop! %s,[%s]\n", \
951 reg_names[REGNO], \
952 reg_names[STACK_POINTER_REGNUM]); \
953 else if (TARGET_SCORE3) \
954 fprintf (STREAM, "\tpop!\t%s\n", \
955 reg_names[REGNO]); \
956 } while (0)
957
958 /* Output of Dispatch Tables. */
959 /* This is how to output an element of a case-vector. We can make the
960 entries PC-relative in GP-relative when .gp(d)word is supported. */
961 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
962 do { \
963 if (TARGET_SCORE7) \
964 if (flag_pic) \
965 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
966 else \
967 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
968 else if (TARGET_SCORE3) \
969 { \
970 switch (GET_MODE(BODY)) \
971 { \
972 case QImode: /* TBB */ \
973 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d_tbb)/2\n", \
974 VALUE, REL); \
975 break; \
976 case HImode: /* TBH */ \
977 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d_tbb)/2\n", \
978 VALUE, REL); \
979 break; \
980 case SImode: \
981 if (flag_pic) \
982 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
983 else \
984 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
985 break; \
986 default: \
987 gcc_unreachable(); \
988 } \
989 } \
990 } while (0)
991
992 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
993 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \
994 : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0)
995
996 /* This is how to output a label which precedes a jumptable. Since
997 Score3 instructions are 2 bytes, we may need explicit alignment here. */
998 #undef ASM_OUTPUT_CASE_LABEL
999 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
1000 do { \
1001 if ((TARGET_SCORE7) && GET_MODE (PATTERN (JUMPTABLE)) == SImode) \
1002 ASM_OUTPUT_ALIGN (FILE, 2); \
1003 (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
1004 } while (0)
1005
1006 /* Specify the machine mode that this machine uses
1007 for the index in the tablejump instruction. */
1008 #define CASE_VECTOR_MODE SImode
1009
1010 #define CASE_VECTOR_PC_RELATIVE (TARGET_SCORE3)
1011
1012 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
1013 ((min < 0 || max >= 0x2000 || TARGET_SCORE7) ? SImode \
1014 : (max >= 0x200) ? HImode \
1015 : QImode)
1016
1017 /* This is how to output an element of a case-vector that is absolute. */
1018 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
1019 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
1020
1021 /* Assembler Commands for Exception Regions */
1022 /* Since the S+core is encoded in the least-significant bit
1023 of the address, mask it off return addresses for purposes of
1024 finding exception handling regions. */
1025 #define MASK_RETURN_ADDR constm1_rtx
1026
1027 /* Assembler Commands for Alignment */
1028 /* This is how to output an assembler line to advance the location
1029 counter by SIZE bytes. */
1030 #undef ASM_OUTPUT_SKIP
1031 #define ASM_OUTPUT_SKIP(STREAM, SIZE) \
1032 fprintf (STREAM, "\t.space\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1033
1034 /* This is how to output an assembler line
1035 that says to advance the location counter
1036 to a multiple of 2**LOG bytes. */
1037 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
1038 fprintf (STREAM, "\t.align\t%d\n", (LOG))
1039
1040 /* Macros Affecting All Debugging Formats. */
1041 #ifndef PREFERRED_DEBUGGING_TYPE
1042 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
1043 #endif
1044
1045 /* Specific Options for DBX Output. */
1046 #define DBX_DEBUGGING_INFO 1
1047
1048 /* By default, turn on GDB extensions. */
1049 #define DEFAULT_GDB_EXTENSIONS 1
1050
1051 #define DBX_CONTIN_LENGTH 0
1052
1053 /* File Names in DBX Format. */
1054 #define DWARF2_DEBUGGING_INFO 1
1055
1056 /* The DWARF 2 CFA column which tracks the return address. */
1057 #define DWARF_FRAME_RETURN_COLUMN 3
1058
1059 /* Define if operations between registers always perform the operation
1060 on the full register even if a narrower mode is specified. */
1061 #define WORD_REGISTER_OPERATIONS
1062
1063 /* All references are zero extended. */
1064 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1065
1066 /* Define if loading short immediate values into registers sign extends. */
1067 #define SHORT_IMMEDIATES_SIGN_EXTEND
1068
1069 /* Max number of bytes we can move from memory to memory
1070 in one reasonably fast instruction. */
1071 #define MOVE_MAX 4
1072
1073 /* Define this to be nonzero if shift instructions ignore all but the low-order
1074 few bits. */
1075 #define SHIFT_COUNT_TRUNCATED 1
1076
1077 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1078 is done just by pretending it is already truncated. */
1079 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1080
1081 /* Specify the machine mode that pointers have.
1082 After generation of rtl, the compiler makes no further distinction
1083 between pointers and any other objects of this machine mode. */
1084 #define Pmode SImode
1085
1086 /* Give call MEMs SImode since it is the "most permissive" mode
1087 for 32-bit targets. */
1088 #define FUNCTION_MODE Pmode
1089
1090 struct extern_list GTY ((chain_next ("%h.next")))
1091 {
1092 struct extern_list *next; /* next external */
1093 const char *name; /* name of the external */
1094 int size; /* size in bytes */
1095 };
1096
1097 extern GTY (()) struct extern_list *extern_head;
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