gcc/config/s390/s390.h

   1 /* Definitions of target machine for GNU compiler, for IBM S/390
   2    Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
   3    2007 Free Software Foundation, Inc.
   4    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
   5                   Ulrich Weigand (uweigand@de.ibm.com).
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify it under
  10 the terms of the GNU General Public License as published by the Free
  11 Software Foundation; either version 3, or (at your option) any later
  12 version.
  13
  14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  17 for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING3.  If not see
  21 <http://www.gnu.org/licenses/>.  */
  22
  23 #ifndef _S390_H
  24 #define _S390_H
  25
  26 /* Override the __fixdfdi etc. routines when building libgcc2.
  27    ??? This should be done in a cleaner way ...  */
  28 #if defined (IN_LIBGCC2) && !defined (__s390x__)
  29 #include <config/s390/fixdfdi.h>
  30 #endif
  31
  32 /* Which processor to generate code or schedule for. The cpu attribute
  33    defines a list that mirrors this list, so changes to s390.md must be
  34    made at the same time.  */
  35
  36 enum processor_type
  37 {
  38   PROCESSOR_9672_G5,
  39   PROCESSOR_9672_G6,
  40   PROCESSOR_2064_Z900,
  41   PROCESSOR_2084_Z990,
  42   PROCESSOR_2094_Z9_109,
  43   PROCESSOR_max
  44 };
  45
  46 /* Optional architectural facilities supported by the processor.  */
  47
  48 enum processor_flags
  49 {
  50   PF_IEEE_FLOAT = 1,
  51   PF_ZARCH = 2,
  52   PF_LONG_DISPLACEMENT = 4,
  53   PF_EXTIMM = 8,
  54   PF_DFP = 16
  55 };
  56
  57 extern enum processor_type s390_tune;
  58 extern enum processor_flags s390_tune_flags;
  59
  60 extern enum processor_type s390_arch;
  61 extern enum processor_flags s390_arch_flags;
  62
  63 #define TARGET_CPU_IEEE_FLOAT \
  64         (s390_arch_flags & PF_IEEE_FLOAT)
  65 #define TARGET_CPU_ZARCH \
  66         (s390_arch_flags & PF_ZARCH)
  67 #define TARGET_CPU_LONG_DISPLACEMENT \
  68         (s390_arch_flags & PF_LONG_DISPLACEMENT)
  69 #define TARGET_CPU_EXTIMM \
  70         (s390_arch_flags & PF_EXTIMM)
  71 #define TARGET_CPU_DFP \
  72         (s390_arch_flags & PF_DFP)
  73
  74 #define TARGET_LONG_DISPLACEMENT \
  75        (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
  76 #define TARGET_EXTIMM \
  77        (TARGET_ZARCH && TARGET_CPU_EXTIMM)
  78 #define TARGET_DFP \
  79        (TARGET_ZARCH && TARGET_CPU_DFP)
  80
  81 /* Run-time target specification.  */
  82
  83 /* Defaults for option flags defined only on some subtargets.  */
  84 #ifndef TARGET_TPF_PROFILING
  85 #define TARGET_TPF_PROFILING 0
  86 #endif
  87
  88 /* This will be overridden by OS headers.  */
  89 #define TARGET_TPF 0
  90
  91 /* Target CPU builtins.  */
  92 #define TARGET_CPU_CPP_BUILTINS()                       \
  93   do                                                    \
  94     {                                                   \
  95       builtin_assert ("cpu=s390");                      \
  96       builtin_assert ("machine=s390");                  \
  97       builtin_define ("__s390__");                      \
  98       if (TARGET_64BIT)                                 \
  99         builtin_define ("__s390x__");                   \
 100       if (TARGET_LONG_DOUBLE_128)                       \
 101         builtin_define ("__LONG_DOUBLE_128__");         \
 102     }                                                   \
 103   while (0)
 104
 105 #ifdef DEFAULT_TARGET_64BIT
 106 #define TARGET_DEFAULT             (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP)
 107 #else
 108 #define TARGET_DEFAULT             0
 109 #endif
 110
 111 /* Support for configure-time defaults.  */
 112 #define OPTION_DEFAULT_SPECS                                    \
 113   { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" },                 \
 114   { "arch", "%{!march=*:-march=%(VALUE)}" },                    \
 115   { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
 116
 117 /* Defaulting rules.  */
 118 #ifdef DEFAULT_TARGET_64BIT
 119 #define DRIVER_SELF_SPECS                                       \
 120   "%{!m31:%{!m64:-m64}}",                                       \
 121   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 122   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 123 #else
 124 #define DRIVER_SELF_SPECS                                       \
 125   "%{!m31:%{!m64:-m31}}",                                       \
 126   "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}",             \
 127   "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
 128 #endif
 129
 130 /* Target version string.  Overridden by the OS header.  */
 131 #ifdef DEFAULT_TARGET_64BIT
 132 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
 133 #else
 134 #define TARGET_VERSION fprintf (stderr, " (S/390)");
 135 #endif
 136
 137 /* Hooks to override options.  */
 138 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
 139 #define OVERRIDE_OPTIONS override_options ()
 140
 141 /* Frame pointer is not used for debugging.  */
 142 #define CAN_DEBUG_WITHOUT_FP
 143
 144 /* Constants needed to control the TEST DATA CLASS (TDC) instruction.  */
 145 #define S390_TDC_POSITIVE_ZERO                     (1 << 11)
 146 #define S390_TDC_NEGATIVE_ZERO                     (1 << 10)
 147 #define S390_TDC_POSITIVE_NORMALIZED_BFP_NUMBER    (1 << 9)
 148 #define S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER    (1 << 8)
 149 #define S390_TDC_POSITIVE_DENORMALIZED_BFP_NUMBER  (1 << 7)
 150 #define S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER  (1 << 6)
 151 #define S390_TDC_POSITIVE_INFINITY                 (1 << 5)
 152 #define S390_TDC_NEGATIVE_INFINITY                 (1 << 4)
 153 #define S390_TDC_POSITIVE_QUIET_NAN                (1 << 3)
 154 #define S390_TDC_NEGATIVE_QUIET_NAN                (1 << 2)
 155 #define S390_TDC_POSITIVE_SIGNALING_NAN            (1 << 1)
 156 #define S390_TDC_NEGATIVE_SIGNALING_NAN            (1 << 0)
 157
 158 /* The following values are different for DFP.  */
 159 #define S390_TDC_POSITIVE_DENORMALIZED_DFP_NUMBER (1 << 9)
 160 #define S390_TDC_NEGATIVE_DENORMALIZED_DFP_NUMBER (1 << 8)
 161 #define S390_TDC_POSITIVE_NORMALIZED_DFP_NUMBER   (1 << 7)
 162 #define S390_TDC_NEGATIVE_NORMALIZED_DFP_NUMBER   (1 << 6)
 163
 164 /* For signbit, the BFP-DFP-difference makes no difference. */
 165 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \
 166                           | S390_TDC_NEGATIVE_NORMALIZED_BFP_NUMBER \
 167                           | S390_TDC_NEGATIVE_DENORMALIZED_BFP_NUMBER\
 168                           | S390_TDC_NEGATIVE_INFINITY \
 169                           | S390_TDC_NEGATIVE_QUIET_NAN \
 170                           | S390_TDC_NEGATIVE_SIGNALING_NAN )
 171
 172 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \
 173                           | S390_TDC_NEGATIVE_INFINITY )
 174
 175 /* In libgcc2, determine target settings as compile-time constants.  */
 176 #ifdef IN_LIBGCC2
 177 #undef TARGET_64BIT
 178 #ifdef __s390x__
 179 #define TARGET_64BIT 1
 180 #else
 181 #define TARGET_64BIT 0
 182 #endif
 183 #endif
 184
 185
 186 /* Target machine storage layout.  */
 187
 188 /* Everything is big-endian.  */
 189 #define BITS_BIG_ENDIAN 1
 190 #define BYTES_BIG_ENDIAN 1
 191 #define WORDS_BIG_ENDIAN 1
 192
 193 /* Width of a word, in units (bytes).  */
 194 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
 195 #ifndef IN_LIBGCC2
 196 #define MIN_UNITS_PER_WORD 4
 197 #endif
 198 #define MAX_BITS_PER_WORD 64
 199
 200 /* Function arguments and return values are promoted to word size.  */
 201 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE)            \
 202 if (INTEGRAL_MODE_P (MODE) &&                           \
 203     GET_MODE_SIZE (MODE) < UNITS_PER_WORD) {            \
 204   (MODE) = Pmode;                                       \
 205           }
 206
 207 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 208 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
 209
 210 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 211 #define STACK_BOUNDARY 64
 212
 213 /* Allocation boundary (in *bits*) for the code of a function.  */
 214 #define FUNCTION_BOUNDARY 32
 215
 216 /* There is no point aligning anything to a rounder boundary than this.  */
 217 #define BIGGEST_ALIGNMENT 64
 218
 219 /* Alignment of field after `int : 0' in a structure.  */
 220 #define EMPTY_FIELD_BOUNDARY 32
 221
 222 /* Alignment on even addresses for LARL instruction.  */
 223 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 224 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
 225
 226 /* Alignment is not required by the hardware.  */
 227 #define STRICT_ALIGNMENT 0
 228
 229 /* Mode of stack savearea.
 230    FUNCTION is VOIDmode because calling convention maintains SP.
 231    BLOCK needs Pmode for SP.
 232    NONLOCAL needs twice Pmode to maintain both backchain and SP.  */
 233 #define STACK_SAVEAREA_MODE(LEVEL)      \
 234   (LEVEL == SAVE_FUNCTION ? VOIDmode    \
 235   : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
 236
 237
 238 /* Type layout.  */
 239
 240 /* Sizes in bits of the source language data types.  */
 241 #define SHORT_TYPE_SIZE 16
 242 #define INT_TYPE_SIZE 32
 243 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
 244 #define LONG_LONG_TYPE_SIZE 64
 245 #define FLOAT_TYPE_SIZE 32
 246 #define DOUBLE_TYPE_SIZE 64
 247 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
 248
 249 /* Define this to set long double type size to use in libgcc2.c, which can
 250    not depend on target_flags.  */
 251 #ifdef __LONG_DOUBLE_128__
 252 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
 253 #else
 254 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
 255 #endif
 256
 257 /* Work around target_flags dependency in ada/targtyps.c.  */
 258 #define WIDEST_HARDWARE_FP_SIZE 64
 259
 260 /* We use "unsigned char" as default.  */
 261 #define DEFAULT_SIGNED_CHAR 0
 262
 263
 264 /* Register usage.  */
 265
 266 /* We have 16 general purpose registers (registers 0-15),
 267    and 16 floating point registers (registers 16-31).
 268    (On non-IEEE machines, we have only 4 fp registers.)
 269
 270    Amongst the general purpose registers, some are used
 271    for specific purposes:
 272    GPR 11: Hard frame pointer (if needed)
 273    GPR 12: Global offset table pointer (if needed)
 274    GPR 13: Literal pool base register
 275    GPR 14: Return address register
 276    GPR 15: Stack pointer
 277
 278    Registers 32-35 are 'fake' hard registers that do not
 279    correspond to actual hardware:
 280    Reg 32: Argument pointer
 281    Reg 33: Condition code
 282    Reg 34: Frame pointer
 283    Reg 35: Return address pointer
 284
 285    Registers 36 and 37 are mapped to access registers
 286    0 and 1, used to implement thread-local storage.  */
 287
 288 #define FIRST_PSEUDO_REGISTER 38
 289
 290 /* Standard register usage.  */
 291 #define GENERAL_REGNO_P(N)      ((int)(N) >= 0 && (N) < 16)
 292 #define ADDR_REGNO_P(N)         ((N) >= 1 && (N) < 16)
 293 #define FP_REGNO_P(N)           ((N) >= 16 && (N) < 32)
 294 #define CC_REGNO_P(N)           ((N) == 33)
 295 #define FRAME_REGNO_P(N)        ((N) == 32 || (N) == 34 || (N) == 35)
 296 #define ACCESS_REGNO_P(N)       ((N) == 36 || (N) == 37)
 297
 298 #define GENERAL_REG_P(X)        (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
 299 #define ADDR_REG_P(X)           (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
 300 #define FP_REG_P(X)             (REG_P (X) && FP_REGNO_P (REGNO (X)))
 301 #define CC_REG_P(X)             (REG_P (X) && CC_REGNO_P (REGNO (X)))
 302 #define FRAME_REG_P(X)          (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
 303 #define ACCESS_REG_P(X)         (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
 304
 305 /* Set up fixed registers and calling convention:
 306
 307    GPRs 0-5 are always call-clobbered,
 308    GPRs 6-15 are always call-saved.
 309    GPR 12 is fixed if used as GOT pointer.
 310    GPR 13 is always fixed (as literal pool pointer).
 311    GPR 14 is always fixed on S/390 machines (as return address).
 312    GPR 15 is always fixed (as stack pointer).
 313    The 'fake' hard registers are call-clobbered and fixed.
 314    The access registers are call-saved and fixed.
 315
 316    On 31-bit, FPRs 18-19 are call-clobbered;
 317    on 64-bit, FPRs 24-31 are call-clobbered.
 318    The remaining FPRs are call-saved.  */
 319
 320 #define FIXED_REGISTERS                         \
 321 { 0, 0, 0, 0,                                   \
 322   0, 0, 0, 0,                                   \
 323   0, 0, 0, 0,                                   \
 324   0, 1, 1, 1,                                   \
 325   0, 0, 0, 0,                                   \
 326   0, 0, 0, 0,                                   \
 327   0, 0, 0, 0,                                   \
 328   0, 0, 0, 0,                                   \
 329   1, 1, 1, 1,                                   \
 330   1, 1 }
 331
 332 #define CALL_USED_REGISTERS                     \
 333 { 1, 1, 1, 1,                                   \
 334   1, 1, 0, 0,                                   \
 335   0, 0, 0, 0,                                   \
 336   0, 1, 1, 1,                                   \
 337   1, 1, 1, 1,                                   \
 338   1, 1, 1, 1,                                   \
 339   1, 1, 1, 1,                                   \
 340   1, 1, 1, 1,                                   \
 341   1, 1, 1, 1,                                   \
 342   1, 1 }
 343
 344 #define CALL_REALLY_USED_REGISTERS              \
 345 { 1, 1, 1, 1,                                   \
 346   1, 1, 0, 0,                                   \
 347   0, 0, 0, 0,                                   \
 348   0, 0, 0, 0,                                   \
 349   1, 1, 1, 1,                                   \
 350   1, 1, 1, 1,                                   \
 351   1, 1, 1, 1,                                   \
 352   1, 1, 1, 1,                                   \
 353   1, 1, 1, 1,                                   \
 354   0, 0 }
 355
 356 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
 357
 358 /* Preferred register allocation order.  */
 359 #define REG_ALLOC_ORDER                                         \
 360 {  1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13,            \
 361    16, 17, 18, 19, 20, 21, 22, 23,                              \
 362    24, 25, 26, 27, 28, 29, 30, 31,                              \
 363    15, 32, 33, 34, 35, 36, 37 }
 364
 365
 366 /* Fitting values into registers.  */
 367
 368 /* Integer modes <= word size fit into any GPR.
 369    Integer modes > word size fit into successive GPRs, starting with
 370    an even-numbered register.
 371    SImode and DImode fit into FPRs as well.
 372
 373    Floating point modes <= word size fit into any FPR or GPR.
 374    Floating point modes > word size (i.e. DFmode on 32-bit) fit
 375    into any FPR, or an even-odd GPR pair.
 376    TFmode fits only into an even-odd FPR pair.
 377
 378    Complex floating point modes fit either into two FPRs, or into
 379    successive GPRs (again starting with an even number).
 380    TCmode fits only into two successive even-odd FPR pairs.
 381
 382    Condition code modes fit only into the CC register.  */
 383
 384 /* Because all registers in a class have the same size HARD_REGNO_NREGS
 385    is equivalent to CLASS_MAX_NREGS.  */
 386 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
 387   s390_class_max_nregs (REGNO_REG_CLASS (REGNO), (MODE))
 388
 389 #define HARD_REGNO_MODE_OK(REGNO, MODE)         \
 390   s390_hard_regno_mode_ok ((REGNO), (MODE))
 391
 392 #define HARD_REGNO_RENAME_OK(FROM, TO)          \
 393   s390_hard_regno_rename_ok (FROM, TO)
 394
 395 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 396    (((MODE1) == SFmode || (MODE1) == DFmode)    \
 397    == ((MODE2) == SFmode || (MODE2) == DFmode))
 398
 399 /* Maximum number of registers to represent a value of mode MODE
 400    in a register of class CLASS.  */
 401 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 402   s390_class_max_nregs ((CLASS), (MODE))
 403
 404 /* If a 4-byte value is loaded into a FPR, it is placed into the
 405    *upper* half of the register, not the lower.  Therefore, we
 406    cannot use SUBREGs to switch between modes in FP registers.
 407    Likewise for access registers, since they have only half the
 408    word size on 64-bit.  */
 409 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)                       \
 410   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)                           \
 411    ? ((reg_classes_intersect_p (FP_REGS, CLASS)                         \
 412        && (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8))         \
 413       || reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
 414
 415 /* Register classes.  */
 416
 417 /* We use the following register classes:
 418    GENERAL_REGS     All general purpose registers
 419    ADDR_REGS        All general purpose registers except %r0
 420                     (These registers can be used in address generation)
 421    FP_REGS          All floating point registers
 422    CC_REGS          The condition code register
 423    ACCESS_REGS      The access registers
 424
 425    GENERAL_FP_REGS  Union of GENERAL_REGS and FP_REGS
 426    ADDR_FP_REGS     Union of ADDR_REGS and FP_REGS
 427    GENERAL_CC_REGS  Union of GENERAL_REGS and CC_REGS
 428    ADDR_CC_REGS     Union of ADDR_REGS and CC_REGS
 429
 430    NO_REGS          No registers
 431    ALL_REGS         All registers
 432
 433    Note that the 'fake' frame pointer and argument pointer registers
 434    are included amongst the address registers here.  */
 435
 436 enum reg_class
 437 {
 438   NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
 439   ADDR_CC_REGS, GENERAL_CC_REGS,
 440   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
 441   ALL_REGS, LIM_REG_CLASSES
 442 };
 443 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 444
 445 #define REG_CLASS_NAMES                                                 \
 446 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS",     \
 447   "ADDR_CC_REGS", "GENERAL_CC_REGS",                                    \
 448   "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
 449
 450 /* Class -> register mapping.  */
 451 #define REG_CLASS_CONTENTS \
 452 {                                                       \
 453   { 0x00000000, 0x00000000 },   /* NO_REGS */           \
 454   { 0x00000000, 0x00000002 },   /* CC_REGS */           \
 455   { 0x0000fffe, 0x0000000d },   /* ADDR_REGS */         \
 456   { 0x0000ffff, 0x0000000d },   /* GENERAL_REGS */      \
 457   { 0x00000000, 0x00000030 },   /* ACCESS_REGS */       \
 458   { 0x0000fffe, 0x0000000f },   /* ADDR_CC_REGS */      \
 459   { 0x0000ffff, 0x0000000f },   /* GENERAL_CC_REGS */   \
 460   { 0xffff0000, 0x00000000 },   /* FP_REGS */           \
 461   { 0xfffffffe, 0x0000000d },   /* ADDR_FP_REGS */      \
 462   { 0xffffffff, 0x0000000d },   /* GENERAL_FP_REGS */   \
 463   { 0xffffffff, 0x0000003f },   /* ALL_REGS */          \
 464 }
 465
 466 /* The following macro defines cover classes for Integrated Register
 467    Allocator.  Cover classes is a set of non-intersected register
 468    classes covering all hard registers used for register allocation
 469    purpose.  Any move between two registers of a cover class should be
 470    cheaper than load or store of the registers.  The macro value is
 471    array of register classes with LIM_REG_CLASSES used as the end
 472    marker.  */
 473
 474 #define IRA_COVER_CLASSES                                                    \
 475 {                                                                            \
 476   GENERAL_REGS, FP_REGS, CC_REGS, ACCESS_REGS, LIM_REG_CLASSES               \
 477 }
 478
 479 /* In some case register allocation order is not enough for IRA to
 480    generate a good code.  The following macro (if defined) increases
 481    cost of REGNO for a pseudo approximately by pseudo usage frequency
 482    multiplied by the macro value.
 483
 484    We avoid usage of BASE_REGNUM by nonzero macro value because the
 485    reload can decide not to use the hard register because some
 486    constant was forced to be in memory.  */
 487 #define IRA_HARD_REGNO_ADD_COST_MULTIPLIER(regno)       \
 488   (regno == BASE_REGNUM ? 0.0 : 0.5)
 489
 490 /* Register -> class mapping.  */
 491 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 492 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
 493
 494 /* ADDR_REGS can be used as base or index register.  */
 495 #define INDEX_REG_CLASS ADDR_REGS
 496 #define BASE_REG_CLASS ADDR_REGS
 497
 498 /* Check whether REGNO is a hard register of the suitable class
 499    or a pseudo register currently allocated to one such.  */
 500 #define REGNO_OK_FOR_INDEX_P(REGNO)                                     \
 501     (((REGNO) < FIRST_PSEUDO_REGISTER                                   \
 502       && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS)                        \
 503      || ADDR_REGNO_P (reg_renumber[REGNO]))
 504 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
 505
 506
 507 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
 508    return the class of reg to actually use.  */
 509 #define PREFERRED_RELOAD_CLASS(X, CLASS)        \
 510   s390_preferred_reload_class ((X), (CLASS))
 511
 512 /* We need secondary memory to move data between GPRs and FPRs.  */
 513 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
 514  ((CLASS1) != (CLASS2)                                \
 515   && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS)     \
 516   && (!TARGET_DFP || GET_MODE_SIZE (MODE) != 8))
 517
 518 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
 519    because the movsi and movsf patterns don't handle r/f moves.  */
 520 #define SECONDARY_MEMORY_NEEDED_MODE(MODE)              \
 521  (GET_MODE_BITSIZE (MODE) < 32                          \
 522   ? mode_for_size (32, GET_MODE_CLASS (MODE), 0)        \
 523   : MODE)
 524
 525
 526 /* Stack layout and calling conventions.  */
 527
 528 /* Our stack grows from higher to lower addresses.  However, local variables
 529    are accessed by positive offsets, and function arguments are stored at
 530    increasing addresses.  */
 531 #define STACK_GROWS_DOWNWARD
 532 #define FRAME_GROWS_DOWNWARD 1
 533 /* #undef ARGS_GROW_DOWNWARD */
 534
 535 /* The basic stack layout looks like this: the stack pointer points
 536    to the register save area for called functions.  Above that area
 537    is the location to place outgoing arguments.  Above those follow
 538    dynamic allocations (alloca), and finally the local variables.  */
 539
 540 /* Offset from stack-pointer to first location of outgoing args.  */
 541 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
 542
 543 /* Offset within stack frame to start allocating local variables at.  */
 544 #define STARTING_FRAME_OFFSET 0
 545
 546 /* Offset from the stack pointer register to an item dynamically
 547    allocated on the stack, e.g., by `alloca'.  */
 548 extern int current_function_outgoing_args_size;
 549 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
 550   (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
 551
 552 /* Offset of first parameter from the argument pointer register value.
 553    We have a fake argument pointer register that points directly to
 554    the argument area.  */
 555 #define FIRST_PARM_OFFSET(FNDECL) 0
 556
 557 /* Defining this macro makes __builtin_frame_address(0) and
 558    __builtin_return_address(0) work with -fomit-frame-pointer.  */
 559 #define INITIAL_FRAME_ADDRESS_RTX                                             \
 560   (TARGET_PACKED_STACK ?                                                      \
 561    plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) :                         \
 562    plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
 563
 564 /* The return address of the current frame is retrieved
 565    from the initial value of register RETURN_REGNUM.
 566    For frames farther back, we use the stack slot where
 567    the corresponding RETURN_REGNUM register was saved.  */
 568 #define DYNAMIC_CHAIN_ADDRESS(FRAME)                                          \
 569   (TARGET_PACKED_STACK ?                                                      \
 570    plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
 571
 572 #define RETURN_ADDR_RTX(COUNT, FRAME)                                         \
 573   s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
 574
 575 /* In 31-bit mode, we need to mask off the high bit of return addresses.  */
 576 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
 577
 578
 579 /* Exception handling.  */
 580
 581 /* Describe calling conventions for DWARF-2 exception handling.  */
 582 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (Pmode, RETURN_REGNUM)
 583 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
 584 #define DWARF_FRAME_RETURN_COLUMN  14
 585
 586 /* Describe how we implement __builtin_eh_return.  */
 587 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
 588 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
 589
 590 /* Select a format to encode pointers in exception handling data.  */
 591 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)                          \
 592   (flag_pic                                                                 \
 593     ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
 594    : DW_EH_PE_absptr)
 595
 596
 597 /* Frame registers.  */
 598
 599 #define STACK_POINTER_REGNUM 15
 600 #define FRAME_POINTER_REGNUM 34
 601 #define HARD_FRAME_POINTER_REGNUM 11
 602 #define ARG_POINTER_REGNUM 32
 603 #define RETURN_ADDRESS_POINTER_REGNUM 35
 604
 605 /* The static chain must be call-clobbered, but not used for
 606    function argument passing.  As register 1 is clobbered by
 607    the trampoline code, we only have one option.  */
 608 #define STATIC_CHAIN_REGNUM 0
 609
 610 /* Number of hardware registers that go into the DWARF-2 unwind info.
 611    To avoid ABI incompatibility, this number must not change even as
 612    'fake' hard registers are added or removed.  */
 613 #define DWARF_FRAME_REGISTERS 34
 614
 615
 616 /* Frame pointer and argument pointer elimination.  */
 617
 618 #define FRAME_POINTER_REQUIRED 0
 619
 620 #define ELIMINABLE_REGS                                         \
 621 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },                \
 622  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },           \
 623  { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },                  \
 624  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },             \
 625  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM },       \
 626  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },  \
 627  { BASE_REGNUM, BASE_REGNUM }}
 628
 629 #define CAN_ELIMINATE(FROM, TO) \
 630   s390_can_eliminate ((FROM), (TO))
 631
 632 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 633   (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
 634
 635
 636 /* Stack arguments.  */
 637
 638 /* We need current_function_outgoing_args to be valid.  */
 639 #define ACCUMULATE_OUTGOING_ARGS 1
 640
 641 /* Return doesn't modify the stack.  */
 642 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
 643
 644
 645 /* Register arguments.  */
 646
 647 typedef struct s390_arg_structure
 648 {
 649   int gprs;                     /* gpr so far */
 650   int fprs;                     /* fpr so far */
 651 }
 652 CUMULATIVE_ARGS;
 653
 654 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
 655   ((CUM).gprs=0, (CUM).fprs=0)
 656
 657 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 658   s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
 659
 660 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   \
 661   s390_function_arg (&CUM, MODE, TYPE, NAMED)
 662
 663 /* Arguments can be placed in general registers 2 to 6, or in floating
 664    point registers 0 and 2 for 31 bit and fprs 0, 2, 4 and 6 for 64
 665    bit.  */
 666 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
 667   (N) == 16 || (N) == 17 || (TARGET_64BIT && ((N) == 18 || (N) == 19)))
 668
 669
 670 /* Scalar return values.  */
 671
 672 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 673   s390_function_value ((VALTYPE), VOIDmode)
 674
 675 #define LIBCALL_VALUE(MODE) \
 676   s390_function_value (NULL, (MODE))
 677
 678 /* Only gpr 2 and fpr 0 are ever used as return registers.  */
 679 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
 680
 681
 682 /* Function entry and exit.  */
 683
 684 /* When returning from a function, the stack pointer does not matter.  */
 685 #define EXIT_IGNORE_STACK       1
 686
 687
 688 /* Profiling.  */
 689
 690 #define FUNCTION_PROFILER(FILE, LABELNO)                        \
 691   s390_function_profiler ((FILE), ((LABELNO)))
 692
 693 #define PROFILE_BEFORE_PROLOGUE 1
 694
 695
 696 /* Trampolines for nested functions.  */
 697
 698 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
 699
 700 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT)                       \
 701    s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
 702
 703 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 704    s390_trampoline_template (FILE)
 705
 706
 707 /* Addressing modes, and classification of registers for them.  */
 708
 709 /* Recognize any constant value that is a valid address.  */
 710 #define CONSTANT_ADDRESS_P(X) 0
 711
 712 /* Maximum number of registers that can appear in a valid memory address.  */
 713 #define MAX_REGS_PER_ADDRESS 2
 714
 715 /* S/390 has no mode dependent addresses.  */
 716 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
 717
 718 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
 719    valid memory address for an instruction.
 720    The MODE argument is the machine mode for the MEM expression
 721    that wants to use this address.  */
 722 #ifdef REG_OK_STRICT
 723 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 724 {                                                                       \
 725   if (legitimate_address_p (MODE, X, 1))                                \
 726     goto ADDR;                                                          \
 727 }
 728 #else
 729 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                         \
 730 {                                                                       \
 731   if (legitimate_address_p (MODE, X, 0))                                \
 732     goto ADDR;                                                          \
 733 }
 734 #endif
 735
 736 /* Try machine-dependent ways of modifying an illegitimate address
 737    to be legitimate.  If we find one, return the new, valid address.
 738    This macro is used in only one place: `memory_address' in explow.c.  */
 739 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)                          \
 740 {                                                                       \
 741   (X) = legitimize_address (X, OLDX, MODE);                             \
 742   if (memory_address_p (MODE, X))                                       \
 743     goto WIN;                                                           \
 744 }
 745
 746 /* Try a machine-dependent way of reloading an illegitimate address
 747    operand.  If we find one, push the reload and jump to WIN.  This
 748    macro is used in only one place: `find_reloads_address' in reload.c.  */
 749 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
 750 do {                                                                    \
 751   rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE));   \
 752   if (new)                                                              \
 753     {                                                                   \
 754       (AD) = new;                                                       \
 755       goto WIN;                                                         \
 756     }                                                                   \
 757 } while (0)
 758
 759 /* Nonzero if the constant value X is a legitimate general operand.
 760    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 761 #define LEGITIMATE_CONSTANT_P(X) \
 762      legitimate_constant_p (X)
 763
 764 /* Helper macro for s390.c and s390.md to check for symbolic constants.  */
 765 #define SYMBOLIC_CONST(X)       \
 766 (GET_CODE (X) == SYMBOL_REF                                             \
 767  || GET_CODE (X) == LABEL_REF                                           \
 768  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 769
 770 #define TLS_SYMBOLIC_CONST(X)   \
 771 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X))       \
 772  || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
 773
 774
 775 /* Condition codes.  */
 776
 777 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
 778    return the mode to be used for the comparison.  */
 779 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
 780
 781 /* Canonicalize a comparison from one we don't have to one we do have.  */
 782 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
 783   s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
 784
 785 /* Define the information needed to generate branch and scc insns.  This is
 786    stored from the compare operation.  Note that we can't use "rtx" here
 787    since it hasn't been defined!  */
 788 extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
 789
 790
 791 /* Relative costs of operations.  */
 792
 793 /* On s390, copy between fprs and gprs is expensive.  */
 794 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)                        \
 795   ((   (   reg_classes_intersect_p ((CLASS1), GENERAL_REGS)             \
 796         && reg_classes_intersect_p ((CLASS2), FP_REGS))                 \
 797     || (   reg_classes_intersect_p ((CLASS1), FP_REGS)                  \
 798         && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
 799
 800 /* A C expression for the cost of moving data of mode M between a
 801    register and memory.  A value of 2 is the default; this cost is
 802    relative to those in `REGISTER_MOVE_COST'.  */
 803 #define MEMORY_MOVE_COST(M, C, I) 1
 804
 805 /* A C expression for the cost of a branch instruction.  A value of 1
 806    is the default; other values are interpreted relative to that.  */
 807 #define BRANCH_COST 1
 808
 809 /* Nonzero if access to memory by bytes is slow and undesirable.  */
 810 #define SLOW_BYTE_ACCESS 1
 811
 812 /* An integer expression for the size in bits of the largest integer machine
 813    mode that should actually be used.  We allow pairs of registers.  */
 814 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
 815
 816 /* The maximum number of bytes that a single instruction can move quickly
 817    between memory and registers or between two memory locations.  */
 818 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
 819 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
 820 #define MAX_MOVE_MAX 16
 821
 822 /* Determine whether to use move_by_pieces or block move insn.  */
 823 #define MOVE_BY_PIECES_P(SIZE, ALIGN)           \
 824   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 825     || (TARGET_64BIT && (SIZE) == 8) )
 826
 827 /* Determine whether to use clear_by_pieces or block clear insn.  */
 828 #define CLEAR_BY_PIECES_P(SIZE, ALIGN)          \
 829   ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4   \
 830     || (TARGET_64BIT && (SIZE) == 8) )
 831
 832 /* This macro is used to determine whether store_by_pieces should be
 833    called to "memcpy" storage when the source is a constant string.  */
 834 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
 835
 836 /* Likewise to decide whether to "memset" storage with byte values
 837    other than zero.  */
 838 #define SET_BY_PIECES_P(SIZE, ALIGN) STORE_BY_PIECES_P (SIZE, ALIGN)
 839
 840 /* Don't perform CSE on function addresses.  */
 841 #define NO_FUNCTION_CSE
 842
 843 /* This value is used in tree-sra to decide whether it might benefical
 844    to split a struct move into several word-size moves.  For S/390
 845    only small values make sense here since struct moves are relatively
 846    cheap thanks to mvc so the small default value choosen for archs
 847    with memmove patterns should be ok.  But this value is multiplied
 848    in tree-sra with UNITS_PER_WORD to make a decision so we adjust it
 849    here to compensate for that factor since mvc costs exactly the same
 850    on 31 and 64 bit.  */
 851 #define MOVE_RATIO (TARGET_64BIT? 2 : 4)
 852
 853
 854 /* Sections.  */
 855
 856 /* Output before read-only data.  */
 857 #define TEXT_SECTION_ASM_OP ".text"
 858
 859 /* Output before writable (initialized) data.  */
 860 #define DATA_SECTION_ASM_OP ".data"
 861
 862 /* Output before writable (uninitialized) data.  */
 863 #define BSS_SECTION_ASM_OP ".bss"
 864
 865 /* S/390 constant pool breaks the devices in crtstuff.c to control section
 866    in where code resides.  We have to write it as asm code.  */
 867 #ifndef __s390x__
 868 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
 869     asm (SECTION_OP "\n\
 870         bras\t%r2,1f\n\
 871 0:      .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
 872 1:      l\t%r3,0(%r2)\n\
 873         bas\t%r14,0(%r3,%r2)\n\
 874         .previous");
 875 #endif
 876
 877
 878 /* Position independent code.  */
 879
 880 extern int flag_pic;
 881
 882 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
 883
 884 #define LEGITIMATE_PIC_OPERAND_P(X)  legitimate_pic_operand_p (X)
 885
 886
 887 /* Assembler file format.  */
 888
 889 /* Character to start a comment.  */
 890 #define ASM_COMMENT_START "#"
 891
 892 /* Declare an uninitialized external linkage data object.  */
 893 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 894   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 895
 896 /* Globalizing directive for a label.  */
 897 #define GLOBAL_ASM_OP ".globl "
 898
 899 /* Advance the location counter to a multiple of 2**LOG bytes.  */
 900 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
 901   if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
 902
 903 /* Advance the location counter by SIZE bytes.  */
 904 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
 905   fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
 906
 907 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h.  */
 908 #define LOCAL_LABEL_PREFIX "."
 909
 910 /* How to refer to registers in assembler output.  This sequence is
 911    indexed by compiler's hard-register-number (see above).  */
 912 #define REGISTER_NAMES                                                  \
 913 { "%r0",  "%r1",  "%r2",  "%r3",  "%r4",  "%r5",  "%r6",  "%r7",        \
 914   "%r8",  "%r9",  "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",       \
 915   "%f0",  "%f2",  "%f4",  "%f6",  "%f1",  "%f3",  "%f5",  "%f7",        \
 916   "%f8",  "%f10", "%f12", "%f14", "%f9",  "%f11", "%f13", "%f15",       \
 917   "%ap",  "%cc",  "%fp",  "%rp",  "%a0",  "%a1"                         \
 918 }
 919
 920 /* Print operand X (an rtx) in assembler syntax to file FILE.  */
 921 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 922 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 923
 924 /* Output machine-dependent UNSPECs in address constants.  */
 925 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)          \
 926 do {                                                    \
 927   if (!s390_output_addr_const_extra (FILE, (X)))        \
 928     goto FAIL;                                          \
 929 } while (0);
 930
 931 /* Output an element of a case-vector that is absolute.  */
 932 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)                            \
 933 do {                                                                    \
 934   char buf[32];                                                         \
 935   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 936   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 937   assemble_name ((FILE), buf);                                          \
 938   fputc ('\n', (FILE));                                                 \
 939 } while (0)
 940
 941 /* Output an element of a case-vector that is relative.  */
 942 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)                \
 943 do {                                                                    \
 944   char buf[32];                                                         \
 945   fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE));                \
 946   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE));                      \
 947   assemble_name ((FILE), buf);                                          \
 948   fputc ('-', (FILE));                                                  \
 949   ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL));                        \
 950   assemble_name ((FILE), buf);                                          \
 951   fputc ('\n', (FILE));                                                 \
 952 } while (0)
 953
 954
 955 /* Miscellaneous parameters.  */
 956
 957 /* Specify the machine mode that this machine uses for the index in the
 958    tablejump instruction.  */
 959 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
 960
 961 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 962    is done just by pretending it is already truncated.  */
 963 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 964
 965 /* Specify the machine mode that pointers have.
 966    After generation of rtl, the compiler makes no further distinction
 967    between pointers and any other objects of this machine mode.  */
 968 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
 969
 970 /* This is -1 for "pointer mode" extend.  See ptr_extend in s390.md.  */
 971 #define POINTERS_EXTEND_UNSIGNED -1
 972
 973 /* A function address in a call instruction is a byte address (for
 974    indexing purposes) so give the MEM rtx a byte's mode.  */
 975 #define FUNCTION_MODE QImode
 976
 977 /* Specify the value which is used when clz operand is zero.  */
 978 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
 979
 980 /* Machine-specific symbol_ref flags.  */
 981 #define SYMBOL_FLAG_ALIGN1      (SYMBOL_FLAG_MACH_DEP << 0)
 982
 983 /* Check whether integer displacement is in range.  */
 984 #define DISP_IN_RANGE(d) \
 985   (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
 986                            : ((d) >= 0 && (d) <= 4095))
 987
 988 #endif