1 /* Support functions for the unwinder.
2 Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
3 Contributed by Paul Brook
5 This file is free software; you can redistribute it and/or modify it
6 under the terms of the GNU General Public License as published by the
7 Free Software Foundation; either version 2, or (at your option) any
10 In addition to the permissions in the GNU General Public License, the
11 Free Software Foundation gives you unlimited permission to link the
12 compiled version of this file into combinations with other programs,
13 and to distribute those combinations without any restriction coming
14 from the use of this file. (The General Public License restrictions
15 do apply in other respects; for example, they cover modification of
16 the file, and distribution when not linked into a combine
19 This file is distributed in the hope that it will be useful, but
20 WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27 Boston, MA 02110-1301, USA. */
29 /* An executable stack is *not* required for these functions. */
30 #if defined(__ELF__) && defined(__linux__)
31 .section .note.GNU-stack,"",%progbits
37 #include "lib1funcs.asm"
41 EQUIV SYM (\name), SYM (__\name)
44 #if (__ARM_ARCH__ == 4)
45 /* Some coprocessors require armv5. We know this code will never be run on
46 other cpus. Tell gas to allow armv5, but only mark the objects as armv4.
49 #ifdef __ARM_ARCH_4T__
56 /* r0 points to a 16-word block. Upload these values to the actual core
58 ARM_FUNC_START restore_core_regs
59 /* We must use sp as the base register when restoring sp. Push the
60 last 3 registers onto the top of the current stack to achieve
63 ldmia r1, {r3, r4, r5} /* {sp, lr, pc}. */
64 #if defined(__thumb2__)
65 /* Thumb-2 doesn't allow sp in a load-multiple instruction, so push
66 the target address onto the target stack. This is safe as
67 we're always returning to somewhere further up the call stack. */
71 #elif defined(__INTERWORKING__)
72 /* Restore pc into ip. */
74 stmfd sp!, {r2, r3, r4}
76 stmfd sp!, {r3, r4, r5}
78 /* Don't bother restoring ip. */
79 ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp}
80 #if defined(__thumb2__)
81 /* Pop the return address off the target stack. */
84 #elif defined(__INTERWORKING__)
85 /* Pop the three registers we pushed earlier. */
86 ldmfd sp, {ip, sp, lr}
89 ldmfd sp, {sp, lr, pc}
91 FUNC_END restore_core_regs
92 UNPREFIX restore_core_regs
94 /* Load VFP registers d0-d15 from the address in r0.
95 Use this to load from FSTMX format. */
96 ARM_FUNC_START gnu_Unwind_Restore_VFP
97 /* Use the generic coprocessor form so that gas doesn't complain
98 on soft-float targets. */
99 ldc p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */
102 /* Store VFP registers d0-d15 to the address in r0.
103 Use this to store in FSTMX format. */
104 ARM_FUNC_START gnu_Unwind_Save_VFP
105 /* Use the generic coprocessor form so that gas doesn't complain
106 on soft-float targets. */
107 stc p11,cr0,[r0],{0x21} /* fstmiax r0, {d0-d15} */
110 /* Load VFP registers d0-d15 from the address in r0.
111 Use this to load from FSTMD format. */
112 ARM_FUNC_START gnu_Unwind_Restore_VFP_D
113 ldc p11,cr0,[r0],{0x20} /* fldmiad r0, {d0-d15} */
116 /* Store VFP registers d0-d15 to the address in r0.
117 Use this to store in FLDMD format. */
118 ARM_FUNC_START gnu_Unwind_Save_VFP_D
119 stc p11,cr0,[r0],{0x20} /* fstmiad r0, {d0-d15} */
122 /* Load VFP registers d16-d31 from the address in r0.
123 Use this to load from FSTMD (=VSTM) format. Needs VFPv3. */
124 ARM_FUNC_START gnu_Unwind_Restore_VFP_D_16_to_31
125 ldcl p11,cr0,[r0],{0x20} /* vldm r0, {d16-d31} */
128 /* Store VFP registers d16-d31 to the address in r0.
129 Use this to store in FLDMD (=VLDM) format. Needs VFPv3. */
130 ARM_FUNC_START gnu_Unwind_Save_VFP_D_16_to_31
131 stcl p11,cr0,[r0],{0x20} /* vstm r0, {d16-d31} */
134 ARM_FUNC_START gnu_Unwind_Restore_WMMXD
135 /* Use the generic coprocessor form so that gas doesn't complain
136 on non-iWMMXt targets. */
137 ldcl p1, cr0, [r0], #8 /* wldrd wr0, [r0], #8 */
138 ldcl p1, cr1, [r0], #8 /* wldrd wr1, [r0], #8 */
139 ldcl p1, cr2, [r0], #8 /* wldrd wr2, [r0], #8 */
140 ldcl p1, cr3, [r0], #8 /* wldrd wr3, [r0], #8 */
141 ldcl p1, cr4, [r0], #8 /* wldrd wr4, [r0], #8 */
142 ldcl p1, cr5, [r0], #8 /* wldrd wr5, [r0], #8 */
143 ldcl p1, cr6, [r0], #8 /* wldrd wr6, [r0], #8 */
144 ldcl p1, cr7, [r0], #8 /* wldrd wr7, [r0], #8 */
145 ldcl p1, cr8, [r0], #8 /* wldrd wr8, [r0], #8 */
146 ldcl p1, cr9, [r0], #8 /* wldrd wr9, [r0], #8 */
147 ldcl p1, cr10, [r0], #8 /* wldrd wr10, [r0], #8 */
148 ldcl p1, cr11, [r0], #8 /* wldrd wr11, [r0], #8 */
149 ldcl p1, cr12, [r0], #8 /* wldrd wr12, [r0], #8 */
150 ldcl p1, cr13, [r0], #8 /* wldrd wr13, [r0], #8 */
151 ldcl p1, cr14, [r0], #8 /* wldrd wr14, [r0], #8 */
152 ldcl p1, cr15, [r0], #8 /* wldrd wr15, [r0], #8 */
155 ARM_FUNC_START gnu_Unwind_Save_WMMXD
156 /* Use the generic coprocessor form so that gas doesn't complain
157 on non-iWMMXt targets. */
158 stcl p1, cr0, [r0], #8 /* wstrd wr0, [r0], #8 */
159 stcl p1, cr1, [r0], #8 /* wstrd wr1, [r0], #8 */
160 stcl p1, cr2, [r0], #8 /* wstrd wr2, [r0], #8 */
161 stcl p1, cr3, [r0], #8 /* wstrd wr3, [r0], #8 */
162 stcl p1, cr4, [r0], #8 /* wstrd wr4, [r0], #8 */
163 stcl p1, cr5, [r0], #8 /* wstrd wr5, [r0], #8 */
164 stcl p1, cr6, [r0], #8 /* wstrd wr6, [r0], #8 */
165 stcl p1, cr7, [r0], #8 /* wstrd wr7, [r0], #8 */
166 stcl p1, cr8, [r0], #8 /* wstrd wr8, [r0], #8 */
167 stcl p1, cr9, [r0], #8 /* wstrd wr9, [r0], #8 */
168 stcl p1, cr10, [r0], #8 /* wstrd wr10, [r0], #8 */
169 stcl p1, cr11, [r0], #8 /* wstrd wr11, [r0], #8 */
170 stcl p1, cr12, [r0], #8 /* wstrd wr12, [r0], #8 */
171 stcl p1, cr13, [r0], #8 /* wstrd wr13, [r0], #8 */
172 stcl p1, cr14, [r0], #8 /* wstrd wr14, [r0], #8 */
173 stcl p1, cr15, [r0], #8 /* wstrd wr15, [r0], #8 */
176 ARM_FUNC_START gnu_Unwind_Restore_WMMXC
177 /* Use the generic coprocessor form so that gas doesn't complain
178 on non-iWMMXt targets. */
179 ldc2 p1, cr8, [r0], #4 /* wldrw wcgr0, [r0], #4 */
180 ldc2 p1, cr9, [r0], #4 /* wldrw wcgr1, [r0], #4 */
181 ldc2 p1, cr10, [r0], #4 /* wldrw wcgr2, [r0], #4 */
182 ldc2 p1, cr11, [r0], #4 /* wldrw wcgr3, [r0], #4 */
185 ARM_FUNC_START gnu_Unwind_Save_WMMXC
186 /* Use the generic coprocessor form so that gas doesn't complain
187 on non-iWMMXt targets. */
188 stc2 p1, cr8, [r0], #4 /* wstrw wcgr0, [r0], #4 */
189 stc2 p1, cr9, [r0], #4 /* wstrw wcgr1, [r0], #4 */
190 stc2 p1, cr10, [r0], #4 /* wstrw wcgr2, [r0], #4 */
191 stc2 p1, cr11, [r0], #4 /* wstrw wcgr3, [r0], #4 */
194 /* Wrappers to save core registers, then call the real routine. */
196 .macro UNWIND_WRAPPER name nargs
198 /* Create a phase2_vrs structure. */
199 /* Split reg push in two to ensure the correct value for sp. */
200 #if defined(__thumb2__)
202 push {lr} /* PC is ignored. */
203 push {ip, lr} /* Push original SP and LR. */
205 stmfd sp!, {sp, lr, pc}
207 stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
209 /* Demand-save flags, plus an extra word for alignment. */
213 /* Point r1 at the block. Pass r[0..nargs) unchanged. */
215 #if defined(__thumb__) && !defined(__thumb2__)
216 /* Switch back to thumb mode to avoid interworking hassle. */
222 bl SYM (__gnu\name) __PLT__
227 bl SYM (__gnu\name) __PLT__
236 UNWIND_WRAPPER _Unwind_RaiseException 1
237 UNWIND_WRAPPER _Unwind_Resume 1
238 UNWIND_WRAPPER _Unwind_Resume_or_Rethrow 1
239 UNWIND_WRAPPER _Unwind_ForcedUnwind 3
240 UNWIND_WRAPPER _Unwind_Backtrace 2
242 #endif /* ndef __symbian__ */