1 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
3 PR tree-optimization/83914
4 * tree-vect-loop.c (vectorizable_induction): Don't convert
5 init_expr or apply the peeling adjustment for inductions
6 that are nested within the vectorized loop.
8 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
13 2018-01-18 Jakub Jelinek <jakub@redhat.com>
17 * function.h (gimplify_parameters): Add gimple_seq * argument.
18 * function.c: Include gimple.h and options.h.
19 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
20 for the added local temporaries if needed.
21 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
22 if there are any parameter cleanups, wrap whole body into a
23 try/finally with the cleanups.
25 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
28 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
29 Use GET_MODE_CLASS for scalar floating point.
31 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
35 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
36 Fix call of call_cgraph_insertion_hooks.
38 2018-01-18 Martin Sebor <msebor@redhat.com>
40 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
42 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
45 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
48 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
51 * common.opt: (-ffile-prefix-map): New option.
52 * opts.c (common_handle_option): Defer it.
53 * opts-global.c (handle_common_deferred_options): Handle it.
54 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
55 * file-prefix-map.h: New file.
56 (remap_debug_filename, add_debug_prefix_map): ...here.
57 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
58 * final.c (debug_prefix_map, add_debug_prefix_map
59 remap_debug_filename): Move to...
60 * file-prefix-map.c: New file.
61 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
62 generalize, get rid of alloca(), use strrchr() instead of strchr().
63 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
64 Implement in terms of add_prefix_map().
65 (remap_macro_filename, remap_debug_filename): Implement in term of
67 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
68 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
69 * dbxout.c: Include file-prefix-map.h.
71 * vmsdbgout.c: Likewise.
72 * xcoffout.c: Likewise.
73 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
74 * doc/cppopts.texi (-fmacro-prefix-map): Document.
75 * doc/invoke.texi (-ffile-prefix-map): Document.
76 (-fdebug-prefix-map): Update description.
78 2018-01-18 Martin Liska <mliska@suse.cz>
80 * config/i386/i386.c (indirect_thunk_name): Document that also
82 (output_indirect_thunk): Document why both instructions
83 (pause and lfence) are generated.
85 2018-01-18 Richard Biener <rguenther@suse.de>
87 PR tree-optimization/83887
88 * graphite-scop-detection.c
89 (scop_detection::get_nearest_dom_with_single_entry): Remove.
90 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
91 (scop_detection::merge_sese): Re-implement with a flood-fill
92 algorithm that properly finds a SESE region if it exists.
94 2018-01-18 Jakub Jelinek <jakub@redhat.com>
97 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
98 pointer_diff optimizations use view_convert instead of convert.
100 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
102 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
103 Generate different code for -mno-speculate-indirect-jumps.
104 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
105 (*call_indirect_aix<mode>): Disable for
106 -mno-speculate-indirect-jumps.
107 (*call_indirect_aix<mode>_nospec): New define_insn.
108 (*call_value_indirect_aix<mode>): Disable for
109 -mno-speculate-indirect-jumps.
110 (*call_value_indirect_aix<mode>_nospec): New define_insn.
111 (*sibcall_nonlocal_sysv<mode>): Generate different code for
112 -mno-speculate-indirect-jumps.
113 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
115 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
117 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
118 long double type, set the flags for noting the default long double
119 type, even if we don't pass or return a long double type.
121 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
124 * ipa-inline.c (flatten_function): Do not overwrite final inlining
127 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
129 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
130 support for merge[hl].
131 (fold_mergehl_helper): New helper function.
132 (tree-vector-builder.h): New #include for tree_vector_builder usage.
133 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
134 (altivec_vmrglw_direct): Add xxmrglw insn.
136 2018-01-17 Andrew Waterman <andrew@sifive.com>
138 * config/riscv/riscv.c (riscv_conditional_register_usage): If
139 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
141 2018-01-17 David Malcolm <dmalcolm@redhat.com>
144 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
145 call the lto_location_cache before reading the
146 DECL_SOURCE_LOCATION of the types.
148 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
149 Richard Sandiford <richard.sandiford@linaro.org>
151 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
152 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
153 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
154 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
155 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
157 * config/aarch64/constraints.md (aarch64_movti_operand):
159 * config/aarch64/predicates.md (Uti): Add new constraint.
161 2018-01-17 Carl Love <cel@us.ibm.com>
162 * config/rs6000/vsx.md (define_expand xl_len_r,
163 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
164 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
166 (define_expand, define_insn): Move the shift left from the
167 define_insn to the define_expand for lxvl and stxvl instructions.
168 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
169 and XL_LEN_R definitions to PURE.
171 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
173 * config/i386/i386.c (indirect_thunk_name): Declare regno
174 as unsigned int. Compare regno with INVALID_REGNUM.
175 (output_indirect_thunk): Ditto.
176 (output_indirect_thunk_function): Ditto.
177 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
178 in the call to output_indirect_thunk_function.
180 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
183 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
184 rather than the size of inner_type to determine the stack slot size
185 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
187 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
190 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
193 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
195 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
196 endian Linux systems to optionally enable multilibs for selecting
197 the long double type if the user configured an explicit type.
198 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
199 have no long double multilibs if not defined.
200 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
201 warn if the user used -mabi={ieee,ibm}longdouble and we built
202 multilibs for long double.
203 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
204 appropriate multilib option.
205 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
207 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
208 for building long double multilibs.
209 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
211 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
213 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
216 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
218 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
221 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
224 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
227 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
229 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
230 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
232 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
234 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
235 different rtl trees depending on TARGET_64BIT.
236 (rs6000_gen_lvx): Likewise.
238 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
240 * config/visium/visium.md (nop): Tweak comment.
241 (hazard_nop): Likewise.
243 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
245 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
246 -mspeculate-indirect-jumps.
247 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
248 for -mno-speculate-indirect-jumps.
249 (*call_indirect_elfv2<mode>_nospec): New define_insn.
250 (*call_value_indirect_elfv2<mode>): Disable for
251 -mno-speculate-indirect-jumps.
252 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
253 (indirect_jump): Emit different RTL for
254 -mno-speculate-indirect-jumps.
255 (*indirect_jump<mode>): Disable for
256 -mno-speculate-indirect-jumps.
257 (*indirect_jump<mode>_nospec): New define_insn.
258 (tablejump): Emit different RTL for
259 -mno-speculate-indirect-jumps.
260 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
261 (tablejumpsi_nospec): New define_expand.
262 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
263 (tablejumpdi_nospec): New define_expand.
264 (*tablejump<mode>_internal1): Disable for
265 -mno-speculate-indirect-jumps.
266 (*tablejump<mode>_internal1_nospec): New define_insn.
267 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
270 2018-01-16 Artyom Skrobov tyomitch@gmail.com
272 * caller-save.c (insert_save): Drop unnecessary parameter. All
275 2018-01-16 Jakub Jelinek <jakub@redhat.com>
276 Richard Biener <rguenth@suse.de>
279 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
280 return early, inline manually is_gimple_sizepos. Make sure if we
281 call gimplify_expr we don't end up with a gimple constant.
282 * tree.c (variably_modified_type_p): Don't return true for
283 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
284 * gimplify.h (is_gimple_sizepos): Remove.
286 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
288 PR tree-optimization/83857
289 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
290 vectorizable_live_operation for pure SLP statements.
291 (vectorizable_live_operation): Handle PHIs.
293 2018-01-16 Richard Biener <rguenther@suse.de>
295 PR tree-optimization/83867
296 * tree-vect-stmts.c (vect_transform_stmt): Precompute
297 nested_in_vect_loop_p since the scalar stmt may get invalidated.
299 2018-01-16 Jakub Jelinek <jakub@redhat.com>
302 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
303 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
304 If off is not INTEGER_CST, issue a may not be aligned warning
305 rather than isn't aligned. Use isn%'t rather than isn't.
306 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
308 <case MULT_EXPR>: Improve the case when bottom and one of the
309 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
310 operand, in that case check if the other operand is multiple of
311 bottom divided by the INTEGER_CST operand.
313 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
316 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
317 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
318 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
319 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
320 * config/pa/pa.c (pa_function_arg_advance): Likewise.
321 (pa_function_arg, pa_arg_partial_bytes): Likewise.
322 (pa_function_arg_size): New function.
324 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
326 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
327 in a separate statement.
329 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
331 PR tree-optimization/83847
332 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
333 group gathers and scatters.
335 2018-01-16 Jakub Jelinek <jakub@redhat.com>
337 PR rtl-optimization/86620
338 * params.def (max-sched-ready-insns): Bump minimum value to 1.
340 PR rtl-optimization/83213
341 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
342 to last if both are JUMP_INSNs.
344 PR tree-optimization/83843
345 * gimple-ssa-store-merging.c
346 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
347 store_immediate_info for bswap/nop orig_stores.
349 2018-01-15 Andrew Waterman <andrew@sifive.com>
351 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
353 <UDIV>: Increase cost if !TARGET_DIV.
355 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
357 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
358 (define_attr "cr_logical_3op"): New.
359 (cceq_ior_compare): Adjust.
360 (cceq_ior_compare_complement): Adjust.
361 (*cceq_rev_compare): Adjust.
362 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
363 (is_cracked_insn): Adjust.
364 (insn_must_be_first_in_group): Adjust.
365 * config/rs6000/40x.md: Adjust.
366 * config/rs6000/440.md: Adjust.
367 * config/rs6000/476.md: Adjust.
368 * config/rs6000/601.md: Adjust.
369 * config/rs6000/603.md: Adjust.
370 * config/rs6000/6xx.md: Adjust.
371 * config/rs6000/7450.md: Adjust.
372 * config/rs6000/7xx.md: Adjust.
373 * config/rs6000/8540.md: Adjust.
374 * config/rs6000/cell.md: Adjust.
375 * config/rs6000/e300c2c3.md: Adjust.
376 * config/rs6000/e500mc.md: Adjust.
377 * config/rs6000/e500mc64.md: Adjust.
378 * config/rs6000/e5500.md: Adjust.
379 * config/rs6000/e6500.md: Adjust.
380 * config/rs6000/mpc.md: Adjust.
381 * config/rs6000/power4.md: Adjust.
382 * config/rs6000/power5.md: Adjust.
383 * config/rs6000/power6.md: Adjust.
384 * config/rs6000/power7.md: Adjust.
385 * config/rs6000/power8.md: Adjust.
386 * config/rs6000/power9.md: Adjust.
387 * config/rs6000/rs64.md: Adjust.
388 * config/rs6000/titan.md: Adjust.
390 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
392 * config/i386/predicates.md (indirect_branch_operand): Rewrite
393 ix86_indirect_branch_register logic.
395 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
397 * config/i386/constraints.md (Bs): Update
398 ix86_indirect_branch_register check. Don't check
399 ix86_indirect_branch_register with GOT_memory_operand.
401 * config/i386/predicates.md (GOT_memory_operand): Don't check
402 ix86_indirect_branch_register here.
403 (GOT32_symbol_operand): Likewise.
405 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
407 * config/i386/predicates.md (constant_call_address_operand):
408 Rewrite ix86_indirect_branch_register logic.
409 (sibcall_insn_operand): Likewise.
411 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
413 * config/i386/constraints.md (Bs): Replace
414 ix86_indirect_branch_thunk_register with
415 ix86_indirect_branch_register.
417 * config/i386/i386.md (indirect_jump): Likewise.
418 (tablejump): Likewise.
419 (*sibcall_memory): Likewise.
420 (*sibcall_value_memory): Likewise.
421 Peepholes of indirect call and jump via memory: Likewise.
422 * config/i386/i386.opt: Likewise.
423 * config/i386/predicates.md (indirect_branch_operand): Likewise.
424 (GOT_memory_operand): Likewise.
425 (call_insn_operand): Likewise.
426 (sibcall_insn_operand): Likewise.
427 (GOT32_symbol_operand): Likewise.
429 2018-01-15 Jakub Jelinek <jakub@redhat.com>
432 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
433 type rather than type addr's type points to.
434 (expand_omp_atomic_mutex): Likewise.
435 (expand_omp_atomic): Likewise.
437 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
440 * config/i386/i386.c (output_indirect_thunk_function): Use
441 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
442 for __x86_return_thunk.
444 2018-01-15 Richard Biener <rguenther@suse.de>
447 * expmed.c (extract_bit_field_1): Fix typo.
449 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
452 * config/arm/iterators.md (VF): New mode iterator.
453 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
454 Remove integer-related logic from pattern.
455 (neon_vabd<mode>_3): Likewise.
457 2018-01-15 Jakub Jelinek <jakub@redhat.com>
460 * common.opt (fstrict-overflow): No longer an alias.
461 (fwrapv-pointer): New option.
462 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
463 also for pointer types based on flag_wrapv_pointer.
464 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
465 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
466 opts->x_flag_wrapv got set.
467 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
468 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
469 POINTER_TYPE_OVERFLOW_UNDEFINED.
470 * match.pd: Likewise in address comparison pattern.
471 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
473 2018-01-15 Richard Biener <rguenther@suse.de>
476 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
477 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
478 Reset type names to their identifier if their TYPE_DECL doesn't
479 have linkage (and thus is used for ODR and devirt).
480 (save_debug_info_for_decl): Remove.
481 (save_debug_info_for_type): Likewise.
482 (add_tree_to_fld_list): Adjust.
483 * tree-pretty-print.c (dump_generic_node): Make dumping of
484 type names more robust.
486 2018-01-15 Richard Biener <rguenther@suse.de>
488 * BASE-VER: Bump to 8.0.1.
490 2018-01-14 Martin Sebor <msebor@redhat.com>
493 * builtins.c (check_access): Avoid warning when the no-warning bit
496 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
498 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
499 * ira-color (allocno_hard_regs_compare): Likewise.
501 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
504 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
505 Use .pushsection/.popsection.
507 2018-01-14 Martin Sebor <msebor@redhat.com>
510 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
512 2018-01-14 Jakub Jelinek <jakub@redhat.com>
514 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
515 entry from extra_headers.
516 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
517 extra_headers, make the list bitwise identical to the i?86-*-* one.
519 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
521 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
522 -mcmodel=large with -mindirect-branch=thunk,
523 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
524 -mfunction-return=thunk-extern.
525 * doc/invoke.texi: Document -mcmodel=large is incompatible with
526 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
527 -mfunction-return=thunk and -mfunction-return=thunk-extern.
529 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
531 * config/i386/i386.c (print_reg): Print the name of the full
532 integer register without '%'.
533 (ix86_print_operand): Handle 'V'.
534 * doc/extend.texi: Document 'V' modifier.
536 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
538 * config/i386/constraints.md (Bs): Disallow memory operand for
539 -mindirect-branch-register.
541 * config/i386/predicates.md (indirect_branch_operand): Likewise.
542 (GOT_memory_operand): Likewise.
543 (call_insn_operand): Likewise.
544 (sibcall_insn_operand): Likewise.
545 (GOT32_symbol_operand): Likewise.
546 * config/i386/i386.md (indirect_jump): Call convert_memory_address
547 for -mindirect-branch-register.
548 (tablejump): Likewise.
549 (*sibcall_memory): Likewise.
550 (*sibcall_value_memory): Likewise.
551 Disallow peepholes of indirect call and jump via memory for
552 -mindirect-branch-register.
553 (*call_pop): Replace m with Bw.
554 (*call_value_pop): Likewise.
555 (*sibcall_pop_memory): Replace m with Bs.
556 * config/i386/i386.opt (mindirect-branch-register): New option.
557 * doc/invoke.texi: Document -mindirect-branch-register option.
559 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
561 * config/i386/i386-protos.h (ix86_output_function_return): New.
562 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
563 set function_return_type.
564 (indirect_thunk_name): Add ret_p to indicate thunk for function
566 (output_indirect_thunk_function): Pass false to
568 (ix86_output_indirect_branch_via_reg): Likewise.
569 (ix86_output_indirect_branch_via_push): Likewise.
570 (output_indirect_thunk_function): Create alias for function
571 return thunk if regno < 0.
572 (ix86_output_function_return): New function.
573 (ix86_handle_fndecl_attribute): Handle function_return.
574 (ix86_attribute_table): Add function_return.
575 * config/i386/i386.h (machine_function): Add
576 function_return_type.
577 * config/i386/i386.md (simple_return_internal): Use
578 ix86_output_function_return.
579 (simple_return_internal_long): Likewise.
580 * config/i386/i386.opt (mfunction-return=): New option.
581 (indirect_branch): Mention -mfunction-return=.
582 * doc/extend.texi: Document function_return function attribute.
583 * doc/invoke.texi: Document -mfunction-return= option.
585 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
587 * config/i386/i386-opts.h (indirect_branch): New.
588 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
589 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
590 with local indirect jump when converting indirect call and jump.
591 (ix86_set_indirect_branch_type): New.
592 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
593 (indirectlabelno): New.
594 (indirect_thunk_needed): Likewise.
595 (indirect_thunk_bnd_needed): Likewise.
596 (indirect_thunks_used): Likewise.
597 (indirect_thunks_bnd_used): Likewise.
598 (INDIRECT_LABEL): Likewise.
599 (indirect_thunk_name): Likewise.
600 (output_indirect_thunk): Likewise.
601 (output_indirect_thunk_function): Likewise.
602 (ix86_output_indirect_branch_via_reg): Likewise.
603 (ix86_output_indirect_branch_via_push): Likewise.
604 (ix86_output_indirect_branch): Likewise.
605 (ix86_output_indirect_jmp): Likewise.
606 (ix86_code_end): Call output_indirect_thunk_function if needed.
607 (ix86_output_call_insn): Call ix86_output_indirect_branch if
609 (ix86_handle_fndecl_attribute): Handle indirect_branch.
610 (ix86_attribute_table): Add indirect_branch.
611 * config/i386/i386.h (machine_function): Add indirect_branch_type
612 and has_local_indirect_jump.
613 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
615 (tablejump): Likewise.
616 (*indirect_jump): Use ix86_output_indirect_jmp.
617 (*tablejump_1): Likewise.
618 (simple_return_indirect_internal): Likewise.
619 * config/i386/i386.opt (mindirect-branch=): New option.
620 (indirect_branch): New.
623 (thunk-inline): Likewise.
624 (thunk-extern): Likewise.
625 * doc/extend.texi: Document indirect_branch function attribute.
626 * doc/invoke.texi: Document -mindirect-branch= option.
628 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
631 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
633 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
635 * ipa-inline.c (want_inline_small_function_p): Return false if
636 inlining has already failed with CIF_FINAL_ERROR.
637 (update_caller_keys): Call want_inline_small_function_p before
639 (update_callee_keys): Likewise.
641 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
643 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
645 (rs6000_quadword_masked_address_p): Likewise.
646 (quad_aligned_load_p): Likewise.
647 (quad_aligned_store_p): Likewise.
648 (const_load_sequence_p): Add comment to describe the outer-most loop.
649 (mimic_memory_attributes_and_flags): New function.
650 (rs6000_gen_stvx): Likewise.
651 (replace_swapped_aligned_store): Likewise.
652 (rs6000_gen_lvx): Likewise.
653 (replace_swapped_aligned_load): Likewise.
654 (replace_swapped_load_constant): Capitalize argument name in
655 comment describing this function.
656 (rs6000_analyze_swaps): Add a third pass to search for vector loads
657 and stores that access quad-word aligned addresses and replace
658 with stvx or lvx instructions when appropriate.
659 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
660 New function prototype.
661 (rs6000_quadword_masked_address_p): Likewise.
662 (rs6000_gen_lvx): Likewise.
663 (rs6000_gen_stvx): Likewise.
664 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
665 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
666 when memory address is aligned.
667 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
668 this split to select lvx instruction when memory address is aligned.
669 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
670 instruction when memory address is aligned.
671 (*vsx_le_perm_load_v16qi): Likewise.
672 (four unnamed splitters): Modify to select the stvx instruction
673 when memory is aligned.
675 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
677 * predict.c (determine_unlikely_bbs): Handle correctly BBs
678 which appears in the queue multiple times.
680 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
681 Alan Hayward <alan.hayward@arm.com>
682 David Sherwood <david.sherwood@arm.com>
684 * tree-vectorizer.h (vec_lower_bound): New structure.
685 (_loop_vec_info): Add check_nonzero and lower_bounds.
686 (LOOP_VINFO_CHECK_NONZERO): New macro.
687 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
688 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
689 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
690 fields. Make seg_len the distance travelled, not including the
692 (dr_direction_indicator): Declare.
693 (dr_zero_step_indicator): Likewise.
694 (dr_known_forward_stride_p): Likewise.
695 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
697 (runtime_alias_check_p): Allow runtime alias checks with
699 (operator ==): Compare access_size and align.
700 (prune_runtime_alias_test_list): Rework for new distinction between
701 the access_size and seg_len.
702 (create_intersect_range_checks_index): Likewise. Cope with polynomial
704 (get_segment_min_max): New function.
705 (create_intersect_range_checks): Use it.
706 (dr_step_indicator): New function.
707 (dr_direction_indicator): Likewise.
708 (dr_zero_step_indicator): Likewise.
709 (dr_known_forward_stride_p): Likewise.
710 * tree-loop-distribution.c (data_ref_segment_size): Return
711 DR_STEP * (niters - 1).
712 (compute_alias_check_pairs): Update call to the dr_with_seg_len
714 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
715 (vect_preserves_scalar_order_p): New function, split out from...
716 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
717 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
718 (vect_vfa_access_size): New function.
719 (vect_vfa_align): Likewise.
720 (vect_compile_time_alias): Take access_size_a and access_b arguments.
721 (dump_lower_bound): New function.
722 (vect_check_lower_bound): Likewise.
723 (vect_small_gap_p): Likewise.
724 (vectorizable_with_step_bound_p): Likewise.
725 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
726 depencies if the vectorization factor is 1. Convert the checks
727 for nonzero steps into checks on the bounds of DR_STEP. Try using
728 a bunds check for variable steps if the minimum required step is
729 relatively small. Update calls to the dr_with_seg_len
730 constructor and to vect_compile_time_alias.
731 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
733 (vect_loop_versioning): Call it.
734 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
736 (vect_estimate_min_profitable_iters): Account for any bounds checks.
738 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
739 Alan Hayward <alan.hayward@arm.com>
740 David Sherwood <david.sherwood@arm.com>
742 * doc/sourcebuild.texi (vect_scatter_store): Document.
743 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
745 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
747 * genopinit.c (main): Add supports_vec_scatter_store and
748 supports_vec_scatter_store_cached to target_optabs.
749 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
750 IFN_MASK_SCATTER_STORE.
751 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
753 * internal-fn.h (internal_store_fn_p): Declare.
754 (internal_fn_stored_value_index): Likewise.
755 * internal-fn.c (scatter_store_direct): New macro.
756 (expand_scatter_store_optab_fn): New function.
757 (direct_scatter_store_optab_supported_p): New macro.
758 (internal_store_fn_p): New function.
759 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
760 IFN_MASK_SCATTER_STORE.
761 (internal_fn_mask_index): Likewise.
762 (internal_fn_stored_value_index): New function.
763 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
765 * optabs-query.h (supports_vec_scatter_store_p): Declare.
766 * optabs-query.c (supports_vec_scatter_store_p): New function.
767 * tree-vectorizer.h (vect_get_store_rhs): Declare.
768 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
769 true for scatter stores.
770 (vect_gather_scatter_fn_p): Handle scatter stores too.
771 (vect_check_gather_scatter): Consider using scatter stores if
772 supports_vec_scatter_store_p.
773 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
775 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
776 internal_fn_stored_value_index.
777 (check_load_store_masking): Handle scatter stores too.
778 (vect_get_store_rhs): Make public.
779 (vectorizable_call): Use internal_store_fn_p.
780 (vectorizable_store): Handle scatter store internal functions.
781 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
782 when deciding whether the end of the group has been reached.
783 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
784 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
785 (mask_scatter_store<mode>): New insns.
787 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
788 Alan Hayward <alan.hayward@arm.com>
789 David Sherwood <david.sherwood@arm.com>
791 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
792 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
793 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
795 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
796 Use vect_truncate_gather_scatter_offset if we can't treat the
797 operation as a normal gather load or scatter store.
798 (get_group_load_store_type): Take the gather_scatter_info
799 as argument. Try using a gather load or scatter store for
800 single-element groups.
801 (get_load_store_type): Update calls to get_group_load_store_type
802 and vect_use_strided_gather_scatters_p.
804 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
805 Alan Hayward <alan.hayward@arm.com>
806 David Sherwood <david.sherwood@arm.com>
808 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
809 optional tree argument.
810 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
812 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
813 but continue to use the current value as a fallback.
814 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
815 to compare the updates.
816 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
817 (get_load_store_type): Use it when handling a strided access.
818 (vect_get_strided_load_store_ops): New function.
819 (vect_get_data_ptr_increment): Likewise.
820 (vectorizable_load): Handle strided gather loads. Always pass
821 a step to vect_create_data_ref_ptr and bump_vector_ptr.
823 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
824 Alan Hayward <alan.hayward@arm.com>
825 David Sherwood <david.sherwood@arm.com>
827 * doc/md.texi (gather_load@var{m}): Document.
828 (mask_gather_load@var{m}): Likewise.
829 * genopinit.c (main): Add supports_vec_gather_load and
830 supports_vec_gather_load_cached to target_optabs.
831 * optabs-tree.c (init_tree_optimization_optabs): Use
832 ggc_cleared_alloc to allocate target_optabs.
833 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
834 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
836 * internal-fn.h (internal_load_fn_p): Declare.
837 (internal_gather_scatter_fn_p): Likewise.
838 (internal_fn_mask_index): Likewise.
839 (internal_gather_scatter_fn_supported_p): Likewise.
840 * internal-fn.c (gather_load_direct): New macro.
841 (expand_gather_load_optab_fn): New function.
842 (direct_gather_load_optab_supported_p): New macro.
843 (direct_internal_fn_optab): New function.
844 (internal_load_fn_p): Likewise.
845 (internal_gather_scatter_fn_p): Likewise.
846 (internal_fn_mask_index): Likewise.
847 (internal_gather_scatter_fn_supported_p): Likewise.
848 * optabs-query.c (supports_at_least_one_mode_p): New function.
849 (supports_vec_gather_load_p): Likewise.
850 * optabs-query.h (supports_vec_gather_load_p): Declare.
851 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
852 and memory_type field.
853 (NUM_PATTERNS): Bump to 15.
854 * tree-vect-data-refs.c: Include internal-fn.h.
855 (vect_gather_scatter_fn_p): New function.
856 (vect_describe_gather_scatter_call): Likewise.
857 (vect_check_gather_scatter): Try using internal functions for
858 gather loads. Recognize existing calls to a gather load function.
859 (vect_analyze_data_refs): Consider using gather loads if
860 supports_vec_gather_load_p.
861 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
862 (vect_get_gather_scatter_offset_type): Likewise.
863 (vect_convert_mask_for_vectype): Likewise.
864 (vect_add_conversion_to_patterm): Likewise.
865 (vect_try_gather_scatter_pattern): Likewise.
866 (vect_recog_gather_scatter_pattern): New pattern recognizer.
867 (vect_vect_recog_func_ptrs): Add it.
868 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
869 internal_fn_mask_index and internal_gather_scatter_fn_p.
870 (check_load_store_masking): Take the gather_scatter_info as an
871 argument and handle gather loads.
872 (vect_get_gather_scatter_ops): New function.
873 (vectorizable_call): Check internal_load_fn_p.
874 (vectorizable_load): Likewise. Handle gather load internal
876 (vectorizable_store): Update call to check_load_store_masking.
877 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
878 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
879 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
880 (aarch64_gather_scale_operand_d): New predicates.
881 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
882 (mask_gather_load<mode>): New insns.
884 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
885 Alan Hayward <alan.hayward@arm.com>
886 David Sherwood <david.sherwood@arm.com>
888 * optabs.def (fold_left_plus_optab): New optab.
889 * doc/md.texi (fold_left_plus_@var{m}): Document.
890 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
891 * internal-fn.c (fold_left_direct): Define.
892 (expand_fold_left_optab_fn): Likewise.
893 (direct_fold_left_optab_supported_p): Likewise.
894 * fold-const-call.c (fold_const_fold_left): New function.
895 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
896 * tree-parloops.c (valid_reduction_p): New function.
897 (gather_scalar_reductions): Use it.
898 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
899 (vect_finish_replace_stmt): Declare.
900 * tree-vect-loop.c (fold_left_reduction_fn): New function.
901 (needs_fold_left_reduction_p): New function, split out from...
902 (vect_is_simple_reduction): ...here. Accept reductions that
903 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
904 (vect_force_simple_reduction): Also store the reduction type in
905 the assignment's STMT_VINFO_REDUC_TYPE.
906 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
907 (merge_with_identity): New function.
908 (vect_expand_fold_left): Likewise.
909 (vectorize_fold_left_reduction): Likewise.
910 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
911 scalar phi in place for it. Check for target support and reject
912 cases that would reassociate the operation. Defer the transform
913 phase to vectorize_fold_left_reduction.
914 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
915 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
916 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
918 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
920 * tree-if-conv.c (predicate_mem_writes): Remove redundant
921 call to ifc_temp_var.
923 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
924 Alan Hayward <alan.hayward@arm.com>
925 David Sherwood <david.sherwood@arm.com>
927 * target.def (legitimize_address_displacement): Take the original
928 offset as a poly_int.
929 * targhooks.h (default_legitimize_address_displacement): Update
931 * targhooks.c (default_legitimize_address_displacement): Likewise.
932 * doc/tm.texi: Regenerate.
933 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
934 as an argument, moving assert of ad->disp == ad->disp_term to...
935 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
936 Try calling targetm.legitimize_address_displacement before expanding
937 the address rather than afterwards, and adjust for the new interface.
938 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
939 Match the new hook interface. Handle SVE addresses.
940 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
943 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
945 * Makefile.in (OBJS): Add early-remat.o.
946 * target.def (select_early_remat_modes): New hook.
947 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
948 * doc/tm.texi: Regenerate.
949 * targhooks.h (default_select_early_remat_modes): Declare.
950 * targhooks.c (default_select_early_remat_modes): New function.
951 * timevar.def (TV_EARLY_REMAT): New timevar.
952 * passes.def (pass_early_remat): New pass.
953 * tree-pass.h (make_pass_early_remat): Declare.
954 * early-remat.c: New file.
955 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
957 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
959 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
960 Alan Hayward <alan.hayward@arm.com>
961 David Sherwood <david.sherwood@arm.com>
963 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
964 vfm1 with a bound_epilog parameter.
965 (vect_do_peeling): Update calls accordingly, and move the prologue
966 call earlier in the function. Treat the base bound_epilog as 0 for
967 fully-masked loops and retain vf - 1 for other loops. Add 1 to
968 this base when peeling for gaps.
969 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
970 with fully-masked loops.
971 (vect_estimate_min_profitable_iters): Handle the single peeled
972 iteration in that case.
974 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
975 Alan Hayward <alan.hayward@arm.com>
976 David Sherwood <david.sherwood@arm.com>
978 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
979 single-element interleaving even if the size is not a power of 2.
980 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
981 accesses for single-element interleaving if the group size is
984 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
985 Alan Hayward <alan.hayward@arm.com>
986 David Sherwood <david.sherwood@arm.com>
988 * doc/md.texi (fold_extract_last_@var{m}): Document.
989 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
990 * optabs.def (fold_extract_last_optab): New optab.
991 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
992 * internal-fn.c (fold_extract_direct): New macro.
993 (expand_fold_extract_optab_fn): Likewise.
994 (direct_fold_extract_optab_supported_p): Likewise.
995 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
996 * tree-vect-loop.c (vect_model_reduction_cost): Handle
997 EXTRACT_LAST_REDUCTION.
998 (get_initial_def_for_reduction): Do not create an initial vector
999 for EXTRACT_LAST_REDUCTION reductions.
1000 (vectorizable_reduction): Leave the scalar phi in place for
1001 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
1002 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
1003 epilogue code for EXTRACT_LAST_REDUCTION and defer the
1004 transform phase to vectorizable_condition.
1005 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1007 (vect_finish_stmt_generation): ...here.
1008 (vect_finish_replace_stmt): New function.
1009 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1010 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1012 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1014 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1015 Alan Hayward <alan.hayward@arm.com>
1016 David Sherwood <david.sherwood@arm.com>
1018 * doc/md.texi (extract_last_@var{m}): Document.
1019 * optabs.def (extract_last_optab): New optab.
1020 * internal-fn.def (EXTRACT_LAST): New internal function.
1021 * internal-fn.c (cond_unary_direct): New macro.
1022 (expand_cond_unary_optab_fn): Likewise.
1023 (direct_cond_unary_optab_supported_p): Likewise.
1024 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1025 loops using EXTRACT_LAST.
1026 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1027 (extract_last_<mode>): ...this optab.
1028 (vec_extract<mode><Vel>): Update accordingly.
1030 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1031 Alan Hayward <alan.hayward@arm.com>
1032 David Sherwood <david.sherwood@arm.com>
1034 * target.def (empty_mask_is_expensive): New hook.
1035 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1036 * doc/tm.texi: Regenerate.
1037 * targhooks.h (default_empty_mask_is_expensive): Declare.
1038 * targhooks.c (default_empty_mask_is_expensive): New function.
1039 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1040 if the target says that empty masks are expensive.
1041 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1043 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1045 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1046 Alan Hayward <alan.hayward@arm.com>
1047 David Sherwood <david.sherwood@arm.com>
1049 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1050 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1051 (vect_use_loop_mask_for_alignment_p): New function.
1052 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1053 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1054 niters_skip argument. Make sure that the first niters_skip elements
1055 of the first iteration are inactive.
1056 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1057 Update call to vect_set_loop_masks_directly.
1058 (get_misalign_in_elems): New function, split out from...
1059 (vect_gen_prolog_loop_niters): ...here.
1060 (vect_update_init_of_dr): Take a code argument that specifies whether
1061 the adjustment should be added or subtracted.
1062 (vect_update_init_of_drs): Likewise.
1063 (vect_prepare_for_masked_peels): New function.
1064 (vect_do_peeling): Skip prologue peeling if we're using a mask
1065 instead. Update call to vect_update_inits_of_drs.
1066 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1068 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1069 alignment. Do not include the number of peeled iterations in
1070 the minimum threshold in that case.
1071 (vectorizable_induction): Adjust the start value down by
1072 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1073 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1074 Take the number of skipped iterations into account when calculating
1076 * tree-vect-stmts.c (vect_gen_while_not): New function.
1078 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1079 Alan Hayward <alan.hayward@arm.com>
1080 David Sherwood <david.sherwood@arm.com>
1082 * doc/sourcebuild.texi (vect_fully_masked): Document.
1083 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1085 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1087 (vect_analyze_loop_2): ...here. Don't check the vectorization
1088 factor against the number of loop iterations if the loop is
1091 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1092 Alan Hayward <alan.hayward@arm.com>
1093 David Sherwood <david.sherwood@arm.com>
1095 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1096 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1097 (dump_groups): Update accordingly.
1098 (iv_use::mem_type): New member variable.
1099 (address_p): New function.
1100 (record_use): Add a mem_type argument and initialize the new
1102 (record_group_use): Add a mem_type argument. Use address_p.
1103 Remove obsolete null checks of base_object. Update call to record_use.
1104 (find_interesting_uses_op): Update call to record_group_use.
1105 (find_interesting_uses_cond): Likewise.
1106 (find_interesting_uses_address): Likewise.
1107 (get_mem_type_for_internal_fn): New function.
1108 (find_address_like_use): Likewise.
1109 (find_interesting_uses_stmt): Try find_address_like_use before
1110 calling find_interesting_uses_op.
1111 (addr_offset_valid_p): Use the iv mem_type field as the type
1112 of the addressed memory.
1113 (add_autoinc_candidates): Likewise.
1114 (get_address_cost): Likewise.
1115 (split_small_address_groups_p): Use address_p.
1116 (split_address_groups): Likewise.
1117 (add_iv_candidate_for_use): Likewise.
1118 (autoinc_possible_for_pair): Likewise.
1119 (rewrite_groups): Likewise.
1120 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1121 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1122 (get_alias_ptr_type_for_ptr_address): New function.
1123 (rewrite_use_address): Rewrite address uses in calls that were
1124 identified by find_address_like_use.
1126 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1127 Alan Hayward <alan.hayward@arm.com>
1128 David Sherwood <david.sherwood@arm.com>
1130 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1132 * gimple-expr.h (is_gimple_addressable: Likewise.
1133 * gimple-expr.c (is_gimple_address): Likewise.
1134 * internal-fn.c (expand_call_mem_ref): New function.
1135 (expand_mask_load_optab_fn): Use it.
1136 (expand_mask_store_optab_fn): Likewise.
1138 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1139 Alan Hayward <alan.hayward@arm.com>
1140 David Sherwood <david.sherwood@arm.com>
1142 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1143 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1144 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1145 (cond_umax@var{mode}): Document.
1146 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1147 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1148 (cond_umin_optab, cond_umax_optab): New optabs.
1149 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1150 (COND_IOR, COND_XOR): New internal functions.
1151 * internal-fn.h (get_conditional_internal_fn): Declare.
1152 * internal-fn.c (cond_binary_direct): New macro.
1153 (expand_cond_binary_optab_fn): Likewise.
1154 (direct_cond_binary_optab_supported_p): Likewise.
1155 (get_conditional_internal_fn): New function.
1156 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1157 Cope with reduction statements that are vectorized as calls rather
1159 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1160 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1161 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1162 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1163 (UNSPEC_COND_EOR): New unspecs.
1164 (optab): Add mappings for them.
1165 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1166 (sve_int_op, sve_fp_op): New int attributes.
1168 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1169 Alan Hayward <alan.hayward@arm.com>
1170 David Sherwood <david.sherwood@arm.com>
1172 * optabs.def (while_ult_optab): New optab.
1173 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1174 * internal-fn.def (WHILE_ULT): New internal function.
1175 * internal-fn.h (direct_internal_fn_supported_p): New override
1176 that takes two types as argument.
1177 * internal-fn.c (while_direct): New macro.
1178 (expand_while_optab_fn): New function.
1179 (convert_optab_supported_p): Likewise.
1180 (direct_while_optab_supported_p): New macro.
1181 * wide-int.h (wi::udiv_ceil): New function.
1182 * tree-vectorizer.h (rgroup_masks): New structure.
1183 (vec_loop_masks): New typedef.
1184 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1186 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1187 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1188 (vect_max_vf): New function.
1189 (slpeel_make_loop_iterate_ntimes): Delete.
1190 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1191 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1192 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1193 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1194 internal-fn.h, stor-layout.h and optabs-query.h.
1195 (vect_set_loop_mask): New function.
1196 (add_preheader_seq): Likewise.
1197 (add_header_seq): Likewise.
1198 (interleave_supported_p): Likewise.
1199 (vect_maybe_permute_loop_masks): Likewise.
1200 (vect_set_loop_masks_directly): Likewise.
1201 (vect_set_loop_condition_masked): Likewise.
1202 (vect_set_loop_condition_unmasked): New function, split out from
1203 slpeel_make_loop_iterate_ntimes.
1204 (slpeel_make_loop_iterate_ntimes): Rename to..
1205 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1206 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1207 (vect_do_peeling): Update call accordingly.
1208 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1210 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1211 mask_compare_type, can_fully_mask_p and fully_masked_p.
1212 (release_vec_loop_masks): New function.
1213 (_loop_vec_info): Use it to free the loop masks.
1214 (can_produce_all_loop_masks_p): New function.
1215 (vect_get_max_nscalars_per_iter): Likewise.
1216 (vect_verify_full_masking): Likewise.
1217 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1218 retries, and free the mask rgroups before retrying. Check loop-wide
1219 reasons for disallowing fully-masked loops. Make the final decision
1220 about whether use a fully-masked loop or not.
1221 (vect_estimate_min_profitable_iters): Do not assume that peeling
1222 for the number of iterations will be needed for fully-masked loops.
1223 (vectorizable_reduction): Disable fully-masked loops.
1224 (vectorizable_live_operation): Likewise.
1225 (vect_halve_mask_nunits): New function.
1226 (vect_double_mask_nunits): Likewise.
1227 (vect_record_loop_mask): Likewise.
1228 (vect_get_loop_mask): Likewise.
1229 (vect_transform_loop): Handle the case in which the final loop
1230 iteration might handle a partial vector. Call vect_set_loop_condition
1231 instead of slpeel_make_loop_iterate_ntimes.
1232 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1233 (check_load_store_masking): New function.
1234 (prepare_load_store_mask): Likewise.
1235 (vectorizable_store): Handle fully-masked loops.
1236 (vectorizable_load): Likewise.
1237 (supportable_widening_operation): Use vect_halve_mask_nunits for
1239 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1240 (vect_gen_while): New function.
1241 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1242 (aarch64_uqdec<mode>): New insn.
1244 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1245 Alan Hayward <alan.hayward@arm.com>
1246 David Sherwood <david.sherwood@arm.com>
1248 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1249 (reduc_xor_scal_optab): New optabs.
1250 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1251 (reduc_xor_scal_@var{m}): Document.
1252 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1253 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1255 * fold-const-call.c (fold_const_call): Handle them.
1256 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1257 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1258 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1259 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1260 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1261 (UNSPEC_XORV): New unspecs.
1262 (optab): Add entries for them.
1263 (BITWISEV): New int iterator.
1264 (bit_reduc_op): New int attributes.
1266 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1267 Alan Hayward <alan.hayward@arm.com>
1268 David Sherwood <david.sherwood@arm.com>
1270 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1271 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1272 * optabs.def (vec_shl_insert_optab): New optab.
1273 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1274 (duplicate_and_interleave): Likewise.
1275 * tree-vect-loop.c: Include internal-fn.h.
1276 (neutral_op_for_slp_reduction): New function, split out from
1277 get_initial_defs_for_reduction.
1278 (get_initial_def_for_reduction): Handle option 2 for variable-length
1279 vectors by loading the neutral value into a vector and then shifting
1280 the initial value into element 0.
1281 (get_initial_defs_for_reduction): Replace the code argument with
1282 the neutral value calculated by neutral_op_for_slp_reduction.
1283 Use gimple_build_vector for constant-length vectors.
1284 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1285 but the first group_size elements have a neutral value.
1286 Use duplicate_and_interleave otherwise.
1287 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1288 Update call to get_initial_defs_for_reduction. Handle SLP
1289 reductions for variable-length vectors by creating one vector
1290 result for each scalar result, with the elements associated
1291 with other scalar results stubbed out with the neutral value.
1292 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1293 Require IFN_VEC_SHL_INSERT for double reductions on
1294 variable-length vectors, or SLP reductions that have
1295 a neutral value. Require can_duplicate_and_interleave_p
1296 support for variable-length unchained SLP reductions if there
1297 is no neutral value, such as for MIN/MAX reductions. Also require
1298 the number of vector elements to be a multiple of the number of
1299 SLP statements when doing variable-length unchained SLP reductions.
1300 Update call to vect_create_epilog_for_reduction.
1301 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1302 and remove initial values.
1303 (duplicate_and_interleave): Make public.
1304 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1305 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1307 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1308 Alan Hayward <alan.hayward@arm.com>
1309 David Sherwood <david.sherwood@arm.com>
1311 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1312 (can_duplicate_and_interleave_p): New function.
1313 (vect_get_and_check_slp_defs): Take the vector of statements
1314 rather than just the current one. Remove excess parentheses.
1315 Restriction rejectinon of vect_constant_def and vect_external_def
1316 for variable-length vectors to boolean types, or types for which
1317 can_duplicate_and_interleave_p is false.
1318 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1319 (duplicate_and_interleave): New function.
1320 (vect_get_constant_vectors): Use gimple_build_vector for
1321 constant-length vectors and suitable variable-length constant
1322 vectors. Use duplicate_and_interleave for other variable-length
1323 vectors. Don't defer the update when inserting new statements.
1325 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1326 Alan Hayward <alan.hayward@arm.com>
1327 David Sherwood <david.sherwood@arm.com>
1329 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1330 min_profitable_iters doesn't go negative.
1332 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1333 Alan Hayward <alan.hayward@arm.com>
1334 David Sherwood <david.sherwood@arm.com>
1336 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1337 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1338 * optabs.def (vec_mask_load_lanes_optab): New optab.
1339 (vec_mask_store_lanes_optab): Likewise.
1340 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1341 (MASK_STORE_LANES): Likewise.
1342 * internal-fn.c (mask_load_lanes_direct): New macro.
1343 (mask_store_lanes_direct): Likewise.
1344 (expand_mask_load_optab_fn): Handle masked operations.
1345 (expand_mask_load_lanes_optab_fn): New macro.
1346 (expand_mask_store_optab_fn): Handle masked operations.
1347 (expand_mask_store_lanes_optab_fn): New macro.
1348 (direct_mask_load_lanes_optab_supported_p): Likewise.
1349 (direct_mask_store_lanes_optab_supported_p): Likewise.
1350 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1352 (vect_load_lanes_supported): Likewise.
1353 * tree-vect-data-refs.c (strip_conversion): New function.
1354 (can_group_stmts_p): Likewise.
1355 (vect_analyze_data_ref_accesses): Use it instead of checking
1356 for a pair of assignments.
1357 (vect_store_lanes_supported): Take a masked_p parameter.
1358 (vect_load_lanes_supported): Likewise.
1359 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1360 vect_store_lanes_supported and vect_load_lanes_supported.
1361 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1362 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1363 parameter. Don't allow gaps for masked accesses.
1364 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1365 and vect_load_lanes_supported.
1366 (get_load_store_type): Take a masked_p parameter and update
1367 call to get_group_load_store_type.
1368 (vectorizable_store): Update call to get_load_store_type.
1369 Handle IFN_MASK_STORE_LANES.
1370 (vectorizable_load): Update call to get_load_store_type.
1371 Handle IFN_MASK_LOAD_LANES.
1373 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1374 Alan Hayward <alan.hayward@arm.com>
1375 David Sherwood <david.sherwood@arm.com>
1377 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1379 * config/aarch64/aarch64-protos.h
1380 (aarch64_sve_struct_memory_operand_p): Declare.
1381 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1382 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1383 (VPRED, vpred): Handle SVE structure modes.
1384 * config/aarch64/constraints.md (Utx): New constraint.
1385 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1386 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1387 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1388 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1389 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1390 structure modes. Split into pieces after RA.
1391 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1392 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1394 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1395 SVE structure modes.
1396 (aarch64_classify_address): Likewise.
1397 (sizetochar): Move earlier in file.
1398 (aarch64_print_operand): Handle SVE register lists.
1399 (aarch64_array_mode): New function.
1400 (aarch64_sve_struct_memory_operand_p): Likewise.
1401 (TARGET_ARRAY_MODE): Redefine.
1403 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1404 Alan Hayward <alan.hayward@arm.com>
1405 David Sherwood <david.sherwood@arm.com>
1407 * target.def (array_mode): New target hook.
1408 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1409 * doc/tm.texi: Regenerate.
1410 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1411 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1412 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1414 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1417 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1418 Alan Hayward <alan.hayward@arm.com>
1419 David Sherwood <david.sherwood@arm.com>
1421 * fold-const.c (fold_binary_loc): Check the argument types
1422 rather than the result type when testing for a vector operation.
1424 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1426 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1427 * doc/tm.texi: Regenerate.
1429 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1430 Alan Hayward <alan.hayward@arm.com>
1431 David Sherwood <david.sherwood@arm.com>
1433 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1434 (sve): Document new AArch64 extension.
1435 * doc/md.texi (w): Extend the description of the AArch64
1436 constraint to include SVE vectors.
1437 (Upl, Upa): Document new AArch64 predicate constraints.
1438 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1440 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1441 (msve-vector-bits=): New option.
1442 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1443 SVE when these are disabled.
1444 (sve): New extension.
1445 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1446 modes. Adjust their number of units based on aarch64_sve_vg.
1447 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1448 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1449 aarch64_addr_query_type.
1450 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1451 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1452 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1453 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1454 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1455 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1456 (aarch64_simd_imm_zero_p): Delete.
1457 (aarch64_check_zero_based_sve_index_immediate): Declare.
1458 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1459 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1460 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1461 (aarch64_sve_float_mul_immediate_p): Likewise.
1462 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1464 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1465 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1466 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1467 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1468 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1469 (aarch64_regmode_natural_size): Likewise.
1470 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1471 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1473 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1474 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1475 for VG and the SVE predicate registers.
1476 (V_ALIASES): Add a "z"-prefixed alias.
1477 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1478 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1479 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1480 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1481 (REG_CLASS_NAMES): Add entries for them.
1482 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1483 and the predicate registers.
1484 (aarch64_sve_vg): Declare.
1485 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1486 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1487 (REGMODE_NATURAL_SIZE): Define.
1488 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1490 * config/aarch64/aarch64.c: Include cfgrtl.h.
1491 (simd_immediate_info): Add a constructor for series vectors,
1492 and an associated step field.
1493 (aarch64_sve_vg): New variable.
1494 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1495 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1496 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1497 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1498 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1499 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1500 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1501 (aarch64_get_mask_mode): New functions.
1502 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1503 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1504 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1505 predicate modes and predicate registers. Explicitly restrict
1506 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1507 to store a vector mode if it is recognized by
1508 aarch64_classify_vector_mode.
1509 (aarch64_regmode_natural_size): New function.
1510 (aarch64_hard_regno_caller_save_mode): Return the original mode
1512 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1513 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1514 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1515 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1517 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1518 does not overlap dest if the function is frame-related. Handle
1520 (aarch64_split_add_offset): New function.
1521 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1522 them aarch64_add_offset.
1523 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1524 and update call to aarch64_sub_sp.
1525 (aarch64_add_cfa_expression): New function.
1526 (aarch64_expand_prologue): Pass extra temporary registers to the
1527 functions above. Handle the case in which we need to emit new
1528 DW_CFA_expressions for registers that were originally saved
1529 relative to the stack pointer, but now have to be expressed
1530 relative to the frame pointer.
1531 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1533 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1534 IP0 and IP1 values for SVE frames.
1535 (aarch64_expand_vec_series): New function.
1536 (aarch64_expand_sve_widened_duplicate): Likewise.
1537 (aarch64_expand_sve_const_vector): Likewise.
1538 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1539 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1540 into the register, rather than emitting a SET directly.
1541 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1542 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1543 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1544 (offset_9bit_signed_scaled_p): New functions.
1545 (aarch64_replicate_bitmask_imm): New function.
1546 (aarch64_bitmask_imm): Use it.
1547 (aarch64_cannot_force_const_mem): Reject expressions involving
1548 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1549 (aarch64_classify_index): Handle SVE indices, by requiring
1550 a plain register index with a scale that matches the element size.
1551 (aarch64_classify_address): Handle SVE addresses. Assert that
1552 the mode of the address is VOIDmode or an integer mode.
1553 Update call to aarch64_classify_symbol.
1554 (aarch64_classify_symbolic_expression): Update call to
1555 aarch64_classify_symbol.
1556 (aarch64_const_vec_all_in_range_p): New function.
1557 (aarch64_print_vector_float_operand): Likewise.
1558 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1559 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1560 and the FP immediates 1.0 and 0.5.
1561 (aarch64_print_address_internal): Handle SVE addresses.
1562 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1563 (aarch64_regno_regclass): Handle predicate registers.
1564 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1566 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1567 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1568 (aarch64_convert_sve_vector_bits): New function.
1569 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1570 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1572 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1573 Handle SVE vector and predicate modes. Accept VL-based constants
1574 that need only one temporary register, and VL offsets that require
1575 no temporary registers.
1576 (aarch64_conditional_register_usage): Mark the predicate registers
1577 as fixed if SVE isn't available.
1578 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1579 Return true for SVE vector and predicate modes.
1580 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1581 rather than an unsigned int. Handle SVE modes.
1582 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1584 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1586 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1587 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1588 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1589 (aarch64_sve_float_mul_immediate_p): New functions.
1590 (aarch64_sve_valid_immediate): New function.
1591 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1592 Explicitly reject structure modes. Check for INDEX constants.
1593 Handle PTRUE and PFALSE constants.
1594 (aarch64_check_zero_based_sve_index_immediate): New function.
1595 (aarch64_simd_imm_zero_p): Delete.
1596 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1597 vector modes. Accept constants in the range of CNT[BHWD].
1598 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1599 ask for an Advanced SIMD mode.
1600 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1601 (aarch64_simd_vector_alignment): Handle SVE predicates.
1602 (aarch64_vectorize_preferred_vector_alignment): New function.
1603 (aarch64_simd_vector_alignment_reachable): Use it instead of
1605 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1606 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1608 (MAX_VECT_LEN): Delete.
1609 (expand_vec_perm_d): Add a vec_flags field.
1610 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1611 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1612 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1614 (aarch64_evpc_rev): Rename to...
1615 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1616 (aarch64_evpc_rev_global): New function.
1617 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1618 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1620 (aarch64_evpc_sve_tbl): New function.
1621 (aarch64_expand_vec_perm_const_1): Update after rename of
1622 aarch64_evpc_rev. Handle SVE permutes too, trying
1623 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1624 than aarch64_evpc_tbl.
1625 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1626 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1627 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1628 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1629 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1630 (aarch64_expand_sve_vcond): New functions.
1631 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1632 of aarch64_vector_mode_p.
1633 (aarch64_dwarf_poly_indeterminate_value): New function.
1634 (aarch64_compute_pressure_classes): Likewise.
1635 (aarch64_can_change_mode_class): Likewise.
1636 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1637 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1638 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1639 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1640 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1641 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1642 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1643 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1645 (Dn, Dl, Dr): Accept const as well as const_vector.
1646 (Dz): Likewise. Compare against CONST0_RTX.
1647 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1648 of "vector" where appropriate.
1649 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1650 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1651 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1652 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1653 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1654 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1655 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1656 (v_int_equiv): Extend to SVE modes.
1657 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1659 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1660 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1661 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1662 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1663 (SVE_COND_FP_CMP): New int iterators.
1664 (perm_hilo): Handle the new unpack unspecs.
1665 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1667 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1668 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1669 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1670 (aarch64_equality_operator, aarch64_constant_vector_operand)
1671 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1672 (aarch64_sve_nonimmediate_operand): Likewise.
1673 (aarch64_sve_general_operand): Likewise.
1674 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1675 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1676 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1677 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1678 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1679 (aarch64_sve_float_arith_immediate): Likewise.
1680 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1681 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1682 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1683 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1684 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1685 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1686 (aarch64_sve_float_arith_operand): Likewise.
1687 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1688 (aarch64_sve_float_mul_operand): Likewise.
1689 (aarch64_sve_vec_perm_operand): Likewise.
1690 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1691 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1692 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1693 as well as const_vector.
1694 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1695 in file. Use CONST0_RTX and CONSTM1_RTX.
1696 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1697 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1698 Use aarch64_simd_imm_zero.
1699 * config/aarch64/aarch64-sve.md: New file.
1700 * config/aarch64/aarch64.md: Include it.
1701 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1702 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1703 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1704 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1705 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1706 (sve): New attribute.
1707 (enabled): Disable instructions with the sve attribute unless
1709 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1710 aarch64_expand_mov_immediate.
1711 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1712 CNT[BHSD] immediates.
1713 (movti): Split CONST_POLY_INT moves into two halves.
1714 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1715 Split additions that need a temporary here if the destination
1716 is the stack pointer.
1717 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1718 (*add<mode>3_poly_1): New instruction.
1719 (set_clobber_cc): New expander.
1721 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1723 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1724 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1725 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1726 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1727 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1728 Change innermode from fixed_mode_size to machine_mode.
1729 (simplify_subreg): Update call accordingly. Handle a constant-sized
1730 subreg of a variable-length CONST_VECTOR.
1732 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1733 Alan Hayward <alan.hayward@arm.com>
1734 David Sherwood <david.sherwood@arm.com>
1736 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1737 (add_offset_to_base): New function, split out from...
1738 (create_mem_ref): ...here. When handling a scale other than 1,
1739 check first whether the address is valid without the offset.
1740 Add it into the base if so, leaving the index and scale as-is.
1742 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1745 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1746 fold_for_warn before checking if arg2 is INTEGER_CST.
1748 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1750 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1751 (store_multiple_operation): Delete.
1752 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1753 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1754 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1755 guarded by TARGET_STRING.
1756 (rs6000_output_load_multiple): Delete.
1757 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1758 OPTION_MASK_STRING / TARGET_STRING handling.
1759 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1760 (const rs6000_opt_masks) <"string">: Change mask to 0.
1761 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1762 (MASK_STRING): Delete.
1763 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1765 (load_multiple): Delete.
1772 (store_multiple): Delete.
1779 (movmemsi_8reg): Delete.
1780 (corresponding unnamed define_insn): Delete.
1781 (movmemsi_6reg): Delete.
1782 (corresponding unnamed define_insn): Delete.
1783 (movmemsi_4reg): Delete.
1784 (corresponding unnamed define_insn): Delete.
1785 (movmemsi_2reg): Delete.
1786 (corresponding unnamed define_insn): Delete.
1787 (movmemsi_1reg): Delete.
1788 (corresponding unnamed define_insn): Delete.
1789 * config/rs6000/rs6000.opt (mno-string): New.
1790 (mstring): Replace by deprecation warning stub.
1791 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1793 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1795 * regrename.c (regrename_do_replace): If replacing the same
1796 reg multiple times, try to reuse last created gen_raw_REG.
1799 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1800 main to workaround a bug in GDB.
1802 2018-01-12 Tom de Vries <tom@codesourcery.com>
1805 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1807 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1809 PR rtl-optimization/80481
1810 * ira-color.c (get_cap_member): New function.
1811 (allocnos_conflict_by_live_ranges_p): Use it.
1812 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1813 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1815 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1818 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1819 (*saddl_se_1): Ditto.
1821 (*ssubl_se_1): Ditto.
1823 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1825 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1826 rather than wi::to_widest for DR_INITs.
1827 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1828 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1829 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1831 (vect_analyze_group_access_1): Note that here.
1833 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1835 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1836 polynomial type sizes.
1838 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1840 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1841 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1842 (gimple_add_tmp_var): Likewise.
1844 2018-01-12 Martin Liska <mliska@suse.cz>
1846 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1847 (gimple_alloc_sizes): Likewise.
1848 (dump_gimple_statistics): Use PRIu64 in printf format.
1849 * gimple.h: Change uint64_t to int.
1851 2018-01-12 Martin Liska <mliska@suse.cz>
1853 * tree-core.h: Use uint64_t instead of int.
1854 * tree.c (tree_node_counts): Likewise.
1855 (tree_node_sizes): Likewise.
1856 (dump_tree_statistics): Use PRIu64 in printf format.
1858 2018-01-12 Martin Liska <mliska@suse.cz>
1860 * Makefile.in: As qsort_chk is implemented in vec.c, add
1861 vec.o to linkage of gencfn-macros.
1862 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1863 passing the info to record_node_allocation_statistics.
1864 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1866 * ggc-common.c (struct ggc_usage): Add operator== and use
1867 it in operator< and compare function.
1868 * mem-stats.h (struct mem_usage): Likewise.
1869 * vec.c (struct vec_usage): Remove operator< and compare
1870 function. Can be simply inherited.
1872 2018-01-12 Martin Jambor <mjambor@suse.cz>
1875 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1876 * tree-ssa-math-opts.c: Include domwalk.h.
1877 (convert_mult_to_fma_1): New function.
1878 (fma_transformation_info): New type.
1879 (fma_deferring_state): Likewise.
1880 (cancel_fma_deferring): New function.
1881 (result_of_phi): Likewise.
1882 (last_fma_candidate_feeds_initial_phi): Likewise.
1883 (convert_mult_to_fma): Added deferring logic, split actual
1884 transformation to convert_mult_to_fma_1.
1885 (math_opts_dom_walker): New type.
1886 (math_opts_dom_walker::after_dom_children): New method, body moved
1887 here from pass_optimize_widening_mul::execute, added deferring logic
1889 (pass_optimize_widening_mul::execute): Moved most of code to
1890 math_opts_dom_walker::after_dom_children.
1891 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1892 * config/i386/i386.c (ix86_option_override_internal): Added
1893 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1895 2018-01-12 Richard Biener <rguenther@suse.de>
1898 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1899 inline instance vars.
1901 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1904 * config/rx/rx.c (rx_is_restricted_memory_address):
1907 2018-01-12 Richard Biener <rguenther@suse.de>
1909 PR tree-optimization/80846
1910 * target.def (split_reduction): New target hook.
1911 * targhooks.c (default_split_reduction): New function.
1912 * targhooks.h (default_split_reduction): Declare.
1913 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1914 target requests first reduce vectors by combining low and high
1916 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1917 (get_vectype_for_scalar_type_and_size): Export.
1918 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1919 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1920 * doc/tm.texi: Regenerate.
1921 * config/i386/i386.c (ix86_split_reduction): Implement
1922 TARGET_VECTORIZE_SPLIT_REDUCTION.
1924 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1927 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1928 in PIC mode except for TARGET_VXWORKS_RTP.
1929 * config/sparc/sparc.c: Include cfgrtl.h.
1930 (TARGET_INIT_PIC_REG): Define.
1931 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1932 (sparc_pic_register_p): New predicate.
1933 (sparc_legitimate_address_p): Use it.
1934 (sparc_legitimize_pic_address): Likewise.
1935 (sparc_delegitimize_address): Likewise.
1936 (sparc_mode_dependent_address_p): Likewise.
1937 (gen_load_pcrel_sym): Remove 4th parameter.
1938 (load_got_register): Adjust call to above. Remove obsolete stuff.
1939 (sparc_expand_prologue): Do not call load_got_register here.
1940 (sparc_flat_expand_prologue): Likewise.
1941 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1942 (sparc_use_pseudo_pic_reg): New function.
1943 (sparc_init_pic_reg): Likewise.
1944 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1945 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1947 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1949 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1950 Add item for branch_cost.
1952 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1954 PR rtl-optimization/83565
1955 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1956 not extend the result to a larger mode for rotate operations.
1957 (num_sign_bit_copies1): Likewise.
1959 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1962 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1964 Use values-Xc.o for -pedantic.
1965 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1967 2018-01-12 Martin Liska <mliska@suse.cz>
1970 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1972 (possible_polymorphic_call_targets): Use it.
1973 (ipa_devirt): Likewise.
1975 2018-01-12 Martin Liska <mliska@suse.cz>
1977 * profile-count.h (enum profile_quality): Use 0 as invalid
1978 enum value of profile_quality.
1980 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1982 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1983 -mext-string options.
1985 2018-01-12 Richard Biener <rguenther@suse.de>
1987 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1988 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1989 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1991 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1993 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1995 * configure.ac (--with-long-double-format): Add support for the
1996 configuration option to change the default long double format on
1998 * config.gcc (powerpc*-linux*-*): Likewise.
1999 * configure: Regenerate.
2000 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2001 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2002 used without modification.
2004 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2006 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2007 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2008 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2009 MISC_BUILTIN_SPEC_BARRIER.
2010 (rs6000_init_builtins): Likewise.
2011 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2013 (speculation_barrier): New define_insn.
2014 * doc/extend.texi: Document __builtin_speculation_barrier.
2016 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2019 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2020 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2021 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2023 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2024 integral modes instead of "ss" and "sd".
2025 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2026 vectors with 32-bit and 64-bit elements.
2027 (vecdupssescalarmodesuffix): New mode attribute.
2028 (vec_dup<mode>): Use it.
2030 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2033 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2034 frame if argument is passed on stack.
2036 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2039 * ree.c (combine_reaching_defs): Optimize also
2040 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2041 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2043 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2046 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2048 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2051 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2052 after they are computed.
2054 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2056 PR tree-optimization/83695
2057 * gimple-loop-linterchange.cc
2058 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2059 reset cached scev information after interchange.
2060 (pass_linterchange::execute): Remove call to scev_reset_htab.
2062 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2064 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2065 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2066 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2067 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2068 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2069 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2070 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2071 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2072 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2073 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2074 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2075 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2076 (V_lane_reg): Likewise.
2077 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2079 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2080 (vfmal_lane_low<mode>_intrinsic,
2081 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2082 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2083 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2084 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2085 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2086 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2088 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2090 * config/arm/arm-cpus.in (fp16fml): New feature.
2091 (ALL_SIMD): Add fp16fml.
2092 (armv8.2-a): Add fp16fml as an option.
2093 (armv8.3-a): Likewise.
2094 (armv8.4-a): Add fp16fml as part of fp16.
2095 * config/arm/arm.h (TARGET_FP16FML): Define.
2096 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2098 * config/arm/arm-modes.def (V2HF): Define.
2099 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2100 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2101 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2102 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2103 vfmsl_low, vfmsl_high): New set of builtins.
2104 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2105 (vfml_op): New code attribute.
2106 (VFMLHALVES): New int iterator.
2107 (VFML, VFMLSEL): New mode attributes.
2108 (V_reg): Define mapping for V2HF.
2109 (V_hi, V_lo): New mode attributes.
2110 (VF_constraint): Likewise.
2111 (vfml_half, vfml_half_selector): New int attributes.
2112 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2114 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2115 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2117 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2118 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2119 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2120 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2122 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2123 Document new effective target and option set.
2125 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2127 * config/arm/arm-cpus.in (armv8_4): New feature.
2128 (ARMv8_4a): New fgroup.
2129 (armv8.4-a): New arch.
2130 * config/arm/arm-tables.opt: Regenerate.
2131 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2132 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2133 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2134 Add matching rules for -march=armv8.4-a and extensions.
2135 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2137 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2140 * config/rx/rx.md (BW): New mode attribute.
2141 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2143 2018-01-11 Richard Biener <rguenther@suse.de>
2145 PR tree-optimization/83435
2146 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2147 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2148 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2150 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2151 Alan Hayward <alan.hayward@arm.com>
2152 David Sherwood <david.sherwood@arm.com>
2154 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2156 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2157 (aarch64_print_address_internal): Use it to check for a zero offset.
2159 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2160 Alan Hayward <alan.hayward@arm.com>
2161 David Sherwood <david.sherwood@arm.com>
2163 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2164 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2165 Return a poly_int64 rather than a HOST_WIDE_INT.
2166 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2167 rather than a HOST_WIDE_INT.
2168 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2169 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2170 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2171 final_offset from HOST_WIDE_INT to poly_int64.
2172 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2173 to_constant when getting the number of units in an Advanced SIMD
2175 (aarch64_builtin_vectorized_function): Check for a constant number
2177 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2179 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2180 attribute instead of GET_MODE_NUNITS.
2181 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2182 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2183 GET_MODE_SIZE for fixed-size registers.
2184 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2185 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2186 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2187 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2188 (aarch64_print_operand, aarch64_print_address_internal)
2189 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2190 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2191 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2192 Handle polynomial GET_MODE_SIZE.
2193 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2194 wider than SImode without modification.
2195 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2196 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2197 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2198 passing and returning SVE modes.
2199 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2200 rather than GEN_INT.
2201 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2202 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2203 (aarch64_allocate_and_probe_stack_space): Likewise.
2204 (aarch64_layout_frame): Cope with polynomial offsets.
2205 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2206 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2208 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2209 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2210 poly_int64 rather than a HOST_WIDE_INT.
2211 (aarch64_get_separate_components, aarch64_process_components)
2212 (aarch64_expand_prologue, aarch64_expand_epilogue)
2213 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2214 (aarch64_anchor_offset): New function, split out from...
2215 (aarch64_legitimize_address): ...here.
2216 (aarch64_builtin_vectorization_cost): Handle polynomial
2217 TYPE_VECTOR_SUBPARTS.
2218 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2220 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2221 number of elements from the PARALLEL rather than the mode.
2222 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2223 rather than GET_MODE_BITSIZE.
2224 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2225 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2226 (aarch64_expand_vec_perm_const_1): Handle polynomial
2227 d->perm.length () and d->perm elements.
2228 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2229 Apply to_constant to d->perm elements.
2230 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2231 polynomial CONST_VECTOR_NUNITS.
2232 (aarch64_move_pointer): Take amount as a poly_int64 rather
2234 (aarch64_progress_pointer): Avoid temporary variable.
2235 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2236 the mode attribute instead of GET_MODE.
2238 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2239 Alan Hayward <alan.hayward@arm.com>
2240 David Sherwood <david.sherwood@arm.com>
2242 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2243 x exists before using it.
2244 (aarch64_add_constant_internal): Rename to...
2245 (aarch64_add_offset_1): ...this. Replace regnum with separate
2246 src and dest rtxes. Handle the case in which they're different,
2247 including when the offset is zero. Replace scratchreg with an rtx.
2248 Use 2 additions if there is no spare register into which we can
2249 move a 16-bit constant.
2250 (aarch64_add_constant): Delete.
2251 (aarch64_add_offset): Replace reg with separate src and dest
2252 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2253 Use aarch64_add_offset_1.
2254 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2255 an rtx rather than an int. Take the delta as a poly_int64
2256 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2257 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2258 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2259 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2260 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2262 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2263 aarch64_add_constant.
2265 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2267 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2268 Use scalar_float_mode.
2270 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2272 * config/aarch64/aarch64-simd.md
2273 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2274 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2275 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2276 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2277 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2278 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2279 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2280 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2281 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2282 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2284 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2287 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2288 targ_options->x_arm_arch_string is non NULL.
2290 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2292 * config/aarch64/aarch64.h
2293 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2295 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2298 * expmed.c (emit_store_flag_force): Swap if const op0
2299 and change VOIDmode to mode of op0.
2301 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2303 PR rtl-optimization/83761
2304 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2305 than bytes to mode_for_size.
2307 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2310 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2311 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2314 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2317 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2318 when in layout mode.
2319 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2320 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2323 2018-01-10 Michael Collison <michael.collison@arm.com>
2325 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2326 * config/aarch64/aarch64-option-extension.def: Add
2327 AARCH64_OPT_EXTENSION of 'fp16fml'.
2328 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2329 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2330 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2331 * config/aarch64/constraints.md (Ui7): New constraint.
2332 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2333 (VFMLA_SEL_W): Ditto.
2336 (VFMLA16_LOW): New int iterator.
2337 (VFMLA16_HIGH): Ditto.
2338 (UNSPEC_FMLAL): New unspec.
2339 (UNSPEC_FMLSL): Ditto.
2340 (UNSPEC_FMLAL2): Ditto.
2341 (UNSPEC_FMLSL2): Ditto.
2342 (f16mac): New code attribute.
2343 * config/aarch64/aarch64-simd-builtins.def
2344 (aarch64_fmlal_lowv2sf): Ditto.
2345 (aarch64_fmlsl_lowv2sf): Ditto.
2346 (aarch64_fmlalq_lowv4sf): Ditto.
2347 (aarch64_fmlslq_lowv4sf): Ditto.
2348 (aarch64_fmlal_highv2sf): Ditto.
2349 (aarch64_fmlsl_highv2sf): Ditto.
2350 (aarch64_fmlalq_highv4sf): Ditto.
2351 (aarch64_fmlslq_highv4sf): Ditto.
2352 (aarch64_fmlal_lane_lowv2sf): Ditto.
2353 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2354 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2355 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2356 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2357 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2358 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2359 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2360 (aarch64_fmlal_lane_highv2sf): Ditto.
2361 (aarch64_fmlsl_lane_highv2sf): Ditto.
2362 (aarch64_fmlal_laneq_highv2sf): Ditto.
2363 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2364 (aarch64_fmlalq_lane_highv4sf): Ditto.
2365 (aarch64_fmlsl_lane_highv4sf): Ditto.
2366 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2367 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2368 * config/aarch64/aarch64-simd.md:
2369 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2370 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2371 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2372 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2373 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2374 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2375 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2376 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2377 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2378 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2379 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2380 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2381 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2382 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2383 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2384 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2385 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2386 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2387 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2388 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2389 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2390 (vfmlsl_low_u32): Ditto.
2391 (vfmlalq_low_u32): Ditto.
2392 (vfmlslq_low_u32): Ditto.
2393 (vfmlal_high_u32): Ditto.
2394 (vfmlsl_high_u32): Ditto.
2395 (vfmlalq_high_u32): Ditto.
2396 (vfmlslq_high_u32): Ditto.
2397 (vfmlal_lane_low_u32): Ditto.
2398 (vfmlsl_lane_low_u32): Ditto.
2399 (vfmlal_laneq_low_u32): Ditto.
2400 (vfmlsl_laneq_low_u32): Ditto.
2401 (vfmlalq_lane_low_u32): Ditto.
2402 (vfmlslq_lane_low_u32): Ditto.
2403 (vfmlalq_laneq_low_u32): Ditto.
2404 (vfmlslq_laneq_low_u32): Ditto.
2405 (vfmlal_lane_high_u32): Ditto.
2406 (vfmlsl_lane_high_u32): Ditto.
2407 (vfmlal_laneq_high_u32): Ditto.
2408 (vfmlsl_laneq_high_u32): Ditto.
2409 (vfmlalq_lane_high_u32): Ditto.
2410 (vfmlslq_lane_high_u32): Ditto.
2411 (vfmlalq_laneq_high_u32): Ditto.
2412 (vfmlslq_laneq_high_u32): Ditto.
2413 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2414 (AARCH64_FL_FOR_ARCH8_4): New.
2415 (AARCH64_ISA_F16FML): New ISA flag.
2416 (TARGET_F16FML): New feature flag for fp16fml.
2417 (doc/invoke.texi): Document new fp16fml option.
2419 2018-01-10 Michael Collison <michael.collison@arm.com>
2421 * config/aarch64/aarch64-builtins.c:
2422 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2423 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2424 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2425 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2426 (AARCH64_ISA_SHA3): New ISA flag.
2427 (TARGET_SHA3): New feature flag for sha3.
2428 * config/aarch64/iterators.md (sha512_op): New int attribute.
2429 (CRYPTO_SHA512): New int iterator.
2430 (UNSPEC_SHA512H): New unspec.
2431 (UNSPEC_SHA512H2): Ditto.
2432 (UNSPEC_SHA512SU0): Ditto.
2433 (UNSPEC_SHA512SU1): Ditto.
2434 * config/aarch64/aarch64-simd-builtins.def
2435 (aarch64_crypto_sha512hqv2di): New builtin.
2436 (aarch64_crypto_sha512h2qv2di): Ditto.
2437 (aarch64_crypto_sha512su0qv2di): Ditto.
2438 (aarch64_crypto_sha512su1qv2di): Ditto.
2439 (aarch64_eor3qv8hi): Ditto.
2440 (aarch64_rax1qv2di): Ditto.
2441 (aarch64_xarqv2di): Ditto.
2442 (aarch64_bcaxqv8hi): Ditto.
2443 * config/aarch64/aarch64-simd.md:
2444 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2445 (aarch64_crypto_sha512su0qv2di): Ditto.
2446 (aarch64_crypto_sha512su1qv2di): Ditto.
2447 (aarch64_eor3qv8hi): Ditto.
2448 (aarch64_rax1qv2di): Ditto.
2449 (aarch64_xarqv2di): Ditto.
2450 (aarch64_bcaxqv8hi): Ditto.
2451 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2452 (vsha512h2q_u64): Ditto.
2453 (vsha512su0q_u64): Ditto.
2454 (vsha512su1q_u64): Ditto.
2455 (veor3q_u16): Ditto.
2456 (vrax1q_u64): Ditto.
2458 (vbcaxq_u16): Ditto.
2459 * config/arm/types.md (crypto_sha512): New type attribute.
2460 (crypto_sha3): Ditto.
2461 (doc/invoke.texi): Document new sha3 option.
2463 2018-01-10 Michael Collison <michael.collison@arm.com>
2465 * config/aarch64/aarch64-builtins.c:
2466 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2467 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2468 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2469 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2470 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2471 (AARCH64_ISA_SM4): New ISA flag.
2472 (TARGET_SM4): New feature flag for sm4.
2473 * config/aarch64/aarch64-simd-builtins.def
2474 (aarch64_sm3ss1qv4si): Ditto.
2475 (aarch64_sm3tt1aq4si): Ditto.
2476 (aarch64_sm3tt1bq4si): Ditto.
2477 (aarch64_sm3tt2aq4si): Ditto.
2478 (aarch64_sm3tt2bq4si): Ditto.
2479 (aarch64_sm3partw1qv4si): Ditto.
2480 (aarch64_sm3partw2qv4si): Ditto.
2481 (aarch64_sm4eqv4si): Ditto.
2482 (aarch64_sm4ekeyqv4si): Ditto.
2483 * config/aarch64/aarch64-simd.md:
2484 (aarch64_sm3ss1qv4si): Ditto.
2485 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2486 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2487 (aarch64_sm4eqv4si): Ditto.
2488 (aarch64_sm4ekeyqv4si): Ditto.
2489 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2490 (sm3part_op): Ditto.
2491 (CRYPTO_SM3TT): Ditto.
2492 (CRYPTO_SM3PART): Ditto.
2493 (UNSPEC_SM3SS1): New unspec.
2494 (UNSPEC_SM3TT1A): Ditto.
2495 (UNSPEC_SM3TT1B): Ditto.
2496 (UNSPEC_SM3TT2A): Ditto.
2497 (UNSPEC_SM3TT2B): Ditto.
2498 (UNSPEC_SM3PARTW1): Ditto.
2499 (UNSPEC_SM3PARTW2): Ditto.
2500 (UNSPEC_SM4E): Ditto.
2501 (UNSPEC_SM4EKEY): Ditto.
2502 * config/aarch64/constraints.md (Ui2): New constraint.
2503 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2504 * config/arm/types.md (crypto_sm3): New type attribute.
2505 (crypto_sm4): Ditto.
2506 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2507 (vsm3tt1aq_u32): Ditto.
2508 (vsm3tt1bq_u32): Ditto.
2509 (vsm3tt2aq_u32): Ditto.
2510 (vsm3tt2bq_u32): Ditto.
2511 (vsm3partw1q_u32): Ditto.
2512 (vsm3partw2q_u32): Ditto.
2513 (vsm4eq_u32): Ditto.
2514 (vsm4ekeyq_u32): Ditto.
2515 (doc/invoke.texi): Document new sm4 option.
2517 2018-01-10 Michael Collison <michael.collison@arm.com>
2519 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2520 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2521 (AARCH64_FL_FOR_ARCH8_4): New.
2522 (AARCH64_FL_V8_4): New flag.
2523 (doc/invoke.texi): Document new armv8.4-a option.
2525 2018-01-10 Michael Collison <michael.collison@arm.com>
2527 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2528 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2529 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2530 * config/aarch64/aarch64-option-extension.def: Add
2531 AARCH64_OPT_EXTENSION of 'sha2'.
2532 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2533 (crypto): Disable sha2 and aes if crypto disabled.
2534 (crypto): Enable aes and sha2 if enabled.
2535 (simd): Disable sha2 and aes if simd disabled.
2536 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2538 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2539 (TARGET_SHA2): New feature flag for sha2.
2540 (TARGET_AES): New feature flag for aes.
2541 * config/aarch64/aarch64-simd.md:
2542 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2543 conditional on TARGET_AES.
2544 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2545 (aarch64_crypto_sha1hsi): Make pattern conditional
2547 (aarch64_crypto_sha1hv4si): Ditto.
2548 (aarch64_be_crypto_sha1hv4si): Ditto.
2549 (aarch64_crypto_sha1su1v4si): Ditto.
2550 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2551 (aarch64_crypto_sha1su0v4si): Ditto.
2552 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2553 (aarch64_crypto_sha256su0v4si): Ditto.
2554 (aarch64_crypto_sha256su1v4si): Ditto.
2555 (doc/invoke.texi): Document new aes and sha2 options.
2557 2018-01-10 Martin Sebor <msebor@redhat.com>
2559 PR tree-optimization/83781
2560 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2563 2018-01-11 Martin Sebor <msebor@gmail.com>
2564 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2566 PR tree-optimization/83501
2567 PR tree-optimization/81703
2569 * tree-ssa-strlen.c (get_string_cst): Rename...
2570 (get_string_len): ...to this. Handle global constants.
2571 (handle_char_store): Adjust.
2573 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2574 Jim Wilson <jimw@sifive.com>
2576 * config/riscv/riscv-protos.h (riscv_output_return): New.
2577 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2578 (riscv_attribute_table, riscv_output_return),
2579 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2580 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2581 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2583 (riscv_expand_prologue): Add early return for naked function.
2584 (riscv_expand_epilogue): Likewise.
2585 (riscv_function_ok_for_sibcall): Return false for naked function.
2586 (riscv_set_current_function): New.
2587 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2588 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2589 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2590 * doc/extend.texi (RISC-V Function Attributes): New.
2592 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2594 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2595 check for 128-bit long double before checking TCmode.
2596 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2597 128-bit long doubles before checking TFmode or TCmode.
2598 (FLOAT128_IBM_P): Likewise.
2600 2018-01-10 Martin Sebor <msebor@redhat.com>
2602 PR tree-optimization/83671
2603 * builtins.c (c_strlen): Unconditionally return zero for the empty
2605 Use -Warray-bounds for warnings.
2606 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2607 for non-constant array indices with COMPONENT_REF, arrays of
2608 arrays, and pointers to arrays.
2609 (gimple_fold_builtin_strlen): Determine and set length range for
2610 non-constant character arrays.
2612 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2615 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2618 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2620 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2622 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2625 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2626 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2627 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2628 indexed_or_indirect_operand predicate.
2629 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2630 (*vsx_le_perm_load_v8hi): Likewise.
2631 (*vsx_le_perm_load_v16qi): Likewise.
2632 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2633 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2634 (*vsx_le_perm_store_v8hi): Likewise.
2635 (*vsx_le_perm_store_v16qi): Likewise.
2636 (eight unnamed splitters): Likewise.
2638 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2640 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2641 * config/rs6000/emmintrin.h: Likewise.
2642 * config/rs6000/mmintrin.h: Likewise.
2643 * config/rs6000/xmmintrin.h: Likewise.
2645 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2648 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2650 * tree.c (tree_nop_conversion): Return true for location wrapper
2652 (maybe_wrap_with_location): New function.
2653 (selftest::check_strip_nops): New function.
2654 (selftest::test_location_wrappers): New function.
2655 (selftest::tree_c_tests): Call it.
2656 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2657 (maybe_wrap_with_location): New decl.
2658 (EXPR_LOCATION_WRAPPER_P): New macro.
2659 (location_wrapper_p): New inline function.
2660 (tree_strip_any_location_wrapper): New inline function.
2662 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2665 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2666 stack_realign_offset for the largest alignment of stack slot
2668 (ix86_find_max_used_stack_alignment): New function.
2669 (ix86_finalize_stack_frame_flags): Use it. Set
2670 max_used_stack_alignment if we don't realign stack.
2671 * config/i386/i386.h (machine_function): Add
2672 max_used_stack_alignment.
2674 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2676 * config/arm/arm.opt (-mbranch-cost): New option.
2677 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2680 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2683 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2684 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2686 2018-01-10 Richard Biener <rguenther@suse.de>
2689 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2690 early out so it also covers the case where we have a non-NULL
2693 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2695 PR tree-optimization/83753
2696 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2697 for non-strided grouped accesses if the number of elements is 1.
2699 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2702 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2703 * i386.h (TARGET_USE_GATHER): Define.
2704 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2706 2018-01-10 Martin Liska <mliska@suse.cz>
2709 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2710 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2712 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2713 CLEANUP_NO_PARTITIONING is not set.
2715 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2717 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2718 for vectors, as a partial revert of r254296.
2719 * rtl.h (const_vec_p): Delete.
2720 (const_vec_duplicate_p): Don't test for vector CONSTs.
2721 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2722 * expmed.c (make_tree): Likewise.
2725 * common.md (E, F): Use CONSTANT_P instead of checking for
2727 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2728 checking for CONST_VECTOR.
2730 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2733 * predict.c (force_edge_cold): Handle in more sane way edges
2736 2018-01-09 Carl Love <cel@us.ibm.com>
2738 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2740 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2741 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2742 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2743 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2744 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2745 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2746 * config/rs6000/rs6000-protos.h: Add extern defition for
2747 rs6000_generate_float2_double_code.
2748 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2750 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2751 (float2_v2df): Add define_expand.
2753 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2756 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2757 op_mode in the force_to_mode call.
2759 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2761 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2762 instead of checking each element individually.
2763 (aarch64_evpc_uzp): Likewise.
2764 (aarch64_evpc_zip): Likewise.
2765 (aarch64_evpc_ext): Likewise.
2766 (aarch64_evpc_rev): Likewise.
2767 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2768 instead of checking each element individually. Return true without
2770 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2771 whether all selected elements come from the same input, instead of
2772 checking each element individually. Remove calls to gen_rtx_REG,
2773 start_sequence and end_sequence and instead assert that no rtl is
2776 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2778 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2779 order of HIGH and CONST checks.
2781 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2783 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2784 if the destination isn't an SSA_NAME.
2786 2018-01-09 Richard Biener <rguenther@suse.de>
2788 PR tree-optimization/83668
2789 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2791 (canonicalize_loop_form): ... here, renamed from ...
2792 (canonicalize_loop_closed_ssa_form): ... this and amended to
2793 swap successor edges for loop exit blocks to make us use
2794 the RPO order we need for initial schedule generation.
2796 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2798 PR tree-optimization/64811
2799 * match.pd: When optimizing comparisons with Inf, avoid
2800 introducing or losing exceptions from comparisons with NaN.
2802 2018-01-09 Martin Liska <mliska@suse.cz>
2805 * asan.c (shadow_mem_size): Add gcc_assert.
2807 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2809 Don't save registers in main().
2812 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2813 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2814 * config/avr/avr.c (avr_set_current_function): Don't error if
2815 naked, OS_task or OS_main are specified at the same time.
2816 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2818 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2820 * common/config/avr/avr-common.c (avr_option_optimization_table):
2821 Switch on -mmain-is-OS_task for optimizing compilations.
2823 2018-01-09 Richard Biener <rguenther@suse.de>
2825 PR tree-optimization/83572
2826 * graphite.c: Include cfganal.h.
2827 (graphite_transform_loops): Connect infinite loops to exit
2828 and remove fake edges at the end.
2830 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2832 * ipa-inline.c (edge_badness): Revert accidental checkin.
2834 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2837 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2838 symbols; not inline clones.
2840 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2843 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2844 hard registers. Formatting fixes.
2846 PR preprocessor/83722
2847 * gcc.c (try_generate_repro): Pass
2848 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2849 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2852 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2853 Kito Cheng <kito.cheng@gmail.com>
2855 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2856 (riscv_leaf_function_p): Delete.
2857 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2859 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2861 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2863 (do_ifelse): New function.
2864 (do_isel): New function.
2865 (do_sub3): New function.
2866 (do_add3): New function.
2867 (do_load_mask_compare): New function.
2868 (do_overlap_load_compare): New function.
2869 (expand_compare_loop): New function.
2870 (expand_block_compare): Call expand_compare_loop() when appropriate.
2871 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2873 (-mblock-compare-inline-loop-limit): New option.
2875 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2878 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2879 Reverse order of second and third operands in first alternative.
2880 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2881 of first and second elements in UNSPEC_VPERMR vector.
2882 (altivec_expand_vec_perm_le): Likewise.
2884 2017-01-08 Jeff Law <law@redhat.com>
2886 PR rtl-optimizatin/81308
2887 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2888 (process_switch): If group_case_labels makes a change, then set
2890 (pass_convert_switch::execute): If a switch is converted, then
2891 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2893 PR rtl-optimization/81308
2894 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2897 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2899 PR target/83663 - Revert r255946
2900 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2901 generation for cases where splatting a value is not useful.
2902 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2903 across a vec_duplicate and a paradoxical subreg forming a vector
2904 mode to a vec_concat.
2906 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2908 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2909 -march=armv8.3-a variants.
2910 * config/arm/t-multilib: Likewise.
2911 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2913 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2915 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2917 (cceq_ior_compare_complement): Give it a name so I can use it, and
2918 change boolean_or_operator predicate to boolean_operator so it can
2919 be used to generate a crand.
2920 (eqne): New code iterator.
2921 (bd/bd_neg): New code_attrs.
2922 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2923 a single define_insn.
2924 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2925 decrement (bdnzt/bdnzf/bdzt/bdzf).
2926 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2927 with the new names of the branch decrement patterns, and added the
2928 names of the branch decrement conditional patterns.
2930 2018-01-08 Richard Biener <rguenther@suse.de>
2932 PR tree-optimization/83563
2933 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2936 2018-01-08 Richard Biener <rguenther@suse.de>
2939 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2941 2018-01-08 Richard Biener <rguenther@suse.de>
2943 PR tree-optimization/83685
2944 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2945 references to abnormals.
2947 2018-01-08 Richard Biener <rguenther@suse.de>
2950 * dwarf2out.c (output_indirect_strings): Handle empty
2951 skeleton_debug_str_hash.
2952 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2954 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2956 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2957 (emit_store_direct): Likewise.
2958 (arc_trampoline_adjust_address): Likewise.
2959 (arc_asm_trampoline_template): New function.
2960 (arc_initialize_trampoline): Use asm_trampoline_template.
2961 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2962 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2963 * config/arc/arc.md (flush_icache): Delete pattern.
2965 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2967 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2968 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2971 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2974 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2975 by not USED_FOR_TARGET.
2976 (make_pass_resolve_sw_modes): Likewise.
2978 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2980 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2983 2018-01-08 Richard Biener <rguenther@suse.de>
2986 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2988 2018-01-08 Richard Biener <rguenther@suse.de>
2991 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2993 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2996 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2997 basic blocks with a small number of successors.
2998 (convert_control_dep_chain_into_preds): Improve handling of
3000 (dump_predicates): Split apart into...
3001 (dump_pred_chain): ...here...
3002 (dump_pred_info): ...and here.
3003 (can_one_predicate_be_invalidated_p): Add debugging printfs.
3004 (can_chain_union_be_invalidated_p): Improve check for invalidation
3006 (uninit_uses_cannot_happen): Avoid unnecessary if
3007 convert_control_dep_chain_into_preds yielded nothing.
3009 2018-01-06 Martin Sebor <msebor@redhat.com>
3011 PR tree-optimization/83640
3012 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3013 subtracting negative offset from size.
3014 (builtin_access::overlap): Adjust offset bounds of the access to fall
3015 within the size of the object if possible.
3017 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3019 PR rtl-optimization/83699
3020 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3021 extract_bit_field_as_subreg to cases in which the extracted
3022 value is also a vector.
3024 * lra-constraints.c (process_alt_operands): Test for the equivalence
3025 substitutions when detecting a possible reload cycle.
3027 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3030 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3031 by default if flag_selective_schedling{,2}. Formatting fixes.
3033 PR rtl-optimization/83682
3034 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3035 if it has non-VECTOR_MODE element mode.
3036 (vec_duplicate_p): Likewise.
3039 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3040 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3042 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3045 * config/i386/i386-builtin.def
3046 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3047 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3048 Require also OPTION_MASK_ISA_AVX512F in addition to
3049 OPTION_MASK_ISA_GFNI.
3050 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3051 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3052 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3053 to OPTION_MASK_ISA_GFNI.
3054 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3055 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3056 OPTION_MASK_ISA_AVX512BW.
3057 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3058 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3059 addition to OPTION_MASK_ISA_GFNI.
3060 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3061 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3062 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3063 to OPTION_MASK_ISA_GFNI.
3064 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3065 a requirement for all ISAs rather than any of them with a few
3067 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3069 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3070 bitmasks to be enabled with 3 exceptions, instead of requiring any
3071 enabled ISA with lots of exceptions.
3072 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3073 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3074 Change avx512bw in isa attribute to avx512f.
3075 * config/i386/sgxintrin.h: Add license boilerplate.
3076 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3077 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3078 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3079 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3081 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3082 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3083 temporarily sse2 rather than sse if not enabled already.
3086 * config/i386/sse.md (VI248_VLBW): Rename to ...
3087 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3088 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3089 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3090 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3091 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3092 mode iterator instead of VI248_VLBW.
3094 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3096 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3097 (record_modified): Skip clobbers; add debug output.
3098 (param_change_prob): Use sreal frequencies.
3100 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3102 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3103 punt for user-aligned variables.
3105 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3107 * tree-chrec.c (chrec_contains_symbols): Return true for
3110 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3113 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3114 of (x|y) == x for BICS pattern.
3116 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3118 PR tree-optimization/83605
3119 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3120 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3123 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3125 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3126 * config/epiphany/rtems.h: New file.
3128 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3129 Uros Bizjak <ubizjak@gmail.com>
3132 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3133 QIreg_operand instead of register_operand predicate.
3134 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3135 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3136 comments instead of -fmitigate[-_]rop.
3138 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3141 * cgraphunit.c (symbol_table::compile): Switch to text_section
3142 before calling assembly_start debug hook.
3143 * run-rtl-passes.c (run_rtl_passes): Likewise.
3146 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3148 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3149 range_int_cst_p rather than !symbolic_range_p before calling
3150 extract_range_from_multiplicative_op_1.
3152 2017-01-04 Jeff Law <law@redhat.com>
3154 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3155 redundant test in assertion.
3157 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3159 * doc/rtl.texi: Document machine_mode wrapper classes.
3161 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3163 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3166 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3168 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3169 the VEC_PERM_EXPR fold to fail.
3171 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3174 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3175 to switched_sections.
3177 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3180 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3183 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3186 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3187 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3189 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3192 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3193 is BLKmode and bitpos not zero or mode change is needed.
3195 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3198 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3201 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3204 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3205 instead of MULT rtx. Update all corresponding splitters.
3207 (*ssub<modesuffix>): Ditto.
3209 (*cmp_sadd_di): Update split patterns.
3210 (*cmp_sadd_si): Ditto.
3211 (*cmp_sadd_sidi): Ditto.
3212 (*cmp_ssub_di): Ditto.
3213 (*cmp_ssub_si): Ditto.
3214 (*cmp_ssub_sidi): Ditto.
3215 * config/alpha/predicates.md (const23_operand): New predicate.
3216 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3217 Look for ASHIFT, not MULT inner operand.
3218 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3220 2018-01-04 Martin Liska <mliska@suse.cz>
3222 PR gcov-profile/83669
3223 * gcov.c (output_intermediate_file): Add version to intermediate
3225 * doc/gcov.texi: Document new field 'version' in intermediate
3226 file format. Fix location of '-k' option of gcov command.
3228 2018-01-04 Martin Liska <mliska@suse.cz>
3231 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3233 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3235 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3237 2018-01-03 Martin Sebor <msebor@redhat.com>
3239 PR tree-optimization/83655
3240 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3241 checking calls with invalid arguments.
3243 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3245 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3246 (vectorizable_mask_load_store): Delete.
3247 (vectorizable_call): Return false for masked loads and stores.
3248 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3249 instead of gimple_assign_rhs1.
3250 (vectorizable_load): Handle IFN_MASK_LOAD.
3251 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3253 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3255 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3257 (vectorizable_mask_load_store): ...here.
3258 (vectorizable_load): ...and here.
3260 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3262 * tree-vect-stmts.c (vect_build_all_ones_mask)
3263 (vect_build_zero_merge_argument): New functions, split out from...
3264 (vectorizable_load): ...here.
3266 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3268 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3270 (vectorizable_mask_load_store): ...here.
3271 (vectorizable_store): ...and here.
3273 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3275 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3277 (vectorizable_mask_load_store): ...here.
3279 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3281 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3282 (vect_model_store_cost): Take a vec_load_store_type instead of a
3284 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3285 (vect_model_store_cost): Take a vec_load_store_type instead of a
3287 (vectorizable_mask_load_store): Update accordingly.
3288 (vectorizable_store): Likewise.
3289 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3291 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3293 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3294 IFN_MASK_LOAD calls here rather than...
3295 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3297 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3298 Alan Hayward <alan.hayward@arm.com>
3299 David Sherwood <david.sherwood@arm.com>
3301 * expmed.c (extract_bit_field_1): For vector extracts,
3302 fall back to extract_bit_field_as_subreg if vec_extract
3305 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3306 Alan Hayward <alan.hayward@arm.com>
3307 David Sherwood <david.sherwood@arm.com>
3309 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3310 they are variable or constant sized.
3311 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3312 slots for constant-sized data.
3314 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3315 Alan Hayward <alan.hayward@arm.com>
3316 David Sherwood <david.sherwood@arm.com>
3318 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3319 handling COND_EXPRs with boolean comparisons, try to find a better
3320 basis for the mask type than the boolean itself.
3322 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3324 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3325 is calculated and how it can be overridden.
3326 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3327 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3329 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3332 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3333 Alan Hayward <alan.hayward@arm.com>
3334 David Sherwood <david.sherwood@arm.com>
3336 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3337 Remove the mode argument.
3338 (aarch64_simd_valid_immediate): Remove the mode and inverse
3340 * config/aarch64/iterators.md (bitsize): New iterator.
3341 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3342 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3343 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3344 aarch64_simd_valid_immediate.
3345 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3346 (aarch64_reg_or_bic_imm): Likewise.
3347 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3348 with an insn_type enum and msl with a modifier_type enum.
3349 Replace element_width with a scalar_mode. Change the shift
3350 to unsigned int. Add constructors for scalar_float_mode and
3351 scalar_int_mode elements.
3352 (aarch64_vect_float_const_representable_p): Delete.
3353 (aarch64_can_const_movi_rtx_p)
3354 (aarch64_simd_scalar_immediate_valid_for_move)
3355 (aarch64_simd_make_constant): Update call to
3356 aarch64_simd_valid_immediate.
3357 (aarch64_advsimd_valid_immediate_hs): New function.
3358 (aarch64_advsimd_valid_immediate): Likewise.
3359 (aarch64_simd_valid_immediate): Remove mode and inverse
3360 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3361 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3362 and aarch64_float_const_representable_p on the result.
3363 (aarch64_output_simd_mov_immediate): Remove mode argument.
3364 Update call to aarch64_simd_valid_immediate and use of
3365 simd_immediate_info.
3366 (aarch64_output_scalar_simd_mov_immediate): Update call
3369 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3370 Alan Hayward <alan.hayward@arm.com>
3371 David Sherwood <david.sherwood@arm.com>
3373 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3374 (mode_nunits): Likewise CONST_MODE_NUNITS.
3375 * machmode.def (ADJUST_NUNITS): Document.
3376 * genmodes.c (mode_data::need_nunits_adj): New field.
3377 (blank_mode): Update accordingly.
3378 (adj_nunits): New variable.
3379 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3381 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3382 listed in adj_nunits.
3383 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3384 listed in adj_nunits. Don't emit case statements for such modes.
3385 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3386 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3387 nothing if adj_nunits is nonnull.
3388 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3389 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3390 (emit_mode_fbit): Update use of print_maybe_const_decl.
3391 (emit_move_size): Likewise. Treat the array as non-const
3393 (emit_mode_adjustments): Handle adj_nunits.
3395 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3397 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3398 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3399 (VECTOR_MODES): Use it.
3400 (make_vector_modes): Take the prefix as an argument.
3402 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3403 Alan Hayward <alan.hayward@arm.com>
3404 David Sherwood <david.sherwood@arm.com>
3406 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3407 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3408 for MODE_VECTOR_BOOL.
3409 * machmode.def (VECTOR_BOOL_MODE): Document.
3410 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3411 (make_vector_bool_mode): New function.
3412 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3414 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3415 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3417 * stor-layout.c (int_mode_for_mode): Likewise.
3418 * tree.c (build_vector_type_for_mode): Likewise.
3419 * varasm.c (output_constant_pool_2): Likewise.
3420 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3421 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3422 for MODE_VECTOR_BOOL.
3423 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3424 of mode class checks.
3425 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3426 instead of a list of mode class checks.
3427 (expand_vector_scalar_condition): Likewise.
3428 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3430 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3431 Alan Hayward <alan.hayward@arm.com>
3432 David Sherwood <david.sherwood@arm.com>
3434 * machmode.h (mode_size): Change from unsigned short to
3436 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3437 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3438 or if measurement_type is not polynomial.
3439 (fixed_size_mode::includes_p): Check for constant-sized modes.
3440 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3441 return a poly_uint16 rather than an unsigned short.
3442 (emit_mode_size): Change the type of mode_size from unsigned short
3443 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3444 (emit_mode_adjustments): Cope with polynomial vector sizes.
3445 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3447 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3449 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3450 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3451 * caller-save.c (setup_save_areas): Likewise.
3452 (replace_reg_with_saved_mem): Likewise.
3453 * calls.c (emit_library_call_value_1): Likewise.
3454 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3455 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3456 (gen_lowpart_for_combine): Likewise.
3457 * convert.c (convert_to_integer_1): Likewise.
3458 * cse.c (equiv_constant, cse_insn): Likewise.
3459 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3460 (cselib_subst_to_values): Likewise.
3461 * dce.c (word_dce_process_block): Likewise.
3462 * df-problems.c (df_word_lr_mark_ref): Likewise.
3463 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3464 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3465 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3466 (rtl_for_decl_location): Likewise.
3467 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3468 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3469 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3470 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3471 (expand_expr_real_1): Likewise.
3472 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3473 (pad_below): Likewise.
3474 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3475 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3476 * ira.c (get_subreg_tracking_sizes): Likewise.
3477 * ira-build.c (ira_create_allocno_objects): Likewise.
3478 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3479 (ira_sort_regnos_for_alter_reg): Likewise.
3480 * ira-costs.c (record_operand_costs): Likewise.
3481 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3482 (resolve_simple_move): Likewise.
3483 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3484 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3485 (lra_constraints): Likewise.
3486 (CONST_POOL_OK_P): Reject variable-sized modes.
3487 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3488 (add_pseudo_to_slot, lra_spill): Likewise.
3489 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3490 * optabs-query.c (get_best_extraction_insn): Likewise.
3491 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3492 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3493 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3494 * recog.c (offsettable_address_addr_space_p): Likewise.
3495 * regcprop.c (maybe_mode_change): Likewise.
3496 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3497 * regrename.c (build_def_use): Likewise.
3498 * regstat.c (dump_reg_info): Likewise.
3499 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3500 (find_reloads, find_reloads_subreg_address): Likewise.
3501 * reload1.c (eliminate_regs_1): Likewise.
3502 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3503 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3504 (simplify_binary_operation_1, simplify_subreg): Likewise.
3505 * targhooks.c (default_function_arg_padding): Likewise.
3506 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3507 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3508 (verify_gimple_assign_ternary): Likewise.
3509 * tree-inline.c (estimate_move_cost): Likewise.
3510 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3511 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3512 (get_address_cost_ainc): Likewise.
3513 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3514 (vect_supportable_dr_alignment): Likewise.
3515 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3516 (vectorizable_reduction): Likewise.
3517 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3518 (vectorizable_operation, vectorizable_load): Likewise.
3519 * tree.c (build_same_sized_truth_vector_type): Likewise.
3520 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3521 * var-tracking.c (emit_note_insn_var_location): Likewise.
3522 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3523 (ADDR_VEC_ALIGN): Likewise.
3525 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3526 Alan Hayward <alan.hayward@arm.com>
3527 David Sherwood <david.sherwood@arm.com>
3529 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3531 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3532 or if measurement_type is polynomial.
3533 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3534 * combine.c (make_extraction): Likewise.
3535 * dse.c (find_shift_sequence): Likewise.
3536 * dwarf2out.c (mem_loc_descriptor): Likewise.
3537 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3538 (extract_bit_field, extract_low_bits): Likewise.
3539 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3540 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3541 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3542 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3543 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3544 * reload.c (find_reloads): Likewise.
3545 * reload1.c (alter_reg): Likewise.
3546 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3547 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3548 * tree-if-conv.c (predicate_mem_writes): Likewise.
3549 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3550 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3551 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3552 * valtrack.c (dead_debug_insert_temp): Likewise.
3553 * varasm.c (mergeable_constant_section): Likewise.
3554 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3556 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3557 Alan Hayward <alan.hayward@arm.com>
3558 David Sherwood <david.sherwood@arm.com>
3560 * expr.c (expand_assignment): Cope with polynomial mode sizes
3561 when assigning to a CONCAT.
3563 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3564 Alan Hayward <alan.hayward@arm.com>
3565 David Sherwood <david.sherwood@arm.com>
3567 * machmode.h (mode_precision): Change from unsigned short to
3569 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3571 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3572 or if measurement_type is not polynomial.
3573 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3574 in which the mode is already known to be a scalar_int_mode.
3575 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3576 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3578 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3579 for GET_MODE_PRECISION.
3580 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3581 for GET_MODE_PRECISION.
3582 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3584 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3585 (expand_field_assignment, make_extraction): Likewise.
3586 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3587 (get_last_value): Likewise.
3588 * convert.c (convert_to_integer_1): Likewise.
3589 * cse.c (cse_insn): Likewise.
3590 * expr.c (expand_expr_real_1): Likewise.
3591 * lra-constraints.c (simplify_operand_subreg): Likewise.
3592 * optabs-query.c (can_atomic_load_p): Likewise.
3593 * optabs.c (expand_atomic_load): Likewise.
3594 (expand_atomic_store): Likewise.
3595 * ree.c (combine_reaching_defs): Likewise.
3596 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3597 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3598 * tree.h (type_has_mode_precision_p): Likewise.
3599 * ubsan.c (instrument_si_overflow): Likewise.
3601 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3602 Alan Hayward <alan.hayward@arm.com>
3603 David Sherwood <david.sherwood@arm.com>
3605 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3606 polynomial numbers of units.
3607 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3608 (valid_vector_subparts_p): New function.
3609 (build_vector_type): Remove temporary shim and take the number
3610 of units as a poly_uint64 rather than an int.
3611 (build_opaque_vector_type): Take the number of units as a
3612 poly_uint64 rather than an int.
3613 * tree.c (build_vector_from_ctor): Handle polynomial
3614 TYPE_VECTOR_SUBPARTS.
3615 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3616 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3617 (build_vector_from_val): If the number of units is variable,
3618 use build_vec_duplicate_cst for constant operands and
3619 VEC_DUPLICATE_EXPR otherwise.
3620 (make_vector_type): Remove temporary is_constant ().
3621 (build_vector_type, build_opaque_vector_type): Take the number of
3622 units as a poly_uint64 rather than an int.
3623 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3625 * cfgexpand.c (expand_debug_expr): Likewise.
3626 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3627 (store_constructor, expand_expr_real_1): Likewise.
3628 (const_scalar_mask_from_tree): Likewise.
3629 * fold-const-call.c (fold_const_reduction): Likewise.
3630 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3631 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3632 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3633 (fold_relational_const): Likewise.
3634 (native_interpret_vector): Likewise. Change the size from an
3635 int to an unsigned int.
3636 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3637 TYPE_VECTOR_SUBPARTS.
3638 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3639 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3640 duplicating a non-constant operand into a variable-length vector.
3641 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3642 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3643 * ipa-icf.c (sem_variable::equals): Likewise.
3644 * match.pd: Likewise.
3645 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3646 * print-tree.c (print_node): Likewise.
3647 * stor-layout.c (layout_type): Likewise.
3648 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3649 * tree-cfg.c (verify_gimple_comparison): Likewise.
3650 (verify_gimple_assign_binary): Likewise.
3651 (verify_gimple_assign_ternary): Likewise.
3652 (verify_gimple_assign_single): Likewise.
3653 * tree-pretty-print.c (dump_generic_node): Likewise.
3654 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3655 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3656 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3657 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3658 (vect_shift_permute_load_chain): Likewise.
3659 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3660 (expand_vector_condition, optimize_vector_constructor): Likewise.
3661 (lower_vec_perm, get_compute_type): Likewise.
3662 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3663 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3664 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3665 (vect_recog_mask_conversion_pattern): Likewise.
3666 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3667 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3668 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3669 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3670 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3671 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3672 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3673 (supportable_widening_operation): Likewise.
3674 (supportable_narrowing_operation): Likewise.
3675 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3677 * varasm.c (output_constant): Likewise.
3679 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3680 Alan Hayward <alan.hayward@arm.com>
3681 David Sherwood <david.sherwood@arm.com>
3683 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3684 so that both the length == 3 and length != 3 cases set up their
3685 own permute vectors. Add comments explaining why we know the
3686 number of elements is constant.
3687 (vect_permute_load_chain): Likewise.
3689 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3690 Alan Hayward <alan.hayward@arm.com>
3691 David Sherwood <david.sherwood@arm.com>
3693 * machmode.h (mode_nunits): Change from unsigned char to
3695 (ONLY_FIXED_SIZE_MODES): New macro.
3696 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3697 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3698 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3700 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3701 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3702 or if measurement_type is not polynomial.
3703 * genmodes.c (ZERO_COEFFS): New macro.
3704 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3706 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3707 Use ZERO_COEFFS when emitting initializers.
3708 * data-streamer.h (bp_pack_poly_value): New function.
3709 (bp_unpack_poly_value): Likewise.
3710 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3711 for GET_MODE_NUNITS.
3712 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3713 for GET_MODE_NUNITS.
3714 * tree.c (make_vector_type): Remove temporary shim and make
3715 the real function take the number of units as a poly_uint64
3717 (build_vector_type_for_mode): Handle polynomial nunits.
3718 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3719 * emit-rtl.c (const_vec_series_p_1): Likewise.
3720 (gen_rtx_CONST_VECTOR): Likewise.
3721 * fold-const.c (test_vec_duplicate_folding): Likewise.
3722 * genrecog.c (validate_pattern): Likewise.
3723 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3724 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3725 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3726 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3727 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3728 * rtlanal.c (subreg_get_info): Likewise.
3729 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3730 (vect_grouped_load_supported): Likewise.
3731 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3732 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3733 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3734 (simplify_const_unary_operation, simplify_binary_operation_1)
3735 (simplify_const_binary_operation, simplify_ternary_operation)
3736 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3737 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3738 instead of CONST_VECTOR_NUNITS.
3739 * varasm.c (output_constant_pool_2): Likewise.
3740 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3741 explicit-encoded elements in the XVEC for variable-length vectors.
3743 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3745 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3747 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3748 Alan Hayward <alan.hayward@arm.com>
3749 David Sherwood <david.sherwood@arm.com>
3751 * coretypes.h (fixed_size_mode): Declare.
3752 (fixed_size_mode_pod): New typedef.
3753 * builtins.h (target_builtins::x_apply_args_mode)
3754 (target_builtins::x_apply_result_mode): Change type to
3755 fixed_size_mode_pod.
3756 * builtins.c (apply_args_size, apply_result_size, result_vector)
3757 (expand_builtin_apply_args_1, expand_builtin_apply)
3758 (expand_builtin_return): Update accordingly.
3760 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3762 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3763 * cselib.c (cselib_hash_rtx): Likewise.
3764 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3765 CONST_VECTOR encoding.
3767 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3768 Jeff Law <law@redhat.com>
3771 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3772 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3773 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3774 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3777 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3778 explicitly probe *sp in a noreturn function if there were any callee
3779 register saves or frame pointer is needed.
3781 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3784 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3785 BLKmode for ternary, binary or unary expressions.
3788 * var-tracking.c (delete_vta_debug_insn): New inline function.
3789 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3790 insns from get_insns () to NULL instead of each bb separately.
3791 Use delete_vta_debug_insn. No longer static.
3792 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3793 delete_vta_debug_insns callers.
3794 * rtl.h (delete_vta_debug_insns): Declare.
3795 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3796 instead of variable_tracking_main.
3798 2018-01-03 Martin Sebor <msebor@redhat.com>
3800 PR tree-optimization/83603
3801 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3802 arguments past the endof the argument list in functions declared
3803 without a prototype.
3804 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3805 Avoid checking when arguments are null.
3807 2018-01-03 Martin Sebor <msebor@redhat.com>
3810 * doc/extend.texi (attribute const): Fix a typo.
3811 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3812 issuing -Wsuggest-attribute for void functions.
3814 2018-01-03 Martin Sebor <msebor@redhat.com>
3816 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3817 offset_int::from instead of wide_int::to_shwi.
3818 (maybe_diag_overlap): Remove assertion.
3819 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3820 * gimple-ssa-sprintf.c (format_directive): Same.
3821 (parse_directive): Same.
3822 (sprintf_dom_walker::compute_format_length): Same.
3823 (try_substitute_return_value): Same.
3825 2017-01-03 Jeff Law <law@redhat.com>
3828 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3829 non-constant residual for zero at runtime and avoid probing in
3830 that case. Reorganize code for trailing problem to mirror handling
3833 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3835 PR tree-optimization/83501
3836 * tree-ssa-strlen.c (get_string_cst): New.
3837 (handle_char_store): Call get_string_cst.
3839 2018-01-03 Martin Liska <mliska@suse.cz>
3841 PR tree-optimization/83593
3842 * tree-ssa-strlen.c: Include tree-cfg.h.
3843 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3844 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3845 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3847 (strlen_dom_walker::before_dom_children): Call
3848 gimple_purge_dead_eh_edges. Dump tranformation with details
3850 (strlen_dom_walker::before_dom_children): Update call by adding
3851 new argument cleanup_eh.
3852 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3854 2018-01-03 Martin Liska <mliska@suse.cz>
3857 * cif-code.def (VARIADIC_THUNK): New enum value.
3858 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3861 2018-01-03 Jan Beulich <jbeulich@suse.com>
3863 * sse.md (mov<mode>_internal): Tighten condition for when to use
3864 vmovdqu<ssescalarsize> for TI and OI modes.
3866 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3868 Update copyright years.
3870 2018-01-03 Martin Liska <mliska@suse.cz>
3873 * ipa-visibility.c (function_and_variable_visibility): Skip
3874 functions with noipa attribure.
3876 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3878 * gcc.c (process_command): Update copyright notice dates.
3879 * gcov-dump.c (print_version): Ditto.
3880 * gcov.c (print_version): Ditto.
3881 * gcov-tool.c (print_version): Ditto.
3882 * gengtype.c (create_file): Ditto.
3883 * doc/cpp.texi: Bump @copying's copyright year.
3884 * doc/cppinternals.texi: Ditto.
3885 * doc/gcc.texi: Ditto.
3886 * doc/gccint.texi: Ditto.
3887 * doc/gcov.texi: Ditto.
3888 * doc/install.texi: Ditto.
3889 * doc/invoke.texi: Ditto.
3891 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3893 * vector-builder.h (vector_builder::m_full_nelts): Change from
3894 unsigned int to poly_uint64.
3895 (vector_builder::full_nelts): Update prototype accordingly.
3896 (vector_builder::new_vector): Likewise.
3897 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3898 (vector_builder::operator ==): Likewise.
3899 (vector_builder::finalize): Likewise.
3900 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3901 Take the number of elements as a poly_uint64 rather than an
3903 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3904 from unsigned int to poly_uint64.
3905 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3906 (vec_perm_indices::new_vector): Likewise.
3907 (vec_perm_indices::length): Likewise.
3908 (vec_perm_indices::nelts_per_input): Likewise.
3909 (vec_perm_indices::input_nelts): Likewise.
3910 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3911 number of elements per input as a poly_uint64 rather than an
3912 unsigned int. Use the original encoding for variable-length
3913 vectors, rather than clamping each individual element.
3914 For the second and subsequent elements in each pattern,
3915 clamp the step and base before clamping their sum.
3916 (vec_perm_indices::series_p): Handle polynomial element counts.
3917 (vec_perm_indices::all_in_range_p): Likewise.
3918 (vec_perm_indices_to_tree): Likewise.
3919 (vec_perm_indices_to_rtx): Likewise.
3920 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3921 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3922 (tree_vector_builder::new_binary_operation): Handle polynomial
3923 element counts. Return false if we need to know the number
3924 of elements at compile time.
3925 * fold-const.c (fold_vec_perm): Punt if the number of elements
3926 isn't known at compile time.
3928 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3930 * vec-perm-indices.h (vec_perm_builder): Change element type
3931 from HOST_WIDE_INT to poly_int64.
3932 (vec_perm_indices::element_type): Update accordingly.
3933 (vec_perm_indices::clamp): Handle polynomial element_types.
3934 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3935 (vec_perm_indices::all_in_range_p): Likewise.
3936 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3938 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3939 polynomial vec_perm_indices element types.
3940 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3941 * fold-const.c (fold_vec_perm): Likewise.
3942 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3943 * tree-vect-generic.c (lower_vec_perm): Likewise.
3944 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3945 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3946 element type to HOST_WIDE_INT.
3948 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3949 Alan Hayward <alan.hayward@arm.com>
3950 David Sherwood <david.sherwood@arm.com>
3952 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3953 rather than an int. Use plus_constant.
3954 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3955 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3957 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3958 Alan Hayward <alan.hayward@arm.com>
3959 David Sherwood <david.sherwood@arm.com>
3961 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3962 a HOST_WIDE_INT to a poly_int64.
3964 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3965 Alan Hayward <alan.hayward@arm.com>
3966 David Sherwood <david.sherwood@arm.com>
3968 * calls.c (load_register_parameters): Cope with polynomial
3969 mode sizes. Require a constant size for BLKmode parameters
3970 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3971 forces a parameter to be padded at the lsb end in order to
3972 fill a complete number of words, require the parameter size
3973 to be ordered wrt UNITS_PER_WORD.
3975 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3976 Alan Hayward <alan.hayward@arm.com>
3977 David Sherwood <david.sherwood@arm.com>
3979 * reload1.c (spill_stack_slot_width): Change element type
3980 from unsigned int to poly_uint64_pod.
3981 (alter_reg): Treat mode sizes as polynomial.
3983 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3984 Alan Hayward <alan.hayward@arm.com>
3985 David Sherwood <david.sherwood@arm.com>
3987 * reload.c (complex_word_subreg_p): New function.
3988 (reload_inner_reg_of_subreg, push_reload): Use it.
3990 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3991 Alan Hayward <alan.hayward@arm.com>
3992 David Sherwood <david.sherwood@arm.com>
3994 * lra-constraints.c (process_alt_operands): Reject matched
3995 operands whose sizes aren't ordered.
3996 (match_reload): Refer to this check here.
3998 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3999 Alan Hayward <alan.hayward@arm.com>
4000 David Sherwood <david.sherwood@arm.com>
4002 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4003 that the mode size is in the set {1, 2, 4, 8, 16}.
4005 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4006 Alan Hayward <alan.hayward@arm.com>
4007 David Sherwood <david.sherwood@arm.com>
4009 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4010 Use plus_constant instead of gen_rtx_PLUS.
4012 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4013 Alan Hayward <alan.hayward@arm.com>
4014 David Sherwood <david.sherwood@arm.com>
4016 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4017 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4018 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4019 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4020 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4021 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4022 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4023 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4024 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4025 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4027 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4028 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4029 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4030 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4031 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4032 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4033 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4034 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4035 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4036 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4038 * expr.c (emit_move_resolve_push): Treat the input and result
4039 of PUSH_ROUNDING as a poly_int64.
4040 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4041 (emit_push_insn): Likewise.
4042 * lra-eliminations.c (mark_not_eliminable): Likewise.
4043 * recog.c (push_operand): Likewise.
4044 * reload1.c (elimination_effects): Likewise.
4045 * rtlanal.c (nonzero_bits1): Likewise.
4046 * calls.c (store_one_arg): Likewise. Require the padding to be
4047 known at compile time.
4049 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4050 Alan Hayward <alan.hayward@arm.com>
4051 David Sherwood <david.sherwood@arm.com>
4053 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4054 Use plus_constant instead of gen_rtx_PLUS.
4056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4057 Alan Hayward <alan.hayward@arm.com>
4058 David Sherwood <david.sherwood@arm.com>
4060 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4063 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4064 Alan Hayward <alan.hayward@arm.com>
4065 David Sherwood <david.sherwood@arm.com>
4067 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4068 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4069 via stack temporaries. Treat the mode size as polynomial too.
4071 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4072 Alan Hayward <alan.hayward@arm.com>
4073 David Sherwood <david.sherwood@arm.com>
4075 * expr.c (expand_expr_real_2): When handling conversions involving
4076 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4077 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4078 as a poly_uint64 too.
4080 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4081 Alan Hayward <alan.hayward@arm.com>
4082 David Sherwood <david.sherwood@arm.com>
4084 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4086 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4087 Alan Hayward <alan.hayward@arm.com>
4088 David Sherwood <david.sherwood@arm.com>
4090 * combine.c (can_change_dest_mode): Handle polynomial
4091 REGMODE_NATURAL_SIZE.
4092 * expmed.c (store_bit_field_1): Likewise.
4093 * expr.c (store_constructor): Likewise.
4094 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4095 and polynomial REGMODE_NATURAL_SIZE.
4096 (gen_lowpart_common): Likewise.
4097 * reginfo.c (record_subregs_of_mode): Likewise.
4098 * rtlanal.c (read_modify_subreg_p): Likewise.
4100 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4101 Alan Hayward <alan.hayward@arm.com>
4102 David Sherwood <david.sherwood@arm.com>
4104 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4105 numbers of elements.
4107 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4108 Alan Hayward <alan.hayward@arm.com>
4109 David Sherwood <david.sherwood@arm.com>
4111 * match.pd: Cope with polynomial numbers of vector elements.
4113 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4114 Alan Hayward <alan.hayward@arm.com>
4115 David Sherwood <david.sherwood@arm.com>
4117 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4118 in a POINTER_PLUS_EXPR.
4120 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4121 Alan Hayward <alan.hayward@arm.com>
4122 David Sherwood <david.sherwood@arm.com>
4124 * omp-simd-clone.c (simd_clone_subparts): New function.
4125 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4126 (ipa_simd_modify_function_body): Likewise.
4128 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4129 Alan Hayward <alan.hayward@arm.com>
4130 David Sherwood <david.sherwood@arm.com>
4132 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4133 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4134 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4135 (expand_vector_condition, vector_element): Likewise.
4136 (subparts_gt): New function.
4137 (get_compute_type): Use subparts_gt.
4138 (count_type_subparts): Delete.
4139 (expand_vector_operations_1): Use subparts_gt instead of
4140 count_type_subparts.
4142 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4143 Alan Hayward <alan.hayward@arm.com>
4144 David Sherwood <david.sherwood@arm.com>
4146 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4147 (vect_compile_time_alias): ...this new function. Do the calculation
4148 on poly_ints rather than trees.
4149 (vect_prune_runtime_alias_test_list): Update call accordingly.
4151 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4152 Alan Hayward <alan.hayward@arm.com>
4153 David Sherwood <david.sherwood@arm.com>
4155 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4157 (vect_schedule_slp_instance): Likewise.
4159 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4160 Alan Hayward <alan.hayward@arm.com>
4161 David Sherwood <david.sherwood@arm.com>
4163 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4164 constant and extern definitions for variable-length vectors.
4165 (vect_get_constant_vectors): Note that the number of units
4166 is known to be constant.
4168 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4169 Alan Hayward <alan.hayward@arm.com>
4170 David Sherwood <david.sherwood@arm.com>
4172 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4173 of units as polynomial. Choose between WIDE and NARROW based
4176 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4177 Alan Hayward <alan.hayward@arm.com>
4178 David Sherwood <david.sherwood@arm.com>
4180 * tree-vect-stmts.c (simd_clone_subparts): New function.
4181 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4183 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4184 Alan Hayward <alan.hayward@arm.com>
4185 David Sherwood <david.sherwood@arm.com>
4187 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4188 vectors as polynomial. Use build_index_vector for
4191 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4192 Alan Hayward <alan.hayward@arm.com>
4193 David Sherwood <david.sherwood@arm.com>
4195 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4196 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4197 for variable-length vectors.
4198 (vectorizable_mask_load_store): Treat the number of units as
4199 polynomial, asserting that it is constant if the condition has
4200 already been enforced.
4201 (vectorizable_store, vectorizable_load): Likewise.
4203 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4204 Alan Hayward <alan.hayward@arm.com>
4205 David Sherwood <david.sherwood@arm.com>
4207 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4208 of units as polynomial. Punt if we can't tell at compile time
4209 which vector contains the final result.
4211 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4212 Alan Hayward <alan.hayward@arm.com>
4213 David Sherwood <david.sherwood@arm.com>
4215 * tree-vect-loop.c (vectorizable_induction): Treat the number
4216 of units as polynomial. Punt on SLP inductions. Use an integer
4217 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4218 cast of such a series for variable-length floating-point
4221 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4222 Alan Hayward <alan.hayward@arm.com>
4223 David Sherwood <david.sherwood@arm.com>
4225 * tree.h (build_index_vector): Declare.
4226 * tree.c (build_index_vector): New function.
4227 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4228 of units as polynomial, forcibly converting it to a constant if
4229 vectorizable_reduction has already enforced the condition.
4230 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4231 to create a {1,2,3,...} vector.
4232 (vectorizable_reduction): Treat the number of units as polynomial.
4233 Choose vectype_in based on the largest scalar element size rather
4234 than the smallest number of units. Enforce the restrictions
4237 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4238 Alan Hayward <alan.hayward@arm.com>
4239 David Sherwood <david.sherwood@arm.com>
4241 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4242 number of units as polynomial.
4244 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4245 Alan Hayward <alan.hayward@arm.com>
4246 David Sherwood <david.sherwood@arm.com>
4248 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4249 * target.def (autovectorize_vector_sizes): Return the vector sizes
4250 by pointer, using vector_sizes rather than a bitmask.
4251 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4252 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4253 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4255 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4256 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4257 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4258 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4259 * omp-general.c (omp_max_vf): Likewise.
4260 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4261 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4262 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4263 * tree-vect-slp.c (vect_slp_bb): Likewise.
4264 * doc/tm.texi: Regenerate.
4265 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4267 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4268 the vector size as a poly_uint64 rather than an unsigned int.
4269 (current_vector_size): Change from an unsigned int to a poly_uint64.
4270 (get_vectype_for_scalar_type): Update accordingly.
4271 * tree.h (build_truth_vector_type): Take the size and number of
4272 units as a poly_uint64 rather than an unsigned int.
4273 (build_vector_type): Add a temporary overload that takes
4274 the number of units as a poly_uint64 rather than an unsigned int.
4275 * tree.c (make_vector_type): Likewise.
4276 (build_truth_vector_type): Take the number of units as a poly_uint64
4277 rather than an unsigned int.
4279 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4280 Alan Hayward <alan.hayward@arm.com>
4281 David Sherwood <david.sherwood@arm.com>
4283 * target.def (get_mask_mode): Take the number of units and length
4284 as poly_uint64s rather than unsigned ints.
4285 * targhooks.h (default_get_mask_mode): Update accordingly.
4286 * targhooks.c (default_get_mask_mode): Likewise.
4287 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4288 * doc/tm.texi: Regenerate.
4290 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4291 Alan Hayward <alan.hayward@arm.com>
4292 David Sherwood <david.sherwood@arm.com>
4294 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4295 * omp-general.c (omp_max_vf): Likewise.
4296 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4297 (expand_omp_simd): Handle polynomial safelen.
4298 * omp-low.c (omplow_simd_context): Add a default constructor.
4299 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4300 (lower_rec_simd_input_clauses): Update accordingly.
4301 (lower_rec_input_clauses): Likewise.
4303 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4304 Alan Hayward <alan.hayward@arm.com>
4305 David Sherwood <david.sherwood@arm.com>
4307 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4308 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4309 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4310 (vect_analyze_slp_cost): Likewise.
4311 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4312 (vect_model_load_cost): Likewise.
4314 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4315 Alan Hayward <alan.hayward@arm.com>
4316 David Sherwood <david.sherwood@arm.com>
4318 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4319 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4320 from an unsigned int * to a poly_uint64_pod *.
4321 (calculate_unrolling_factor): New function.
4322 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4324 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4325 Alan Hayward <alan.hayward@arm.com>
4326 David Sherwood <david.sherwood@arm.com>
4328 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4329 from an unsigned int to a poly_uint64.
4330 (_loop_vec_info::slp_unrolling_factor): Likewise.
4331 (_loop_vec_info::vectorization_factor): Change from an int
4333 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4334 (vect_get_num_vectors): New function.
4335 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4336 (vect_get_num_copies): Use vect_get_num_vectors.
4337 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4338 to an unsigned int *.
4339 (vect_analyze_data_refs): Change min_vf from an int * to a
4341 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4342 than an unsigned HOST_WIDE_INT.
4343 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4344 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4345 to an unsigned int *.
4346 (vect_analyze_data_ref_dependences): Likewise.
4347 (vect_compute_data_ref_alignment): Handle polynomial vf.
4348 (vect_enhance_data_refs_alignment): Likewise.
4349 (vect_prune_runtime_alias_test_list): Likewise.
4350 (vect_shift_permute_load_chain): Likewise.
4351 (vect_supportable_dr_alignment): Likewise.
4352 (dependence_distance_ge_vf): Take the vectorization factor as a
4353 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4354 (vect_analyze_data_refs): Change min_vf from an int * to a
4356 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4357 vfm1 as a poly_uint64 rather than an int. Make the same change
4358 for the returned bound_scalar.
4359 (vect_gen_vector_loop_niters): Handle polynomial vf.
4360 (vect_do_peeling): Likewise. Update call to
4361 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4362 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4364 * tree-vect-loop.c (vect_determine_vectorization_factor)
4365 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4366 (vect_get_known_peeling_cost): Likewise.
4367 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4368 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4369 (vect_transform_loop): Likewise. Use the lowest possible VF when
4370 updating the upper bounds of the loop.
4371 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4373 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4374 polynomial unroll factors.
4375 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4376 (vect_make_slp_decision): Likewise.
4377 (vect_supported_load_permutation_p): Likewise, and polynomial
4379 (vect_analyze_slp_cost): Handle polynomial vf.
4380 (vect_slp_analyze_node_operations): Likewise.
4381 (vect_slp_analyze_bb_1): Likewise.
4382 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4383 than an unsigned HOST_WIDE_INT.
4384 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4385 (vectorizable_load): Handle polynomial vf.
4386 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4388 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4390 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4391 Alan Hayward <alan.hayward@arm.com>
4392 David Sherwood <david.sherwood@arm.com>
4394 * match.pd: Handle bit operations involving three constants
4395 and try to fold one pair.
4397 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4399 * tree-vect-loop-manip.c: Include gimple-fold.h.
4400 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4401 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4402 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4403 Add a path that uses a step of VF instead of 1, but disable it
4405 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4406 and niters_no_overflow parameters. Update calls to
4407 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4408 Create a new SSA name if the latter choses to use a ste other
4409 than zero, and return it via niters_vector_mult_vf_var.
4410 * tree-vect-loop.c (vect_transform_loop): Update calls to
4411 vect_do_peeling, vect_gen_vector_loop_niters and
4412 slpeel_make_loop_iterate_ntimes.
4413 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4414 (vect_gen_vector_loop_niters): Update declarations after above changes.
4416 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4418 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4419 128-bit round to integer instructions.
4420 (ceil<mode>2): Likewise.
4421 (btrunc<mode>2): Likewise.
4422 (round<mode>2): Likewise.
4424 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4426 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4427 unaligned VSX load/store on P8/P9.
4428 (expand_block_clear): Allow the use of unaligned VSX
4429 load/store on P8/P9.
4431 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4433 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4435 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4436 swap associated with both a load and a store.
4438 2018-01-02 Andrew Waterman <andrew@sifive.com>
4440 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4441 * config/riscv/riscv.md (clear_cache): Use it.
4443 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4445 * web.c: Remove out-of-date comment.
4447 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4449 * expr.c (fixup_args_size_notes): Check that any existing
4450 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4451 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4452 (emit_single_push_insn): ...here.
4454 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4456 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4457 (const_vector_encoded_nelts): New function.
4458 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4459 (const_vector_int_elt, const_vector_elt): Declare.
4460 * emit-rtl.c (const_vector_int_elt_1): New function.
4461 (const_vector_elt): Likewise.
4462 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4463 of CONST_VECTOR_ELT.
4465 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4467 * expr.c: Include rtx-vector-builder.h.
4468 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4469 directly on the tree encoding.
4470 (const_vector_from_tree): Likewise.
4471 * optabs.c: Include rtx-vector-builder.h.
4472 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4473 sequence of "u" values.
4474 * vec-perm-indices.c: Include rtx-vector-builder.h.
4475 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4476 directly on the vec_perm_indices encoding.
4478 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4480 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4481 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4482 * rtx-vector-builder.h: New file.
4483 * rtx-vector-builder.c: Likewise.
4484 * rtl.h (rtx_def::u2): Add a const_vector field.
4485 (CONST_VECTOR_NPATTERNS): New macro.
4486 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4487 (CONST_VECTOR_DUPLICATE_P): Likewise.
4488 (CONST_VECTOR_STEPPED_P): Likewise.
4489 (CONST_VECTOR_ENCODED_ELT): Likewise.
4490 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4491 (unwrap_const_vec_duplicate): Likewise.
4492 (const_vec_series_p): Check for a non-duplicated vector encoding.
4493 Say that the function only returns true for integer vectors.
4494 * emit-rtl.c: Include rtx-vector-builder.h.
4495 (gen_const_vec_duplicate_1): Delete.
4496 (gen_const_vector): Call gen_const_vec_duplicate instead of
4497 gen_const_vec_duplicate_1.
4498 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4499 (gen_const_vec_duplicate): Use rtx_vector_builder.
4500 (gen_const_vec_series): Likewise.
4501 (gen_rtx_CONST_VECTOR): Likewise.
4502 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4503 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4504 Build a new vector rather than modifying a CONST_VECTOR in-place.
4505 (handle_special_swappables): Update call accordingly.
4506 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4507 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4508 Build a new vector rather than modifying a CONST_VECTOR in-place.
4509 (handle_special_swappables): Update call accordingly.
4511 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4513 * simplify-rtx.c (simplify_const_binary_operation): Use
4514 CONST_VECTOR_ELT instead of XVECEXP.
4516 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4518 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4519 the selector elements to be different from the data elements
4520 if the selector is a VECTOR_CST.
4521 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4522 ssizetype for the selector.
4524 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4526 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4527 before testing each element individually.
4528 * tree-vect-generic.c (lower_vec_perm): Likewise.
4530 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4532 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4533 * selftest-run-tests.c (selftest::run_tests): Call it.
4534 * vector-builder.h (vector_builder::operator ==): New function.
4535 (vector_builder::operator !=): Likewise.
4536 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4537 (vec_perm_indices::all_from_input_p): New function.
4538 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4539 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4540 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4541 instead of reading the VECTOR_CST directly. Detect whether both
4542 vector inputs are the same before constructing the vec_perm_indices,
4543 and update the number of inputs argument accordingly. Use the
4544 utility functions added above. Only construct sel2 if we need to.
4546 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4548 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4549 the broadcast of the low byte.
4550 (expand_mult_highpart): Use an explicit encoding for the permutes.
4551 * optabs-query.c (can_mult_highpart_p): Likewise.
4552 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4553 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4554 (vectorizable_bswap): Likewise.
4555 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4556 explicit encoding for the power-of-2 permutes.
4557 (vect_permute_store_chain): Likewise.
4558 (vect_grouped_load_supported): Likewise.
4559 (vect_permute_load_chain): Likewise.
4561 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4563 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4564 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4565 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4566 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4567 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4568 (vect_gen_perm_mask_any): Likewise.
4570 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4572 * int-vector-builder.h: New file.
4573 * vec-perm-indices.h: Include int-vector-builder.h.
4574 (vec_perm_indices): Redefine as an int_vector_builder.
4575 (auto_vec_perm_indices): Delete.
4576 (vec_perm_builder): Redefine as a stand-alone class.
4577 (vec_perm_indices::vec_perm_indices): New function.
4578 (vec_perm_indices::clamp): Likewise.
4579 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4580 (vec_perm_indices::new_vector): New function.
4581 (vec_perm_indices::new_expanded_vector): Update for new
4582 vec_perm_indices class.
4583 (vec_perm_indices::rotate_inputs): New function.
4584 (vec_perm_indices::all_in_range_p): Operate directly on the
4585 encoded form, without computing elided elements.
4586 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4587 encoding. Update for new vec_perm_indices class.
4588 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4589 the given vec_perm_builder.
4590 (expand_vec_perm_var): Update vec_perm_builder constructor.
4591 (expand_mult_highpart): Use vec_perm_builder instead of
4592 auto_vec_perm_indices.
4593 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4594 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4595 or double series encoding as appropriate.
4596 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4597 vec_perm_indices instead of auto_vec_perm_indices.
4598 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4599 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4600 (vect_permute_store_chain): Likewise.
4601 (vect_grouped_load_supported): Likewise.
4602 (vect_permute_load_chain): Likewise.
4603 (vect_shift_permute_load_chain): Likewise.
4604 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4605 (vect_transform_slp_perm_load): Likewise.
4606 (vect_schedule_slp_instance): Likewise.
4607 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4608 (vectorizable_mask_load_store): Likewise.
4609 (vectorizable_bswap): Likewise.
4610 (vectorizable_store): Likewise.
4611 (vectorizable_load): Likewise.
4612 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4613 vec_perm_indices instead of auto_vec_perm_indices. Use
4614 tree_to_vec_perm_builder to read the vector from a tree.
4615 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4616 vec_perm_builder instead of a vec_perm_indices.
4617 (have_whole_vector_shift): Use vec_perm_builder and
4618 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4619 truncation to calc_vec_perm_mask_for_shift.
4620 (vect_create_epilog_for_reduction): Likewise.
4621 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4622 from auto_vec_perm_indices to vec_perm_indices.
4623 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4624 instead of changing individual elements.
4625 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4626 the vector in d.perm.
4627 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4628 from auto_vec_perm_indices to vec_perm_indices.
4629 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4630 instead of changing individual elements.
4631 (arm_vectorize_vec_perm_const): Use new_vector to install
4632 the vector in d.perm.
4633 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4634 Update vec_perm_builder constructor.
4635 (rs6000_expand_interleave): Likewise.
4636 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4637 (rs6000_expand_interleave): Likewise.
4639 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4641 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4642 to qimode could truncate the indices.
4643 * optabs.c (expand_vec_perm_var): Likewise.
4645 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4647 * Makefile.in (OBJS): Add vec-perm-indices.o.
4648 * vec-perm-indices.h: New file.
4649 * vec-perm-indices.c: Likewise.
4650 * target.h (vec_perm_indices): Replace with a forward class
4652 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4653 * optabs.h: Include vec-perm-indices.h.
4654 (expand_vec_perm): Delete.
4655 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4656 (expand_vec_perm_const): Declare.
4657 * target.def (vec_perm_const_ok): Replace with...
4658 (vec_perm_const): ...this new hook.
4659 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4660 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4661 * doc/tm.texi: Regenerate.
4662 * optabs.def (vec_perm_const): Delete.
4663 * doc/md.texi (vec_perm_const): Likewise.
4664 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4665 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4666 expand_vec_perm for constant permutation vectors. Assert that
4667 the mode of variable permutation vectors is the integer equivalent
4668 of the mode that is being permuted.
4669 * optabs-query.h (selector_fits_mode_p): Declare.
4670 * optabs-query.c: Include vec-perm-indices.h.
4671 (selector_fits_mode_p): New function.
4672 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4673 is defined, instead of checking whether the vec_perm_const_optab
4674 exists. Use targetm.vectorize.vec_perm_const instead of
4675 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4676 fit in the vector mode before using a variable permute.
4677 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4678 vec_perm_indices instead of an rtx.
4679 (expand_vec_perm): Replace with...
4680 (expand_vec_perm_const): ...this new function. Take the selector
4681 as a vec_perm_indices rather than an rtx. Also take the mode of
4682 the selector. Update call to shift_amt_for_vec_perm_mask.
4683 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4684 Use vec_perm_indices::new_expanded_vector to expand the original
4685 selector into bytes. Check whether the indices fit in the vector
4686 mode before using a variable permute.
4687 (expand_vec_perm_var): Make global.
4688 (expand_mult_highpart): Use expand_vec_perm_const.
4689 * fold-const.c: Includes vec-perm-indices.h.
4690 * tree-ssa-forwprop.c: Likewise.
4691 * tree-vect-data-refs.c: Likewise.
4692 * tree-vect-generic.c: Likewise.
4693 * tree-vect-loop.c: Likewise.
4694 * tree-vect-slp.c: Likewise.
4695 * tree-vect-stmts.c: Likewise.
4696 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4698 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4699 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4700 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4701 (aarch64_vectorize_vec_perm_const): ...this new function.
4702 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4703 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4704 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4705 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4706 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4707 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4708 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4710 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4711 check for NEON modes.
4712 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4713 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4714 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4715 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4717 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4718 the old VEC_PERM_CONST conditions.
4719 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4720 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4721 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4722 (ia64_vectorize_vec_perm_const_ok): Merge into...
4723 (ia64_vectorize_vec_perm_const): ...this new function.
4724 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4725 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4726 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4727 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4728 * config/mips/mips.c (mips_expand_vec_perm_const)
4729 (mips_vectorize_vec_perm_const_ok): Merge into...
4730 (mips_vectorize_vec_perm_const): ...this new function.
4731 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4732 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4733 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4734 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4735 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4736 (rs6000_expand_vec_perm_const): Delete.
4737 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4739 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4740 (altivec_expand_vec_perm_const_le): Take each operand individually.
4741 Operate on constant selectors rather than rtxes.
4742 (altivec_expand_vec_perm_const): Likewise. Update call to
4743 altivec_expand_vec_perm_const_le.
4744 (rs6000_expand_vec_perm_const): Delete.
4745 (rs6000_vectorize_vec_perm_const_ok): Delete.
4746 (rs6000_vectorize_vec_perm_const): New function.
4747 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4748 an element count and rtx array.
4749 (rs6000_expand_extract_even): Update call accordingly.
4750 (rs6000_expand_interleave): Likewise.
4751 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4752 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4753 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4754 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4755 (rs6000_expand_vec_perm_const): Delete.
4756 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4757 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4758 (altivec_expand_vec_perm_const_le): Take each operand individually.
4759 Operate on constant selectors rather than rtxes.
4760 (altivec_expand_vec_perm_const): Likewise. Update call to
4761 altivec_expand_vec_perm_const_le.
4762 (rs6000_expand_vec_perm_const): Delete.
4763 (rs6000_vectorize_vec_perm_const_ok): Delete.
4764 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4765 reference to the SPE evmerge intructions.
4766 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4767 an element count and rtx array.
4768 (rs6000_expand_extract_even): Update call accordingly.
4769 (rs6000_expand_interleave): Likewise.
4770 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4771 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4773 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4775 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4777 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4778 vector mode and that that mode matches the mode of the data
4780 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4781 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4782 directly using expand_vec_perm_1 when forcing selectors into
4784 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4786 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4788 * optabs-query.h (can_vec_perm_p): Delete.
4789 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4790 * optabs-query.c (can_vec_perm_p): Split into...
4791 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4792 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4793 particular selector is valid.
4794 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4795 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4796 (vect_grouped_load_supported): Likewise.
4797 (vect_shift_permute_load_chain): Likewise.
4798 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4799 (vect_transform_slp_perm_load): Likewise.
4800 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4801 (vectorizable_bswap): Likewise.
4802 (vect_gen_perm_mask_checked): Likewise.
4803 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4804 implementations of variable permutation vectors into account
4805 when deciding which selector to use.
4806 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4807 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4808 with a false third argument.
4809 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4810 to test whether the constant selector is valid and can_vec_perm_var_p
4811 to test whether a variable selector is valid.
4813 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4815 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4816 * optabs-query.c (can_vec_perm_p): Likewise.
4817 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4818 instead of vec_perm_indices.
4819 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4820 (vect_gen_perm_mask_checked): Likewise,
4821 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4822 (vect_gen_perm_mask_checked): Likewise,
4824 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4826 * optabs-query.h (qimode_for_vec_perm): Declare.
4827 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4828 (qimode_for_vec_perm): ...this new function.
4829 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4831 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4833 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4834 does not have a conditional at the top.
4836 2018-01-02 Richard Biener <rguenther@suse.de>
4838 * ipa-inline.c (big_speedup_p): Fix expression.
4840 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4843 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4846 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4850 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4851 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4852 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4853 cond_taken_branch_cost 3->4.
4855 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4857 PR tree-optimization/83581
4858 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4859 TODO_cleanup_cfg if any changes have been made.
4862 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4863 convert_modes if target mode has the right side, but different mode
4867 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4868 last argument when extracting from CONCAT. If either from_real or
4869 from_imag is NULL, use expansion through memory. If result is not
4870 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4871 the parts directly to inner mode, if even that fails, use expansion
4875 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4876 check for bswap in mode rather than HImode and use that in expand_unop
4879 Copyright (C) 2018 Free Software Foundation, Inc.
4881 Copying and distribution of this file, with or without modification,
4882 are permitted in any medium without royalty provided the copyright
4883 notice and this notice are preserved.