2008-08-25 Vladimir Makarov <vmakarov@redhat.com>
[official-gcc.git] / gcc / caller-save.c
blob76ff2360fb7f96ebbdc3a8c816a7802413a0fbe9
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "rtl.h"
26 #include "regs.h"
27 #include "insn-config.h"
28 #include "flags.h"
29 #include "hard-reg-set.h"
30 #include "recog.h"
31 #include "basic-block.h"
32 #include "reload.h"
33 #include "function.h"
34 #include "expr.h"
35 #include "toplev.h"
36 #include "tm_p.h"
37 #include "addresses.h"
38 #include "output.h"
39 #include "cfgloop.h"
40 #include "df.h"
41 #include "ggc.h"
43 /* Call used hard registers which can not be saved because there is no
44 insn for this. */
45 HARD_REG_SET no_caller_save_reg_set;
47 #ifndef MAX_MOVE_MAX
48 #define MAX_MOVE_MAX MOVE_MAX
49 #endif
51 #ifndef MIN_UNITS_PER_WORD
52 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
53 #endif
55 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
57 /* Modes for each hard register that we can save. The smallest mode is wide
58 enough to save the entire contents of the register. When saving the
59 register because it is live we first try to save in multi-register modes.
60 If that is not possible the save is done one register at a time. */
62 static enum machine_mode
63 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
65 /* For each hard register, a place on the stack where it can be saved,
66 if needed. */
68 static rtx
69 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
71 /* The number of elements in the subsequent array. */
72 static int save_slots_num;
74 /* Allocated slots so far. */
75 static rtx save_slots[FIRST_PSEUDO_REGISTER];
77 /* We will only make a register eligible for caller-save if it can be
78 saved in its widest mode with a simple SET insn as long as the memory
79 address is valid. We record the INSN_CODE is those insns here since
80 when we emit them, the addresses might not be valid, so they might not
81 be recognized. */
83 static int
84 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
85 static int
86 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
88 /* Set of hard regs currently residing in save area (during insn scan). */
90 static HARD_REG_SET hard_regs_saved;
92 /* Number of registers currently in hard_regs_saved. */
94 static int n_regs_saved;
96 /* Computed by mark_referenced_regs, all regs referenced in a given
97 insn. */
98 static HARD_REG_SET referenced_regs;
99 /* Computed by mark_referenced_regs, all regs modified in a given insn. */
100 static HARD_REG_SET modified_regs;
103 static int reg_save_code (int, enum machine_mode);
104 static int reg_restore_code (int, enum machine_mode);
106 struct saved_hard_reg;
107 static void initiate_saved_hard_regs (void);
108 static struct saved_hard_reg *new_saved_hard_reg (int, int);
109 static void finish_saved_hard_regs (void);
110 static int saved_hard_reg_compare_func (const void *, const void *);
111 static void calculate_local_save_info (void);
112 static bool restore_trans_fun (int);
113 static void restore_con_fun_0 (basic_block);
114 static void restore_con_fun_n (edge);
115 static void calculate_restore_in_out (void);
116 static int calculate_restore_here (void);
117 static bool save_trans_fun (int);
118 static void save_con_fun_0 (basic_block);
119 static void save_con_fun_n (edge);
120 static void calculate_save_in_out (void);
121 static int calculate_save_here (void);
122 static bool free_trans_fun (int);
123 static void free_con_fun_0 (basic_block);
124 static void free_con_fun_n (edge);
125 static void calculate_free_in_out (void);
127 static void make_global_save_analysis (void);
128 static void print_annotated_hard_reg_set (FILE *, HARD_REG_SET,
129 unsigned char *, int *);
130 static void print_hard_reg_set (FILE *, HARD_REG_SET);
131 static void print_save_data (FILE *);
132 static void set_hard_reg_saved (HARD_REG_SET, unsigned char *,
133 enum machine_mode *, int *, int *);
135 static void mark_set_regs (rtx, const_rtx, void *);
136 static void add_stored_regs (rtx, const_rtx, void *);
137 static void mark_referenced_regs (rtx, int);
138 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
139 enum machine_mode *, int *);
140 static int insert_restore (struct insn_chain *, int, int, int,
141 enum machine_mode *, int *);
142 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
143 rtx);
144 static void add_stored_regs (rtx, const_rtx, void *);
148 static GTY(()) rtx savepat;
149 static GTY(()) rtx restpat;
150 static GTY(()) rtx test_reg;
151 static GTY(()) rtx test_mem;
152 static GTY(()) rtx saveinsn;
153 static GTY(()) rtx restinsn;
155 /* Return the INSN_CODE used to save register REG in mode MODE. */
156 static int
157 reg_save_code (int reg, enum machine_mode mode)
159 bool ok;
160 if (cached_reg_save_code[reg][mode])
161 return cached_reg_save_code[reg][mode];
162 if (!HARD_REGNO_MODE_OK (reg, mode))
164 cached_reg_save_code[reg][mode] = -1;
165 cached_reg_restore_code[reg][mode] = -1;
166 return -1;
169 /* Update the register number and modes of the register
170 and memory operand. */
171 SET_REGNO (test_reg, reg);
172 PUT_MODE (test_reg, mode);
173 PUT_MODE (test_mem, mode);
175 /* Force re-recognition of the modified insns. */
176 INSN_CODE (saveinsn) = -1;
177 INSN_CODE (restinsn) = -1;
179 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
180 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
182 /* Now extract both insns and see if we can meet their
183 constraints. */
184 ok = (cached_reg_save_code[reg][mode] != -1
185 && cached_reg_restore_code[reg][mode] != -1);
186 if (ok)
188 extract_insn (saveinsn);
189 ok = constrain_operands (1);
190 extract_insn (restinsn);
191 ok &= constrain_operands (1);
194 if (! ok)
196 cached_reg_save_code[reg][mode] = -1;
197 cached_reg_restore_code[reg][mode] = -1;
199 gcc_assert (cached_reg_save_code[reg][mode]);
200 return cached_reg_save_code[reg][mode];
203 /* Return the INSN_CODE used to restore register REG in mode MODE. */
204 static int
205 reg_restore_code (int reg, enum machine_mode mode)
207 if (cached_reg_restore_code[reg][mode])
208 return cached_reg_restore_code[reg][mode];
209 /* Populate our cache. */
210 reg_save_code (reg, mode);
211 return cached_reg_restore_code[reg][mode];
214 /* Initialize for caller-save.
216 Look at all the hard registers that are used by a call and for which
217 regclass.c has not already excluded from being used across a call.
219 Ensure that we can find a mode to save the register and that there is a
220 simple insn to save and restore the register. This latter check avoids
221 problems that would occur if we tried to save the MQ register of some
222 machines directly into memory. */
224 void
225 init_caller_save (void)
227 rtx addr_reg;
228 int offset;
229 rtx address;
230 int i, j;
232 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
233 /* First find all the registers that we need to deal with and all
234 the modes that they can have. If we can't find a mode to use,
235 we can't have the register live over calls. */
237 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
239 if (call_used_regs[i] && ! call_fixed_regs[i])
241 for (j = 1; j <= MOVE_MAX_WORDS; j++)
243 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
244 VOIDmode);
245 if (regno_save_mode[i][j] == VOIDmode && j == 1)
247 call_fixed_regs[i] = 1;
248 SET_HARD_REG_BIT (call_fixed_reg_set, i);
252 else
253 regno_save_mode[i][1] = VOIDmode;
256 /* The following code tries to approximate the conditions under which
257 we can easily save and restore a register without scratch registers or
258 other complexities. It will usually work, except under conditions where
259 the validity of an insn operand is dependent on the address offset.
260 No such cases are currently known.
262 We first find a typical offset from some BASE_REG_CLASS register.
263 This address is chosen by finding the first register in the class
264 and by finding the smallest power of two that is a valid offset from
265 that register in every mode we will use to save registers. */
267 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
268 if (TEST_HARD_REG_BIT
269 (reg_class_contents
270 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i))
271 break;
273 gcc_assert (i < FIRST_PSEUDO_REGISTER);
275 addr_reg = gen_rtx_REG (Pmode, i);
277 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
279 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
282 if (regno_save_mode[i][1] != VOIDmode
283 && ! strict_memory_address_p (regno_save_mode[i][1], address))
284 break;
286 if (i == FIRST_PSEUDO_REGISTER)
287 break;
290 /* If we didn't find a valid address, we must use register indirect. */
291 if (offset == 0)
292 address = addr_reg;
294 /* Next we try to form an insn to save and restore the register. We
295 see if such an insn is recognized and meets its constraints.
297 To avoid lots of unnecessary RTL allocation, we construct all the RTL
298 once, then modify the memory and register operands in-place. */
300 test_reg = gen_rtx_REG (VOIDmode, 0);
301 test_mem = gen_rtx_MEM (VOIDmode, address);
302 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
303 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
305 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);
306 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);
308 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
309 for (j = 1; j <= MOVE_MAX_WORDS; j++)
310 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
312 regno_save_mode[i][j] = VOIDmode;
313 if (j == 1)
315 call_fixed_regs[i] = 1;
316 SET_HARD_REG_BIT (call_fixed_reg_set, i);
317 if (call_used_regs[i])
318 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
325 /* Initialize save areas by showing that we haven't allocated any yet. */
327 void
328 init_save_areas (void)
330 int i, j;
332 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
333 for (j = 1; j <= MOVE_MAX_WORDS; j++)
334 regno_save_mem[i][j] = 0;
335 save_slots_num = 0;
339 /* The structure represents a hard register which should be saved
340 through the call. It is used when the integrated register
341 allocator (IRA) is used and sharing save slots is on. */
342 struct saved_hard_reg
344 /* Order number starting with 0. */
345 int num;
346 /* The hard regno. */
347 int hard_regno;
348 /* Execution frequency of all calls through which given hard
349 register should be saved. */
350 int call_freq;
351 /* Stack slot reserved to save the hard register through calls. */
352 rtx slot;
353 /* True if it is first hard register in the chain of hard registers
354 sharing the same stack slot. */
355 int first_p;
356 /* Order number of the next hard register structure with the same
357 slot in the chain. -1 represents end of the chain. */
358 int next;
361 /* Map: hard register number to the corresponding structure. */
362 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
364 /* The number of all structures representing hard registers should be
365 saved, in order words, the number of used elements in the following
366 array. */
367 static int saved_regs_num;
369 /* Pointers to all the structures. Index is the order number of the
370 corresponding structure. */
371 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
373 /* First called function for work with saved hard registers. */
374 static void
375 initiate_saved_hard_regs (void)
377 int i;
379 saved_regs_num = 0;
380 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
381 hard_reg_map[i] = NULL;
384 /* Allocate and return new saved hard register with given REGNO and
385 CALL_FREQ. */
386 static struct saved_hard_reg *
387 new_saved_hard_reg (int regno, int call_freq)
389 struct saved_hard_reg *saved_reg;
391 saved_reg
392 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
393 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
394 saved_reg->num = saved_regs_num++;
395 saved_reg->hard_regno = regno;
396 saved_reg->call_freq = call_freq;
397 saved_reg->first_p = FALSE;
398 saved_reg->next = -1;
399 return saved_reg;
402 /* Free memory allocated for the saved hard registers. */
403 static void
404 finish_saved_hard_regs (void)
406 int i;
408 for (i = 0; i < saved_regs_num; i++)
409 free (all_saved_regs[i]);
412 /* The function is used to sort the saved hard register structures
413 according their frequency. */
414 static int
415 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
417 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
418 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
420 if (flag_omit_frame_pointer)
422 if (p1->call_freq - p2->call_freq != 0)
423 return p1->call_freq - p2->call_freq;
425 else if (p2->call_freq - p1->call_freq != 0)
426 return p2->call_freq - p1->call_freq;
428 return p1->num - p2->num;
431 /* Allocate save areas for any hard registers that might need saving.
432 We take a conservative approach here and look for call-clobbered hard
433 registers that are assigned to pseudos that cross calls. This may
434 overestimate slightly (especially if some of these registers are later
435 used as spill registers), but it should not be significant.
437 For IRA we use priority coloring to decrease stack slots needed for
438 saving hard registers through calls. We build conflicts for them
439 to do coloring.
441 Future work:
443 In the fallback case we should iterate backwards across all possible
444 modes for the save, choosing the largest available one instead of
445 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
447 We do not try to use "move multiple" instructions that exist
448 on some machines (such as the 68k moveml). It could be a win to try
449 and use them when possible. The hard part is doing it in a way that is
450 machine independent since they might be saving non-consecutive
451 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
453 void
454 setup_save_areas (void)
456 int i, j, k;
457 unsigned int r;
458 HARD_REG_SET hard_regs_used;
460 /* Allocate space in the save area for the largest multi-register
461 pseudos first, then work backwards to single register
462 pseudos. */
464 /* Find and record all call-used hard-registers in this function. */
465 CLEAR_HARD_REG_SET (hard_regs_used);
466 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
467 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
469 unsigned int regno = reg_renumber[i];
470 unsigned int endregno
471 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
472 for (r = regno; r < endregno; r++)
473 if (call_used_regs[r])
474 SET_HARD_REG_BIT (hard_regs_used, r);
477 if (flag_ira && optimize && flag_ira_share_save_slots)
479 rtx insn, slot;
480 struct insn_chain *chain, *next;
481 char *saved_reg_conflicts;
482 unsigned int regno;
483 int next_k, freq;
484 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;
485 int call_saved_regs_num;
486 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
487 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
488 reg_set_iterator rsi;
489 int best_slot_num;
490 int prev_save_slots_num;
491 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
493 initiate_saved_hard_regs ();
494 /* Create hard reg saved regs. */
495 for (chain = reload_insn_chain; chain != 0; chain = next)
497 insn = chain->insn;
498 next = chain->next;
499 if (GET_CODE (insn) != CALL_INSN
500 || find_reg_note (insn, REG_NORETURN, NULL))
501 continue;
502 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
503 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
504 &chain->live_throughout);
505 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
507 /* Record all registers set in this call insn. These don't
508 need to be saved. N.B. the call insn might set a subreg
509 of a multi-hard-reg pseudo; then the pseudo is considered
510 live during the call, but the subreg that is set
511 isn't. */
512 CLEAR_HARD_REG_SET (this_insn_sets);
513 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
514 /* Sibcalls are considered to set the return value. */
515 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
516 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
518 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
519 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
520 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
521 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
522 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
524 if (hard_reg_map[regno] != NULL)
525 hard_reg_map[regno]->call_freq += freq;
526 else
527 saved_reg = new_saved_hard_reg (regno, freq);
529 /* Look through all live pseudos, mark their hard registers. */
530 EXECUTE_IF_SET_IN_REG_SET
531 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
533 int r = reg_renumber[regno];
534 int bound;
536 if (r < 0)
537 continue;
539 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
540 for (; r < bound; r++)
541 if (TEST_HARD_REG_BIT (used_regs, r))
543 if (hard_reg_map[r] != NULL)
544 hard_reg_map[r]->call_freq += freq;
545 else
546 saved_reg = new_saved_hard_reg (r, freq);
547 SET_HARD_REG_BIT (hard_regs_to_save, r);
551 /* Find saved hard register conflicts. */
552 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
553 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
554 for (chain = reload_insn_chain; chain != 0; chain = next)
556 call_saved_regs_num = 0;
557 insn = chain->insn;
558 next = chain->next;
559 if (GET_CODE (insn) != CALL_INSN
560 || find_reg_note (insn, REG_NORETURN, NULL))
561 continue;
562 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
563 &chain->live_throughout);
564 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
566 /* Record all registers set in this call insn. These don't
567 need to be saved. N.B. the call insn might set a subreg
568 of a multi-hard-reg pseudo; then the pseudo is considered
569 live during the call, but the subreg that is set
570 isn't. */
571 CLEAR_HARD_REG_SET (this_insn_sets);
572 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
573 /* Sibcalls are considered to set the return value,
574 compare flow.c:propagate_one_insn. */
575 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
576 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
578 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
579 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
580 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
581 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
582 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
584 gcc_assert (hard_reg_map[regno] != NULL);
585 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
587 /* Look through all live pseudos, mark their hard registers. */
588 EXECUTE_IF_SET_IN_REG_SET
589 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
591 int r = reg_renumber[regno];
592 int bound;
594 if (r < 0)
595 continue;
597 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
598 for (; r < bound; r++)
599 if (TEST_HARD_REG_BIT (used_regs, r))
600 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
602 for (i = 0; i < call_saved_regs_num; i++)
604 saved_reg = call_saved_regs[i];
605 for (j = 0; j < call_saved_regs_num; j++)
606 if (i != j)
608 saved_reg2 = call_saved_regs[j];
609 saved_reg_conflicts[saved_reg->num * saved_regs_num
610 + saved_reg2->num]
611 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
612 + saved_reg->num]
613 = TRUE;
617 /* Sort saved hard regs. */
618 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
619 saved_hard_reg_compare_func);
620 /* Initiate slots available from the previous reload
621 iteration. */
622 prev_save_slots_num = save_slots_num;
623 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
624 save_slots_num = 0;
625 /* Allocate stack slots for the saved hard registers. */
626 for (i = 0; i < saved_regs_num; i++)
628 saved_reg = all_saved_regs[i];
629 regno = saved_reg->hard_regno;
630 for (j = 0; j < i; j++)
632 saved_reg2 = all_saved_regs[j];
633 if (! saved_reg2->first_p)
634 continue;
635 slot = saved_reg2->slot;
636 for (k = j; k >= 0; k = next_k)
638 saved_reg3 = all_saved_regs[k];
639 next_k = saved_reg3->next;
640 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
641 + saved_reg3->num])
642 break;
644 if (k < 0
645 && (GET_MODE_SIZE (regno_save_mode[regno][1])
646 <= GET_MODE_SIZE (regno_save_mode
647 [saved_reg2->hard_regno][1])))
649 saved_reg->slot
650 = adjust_address_nv
651 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
652 regno_save_mem[regno][1] = saved_reg->slot;
653 saved_reg->next = saved_reg2->next;
654 saved_reg2->next = i;
655 if (dump_file != NULL)
656 fprintf (dump_file, "%d uses slot of %d\n",
657 regno, saved_reg2->hard_regno);
658 break;
661 if (j == i)
663 saved_reg->first_p = TRUE;
664 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
666 slot = prev_save_slots[j];
667 if (slot == NULL_RTX)
668 continue;
669 if (GET_MODE_SIZE (regno_save_mode[regno][1])
670 <= GET_MODE_SIZE (GET_MODE (slot))
671 && best_slot_num < 0)
672 best_slot_num = j;
673 if (GET_MODE (slot) == regno_save_mode[regno][1])
674 break;
676 if (best_slot_num >= 0)
678 saved_reg->slot = prev_save_slots[best_slot_num];
679 saved_reg->slot
680 = adjust_address_nv
681 (saved_reg->slot,
682 regno_save_mode[saved_reg->hard_regno][1], 0);
683 if (dump_file != NULL)
684 fprintf (dump_file,
685 "%d uses a slot from prev iteration\n", regno);
686 prev_save_slots[best_slot_num] = NULL_RTX;
687 if (best_slot_num + 1 == prev_save_slots_num)
688 prev_save_slots_num--;
690 else
692 saved_reg->slot
693 = assign_stack_local_1
694 (regno_save_mode[regno][1],
695 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true);
696 if (dump_file != NULL)
697 fprintf (dump_file, "%d uses a new slot\n", regno);
699 regno_save_mem[regno][1] = saved_reg->slot;
700 save_slots[save_slots_num++] = saved_reg->slot;
703 free (saved_reg_conflicts);
704 finish_saved_hard_regs ();
706 else
708 /* Now run through all the call-used hard-registers and allocate
709 space for them in the caller-save area. Try to allocate space
710 in a manner which allows multi-register saves/restores to be done. */
712 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
713 for (j = MOVE_MAX_WORDS; j > 0; j--)
715 int do_save = 1;
717 /* If no mode exists for this size, try another. Also break out
718 if we have already saved this hard register. */
719 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
720 continue;
722 /* See if any register in this group has been saved. */
723 for (k = 0; k < j; k++)
724 if (regno_save_mem[i + k][1])
726 do_save = 0;
727 break;
729 if (! do_save)
730 continue;
732 for (k = 0; k < j; k++)
733 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
735 do_save = 0;
736 break;
738 if (! do_save)
739 continue;
741 /* We have found an acceptable mode to store in. Since
742 hard register is always saved in the widest mode
743 available, the mode may be wider than necessary, it is
744 OK to reduce the alignment of spill space. We will
745 verify that it is equal to or greater than required
746 when we restore and save the hard register in
747 insert_restore and insert_save. */
748 regno_save_mem[i][j]
749 = assign_stack_local_1 (regno_save_mode[i][j],
750 GET_MODE_SIZE (regno_save_mode[i][j]),
751 0, true);
753 /* Setup single word save area just in case... */
754 for (k = 0; k < j; k++)
755 /* This should not depend on WORDS_BIG_ENDIAN.
756 The order of words in regs is the same as in memory. */
757 regno_save_mem[i + k][1]
758 = adjust_address_nv (regno_save_mem[i][j],
759 regno_save_mode[i + k][1],
760 k * UNITS_PER_WORD);
764 /* Now loop again and set the alias set of any save areas we made to
765 the alias set used to represent frame objects. */
766 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
767 for (j = MOVE_MAX_WORDS; j > 0; j--)
768 if (regno_save_mem[i][j] != 0)
769 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
774 /* This page contains code for global analysis for better placement
775 save/restore insn when IRA is used.
777 First, we calculate local BB info in function calculate_local_save_info:
778 o hard registers set/mentioned in basic blocks (they prevents
779 moving corresponding saves/restores further up/down in CFG) --
780 see comments for save_kill/restore_kill.
781 o hard registers needed to be saved/restored around calls and
782 which are not set/mentioned before/after the call in the basic
783 block -- see comments for save_gen/restore_gen.
784 o free hard registers at the basic block start -- see comments
785 for free_gen. This set can be different from save_gen. For
786 example, in the following situation
790 insn using R
792 call through which R live through and should be saved/restored.
795 save_gen contains R because we can put save at the BB start but
796 free_gen does not contain R because we can not use R for other
797 purposes from the BB start till the insn using R.
799 Second, we calculate the global info for placement saves/restores
800 in functions -- see comments for save_in, save_out, restore_in,
801 restore_out, free_in, free_out.
803 The equations for the global info calculation are not trivial
804 because we can not put saves/restores on CFG edges as the reload
805 can not work when new BBs added. For example, it means that all
806 save_out set of BB should be a subset of intersections of save_in
807 of all successors of the BB. Preventing putting the code on edges
808 makes data flow problem bidirectional. The data flow functions are
809 also complicated by necessity to propagate saving modes (e.g. x86
810 fp register can be saved in XFmode or DFmode).
812 The equations do not permit to propagate info into the loops
813 because we can not put saves/restores in more frequently executed
814 points. But if the loop does not contains references for a hard
815 register, we permit to propagate info for the register into the
816 loop because the info will be propagated through all the loop and
817 as consequence corresponding saves/restores will be moved through
818 the loop.
820 Third, using this info we place saves/restores and set up member
821 `saved' in function save_call_clobbered_regs.
825 /* The following structure contains basic block data flow information
826 used to optimize save/restore placement. Data flow equations are
827 bidirectional because we don't want to put save/restore code on CFG
828 edges. */
829 struct bb_info
831 /* True if save_out/restore_in should be empty for this block. */
832 int empty_save_out_p, empty_restore_in_p;
833 /* Hard registers set/mentioned in the BB. */
834 HARD_REG_SET save_kill;
835 HARD_REG_SET restore_kill;
836 /* Hard registers needed to be saved and this save not killed (see above)
837 by an insn in the BB before that. */
838 HARD_REG_SET save_gen;
839 /* Hard registers needed to be restored and this restore not killed
840 by an insn in the BB after that. */
841 HARD_REG_SET restore_gen;
842 /* Hard registers free and not killed by an insn in the BB before
843 that. */
844 HARD_REG_SET free_gen;
845 /* Registers needed to be saved/restored at the start and end of the
846 basic block. */
847 HARD_REG_SET save_in, save_out, restore_in, restore_out;
848 /* Registers free at the start and end of the basic block. */
849 HARD_REG_SET free_in, free_out;
850 /* Hard registers living at the start/end of the basic block. */
851 HARD_REG_SET live_at_start, live_at_end;
852 /* We don't want to generate save/restore insns on edges because it
853 changes CFG during the reload. To prevent this we use the
854 following set. This set defines what hard registers should be
855 saved/restored at the start/end of basic block. */
856 HARD_REG_SET save_here, restore_here;
857 /* It corresponds to set SAVE_GEN right after the call of
858 calculate_local_save_info. */
859 unsigned char save_in_mode[FIRST_PSEUDO_REGISTER];
860 /* Saving modes at the end of the basic block. */
861 unsigned char save_out_mode[FIRST_PSEUDO_REGISTER];
862 /* Restoring modes at the start of the basic block. */
863 unsigned char restore_in_mode[FIRST_PSEUDO_REGISTER];
864 /* It corresponds to set RESTORE_GEN right after the call of
865 calculate_local_save_info. */
866 unsigned char restore_out_mode[FIRST_PSEUDO_REGISTER];
867 /* Analogous but the corresponding pseudo-register numbers. */
868 int save_in_pseudo[FIRST_PSEUDO_REGISTER];
869 int save_out_pseudo[FIRST_PSEUDO_REGISTER];
870 int restore_in_pseudo[FIRST_PSEUDO_REGISTER];
871 int restore_out_pseudo[FIRST_PSEUDO_REGISTER];
874 /* Macros for accessing data flow information of basic blocks. */
875 #define BB_INFO(BB) ((struct bb_info *) (BB)->aux)
876 #define BB_INFO_BY_INDEX(N) BB_INFO (BASIC_BLOCK(N))
878 /* The following structure contains loop info necessary for
879 save/restore placement optimization. */
880 struct loop_info
882 /* All hard registers mentioned in the loop. If a pseudo is
883 mentioned in the loop, the hard registers assigned to it are also
884 believed to be mentioned in the loop. */
885 HARD_REG_SET mentioned_regs;
888 /* Macro for accessing data flow information of LOOP. */
889 #define LOOP_INFO(LOOP) ((struct loop_info *) (LOOP)->aux)
891 /* The function calculates sets KILL, GEN, LIVE_AT_START and
892 RESTORE_OUT_MODES corresponding to GEN for basic blocks. */
893 static void
894 calculate_local_save_info (void)
896 int i, empty_save_out_p, empty_restore_in_p;
897 struct insn_chain *chain, *next;
898 struct bb_info *bb_info;
899 /* Computed in mark_set_regs, holds all registers set by the current
900 instruction. */
901 HARD_REG_SET save_kill, restore_kill;
902 HARD_REG_SET this_insn_sets, save_gen, restore_gen, free_gen, temp_set;
903 unsigned regno;
904 reg_set_iterator rsi;
905 /* A map: hard register being saved to the mode used for its
906 saving. */
907 enum machine_mode save_mode[FIRST_PSEUDO_REGISTER];
908 /* A map: hard register being saved to the pseudo-register assigned
909 to the hard register at given point. */
910 int save_pseudo[FIRST_PSEUDO_REGISTER];
912 CLEAR_HARD_REG_SET (save_gen);
913 CLEAR_HARD_REG_SET (restore_gen);
914 CLEAR_HARD_REG_SET (free_gen);
915 CLEAR_HARD_REG_SET (save_kill);
916 CLEAR_HARD_REG_SET (restore_kill);
917 empty_save_out_p = FALSE;
918 empty_restore_in_p = FALSE;
919 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
921 save_mode[i] = VOIDmode;
922 save_pseudo[i] = -1;
925 for (chain = reload_insn_chain; chain != 0; chain = next)
927 rtx insn = chain->insn;
928 enum rtx_code code = GET_CODE (insn);
930 next = chain->next;
932 bb_info = BB_INFO_BY_INDEX (chain->block);
933 if (INSN_P (insn))
935 CLEAR_HARD_REG_SET (referenced_regs);
936 CLEAR_HARD_REG_SET (modified_regs);
937 mark_referenced_regs (PATTERN (insn), FALSE);
938 AND_COMPL_HARD_REG_SET (restore_gen, referenced_regs);
939 IOR_HARD_REG_SET (restore_kill, referenced_regs);
940 IOR_HARD_REG_SET (save_kill, modified_regs);
942 if (code == CALL_INSN && find_reg_note (insn, REG_NORETURN, NULL))
944 SET_HARD_REG_SET (save_kill);
945 SET_HARD_REG_SET (restore_kill);
947 else if (code == CALL_INSN)
949 HARD_REG_SET hard_regs_to_save, used_regs;
951 /* Use the register life information in CHAIN to compute
952 which regs are live during the call. */
953 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
954 &chain->live_throughout);
955 /* Look through all live pseudos, mark their hard registers
956 and choose proper mode for saving. */
957 EXECUTE_IF_SET_IN_REG_SET
958 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
960 int r = reg_renumber[regno];
961 int nregs;
962 enum machine_mode mode;
964 /* Remember live_throughout can contain spilled
965 registers when IRA is used. */
966 if (flag_ira && optimize && r < 0)
967 continue;
968 gcc_assert (r >= 0);
970 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
971 mode = HARD_REGNO_CALLER_SAVE_MODE
972 (r, nregs, PSEUDO_REGNO_MODE (regno));
973 if (nregs == 1)
975 SET_HARD_REG_BIT (hard_regs_to_save, r);
976 save_mode[r] = mode;
977 save_pseudo[r] = regno;
979 else
981 while (nregs-- > 0)
983 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
984 save_mode[r + nregs]
985 = regno_save_mode[r + nregs][1];
986 save_pseudo[r + nregs] = regno;
991 /* Record all registers set in this call insn. These
992 don't need to be saved. N.B. the call insn might set
993 a subreg of a multi-hard-reg pseudo; then the pseudo
994 is considered live during the call, but the subreg
995 that is set isn't. */
996 CLEAR_HARD_REG_SET (this_insn_sets);
997 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
998 /* Sibcalls are considered to set the return value. */
999 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
1000 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
1002 /* Compute which hard regs must be saved before this call. */
1003 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
1004 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
1005 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
1006 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
1007 IOR_HARD_REG_SET (restore_gen, hard_regs_to_save);
1008 COPY_HARD_REG_SET (temp_set, hard_regs_to_save);
1009 AND_COMPL_HARD_REG_SET (temp_set, save_kill);
1010 AND_COMPL_HARD_REG_SET (temp_set, save_gen);
1011 IOR_HARD_REG_SET (save_gen, temp_set);
1012 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1013 if (TEST_HARD_REG_BIT (temp_set, i))
1015 bb_info->save_in_mode[i] = save_mode[i];
1016 bb_info->save_in_pseudo[i] = save_pseudo[i];
1018 COPY_HARD_REG_SET (temp_set, hard_regs_to_save);
1019 AND_COMPL_HARD_REG_SET (temp_set, save_kill);
1020 AND_COMPL_HARD_REG_SET (temp_set, restore_kill);
1021 IOR_HARD_REG_SET (free_gen, temp_set);
1025 if (chain->next == 0 || chain->next->block != chain->block)
1027 basic_block bb = BASIC_BLOCK (chain->block);
1028 edge e;
1029 edge_iterator ei;
1030 loop_p loop;
1032 if (! empty_save_out_p)
1033 FOR_EACH_EDGE (e, ei, bb->succs)
1034 if (e->flags & EDGE_ABNORMAL)
1036 empty_save_out_p = TRUE;
1037 break;
1039 bb_info->empty_save_out_p = empty_save_out_p;
1040 empty_save_out_p = FALSE;
1041 if (! empty_restore_in_p)
1042 FOR_EACH_EDGE (e, ei, bb->preds)
1043 if (e->flags & EDGE_ABNORMAL)
1045 empty_restore_in_p = TRUE;
1046 break;
1048 bb_info->empty_restore_in_p = empty_restore_in_p;
1049 empty_restore_in_p = FALSE;
1050 COPY_HARD_REG_SET (bb_info->save_gen, save_gen);
1051 COPY_HARD_REG_SET (bb_info->restore_gen, restore_gen);
1052 COPY_HARD_REG_SET (bb_info->free_gen, free_gen);
1053 CLEAR_HARD_REG_SET (bb_info->restore_in);
1054 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1056 bb_info->save_out_mode[i] = VOIDmode;
1057 bb_info->save_out_pseudo[i] = -1;
1058 if (!TEST_HARD_REG_BIT (save_gen, i))
1060 bb_info->save_in_mode[i] = VOIDmode;
1061 bb_info->save_in_pseudo[i] = -1;
1063 bb_info->restore_in_mode[i] = VOIDmode;
1064 bb_info->restore_in_pseudo[i] = -1;
1065 if (TEST_HARD_REG_BIT (restore_gen, i))
1067 bb_info->restore_out_mode[i] = save_mode[i];
1068 bb_info->restore_out_pseudo[i] = save_pseudo[i];
1070 else
1072 bb_info->restore_out_mode[i] = VOIDmode;
1073 bb_info->restore_out_pseudo[i] = -1;
1076 COPY_HARD_REG_SET (bb_info->save_kill, save_kill);
1077 COPY_HARD_REG_SET (bb_info->restore_kill, restore_kill);
1078 for (loop = bb->loop_father;
1079 loop != current_loops->tree_root;
1080 loop = loop_outer (loop))
1082 struct loop_info *loop_info = LOOP_INFO (loop);
1084 IOR_HARD_REG_SET (loop_info->mentioned_regs, save_kill);
1085 IOR_HARD_REG_SET (loop_info->mentioned_regs, restore_kill);
1087 CLEAR_HARD_REG_SET (bb_info->save_in);
1088 CLEAR_HARD_REG_SET (bb_info->restore_out);
1089 CLEAR_HARD_REG_SET (bb_info->free_in);
1090 /* We don't use LIVE for IRA. */
1091 REG_SET_TO_HARD_REG_SET
1092 (bb_info->live_at_end,
1093 flag_ira ? DF_LR_OUT (bb) : DF_LIVE_OUT (bb));
1094 EXECUTE_IF_SET_IN_REG_SET
1095 ((flag_ira ? DF_LR_OUT (bb) : DF_LIVE_OUT (bb)),
1096 FIRST_PSEUDO_REGISTER, regno, rsi)
1098 int r = reg_renumber[regno];
1099 int nregs;
1101 if (r < 0)
1102 continue;
1103 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
1104 while (nregs-- > 0)
1105 SET_HARD_REG_BIT (bb_info->live_at_end, r + nregs);
1107 REG_SET_TO_HARD_REG_SET
1108 (bb_info->live_at_start,
1109 flag_ira ? DF_LR_IN (bb) : DF_LIVE_IN (bb));
1110 EXECUTE_IF_SET_IN_REG_SET
1111 ((flag_ira ? DF_LR_IN (bb) : DF_LIVE_IN (bb)),
1112 FIRST_PSEUDO_REGISTER, regno, rsi)
1114 int r = reg_renumber[regno];
1115 int nregs;
1117 if (r < 0)
1118 continue;
1119 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
1120 while (nregs-- > 0)
1121 SET_HARD_REG_BIT (bb_info->live_at_start, r + nregs);
1123 CLEAR_HARD_REG_SET (bb_info->save_here);
1124 CLEAR_HARD_REG_SET (bb_info->restore_here);
1125 CLEAR_HARD_REG_SET (save_gen);
1126 CLEAR_HARD_REG_SET (restore_gen);
1127 CLEAR_HARD_REG_SET (free_gen);
1128 CLEAR_HARD_REG_SET (save_kill);
1129 CLEAR_HARD_REG_SET (restore_kill);
1130 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1132 save_mode[i] = VOIDmode;
1133 save_pseudo[i] = -1;
1139 /* The transfer function used by the DF equation solver to propagate restore
1140 info through block with BB_INDEX according to the following
1141 equation:
1143 bb.restore_out = (bb.restore_in - bb.restore_kill) U bb.restore_gen.
1145 The function also propagates saving modes of the hard
1146 registers. */
1147 static bool
1148 restore_trans_fun (int bb_index)
1150 int i;
1151 HARD_REG_SET temp_set;
1152 struct bb_info *bb_info = BB_INFO_BY_INDEX (bb_index);
1154 COPY_HARD_REG_SET (temp_set, bb_info->restore_in);
1155 AND_COMPL_HARD_REG_SET (temp_set, bb_info->restore_kill);
1156 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1157 if (TEST_HARD_REG_BIT (temp_set, i)
1158 && ! TEST_HARD_REG_BIT (bb_info->restore_gen, i))
1160 gcc_assert (bb_info->restore_out_mode[i] == VOIDmode
1161 || ((bb_info->restore_out_mode[i]
1162 == bb_info->restore_in_mode[i])
1163 && (bb_info->restore_out_pseudo[i]
1164 == bb_info->restore_in_pseudo[i])));
1165 bb_info->restore_out_mode[i] = bb_info->restore_in_mode[i];
1166 bb_info->restore_out_pseudo[i] = bb_info->restore_in_pseudo[i];
1168 IOR_HARD_REG_SET (temp_set, bb_info->restore_gen);
1169 if (! hard_reg_set_equal_p (temp_set, bb_info->restore_out))
1171 COPY_HARD_REG_SET (bb_info->restore_out, temp_set);
1172 return true;
1174 return false;
1177 /* The confluence function used by the DF equation solver to set up restore info
1178 for a block BB without predecessor. */
1179 static void
1180 restore_con_fun_0 (basic_block bb)
1182 CLEAR_HARD_REG_SET (BB_INFO (bb)->restore_in);
1185 /* The confluence function used by the DF equation solver to propagate
1186 restore info from predecessor to successor on edge E (pred->bb)
1187 according to the following equation:
1189 bb.restore_in = empty for entry block or one with empty_restore_in_p
1190 | ^(pred.restore_out - pred.restore_here) ^ bb.live_at_start
1192 If the edge is a loop enter we do not propagate the info because we
1193 don't want to put restores in more frequently executed places.
1196 static void
1197 restore_con_fun_n (edge e)
1199 int i;
1200 HARD_REG_SET temp_set;
1201 basic_block pred = e->src;
1202 basic_block bb = e->dest;
1203 struct bb_info *bb_info = BB_INFO (bb);
1205 if (bb_info->empty_restore_in_p)
1206 return;
1208 COPY_HARD_REG_SET (temp_set, BB_INFO (pred)->restore_out);
1209 AND_COMPL_HARD_REG_SET (temp_set, BB_INFO (pred)->restore_here);
1210 if (bb->loop_depth > pred->loop_depth)
1211 AND_COMPL_HARD_REG_SET (temp_set,
1212 LOOP_INFO (bb->loop_father)->mentioned_regs);
1213 AND_HARD_REG_SET (temp_set, bb_info->live_at_start);
1214 if (EDGE_PRED (bb, 0) == e)
1215 COPY_HARD_REG_SET (bb_info->restore_in, temp_set);
1216 else
1217 AND_HARD_REG_SET (bb_info->restore_in, temp_set);
1218 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1219 if (TEST_HARD_REG_BIT (temp_set, i))
1221 if (bb_info->restore_in_mode[i] != VOIDmode
1222 && BB_INFO (pred)->restore_out_mode[i] != VOIDmode
1223 && (bb_info->restore_in_mode[i]
1224 != BB_INFO (pred)->restore_out_mode[i]
1225 || bb_info->restore_in_pseudo[i]
1226 != BB_INFO (pred)->restore_out_pseudo[i]))
1227 CLEAR_HARD_REG_BIT (bb_info->restore_in, i);
1228 else if (BB_INFO (pred)->restore_out_mode[i] != VOIDmode)
1230 bb_info->restore_in_mode[i]
1231 = BB_INFO (pred)->restore_out_mode[i];
1232 bb_info->restore_in_pseudo[i]
1233 = BB_INFO (pred)->restore_out_pseudo[i];
1238 /* Basic blocks for data flow problem -- all bocks except the special
1239 ones. */
1240 static bitmap all_blocks;
1242 /* The function calculates global restore information according
1243 to the following equations:
1245 bb.restore_in = empty for entry block or one with empty_restore_in_p
1246 | ^(pred.restore_out - pred.restore_here) ^ bb.live_at_start
1247 bb.restore_out = (bb.restore_in - bb.restore_kill) U bb.restore_gen.
1249 The function also calculates restore_in_mode and restore_out_mode.
1251 static void
1252 calculate_restore_in_out (void)
1254 df_simple_dataflow (DF_FORWARD, NULL, restore_con_fun_0, restore_con_fun_n,
1255 restore_trans_fun, all_blocks,
1256 df_get_postorder (DF_FORWARD),
1257 df_get_n_blocks (DF_FORWARD));
1260 /* The function calculates RESTORE_HERE according to the equation
1261 bb.restore_here = U ((bb.restore_out - succ.restore_in)
1262 ^ succ.live_at_start). */
1263 static int
1264 calculate_restore_here (void)
1266 basic_block bb;
1267 edge e;
1268 edge_iterator ei;
1269 HARD_REG_SET restore_here, temp_set;
1270 int changed_p = FALSE;
1272 FOR_EACH_BB (bb)
1274 CLEAR_HARD_REG_SET (restore_here);
1275 FOR_EACH_EDGE (e, ei, bb->succs)
1277 basic_block dest = e->dest;
1279 COPY_HARD_REG_SET (temp_set, BB_INFO (bb)->restore_out);
1280 AND_COMPL_HARD_REG_SET (temp_set, BB_INFO (dest)->restore_in);
1281 AND_HARD_REG_SET (temp_set, BB_INFO (dest)->live_at_start);
1282 IOR_HARD_REG_SET (restore_here, temp_set);
1285 if (! hard_reg_set_equal_p (restore_here, BB_INFO (bb)->restore_here))
1287 COPY_HARD_REG_SET (BB_INFO (bb)->restore_here, restore_here);
1288 changed_p = TRUE;
1291 return changed_p;
1294 /* The transfer function used by the DF equation solver to propagate save info
1295 through block with BB_INDEX according to the following
1296 equation:
1298 bb.save_in = ((bb.save_out - bb.save_kill) U bb.save_gen) - bb.restore_in.
1300 The function also propagates saving modes of the hard
1301 registers. */
1303 static bool
1304 save_trans_fun (int bb_index)
1306 int i;
1307 HARD_REG_SET temp_set;
1308 struct bb_info *bb_info = BB_INFO_BY_INDEX (bb_index);
1310 COPY_HARD_REG_SET (temp_set, bb_info->save_out);
1311 AND_COMPL_HARD_REG_SET (temp_set, bb_info->save_kill);
1312 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1313 if (TEST_HARD_REG_BIT (temp_set, i)
1314 && ! TEST_HARD_REG_BIT (bb_info->save_gen, i))
1316 gcc_assert (bb_info->save_in_mode[i] == VOIDmode
1317 || ((bb_info->save_in_mode[i]
1318 == bb_info->save_out_mode[i])
1319 && (bb_info->save_in_pseudo[i]
1320 == bb_info->save_out_pseudo[i])));
1321 bb_info->save_in_mode[i] = bb_info->save_out_mode[i];
1322 bb_info->save_in_pseudo[i] = bb_info->save_out_pseudo[i];
1324 IOR_HARD_REG_SET (temp_set, bb_info->save_gen);
1325 AND_COMPL_HARD_REG_SET (temp_set, bb_info->restore_in);
1326 if (! hard_reg_set_equal_p (temp_set, bb_info->save_in))
1328 COPY_HARD_REG_SET (bb_info->save_in, temp_set);
1329 return true;
1331 return false;
1334 /* The confluence function used by the DF equation solver to set up
1335 save info for a block BB without successor. */
1336 static void
1337 save_con_fun_0 (basic_block bb)
1339 CLEAR_HARD_REG_SET (BB_INFO (bb)->save_out);
1342 /* The confluence function used by the DF equation solver to propagate
1343 save info from successor to predecessor on edge E (bb->succ)
1344 according to the following equation:
1346 bb.save_out = empty for exit block or one with empty_save_out_p
1347 | ^(succ.save_in - succ.save_here) ^ bb.live_at_end
1349 If the edge is a loop exit we do not propagate the info because we
1350 don't want to put saves in more frequently executed places.
1352 static void
1353 save_con_fun_n (edge e)
1355 int i;
1356 HARD_REG_SET temp_set;
1357 basic_block succ = e->dest;
1358 basic_block bb = e->src;
1359 struct bb_info *bb_info = BB_INFO (bb);
1361 if (bb_info->empty_save_out_p)
1362 return;
1364 COPY_HARD_REG_SET (temp_set, BB_INFO (succ)->save_in);
1365 AND_COMPL_HARD_REG_SET (temp_set, BB_INFO (succ)->save_here);
1366 if (bb->loop_depth > succ->loop_depth)
1367 AND_COMPL_HARD_REG_SET (temp_set,
1368 LOOP_INFO (bb->loop_father)->mentioned_regs);
1369 AND_HARD_REG_SET (temp_set, bb_info->live_at_end);
1370 if (EDGE_SUCC (bb, 0) == e)
1371 COPY_HARD_REG_SET (bb_info->save_out, temp_set);
1372 else
1373 AND_HARD_REG_SET (bb_info->save_out, temp_set);
1374 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1375 if (TEST_HARD_REG_BIT (temp_set, i))
1377 if (bb_info->save_out_mode[i] != VOIDmode
1378 && BB_INFO (succ)->save_in_mode[i] != VOIDmode
1379 && ((bb_info->save_out_mode[i]
1380 != BB_INFO (succ)->save_in_mode[i])
1381 || (bb_info->save_out_pseudo[i]
1382 != BB_INFO (succ)->save_in_pseudo[i])))
1383 CLEAR_HARD_REG_BIT (bb_info->save_out, i);
1384 else if (BB_INFO (succ)->save_in_mode[i] != VOIDmode)
1386 bb_info->save_out_mode[i]
1387 = BB_INFO (succ)->save_in_mode[i];
1388 bb_info->save_out_pseudo[i]
1389 = BB_INFO (succ)->save_in_pseudo[i];
1394 /* The transfer function calculates global save information according
1395 to the following equations:
1397 bb.save_out = empty for exit block or one with empty_save_out_p
1398 | ^(succ.save_in - succ.save_here) ^ bb.live_at_end
1399 bb.save_in = ((bb.save_out - bb.save_kill) U bb.save_gen) - bb.restore_in.
1401 The function also calculates save_in_mode and save_out_mode.
1403 static void
1404 calculate_save_in_out (void)
1406 df_simple_dataflow (DF_BACKWARD, NULL, save_con_fun_0, save_con_fun_n,
1407 save_trans_fun, all_blocks,
1408 df_get_postorder (DF_BACKWARD),
1409 df_get_n_blocks (DF_BACKWARD));
1412 /* The function calculates SAVE_HERE according to the equation
1413 bb.save_here = U ((bb.save_in - pred.save_out) ^ pred.live_at_end). */
1414 static int
1415 calculate_save_here (void)
1417 basic_block bb;
1418 edge e;
1419 edge_iterator ei;
1420 HARD_REG_SET save_here, temp_set;
1421 int changed_p = FALSE;
1423 FOR_EACH_BB (bb)
1425 CLEAR_HARD_REG_SET (save_here);
1426 FOR_EACH_EDGE (e, ei, bb->preds)
1428 basic_block src = e->src;
1430 COPY_HARD_REG_SET (temp_set, BB_INFO (bb)->save_in);
1431 AND_COMPL_HARD_REG_SET (temp_set, BB_INFO (src)->save_out);
1432 AND_HARD_REG_SET (temp_set, BB_INFO (src)->live_at_end);
1433 IOR_HARD_REG_SET (save_here, temp_set);
1436 if (! hard_reg_set_equal_p (save_here, BB_INFO (bb)->save_here))
1438 COPY_HARD_REG_SET (BB_INFO (bb)->save_here, save_here);
1439 changed_p = TRUE;
1442 return changed_p;
1445 /* The transfer function used by the DF equation solver to propagate
1446 free info through block with BB_INDEX according to the following
1447 equation:
1449 bb.free_in = ((bb.free_out - bb.save_kill - bb.restore_kill) U bb.free_gen)
1450 - bb.save_here)
1453 static bool
1454 free_trans_fun (int bb_index)
1456 HARD_REG_SET temp_set;
1457 struct bb_info *bb_info = BB_INFO_BY_INDEX (bb_index);
1459 COPY_HARD_REG_SET (temp_set, bb_info->free_out);
1460 AND_COMPL_HARD_REG_SET (temp_set, bb_info->save_kill);
1461 AND_COMPL_HARD_REG_SET (temp_set, bb_info->restore_kill);
1462 IOR_HARD_REG_SET (temp_set, bb_info->free_gen);
1463 AND_COMPL_HARD_REG_SET (temp_set, bb_info->save_here);
1464 if (! hard_reg_set_equal_p (temp_set, bb_info->free_in))
1466 COPY_HARD_REG_SET (bb_info->free_in, temp_set);
1467 return true;
1469 return false;
1472 /* The confluence function used by the DF equation solver to set up
1473 free info for a block BB without successor. */
1474 static void
1475 free_con_fun_0 (basic_block bb)
1477 CLEAR_HARD_REG_SET (BB_INFO (bb)->free_out);
1480 /* The confluence function used by the DF equation solver to propagate
1481 free info from successor to predecessor on edge E (bb->succ)
1482 according to the following equation:
1484 bb.free_out = ^(succ.free_in ^ bb.live_at_end)
1486 static void
1487 free_con_fun_n (edge e)
1489 HARD_REG_SET temp_set;
1490 basic_block succ = e->dest;
1491 basic_block bb = e->src;
1492 struct bb_info *bb_info = BB_INFO (bb);
1494 COPY_HARD_REG_SET (temp_set, BB_INFO (succ)->free_in);
1495 if (EDGE_SUCC (bb, 0) == e)
1496 COPY_HARD_REG_SET (bb_info->free_out, temp_set);
1497 else
1498 AND_HARD_REG_SET (bb_info->free_out, temp_set);
1499 AND_HARD_REG_SET (bb_info->free_out, bb_info->live_at_end);
1502 /* The function calculates global free information according
1503 to the following equations:
1505 bb.free_out = ^(succ.free_in ^ bb.live_at_end)
1506 bb.free_in = ((bb.free_out - bb.save_kill - bb.restore_kill) U bb.free_gen)
1507 - bb.save_here)
1509 The function also calculates free_in_mode and free_out_mode.
1511 static void
1512 calculate_free_in_out (void)
1514 basic_block bb;
1516 FOR_EACH_BB (bb)
1518 struct bb_info *bb_info = BB_INFO (bb);
1520 COPY_HARD_REG_SET (bb_info->free_in, bb_info->save_in);
1521 IOR_HARD_REG_SET (bb_info->free_in, bb_info->restore_in);
1522 COPY_HARD_REG_SET (bb_info->free_out, bb_info->save_out);
1523 IOR_HARD_REG_SET (bb_info->free_out, bb_info->restore_out);
1525 df_simple_dataflow (DF_BACKWARD, NULL, free_con_fun_0, free_con_fun_n,
1526 free_trans_fun, all_blocks,
1527 df_get_postorder (DF_BACKWARD),
1528 df_get_n_blocks (DF_BACKWARD));
1531 /* The function calculates the global save/restore information used to put
1532 save/restore code without generating new blocks. This is a
1533 bidirectional data flow problem (calculation of SAVE_IN and
1534 SAVE_OUT is a backward data flow problem and SAVE_HERE is forward
1535 one; calculation of RESTORE_IN and RESTORE_OUT is a forward data
1536 flow problem and RESTORE_HERE is backward one). It is complicated
1537 by necessity of calculation of modes for saving/restoring callee
1538 clobbered hard registers. */
1539 static void
1540 make_global_save_analysis (void)
1542 basic_block bb;
1543 int iter, changed_p;
1545 all_blocks = BITMAP_ALLOC (NULL);
1546 FOR_ALL_BB (bb)
1548 bitmap_set_bit (all_blocks, bb->index);
1550 calculate_local_save_info ();
1551 for (iter = 1;; iter++)
1553 calculate_restore_in_out ();
1554 changed_p = calculate_restore_here ();
1555 if (! changed_p)
1556 break;
1558 if (dump_file != NULL)
1559 fprintf (dump_file, " Number of global restore analysis iterations %d\n",
1560 iter);
1561 for (iter = 1;; iter++)
1563 calculate_save_in_out ();
1564 changed_p = calculate_save_here ();
1565 if (! changed_p)
1566 break;
1568 if (dump_file != NULL)
1569 fprintf (dump_file, " Number of global save analysis iterations %d\n",
1570 iter);
1571 calculate_free_in_out ();
1572 BITMAP_FREE (all_blocks);
1575 /* Print hard registers in SET to file F. The registers are printed
1576 with its mode given in MODES and corresponding pseudo given in
1577 PSEUDOS. */
1578 static void
1579 print_annotated_hard_reg_set (FILE *f, HARD_REG_SET set,
1580 unsigned char *modes, int *pseudos)
1582 int i;
1584 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1585 if (TEST_HARD_REG_BIT (set, i))
1587 fprintf (f, " %d", i);
1588 if (pseudos[i] >= 0)
1589 fprintf (f, "(%d)", pseudos[i]);
1590 fprintf (f, ":%s %s", GET_MODE_NAME (modes[i]), reg_names[i]);
1594 /* Print hard registers in SET to file F. */
1595 static void
1596 print_hard_reg_set (FILE *f, HARD_REG_SET set)
1598 int i;
1600 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1601 if (TEST_HARD_REG_BIT (set, i))
1602 fprintf (f, " %d %s", i, reg_names[i]);
1605 /* Print the save information for each block to file F. */
1606 static void
1607 print_save_data (FILE *f)
1609 basic_block bb;
1610 struct bb_info *bb_info;
1611 edge e;
1612 edge_iterator ei;
1614 FOR_EACH_BB (bb)
1616 bb_info = BB_INFO (bb);
1617 fprintf (f, "bb %d (preds", bb->index);
1618 FOR_EACH_EDGE (e, ei, bb->preds)
1620 fprintf (f, " %d", e->src->index);
1622 fprintf (f, ") (succs");
1623 FOR_EACH_EDGE (e, ei, bb->succs)
1625 fprintf (f, " %d", e->dest->index);
1627 fprintf (f, ")\n empty_save_out_p=%d", bb_info->empty_save_out_p);
1628 fprintf (f, ", empty_restore_in_p=%d", bb_info->empty_restore_in_p);
1629 fprintf (f, "\n save_in:");
1630 print_annotated_hard_reg_set
1631 (f, bb_info->save_in, bb_info->save_in_mode, bb_info->save_in_pseudo);
1632 fprintf (f, "\n save_out:");
1633 print_annotated_hard_reg_set
1634 (f, bb_info->save_out,
1635 bb_info->save_out_mode, bb_info->save_out_pseudo);
1636 fprintf (f, "\n restore_in:");
1637 print_annotated_hard_reg_set
1638 (f, bb_info->restore_in,
1639 bb_info->restore_in_mode, bb_info->restore_in_pseudo);
1640 fprintf (f, "\n restore_out:");
1641 print_annotated_hard_reg_set
1642 (f, bb_info->restore_out,
1643 bb_info->restore_out_mode, bb_info->restore_out_pseudo);
1644 fprintf (f, "\n free_in:");
1645 print_hard_reg_set (f, bb_info->free_in);
1646 fprintf (f, "\n free_out:");
1647 print_hard_reg_set (f, bb_info->free_out);
1648 fprintf (f, "\n live_at_start:");
1649 print_hard_reg_set (f, bb_info->live_at_start);
1650 fprintf (f, "\n live_at_end:");
1651 print_hard_reg_set (f, bb_info->live_at_end);
1652 fprintf (f, "\n save_here:");
1653 print_hard_reg_set (f, bb_info->save_here);
1654 fprintf (f, "\n restore_here:");
1655 print_hard_reg_set (f, bb_info->restore_here);
1656 fprintf (f, "\n save_kill:");
1657 print_hard_reg_set (f, bb_info->save_kill);
1658 fprintf (f, "\n restore_kill:");
1659 print_hard_reg_set (f, bb_info->restore_kill);
1660 fprintf (f, "\n save_gen:");
1661 print_hard_reg_set (f, bb_info->save_gen);
1662 fprintf (f, "\n restore_gen:");
1663 print_hard_reg_set (f, bb_info->restore_gen);
1664 fprintf (f, "\n free_gen:");
1665 print_hard_reg_set (f, bb_info->save_gen);
1666 fprintf (f, "\n\n");
1670 /* Print the save information for each block to stderr. */
1671 void
1672 debug_save_data (void)
1674 print_save_data (stderr);
1678 /* Setup hard registers in SET to save. Setup also their save modes
1679 in SAVE_MODE from FROM_SAVE_MODE and their pseudos in SAVE_PSEUDO
1680 from FROM_SAVE_PSEUDO. */
1681 static void
1682 set_hard_reg_saved (HARD_REG_SET set, unsigned char *from_saved_mode,
1683 enum machine_mode *save_mode, int *from_saved_pseudo,
1684 int *save_pseudo)
1686 int regno;
1688 n_regs_saved = 0;
1689 COPY_HARD_REG_SET (hard_regs_saved, set);
1690 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1691 if (TEST_HARD_REG_BIT (set, regno))
1693 n_regs_saved++;
1694 save_mode[regno] = from_saved_mode[regno];
1695 save_pseudo[regno] = from_saved_pseudo[regno];
1697 else
1699 save_mode[regno] = VOIDmode;
1700 save_pseudo[regno] = -1;
1706 /* Find the places where hard regs are live across calls and save them. */
1708 void
1709 save_call_clobbered_regs (void)
1711 unsigned int regno;
1712 /* Computed in mark_set_regs, holds all registers set by the current
1713 instruction. */
1714 HARD_REG_SET this_insn_sets, hard_regs_to_save, saved;
1715 struct insn_chain *chain, *last, *next, *prev, *last_restore_chain, *where;
1716 struct bb_info *bb_info;
1717 enum machine_mode save_mode[FIRST_PSEUDO_REGISTER];
1718 loop_p loop;
1719 loop_iterator li;
1720 int save_pseudo[FIRST_PSEUDO_REGISTER];
1721 int free_pseudo[FIRST_PSEUDO_REGISTER];
1722 bool do_placement_opt_p = 0 /* flag_ira && optimize */;
1724 if (do_placement_opt_p)
1726 /* Do global analysis for better placement of spill code. */
1727 alloc_aux_for_blocks (sizeof (struct bb_info));
1728 FOR_EACH_LOOP (li, loop, 0)
1730 loop->aux = xmalloc (sizeof (struct loop_info));
1731 CLEAR_HARD_REG_SET (LOOP_INFO (loop)->mentioned_regs);
1733 memset (BB_INFO (ENTRY_BLOCK_PTR), 0, sizeof (struct bb_info));
1734 memset (BB_INFO (EXIT_BLOCK_PTR), 0, sizeof (struct bb_info));
1735 make_global_save_analysis ();
1738 CLEAR_HARD_REG_SET (hard_regs_saved);
1739 n_regs_saved = 0;
1741 if (do_placement_opt_p && reload_insn_chain != NULL)
1743 bb_info = BB_INFO_BY_INDEX (reload_insn_chain->block);
1744 set_hard_reg_saved (bb_info->restore_in,
1745 bb_info->restore_in_mode, save_mode,
1746 bb_info->restore_in_pseudo, save_pseudo);
1749 last = NULL;
1750 for (chain = reload_insn_chain; chain != 0; chain = next)
1752 rtx insn = chain->insn;
1753 enum rtx_code code = GET_CODE (insn);
1755 last = chain;
1756 next = chain->next;
1758 if (INSN_P (insn))
1760 if (n_regs_saved)
1762 if (!do_placement_opt_p && code == JUMP_INSN)
1763 /* Restore all registers if this is a JUMP_INSN. */
1764 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
1765 else
1767 CLEAR_HARD_REG_SET (referenced_regs);
1768 CLEAR_HARD_REG_SET (modified_regs);
1769 mark_referenced_regs (PATTERN (insn), FALSE);
1770 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
1773 /* If some registers have been saved, see if INSN
1774 references any of them. We must restore them before
1775 the insn if so. */
1777 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1778 if (TEST_HARD_REG_BIT (referenced_regs, regno))
1780 unsigned int before = regno;
1782 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS,
1783 save_mode, save_pseudo);
1784 if (do_placement_opt_p)
1786 gcc_assert (before == regno);
1787 save_mode[before] = VOIDmode;
1788 save_pseudo[before] = -1;
1793 if (code == CALL_INSN
1794 && ! SIBLING_CALL_P (insn)
1795 && ! find_reg_note (insn, REG_NORETURN, NULL))
1797 HARD_REG_SET used_regs;
1798 reg_set_iterator rsi;
1800 /* Use the register life information in CHAIN to compute which
1801 regs are live during the call. */
1802 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
1803 &chain->live_throughout);
1804 /* Save hard registers always in the widest mode available. */
1805 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1807 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
1808 save_mode[regno] = regno_save_mode[regno][1];
1809 else
1810 save_mode[regno] = VOIDmode;
1811 save_pseudo[regno] = -1;
1814 /* Look through all live pseudos, mark their hard registers
1815 and choose proper mode for saving. */
1816 EXECUTE_IF_SET_IN_REG_SET
1817 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
1819 int r = reg_renumber[regno];
1820 int nregs;
1821 enum machine_mode mode;
1823 /* Remember live_throughout can contain spilled
1824 registers when IRA is used. */
1825 if (flag_ira && optimize && r < 0)
1826 continue;
1827 gcc_assert (r >= 0);
1829 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
1830 mode = HARD_REGNO_CALLER_SAVE_MODE
1831 (r, nregs, PSEUDO_REGNO_MODE (regno));
1832 if (GET_MODE_BITSIZE (mode)
1833 > GET_MODE_BITSIZE (save_mode[r]))
1834 save_mode[r] = mode;
1835 while (nregs-- > 0)
1837 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
1838 save_pseudo[r + nregs] = regno;
1842 /* Record all registers set in this call insn. These don't need
1843 to be saved. N.B. the call insn might set a subreg of a
1844 multi-hard-reg pseudo; then the pseudo is considered live
1845 during the call, but the subreg that is set isn't. */
1846 CLEAR_HARD_REG_SET (this_insn_sets);
1847 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
1849 /* Compute which hard regs must be saved before this call. */
1850 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
1851 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
1852 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
1853 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
1854 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
1856 if (do_placement_opt_p)
1857 IOR_HARD_REG_SET (hard_regs_saved, hard_regs_to_save);
1858 else
1860 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1861 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
1862 regno += insert_save (chain, 1, regno,
1863 &hard_regs_to_save, save_mode,
1864 save_pseudo);
1868 /* Must recompute n_regs_saved. */
1869 n_regs_saved = 0;
1870 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1871 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
1872 n_regs_saved++;
1876 if (chain->next == 0 || chain->next->block != chain->block)
1878 struct bb_info *next_bb_info;
1880 next_bb_info = (chain->next != NULL
1881 ? BB_INFO_BY_INDEX (chain->next->block) : NULL);
1883 /* At the end of the basic block, we must restore any registers that
1884 remain saved. If the last insn in the block is a JUMP_INSN, put
1885 the restore before the insn, otherwise, put it after the insn. */
1887 if (do_placement_opt_p)
1888 set_hard_reg_saved
1889 (BB_INFO_BY_INDEX (chain->block)->restore_here,
1890 BB_INFO_BY_INDEX (chain->block)->restore_out_mode, save_mode,
1891 BB_INFO_BY_INDEX (chain->block)->restore_out_pseudo,
1892 save_pseudo);
1894 if (n_regs_saved)
1895 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1896 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
1898 unsigned int before = regno;
1900 regno += insert_restore (chain, JUMP_P (insn),
1901 regno, MOVE_MAX_WORDS, save_mode,
1902 save_pseudo);
1903 gcc_assert (before == regno);
1904 save_mode[before] = VOIDmode;
1905 save_pseudo[before] = -1;
1908 if (do_placement_opt_p && next_bb_info != NULL)
1909 set_hard_reg_saved (next_bb_info->restore_in,
1910 next_bb_info->restore_in_mode, save_mode,
1911 next_bb_info->restore_in_pseudo, save_pseudo);
1916 if (!do_placement_opt_p)
1917 return;
1919 CLEAR_HARD_REG_SET (hard_regs_to_save);
1920 n_regs_saved = 0;
1921 last_restore_chain = NULL;
1923 if (last == NULL)
1924 CLEAR_HARD_REG_SET (saved);
1925 else
1927 bb_info = BB_INFO_BY_INDEX (last->block);
1928 set_hard_reg_saved (bb_info->save_out,
1929 bb_info->save_out_mode, save_mode,
1930 bb_info->save_out_pseudo, save_pseudo);
1931 COPY_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
1932 COPY_HARD_REG_SET (saved, bb_info->free_out);
1933 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1934 if (!TEST_HARD_REG_BIT (saved, regno))
1935 free_pseudo[regno] = -1;
1936 else
1938 if (TEST_HARD_REG_BIT (bb_info->save_out, regno))
1939 free_pseudo [regno] = bb_info->save_out_pseudo [regno];
1940 else
1942 gcc_assert (TEST_HARD_REG_BIT (bb_info->restore_out, regno));
1943 free_pseudo [regno] = bb_info->restore_out_pseudo [regno];
1947 for (chain = last; chain != 0; chain = prev)
1949 rtx insn = chain->insn;
1950 enum rtx_code code = GET_CODE (insn);
1952 prev = chain->prev;
1954 if (INSN_P (insn))
1956 bb_info = BB_INFO_BY_INDEX (chain->block);
1958 CLEAR_HARD_REG_SET (referenced_regs);
1959 CLEAR_HARD_REG_SET (modified_regs);
1960 mark_referenced_regs (PATTERN (insn), FALSE);
1961 AND_HARD_REG_SET (modified_regs, hard_regs_to_save);
1962 AND_COMPL_HARD_REG_SET (saved, referenced_regs);
1963 AND_COMPL_HARD_REG_SET (saved, modified_regs);
1965 if (chain->is_caller_save_insn)
1967 if (last_restore_chain == NULL)
1968 last_restore_chain = chain;
1970 else
1972 /* If some registers have been saved, see if INSN
1973 references any of them. We must restore them before
1974 the insn if so. */
1976 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1977 if (TEST_HARD_REG_BIT (modified_regs, regno))
1979 unsigned int before = regno;
1981 /* We should put save insns before restore insns
1982 between the two calls because the same stack
1983 slot for different hard registers can be used
1984 for restoring in the first call and saving for
1985 the second call. */
1986 regno += insert_save (last_restore_chain != NULL
1987 ? last_restore_chain : chain,
1988 last_restore_chain == NULL
1989 && JUMP_P (chain->insn),
1990 regno, &hard_regs_to_save,
1991 save_mode, save_pseudo);
1992 gcc_assert (before == regno);
1994 CLEAR_HARD_REG_BIT (saved, regno);
1995 CLEAR_HARD_REG_BIT (hard_regs_to_save, regno);
1996 save_mode[before] = VOIDmode;
1997 save_pseudo[before] = -1;
1998 free_pseudo[before] = -1;
2002 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2003 if (TEST_HARD_REG_BIT (saved, regno) && free_pseudo[regno] >= 0)
2004 SET_REGNO_REG_SET (&chain->saved, free_pseudo[regno]);
2005 if (chain->is_caller_save_insn && chain->saved_pseudo_regno >= 0)
2007 int i;
2008 enum machine_mode mode;
2010 mode = GET_MODE (regno_reg_rtx[chain->saved_pseudo_regno]);
2011 regno = reg_renumber[chain->saved_pseudo_regno];
2012 add_to_hard_reg_set (&saved, mode, regno);
2013 for (i = hard_regno_nregs[regno][mode] - 1; i >= 0; i--)
2014 free_pseudo[regno + i] = chain->saved_pseudo_regno;
2016 if (code == CALL_INSN
2017 && ! SIBLING_CALL_P (insn)
2018 && ! find_reg_note (insn, REG_NORETURN, NULL))
2020 HARD_REG_SET used_regs;
2021 reg_set_iterator rsi;
2023 last_restore_chain = NULL;
2025 /* Use the register life information in CHAIN to
2026 compute which regs are live during the call. */
2027 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
2028 &chain->live_throughout);
2029 /* Save hard registers always in the widest mode
2030 available. */
2031 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2033 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
2035 CLEAR_HARD_REG_SET (this_insn_sets);
2036 note_stores (PATTERN (insn), mark_set_regs,
2037 &this_insn_sets);
2038 save_mode[regno] = regno_save_mode[regno][1];
2040 else
2041 save_mode[regno] = VOIDmode;
2042 save_pseudo[regno] = -1;
2045 /* Look through all live pseudos, mark their hard
2046 registers and choose proper mode for saving. */
2047 EXECUTE_IF_SET_IN_REG_SET
2048 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
2050 int r = reg_renumber[regno];
2051 int nregs;
2052 enum machine_mode mode;
2054 /* Remember live_throughout can contain spilled
2055 registers when IRA is used. */
2056 if (flag_ira && r < 0)
2057 continue;
2058 gcc_assert (r >= 0);
2060 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
2061 mode = HARD_REGNO_CALLER_SAVE_MODE
2062 (r, nregs, PSEUDO_REGNO_MODE (regno));
2063 if (GET_MODE_BITSIZE (mode)
2064 > GET_MODE_BITSIZE (save_mode[r]))
2065 save_mode[r] = mode;
2066 while (nregs-- > 0)
2068 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
2069 save_pseudo[r + nregs] = regno;
2070 free_pseudo[r + nregs] = regno;
2074 /* Record all registers set in this call insn. These
2075 don't need to be saved. N.B. the call insn might set
2076 a subreg of a multi-hard-reg pseudo; then the pseudo
2077 is considered live during the call, but the subreg
2078 that is set isn't. */
2079 CLEAR_HARD_REG_SET (this_insn_sets);
2080 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
2082 /* Compute which hard regs must be saved before this call. */
2083 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
2084 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
2085 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
2086 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
2087 COPY_HARD_REG_SET (saved, hard_regs_to_save);
2088 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2089 if (!TEST_HARD_REG_BIT (saved, regno))
2091 free_pseudo[regno] = -1;
2092 save_pseudo[regno] = -1;
2093 save_mode[regno] = VOIDmode;
2098 if (chain->prev == 0 || chain->prev->block != chain->block)
2100 struct bb_info *prev_bb_info;
2102 prev_bb_info = (chain->prev != NULL
2103 ? BB_INFO_BY_INDEX (chain->prev->block) : NULL);
2105 /* At the start of the basic block, we must save any
2106 registers from save_here. */
2108 set_hard_reg_saved
2109 (BB_INFO_BY_INDEX (chain->block)->save_here,
2110 BB_INFO_BY_INDEX (chain->block)->save_in_mode, save_mode,
2111 BB_INFO_BY_INDEX (chain->block)->save_in_pseudo, save_pseudo);
2112 COPY_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
2114 where = (last_restore_chain != NULL
2115 ? last_restore_chain->next : chain);
2116 /* An addr_vec is placed outside any basic block but its
2117 chain has the same block as the block of subsequent insn.
2118 So skip to the real start of the basic block. */
2119 if (GET_CODE (where->insn) == CODE_LABEL && where->next != NULL
2120 && JUMP_P (where->next->insn)
2121 && (GET_CODE (PATTERN (where->next->insn)) == ADDR_DIFF_VEC
2122 || GET_CODE (PATTERN (where->next->insn)) == ADDR_VEC)
2123 && where->next->next != NULL)
2124 where = where->next->next;
2126 if (!hard_reg_set_empty_p (hard_regs_to_save))
2127 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2128 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
2130 unsigned int before = regno;
2132 regno += insert_save (where, INSN_P (where->insn), regno,
2133 &hard_regs_to_save, save_mode,
2134 save_pseudo);
2135 gcc_assert (before == regno);
2136 save_mode[before] = VOIDmode;
2137 save_pseudo[before] = -1;
2140 if (prev_bb_info != NULL)
2142 last_restore_chain = NULL;
2143 set_hard_reg_saved (prev_bb_info->save_out,
2144 prev_bb_info->save_out_mode, save_mode,
2145 prev_bb_info->save_out_pseudo, save_pseudo);
2146 COPY_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
2147 COPY_HARD_REG_SET (saved, prev_bb_info->free_out);
2148 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2149 if (!TEST_HARD_REG_BIT (saved, regno))
2150 free_pseudo[regno] = -1;
2151 else
2153 if (TEST_HARD_REG_BIT (prev_bb_info->save_out, regno))
2154 free_pseudo [regno]
2155 = prev_bb_info->save_out_pseudo [regno];
2156 else
2158 gcc_assert (TEST_HARD_REG_BIT (prev_bb_info->restore_out, regno));
2159 free_pseudo [regno]
2160 = prev_bb_info->restore_out_pseudo [regno];
2167 FOR_EACH_LOOP (li, loop, 0)
2169 free (loop->aux);
2171 if (flag_ira && optimize)
2172 free_aux_for_blocks ();
2175 /* Here from note_stores, or directly from save_call_clobbered_regs,
2176 when an insn stores a value in a register. Set the proper bit or
2177 bits in this_insn_sets. */
2178 static void
2179 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
2181 int regno, endregno, i;
2182 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
2184 if (GET_CODE (reg) == SUBREG)
2186 rtx inner = SUBREG_REG (reg);
2187 if (!REG_P (inner))
2188 return;
2189 if ((regno = REGNO (inner)) >= FIRST_PSEUDO_REGISTER)
2191 if (reg_renumber[regno] < 0)
2192 return;
2193 regno = reg_renumber[regno];
2194 endregno
2195 = hard_regno_nregs[regno][PSEUDO_REGNO_MODE (REGNO (inner))];
2197 else
2199 regno = subreg_regno (reg);
2200 endregno = regno + subreg_nregs (reg);
2203 else if (REG_P (reg))
2205 if ((regno = REGNO (reg)) < FIRST_PSEUDO_REGISTER)
2206 endregno = END_HARD_REGNO (reg);
2207 else
2209 if (reg_renumber[regno] < 0)
2210 return;
2211 regno = reg_renumber[regno];
2212 endregno
2213 = hard_regno_nregs[regno][PSEUDO_REGNO_MODE (REGNO (reg))];
2216 else
2217 return;
2219 for (i = regno; i < endregno; i++)
2220 SET_HARD_REG_BIT (*this_insn_sets, i);
2223 /* Here from note_stores when an insn stores a value in a register.
2224 Set the proper bit or bits in the passed regset. All pseudos that have
2225 been assigned hard regs have had their register number changed already,
2226 so we can ignore pseudos. */
2227 static void
2228 add_stored_regs (rtx reg, const_rtx setter, void *data)
2230 int regno, endregno, i;
2231 enum machine_mode mode = GET_MODE (reg);
2232 int offset = 0;
2234 if (GET_CODE (setter) == CLOBBER)
2235 return;
2237 if (GET_CODE (reg) == SUBREG
2238 && REG_P (SUBREG_REG (reg))
2239 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
2241 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
2242 GET_MODE (SUBREG_REG (reg)),
2243 SUBREG_BYTE (reg),
2244 GET_MODE (reg));
2245 regno = REGNO (SUBREG_REG (reg)) + offset;
2246 endregno = regno + subreg_nregs (reg);
2248 else
2250 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
2251 return;
2253 regno = REGNO (reg) + offset;
2254 endregno = end_hard_regno (mode, regno);
2257 for (i = regno; i < endregno; i++)
2258 SET_REGNO_REG_SET ((regset) data, i);
2261 /* Walk X and record all referenced registers in REFERENCED_REG and
2262 modified registers in MODIFIED_REGS. */
2263 static void
2264 mark_referenced_regs (rtx x, int set_p)
2266 enum rtx_code code;
2267 const char *fmt;
2268 int i, j;
2269 int stop_p;
2271 for (stop_p = FALSE; !stop_p; )
2273 while (GET_CODE (x) == STRICT_LOW_PART || GET_CODE (x) == ZERO_EXTRACT)
2274 x = XEXP (x, 0);
2275 code = GET_CODE (x);
2276 switch (code)
2278 case SET:
2279 gcc_assert (!set_p);
2280 mark_referenced_regs (SET_DEST (x), TRUE);
2281 x = SET_SRC (x);
2282 break;
2283 case CLOBBER:
2284 mark_referenced_regs (SET_DEST (x), TRUE);
2285 return;
2286 case PRE_INC:
2287 case POST_INC:
2288 case PRE_DEC:
2289 case POST_DEC:
2290 gcc_assert (!set_p);
2291 x = XEXP (x, 0);
2292 mark_referenced_regs (x, TRUE);
2293 break;
2294 case PRE_MODIFY:
2295 case POST_MODIFY:
2296 set_p = FALSE;
2297 mark_referenced_regs (XEXP (x, 0), FALSE);
2298 mark_referenced_regs (XEXP (x, 0), TRUE);
2299 x = XEXP (x, 1);
2300 mark_referenced_regs (x, FALSE);
2301 break;
2302 case SUBREG:
2303 x = SUBREG_REG (x);
2304 break;
2305 case REG:
2307 int regno = REGNO (x);
2308 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
2309 : reg_renumber[regno]);
2311 if (hardregno >= 0)
2313 if (set_p)
2314 add_to_hard_reg_set (&modified_regs, GET_MODE (x), hardregno);
2315 add_to_hard_reg_set (&referenced_regs, GET_MODE (x), hardregno);
2317 /* If this is a pseudo that did not get a hard register, scan
2318 its memory location, since it might involve the use of
2319 another register, which might be saved. */
2320 else if (reg_equiv_mem[regno] != 0)
2321 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0), set_p);
2322 else if (reg_equiv_address[regno] != 0)
2323 mark_referenced_regs (reg_equiv_address[regno], set_p);
2324 return;
2326 default:
2327 fmt = GET_RTX_FORMAT (code);
2328 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2330 if (fmt[i] == 'e')
2331 mark_referenced_regs (XEXP (x, i), FALSE);
2332 else if (fmt[i] == 'E')
2333 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2334 mark_referenced_regs (XVECEXP (x, i, j), FALSE);
2336 stop_p = TRUE;
2337 break;
2342 /* Insert a sequence of insns to restore. Place these insns in front
2343 of CHAIN if BEFORE_P is nonzero, behind the insn otherwise.
2344 MAXRESTORE is the maximum number of registers which should be
2345 restored during this call. It should never be less than 1 since we
2346 only work with entire registers. SAVE_PSEUDO maps hard registers
2347 into the corresponding pseudos.
2349 Note that we have verified in init_caller_save that we can do this
2350 with a simple SET, so use it. Set INSN_CODE to what we save there
2351 since the address might not be valid so the insn might not be recognized.
2352 These insns will be reloaded and have register elimination done by
2353 find_reload, so we need not worry about that here.
2355 Return the extra number of registers saved. */
2357 static int
2358 insert_restore (struct insn_chain *chain, int before_p, int regno,
2359 int maxrestore, enum machine_mode *save_mode,
2360 int *save_pseudo)
2362 int i, k;
2363 rtx pat = NULL_RTX;
2364 int code;
2365 unsigned int numregs = 0;
2366 struct insn_chain *new_chain;
2367 rtx mem;
2369 /* A common failure mode if register status is not correct in the
2370 RTL is for this routine to be called with a REGNO we didn't
2371 expect to save. That will cause us to write an insn with a (nil)
2372 SET_DEST or SET_SRC. Instead of doing so and causing a crash
2373 later, check for this common case here instead. This will remove
2374 one step in debugging such problems. */
2375 gcc_assert (regno_save_mem[regno][1]);
2377 /* Get the pattern to emit and update our status.
2379 See if we can restore `maxrestore' registers at once. Work
2380 backwards to the single register case. */
2381 for (i = maxrestore; i > 0; i--)
2383 int j;
2384 int ok = 1;
2386 if (regno_save_mem[regno][i] == 0)
2387 continue;
2389 for (j = 0; j < i; j++)
2390 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
2392 ok = 0;
2393 break;
2395 /* Must do this one restore at a time. */
2396 if (! ok)
2397 continue;
2399 numregs = i;
2400 break;
2403 mem = regno_save_mem[regno][numregs];
2404 if (save_mode[regno] != VOIDmode
2405 && save_mode[regno] != GET_MODE (mem)
2406 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]]
2407 && reg_save_code (regno, save_mode[regno]) >= 0)
2408 mem = adjust_address_nv (mem, save_mode[regno], 0);
2409 else
2410 mem = copy_rtx (mem);
2412 /* Verify that the alignment of spill space is equal to or greater
2413 than required. */
2414 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
2415 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
2417 pat = gen_rtx_SET (VOIDmode,
2418 gen_rtx_REG (GET_MODE (mem),
2419 regno), mem);
2420 code = reg_restore_code (regno, GET_MODE (mem));
2421 new_chain = insert_one_insn (chain, before_p, code, pat);
2422 new_chain->saved_pseudo_regno = save_pseudo[regno];
2424 if (dump_file != NULL)
2425 fprintf (dump_file, "inserting restore insn %u for pseudo %d %s %u\n",
2426 INSN_UID (new_chain->insn), save_pseudo[regno],
2427 before_p ? "before" : "after", INSN_UID (chain->insn));
2429 /* Clear status for all registers we restored. */
2430 for (k = 0; k < i; k++)
2432 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
2433 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
2434 n_regs_saved--;
2437 /* Tell our callers how many extra registers we saved/restored. */
2438 return numregs - 1;
2441 /* Like insert_restore above, but save registers instead. */
2443 static int
2444 insert_save (struct insn_chain *chain, int before_p, int regno,
2445 HARD_REG_SET (*to_save), enum machine_mode *save_mode,
2446 int *save_pseudo)
2448 int i;
2449 unsigned int k;
2450 rtx pat = NULL_RTX;
2451 int code;
2452 unsigned int numregs = 0;
2453 struct insn_chain *new_chain;
2454 rtx mem;
2456 /* A common failure mode if register status is not correct in the
2457 RTL is for this routine to be called with a REGNO we didn't
2458 expect to save. That will cause us to write an insn with a (nil)
2459 SET_DEST or SET_SRC. Instead of doing so and causing a crash
2460 later, check for this common case here. This will remove one
2461 step in debugging such problems. */
2462 gcc_assert (regno_save_mem[regno][1]);
2464 /* Get the pattern to emit and update our status.
2466 See if we can save several registers with a single instruction.
2467 Work backwards to the single register case. */
2468 for (i = MOVE_MAX_WORDS; i > 0; i--)
2470 int j;
2471 int ok = 1;
2472 if (regno_save_mem[regno][i] == 0)
2473 continue;
2475 for (j = 0; j < i; j++)
2476 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
2478 ok = 0;
2479 break;
2481 /* Must do this one save at a time. */
2482 if (! ok)
2483 continue;
2485 numregs = i;
2486 break;
2489 mem = regno_save_mem[regno][numregs];
2490 if (save_mode[regno] != VOIDmode
2491 && save_mode[regno] != GET_MODE (mem)
2492 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]]
2493 && reg_save_code (regno, save_mode[regno]) >= 0)
2494 mem = adjust_address_nv (mem, save_mode[regno], 0);
2495 else
2496 mem = copy_rtx (mem);
2498 /* Verify that the alignment of spill space is equal to or greater
2499 than required. */
2500 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
2501 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
2503 pat = gen_rtx_SET (VOIDmode, mem,
2504 gen_rtx_REG (GET_MODE (mem),
2505 regno));
2506 code = reg_save_code (regno, GET_MODE (mem));
2507 new_chain = insert_one_insn (chain, before_p, code, pat);
2508 new_chain->saved_pseudo_regno = save_pseudo[regno];
2510 if (dump_file != NULL)
2511 fprintf (dump_file, "inserting save insn %u for pseudo %d %s %u\n",
2512 INSN_UID (new_chain->insn), save_pseudo[regno],
2513 before_p ? "before" : "after", INSN_UID (chain->insn));
2515 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
2516 for (k = 0; k < numregs; k++)
2518 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
2519 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
2520 n_regs_saved++;
2523 /* Tell our callers how many extra registers we saved/restored. */
2524 return numregs - 1;
2527 /* Emit a new caller-save insn and set the code. */
2528 static struct insn_chain *
2529 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
2531 rtx insn = chain->insn;
2532 struct insn_chain *new_chain;
2534 #ifdef HAVE_cc0
2535 /* If INSN references CC0, put our insns in front of the insn that sets
2536 CC0. This is always safe, since the only way we could be passed an
2537 insn that references CC0 is for a restore, and doing a restore earlier
2538 isn't a problem. We do, however, assume here that CALL_INSNs don't
2539 reference CC0. Guard against non-INSN's like CODE_LABEL. */
2541 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
2542 && before_p
2543 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
2544 chain = chain->prev, insn = chain->insn;
2545 #endif
2547 new_chain = new_insn_chain ();
2548 if (before_p)
2550 rtx link;
2552 new_chain->prev = chain->prev;
2553 if (new_chain->prev != 0)
2554 new_chain->prev->next = new_chain;
2555 else
2556 reload_insn_chain = new_chain;
2558 chain->prev = new_chain;
2559 new_chain->next = chain;
2560 new_chain->insn = emit_insn_before (pat, insn);
2561 /* ??? It would be nice if we could exclude the already / still saved
2562 registers from the live sets. */
2563 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
2564 /* Registers that die in CHAIN->INSN still live in the new insn. */
2565 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
2567 if (REG_NOTE_KIND (link) == REG_DEAD)
2569 rtx reg = XEXP (link, 0);
2570 int regno, i;
2572 gcc_assert (REG_P (reg));
2573 regno = REGNO (reg);
2574 if (regno >= FIRST_PSEUDO_REGISTER)
2575 regno = reg_renumber[regno];
2576 if (regno < 0)
2577 continue;
2578 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
2579 i >= 0; i--)
2580 SET_REGNO_REG_SET (&new_chain->live_throughout, regno + i);
2584 /* If CHAIN->INSN is a call, then the registers which contain
2585 the arguments to the function are live in the new insn. */
2586 if (CALL_P (chain->insn))
2588 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
2589 link != NULL_RTX;
2590 link = XEXP (link, 1))
2592 rtx arg = XEXP (link, 0);
2594 if (GET_CODE (arg) == USE)
2596 rtx reg = XEXP (arg, 0);
2598 if (REG_P (reg))
2600 int i, regno = REGNO (reg);
2602 /* Registers in CALL_INSN_FUNCTION_USAGE are always
2603 hard registers. */
2604 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
2606 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
2607 i >= 0; i--)
2608 SET_REGNO_REG_SET (&new_chain->live_throughout, regno + i);
2615 CLEAR_REG_SET (&new_chain->dead_or_set);
2616 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
2617 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn;
2619 else
2621 new_chain->next = chain->next;
2622 if (new_chain->next != 0)
2623 new_chain->next->prev = new_chain;
2624 chain->next = new_chain;
2625 new_chain->prev = chain;
2626 if (GET_CODE (insn) != CODE_LABEL)
2627 new_chain->insn = emit_insn_after (pat, insn);
2628 else
2630 /* Put the insn after bb note in a empty basic block. */
2631 gcc_assert (NEXT_INSN (insn) && NOTE_P (NEXT_INSN (insn)));
2632 new_chain->insn = emit_insn_after (pat, NEXT_INSN (insn));
2634 /* ??? It would be nice if we could exclude the already / still saved
2635 registers from the live sets, and observe REG_UNUSED notes. */
2636 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
2637 /* Registers that are set in CHAIN->INSN live in the new insn.
2638 (Unless there is a REG_UNUSED note for them, but we don't
2639 look for them here.) */
2640 if (INSN_P (chain->insn))
2641 note_stores (PATTERN (chain->insn), add_stored_regs,
2642 &new_chain->live_throughout);
2643 CLEAR_REG_SET (&new_chain->dead_or_set);
2644 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
2645 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn;
2647 new_chain->block = chain->block;
2648 new_chain->is_caller_save_insn = 1;
2650 INSN_CODE (new_chain->insn) = code;
2651 return new_chain;
2653 #include "gt-caller-save.h"