gcc/ChangeLog

   1 2024-01-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
   2
   3         * config/riscv/riscv.cc (get_common_costs): Switch RVV cost model.
   4         (get_vector_costs): Ditto.
   5         (riscv_builtin_vectorization_cost): Ditto.
   6
   7 2024-01-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
   8
   9         * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): Minior tweak.
  10
  11 2024-01-10  Antoni Boucher  <bouanto@zoho.com>
  12
  13         PR jit/111396
  14         * ipa-fnsummary.cc (ipa_fnsummary_cc_finalize): Call
  15         ipa_free_size_summary.
  16         * ipa-icf.cc (ipa_icf_cc_finalize): New function.
  17         * ipa-profile.cc (ipa_profile_cc_finalize): New function.
  18         * ipa-prop.cc (ipa_prop_cc_finalize): New function.
  19         * ipa-prop.h (ipa_prop_cc_finalize): New function.
  20         * ipa-sra.cc (ipa_sra_cc_finalize): New function.
  21         * ipa-utils.h (ipa_profile_cc_finalize, ipa_icf_cc_finalize,
  22         ipa_sra_cc_finalize): New functions.
  23         * toplev.cc (toplev::finalize): Call ipa_icf_cc_finalize,
  24         ipa_prop_cc_finalize, ipa_profile_cc_finalize and
  25         ipa_sra_cc_finalize
  26         Include ipa-utils.h.
  27
  28 2024-01-10  Jin Ma  <jinma@linux.alibaba.com>
  29
  30         * config/riscv/riscv-protos.h (th_int_get_mask): New prototype.
  31         (th_int_get_save_adjustment): Likewise.
  32         (th_int_adjust_cfi_prologue): Likewise.
  33         * config/riscv/riscv.cc (BITSET_P): Moved away from here.
  34         (TH_INT_INTERRUPT): New macro.
  35         (riscv_expand_prologue): Add the processing of XTheadInt.
  36         (riscv_expand_epilogue): Likewise.
  37         * config/riscv/riscv.h (BITSET_P): Moved to here.
  38         * config/riscv/riscv.md: New unspec.
  39         * config/riscv/thead.cc (th_int_get_mask): New function.
  40         (th_int_get_save_adjustment): Likewise.
  41         (th_int_adjust_cfi_prologue): Likewise.
  42         * config/riscv/thead.md (th_int_push): New pattern.
  43         (th_int_pop): new pattern.
  44
  45 2024-01-10  Tamar Christina  <tamar.christina@arm.com>
  46
  47         PR tree-optimization/112468
  48         * doc/sourcebuild.texi: Document ifn_copysign.
  49         * match.pd: Only apply transformation if target supports the IFN.
  50
  51 2024-01-10  Andrew Pinski  <quic_apinski@quicinc.com>
  52
  53         PR tree-optimization/112581
  54         * gimple-if-to-switch.cc (pass_if_to_switch::execute): Call
  55         mark_ssa_maybe_undefs.
  56         * tree-ssa-reassoc.cc (can_reassociate_op_p): Uninitialized
  57         variables can not be reassociated.
  58         (init_range_entry): Check for uninitialized variables too.
  59         (init_reassoc): Call mark_ssa_maybe_undefs.
  60
  61 2024-01-10  Maciej W. Rozycki  <macro@embecosm.com>
  62
  63         * config/riscv/riscv.cc (riscv_noce_conversion_profitable_p):
  64         Also handle sign extension.
  65
  66 2024-01-10  Alex Coplan  <alex.coplan@arm.com>
  67
  68         * config/aarch64/aarch64.opt (-mearly-ldp-fusion): Set default
  69         to 0.
  70         (-mlate-ldp-fusion): Likewise.
  71
  72 2024-01-10  Tamar Christina  <tamar.christina@arm.com>
  73
  74         PR tree-optimization/113287
  75         * tree-vect-stmts.cc (vectorizable_early_exit): Check the flags on edge
  76         instead of using BRANCH_EDGE to determine true edge.
  77
  78 2024-01-10  Richard Biener  <rguenther@suse.de>
  79
  80         PR tree-optimization/113078
  81         * tree-vect-loop.cc (check_reduction_path): Canonicalize
  82         .COND_SUB to .COND_ADD.
  83
  84 2024-01-10  David Malcolm  <dmalcolm@redhat.com>
  85
  86         * gcc-urlifier.cc (gcc_urlifier::get_url_suffix_for_option):
  87         Handle prefix mappings before calling find_opt.
  88         (selftest::gcc_urlifier_cc_tests): Add example of urlifying a
  89         "-fno-"-prefixed command-line option.
  90         * opts-common.cc (get_option_prefix_remapping): New.
  91         * opts.h (get_option_prefix_remapping): New decl.
  92
  93 2024-01-10  David Malcolm  <dmalcolm@redhat.com>
  94
  95         * diagnostic.cc (diagnostic_context::report_diagnostic): Pass
  96         m_urlifier to pp_output_formatted_text.
  97         * pretty-print.cc: Add #define of INCLUDE_VECTOR.
  98         (obstack_append_string): New overload, taking a length.
  99         (urlify_quoted_string): Pass in an obstack ptr, rather than using
 100         that of the pp's buffer.  Generalize to handle trailing text in
 101         the buffer beyond the run of quoted text.
 102         (class quoting_info): New.
 103         (on_begin_quote): New.
 104         (on_end_quote): New.
 105         (pp_format): Refactor phase 1 and phase 2 quoting support, moving
 106         it to calls to on_begin_quote and on_end_quote.
 107         (struct auto_obstack): New.
 108         (quoting_info::handle_phase_3): New.
 109         (pp_output_formatted_text): Add urlifier param.  Use it if there
 110         is deferred urlification.  Delete m_quotes.
 111         (selftest::pp_printf_with_urlifier): Pass urlifier to
 112         pp_output_formatted_text.
 113         (selftest::test_urlification): Update results for the existing
 114         case of quoted text stradding chunks; add more such test cases.
 115         * pretty-print.h (class quoting_info): New forward decl.
 116         (chunk_info::m_quotes): New field.
 117         (pp_output_formatted_text): Add optional urlifier param.
 118
 119 2024-01-10  David Malcolm  <dmalcolm@redhat.com>
 120
 121         * pretty-print.cc (selftest::test_pp_format): Add selftest
 122         coverage for numbered args.
 123
 124 2024-01-10  Tamar Christina  <tamar.christina@arm.com>
 125
 126         PR tree-optimization/113144
 127         PR tree-optimization/113145
 128         * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
 129         Update all BB that the original exits dominated.
 130
 131 2024-01-10  Eric Botcazou  <ebotcazou@adacore.com>
 132
 133         * dwarf2out.cc (modified_type_die): Extend the support of reverse
 134         storage order to enumeration types if -gstrict-dwarf is not passed.
 135         (gen_enumeration_type_die): Add REVERSE parameter and generate the
 136         DIE immediately after the existing one if it is true.
 137         (gen_tagged_type_die): Add REVERSE parameter and pass it in the
 138         call to gen_enumeration_type_die.
 139         (gen_type_die_with_usage): Add REVERSE parameter and pass it in the
 140         first recursive call as well as the call to gen_tagged_type_die.
 141         (gen_type_die): Add REVERSE parameter and pass it in the call to
 142         gen_type_die_with_usage.
 143
 144 2024-01-10  Jakub Jelinek  <jakub@redhat.com>
 145
 146         PR tree-optimization/113120
 147         * tree-sra.cc (analyze_access_subtree): For BITINT_TYPE
 148         with root->size TYPE_PRECISION don't build anything new.
 149         Otherwise, if root->type is a BITINT_TYPE, use build_bitint_type
 150         rather than build_nonstandard_integer_type.
 151
 152 2024-01-10  Hongyu Wang  <hongyu.wang@intel.com>
 153
 154         * config/i386/i386.opt: Adjust document.
 155         * doc/invoke.texi: Add description for
 156         -mapx-inline-asm-use-gpr32.
 157
 158 2024-01-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 159
 160         * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor): Remove.
 161         (avg<v_double_trunc>3_floor): New pattern.
 162         (<u>avg<v_double_trunc>3_ceil): Remove.
 163         (avg<v_double_trunc>3_ceil): New pattern.
 164         (uavg<mode>3_floor): Ditto.
 165         (uavg<mode>3_ceil): Ditto.
 166         * config/riscv/riscv-protos.h (enum insn_flags): Add for average addition.
 167         (enum insn_type): Ditto.
 168         * config/riscv/riscv-v.cc: Ditto.
 169         * config/riscv/vector-iterators.md (ashiftrt): Remove.
 170         (ASHIFTRT): Ditto.
 171         * config/riscv/vector.md: Add VLS modes.
 172
 173 2024-01-10  Kewen Lin  <linkw@linux.ibm.com>
 174
 175         PR target/111480
 176         * config/rs6000/vsx.md (VCZLSBB): New int iterator.
 177         (vczlsbb_char): New int attribute.
 178         (vclzlsbb_<mode>, vctzlsbb_<mode>): Merge to ...
 179         (vc<vczlsbb_char>zlsbb_<mode>): ... this.
 180         (*vctzlsbb_zext_<mode>): Rename to ...
 181         (*vc<vczlsbb_char>zlsbb_zext_<mode>): ... this, and extend it to
 182         cover vclzlsbb.
 183
 184 2024-01-10  Kewen Lin  <linkw@linux.ibm.com>
 185
 186         PR target/112606
 187         * config/rs6000/rs6000.md (copysign<mode>3 IEEE128): Change predicate
 188         of the last argument from altivec_register_operand to any_operand.  If
 189         operands[2] is CONST_DOUBLE, emit abs or neg abs depending on its sign
 190         otherwise if it doesn't satisfy altivec_register_operand, force it to
 191         REG using copy_to_mode_reg.
 192
 193 2024-01-10  Kewen Lin  <linkw@linux.ibm.com>
 194
 195         PR middle-end/113100
 196         * builtins.cc (expand_builtin_stack_address): Guard stack point
 197         adjustment with SPARC_STACK_BOUNDARY_HACK.
 198
 199 2024-01-10  Yang Yujie  <yangyujie@loongson.cn>
 200
 201         * config/loongarch/genopts/loongarch-strings: Remove explicit-reloc
 202         argument string definitions.
 203         * config/loongarch/loongarch-str.h: Same.
 204         * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]explicit-relocs
 205         as aliases to -mexplicit-relocs={always,none}
 206         * config/loongarch/loongarch.opt: Regenerate.
 207         * config/loongarch/loongarch.cc: Same.
 208
 209 2024-01-10  Yang Yujie  <yangyujie@loongson.cn>
 210
 211         * config/loongarch/loongarch-def.h: Define constants with
 212         enums instead of Macros.
 213
 214 2024-01-10  Yang Yujie  <yangyujie@loongson.cn>
 215
 216         * config/loongarch/genopts/loongarch-strings: Rename.
 217         * config/loongarch/genopts/loongarch.opt.in: Same.
 218         * config/loongarch/loongarch-cpu.cc: Same.
 219         * config/loongarch/loongarch-def.cc: Same.
 220         * config/loongarch/loongarch-def.h: Same.
 221         * config/loongarch/loongarch-opts.cc: Same.
 222         * config/loongarch/loongarch-opts.h: Same.
 223         * config/loongarch/loongarch-str.h: Same.
 224         * config/loongarch/loongarch.opt: Same.
 225
 226 2024-01-10  Yang Yujie  <yangyujie@loongson.cn>
 227
 228         * config/loongarch/genopts/genstr.sh: Prepend the isa_evolution
 229         variable with the common la_ prefix.
 230         * config/loongarch/genopts/loongarch.opt.in: Mark ISA evolution
 231         flags as saved using TargetVariable.
 232         * config/loongarch/loongarch.opt: Same.
 233         * config/loongarch/loongarch-def.h: Define evolution_set to
 234         mark changes to the -march default.
 235         * config/loongarch/loongarch-driver.cc: Same.
 236         * config/loongarch/loongarch-opts.cc: Same.
 237         * config/loongarch/loongarch-opts.h: Define and use ISA evolution
 238         conditions around the la_target structure.
 239         * config/loongarch/loongarch.cc: Same.
 240         * config/loongarch/loongarch.md: Same.
 241         * config/loongarch/loongarch-builtins.cc: Same.
 242         * config/loongarch/loongarch-c.cc: Same.
 243         * config/loongarch/lasx.md: Same.
 244         * config/loongarch/lsx.md: Same.
 245         * config/loongarch/sync.md: Same.
 246
 247 2024-01-09  Jeff Law  <jlaw@ventanamicro.com>
 248
 249         * config/epiphany/constraints.md (Car): Allow -1024..1023, no more,
 250         no less.
 251
 252 2024-01-09  Richard Sandiford  <richard.sandiford@arm.com>
 253
 254         * config/mn10300/mn10300.md (subdi3_degenerate): Add isa attribute.
 255
 256 2024-01-09  Tamar Christina  <tamar.christina@arm.com>
 257
 258         * tree-vect-loop.cc (vectorizable_live_operation_1): Drop unused
 259         restart_loop.
 260         (vectorizable_live_operation): Likewise.
 261
 262 2024-01-09  Tamar Christina  <tamar.christina@arm.com>
 263
 264         PR tree-optimization/113199
 265         * tree-vect-loop.cc (vectorizable_live_operation_1): Use
 266         BIT_FIELD_REF.
 267
 268 2024-01-09  Jakub Jelinek  <jakub@redhat.com>
 269
 270         PR target/113270
 271         * config.gcc (aarch64*-*-*): Add aarch64-builtins.h to target_gtfiles.
 272         * config/aarch64/aarch64-builtins.cc (aarch64_simd_types): Add extern
 273         GTY(()) declaration before the definition, drop GTY(()) drom the
 274         definition.
 275
 276 2024-01-09  Richard Biener  <rguenther@suse.de>
 277
 278         PR tree-optimization/113026
 279         * tree-vect-loop-manip.cc (vect_do_peeling): Remove
 280         redundant and wrong niter bound setting.  Move niter
 281         bound adjustment down.
 282
 283 2024-01-09  Tamar Christina  <tamar.christina@arm.com>
 284
 285         PR middle-end/113163
 286         * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
 287         Reject non-linear inductions that aren't supported.
 288
 289 2024-01-09  Roger Sayle  <roger@nextmovesoftware.com>
 290
 291         * config/arc/arc.cc (arc_shift_alg): New enumerated type for
 292         left shift implementation strategies.
 293         (arc_shift_info): Type for each entry of the shift strategy table.
 294         (arc_shift_context_idx): Return a integer value for each code
 295         generation context, used as an index
 296         (arc_ashl_alg): Table indexed by context and shifted bit count.
 297         (arc_split_ashl): Use the arc_ashl_alg table to select SImode
 298         left shift implementation.
 299         (arc_rtx_costs) <case ASHIFT>: Use the arc_ashl_alg table to
 300         provide accurate costs, when optimizing for speed or size.
 301
 302 2024-01-09  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 303
 304         * config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): Fix loop invariant check.
 305
 306 2024-01-09  Julian Brown  <julian@codesourcery.com>
 307
 308         * gimplify.cc (gimplify_expr): Ensure OMP_ARRAY_SECTION has been
 309         processed out before gimplification.
 310         * tree-pretty-print.cc (dump_generic_node): Support OMP_ARRAY_SECTION.
 311         * tree.def (OMP_ARRAY_SECTION): New tree code.
 312
 313 2024-01-09  Jakub Jelinek  <jakub@redhat.com>
 314
 315         PR tree-optimization/113210
 316         * tree-vect-loop.cc (vect_get_loop_niters): If non-INTEGER_CST
 317         value in *number_of_iterationsm1 PLUS_EXPR 1 is folded into
 318         INTEGER_CST, recompute *number_of_iterationsm1 as the INTEGER_CST
 319         minus 1.
 320
 321 2024-01-09  Eric Botcazou  <ebotcazou@adacore.com>
 322
 323         PR rtl-optimization/113140
 324         * reorg.cc (fill_slots_from_thread): If we are to branch after the
 325         last instruction of the function, create an end label.
 326
 327 2024-01-09  Roger Sayle  <roger@nextmovesoftware.com>
 328             Hongtao Liu  <hongtao.liu@intel.com>
 329
 330         PR target/112992
 331         * config/i386/i386-expand.cc
 332         (ix86_convert_const_wide_int_to_broadcast): Allow call to
 333         ix86_expand_vector_init_duplicate to fail, and return NULL_RTX.
 334         (ix86_broadcast_from_constant): Revert recent change; Return a
 335         suitable MEMREF independently of mode/target combinations.
 336         (ix86_expand_vector_move): Allow ix86_expand_vector_init_duplicate
 337         to decide whether expansion is possible/preferrable.  Only try
 338         forcing DImode constants to memory (and trying again) if calling
 339         ix86_expand_vector_init_duplicate fails with an DImode immediate
 340         constant.
 341         (ix86_expand_vector_init_duplicate) <case E_V2DImode>: Try using
 342         V4SImode for suitable immediate constants.
 343         <case E_V4DImode>: Try using V8SImode for suitable constants.
 344         <case E_V4HImode>: Fail for CONST_INT_P, i.e. use constant pool.
 345         <case E_V2HImode>: Likewise.
 346         <case E_V8HImode>: For CONST_INT_P try using V4SImode via widen.
 347         <case E_V16QImode>: For CONT_INT_P try using V8HImode via widen.
 348         <label widen>: Handle CONT_INTs via simplify_binary_operation.
 349         Allow recursive calls to ix86_expand_vector_init_duplicate to fail.
 350         <case E_V16HImode>: For CONST_INT_P try V8SImode via widen.
 351         <case E_V32QImode>: For CONST_INT_P try V16HImode via widen.
 352         (ix86_expand_vector_init): Move try using a broadcast for all_same
 353         with ix86_expand_vector_init_duplicate before using constant pool.
 354
 355 2024-01-09  Chung-Ju Wu  <jasonwucj@gmail.com>
 356
 357         * doc/invoke.texi (Arm Options): Document Cortex-M52 options.
 358
 359 2024-01-09  Chung-Ju Wu  <jasonwucj@gmail.com>
 360
 361         * config/arm/arm-cpus.in (cortex-m52): New cpu.
 362         * config/arm/arm-tables.opt: Regenerate.
 363         * config/arm/arm-tune.md: Regenerate.
 364
 365 2024-01-09  Jiahao Xu  <xujiahao@loongson.cn>
 366
 367         * config/loongarch/lasx.md (vec_initv32qiv16qi): Rename to ..
 368         (vec_init<mode><lasxhalf>): .. this, and extend to mode.
 369         (@vec_concatz<mode>): New insn pattern.
 370         * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
 371         Handle VALS containing two vectors.
 372
 373 2024-01-09  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 374
 375         * config/riscv/riscv-vector-builtins-functions.def (vleff): Move comments.
 376         (vundefined): Ditto.
 377
 378 2024-01-09  Feng Wang  <wangfeng@eswincomputing.com>
 379
 380         * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
 381                                 Add new function_base for crypto vector.
 382         (class bitmanip): Ditto.
 383         (class b_reverse):Ditto.
 384         (class vwsll):   Ditto.
 385         (class clmul):   Ditto.
 386         (class vg_nhab):  Ditto.
 387         (class crypto_vv):Ditto.
 388         (class crypto_vi):Ditto.
 389         (class vaeskf2_vsm3c):Ditto.
 390         (class vsm3me): Ditto.
 391         (BASE): Add BASE declaration for crypto vector.
 392         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
 393         * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
 394                                 Add crypto vector intrinsic definition.
 395         (vbrev): Ditto.
 396         (vclz): Ditto.
 397         (vctz): Ditto.
 398         (vwsll): Ditto.
 399         (vandn): Ditto.
 400         (vbrev8): Ditto.
 401         (vrev8): Ditto.
 402         (vrol): Ditto.
 403         (vror): Ditto.
 404         (vclmul): Ditto.
 405         (vclmulh): Ditto.
 406         (vghsh): Ditto.
 407         (vgmul): Ditto.
 408         (vaesef): Ditto.
 409         (vaesem): Ditto.
 410         (vaesdf): Ditto.
 411         (vaesdm): Ditto.
 412         (vaesz): Ditto.
 413         (vaeskf1): Ditto.
 414         (vaeskf2): Ditto.
 415         (vsha2ms): Ditto.
 416         (vsha2ch): Ditto.
 417         (vsha2cl): Ditto.
 418         (vsm4k): Ditto.
 419         (vsm4r): Ditto.
 420         (vsm3me): Ditto.
 421         (vsm3c): Ditto.
 422         * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
 423                                 Add new function_shape for crypto vector.
 424         (struct crypto_vi_def): Ditto.
 425         (struct crypto_vv_no_op_type_def): Ditto.
 426         (SHAPE): Add SHAPE declaration of crypto vector.
 427         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
 428         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
 429                                 Add new data type for crypto vector.
 430         (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
 431         (vuint32mf2_t): Ditto.
 432         (vuint32m1_t): Ditto.
 433         (vuint32m2_t): Ditto.
 434         (vuint32m4_t): Ditto.
 435         (vuint32m8_t): Ditto.
 436         (vuint64m1_t): Ditto.
 437         (vuint64m2_t): Ditto.
 438         (vuint64m4_t): Ditto.
 439         (vuint64m8_t): Ditto.
 440         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
 441                                 Add new data struct for crypto vector.
 442         (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
 443         (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
 444         * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
 445
 446 2024-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>
 447
 448         PR sanitizer/113251
 449         * varasm.cc (assemble_function_label_raw): Do not call
 450         asan_function_start () without the current function.
 451
 452 2024-01-08  Cupertino Miranda  <cupertino.miranda@oracle.com>
 453
 454         PR target/113225
 455         * btfout.cc (btf_collect_datasec): Skip creating BTF info for
 456         extern and kernel_helper attributed function decls.
 457
 458 2024-01-08  Cupertino Miranda  <cupertino.miranda@oracle.com>
 459
 460         * btfout.cc (output_btf_strs): Changed.
 461
 462 2024-01-08  Tobias Burnus  <tobias@codesourcery.com>
 463
 464         * config/gcn/mkoffload.cc (main): Handle gfx1100
 465         when setting the default XNACK.
 466
 467 2024-01-08  Tobias Burnus  <tobias@codesourcery.com>
 468
 469         * config.gcc (amdgcn-*-amdhsa): Accept --with-arch=gfx1100.
 470         * config/gcn/gcn-hsa.h (NO_XNACK): Add gfx1100:
 471         (ASM_SPEC): Handle gfx1100.
 472         * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1100.
 473         (enum gcn_isa): Add ISA_RDNA3.
 474         (TARGET_GFX1100, TARGET_RDNA2_PLUS, TARGET_RDNA3): Define.
 475         * config/gcn/gcn-valu.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
 476         * config/gcn/gcn.cc (gcn_option_override,
 477         gcn_omp_device_kind_arch_isa, output_file_start): Handle gfx1100.
 478         (gcn_global_address_p, gcn_addr_space_legitimate_address_p): Change
 479         TARGET_RDNA2 to TARGET_RDNA2_PLUS.
 480         (gcn_hsa_declare_function_name): Don't use '.amdhsa_reserve_flat_scratch'
 481         with gfx1100.
 482         * config/gcn/gcn.h (ASSEMBLER_DIALECT): Likewise.
 483         (TARGET_CPU_CPP_BUILTINS): Define __RDNA3__, __gfx1030__ and
 484         __gfx1100__.
 485         * config/gcn/gcn.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
 486         * config/gcn/gcn.opt (Enum gpu_type): Add gfx1100.
 487         * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1100): Define.
 488         (isa_has_combined_avgprs, main): Handle gfx1100.
 489         * config/gcn/t-omp-device (isa): Add gfx1100.
 490
 491 2024-01-08  Richard Biener  <rguenther@suse.de>
 492
 493         * doc/invoke.texi (-mmovbe): Clarify.
 494
 495 2024-01-08  Richard Biener  <rguenther@suse.de>
 496
 497         PR tree-optimization/113026
 498         * tree-vect-loop.cc (vect_need_peeling_or_partial_vectors_p):
 499         Avoid an epilog in more cases.
 500         * tree-vect-loop-manip.cc (vect_do_peeling): Adjust the
 501         epilogues niter upper bounds and estimates.
 502
 503 2024-01-08  Jakub Jelinek  <jakub@redhat.com>
 504
 505         PR tree-optimization/113228
 506         * gimplify.cc (recalculate_side_effects): Do nothing for SSA_NAMEs.
 507
 508 2024-01-08  Jakub Jelinek  <jakub@redhat.com>
 509
 510         PR tree-optimization/113120
 511         * gimple-lower-bitint.cc (gimple_lower_bitint): Fix handling of very
 512         large _BitInt zero INTEGER_CST PHI argument.
 513
 514 2024-01-08  Jakub Jelinek  <jakub@redhat.com>
 515
 516         PR tree-optimization/113119
 517         * gimple-lower-bitint.cc (optimizable_arith_overflow): Punt if
 518         both REALPART_EXPR and cast from IMAGPART_EXPR appear, but cast
 519         is before REALPART_EXPR.
 520
 521 2024-01-08  Georg-Johann Lay  <avr@gjlay.de>
 522
 523         PR target/112952
 524         * config/avr/avr.cc (avr_handle_addr_attribute): Also print valid
 525         range when diagnosing attribute "io" and "io_low" are out of range.
 526         (avr_eval_addr_attrib): Don't ICE on empty address at that place.
 527         (avr_insert_attributes): Reject if attribute "address", "io" or "io_low"
 528         in contexts other than static storage.
 529         (avr_asm_output_aligned_decl_common): Move output of decls with
 530         attribute "address", "io", and "io_low" to...
 531         (avr_output_addr_attrib): ...this new function.
 532         (avr_asm_asm_output_aligned_bss): Remove output for decls with
 533         attribute "address", "io", and "io_low".
 534         (avr_encode_section_info): Rectify handling of decls with attribute
 535         "address", "io", and "io_low".
 536
 537 2024-01-08  Andrew Stubbs  <ams@codesourcery.com>
 538
 539         * config/gcn/mkoffload.cc (TEST_XNACK_UNSET): New.
 540         (elf_flags): Remove XNACK from the default value.
 541         (main): Set a default XNACK according to the arch.
 542
 543 2024-01-08  Andrew Stubbs  <ams@codesourcery.com>
 544
 545         * config/gcn/mkoffload.cc (isa_has_combined_avgprs): Delete.
 546         (process_asm): Don't count avgprs.
 547
 548 2024-01-08  Hongyu Wang  <hongyu.wang@intel.com>
 549
 550         * config/i386/i386.opt: Add supported sub-features.
 551         * doc/extend.texi: Add description for target attribute.
 552
 553 2024-01-08  Feng Wang  <wangfeng@eswincomputing.com>
 554
 555         * config/riscv/vector.md: Modify avl_type operand index of zvbc ins.
 556
 557 2024-01-07  Roger Sayle  <roger@nextmovesoftware.com>
 558             Uros Bizjak  <ubizjak@gmail.com>
 559
 560         PR target/113231
 561         * config/i386/i386-features.cc (compute_convert_gain): Include
 562         the overhead of explicit load and store (movd) instructions when
 563         converting non-store scalar operations with memory destinations.
 564         Various indentation whitespace fixes.
 565
 566 2024-01-07  Tamar Christina  <tamar.christina@arm.com>
 567
 568         * config/arm/neon.md (cbranch<mode>4): New.
 569
 570 2024-01-07  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 571
 572         * config/riscv/riscv-vsetvl.cc: replace std::max by MAX.
 573
 574 2024-01-06  Jiahao Xu  <xujiahao@loongson.cn>
 575
 576         * config/loongarch/lasx.md: Set the unused bits in operand[3] to 0.
 577
 578 2024-01-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 579
 580         PR target/113248
 581         * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info):
 582         Update the MAX_SEW.
 583
 584 2024-01-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 585
 586         * config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): New function.
 587         (variable_vectorized_p): Teach loop invariant.
 588         (has_unexpected_spills_p): Ditto.
 589
 590 2024-01-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 591
 592         * config/riscv/riscv-protos.h (whole_reg_to_reg_move_p): New function.
 593         * config/riscv/riscv-v.cc (whole_reg_to_reg_move_p): Ditto.
 594         * config/riscv/vector.md: Allow non-vlmax with len = NUNITS simplification.
 595
 596 2024-01-05  Richard Sandiford  <richard.sandiford@arm.com>
 597
 598         PR target/113104
 599         * doc/invoke.texi (aarch64-sve-compare-costs): Replace with...
 600         (aarch64-vect-compare-costs): ...this.
 601         * config/aarch64/aarch64.opt (-param=aarch64-sve-compare-costs=):
 602         Replace with...
 603         (-param=aarch64-vect-compare-costs=): ...this new param.
 604         * config/aarch64/aarch64.cc (aarch64_override_options_internal):
 605         Don't disable it when vectorizing for Advanced SIMD only.
 606         (aarch64_autovectorize_vector_modes): Apply VECT_COMPARE_COSTS
 607         whenever aarch64_vect_compare_costs is true.
 608
 609 2024-01-05  Lulu Cheng  <chenglulu@loongson.cn>
 610
 611         * config/loongarch/lasx.md (lasx_mxld_<lasxfmt_f>):
 612         Modify the method of determining the memory offset of [x]vld/[x]vst.
 613         (lasx_mxst_<lasxfmt_f>): Likewise.
 614         * config/loongarch/loongarch.cc (loongarch_valid_offset_p): Delete.
 615         (loongarch_address_insns): Likewise.
 616         * config/loongarch/lsx.md (lsx_ld_<lsxfmt_f>): Likewise.
 617         (lsx_st_<lsxfmt_f>): Likewise.
 618         * config/loongarch/predicates.md (aq10b_operand): Likewise.
 619         (aq10h_operand): Likewise.
 620         (aq10w_operand): Likewise.
 621         (aq10d_operand): Likewise.
 622
 623 2024-01-05  Alex Coplan  <alex.coplan@arm.com>
 624
 625         PR target/113217
 626         * config/aarch64/aarch64-ldp-fusion.cc
 627         (ldp_bb_info::try_fuse_pair): If the second access can throw,
 628         narrow the move range to exactly that insn.
 629
 630 2024-01-05  Ilya Leoshkevich  <iii@linux.ibm.com>
 631
 632         * asan.cc (asan_function_start): Drop switch_to_section ().
 633         (asan_emit_stack_protection): Set .LASANPC alignment.
 634         * config/i386/i386.cc: Use assemble_function_label_raw ()
 635         instead of ASM_OUTPUT_LABEL ().
 636         * config/s390/s390.cc (s390_asm_output_function_label):
 637         Likewise.
 638         * defaults.h (ASM_OUTPUT_FUNCTION_LABEL): Likewise.
 639         * final.cc (final_start_function_1): Drop
 640         asan_function_start ().
 641         * output.h (assemble_function_label_raw): New function.
 642         * varasm.cc (assemble_function_label_raw): Likewise.
 643
 644 2024-01-05  Ilya Leoshkevich  <iii@linux.ibm.com>
 645
 646         * config/aarch64/aarch64.cc (aarch64_declare_function_name):
 647         Use ASM_OUTPUT_FUNCTION_LABEL ().
 648         * config/alpha/alpha.cc (alpha_start_function): Likewise.
 649         * config/arm/aout.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
 650         * config/arm/arm.cc (arm_asm_declare_function_name): Likewise.
 651         * config/bfin/bfin.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
 652         * config/c6x/c6x.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
 653         * config/gcn/gcn.cc (gcn_hsa_declare_function_name): Likewise.
 654         * config/h8300/h8300.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
 655         * config/ia64/ia64.cc (ia64_start_function): Likewise.
 656         * config/mcore/mcore-elf.h (ASM_DECLARE_FUNCTION_NAME):
 657         Likewise.
 658         * config/microblaze/microblaze.cc (microblaze_function_prologue):
 659         Likewise.
 660         * config/mips/mips.cc (mips_start_unique_function): Return the
 661         tree.
 662         (mips_start_function_definition): Use
 663         ASM_OUTPUT_FUNCTION_LABEL ().
 664         (mips_finish_stub): Pass the tree to
 665         mips_start_function_definition ().
 666         (mips16_build_function_stub): Likewise.
 667         (mips16_build_call_stub): Likewise.
 668         (mips_output_function_prologue): Likewise.
 669         * config/pa/pa.cc (pa_output_function_label): Use
 670         ASM_OUTPUT_FUNCTION_LABEL ().
 671         * config/riscv/riscv.cc (riscv_declare_function_name): Likewise.
 672         * config/rs6000/rs6000.cc (rs6000_elf_declare_function_name):
 673         Likewise.
 674         (rs6000_xcoff_declare_function_name): Likewise.
 675
 676 2024-01-05  Jakub Jelinek  <jakub@redhat.com>
 677
 678         PR tree-optimization/113201
 679         * tree-scalar-evolution.cc (final_value_replacement_loop): Don't call
 680         replace_uses_by on SSA_NAME_OCCURS_IN_ABNORMAL_PHI rslt.
 681
 682 2024-01-05  Jakub Jelinek  <jakub@redhat.com>
 683
 684         PR tree-optimization/90693
 685         * tree-ssa-math-opts.cc (match_single_bit_test): If
 686         tree_expr_nonzero_p (arg), remember it in the second argument to
 687         IFN_POPCOUNT or lower it as arg & (arg - 1) == 0 rather than
 688         arg ^ (arg - 1) > arg - 1.
 689         * internal-fn.cc (expand_POPCOUNT): If second argument to
 690         IFN_POPCOUNT suggests arg is non-zero, try to expand it as
 691         arg & (arg - 1) == 0 rather than arg ^ (arg - 1) > arg - 1.
 692
 693 2024-01-05  Kito Cheng  <kito.cheng@sifive.com>
 694
 695         * config/riscv/riscv-v.cc (expand_load_store):
 696         Remove `value`.
 697         (expand_cond_len_op): Ditto.
 698         (expand_gather_scatter): Ditto.
 699         (expand_lanes_load_store): Ditto.
 700         (expand_fold_extract_last): Ditto.
 701
 702 2024-01-05  Pan Li  <pan2.li@intel.com>
 703
 704         Revert:
 705         2024-01-05  Feng Wang  <wangfeng@eswincomputing.com>
 706
 707         * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
 708                                 Add new function_base for crypto vector.
 709         (class bitmanip): Ditto.
 710         (class b_reverse):Ditto.
 711         (class vwsll):   Ditto.
 712         (class clmul):   Ditto.
 713         (class vg_nhab):  Ditto.
 714         (class crypto_vv):Ditto.
 715         (class crypto_vi):Ditto.
 716         (class vaeskf2_vsm3c):Ditto.
 717         (class vsm3me): Ditto.
 718         (BASE): Add BASE declaration for crypto vector.
 719         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
 720         * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
 721                                 Add crypto vector intrinsic definition.
 722         (vbrev): Ditto.
 723         (vclz): Ditto.
 724         (vctz): Ditto.
 725         (vwsll): Ditto.
 726         (vandn): Ditto.
 727         (vbrev8): Ditto.
 728         (vrev8): Ditto.
 729         (vrol): Ditto.
 730         (vror): Ditto.
 731         (vclmul): Ditto.
 732         (vclmulh): Ditto.
 733         (vghsh): Ditto.
 734         (vgmul): Ditto.
 735         (vaesef): Ditto.
 736         (vaesem): Ditto.
 737         (vaesdf): Ditto.
 738         (vaesdm): Ditto.
 739         (vaesz): Ditto.
 740         (vaeskf1): Ditto.
 741         (vaeskf2): Ditto.
 742         (vsha2ms): Ditto.
 743         (vsha2ch): Ditto.
 744         (vsha2cl): Ditto.
 745         (vsm4k): Ditto.
 746         (vsm4r): Ditto.
 747         (vsm3me): Ditto.
 748         (vsm3c): Ditto.
 749         * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
 750                                 Add new function_shape for crypto vector.
 751         (struct crypto_vi_def): Ditto.
 752         (struct crypto_vv_no_op_type_def): Ditto.
 753         (SHAPE): Add SHAPE declaration of crypto vector.
 754         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
 755         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
 756                                 Add new data type for crypto vector.
 757         (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
 758         (vuint32mf2_t): Ditto.
 759         (vuint32m1_t): Ditto.
 760         (vuint32m2_t): Ditto.
 761         (vuint32m4_t): Ditto.
 762         (vuint32m8_t): Ditto.
 763         (vuint64m1_t): Ditto.
 764         (vuint64m2_t): Ditto.
 765         (vuint64m4_t): Ditto.
 766         (vuint64m8_t): Ditto.
 767         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
 768                                 Add new data struct for crypto vector.
 769         (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
 770         (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
 771         * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
 772
 773 2024-01-05  Feng Wang  <wangfeng@eswincomputing.com>
 774
 775         * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
 776                                 Add new function_base for crypto vector.
 777         (class bitmanip): Ditto.
 778         (class b_reverse):Ditto.
 779         (class vwsll):   Ditto.
 780         (class clmul):   Ditto.
 781         (class vg_nhab):  Ditto.
 782         (class crypto_vv):Ditto.
 783         (class crypto_vi):Ditto.
 784         (class vaeskf2_vsm3c):Ditto.
 785         (class vsm3me): Ditto.
 786         (BASE): Add BASE declaration for crypto vector.
 787         * config/riscv/riscv-vector-builtins-bases.h: Ditto.
 788         * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
 789                                 Add crypto vector intrinsic definition.
 790         (vbrev): Ditto.
 791         (vclz): Ditto.
 792         (vctz): Ditto.
 793         (vwsll): Ditto.
 794         (vandn): Ditto.
 795         (vbrev8): Ditto.
 796         (vrev8): Ditto.
 797         (vrol): Ditto.
 798         (vror): Ditto.
 799         (vclmul): Ditto.
 800         (vclmulh): Ditto.
 801         (vghsh): Ditto.
 802         (vgmul): Ditto.
 803         (vaesef): Ditto.
 804         (vaesem): Ditto.
 805         (vaesdf): Ditto.
 806         (vaesdm): Ditto.
 807         (vaesz): Ditto.
 808         (vaeskf1): Ditto.
 809         (vaeskf2): Ditto.
 810         (vsha2ms): Ditto.
 811         (vsha2ch): Ditto.
 812         (vsha2cl): Ditto.
 813         (vsm4k): Ditto.
 814         (vsm4r): Ditto.
 815         (vsm3me): Ditto.
 816         (vsm3c): Ditto.
 817         * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
 818                                 Add new function_shape for crypto vector.
 819         (struct crypto_vi_def): Ditto.
 820         (struct crypto_vv_no_op_type_def): Ditto.
 821         (SHAPE): Add SHAPE declaration of crypto vector.
 822         * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
 823         * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
 824                                 Add new data type for crypto vector.
 825         (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
 826         (vuint32mf2_t): Ditto.
 827         (vuint32m1_t): Ditto.
 828         (vuint32m2_t): Ditto.
 829         (vuint32m4_t): Ditto.
 830         (vuint32m8_t): Ditto.
 831         (vuint64m1_t): Ditto.
 832         (vuint64m2_t): Ditto.
 833         (vuint64m4_t): Ditto.
 834         (vuint64m8_t): Ditto.
 835         * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
 836                                 Add new data struct for crypto vector.
 837         (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
 838         (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
 839         * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
 840
 841 2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 842
 843         * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
 844
 845 2024-01-04  Andrew Pinski  <quic_apinski@quicinc.com>
 846
 847         PR tree-optimization/113186
 848         * gimple-match-head.cc (gimple_bitwise_inverted_equal_p):
 849         Match `^` with the `==` for 1bit integral types.
 850         * match.pd (maybe_cmp): Allow for bit_xor for 1bit
 851         integral types.
 852
 853 2024-01-04  David Malcolm  <dmalcolm@redhat.com>
 854
 855         * toplev.cc (general_init): Pass lang_mask to urlifier.
 856
 857 2024-01-04  David Malcolm  <dmalcolm@redhat.com>
 858
 859         * diagnostic.h (diagnostic_make_option_url_cb): Add lang_mask
 860         param.
 861         (diagnostic_context::make_option_url): Update for lang_mask param.
 862         * gcc-urlifier.cc: Include "opts.h" and "options.h".
 863         (gcc_urlifier::gcc_urlifier): Add lang_mask param.
 864         (gcc_urlifier::m_lang_mask): New field.
 865         (doc_urls): Make static.
 866         (gcc_urlifier::get_url_for_quoted_text): Use label_text.
 867         (gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
 868         Look for an option by name before trying a binary search in
 869         doc_urls.
 870         (gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
 871         (gcc_urlifier::get_url_suffix_for_option): New.
 872         (make_gcc_urlifier): Add lang_mask param.
 873         (selftest::gcc_urlifier_cc_tests): Update for above changes.
 874         Verify that a URL is found for "-fpack-struct".
 875         * gcc-urlifier.def: Drop options "--version" and "-fpack-struct".
 876         * gcc-urlifier.h (make_gcc_urlifier): Add lang_mask param.
 877         * gcc.cc (driver::global_initializations): Pass 0 for lang_mask
 878         to make_gcc_urlifier.
 879         * opts-diagnostic.h (get_option_url): Add lang_mask param.
 880         * opts.cc (get_option_html_page): Remove special-casing for
 881         analyzer and LTO.
 882         (get_option_url_suffix): New.
 883         (get_option_url): Reimplement.
 884         (selftest::test_get_option_html_page): Rename to...
 885         (selftest::test_get_option_url_suffix): ...this and update for
 886         above changes.
 887         (selftest::opts_cc_tests): Update for renaming.
 888         * opts.h: Include "rich-location.h".
 889         (get_option_url_suffix): New decl.
 890
 891 2024-01-04  David Malcolm  <dmalcolm@redhat.com>
 892
 893         * Makefile.in (ALL_OPT_URL_FILES): New.
 894         (GCC_OBJS): Add options-urls.o.
 895         (OBJS): Likewise.
 896         (OBJS-libcommon): Likewise.
 897         (s-options): Depend on $(ALL_OPT_URL_FILES), and add this to
 898         inputs to opt-gather.awk.
 899         (options-urls.cc): New Makefile target.
 900         * opt-functions.awk (url_suffix): New function.
 901         (lang_url_suffix): New function.
 902         * options-urls-cc-gen.awk: New file.
 903         * opts.h (get_opt_url_suffix): New decl.
 904
 905 2024-01-04  David Malcolm  <dmalcolm@redhat.com>
 906
 907         * params.opt.urls: New file, autogenerated by
 908         regenerate-opt-urls.py.
 909
 910 2024-01-04  David Malcolm  <dmalcolm@redhat.com>
 911
 912         * common.opt.urls: New file, autogenerated by
 913         regenerate-opt-urls.py.
 914         * config/aarch64/aarch64.opt.urls: Likewise.
 915         * config/alpha/alpha.opt.urls: Likewise.
 916         * config/alpha/elf.opt.urls: Likewise.
 917         * config/arc/arc-tables.opt.urls: Likewise.
 918         * config/arc/arc.opt.urls: Likewise.
 919         * config/arm/arm-tables.opt.urls: Likewise.
 920         * config/arm/arm.opt.urls: Likewise.
 921         * config/arm/vxworks.opt.urls: Likewise.
 922         * config/avr/avr.opt.urls: Likewise.
 923         * config/bpf/bpf.opt.urls: Likewise.
 924         * config/c6x/c6x-tables.opt.urls: Likewise.
 925         * config/c6x/c6x.opt.urls: Likewise.
 926         * config/cris/cris.opt.urls: Likewise.
 927         * config/cris/elf.opt.urls: Likewise.
 928         * config/csky/csky.opt.urls: Likewise.
 929         * config/csky/csky_tables.opt.urls: Likewise.
 930         * config/darwin.opt.urls: Likewise.
 931         * config/dragonfly.opt.urls: Likewise.
 932         * config/epiphany/epiphany.opt.urls: Likewise.
 933         * config/fr30/fr30.opt.urls: Likewise.
 934         * config/freebsd.opt.urls: Likewise.
 935         * config/frv/frv.opt.urls: Likewise.
 936         * config/ft32/ft32.opt.urls: Likewise.
 937         * config/fused-madd.opt.urls: Likewise.
 938         * config/g.opt.urls: Likewise.
 939         * config/gcn/gcn.opt.urls: Likewise.
 940         * config/gnu-user.opt.urls: Likewise.
 941         * config/h8300/h8300.opt.urls: Likewise.
 942         * config/hpux11.opt.urls: Likewise.
 943         * config/i386/cygming.opt.urls: Likewise.
 944         * config/i386/cygwin.opt.urls: Likewise.
 945         * config/i386/djgpp.opt.urls: Likewise.
 946         * config/i386/i386.opt.urls: Likewise.
 947         * config/i386/mingw-w64.opt.urls: Likewise.
 948         * config/i386/mingw.opt.urls: Likewise.
 949         * config/i386/nto.opt.urls: Likewise.
 950         * config/ia64/ia64.opt.urls: Likewise.
 951         * config/ia64/ilp32.opt.urls: Likewise.
 952         * config/ia64/vms.opt.urls: Likewise.
 953         * config/iq2000/iq2000.opt.urls: Likewise.
 954         * config/linux-android.opt.urls: Likewise.
 955         * config/linux.opt.urls: Likewise.
 956         * config/lm32/lm32.opt.urls: Likewise.
 957         * config/loongarch/loongarch.opt.urls: Likewise.
 958         * config/lynx.opt.urls: Likewise.
 959         * config/m32c/m32c.opt.urls: Likewise.
 960         * config/m32r/m32r.opt.urls: Likewise.
 961         * config/m68k/ieee.opt.urls: Likewise.
 962         * config/m68k/m68k-tables.opt.urls: Likewise.
 963         * config/m68k/m68k.opt.urls: Likewise.
 964         * config/m68k/uclinux.opt.urls: Likewise.
 965         * config/mcore/mcore.opt.urls: Likewise.
 966         * config/microblaze/microblaze.opt.urls: Likewise.
 967         * config/mips/mips-tables.opt.urls: Likewise.
 968         * config/mips/mips.opt.urls: Likewise.
 969         * config/mips/sde.opt.urls: Likewise.
 970         * config/mmix/mmix.opt.urls: Likewise.
 971         * config/mn10300/mn10300.opt.urls: Likewise.
 972         * config/moxie/moxie.opt.urls: Likewise.
 973         * config/msp430/msp430.opt.urls: Likewise.
 974         * config/nds32/nds32-elf.opt.urls: Likewise.
 975         * config/nds32/nds32-linux.opt.urls: Likewise.
 976         * config/nds32/nds32.opt.urls: Likewise.
 977         * config/netbsd-elf.opt.urls: Likewise.
 978         * config/netbsd.opt.urls: Likewise.
 979         * config/nios2/elf.opt.urls: Likewise.
 980         * config/nios2/nios2.opt.urls: Likewise.
 981         * config/nvptx/nvptx-gen.opt.urls: Likewise.
 982         * config/nvptx/nvptx.opt.urls: Likewise.
 983         * config/openbsd.opt.urls: Likewise.
 984         * config/or1k/elf.opt.urls: Likewise.
 985         * config/or1k/or1k.opt.urls: Likewise.
 986         * config/pa/pa-hpux.opt.urls: Likewise.
 987         * config/pa/pa-hpux1010.opt.urls: Likewise.
 988         * config/pa/pa-hpux1111.opt.urls: Likewise.
 989         * config/pa/pa-hpux1131.opt.urls: Likewise.
 990         * config/pa/pa.opt.urls: Likewise.
 991         * config/pa/pa64-hpux.opt.urls: Likewise.
 992         * config/pdp11/pdp11.opt.urls: Likewise.
 993         * config/pru/pru.opt.urls: Likewise.
 994         * config/riscv/riscv.opt.urls: Likewise.
 995         * config/rl78/rl78.opt.urls: Likewise.
 996         * config/rpath.opt.urls: Likewise.
 997         * config/rs6000/476.opt.urls: Likewise.
 998         * config/rs6000/aix64.opt.urls: Likewise.
 999         * config/rs6000/darwin.opt.urls: Likewise.
1000         * config/rs6000/linux64.opt.urls: Likewise.
1001         * config/rs6000/rs6000-tables.opt.urls: Likewise.
1002         * config/rs6000/rs6000.opt.urls: Likewise.
1003         * config/rs6000/sysv4.opt.urls: Likewise.
1004         * config/rtems.opt.urls: Likewise.
1005         * config/rx/elf.opt.urls: Likewise.
1006         * config/rx/rx.opt.urls: Likewise.
1007         * config/s390/s390.opt.urls: Likewise.
1008         * config/s390/tpf.opt.urls: Likewise.
1009         * config/sh/sh.opt.urls: Likewise.
1010         * config/sh/superh.opt.urls: Likewise.
1011         * config/sol2.opt.urls: Likewise.
1012         * config/sparc/long-double-switch.opt.urls: Likewise.
1013         * config/sparc/sparc.opt.urls: Likewise.
1014         * config/stormy16/stormy16.opt.urls: Likewise.
1015         * config/v850/v850.opt.urls: Likewise.
1016         * config/vax/elf.opt.urls: Likewise.
1017         * config/vax/vax.opt.urls: Likewise.
1018         * config/visium/visium.opt.urls: Likewise.
1019         * config/vms/vms.opt.urls: Likewise.
1020         * config/vxworks-smp.opt.urls: Likewise.
1021         * config/vxworks.opt.urls: Likewise.
1022         * config/xtensa/elf.opt.urls: Likewise.
1023         * config/xtensa/uclinux.opt.urls: Likewise.
1024         * config/xtensa/xtensa.opt.urls: Likewise.
1025         * config/bfin/bfin.opt.urls: New file.
1026
1027 2024-01-04  David Malcolm  <dmalcolm@redhat.com>
1028
1029         * Makefile.in (OPT_URLS_HTML_DEPS): New.
1030         (regenerate-opt-urls): New target.
1031         (regenerate-opt-urls-unit-test): New target.
1032         * doc/options.texi (Option properties): Add UrlSuffix and
1033         description of regenerate-opt-urls.py.  Add LangUrlSuffix_*.
1034         * doc/sourcebuild.texi (Anatomy of a Language Front End): Add
1035         reference to regenerate-opt-urls.py's PER_LANGUAGE_OPTION_INDEXES
1036         and Makefile.in's OPT_URLS_HTML_DEPS.
1037         (Anatomy of a Target Back End): Add
1038         reference to regenerate-opt-urls.py's TARGET_SPECIFIC_PAGES.
1039         * regenerate-opt-urls.py: New file.
1040
1041 2024-01-04  David Malcolm  <dmalcolm@redhat.com>
1042
1043         * diagnostic-format-sarif.cc
1044         (sarif_builder::make_logical_location_object): Convert to...
1045         (make_sarif_logical_location_object): ...this.
1046         (sarif_builder::set_any_logical_locs_arr): Update for above
1047         change.
1048         (sarif_builder::make_thread_flow_location_object): Call
1049         maybe_add_sarif_properties on each diagnostic_event.
1050         * diagnostic-format-sarif.h (class logical_location): New forward
1051         decl.
1052         (make_sarif_logical_location_object): New decl.
1053         * diagnostic-path.h (class sarif_object): New forward decl.
1054         (diagnostic_event::maybe_add_sarif_properties): New vfunc.
1055
1056 2024-01-04  Kuan-Lin Chen  <rufus@andestech.com>
1057             Patrick Lin  <patrick@andestech.com>
1058             Rufus Chen  <rufus@andestech.com>
1059             Monk Chiang  <monk.chiang@sifive.com>
1060
1061         * config/riscv/riscv.cc (riscv_legitimize_move): Expand movfh
1062         with Nan-boxing value.
1063         * config/riscv/riscv.md (*movhf_softfloat_unspec): New pattern.
1064
1065 2024-01-04  Roger Sayle  <roger@nextmovesoftware.com>
1066             Jeff Law  <jlaw@ventanamicro.com>
1067
1068         PR rtl-optimization/104914
1069         * expr.cc (expand_assignment): When target is SUBREG_PROMOTED_VAR_P
1070         a sign or zero extension is only required if the modified field
1071         overlaps the SUBREG's most significant bit.  On MODE_REP_EXTENDED
1072         targets, don't refer to the temporarily incorrectly extended value
1073         using a SUBREG, but instead generate an explicit TRUNCATE rtx.
1074
1075 2024-01-04  Pan Li  <pan2.li@intel.com>
1076
1077         Revert:
1078         2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1079
1080         * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
1081
1082 2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1083
1084         * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
1085
1086 2024-01-04  Kito Cheng  <kito.cheng@sifive.com>
1087
1088         * config/riscv/riscv.cc (riscv_for_each_saved_reg): Adjust the
1089         offset of fcsr.
1090
1091 2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1092
1093         * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): New function.
1094         (compute_nregs_for_mode): Refine LMUL.
1095         (max_number_of_live_regs): Ditto.
1096         (compute_estimated_lmul): Ditto.
1097         (has_unexpected_spills_p): Ditto.
1098
1099 2024-01-04  Li Wei  <liwei@loongson.cn>
1100
1101         * config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
1102         Remove useless forward declaration.
1103         (loongarch_is_even_extraction): Remove useless forward declaration.
1104         (loongarch_try_expand_lsx_vshuf_const): Removed.
1105         (loongarch_expand_vec_perm_const_1): Merged.
1106         (loongarch_is_double_duplicate): Removed.
1107         (loongarch_is_center_extraction): Ditto.
1108         (loongarch_is_reversing_permutation): Ditto.
1109         (loongarch_is_di_misalign_extract): Ditto.
1110         (loongarch_is_si_misalign_extract): Ditto.
1111         (loongarch_is_lasx_lowpart_extract): Ditto.
1112         (loongarch_is_op_reverse_perm): Ditto.
1113         (loongarch_is_single_op_perm): Ditto.
1114         (loongarch_is_divisible_perm): Ditto.
1115         (loongarch_is_triple_stride_extract): Ditto.
1116         (loongarch_expand_vec_perm_const_2): Merged.
1117         (loongarch_expand_vec_perm_const): New.
1118         (loongarch_vectorize_vec_perm_const): Adjust.
1119
1120 2024-01-04  Sandra Loosemore  <sandra@codesourcery.com>
1121
1122         * omp-general.cc: Fix comment typos and misplaced/confusing
1123         comments.  Delete redundant include of omp-general.h.
1124
1125 2024-01-04  YunQiang Su  <syq@gcc.gnu.org>
1126
1127         PR rtl-optimization/104914
1128         * config/mips/mips.md (insqisi_extended): New patterns.
1129         (inshisi_extended): Ditto.
1130
1131 2024-01-04  YunQiang Su  <syq@gcc.gnu.org>
1132
1133         * config/mips/mips.cc (mips_insn_cost): New function.
1134
1135 2024-01-04  YunQiang Su  <syq@gcc.gnu.org>
1136
1137         * config/mips/mips.md (perf_ratio): New attribute.
1138
1139 2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1140
1141         PR target/113206
1142         PR target/113209
1143         * config/riscv/riscv-vsetvl.cc (invalid_opt_bb_p): New function.
1144         (pre_vsetvl::compute_lcm_local_properties): Disable earliest fusion on
1145         blocks belong to infinite loop.
1146         (pre_vsetvl::emit_vsetvl): Remove fake edges.
1147         * config/riscv/t-riscv: Add a new include file.
1148
1149 2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1150
1151         * config/riscv/vector.md: Fix indent.
1152
1153 2024-01-03  Kwok Cheung Yeung  <kcy@codesourcery.com>
1154
1155         * tree-core.h (enum omp_clause_code): Move OMP_CLAUSE_INDIRECT to before
1156         OMP_CLAUSE__SIMDUID_.
1157         * tree.cc (omp_clause_num_ops): Update position of entry for
1158         OMP_CLAUSE_INDIRECT to correspond with omp_clause_code.
1159         (omp_clause_code_name): Likewise.
1160
1161 2024-01-03  Kwok Cheung Yeung  <kcy@codesourcery.com>
1162
1163         * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Restucture
1164         printing of FUNC_MAP/IND_FUNC_MAP labels.
1165
1166 2024-01-03  Jakub Jelinek  <jakub@redhat.com>
1167
1168         * gcc.cc (process_command): Update copyright notice dates.
1169         * gcov-dump.cc (print_version): Ditto.
1170         * gcov.cc (print_version): Ditto.
1171         * gcov-tool.cc (print_version): Ditto.
1172         * gengtype.cc (create_file): Ditto.
1173         * doc/cpp.texi: Bump @copying's copyright year.
1174         * doc/cppinternals.texi: Ditto.
1175         * doc/gcc.texi: Ditto.
1176         * doc/gccint.texi: Ditto.
1177         * doc/gcov.texi: Ditto.
1178         * doc/install.texi: Ditto.
1179         * doc/invoke.texi: Ditto.
1180
1181 2024-01-03  Xi Ruoyao  <xry111@xry111.site>
1182
1183         * config/loongarch/simd.md (fmax<mode>3): New define_insn.
1184         (fmin<mode>3): Likewise.
1185         (reduc_fmax_scal_<mode>3): New define_expand.
1186         (reduc_fmin_scal_<mode>3): Likewise.
1187
1188 2024-01-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1189
1190         PR target/113112
1191         * config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Add rgroup info.
1192         (max_number_of_live_regs): Ditto.
1193         (has_unexpected_spills_p): Ditto.
1194
1195 2024-01-02  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
1196             Jin Ma  <jinma@linux.alibaba.com>
1197             Xianmiao Qu  <cooper.qu@linux.alibaba.com>
1198             Christoph Müllner  <christoph.muellner@vrull.eu>
1199
1200         * config/riscv/vector.md:
1201         Use vector_length_operand for vsetvl patterns.
1202
1203 2024-01-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1204
1205         * config/riscv/riscv-v.cc (is_vlmax_len_p): Remove satisfies_constraint_K.
1206         (expand_cond_len_op): Add simplification of dummy len and dummy mask.
1207
1208 2024-01-02  Di Zhao  <dizhao@os.amperecomputing.com>
1209
1210         * config/aarch64/aarch64-tuning-flags.def
1211         (AARCH64_EXTRA_TUNING_OPTION): New tuning option
1212         AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.
1213         * config/aarch64/aarch64.cc
1214         (aarch64_override_options_internal): Set
1215         param_fully_pipelined_fma according to tuning option.
1216         * config/aarch64/tuning_models/ampere1.h: Add
1217         AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA to tune_flags.
1218         * config/aarch64/tuning_models/ampere1a.h: Likewise.
1219         * config/aarch64/tuning_models/ampere1b.h: Likewise.
1220
1221 2024-01-02  Feng Wang  <wangfeng@eswincomputing.com>
1222
1223         * config/riscv/vector-crypto.md: Modify copyright year.
1224
1225 2024-01-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1226
1227         * config/riscv/riscv-vector-costs.cc: Move STMT_VINFO_TYPE (...) to local.
1228
1229 2024-01-02  Lulu Cheng  <chenglulu@loongson.cn>
1230
1231         * config.in: Regenerate.
1232         * config/loongarch/loongarch-opts.h (HAVE_AS_TLS_LE_RELAXATION): Define.
1233         * config/loongarch/loongarch.cc (loongarch_legitimize_tls_address):
1234         Added TLS Le Relax support.
1235         (loongarch_print_operand_reloc): Add the output string of TLS Le Relax.
1236         * config/loongarch/loongarch.md (@add_tls_le_relax<mode>): New template.
1237         * configure: Regenerate.
1238         * configure.ac: Check if binutils supports TLS le relax.
1239
1240 2024-01-02  Feng Wang  <wangfeng@eswincomputing.com>
1241
1242         * config/riscv/iterators.md: Add rotate insn name.
1243         * config/riscv/riscv.md: Add new insns name for crypto vector.
1244         * config/riscv/vector-iterators.md: Add new iterators for crypto vector.
1245         * config/riscv/vector.md: Add the corresponding attr for crypto vector.
1246         * config/riscv/vector-crypto.md: New file.The machine descriptions for crypto vector.
1247
1248 2024-01-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
1249
1250         PR target/113112
1251         * config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Fix
1252         pointer type liveness count.
1253 \f
1254 Copyright (C) 2024 Free Software Foundation, Inc.
1255
1256 Copying and distribution of this file, with or without modification,
1257 are permitted in any medium without royalty provided the copyright
1258 notice and this notice are preserved.