1 /* { dg-do compile } */
2 /* { dg-options "-O -msve-vector-bits=256" } */
10 typedef int64_t vnx2di
__attribute__((vector_size (32)));
11 typedef int32_t vnx4si
__attribute__((vector_size (32)));
12 typedef int16_t vnx8hi
__attribute__((vector_size (32)));
13 typedef int8_t vnx16qi
__attribute__((vector_size (32)));
14 typedef double vnx2df
__attribute__((vector_size (32)));
15 typedef float vnx4sf
__attribute__((vector_size (32)));
16 typedef _Float16 vnx8hf
__attribute__((vector_size (32)));
18 #define MASK_2(X, Y) X, Y + X
19 #define MASK_4(X, Y) MASK_2 (X, Y), MASK_2 (X + 1, Y)
20 #define MASK_8(X, Y) MASK_4 (X, Y), MASK_4 (X + 2, Y)
21 #define MASK_16(X, Y) MASK_8 (X, Y), MASK_8 (X + 4, Y)
22 #define MASK_32(X, Y) MASK_16 (X, Y), MASK_16 (X + 8, Y)
24 #define INDEX_4 vnx2di
25 #define INDEX_8 vnx4si
26 #define INDEX_16 vnx8hi
27 #define INDEX_32 vnx16qi
29 #define PERMUTE(TYPE, NUNITS) \
30 TYPE permute_##TYPE (TYPE values1, TYPE values2) \
32 return __builtin_shuffle \
34 ((INDEX_##NUNITS) { MASK_##NUNITS (BIAS * (NUNITS / 2), \
49 /* { dg-final { scan-assembler-not {\ttbl\t} } } */
51 /* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d} 2 } } */
52 /* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s} 2 } } */
53 /* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h} 2 } } */
54 /* { dg-final { scan-assembler-times {\tzip1\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b} 1 } } */