gcc/testsuite/gcc.target/aarch64/sve/while_2.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -ftree-vectorize" } */
   3
   4 #include <stdint.h>
   5
   6 #define ADD_LOOP(TYPE)                                  \
   7   void __attribute__ ((noinline, noclone))              \
   8   vec_while_##TYPE (TYPE *restrict a, unsigned int n)   \
   9   {                                                     \
  10     for (unsigned int i = 0; i < n; ++i)                \
  11       a[i] += 1;                                        \
  12   }
  13
  14 #define TEST_ALL(T)                             \
  15   T (int8_t)                                    \
  16   T (uint8_t)                                   \
  17   T (int16_t)                                   \
  18   T (uint16_t)                                  \
  19   T (int32_t)                                   \
  20   T (uint32_t)                                  \
  21   T (int64_t)                                   \
  22   T (uint64_t)                                  \
  23   T (float)                                     \
  24   T (double)
  25
  26 TEST_ALL (ADD_LOOP)
  27
  28 /* { dg-final { scan-assembler-not {\tuqdec} } } */
  29 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b, xzr,} 2 } } */
  30 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b, x[0-9]+,} 2 } } */
  31 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h, xzr,} 2 } } */
  32 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h, x[0-9]+,} 2 } } */
  33 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s, xzr,} 3 } } */
  34 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s, x[0-9]+,} 3 } } */
  35 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d, xzr,} 3 } } */
  36 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d, x[0-9]+,} 3 } } */
  37 /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.b, p[0-7]/z, \[x0, x[0-9]+\]\n} 2 } } */
  38 /* { dg-final { scan-assembler-times {\tst1b\tz[0-9]+\.b, p[0-7], \[x0, x[0-9]+\]\n} 2 } } */
  39 /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.h, p[0-7]/z, \[x0, x[0-9]+, lsl 1\]\n} 2 } } */
  40 /* { dg-final { scan-assembler-times {\tst1h\tz[0-9]+\.h, p[0-7], \[x0, x[0-9]+, lsl 1\]\n} 2 } } */
  41 /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.s, p[0-7]/z, \[x0, x[0-9]+, lsl 2\]\n} 3 } } */
  42 /* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s, p[0-7], \[x0, x[0-9]+, lsl 2\]\n} 3 } } */
  43 /* { dg-final { scan-assembler-times {\tld1d\tz[0-9]+\.d, p[0-7]/z, \[x0, x[0-9]+, lsl 3\]\n} 3 } } */
  44 /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d, p[0-7], \[x0, x[0-9]+, lsl 3\]\n} 3 } } */